2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2009
17 * Authors: Alexander Graf <agraf@suse.de>
20 #include <asm/kvm_ppc.h>
21 #include <asm/disassemble.h>
22 #include <asm/kvm_book3s.h>
25 #define OP_19_XOP_RFID 18
26 #define OP_19_XOP_RFI 50
28 #define OP_31_XOP_MFMSR 83
29 #define OP_31_XOP_MTMSR 146
30 #define OP_31_XOP_MTMSRD 178
31 #define OP_31_XOP_MTSR 210
32 #define OP_31_XOP_MTSRIN 242
33 #define OP_31_XOP_TLBIEL 274
34 #define OP_31_XOP_TLBIE 306
35 #define OP_31_XOP_SLBMTE 402
36 #define OP_31_XOP_SLBIE 434
37 #define OP_31_XOP_SLBIA 498
38 #define OP_31_XOP_MFSR 595
39 #define OP_31_XOP_MFSRIN 659
40 #define OP_31_XOP_DCBA 758
41 #define OP_31_XOP_SLBMFEV 851
42 #define OP_31_XOP_EIOIO 854
43 #define OP_31_XOP_SLBMFEE 915
45 /* DCBZ is actually 1014, but we patch it to 1010 so we get a trap */
46 #define OP_31_XOP_DCBZ 1010
62 /* Book3S_32 defines mfsrin(v) - but that messes up our abstract
63 * function pointers, so let's just disable the define. */
72 static bool spr_allowed(struct kvm_vcpu *vcpu, enum priv_level level)
74 /* PAPR VMs only access supervisor SPRs */
75 if (vcpu->arch.papr_enabled && (level > PRIV_SUPER))
78 /* Limit user space to its own small SPR set */
79 if ((vcpu->arch.shared->msr & MSR_PR) && level > PRIV_PROBLEM)
85 int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
86 unsigned int inst, int *advance)
88 int emulated = EMULATE_DONE;
90 switch (get_op(inst)) {
92 switch (get_xop(inst)) {
95 kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
96 kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
101 emulated = EMULATE_FAIL;
106 switch (get_xop(inst)) {
107 case OP_31_XOP_MFMSR:
108 kvmppc_set_gpr(vcpu, get_rt(inst),
109 vcpu->arch.shared->msr);
111 case OP_31_XOP_MTMSRD:
113 ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
114 if (inst & 0x10000) {
115 vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE);
116 vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE);
118 kvmppc_set_msr(vcpu, rs);
121 case OP_31_XOP_MTMSR:
122 kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, get_rs(inst)));
128 srnum = kvmppc_get_field(inst, 12 + 32, 15 + 32);
129 if (vcpu->arch.mmu.mfsrin) {
131 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
132 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
136 case OP_31_XOP_MFSRIN:
140 srnum = (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf;
141 if (vcpu->arch.mmu.mfsrin) {
143 sr = vcpu->arch.mmu.mfsrin(vcpu, srnum);
144 kvmppc_set_gpr(vcpu, get_rt(inst), sr);
149 vcpu->arch.mmu.mtsrin(vcpu,
151 kvmppc_get_gpr(vcpu, get_rs(inst)));
153 case OP_31_XOP_MTSRIN:
154 vcpu->arch.mmu.mtsrin(vcpu,
155 (kvmppc_get_gpr(vcpu, get_rb(inst)) >> 28) & 0xf,
156 kvmppc_get_gpr(vcpu, get_rs(inst)));
158 case OP_31_XOP_TLBIE:
159 case OP_31_XOP_TLBIEL:
161 bool large = (inst & 0x00200000) ? true : false;
162 ulong addr = kvmppc_get_gpr(vcpu, get_rb(inst));
163 vcpu->arch.mmu.tlbie(vcpu, addr, large);
166 case OP_31_XOP_EIOIO:
168 case OP_31_XOP_SLBMTE:
169 if (!vcpu->arch.mmu.slbmte)
172 vcpu->arch.mmu.slbmte(vcpu,
173 kvmppc_get_gpr(vcpu, get_rs(inst)),
174 kvmppc_get_gpr(vcpu, get_rb(inst)));
176 case OP_31_XOP_SLBIE:
177 if (!vcpu->arch.mmu.slbie)
180 vcpu->arch.mmu.slbie(vcpu,
181 kvmppc_get_gpr(vcpu, get_rb(inst)));
183 case OP_31_XOP_SLBIA:
184 if (!vcpu->arch.mmu.slbia)
187 vcpu->arch.mmu.slbia(vcpu);
189 case OP_31_XOP_SLBMFEE:
190 if (!vcpu->arch.mmu.slbmfee) {
191 emulated = EMULATE_FAIL;
195 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
196 t = vcpu->arch.mmu.slbmfee(vcpu, rb);
197 kvmppc_set_gpr(vcpu, get_rt(inst), t);
200 case OP_31_XOP_SLBMFEV:
201 if (!vcpu->arch.mmu.slbmfev) {
202 emulated = EMULATE_FAIL;
206 rb = kvmppc_get_gpr(vcpu, get_rb(inst));
207 t = vcpu->arch.mmu.slbmfev(vcpu, rb);
208 kvmppc_set_gpr(vcpu, get_rt(inst), t);
212 /* Gets treated as NOP */
216 ulong rb = kvmppc_get_gpr(vcpu, get_rb(inst));
219 u32 zeros[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
224 ra = kvmppc_get_gpr(vcpu, get_ra(inst));
226 addr = (ra + rb) & ~31ULL;
227 if (!(vcpu->arch.shared->msr & MSR_SF))
231 r = kvmppc_st(vcpu, &addr, 32, zeros, true);
232 if ((r == -ENOENT) || (r == -EPERM)) {
233 struct kvmppc_book3s_shadow_vcpu *svcpu;
235 svcpu = svcpu_get(vcpu);
237 vcpu->arch.shared->dar = vaddr;
238 svcpu->fault_dar = vaddr;
240 dsisr = DSISR_ISSTORE;
242 dsisr |= DSISR_NOHPTE;
243 else if (r == -EPERM)
244 dsisr |= DSISR_PROTFAULT;
246 vcpu->arch.shared->dsisr = dsisr;
247 svcpu->fault_dsisr = dsisr;
250 kvmppc_book3s_queue_irqprio(vcpu,
251 BOOK3S_INTERRUPT_DATA_STORAGE);
257 emulated = EMULATE_FAIL;
261 emulated = EMULATE_FAIL;
264 if (emulated == EMULATE_FAIL)
265 emulated = kvmppc_emulate_paired_single(run, vcpu);
270 void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
275 u32 bl = (val >> 2) & 0x7ff;
276 bat->bepi_mask = (~bl << 17);
277 bat->bepi = val & 0xfffe0000;
278 bat->vs = (val & 2) ? 1 : 0;
279 bat->vp = (val & 1) ? 1 : 0;
280 bat->raw = (bat->raw & 0xffffffff00000000ULL) | val;
283 bat->brpn = val & 0xfffe0000;
284 bat->wimg = (val >> 3) & 0xf;
286 bat->raw = (bat->raw & 0x00000000ffffffffULL) | ((u64)val << 32);
290 static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
292 struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
293 struct kvmppc_bat *bat;
296 case SPRN_IBAT0U ... SPRN_IBAT3L:
297 bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
299 case SPRN_IBAT4U ... SPRN_IBAT7L:
300 bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
302 case SPRN_DBAT0U ... SPRN_DBAT3L:
303 bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
305 case SPRN_DBAT4U ... SPRN_DBAT7L:
306 bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
315 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
317 int emulated = EMULATE_DONE;
318 ulong spr_val = kvmppc_get_gpr(vcpu, rs);
322 if (!spr_allowed(vcpu, PRIV_HYPER))
324 to_book3s(vcpu)->sdr1 = spr_val;
327 vcpu->arch.shared->dsisr = spr_val;
330 vcpu->arch.shared->dar = spr_val;
333 to_book3s(vcpu)->hior = spr_val;
335 case SPRN_IBAT0U ... SPRN_IBAT3L:
336 case SPRN_IBAT4U ... SPRN_IBAT7L:
337 case SPRN_DBAT0U ... SPRN_DBAT3L:
338 case SPRN_DBAT4U ... SPRN_DBAT7L:
340 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
342 kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
343 /* BAT writes happen so rarely that we're ok to flush
345 kvmppc_mmu_pte_flush(vcpu, 0, 0);
346 kvmppc_mmu_flush_segments(vcpu);
350 to_book3s(vcpu)->hid[0] = spr_val;
353 to_book3s(vcpu)->hid[1] = spr_val;
356 to_book3s(vcpu)->hid[2] = spr_val;
358 case SPRN_HID2_GEKKO:
359 to_book3s(vcpu)->hid[2] = spr_val;
360 /* HID2.PSE controls paired single on gekko */
361 switch (vcpu->arch.pvr) {
362 case 0x00080200: /* lonestar 2.0 */
363 case 0x00088202: /* lonestar 2.2 */
364 case 0x70000100: /* gekko 1.0 */
365 case 0x00080100: /* gekko 2.0 */
366 case 0x00083203: /* gekko 2.3a */
367 case 0x00083213: /* gekko 2.3b */
368 case 0x00083204: /* gekko 2.4 */
369 case 0x00083214: /* gekko 2.4e (8SE) - retail HW2 */
370 case 0x00087200: /* broadway */
371 if (vcpu->arch.hflags & BOOK3S_HFLAG_NATIVE_PS) {
372 /* Native paired singles */
373 } else if (spr_val & (1 << 29)) { /* HID2.PSE */
374 vcpu->arch.hflags |= BOOK3S_HFLAG_PAIRED_SINGLE;
375 kvmppc_giveup_ext(vcpu, MSR_FP);
377 vcpu->arch.hflags &= ~BOOK3S_HFLAG_PAIRED_SINGLE;
383 case SPRN_HID4_GEKKO:
384 to_book3s(vcpu)->hid[4] = spr_val;
387 to_book3s(vcpu)->hid[5] = spr_val;
388 /* guest HID5 set can change is_dcbz32 */
389 if (vcpu->arch.mmu.is_dcbz32(vcpu) &&
391 vcpu->arch.hflags |= BOOK3S_HFLAG_DCBZ32;
401 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0] = spr_val;
410 case SPRN_MMCR0_GEKKO:
411 case SPRN_MMCR1_GEKKO:
412 case SPRN_PMC1_GEKKO:
413 case SPRN_PMC2_GEKKO:
414 case SPRN_PMC3_GEKKO:
415 case SPRN_PMC4_GEKKO:
416 case SPRN_WPAR_GEKKO:
420 printk(KERN_INFO "KVM: invalid SPR write: %d\n", sprn);
422 emulated = EMULATE_FAIL;
430 int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
432 int emulated = EMULATE_DONE;
435 case SPRN_IBAT0U ... SPRN_IBAT3L:
436 case SPRN_IBAT4U ... SPRN_IBAT7L:
437 case SPRN_DBAT0U ... SPRN_DBAT3L:
438 case SPRN_DBAT4U ... SPRN_DBAT7L:
440 struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
443 kvmppc_set_gpr(vcpu, rt, bat->raw >> 32);
445 kvmppc_set_gpr(vcpu, rt, bat->raw);
450 if (!spr_allowed(vcpu, PRIV_HYPER))
452 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
455 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr);
458 kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar);
461 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
464 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[0]);
467 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[1]);
470 case SPRN_HID2_GEKKO:
471 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[2]);
474 case SPRN_HID4_GEKKO:
475 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[4]);
478 kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hid[5]);
482 kvmppc_set_gpr(vcpu, rt, 0);
492 kvmppc_set_gpr(vcpu, rt,
493 to_book3s(vcpu)->gqr[sprn - SPRN_GQR0]);
501 case SPRN_MMCR0_GEKKO:
502 case SPRN_MMCR1_GEKKO:
503 case SPRN_PMC1_GEKKO:
504 case SPRN_PMC2_GEKKO:
505 case SPRN_PMC3_GEKKO:
506 case SPRN_PMC4_GEKKO:
507 case SPRN_WPAR_GEKKO:
508 kvmppc_set_gpr(vcpu, rt, 0);
512 printk(KERN_INFO "KVM: invalid SPR read: %d\n", sprn);
514 emulated = EMULATE_FAIL;
522 u32 kvmppc_alignment_dsisr(struct kvm_vcpu *vcpu, unsigned int inst)
527 * This is what the spec says about DSISR bits (not mentioned = 0):
529 * 12:13 [DS] Set to bits 30:31
530 * 15:16 [X] Set to bits 29:30
531 * 17 [X] Set to bit 25
532 * [D/DS] Set to bit 5
533 * 18:21 [X] Set to bits 21:24
534 * [D/DS] Set to bits 1:4
535 * 22:26 Set to bits 6:10 (RT/RS/FRT/FRS)
536 * 27:31 Set to bits 11:15 (RA)
539 switch (get_op(inst)) {
545 dsisr |= (inst >> 12) & 0x4000; /* bit 17 */
546 dsisr |= (inst >> 17) & 0x3c00; /* bits 18:21 */
550 dsisr |= (inst << 14) & 0x18000; /* bits 15:16 */
551 dsisr |= (inst << 8) & 0x04000; /* bit 17 */
552 dsisr |= (inst << 3) & 0x03c00; /* bits 18:21 */
555 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);
559 dsisr |= (inst >> 16) & 0x03ff; /* bits 22:31 */
564 ulong kvmppc_alignment_dar(struct kvm_vcpu *vcpu, unsigned int inst)
569 switch (get_op(inst)) {
576 dar = kvmppc_get_gpr(vcpu, ra);
577 dar += (s32)((s16)inst);
582 dar = kvmppc_get_gpr(vcpu, ra);
583 dar += kvmppc_get_gpr(vcpu, get_rb(inst));
586 printk(KERN_INFO "KVM: Unaligned instruction 0x%x\n", inst);