arch/arm/mach-at91/at91sam9261_devices.c

   1 /*
   2  * arch/arm/mach-at91/at91sam9261_devices.c
   3  *
   4  *  Copyright (C) 2005 Thibaut VARENE <varenet@parisc-linux.org>
   5  *  Copyright (C) 2005 David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  */
  13 #include <asm/mach/arch.h>
  14 #include <asm/mach/map.h>
  15
  16 #include <linux/dma-mapping.h>
  17 #include <linux/gpio.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/i2c-gpio.h>
  20
  21 #include <linux/fb.h>
  22 #include <video/atmel_lcdc.h>
  23
  24 #include <mach/board.h>
  25 #include <mach/at91sam9261.h>
  26 #include <mach/at91sam9261_matrix.h>
  27 #include <mach/at91_matrix.h>
  28 #include <mach/at91sam9_smc.h>
  29
  30 #include "generic.h"
  31
  32
  33 /* --------------------------------------------------------------------
  34  *  USB Host
  35  * -------------------------------------------------------------------- */
  36
  37 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  38 static u64 ohci_dmamask = DMA_BIT_MASK(32);
  39 static struct at91_usbh_data usbh_data;
  40
  41 static struct resource usbh_resources[] = {
  42         [0] = {
  43                 .start  = AT91SAM9261_UHP_BASE,
  44                 .end    = AT91SAM9261_UHP_BASE + SZ_1M - 1,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = AT91SAM9261_ID_UHP,
  49                 .end    = AT91SAM9261_ID_UHP,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct platform_device at91sam9261_usbh_device = {
  55         .name           = "at91_ohci",
  56         .id             = -1,
  57         .dev            = {
  58                                 .dma_mask               = &ohci_dmamask,
  59                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  60                                 .platform_data          = &usbh_data,
  61         },
  62         .resource       = usbh_resources,
  63         .num_resources  = ARRAY_SIZE(usbh_resources),
  64 };
  65
  66 void __init at91_add_device_usbh(struct at91_usbh_data *data)
  67 {
  68         int i;
  69
  70         if (!data)
  71                 return;
  72
  73         /* Enable overcurrent notification */
  74         for (i = 0; i < data->ports; i++) {
  75                 if (data->overcurrent_pin[i])
  76                         at91_set_gpio_input(data->overcurrent_pin[i], 1);
  77         }
  78
  79         usbh_data = *data;
  80         platform_device_register(&at91sam9261_usbh_device);
  81 }
  82 #else
  83 void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
  84 #endif
  85
  86
  87 /* --------------------------------------------------------------------
  88  *  USB Device (Gadget)
  89  * -------------------------------------------------------------------- */
  90
  91 #if defined(CONFIG_USB_AT91) || defined(CONFIG_USB_AT91_MODULE)
  92 static struct at91_udc_data udc_data;
  93
  94 static struct resource udc_resources[] = {
  95         [0] = {
  96                 .start  = AT91SAM9261_BASE_UDP,
  97                 .end    = AT91SAM9261_BASE_UDP + SZ_16K - 1,
  98                 .flags  = IORESOURCE_MEM,
  99         },
 100         [1] = {
 101                 .start  = AT91SAM9261_ID_UDP,
 102                 .end    = AT91SAM9261_ID_UDP,
 103                 .flags  = IORESOURCE_IRQ,
 104         },
 105 };
 106
 107 static struct platform_device at91sam9261_udc_device = {
 108         .name           = "at91_udc",
 109         .id             = -1,
 110         .dev            = {
 111                                 .platform_data          = &udc_data,
 112         },
 113         .resource       = udc_resources,
 114         .num_resources  = ARRAY_SIZE(udc_resources),
 115 };
 116
 117 void __init at91_add_device_udc(struct at91_udc_data *data)
 118 {
 119         if (!data)
 120                 return;
 121
 122         if (gpio_is_valid(data->vbus_pin)) {
 123                 at91_set_gpio_input(data->vbus_pin, 0);
 124                 at91_set_deglitch(data->vbus_pin, 1);
 125         }
 126
 127         /* Pullup pin is handled internally by USB device peripheral */
 128
 129         udc_data = *data;
 130         platform_device_register(&at91sam9261_udc_device);
 131 }
 132 #else
 133 void __init at91_add_device_udc(struct at91_udc_data *data) {}
 134 #endif
 135
 136 /* --------------------------------------------------------------------
 137  *  MMC / SD
 138  * -------------------------------------------------------------------- */
 139
 140 #if defined(CONFIG_MMC_AT91) || defined(CONFIG_MMC_AT91_MODULE)
 141 static u64 mmc_dmamask = DMA_BIT_MASK(32);
 142 static struct at91_mmc_data mmc_data;
 143
 144 static struct resource mmc_resources[] = {
 145         [0] = {
 146                 .start  = AT91SAM9261_BASE_MCI,
 147                 .end    = AT91SAM9261_BASE_MCI + SZ_16K - 1,
 148                 .flags  = IORESOURCE_MEM,
 149         },
 150         [1] = {
 151                 .start  = AT91SAM9261_ID_MCI,
 152                 .end    = AT91SAM9261_ID_MCI,
 153                 .flags  = IORESOURCE_IRQ,
 154         },
 155 };
 156
 157 static struct platform_device at91sam9261_mmc_device = {
 158         .name           = "at91_mci",
 159         .id             = -1,
 160         .dev            = {
 161                                 .dma_mask               = &mmc_dmamask,
 162                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 163                                 .platform_data          = &mmc_data,
 164         },
 165         .resource       = mmc_resources,
 166         .num_resources  = ARRAY_SIZE(mmc_resources),
 167 };
 168
 169 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
 170 {
 171         if (!data)
 172                 return;
 173
 174         /* input/irq */
 175         if (gpio_is_valid(data->det_pin)) {
 176                 at91_set_gpio_input(data->det_pin, 1);
 177                 at91_set_deglitch(data->det_pin, 1);
 178         }
 179         if (gpio_is_valid(data->wp_pin))
 180                 at91_set_gpio_input(data->wp_pin, 1);
 181         if (gpio_is_valid(data->vcc_pin))
 182                 at91_set_gpio_output(data->vcc_pin, 0);
 183
 184         /* CLK */
 185         at91_set_B_periph(AT91_PIN_PA2, 0);
 186
 187         /* CMD */
 188         at91_set_B_periph(AT91_PIN_PA1, 1);
 189
 190         /* DAT0, maybe DAT1..DAT3 */
 191         at91_set_B_periph(AT91_PIN_PA0, 1);
 192         if (data->wire4) {
 193                 at91_set_B_periph(AT91_PIN_PA4, 1);
 194                 at91_set_B_periph(AT91_PIN_PA5, 1);
 195                 at91_set_B_periph(AT91_PIN_PA6, 1);
 196         }
 197
 198         mmc_data = *data;
 199         platform_device_register(&at91sam9261_mmc_device);
 200 }
 201 #else
 202 void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data) {}
 203 #endif
 204
 205
 206 /* --------------------------------------------------------------------
 207  *  NAND / SmartMedia
 208  * -------------------------------------------------------------------- */
 209
 210 #if defined(CONFIG_MTD_NAND_ATMEL) || defined(CONFIG_MTD_NAND_ATMEL_MODULE)
 211 static struct atmel_nand_data nand_data;
 212
 213 #define NAND_BASE       AT91_CHIPSELECT_3
 214
 215 static struct resource nand_resources[] = {
 216         {
 217                 .start  = NAND_BASE,
 218                 .end    = NAND_BASE + SZ_256M - 1,
 219                 .flags  = IORESOURCE_MEM,
 220         }
 221 };
 222
 223 static struct platform_device atmel_nand_device = {
 224         .name           = "atmel_nand",
 225         .id             = -1,
 226         .dev            = {
 227                                 .platform_data  = &nand_data,
 228         },
 229         .resource       = nand_resources,
 230         .num_resources  = ARRAY_SIZE(nand_resources),
 231 };
 232
 233 void __init at91_add_device_nand(struct atmel_nand_data *data)
 234 {
 235         unsigned long csa;
 236
 237         if (!data)
 238                 return;
 239
 240         csa = at91_matrix_read(AT91_MATRIX_EBICSA);
 241         at91_matrix_write(AT91_MATRIX_EBICSA, csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
 242
 243         /* enable pin */
 244         if (gpio_is_valid(data->enable_pin))
 245                 at91_set_gpio_output(data->enable_pin, 1);
 246
 247         /* ready/busy pin */
 248         if (gpio_is_valid(data->rdy_pin))
 249                 at91_set_gpio_input(data->rdy_pin, 1);
 250
 251         /* card detect pin */
 252         if (gpio_is_valid(data->det_pin))
 253                 at91_set_gpio_input(data->det_pin, 1);
 254
 255         at91_set_A_periph(AT91_PIN_PC0, 0);             /* NANDOE */
 256         at91_set_A_periph(AT91_PIN_PC1, 0);             /* NANDWE */
 257
 258         nand_data = *data;
 259         platform_device_register(&atmel_nand_device);
 260 }
 261
 262 #else
 263 void __init at91_add_device_nand(struct atmel_nand_data *data) {}
 264 #endif
 265
 266
 267 /* --------------------------------------------------------------------
 268  *  TWI (i2c)
 269  * -------------------------------------------------------------------- */
 270
 271 /*
 272  * Prefer the GPIO code since the TWI controller isn't robust
 273  * (gets overruns and underruns under load) and can only issue
 274  * repeated STARTs in one scenario (the driver doesn't yet handle them).
 275  */
 276 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
 277
 278 static struct i2c_gpio_platform_data pdata = {
 279         .sda_pin                = AT91_PIN_PA7,
 280         .sda_is_open_drain      = 1,
 281         .scl_pin                = AT91_PIN_PA8,
 282         .scl_is_open_drain      = 1,
 283         .udelay                 = 2,            /* ~100 kHz */
 284 };
 285
 286 static struct platform_device at91sam9261_twi_device = {
 287         .name                   = "i2c-gpio",
 288         .id                     = -1,
 289         .dev.platform_data      = &pdata,
 290 };
 291
 292 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 293 {
 294         at91_set_GPIO_periph(AT91_PIN_PA7, 1);          /* TWD (SDA) */
 295         at91_set_multi_drive(AT91_PIN_PA7, 1);
 296
 297         at91_set_GPIO_periph(AT91_PIN_PA8, 1);          /* TWCK (SCL) */
 298         at91_set_multi_drive(AT91_PIN_PA8, 1);
 299
 300         i2c_register_board_info(0, devices, nr_devices);
 301         platform_device_register(&at91sam9261_twi_device);
 302 }
 303
 304 #elif defined(CONFIG_I2C_AT91) || defined(CONFIG_I2C_AT91_MODULE)
 305
 306 static struct resource twi_resources[] = {
 307         [0] = {
 308                 .start  = AT91SAM9261_BASE_TWI,
 309                 .end    = AT91SAM9261_BASE_TWI + SZ_16K - 1,
 310                 .flags  = IORESOURCE_MEM,
 311         },
 312         [1] = {
 313                 .start  = AT91SAM9261_ID_TWI,
 314                 .end    = AT91SAM9261_ID_TWI,
 315                 .flags  = IORESOURCE_IRQ,
 316         },
 317 };
 318
 319 static struct platform_device at91sam9261_twi_device = {
 320         .name           = "at91_i2c",
 321         .id             = -1,
 322         .resource       = twi_resources,
 323         .num_resources  = ARRAY_SIZE(twi_resources),
 324 };
 325
 326 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices)
 327 {
 328         /* pins used for TWI interface */
 329         at91_set_A_periph(AT91_PIN_PA7, 0);             /* TWD */
 330         at91_set_multi_drive(AT91_PIN_PA7, 1);
 331
 332         at91_set_A_periph(AT91_PIN_PA8, 0);             /* TWCK */
 333         at91_set_multi_drive(AT91_PIN_PA8, 1);
 334
 335         i2c_register_board_info(0, devices, nr_devices);
 336         platform_device_register(&at91sam9261_twi_device);
 337 }
 338 #else
 339 void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices) {}
 340 #endif
 341
 342
 343 /* --------------------------------------------------------------------
 344  *  SPI
 345  * -------------------------------------------------------------------- */
 346
 347 #if defined(CONFIG_SPI_ATMEL) || defined(CONFIG_SPI_ATMEL_MODULE)
 348 static u64 spi_dmamask = DMA_BIT_MASK(32);
 349
 350 static struct resource spi0_resources[] = {
 351         [0] = {
 352                 .start  = AT91SAM9261_BASE_SPI0,
 353                 .end    = AT91SAM9261_BASE_SPI0 + SZ_16K - 1,
 354                 .flags  = IORESOURCE_MEM,
 355         },
 356         [1] = {
 357                 .start  = AT91SAM9261_ID_SPI0,
 358                 .end    = AT91SAM9261_ID_SPI0,
 359                 .flags  = IORESOURCE_IRQ,
 360         },
 361 };
 362
 363 static struct platform_device at91sam9261_spi0_device = {
 364         .name           = "atmel_spi",
 365         .id             = 0,
 366         .dev            = {
 367                                 .dma_mask               = &spi_dmamask,
 368                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 369         },
 370         .resource       = spi0_resources,
 371         .num_resources  = ARRAY_SIZE(spi0_resources),
 372 };
 373
 374 static const unsigned spi0_standard_cs[4] = { AT91_PIN_PA3, AT91_PIN_PA4, AT91_PIN_PA5, AT91_PIN_PA6 };
 375
 376 static struct resource spi1_resources[] = {
 377         [0] = {
 378                 .start  = AT91SAM9261_BASE_SPI1,
 379                 .end    = AT91SAM9261_BASE_SPI1 + SZ_16K - 1,
 380                 .flags  = IORESOURCE_MEM,
 381         },
 382         [1] = {
 383                 .start  = AT91SAM9261_ID_SPI1,
 384                 .end    = AT91SAM9261_ID_SPI1,
 385                 .flags  = IORESOURCE_IRQ,
 386         },
 387 };
 388
 389 static struct platform_device at91sam9261_spi1_device = {
 390         .name           = "atmel_spi",
 391         .id             = 1,
 392         .dev            = {
 393                                 .dma_mask               = &spi_dmamask,
 394                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 395         },
 396         .resource       = spi1_resources,
 397         .num_resources  = ARRAY_SIZE(spi1_resources),
 398 };
 399
 400 static const unsigned spi1_standard_cs[4] = { AT91_PIN_PB28, AT91_PIN_PA24, AT91_PIN_PA25, AT91_PIN_PA26 };
 401
 402 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
 403 {
 404         int i;
 405         unsigned long cs_pin;
 406         short enable_spi0 = 0;
 407         short enable_spi1 = 0;
 408
 409         /* Choose SPI chip-selects */
 410         for (i = 0; i < nr_devices; i++) {
 411                 if (devices[i].controller_data)
 412                         cs_pin = (unsigned long) devices[i].controller_data;
 413                 else if (devices[i].bus_num == 0)
 414                         cs_pin = spi0_standard_cs[devices[i].chip_select];
 415                 else
 416                         cs_pin = spi1_standard_cs[devices[i].chip_select];
 417
 418                 if (devices[i].bus_num == 0)
 419                         enable_spi0 = 1;
 420                 else
 421                         enable_spi1 = 1;
 422
 423                 /* enable chip-select pin */
 424                 at91_set_gpio_output(cs_pin, 1);
 425
 426                 /* pass chip-select pin to driver */
 427                 devices[i].controller_data = (void *) cs_pin;
 428         }
 429
 430         spi_register_board_info(devices, nr_devices);
 431
 432         /* Configure SPI bus(es) */
 433         if (enable_spi0) {
 434                 at91_set_A_periph(AT91_PIN_PA0, 0);     /* SPI0_MISO */
 435                 at91_set_A_periph(AT91_PIN_PA1, 0);     /* SPI0_MOSI */
 436                 at91_set_A_periph(AT91_PIN_PA2, 0);     /* SPI0_SPCK */
 437
 438                 platform_device_register(&at91sam9261_spi0_device);
 439         }
 440         if (enable_spi1) {
 441                 at91_set_A_periph(AT91_PIN_PB30, 0);    /* SPI1_MISO */
 442                 at91_set_A_periph(AT91_PIN_PB31, 0);    /* SPI1_MOSI */
 443                 at91_set_A_periph(AT91_PIN_PB29, 0);    /* SPI1_SPCK */
 444
 445                 platform_device_register(&at91sam9261_spi1_device);
 446         }
 447 }
 448 #else
 449 void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices) {}
 450 #endif
 451
 452
 453 /* --------------------------------------------------------------------
 454  *  LCD Controller
 455  * -------------------------------------------------------------------- */
 456
 457 #if defined(CONFIG_FB_ATMEL) || defined(CONFIG_FB_ATMEL_MODULE)
 458 static u64 lcdc_dmamask = DMA_BIT_MASK(32);
 459 static struct atmel_lcdfb_info lcdc_data;
 460
 461 static struct resource lcdc_resources[] = {
 462         [0] = {
 463                 .start  = AT91SAM9261_LCDC_BASE,
 464                 .end    = AT91SAM9261_LCDC_BASE + SZ_4K - 1,
 465                 .flags  = IORESOURCE_MEM,
 466         },
 467         [1] = {
 468                 .start  = AT91SAM9261_ID_LCDC,
 469                 .end    = AT91SAM9261_ID_LCDC,
 470                 .flags  = IORESOURCE_IRQ,
 471         },
 472 #if defined(CONFIG_FB_INTSRAM)
 473         [2] = {
 474                 .start  = AT91SAM9261_SRAM_BASE,
 475                 .end    = AT91SAM9261_SRAM_BASE + AT91SAM9261_SRAM_SIZE - 1,
 476                 .flags  = IORESOURCE_MEM,
 477         },
 478 #endif
 479 };
 480
 481 static struct platform_device at91_lcdc_device = {
 482         .name           = "atmel_lcdfb",
 483         .id             = 0,
 484         .dev            = {
 485                                 .dma_mask               = &lcdc_dmamask,
 486                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 487                                 .platform_data          = &lcdc_data,
 488         },
 489         .resource       = lcdc_resources,
 490         .num_resources  = ARRAY_SIZE(lcdc_resources),
 491 };
 492
 493 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data)
 494 {
 495         if (!data) {
 496                 return;
 497         }
 498
 499 #if defined(CONFIG_FB_ATMEL_STN)
 500         at91_set_A_periph(AT91_PIN_PB0, 0);     /* LCDVSYNC */
 501         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
 502         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
 503         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
 504         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
 505         at91_set_A_periph(AT91_PIN_PB5, 0);     /* LCDD0 */
 506         at91_set_A_periph(AT91_PIN_PB6, 0);     /* LCDD1 */
 507         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
 508         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
 509 #else
 510         at91_set_A_periph(AT91_PIN_PB1, 0);     /* LCDHSYNC */
 511         at91_set_A_periph(AT91_PIN_PB2, 0);     /* LCDDOTCK */
 512         at91_set_A_periph(AT91_PIN_PB3, 0);     /* LCDDEN */
 513         at91_set_A_periph(AT91_PIN_PB4, 0);     /* LCDCC */
 514         at91_set_A_periph(AT91_PIN_PB7, 0);     /* LCDD2 */
 515         at91_set_A_periph(AT91_PIN_PB8, 0);     /* LCDD3 */
 516         at91_set_A_periph(AT91_PIN_PB9, 0);     /* LCDD4 */
 517         at91_set_A_periph(AT91_PIN_PB10, 0);    /* LCDD5 */
 518         at91_set_A_periph(AT91_PIN_PB11, 0);    /* LCDD6 */
 519         at91_set_A_periph(AT91_PIN_PB12, 0);    /* LCDD7 */
 520         at91_set_A_periph(AT91_PIN_PB15, 0);    /* LCDD10 */
 521         at91_set_A_periph(AT91_PIN_PB16, 0);    /* LCDD11 */
 522         at91_set_A_periph(AT91_PIN_PB17, 0);    /* LCDD12 */
 523         at91_set_A_periph(AT91_PIN_PB18, 0);    /* LCDD13 */
 524         at91_set_A_periph(AT91_PIN_PB19, 0);    /* LCDD14 */
 525         at91_set_A_periph(AT91_PIN_PB20, 0);    /* LCDD15 */
 526         at91_set_B_periph(AT91_PIN_PB23, 0);    /* LCDD18 */
 527         at91_set_B_periph(AT91_PIN_PB24, 0);    /* LCDD19 */
 528         at91_set_B_periph(AT91_PIN_PB25, 0);    /* LCDD20 */
 529         at91_set_B_periph(AT91_PIN_PB26, 0);    /* LCDD21 */
 530         at91_set_B_periph(AT91_PIN_PB27, 0);    /* LCDD22 */
 531         at91_set_B_periph(AT91_PIN_PB28, 0);    /* LCDD23 */
 532 #endif
 533
 534         if (ARRAY_SIZE(lcdc_resources) > 2) {
 535                 void __iomem *fb;
 536                 struct resource *fb_res = &lcdc_resources[2];
 537                 size_t fb_len = resource_size(fb_res);
 538
 539                 fb = ioremap(fb_res->start, fb_len);
 540                 if (fb) {
 541                         memset(fb, 0, fb_len);
 542                         iounmap(fb);
 543                 }
 544         }
 545         lcdc_data = *data;
 546         platform_device_register(&at91_lcdc_device);
 547 }
 548 #else
 549 void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) {}
 550 #endif
 551
 552
 553 /* --------------------------------------------------------------------
 554  *  Timer/Counter block
 555  * -------------------------------------------------------------------- */
 556
 557 #ifdef CONFIG_ATMEL_TCLIB
 558
 559 static struct resource tcb_resources[] = {
 560         [0] = {
 561                 .start  = AT91SAM9261_BASE_TCB0,
 562                 .end    = AT91SAM9261_BASE_TCB0 + SZ_16K - 1,
 563                 .flags  = IORESOURCE_MEM,
 564         },
 565         [1] = {
 566                 .start  = AT91SAM9261_ID_TC0,
 567                 .end    = AT91SAM9261_ID_TC0,
 568                 .flags  = IORESOURCE_IRQ,
 569         },
 570         [2] = {
 571                 .start  = AT91SAM9261_ID_TC1,
 572                 .end    = AT91SAM9261_ID_TC1,
 573                 .flags  = IORESOURCE_IRQ,
 574         },
 575         [3] = {
 576                 .start  = AT91SAM9261_ID_TC2,
 577                 .end    = AT91SAM9261_ID_TC2,
 578                 .flags  = IORESOURCE_IRQ,
 579         },
 580 };
 581
 582 static struct platform_device at91sam9261_tcb_device = {
 583         .name           = "atmel_tcb",
 584         .id             = 0,
 585         .resource       = tcb_resources,
 586         .num_resources  = ARRAY_SIZE(tcb_resources),
 587 };
 588
 589 static void __init at91_add_device_tc(void)
 590 {
 591         platform_device_register(&at91sam9261_tcb_device);
 592 }
 593 #else
 594 static void __init at91_add_device_tc(void) { }
 595 #endif
 596
 597
 598 /* --------------------------------------------------------------------
 599  *  RTT
 600  * -------------------------------------------------------------------- */
 601
 602 static struct resource rtt_resources[] = {
 603         {
 604                 .start  = AT91SAM9261_BASE_RTT,
 605                 .end    = AT91SAM9261_BASE_RTT + SZ_16 - 1,
 606                 .flags  = IORESOURCE_MEM,
 607         }, {
 608                 .flags  = IORESOURCE_MEM,
 609         }
 610 };
 611
 612 static struct platform_device at91sam9261_rtt_device = {
 613         .name           = "at91_rtt",
 614         .id             = 0,
 615         .resource       = rtt_resources,
 616 };
 617
 618 #if IS_ENABLED(CONFIG_RTC_DRV_AT91SAM9)
 619 static void __init at91_add_device_rtt_rtc(void)
 620 {
 621         at91sam9261_rtt_device.name = "rtc-at91sam9";
 622         /*
 623          * The second resource is needed:
 624          * GPBR will serve as the storage for RTC time offset
 625          */
 626         at91sam9261_rtt_device.num_resources = 2;
 627         rtt_resources[1].start = AT91SAM9261_BASE_GPBR +
 628                                  4 * CONFIG_RTC_DRV_AT91SAM9_GPBR;
 629         rtt_resources[1].end = rtt_resources[1].start + 3;
 630 }
 631 #else
 632 static void __init at91_add_device_rtt_rtc(void)
 633 {
 634         /* Only one resource is needed: RTT not used as RTC */
 635         at91sam9261_rtt_device.num_resources = 1;
 636 }
 637 #endif
 638
 639 static void __init at91_add_device_rtt(void)
 640 {
 641         at91_add_device_rtt_rtc();
 642         platform_device_register(&at91sam9261_rtt_device);
 643 }
 644
 645
 646 /* --------------------------------------------------------------------
 647  *  Watchdog
 648  * -------------------------------------------------------------------- */
 649
 650 #if defined(CONFIG_AT91SAM9X_WATCHDOG) || defined(CONFIG_AT91SAM9X_WATCHDOG_MODULE)
 651 static struct resource wdt_resources[] = {
 652         {
 653                 .start  = AT91SAM9261_BASE_WDT,
 654                 .end    = AT91SAM9261_BASE_WDT + SZ_16 - 1,
 655                 .flags  = IORESOURCE_MEM,
 656         }
 657 };
 658
 659 static struct platform_device at91sam9261_wdt_device = {
 660         .name           = "at91_wdt",
 661         .id             = -1,
 662         .resource       = wdt_resources,
 663         .num_resources  = ARRAY_SIZE(wdt_resources),
 664 };
 665
 666 static void __init at91_add_device_watchdog(void)
 667 {
 668         platform_device_register(&at91sam9261_wdt_device);
 669 }
 670 #else
 671 static void __init at91_add_device_watchdog(void) {}
 672 #endif
 673
 674
 675 /* --------------------------------------------------------------------
 676  *  SSC -- Synchronous Serial Controller
 677  * -------------------------------------------------------------------- */
 678
 679 #if defined(CONFIG_ATMEL_SSC) || defined(CONFIG_ATMEL_SSC_MODULE)
 680 static u64 ssc0_dmamask = DMA_BIT_MASK(32);
 681
 682 static struct resource ssc0_resources[] = {
 683         [0] = {
 684                 .start  = AT91SAM9261_BASE_SSC0,
 685                 .end    = AT91SAM9261_BASE_SSC0 + SZ_16K - 1,
 686                 .flags  = IORESOURCE_MEM,
 687         },
 688         [1] = {
 689                 .start  = AT91SAM9261_ID_SSC0,
 690                 .end    = AT91SAM9261_ID_SSC0,
 691                 .flags  = IORESOURCE_IRQ,
 692         },
 693 };
 694
 695 static struct platform_device at91sam9261_ssc0_device = {
 696         .name   = "ssc",
 697         .id     = 0,
 698         .dev    = {
 699                 .dma_mask               = &ssc0_dmamask,
 700                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 701         },
 702         .resource       = ssc0_resources,
 703         .num_resources  = ARRAY_SIZE(ssc0_resources),
 704 };
 705
 706 static inline void configure_ssc0_pins(unsigned pins)
 707 {
 708         if (pins & ATMEL_SSC_TF)
 709                 at91_set_A_periph(AT91_PIN_PB21, 1);
 710         if (pins & ATMEL_SSC_TK)
 711                 at91_set_A_periph(AT91_PIN_PB22, 1);
 712         if (pins & ATMEL_SSC_TD)
 713                 at91_set_A_periph(AT91_PIN_PB23, 1);
 714         if (pins & ATMEL_SSC_RD)
 715                 at91_set_A_periph(AT91_PIN_PB24, 1);
 716         if (pins & ATMEL_SSC_RK)
 717                 at91_set_A_periph(AT91_PIN_PB25, 1);
 718         if (pins & ATMEL_SSC_RF)
 719                 at91_set_A_periph(AT91_PIN_PB26, 1);
 720 }
 721
 722 static u64 ssc1_dmamask = DMA_BIT_MASK(32);
 723
 724 static struct resource ssc1_resources[] = {
 725         [0] = {
 726                 .start  = AT91SAM9261_BASE_SSC1,
 727                 .end    = AT91SAM9261_BASE_SSC1 + SZ_16K - 1,
 728                 .flags  = IORESOURCE_MEM,
 729         },
 730         [1] = {
 731                 .start  = AT91SAM9261_ID_SSC1,
 732                 .end    = AT91SAM9261_ID_SSC1,
 733                 .flags  = IORESOURCE_IRQ,
 734         },
 735 };
 736
 737 static struct platform_device at91sam9261_ssc1_device = {
 738         .name   = "ssc",
 739         .id     = 1,
 740         .dev    = {
 741                 .dma_mask               = &ssc1_dmamask,
 742                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 743         },
 744         .resource       = ssc1_resources,
 745         .num_resources  = ARRAY_SIZE(ssc1_resources),
 746 };
 747
 748 static inline void configure_ssc1_pins(unsigned pins)
 749 {
 750         if (pins & ATMEL_SSC_TF)
 751                 at91_set_B_periph(AT91_PIN_PA17, 1);
 752         if (pins & ATMEL_SSC_TK)
 753                 at91_set_B_periph(AT91_PIN_PA18, 1);
 754         if (pins & ATMEL_SSC_TD)
 755                 at91_set_B_periph(AT91_PIN_PA19, 1);
 756         if (pins & ATMEL_SSC_RD)
 757                 at91_set_B_periph(AT91_PIN_PA20, 1);
 758         if (pins & ATMEL_SSC_RK)
 759                 at91_set_B_periph(AT91_PIN_PA21, 1);
 760         if (pins & ATMEL_SSC_RF)
 761                 at91_set_B_periph(AT91_PIN_PA22, 1);
 762 }
 763
 764 static u64 ssc2_dmamask = DMA_BIT_MASK(32);
 765
 766 static struct resource ssc2_resources[] = {
 767         [0] = {
 768                 .start  = AT91SAM9261_BASE_SSC2,
 769                 .end    = AT91SAM9261_BASE_SSC2 + SZ_16K - 1,
 770                 .flags  = IORESOURCE_MEM,
 771         },
 772         [1] = {
 773                 .start  = AT91SAM9261_ID_SSC2,
 774                 .end    = AT91SAM9261_ID_SSC2,
 775                 .flags  = IORESOURCE_IRQ,
 776         },
 777 };
 778
 779 static struct platform_device at91sam9261_ssc2_device = {
 780         .name   = "ssc",
 781         .id     = 2,
 782         .dev    = {
 783                 .dma_mask               = &ssc2_dmamask,
 784                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 785         },
 786         .resource       = ssc2_resources,
 787         .num_resources  = ARRAY_SIZE(ssc2_resources),
 788 };
 789
 790 static inline void configure_ssc2_pins(unsigned pins)
 791 {
 792         if (pins & ATMEL_SSC_TF)
 793                 at91_set_B_periph(AT91_PIN_PC25, 1);
 794         if (pins & ATMEL_SSC_TK)
 795                 at91_set_B_periph(AT91_PIN_PC26, 1);
 796         if (pins & ATMEL_SSC_TD)
 797                 at91_set_B_periph(AT91_PIN_PC27, 1);
 798         if (pins & ATMEL_SSC_RD)
 799                 at91_set_B_periph(AT91_PIN_PC28, 1);
 800         if (pins & ATMEL_SSC_RK)
 801                 at91_set_B_periph(AT91_PIN_PC29, 1);
 802         if (pins & ATMEL_SSC_RF)
 803                 at91_set_B_periph(AT91_PIN_PC30, 1);
 804 }
 805
 806 /*
 807  * SSC controllers are accessed through library code, instead of any
 808  * kind of all-singing/all-dancing driver.  For example one could be
 809  * used by a particular I2S audio codec's driver, while another one
 810  * on the same system might be used by a custom data capture driver.
 811  */
 812 void __init at91_add_device_ssc(unsigned id, unsigned pins)
 813 {
 814         struct platform_device *pdev;
 815
 816         /*
 817          * NOTE: caller is responsible for passing information matching
 818          * "pins" to whatever will be using each particular controller.
 819          */
 820         switch (id) {
 821         case AT91SAM9261_ID_SSC0:
 822                 pdev = &at91sam9261_ssc0_device;
 823                 configure_ssc0_pins(pins);
 824                 break;
 825         case AT91SAM9261_ID_SSC1:
 826                 pdev = &at91sam9261_ssc1_device;
 827                 configure_ssc1_pins(pins);
 828                 break;
 829         case AT91SAM9261_ID_SSC2:
 830                 pdev = &at91sam9261_ssc2_device;
 831                 configure_ssc2_pins(pins);
 832                 break;
 833         default:
 834                 return;
 835         }
 836
 837         platform_device_register(pdev);
 838 }
 839
 840 #else
 841 void __init at91_add_device_ssc(unsigned id, unsigned pins) {}
 842 #endif
 843
 844
 845 /* --------------------------------------------------------------------
 846  *  UART
 847  * -------------------------------------------------------------------- */
 848
 849 #if defined(CONFIG_SERIAL_ATMEL)
 850 static struct resource dbgu_resources[] = {
 851         [0] = {
 852                 .start  = AT91SAM9261_BASE_DBGU,
 853                 .end    = AT91SAM9261_BASE_DBGU + SZ_512 - 1,
 854                 .flags  = IORESOURCE_MEM,
 855         },
 856         [1] = {
 857                 .start  = AT91_ID_SYS,
 858                 .end    = AT91_ID_SYS,
 859                 .flags  = IORESOURCE_IRQ,
 860         },
 861 };
 862
 863 static struct atmel_uart_data dbgu_data = {
 864         .use_dma_tx     = 0,
 865         .use_dma_rx     = 0,            /* DBGU not capable of receive DMA */
 866 };
 867
 868 static u64 dbgu_dmamask = DMA_BIT_MASK(32);
 869
 870 static struct platform_device at91sam9261_dbgu_device = {
 871         .name           = "atmel_usart",
 872         .id             = 0,
 873         .dev            = {
 874                                 .dma_mask               = &dbgu_dmamask,
 875                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 876                                 .platform_data          = &dbgu_data,
 877         },
 878         .resource       = dbgu_resources,
 879         .num_resources  = ARRAY_SIZE(dbgu_resources),
 880 };
 881
 882 static inline void configure_dbgu_pins(void)
 883 {
 884         at91_set_A_periph(AT91_PIN_PA9, 0);             /* DRXD */
 885         at91_set_A_periph(AT91_PIN_PA10, 1);            /* DTXD */
 886 }
 887
 888 static struct resource uart0_resources[] = {
 889         [0] = {
 890                 .start  = AT91SAM9261_BASE_US0,
 891                 .end    = AT91SAM9261_BASE_US0 + SZ_16K - 1,
 892                 .flags  = IORESOURCE_MEM,
 893         },
 894         [1] = {
 895                 .start  = AT91SAM9261_ID_US0,
 896                 .end    = AT91SAM9261_ID_US0,
 897                 .flags  = IORESOURCE_IRQ,
 898         },
 899 };
 900
 901 static struct atmel_uart_data uart0_data = {
 902         .use_dma_tx     = 1,
 903         .use_dma_rx     = 1,
 904 };
 905
 906 static u64 uart0_dmamask = DMA_BIT_MASK(32);
 907
 908 static struct platform_device at91sam9261_uart0_device = {
 909         .name           = "atmel_usart",
 910         .id             = 1,
 911         .dev            = {
 912                                 .dma_mask               = &uart0_dmamask,
 913                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 914                                 .platform_data          = &uart0_data,
 915         },
 916         .resource       = uart0_resources,
 917         .num_resources  = ARRAY_SIZE(uart0_resources),
 918 };
 919
 920 static inline void configure_usart0_pins(unsigned pins)
 921 {
 922         at91_set_A_periph(AT91_PIN_PC8, 1);             /* TXD0 */
 923         at91_set_A_periph(AT91_PIN_PC9, 0);             /* RXD0 */
 924
 925         if (pins & ATMEL_UART_RTS)
 926                 at91_set_A_periph(AT91_PIN_PC10, 0);    /* RTS0 */
 927         if (pins & ATMEL_UART_CTS)
 928                 at91_set_A_periph(AT91_PIN_PC11, 0);    /* CTS0 */
 929 }
 930
 931 static struct resource uart1_resources[] = {
 932         [0] = {
 933                 .start  = AT91SAM9261_BASE_US1,
 934                 .end    = AT91SAM9261_BASE_US1 + SZ_16K - 1,
 935                 .flags  = IORESOURCE_MEM,
 936         },
 937         [1] = {
 938                 .start  = AT91SAM9261_ID_US1,
 939                 .end    = AT91SAM9261_ID_US1,
 940                 .flags  = IORESOURCE_IRQ,
 941         },
 942 };
 943
 944 static struct atmel_uart_data uart1_data = {
 945         .use_dma_tx     = 1,
 946         .use_dma_rx     = 1,
 947 };
 948
 949 static u64 uart1_dmamask = DMA_BIT_MASK(32);
 950
 951 static struct platform_device at91sam9261_uart1_device = {
 952         .name           = "atmel_usart",
 953         .id             = 2,
 954         .dev            = {
 955                                 .dma_mask               = &uart1_dmamask,
 956                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
 957                                 .platform_data          = &uart1_data,
 958         },
 959         .resource       = uart1_resources,
 960         .num_resources  = ARRAY_SIZE(uart1_resources),
 961 };
 962
 963 static inline void configure_usart1_pins(unsigned pins)
 964 {
 965         at91_set_A_periph(AT91_PIN_PC12, 1);            /* TXD1 */
 966         at91_set_A_periph(AT91_PIN_PC13, 0);            /* RXD1 */
 967
 968         if (pins & ATMEL_UART_RTS)
 969                 at91_set_B_periph(AT91_PIN_PA12, 0);    /* RTS1 */
 970         if (pins & ATMEL_UART_CTS)
 971                 at91_set_B_periph(AT91_PIN_PA13, 0);    /* CTS1 */
 972 }
 973
 974 static struct resource uart2_resources[] = {
 975         [0] = {
 976                 .start  = AT91SAM9261_BASE_US2,
 977                 .end    = AT91SAM9261_BASE_US2 + SZ_16K - 1,
 978                 .flags  = IORESOURCE_MEM,
 979         },
 980         [1] = {
 981                 .start  = AT91SAM9261_ID_US2,
 982                 .end    = AT91SAM9261_ID_US2,
 983                 .flags  = IORESOURCE_IRQ,
 984         },
 985 };
 986
 987 static struct atmel_uart_data uart2_data = {
 988         .use_dma_tx     = 1,
 989         .use_dma_rx     = 1,
 990 };
 991
 992 static u64 uart2_dmamask = DMA_BIT_MASK(32);
 993
 994 static struct platform_device at91sam9261_uart2_device = {
 995         .name           = "atmel_usart",
 996         .id             = 3,
 997         .dev            = {
 998                                 .dma_mask               = &uart2_dmamask,
 999                                 .coherent_dma_mask      = DMA_BIT_MASK(32),
1000                                 .platform_data          = &uart2_data,
1001         },
1002         .resource       = uart2_resources,
1003         .num_resources  = ARRAY_SIZE(uart2_resources),
1004 };
1005
1006 static inline void configure_usart2_pins(unsigned pins)
1007 {
1008         at91_set_A_periph(AT91_PIN_PC15, 0);            /* RXD2 */
1009         at91_set_A_periph(AT91_PIN_PC14, 1);            /* TXD2 */
1010
1011         if (pins & ATMEL_UART_RTS)
1012                 at91_set_B_periph(AT91_PIN_PA15, 0);    /* RTS2*/
1013         if (pins & ATMEL_UART_CTS)
1014                 at91_set_B_periph(AT91_PIN_PA16, 0);    /* CTS2 */
1015 }
1016
1017 static struct platform_device *__initdata at91_uarts[ATMEL_MAX_UART];   /* the UARTs to use */
1018
1019 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
1020 {
1021         struct platform_device *pdev;
1022         struct atmel_uart_data *pdata;
1023
1024         switch (id) {
1025                 case 0:         /* DBGU */
1026                         pdev = &at91sam9261_dbgu_device;
1027                         configure_dbgu_pins();
1028                         break;
1029                 case AT91SAM9261_ID_US0:
1030                         pdev = &at91sam9261_uart0_device;
1031                         configure_usart0_pins(pins);
1032                         break;
1033                 case AT91SAM9261_ID_US1:
1034                         pdev = &at91sam9261_uart1_device;
1035                         configure_usart1_pins(pins);
1036                         break;
1037                 case AT91SAM9261_ID_US2:
1038                         pdev = &at91sam9261_uart2_device;
1039                         configure_usart2_pins(pins);
1040                         break;
1041                 default:
1042                         return;
1043         }
1044         pdata = pdev->dev.platform_data;
1045         pdata->num = portnr;            /* update to mapped ID */
1046
1047         if (portnr < ATMEL_MAX_UART)
1048                 at91_uarts[portnr] = pdev;
1049 }
1050
1051 void __init at91_set_serial_console(unsigned portnr)
1052 {
1053         if (portnr < ATMEL_MAX_UART) {
1054                 atmel_default_console_device = at91_uarts[portnr];
1055                 at91sam9261_set_console_clock(at91_uarts[portnr]->id);
1056         }
1057 }
1058
1059 void __init at91_add_device_serial(void)
1060 {
1061         int i;
1062
1063         for (i = 0; i < ATMEL_MAX_UART; i++) {
1064                 if (at91_uarts[i])
1065                         platform_device_register(at91_uarts[i]);
1066         }
1067
1068         if (!atmel_default_console_device)
1069                 printk(KERN_INFO "AT91: No default serial console defined.\n");
1070 }
1071 #else
1072 void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins) {}
1073 void __init at91_set_serial_console(unsigned portnr) {}
1074 void __init at91_add_device_serial(void) {}
1075 #endif
1076
1077
1078 /* -------------------------------------------------------------------- */
1079
1080 /*
1081  * These devices are always present and don't need any board-specific
1082  * setup.
1083  */
1084 static int __init at91_add_standard_devices(void)
1085 {
1086         at91_add_device_rtt();
1087         at91_add_device_watchdog();
1088         at91_add_device_tc();
1089         return 0;
1090 }
1091
1092 arch_initcall(at91_add_standard_devices);