sound/oss/i810_audio.c

   1 /*
   2  *      Intel i810 and friends ICH driver for Linux
   3  *      Alan Cox <alan@redhat.com>
   4  *
   5  *  Built from:
   6  *      Low level code:  Zach Brown (original nonworking i810 OSS driver)
   7  *                       Jaroslav Kysela <perex@suse.cz> (working ALSA driver)
   8  *
   9  *      Framework: Thomas Sailer <sailer@ife.ee.ethz.ch>
  10  *      Extended by: Zach Brown <zab@redhat.com>
  11  *                      and others..
  12  *
  13  *  Hardware Provided By:
  14  *      Analog Devices (A major AC97 codec maker)
  15  *      Intel Corp  (you've probably heard of them already)
  16  *
  17  *  AC97 clues and assistance provided by
  18  *      Analog Devices
  19  *      Zach 'Fufu' Brown
  20  *      Jeff Garzik
  21  *
  22  *      This program is free software; you can redistribute it and/or modify
  23  *      it under the terms of the GNU General Public License as published by
  24  *      the Free Software Foundation; either version 2 of the License, or
  25  *      (at your option) any later version.
  26  *
  27  *      This program is distributed in the hope that it will be useful,
  28  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  29  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  30  *      GNU General Public License for more details.
  31  *
  32  *      You should have received a copy of the GNU General Public License
  33  *      along with this program; if not, write to the Free Software
  34  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  35  *
  36  *
  37  *      Intel 810 theory of operation
  38  *
  39  *      The chipset provides three DMA channels that talk to an AC97
  40  *      CODEC (AC97 is a digital/analog mixer standard). At its simplest
  41  *      you get 48Khz audio with basic volume and mixer controls. At the
  42  *      best you get rate adaption in the codec. We set the card up so
  43  *      that we never take completion interrupts but instead keep the card
  44  *      chasing its tail around a ring buffer. This is needed for mmap
  45  *      mode audio and happens to work rather well for non-mmap modes too.
  46  *
  47  *      The board has one output channel for PCM audio (supported) and
  48  *      a stereo line in and mono microphone input. Again these are normally
  49  *      locked to 48Khz only. Right now recording is not finished.
  50  *
  51  *      There is no midi support, no synth support. Use timidity. To get
  52  *      esd working you need to use esd -r 48000 as it won't probe 48KHz
  53  *      by default. mpg123 can't handle 48Khz only audio so use xmms.
  54  *
  55  *      Fix The Sound On Dell
  56  *
  57  *      Not everyone uses 48KHz. We know of no way to detect this reliably
  58  *      and certainly not to get the right data. If your i810 audio sounds
  59  *      stupid you may need to investigate other speeds. According to Analog
  60  *      they tend to use a 14.318MHz clock which gives you a base rate of
  61  *      41194Hz.
  62  *
  63  *      This is available via the 'ftsodell=1' option.
  64  *
  65  *      If you need to force a specific rate set the clocking= option
  66  *
  67  *      This driver is cursed. (Ben LaHaise)
  68  *
  69  *  ICH 3 caveats
  70  *      Intel errata #7 for ICH3 IO. We need to disable SMI stuff
  71  *      when codec probing. [Not Yet Done]
  72  *
  73  *  ICH 4 caveats
  74  *
  75  *      The ICH4 has the feature, that the codec ID doesn't have to be
  76  *      congruent with the IO connection.
  77  *
  78  *      Therefore, from driver version 0.23 on, there is a "codec ID" <->
  79  *      "IO register base offset" mapping (card->ac97_id_map) field.
  80  *
  81  *      Juergen "George" Sawinski (jsaw)
  82  */
  83
  84 #include <linux/module.h>
  85 #include <linux/string.h>
  86 #include <linux/ctype.h>
  87 #include <linux/ioport.h>
  88 #include <linux/sched.h>
  89 #include <linux/delay.h>
  90 #include <linux/sound.h>
  91 #include <linux/slab.h>
  92 #include <linux/soundcard.h>
  93 #include <linux/pci.h>
  94 #include <linux/interrupt.h>
  95 #include <asm/io.h>
  96 #include <asm/dma.h>
  97 #include <linux/init.h>
  98 #include <linux/poll.h>
  99 #include <linux/spinlock.h>
 100 #include <linux/smp_lock.h>
 101 #include <linux/ac97_codec.h>
 102 #include <asm/uaccess.h>
 103 #include <asm/hardirq.h>
 104
 105 #ifndef PCI_DEVICE_ID_INTEL_82801
 106 #define PCI_DEVICE_ID_INTEL_82801       0x2415
 107 #endif
 108 #ifndef PCI_DEVICE_ID_INTEL_82901
 109 #define PCI_DEVICE_ID_INTEL_82901       0x2425
 110 #endif
 111 #ifndef PCI_DEVICE_ID_INTEL_ICH2
 112 #define PCI_DEVICE_ID_INTEL_ICH2        0x2445
 113 #endif
 114 #ifndef PCI_DEVICE_ID_INTEL_ICH3
 115 #define PCI_DEVICE_ID_INTEL_ICH3        0x2485
 116 #endif
 117 #ifndef PCI_DEVICE_ID_INTEL_ICH4
 118 #define PCI_DEVICE_ID_INTEL_ICH4        0x24c5
 119 #endif
 120 #ifndef PCI_DEVICE_ID_INTEL_ICH5
 121 #define PCI_DEVICE_ID_INTEL_ICH5        0x24d5
 122 #endif
 123 #ifndef PCI_DEVICE_ID_INTEL_440MX
 124 #define PCI_DEVICE_ID_INTEL_440MX       0x7195
 125 #endif
 126 #ifndef PCI_DEVICE_ID_SI_7012
 127 #define PCI_DEVICE_ID_SI_7012           0x7012
 128 #endif
 129 #ifndef PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO
 130 #define PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO 0x01b1
 131 #endif
 132 #ifndef PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO
 133 #define PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO 0x006a
 134 #endif
 135 #ifndef PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO
 136 #define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
 137 #endif
 138 #ifndef PCI_DEVICE_ID_AMD_768_AUDIO
 139 #define PCI_DEVICE_ID_AMD_768_AUDIO     0x7445
 140 #endif
 141 #ifndef PCI_DEVICE_ID_AMD_8111_AC97
 142 #define PCI_DEVICE_ID_AMD_8111_AC97     0x746d
 143 #endif
 144
 145 static int ftsodell=0;
 146 static int strict_clocking=0;
 147 static unsigned int clocking=0;
 148 static int spdif_locked=0;
 149
 150 //#define DEBUG
 151 //#define DEBUG2
 152 //#define DEBUG_INTERRUPTS
 153 //#define DEBUG_MMAP
 154 //#define DEBUG_MMIO
 155
 156 #define ADC_RUNNING     1
 157 #define DAC_RUNNING     2
 158
 159 #define I810_FMT_16BIT  1
 160 #define I810_FMT_STEREO 2
 161 #define I810_FMT_MASK   3
 162
 163 #define SPDIF_ON        0x0004
 164 #define SURR_ON         0x0010
 165 #define CENTER_LFE_ON   0x0020
 166 #define VOL_MUTED       0x8000
 167
 168 /* the 810's array of pointers to data buffers */
 169
 170 struct sg_item {
 171 #define BUSADDR_MASK    0xFFFFFFFE
 172         u32 busaddr;
 173 #define CON_IOC         0x80000000 /* interrupt on completion */
 174 #define CON_BUFPAD      0x40000000 /* pad underrun with last sample, else 0 */
 175 #define CON_BUFLEN_MASK 0x0000ffff /* buffer length in samples */
 176         u32 control;
 177 };
 178
 179 /* an instance of the i810 channel */
 180 #define SG_LEN 32
 181 struct i810_channel
 182 {
 183         /* these sg guys should probably be allocated
 184            separately as nocache. Must be 8 byte aligned */
 185         struct sg_item sg[SG_LEN];      /* 32*8 */
 186         u32 offset;                     /* 4 */
 187         u32 port;                       /* 4 */
 188         u32 used;
 189         u32 num;
 190 };
 191
 192 /*
 193  * we have 3 separate dma engines.  pcm in, pcm out, and mic.
 194  * each dma engine has controlling registers.  These goofy
 195  * names are from the datasheet, but make it easy to write
 196  * code while leafing through it.
 197  *
 198  * ICH4 has 6 dma engines, pcm in, pcm out, mic, pcm in 2,
 199  * mic in 2, s/pdif.   Of special interest is the fact that
 200  * the upper 3 DMA engines on the ICH4 *must* be accessed
 201  * via mmio access instead of pio access.
 202  */
 203
 204 #define ENUM_ENGINE(PRE,DIG)                                                                    \
 205 enum {                                                                                          \
 206         PRE##_BDBAR =   0x##DIG##0,             /* Buffer Descriptor list Base Address */       \
 207         PRE##_CIV =     0x##DIG##4,             /* Current Index Value */                       \
 208         PRE##_LVI =     0x##DIG##5,             /* Last Valid Index */                          \
 209         PRE##_SR =      0x##DIG##6,             /* Status Register */                           \
 210         PRE##_PICB =    0x##DIG##8,             /* Position In Current Buffer */                \
 211         PRE##_PIV =     0x##DIG##a,             /* Prefetched Index Value */                    \
 212         PRE##_CR =      0x##DIG##b              /* Control Register */                          \
 213 }
 214
 215 ENUM_ENGINE(OFF,0);     /* Offsets */
 216 ENUM_ENGINE(PI,0);      /* PCM In */
 217 ENUM_ENGINE(PO,1);      /* PCM Out */
 218 ENUM_ENGINE(MC,2);      /* Mic In */
 219
 220 enum {
 221         GLOB_CNT =      0x2c,                   /* Global Control */
 222         GLOB_STA =      0x30,                   /* Global Status */
 223         CAS      =      0x34                    /* Codec Write Semaphore Register */
 224 };
 225
 226 ENUM_ENGINE(MC2,4);     /* Mic In 2 */
 227 ENUM_ENGINE(PI2,5);     /* PCM In 2 */
 228 ENUM_ENGINE(SP,6);      /* S/PDIF */
 229
 230 enum {
 231         SDM =           0x80                    /* SDATA_IN Map Register */
 232 };
 233
 234 /* interrupts for a dma engine */
 235 #define DMA_INT_FIFO            (1<<4)  /* fifo under/over flow */
 236 #define DMA_INT_COMPLETE        (1<<3)  /* buffer read/write complete and ioc set */
 237 #define DMA_INT_LVI             (1<<2)  /* last valid done */
 238 #define DMA_INT_CELV            (1<<1)  /* last valid is current */
 239 #define DMA_INT_DCH             (1)     /* DMA Controller Halted (happens on LVI interrupts) */
 240 #define DMA_INT_MASK (DMA_INT_FIFO|DMA_INT_COMPLETE|DMA_INT_LVI)
 241
 242 /* interrupts for the whole chip */
 243 #define INT_SEC         (1<<11)
 244 #define INT_PRI         (1<<10)
 245 #define INT_MC          (1<<7)
 246 #define INT_PO          (1<<6)
 247 #define INT_PI          (1<<5)
 248 #define INT_MO          (1<<2)
 249 #define INT_NI          (1<<1)
 250 #define INT_GPI         (1<<0)
 251 #define INT_MASK (INT_SEC|INT_PRI|INT_MC|INT_PO|INT_PI|INT_MO|INT_NI|INT_GPI)
 252
 253 #define DRIVER_VERSION "0.24"
 254
 255 /* magic numbers to protect our data structures */
 256 #define I810_CARD_MAGIC         0x5072696E /* "Prin" */
 257 #define I810_STATE_MAGIC        0x63657373 /* "cess" */
 258 #define I810_DMA_MASK           0xffffffff /* DMA buffer mask for pci_alloc_consist */
 259 #define NR_HW_CH                3
 260
 261 /* maxinum number of AC97 codecs connected, AC97 2.0 defined 4 */
 262 #define NR_AC97                 4
 263
 264 /* Please note that an 8bit mono stream is not valid on this card, you must have a 16bit */
 265 /* stream at a minimum for this card to be happy */
 266 static const unsigned sample_size[] = { 1, 2, 2, 4 };
 267 /* Samples are 16bit values, so we are shifting to a word, not to a byte, hence shift */
 268 /* values are one less than might be expected */
 269 static const unsigned sample_shift[] = { -1, 0, 0, 1 };
 270
 271 enum {
 272         ICH82801AA = 0,
 273         ICH82901AB,
 274         INTEL440MX,
 275         INTELICH2,
 276         INTELICH3,
 277         INTELICH4,
 278         INTELICH5,
 279         SI7012,
 280         NVIDIA_NFORCE,
 281         AMD768,
 282         AMD8111
 283 };
 284
 285 static char * card_names[] = {
 286         "Intel ICH 82801AA",
 287         "Intel ICH 82901AB",
 288         "Intel 440MX",
 289         "Intel ICH2",
 290         "Intel ICH3",
 291         "Intel ICH4",
 292         "Intel ICH5",
 293         "SiS 7012",
 294         "NVIDIA nForce Audio",
 295         "AMD 768",
 296         "AMD-8111 IOHub"
 297 };
 298
 299 /* These are capabilities (and bugs) the chipsets _can_ have */
 300 static struct {
 301         int16_t      nr_ac97;
 302 #define CAP_MMIO                 0x0001
 303 #define CAP_20BIT_AUDIO_SUPPORT  0x0002
 304         u_int16_t flags;
 305 } card_cap[] = {
 306         {  1, 0x0000 }, /* ICH82801AA */
 307         {  1, 0x0000 }, /* ICH82901AB */
 308         {  1, 0x0000 }, /* INTEL440MX */
 309         {  1, 0x0000 }, /* INTELICH2 */
 310         {  2, 0x0000 }, /* INTELICH3 */
 311         {  3, 0x0003 }, /* INTELICH4 */
 312         {  3, 0x0003 }, /* INTELICH5 */
 313         /*@FIXME to be verified*/       {  2, 0x0000 }, /* SI7012 */
 314         /*@FIXME to be verified*/       {  2, 0x0000 }, /* NVIDIA_NFORCE */
 315         /*@FIXME to be verified*/       {  2, 0x0000 }, /* AMD768 */
 316         /*@FIXME to be verified*/       {  3, 0x0001 }, /* AMD8111 */
 317 };
 318
 319 static struct pci_device_id i810_pci_tbl [] = {
 320         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801,
 321          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82801AA},
 322         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82901,
 323          PCI_ANY_ID, PCI_ANY_ID, 0, 0, ICH82901AB},
 324         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_440MX,
 325          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTEL440MX},
 326         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH2,
 327          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH2},
 328         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH3,
 329          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH3},
 330         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH4,
 331          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH4},
 332         {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH5,
 333          PCI_ANY_ID, PCI_ANY_ID, 0, 0, INTELICH5},
 334         {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7012,
 335          PCI_ANY_ID, PCI_ANY_ID, 0, 0, SI7012},
 336         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP1_AUDIO,
 337          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 338         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP2_AUDIO,
 339          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 340         {PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO,
 341          PCI_ANY_ID, PCI_ANY_ID, 0, 0, NVIDIA_NFORCE},
 342         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_768_AUDIO,
 343          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD768},
 344         {PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_AC97,
 345          PCI_ANY_ID, PCI_ANY_ID, 0, 0, AMD8111},
 346         {0,}
 347 };
 348
 349 MODULE_DEVICE_TABLE (pci, i810_pci_tbl);
 350
 351 #ifdef CONFIG_PM
 352 #define PM_SUSPENDED(card) (card->pm_suspended)
 353 #else
 354 #define PM_SUSPENDED(card) (0)
 355 #endif
 356
 357 /* "software" or virtual channel, an instance of opened /dev/dsp */
 358 struct i810_state {
 359         unsigned int magic;
 360         struct i810_card *card; /* Card info */
 361
 362         /* single open lock mechanism, only used for recording */
 363         struct semaphore open_sem;
 364         wait_queue_head_t open_wait;
 365
 366         /* file mode */
 367         mode_t open_mode;
 368
 369         /* virtual channel number */
 370         int virt;
 371
 372 #ifdef CONFIG_PM
 373         unsigned int pm_saved_dac_rate,pm_saved_adc_rate;
 374 #endif
 375         struct dmabuf {
 376                 /* wave sample stuff */
 377                 unsigned int rate;
 378                 unsigned char fmt, enable, trigger;
 379
 380                 /* hardware channel */
 381                 struct i810_channel *read_channel;
 382                 struct i810_channel *write_channel;
 383
 384                 /* OSS buffer management stuff */
 385                 void *rawbuf;
 386                 dma_addr_t dma_handle;
 387                 unsigned buforder;
 388                 unsigned numfrag;
 389                 unsigned fragshift;
 390
 391                 /* our buffer acts like a circular ring */
 392                 unsigned hwptr;         /* where dma last started, updated by update_ptr */
 393                 unsigned swptr;         /* where driver last clear/filled, updated by read/write */
 394                 int count;              /* bytes to be consumed or been generated by dma machine */
 395                 unsigned total_bytes;   /* total bytes dmaed by hardware */
 396
 397                 unsigned error;         /* number of over/underruns */
 398                 wait_queue_head_t wait; /* put process on wait queue when no more space in buffer */
 399
 400                 /* redundant, but makes calculations easier */
 401                 /* what the hardware uses */
 402                 unsigned dmasize;
 403                 unsigned fragsize;
 404                 unsigned fragsamples;
 405
 406                 /* what we tell the user to expect */
 407                 unsigned userfrags;
 408                 unsigned userfragsize;
 409
 410                 /* OSS stuff */
 411                 unsigned mapped:1;
 412                 unsigned ready:1;
 413                 unsigned update_flag;
 414                 unsigned ossfragsize;
 415                 unsigned ossmaxfrags;
 416                 unsigned subdivision;
 417         } dmabuf;
 418 };
 419
 420
 421 struct i810_card {
 422         unsigned int magic;
 423
 424         /* We keep i810 cards in a linked list */
 425         struct i810_card *next;
 426
 427         /* The i810 has a certain amount of cross channel interaction
 428            so we use a single per card lock */
 429         spinlock_t lock;
 430
 431         /* Control AC97 access serialization */
 432         spinlock_t ac97_lock;
 433
 434         /* PCI device stuff */
 435         struct pci_dev * pci_dev;
 436         u16 pci_id;
 437         u16 pci_id_internal; /* used to access card_cap[] */
 438 #ifdef CONFIG_PM
 439         u16 pm_suspended;
 440         u32 pm_save_state[64/sizeof(u32)];
 441         int pm_saved_mixer_settings[SOUND_MIXER_NRDEVICES][NR_AC97];
 442 #endif
 443         /* soundcore stuff */
 444         int dev_audio;
 445
 446         /* structures for abstraction of hardware facilities, codecs, banks and channels*/
 447         u16    ac97_id_map[NR_AC97];
 448         struct ac97_codec *ac97_codec[NR_AC97];
 449         struct i810_state *states[NR_HW_CH];
 450         struct i810_channel *channel;   /* 1:1 to states[] but diff. lifetime */
 451         dma_addr_t chandma;
 452
 453         u16 ac97_features;
 454         u16 ac97_status;
 455         u16 channels;
 456
 457         /* hardware resources */
 458         unsigned long ac97base;
 459         unsigned long iobase;
 460         u32 irq;
 461
 462         unsigned long ac97base_mmio_phys;
 463         unsigned long iobase_mmio_phys;
 464         u_int8_t *ac97base_mmio;
 465         u_int8_t *iobase_mmio;
 466
 467         int           use_mmio;
 468
 469         /* Function support */
 470         struct i810_channel *(*alloc_pcm_channel)(struct i810_card *);
 471         struct i810_channel *(*alloc_rec_pcm_channel)(struct i810_card *);
 472         struct i810_channel *(*alloc_rec_mic_channel)(struct i810_card *);
 473         void (*free_pcm_channel)(struct i810_card *, int chan);
 474
 475         /* We have a *very* long init time possibly, so use this to block */
 476         /* attempts to open our devices before we are ready (stops oops'es) */
 477         int initializing;
 478 };
 479
 480 /* extract register offset from codec struct */
 481 #define IO_REG_OFF(codec) (((struct i810_card *) codec->private_data)->ac97_id_map[codec->id])
 482
 483 /* set LVI from CIV */
 484 #define CIV_TO_LVI(port, off) outb((inb(port+OFF_CIV)+off) & 31, port+OFF_LVI)
 485
 486 static struct i810_card *devs = NULL;
 487
 488 static int i810_open_mixdev(struct inode *inode, struct file *file);
 489 static int i810_ioctl_mixdev(struct inode *inode, struct file *file,
 490                              unsigned int cmd, unsigned long arg);
 491 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg);
 492 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data);
 493 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg);
 494 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data);
 495 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg);
 496 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data);
 497
 498 static struct i810_channel *i810_alloc_pcm_channel(struct i810_card *card)
 499 {
 500         if(card->channel[1].used==1)
 501                 return NULL;
 502         card->channel[1].used=1;
 503         return &card->channel[1];
 504 }
 505
 506 static struct i810_channel *i810_alloc_rec_pcm_channel(struct i810_card *card)
 507 {
 508         if(card->channel[0].used==1)
 509                 return NULL;
 510         card->channel[0].used=1;
 511         return &card->channel[0];
 512 }
 513
 514 static struct i810_channel *i810_alloc_rec_mic_channel(struct i810_card *card)
 515 {
 516         if(card->channel[2].used==1)
 517                 return NULL;
 518         card->channel[2].used=1;
 519         return &card->channel[2];
 520 }
 521
 522 static void i810_free_pcm_channel(struct i810_card *card, int channel)
 523 {
 524         card->channel[channel].used=0;
 525 }
 526
 527 static int i810_valid_spdif_rate ( struct ac97_codec *codec, int rate )
 528 {
 529         unsigned long id = 0L;
 530
 531         id = (i810_ac97_get(codec, AC97_VENDOR_ID1) << 16);
 532         id |= i810_ac97_get(codec, AC97_VENDOR_ID2) & 0xffff;
 533 #ifdef DEBUG
 534         printk ( "i810_audio: codec = %s, codec_id = 0x%08lx\n", codec->name, id);
 535 #endif
 536         switch ( id ) {
 537                 case 0x41445361: /* AD1886 */
 538                         if (rate == 48000) {
 539                                 return 1;
 540                         }
 541                         break;
 542                 default: /* all other codecs, until we know otherwiae */
 543                         if (rate == 48000 || rate == 44100 || rate == 32000) {
 544                                 return 1;
 545                         }
 546                         break;
 547         }
 548         return (0);
 549 }
 550
 551 /* i810_set_spdif_output
 552  *
 553  *  Configure the S/PDIF output transmitter. When we turn on
 554  *  S/PDIF, we turn off the analog output. This may not be
 555  *  the right thing to do.
 556  *
 557  *  Assumptions:
 558  *     The DSP sample rate must already be set to a supported
 559  *     S/PDIF rate (32kHz, 44.1kHz, or 48kHz) or we abort.
 560  */
 561 static int i810_set_spdif_output(struct i810_state *state, int slots, int rate)
 562 {
 563         int     vol;
 564         int     aud_reg;
 565         int     r = 0;
 566         struct ac97_codec *codec = state->card->ac97_codec[0];
 567
 568         if(!codec->codec_ops->digital) {
 569                 state->card->ac97_status &= ~SPDIF_ON;
 570         } else {
 571                 if ( slots == -1 ) { /* Turn off S/PDIF */
 572                         codec->codec_ops->digital(codec, 0, 0, 0);
 573                         /* If the volume wasn't muted before we turned on S/PDIF, unmute it */
 574                         if ( !(state->card->ac97_status & VOL_MUTED) ) {
 575                                 aud_reg = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 576                                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (aud_reg & ~VOL_MUTED));
 577                         }
 578                         state->card->ac97_status &= ~(VOL_MUTED | SPDIF_ON);
 579                         return 0;
 580                 }
 581
 582                 vol = i810_ac97_get(codec, AC97_MASTER_VOL_STEREO);
 583                 state->card->ac97_status = vol & VOL_MUTED;
 584
 585                 r = codec->codec_ops->digital(codec, slots, rate, 0);
 586
 587                 if(r)
 588                         state->card->ac97_status |= SPDIF_ON;
 589                 else
 590                         state->card->ac97_status &= ~SPDIF_ON;
 591
 592                 /* Mute the analog output */
 593                 /* Should this only mute the PCM volume??? */
 594                 i810_ac97_set(codec, AC97_MASTER_VOL_STEREO, (vol | VOL_MUTED));
 595         }
 596         return r;
 597 }
 598
 599 /* i810_set_dac_channels
 600  *
 601  *  Configure the codec's multi-channel DACs
 602  *
 603  *  The logic is backwards. Setting the bit to 1 turns off the DAC.
 604  *
 605  *  What about the ICH? We currently configure it using the
 606  *  SNDCTL_DSP_CHANNELS ioctl.  If we're turnning on the DAC,
 607  *  does that imply that we want the ICH set to support
 608  *  these channels?
 609  *
 610  *  TODO:
 611  *    vailidate that the codec really supports these DACs
 612  *    before turning them on.
 613  */
 614 static void i810_set_dac_channels(struct i810_state *state, int channel)
 615 {
 616         int     aud_reg;
 617         struct ac97_codec *codec = state->card->ac97_codec[0];
 618
 619         /* No codec, no setup */
 620
 621         if(codec == NULL)
 622                 return;
 623
 624         aud_reg = i810_ac97_get(codec, AC97_EXTENDED_STATUS);
 625         aud_reg |= AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK;
 626         state->card->ac97_status &= ~(SURR_ON | CENTER_LFE_ON);
 627
 628         switch ( channel ) {
 629                 case 2: /* always enabled */
 630                         break;
 631                 case 4:
 632                         aud_reg &= ~AC97_EA_PRJ;
 633                         state->card->ac97_status |= SURR_ON;
 634                         break;
 635                 case 6:
 636                         aud_reg &= ~(AC97_EA_PRJ | AC97_EA_PRI | AC97_EA_PRK);
 637                         state->card->ac97_status |= SURR_ON | CENTER_LFE_ON;
 638                         break;
 639                 default:
 640                         break;
 641         }
 642         i810_ac97_set(codec, AC97_EXTENDED_STATUS, aud_reg);
 643
 644 }
 645
 646
 647 /* set playback sample rate */
 648 static unsigned int i810_set_dac_rate(struct i810_state * state, unsigned int rate)
 649 {
 650         struct dmabuf *dmabuf = &state->dmabuf;
 651         u32 new_rate;
 652         struct ac97_codec *codec=state->card->ac97_codec[0];
 653
 654         if(!(state->card->ac97_features&0x0001))
 655         {
 656                 dmabuf->rate = clocking;
 657 #ifdef DEBUG
 658                 printk("Asked for %d Hz, but ac97_features says we only do %dHz.  Sorry!\n",
 659                        rate,clocking);
 660 #endif
 661                 return clocking;
 662         }
 663
 664         if (rate > 48000)
 665                 rate = 48000;
 666         if (rate < 8000)
 667                 rate = 8000;
 668         dmabuf->rate = rate;
 669
 670         /*
 671          *      Adjust for misclocked crap
 672          */
 673         rate = ( rate * clocking)/48000;
 674         if(strict_clocking && rate < 8000) {
 675                 rate = 8000;
 676                 dmabuf->rate = (rate * 48000)/clocking;
 677         }
 678
 679         new_rate=ac97_set_dac_rate(codec, rate);
 680         if(new_rate != rate) {
 681                 dmabuf->rate = (new_rate * 48000)/clocking;
 682         }
 683 #ifdef DEBUG
 684         printk("i810_audio: called i810_set_dac_rate : asked for %d, got %d\n", rate, dmabuf->rate);
 685 #endif
 686         rate = new_rate;
 687         return dmabuf->rate;
 688 }
 689
 690 /* set recording sample rate */
 691 static unsigned int i810_set_adc_rate(struct i810_state * state, unsigned int rate)
 692 {
 693         struct dmabuf *dmabuf = &state->dmabuf;
 694         u32 new_rate;
 695         struct ac97_codec *codec=state->card->ac97_codec[0];
 696
 697         if(!(state->card->ac97_features&0x0001))
 698         {
 699                 dmabuf->rate = clocking;
 700                 return clocking;
 701         }
 702
 703         if (rate > 48000)
 704                 rate = 48000;
 705         if (rate < 8000)
 706                 rate = 8000;
 707         dmabuf->rate = rate;
 708
 709         /*
 710          *      Adjust for misclocked crap
 711          */
 712
 713         rate = ( rate * clocking)/48000;
 714         if(strict_clocking && rate < 8000) {
 715                 rate = 8000;
 716                 dmabuf->rate = (rate * 48000)/clocking;
 717         }
 718
 719         new_rate = ac97_set_adc_rate(codec, rate);
 720
 721         if(new_rate != rate) {
 722                 dmabuf->rate = (new_rate * 48000)/clocking;
 723                 rate = new_rate;
 724         }
 725 #ifdef DEBUG
 726         printk("i810_audio: called i810_set_adc_rate : rate = %d/%d\n", dmabuf->rate, rate);
 727 #endif
 728         return dmabuf->rate;
 729 }
 730
 731 /* get current playback/recording dma buffer pointer (byte offset from LBA),
 732    called with spinlock held! */
 733
 734 static inline unsigned i810_get_dma_addr(struct i810_state *state, int rec)
 735 {
 736         struct dmabuf *dmabuf = &state->dmabuf;
 737         unsigned int civ, offset, port, port_picb, bytes = 2;
 738
 739         if (!dmabuf->enable)
 740                 return 0;
 741
 742         if (rec)
 743                 port = state->card->iobase + dmabuf->read_channel->port;
 744         else
 745                 port = state->card->iobase + dmabuf->write_channel->port;
 746
 747         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012) {
 748                 port_picb = port + OFF_SR;
 749                 bytes = 1;
 750         } else
 751                 port_picb = port + OFF_PICB;
 752
 753         do {
 754                 civ = inb(port+OFF_CIV) & 31;
 755                 offset = inw(port_picb);
 756                 /* Must have a delay here! */
 757                 if(offset == 0)
 758                         udelay(1);
 759                 /* Reread both registers and make sure that that total
 760                  * offset from the first reading to the second is 0.
 761                  * There is an issue with SiS hardware where it will count
 762                  * picb down to 0, then update civ to the next value,
 763                  * then set the new picb to fragsize bytes.  We can catch
 764                  * it between the civ update and the picb update, making
 765                  * it look as though we are 1 fragsize ahead of where we
 766                  * are.  The next to we get the address though, it will
 767                  * be back in the right place, and we will suddenly think
 768                  * we just went forward dmasize - fragsize bytes, causing
 769                  * totally stupid *huge* dma overrun messages.  We are
 770                  * assuming that the 1us delay is more than long enough
 771                  * that we won't have to worry about the chip still being
 772                  * out of sync with reality ;-)
 773                  */
 774         } while (civ != (inb(port+OFF_CIV) & 31) || offset != inw(port_picb));
 775
 776         return (((civ + 1) * dmabuf->fragsize - (bytes * offset))
 777                 % dmabuf->dmasize);
 778 }
 779
 780 /* Stop recording (lock held) */
 781 static inline void __stop_adc(struct i810_state *state)
 782 {
 783         struct dmabuf *dmabuf = &state->dmabuf;
 784         struct i810_card *card = state->card;
 785
 786         dmabuf->enable &= ~ADC_RUNNING;
 787         outb(0, card->iobase + PI_CR);
 788         // wait for the card to acknowledge shutdown
 789         while( inb(card->iobase + PI_CR) != 0 ) ;
 790         // now clear any latent interrupt bits (like the halt bit)
 791         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 792                 outb( inb(card->iobase + PI_PICB), card->iobase + PI_PICB );
 793         else
 794                 outb( inb(card->iobase + PI_SR), card->iobase + PI_SR );
 795         outl( inl(card->iobase + GLOB_STA) & INT_PI, card->iobase + GLOB_STA);
 796 }
 797
 798 static void stop_adc(struct i810_state *state)
 799 {
 800         struct i810_card *card = state->card;
 801         unsigned long flags;
 802
 803         spin_lock_irqsave(&card->lock, flags);
 804         __stop_adc(state);
 805         spin_unlock_irqrestore(&card->lock, flags);
 806 }
 807
 808 static inline void __start_adc(struct i810_state *state)
 809 {
 810         struct dmabuf *dmabuf = &state->dmabuf;
 811
 812         if (dmabuf->count < dmabuf->dmasize && dmabuf->ready && !dmabuf->enable &&
 813             (dmabuf->trigger & PCM_ENABLE_INPUT)) {
 814                 dmabuf->enable |= ADC_RUNNING;
 815                 // Interrupt enable, LVI enable, DMA enable
 816                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PI_CR);
 817         }
 818 }
 819
 820 static void start_adc(struct i810_state *state)
 821 {
 822         struct i810_card *card = state->card;
 823         unsigned long flags;
 824
 825         spin_lock_irqsave(&card->lock, flags);
 826         __start_adc(state);
 827         spin_unlock_irqrestore(&card->lock, flags);
 828 }
 829
 830 /* stop playback (lock held) */
 831 static inline void __stop_dac(struct i810_state *state)
 832 {
 833         struct dmabuf *dmabuf = &state->dmabuf;
 834         struct i810_card *card = state->card;
 835
 836         dmabuf->enable &= ~DAC_RUNNING;
 837         outb(0, card->iobase + PO_CR);
 838         // wait for the card to acknowledge shutdown
 839         while( inb(card->iobase + PO_CR) != 0 ) ;
 840         // now clear any latent interrupt bits (like the halt bit)
 841         if(card->pci_id == PCI_DEVICE_ID_SI_7012)
 842                 outb( inb(card->iobase + PO_PICB), card->iobase + PO_PICB );
 843         else
 844                 outb( inb(card->iobase + PO_SR), card->iobase + PO_SR );
 845         outl( inl(card->iobase + GLOB_STA) & INT_PO, card->iobase + GLOB_STA);
 846 }
 847
 848 static void stop_dac(struct i810_state *state)
 849 {
 850         struct i810_card *card = state->card;
 851         unsigned long flags;
 852
 853         spin_lock_irqsave(&card->lock, flags);
 854         __stop_dac(state);
 855         spin_unlock_irqrestore(&card->lock, flags);
 856 }
 857
 858 static inline void __start_dac(struct i810_state *state)
 859 {
 860         struct dmabuf *dmabuf = &state->dmabuf;
 861
 862         if (dmabuf->count > 0 && dmabuf->ready && !dmabuf->enable &&
 863             (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
 864                 dmabuf->enable |= DAC_RUNNING;
 865                 // Interrupt enable, LVI enable, DMA enable
 866                 outb(0x10 | 0x04 | 0x01, state->card->iobase + PO_CR);
 867         }
 868 }
 869 static void start_dac(struct i810_state *state)
 870 {
 871         struct i810_card *card = state->card;
 872         unsigned long flags;
 873
 874         spin_lock_irqsave(&card->lock, flags);
 875         __start_dac(state);
 876         spin_unlock_irqrestore(&card->lock, flags);
 877 }
 878
 879 #define DMABUF_DEFAULTORDER (16-PAGE_SHIFT)
 880 #define DMABUF_MINORDER 1
 881
 882 /* allocate DMA buffer, playback and recording buffer should be allocated separately */
 883 static int alloc_dmabuf(struct i810_state *state)
 884 {
 885         struct dmabuf *dmabuf = &state->dmabuf;
 886         void *rawbuf= NULL;
 887         int order, size;
 888         struct page *page, *pend;
 889
 890         /* If we don't have any oss frag params, then use our default ones */
 891         if(dmabuf->ossmaxfrags == 0)
 892                 dmabuf->ossmaxfrags = 4;
 893         if(dmabuf->ossfragsize == 0)
 894                 dmabuf->ossfragsize = (PAGE_SIZE<<DMABUF_DEFAULTORDER)/dmabuf->ossmaxfrags;
 895         size = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
 896
 897         if(dmabuf->rawbuf && (PAGE_SIZE << dmabuf->buforder) == size)
 898                 return 0;
 899         /* alloc enough to satisfy the oss params */
 900         for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--) {
 901                 if ( (PAGE_SIZE<<order) > size )
 902                         continue;
 903                 if ((rawbuf = pci_alloc_consistent(state->card->pci_dev,
 904                                                    PAGE_SIZE << order,
 905                                                    &dmabuf->dma_handle)))
 906                         break;
 907         }
 908         if (!rawbuf)
 909                 return -ENOMEM;
 910
 911
 912 #ifdef DEBUG
 913         printk("i810_audio: allocated %ld (order = %d) bytes at %p\n",
 914                PAGE_SIZE << order, order, rawbuf);
 915 #endif
 916
 917         dmabuf->ready  = dmabuf->mapped = 0;
 918         dmabuf->rawbuf = rawbuf;
 919         dmabuf->buforder = order;
 920
 921         /* now mark the pages as reserved; otherwise remap_page_range doesn't do what we want */
 922         pend = virt_to_page(rawbuf + (PAGE_SIZE << order) - 1);
 923         for (page = virt_to_page(rawbuf); page <= pend; page++)
 924                 SetPageReserved(page);
 925
 926         return 0;
 927 }
 928
 929 /* free DMA buffer */
 930 static void dealloc_dmabuf(struct i810_state *state)
 931 {
 932         struct dmabuf *dmabuf = &state->dmabuf;
 933         struct page *page, *pend;
 934
 935         if (dmabuf->rawbuf) {
 936                 /* undo marking the pages as reserved */
 937                 pend = virt_to_page(dmabuf->rawbuf + (PAGE_SIZE << dmabuf->buforder) - 1);
 938                 for (page = virt_to_page(dmabuf->rawbuf); page <= pend; page++)
 939                         ClearPageReserved(page);
 940                 pci_free_consistent(state->card->pci_dev, PAGE_SIZE << dmabuf->buforder,
 941                                     dmabuf->rawbuf, dmabuf->dma_handle);
 942         }
 943         dmabuf->rawbuf = NULL;
 944         dmabuf->mapped = dmabuf->ready = 0;
 945 }
 946
 947 static int prog_dmabuf(struct i810_state *state, unsigned rec)
 948 {
 949         struct dmabuf *dmabuf = &state->dmabuf;
 950         struct i810_channel *c;
 951         struct sg_item *sg;
 952         unsigned long flags;
 953         int ret;
 954         unsigned fragint;
 955         int i;
 956
 957         spin_lock_irqsave(&state->card->lock, flags);
 958         if(dmabuf->enable & DAC_RUNNING)
 959                 __stop_dac(state);
 960         if(dmabuf->enable & ADC_RUNNING)
 961                 __stop_adc(state);
 962         dmabuf->total_bytes = 0;
 963         dmabuf->count = dmabuf->error = 0;
 964         dmabuf->swptr = dmabuf->hwptr = 0;
 965         spin_unlock_irqrestore(&state->card->lock, flags);
 966
 967         /* allocate DMA buffer, let alloc_dmabuf determine if we are already
 968          * allocated well enough or if we should replace the current buffer
 969          * (assuming one is already allocated, if it isn't, then allocate it).
 970          */
 971         if ((ret = alloc_dmabuf(state)))
 972                 return ret;
 973
 974         /* FIXME: figure out all this OSS fragment stuff */
 975         /* I did, it now does what it should according to the OSS API.  DL */
 976         /* We may not have realloced our dmabuf, but the fragment size to
 977          * fragment number ratio may have changed, so go ahead and reprogram
 978          * things
 979          */
 980         dmabuf->dmasize = PAGE_SIZE << dmabuf->buforder;
 981         dmabuf->numfrag = SG_LEN;
 982         dmabuf->fragsize = dmabuf->dmasize/dmabuf->numfrag;
 983         dmabuf->fragsamples = dmabuf->fragsize >> 1;
 984         dmabuf->userfragsize = dmabuf->ossfragsize;
 985         dmabuf->userfrags = dmabuf->dmasize/dmabuf->ossfragsize;
 986
 987         memset(dmabuf->rawbuf, 0, dmabuf->dmasize);
 988
 989         if(dmabuf->ossmaxfrags == 4) {
 990                 fragint = 8;
 991                 dmabuf->fragshift = 2;
 992         } else if (dmabuf->ossmaxfrags == 8) {
 993                 fragint = 4;
 994                 dmabuf->fragshift = 3;
 995         } else if (dmabuf->ossmaxfrags == 16) {
 996                 fragint = 2;
 997                 dmabuf->fragshift = 4;
 998         } else {
 999                 fragint = 1;
1000                 dmabuf->fragshift = 5;
1001         }
1002         /*
1003          *      Now set up the ring
1004          */
1005         if(dmabuf->read_channel)
1006                 c = dmabuf->read_channel;
1007         else
1008                 c = dmabuf->write_channel;
1009         while(c != NULL) {
1010                 sg=&c->sg[0];
1011                 /*
1012                  *      Load up 32 sg entries and take an interrupt at half
1013                  *      way (we might want more interrupts later..)
1014                  */
1015
1016                 for(i=0;i<dmabuf->numfrag;i++)
1017                 {
1018                         sg->busaddr=(u32)dmabuf->dma_handle+dmabuf->fragsize*i;
1019                         // the card will always be doing 16bit stereo
1020                         sg->control=dmabuf->fragsamples;
1021                         if(state->card->pci_id == PCI_DEVICE_ID_SI_7012)
1022                                 sg->control <<= 1;
1023                         sg->control|=CON_BUFPAD;
1024                         // set us up to get IOC interrupts as often as needed to
1025                         // satisfy numfrag requirements, no more
1026                         if( ((i+1) % fragint) == 0) {
1027                                 sg->control|=CON_IOC;
1028                         }
1029                         sg++;
1030                 }
1031                 spin_lock_irqsave(&state->card->lock, flags);
1032                 outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1033                 while( inb(state->card->iobase+c->port+OFF_CR) & 0x02 ) ;
1034                 outl((u32)state->card->chandma +
1035                     c->num*sizeof(struct i810_channel),
1036                     state->card->iobase+c->port+OFF_BDBAR);
1037                 CIV_TO_LVI(state->card->iobase+c->port, 0);
1038
1039                 spin_unlock_irqrestore(&state->card->lock, flags);
1040
1041                 if(c != dmabuf->write_channel)
1042                         c = dmabuf->write_channel;
1043                 else
1044                         c = NULL;
1045         }
1046
1047         /* set the ready flag for the dma buffer */
1048         dmabuf->ready = 1;
1049
1050 #ifdef DEBUG
1051         printk("i810_audio: prog_dmabuf, sample rate = %d, format = %d,\n\tnumfrag = %d, "
1052                "fragsize = %d dmasize = %d\n",
1053                dmabuf->rate, dmabuf->fmt, dmabuf->numfrag,
1054                dmabuf->fragsize, dmabuf->dmasize);
1055 #endif
1056
1057         return 0;
1058 }
1059
1060 static void __i810_update_lvi(struct i810_state *state, int rec)
1061 {
1062         struct dmabuf *dmabuf = &state->dmabuf;
1063         int x, port;
1064
1065         port = state->card->iobase;
1066         if(rec)
1067                 port += dmabuf->read_channel->port;
1068         else
1069                 port += dmabuf->write_channel->port;
1070
1071         /* if we are currently stopped, then our CIV is actually set to our
1072          * *last* sg segment and we are ready to wrap to the next.  However,
1073          * if we set our LVI to the last sg segment, then it won't wrap to
1074          * the next sg segment, it won't even get a start.  So, instead, when
1075          * we are stopped, we set both the LVI value and also we increment
1076          * the CIV value to the next sg segment to be played so that when
1077          * we call start_{dac,adc}, things will operate properly
1078          */
1079         if (!dmabuf->enable && dmabuf->ready) {
1080                 if(rec && dmabuf->count < dmabuf->dmasize &&
1081                    (dmabuf->trigger & PCM_ENABLE_INPUT))
1082                 {
1083                         CIV_TO_LVI(port, 1);
1084                         __start_adc(state);
1085                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1086                 } else if (!rec && dmabuf->count &&
1087                            (dmabuf->trigger & PCM_ENABLE_OUTPUT))
1088                 {
1089                         CIV_TO_LVI(port, 1);
1090                         __start_dac(state);
1091                         while( !(inb(port + OFF_CR) & ((1<<4) | (1<<2))) ) ;
1092                 }
1093         }
1094
1095         /* swptr - 1 is the tail of our transfer */
1096         x = (dmabuf->dmasize + dmabuf->swptr - 1) % dmabuf->dmasize;
1097         x /= dmabuf->fragsize;
1098         outb(x, port+OFF_LVI);
1099 }
1100
1101 static void i810_update_lvi(struct i810_state *state, int rec)
1102 {
1103         struct dmabuf *dmabuf = &state->dmabuf;
1104         unsigned long flags;
1105
1106         if(!dmabuf->ready)
1107                 return;
1108         spin_lock_irqsave(&state->card->lock, flags);
1109         __i810_update_lvi(state, rec);
1110         spin_unlock_irqrestore(&state->card->lock, flags);
1111 }
1112
1113 /* update buffer manangement pointers, especially, dmabuf->count and dmabuf->hwptr */
1114 static void i810_update_ptr(struct i810_state *state)
1115 {
1116         struct dmabuf *dmabuf = &state->dmabuf;
1117         unsigned hwptr;
1118         int diff;
1119
1120         /* error handling and process wake up for DAC */
1121         if (dmabuf->enable == ADC_RUNNING) {
1122                 /* update hardware pointer */
1123                 hwptr = i810_get_dma_addr(state, 1);
1124                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1125 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1126                 printk("ADC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1127 #endif
1128                 dmabuf->hwptr = hwptr;
1129                 dmabuf->total_bytes += diff;
1130                 dmabuf->count += diff;
1131                 if (dmabuf->count > dmabuf->dmasize) {
1132                         /* buffer underrun or buffer overrun */
1133                         /* this is normal for the end of a read */
1134                         /* only give an error if we went past the */
1135                         /* last valid sg entry */
1136                         if((inb(state->card->iobase + PI_CIV) & 31) !=
1137                            (inb(state->card->iobase + PI_LVI) & 31)) {
1138                                 printk(KERN_WARNING "i810_audio: DMA overrun on read\n");
1139                                 dmabuf->error++;
1140                         }
1141                 }
1142                 if (dmabuf->count > dmabuf->userfragsize)
1143                         wake_up(&dmabuf->wait);
1144         }
1145         /* error handling and process wake up for DAC */
1146         if (dmabuf->enable == DAC_RUNNING) {
1147                 /* update hardware pointer */
1148                 hwptr = i810_get_dma_addr(state, 0);
1149                 diff = (dmabuf->dmasize + hwptr - dmabuf->hwptr) % dmabuf->dmasize;
1150 #if defined(DEBUG_INTERRUPTS) || defined(DEBUG_MMAP)
1151                 printk("DAC HWP %d,%d,%d\n", hwptr, dmabuf->hwptr, diff);
1152 #endif
1153                 dmabuf->hwptr = hwptr;
1154                 dmabuf->total_bytes += diff;
1155                 dmabuf->count -= diff;
1156                 if (dmabuf->count < 0) {
1157                         /* buffer underrun or buffer overrun */
1158                         /* this is normal for the end of a write */
1159                         /* only give an error if we went past the */
1160                         /* last valid sg entry */
1161                         if((inb(state->card->iobase + PO_CIV) & 31) !=
1162                            (inb(state->card->iobase + PO_LVI) & 31)) {
1163                                 printk(KERN_WARNING "i810_audio: DMA overrun on write\n");
1164                                 printk("i810_audio: CIV %d, LVI %d, hwptr %x, "
1165                                         "count %d\n",
1166                                         inb(state->card->iobase + PO_CIV) & 31,
1167                                         inb(state->card->iobase + PO_LVI) & 31,
1168                                         dmabuf->hwptr, dmabuf->count);
1169                                 dmabuf->error++;
1170                         }
1171                 }
1172                 if (dmabuf->count < (dmabuf->dmasize-dmabuf->userfragsize))
1173                         wake_up(&dmabuf->wait);
1174         }
1175 }
1176
1177 static inline int i810_get_free_write_space(struct i810_state *state)
1178 {
1179         struct dmabuf *dmabuf = &state->dmabuf;
1180         int free;
1181
1182         i810_update_ptr(state);
1183         // catch underruns during playback
1184         if (dmabuf->count < 0) {
1185                 dmabuf->count = 0;
1186                 dmabuf->swptr = dmabuf->hwptr;
1187         }
1188         free = dmabuf->dmasize - dmabuf->count;
1189         free -= (dmabuf->hwptr % dmabuf->fragsize);
1190         if(free < 0)
1191                 return(0);
1192         return(free);
1193 }
1194
1195 static inline int i810_get_available_read_data(struct i810_state *state)
1196 {
1197         struct dmabuf *dmabuf = &state->dmabuf;
1198         int avail;
1199
1200         i810_update_ptr(state);
1201         // catch overruns during record
1202         if (dmabuf->count > dmabuf->dmasize) {
1203                 dmabuf->count = dmabuf->dmasize;
1204                 dmabuf->swptr = dmabuf->hwptr;
1205         }
1206         avail = dmabuf->count;
1207         avail -= (dmabuf->hwptr % dmabuf->fragsize);
1208         if(avail < 0)
1209                 return(0);
1210         return(avail);
1211 }
1212
1213 static int drain_dac(struct i810_state *state, int signals_allowed)
1214 {
1215         DECLARE_WAITQUEUE(wait, current);
1216         struct dmabuf *dmabuf = &state->dmabuf;
1217         unsigned long flags;
1218         unsigned long tmo;
1219         int count;
1220
1221         if (!dmabuf->ready)
1222                 return 0;
1223         if(dmabuf->mapped) {
1224                 stop_dac(state);
1225                 return 0;
1226         }
1227         add_wait_queue(&dmabuf->wait, &wait);
1228         for (;;) {
1229
1230                 spin_lock_irqsave(&state->card->lock, flags);
1231                 i810_update_ptr(state);
1232                 count = dmabuf->count;
1233                 spin_unlock_irqrestore(&state->card->lock, flags);
1234
1235                 if (count <= 0)
1236                         break;
1237
1238                 /*
1239                  * This will make sure that our LVI is correct, that our
1240                  * pointer is updated, and that the DAC is running.  We
1241                  * have to force the setting of dmabuf->trigger to avoid
1242                  * any possible deadlocks.
1243                  */
1244                 if(!dmabuf->enable) {
1245                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1246                         i810_update_lvi(state,0);
1247                 }
1248                 if (signal_pending(current) && signals_allowed) {
1249                         break;
1250                 }
1251
1252                 /* It seems that we have to set the current state to
1253                  * TASK_INTERRUPTIBLE every time to make the process
1254                  * really go to sleep.  This also has to be *after* the
1255                  * update_ptr() call because update_ptr is likely to
1256                  * do a wake_up() which will unset this before we ever
1257                  * try to sleep, resuling in a tight loop in this code
1258                  * instead of actually sleeping and waiting for an
1259                  * interrupt to wake us up!
1260                  */
1261                 set_current_state(TASK_INTERRUPTIBLE);
1262                 /*
1263                  * set the timeout to significantly longer than it *should*
1264                  * take for the DAC to drain the DMA buffer
1265                  */
1266                 tmo = (count * HZ) / (dmabuf->rate);
1267                 if (!schedule_timeout(tmo >= 2 ? tmo : 2)){
1268                         printk(KERN_ERR "i810_audio: drain_dac, dma timeout?\n");
1269                         count = 0;
1270                         break;
1271                 }
1272         }
1273         set_current_state(TASK_RUNNING);
1274         remove_wait_queue(&dmabuf->wait, &wait);
1275         if(count > 0 && signal_pending(current) && signals_allowed)
1276                 return -ERESTARTSYS;
1277         stop_dac(state);
1278         return 0;
1279 }
1280
1281 static void i810_channel_interrupt(struct i810_card *card)
1282 {
1283         int i, count;
1284
1285 #ifdef DEBUG_INTERRUPTS
1286         printk("CHANNEL ");
1287 #endif
1288         for(i=0;i<NR_HW_CH;i++)
1289         {
1290                 struct i810_state *state = card->states[i];
1291                 struct i810_channel *c;
1292                 struct dmabuf *dmabuf;
1293                 unsigned long port = card->iobase;
1294                 u16 status;
1295
1296                 if(!state)
1297                         continue;
1298                 if(!state->dmabuf.ready)
1299                         continue;
1300                 dmabuf = &state->dmabuf;
1301                 if(dmabuf->enable & DAC_RUNNING) {
1302                         c=dmabuf->write_channel;
1303                 } else if(dmabuf->enable & ADC_RUNNING) {
1304                         c=dmabuf->read_channel;
1305                 } else  /* This can occur going from R/W to close */
1306                         continue;
1307
1308                 port+=c->port;
1309
1310                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1311                         status = inw(port + OFF_PICB);
1312                 else
1313                         status = inw(port + OFF_SR);
1314
1315 #ifdef DEBUG_INTERRUPTS
1316                 printk("NUM %d PORT %X IRQ ( ST%d ", c->num, c->port, status);
1317 #endif
1318                 if(status & DMA_INT_COMPLETE)
1319                 {
1320                         /* only wake_up() waiters if this interrupt signals
1321                          * us being beyond a userfragsize of data open or
1322                          * available, and i810_update_ptr() does that for
1323                          * us
1324                          */
1325                         i810_update_ptr(state);
1326 #ifdef DEBUG_INTERRUPTS
1327                         printk("COMP %d ", dmabuf->hwptr /
1328                                         dmabuf->fragsize);
1329 #endif
1330                 }
1331                 if(status & (DMA_INT_LVI | DMA_INT_DCH))
1332                 {
1333                         /* wake_up() unconditionally on LVI and DCH */
1334                         i810_update_ptr(state);
1335                         wake_up(&dmabuf->wait);
1336 #ifdef DEBUG_INTERRUPTS
1337                         if(status & DMA_INT_LVI)
1338                                 printk("LVI ");
1339                         if(status & DMA_INT_DCH)
1340                                 printk("DCH -");
1341 #endif
1342                         if(dmabuf->enable & DAC_RUNNING)
1343                                 count = dmabuf->count;
1344                         else
1345                                 count = dmabuf->dmasize - dmabuf->count;
1346                         if(count > 0) {
1347                                 outb(inb(port+OFF_CR) | 1, port+OFF_CR);
1348 #ifdef DEBUG_INTERRUPTS
1349                                 printk(" CONTINUE ");
1350 #endif
1351                         } else {
1352                                 if (dmabuf->enable & DAC_RUNNING)
1353                                         __stop_dac(state);
1354                                 if (dmabuf->enable & ADC_RUNNING)
1355                                         __stop_adc(state);
1356                                 dmabuf->enable = 0;
1357 #ifdef DEBUG_INTERRUPTS
1358                                 printk(" STOP ");
1359 #endif
1360                         }
1361                 }
1362                 if(card->pci_id == PCI_DEVICE_ID_SI_7012)
1363                         outw(status & DMA_INT_MASK, port + OFF_PICB);
1364                 else
1365                         outw(status & DMA_INT_MASK, port + OFF_SR);
1366         }
1367 #ifdef DEBUG_INTERRUPTS
1368         printk(")\n");
1369 #endif
1370 }
1371
1372 static irqreturn_t i810_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1373 {
1374         struct i810_card *card = (struct i810_card *)dev_id;
1375         u32 status;
1376
1377         spin_lock(&card->lock);
1378
1379         status = inl(card->iobase + GLOB_STA);
1380
1381         if(!(status & INT_MASK))
1382         {
1383                 spin_unlock(&card->lock);
1384                 return IRQ_NONE;  /* not for us */
1385         }
1386
1387         if(status & (INT_PO|INT_PI|INT_MC))
1388                 i810_channel_interrupt(card);
1389
1390         /* clear 'em */
1391         outl(status & INT_MASK, card->iobase + GLOB_STA);
1392         spin_unlock(&card->lock);
1393         return IRQ_HANDLED;
1394 }
1395
1396 /* in this loop, dmabuf.count signifies the amount of data that is
1397    waiting to be copied to the user's buffer.  It is filled by the dma
1398    machine and drained by this loop. */
1399
1400 static ssize_t i810_read(struct file *file, char *buffer, size_t count, loff_t *ppos)
1401 {
1402         struct i810_state *state = (struct i810_state *)file->private_data;
1403         struct i810_card *card=state ? state->card : 0;
1404         struct dmabuf *dmabuf = &state->dmabuf;
1405         ssize_t ret;
1406         unsigned long flags;
1407         unsigned int swptr;
1408         int cnt;
1409         DECLARE_WAITQUEUE(waita, current);
1410
1411 #ifdef DEBUG2
1412         printk("i810_audio: i810_read called, count = %d\n", count);
1413 #endif
1414
1415         if (ppos != &file->f_pos)
1416                 return -ESPIPE;
1417         if (dmabuf->mapped)
1418                 return -ENXIO;
1419         if (dmabuf->enable & DAC_RUNNING)
1420                 return -ENODEV;
1421         if (!dmabuf->read_channel) {
1422                 dmabuf->ready = 0;
1423                 dmabuf->read_channel = card->alloc_rec_pcm_channel(card);
1424                 if (!dmabuf->read_channel) {
1425                         return -EBUSY;
1426                 }
1427         }
1428         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
1429                 return ret;
1430         if (!access_ok(VERIFY_WRITE, buffer, count))
1431                 return -EFAULT;
1432         ret = 0;
1433
1434         add_wait_queue(&dmabuf->wait, &waita);
1435         while (count > 0) {
1436                 set_current_state(TASK_INTERRUPTIBLE);
1437                 spin_lock_irqsave(&card->lock, flags);
1438                 if (PM_SUSPENDED(card)) {
1439                         spin_unlock_irqrestore(&card->lock, flags);
1440                         schedule();
1441                         if (signal_pending(current)) {
1442                                 if (!ret) ret = -EAGAIN;
1443                                 break;
1444                         }
1445                         continue;
1446                 }
1447                 swptr = dmabuf->swptr;
1448                 cnt = i810_get_available_read_data(state);
1449                 // this is to make the copy_to_user simpler below
1450                 if(cnt > (dmabuf->dmasize - swptr))
1451                         cnt = dmabuf->dmasize - swptr;
1452                 spin_unlock_irqrestore(&card->lock, flags);
1453
1454                 if (cnt > count)
1455                         cnt = count;
1456                 /* Lop off the last two bits to force the code to always
1457                  * write in full samples.  This keeps software that sets
1458                  * O_NONBLOCK but doesn't check the return value of the
1459                  * write call from getting things out of state where they
1460                  * think a full 4 byte sample was written when really only
1461                  * a portion was, resulting in odd sound and stereo
1462                  * hysteresis.
1463                  */
1464                 cnt &= ~0x3;
1465                 if (cnt <= 0) {
1466                         unsigned long tmo;
1467                         /*
1468                          * Don't let us deadlock.  The ADC won't start if
1469                          * dmabuf->trigger isn't set.  A call to SETTRIGGER
1470                          * could have turned it off after we set it to on
1471                          * previously.
1472                          */
1473                         dmabuf->trigger = PCM_ENABLE_INPUT;
1474                         /*
1475                          * This does three things.  Updates LVI to be correct,
1476                          * makes sure the ADC is running, and updates the
1477                          * hwptr.
1478                          */
1479                         i810_update_lvi(state,1);
1480                         if (file->f_flags & O_NONBLOCK) {
1481                                 if (!ret) ret = -EAGAIN;
1482                                 goto done;
1483                         }
1484                         /* Set the timeout to how long it would take to fill
1485                          * two of our buffers.  If we haven't been woke up
1486                          * by then, then we know something is wrong.
1487                          */
1488                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1489                         /* There are two situations when sleep_on_timeout returns, one is when
1490                            the interrupt is serviced correctly and the process is waked up by
1491                            ISR ON TIME. Another is when timeout is expired, which means that
1492                            either interrupt is NOT serviced correctly (pending interrupt) or it
1493                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1494                            which results in a (potential) buffer overrun. And worse, there is
1495                            NOTHING we can do to prevent it. */
1496                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1497 #ifdef DEBUG
1498                                 printk(KERN_ERR "i810_audio: recording schedule timeout, "
1499                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1500                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1501                                        dmabuf->hwptr, dmabuf->swptr);
1502 #endif
1503                                 /* a buffer overrun, we delay the recovery until next time the
1504                                    while loop begin and we REALLY have space to record */
1505                         }
1506                         if (signal_pending(current)) {
1507                                 ret = ret ? ret : -ERESTARTSYS;
1508                                 goto done;
1509                         }
1510                         continue;
1511                 }
1512
1513                 if (copy_to_user(buffer, dmabuf->rawbuf + swptr, cnt)) {
1514                         if (!ret) ret = -EFAULT;
1515                         goto done;
1516                 }
1517
1518                 swptr = (swptr + cnt) % dmabuf->dmasize;
1519
1520                 spin_lock_irqsave(&card->lock, flags);
1521
1522                 if (PM_SUSPENDED(card)) {
1523                         spin_unlock_irqrestore(&card->lock, flags);
1524                         continue;
1525                 }
1526                 dmabuf->swptr = swptr;
1527                 dmabuf->count -= cnt;
1528                 spin_unlock_irqrestore(&card->lock, flags);
1529
1530                 count -= cnt;
1531                 buffer += cnt;
1532                 ret += cnt;
1533         }
1534  done:
1535         i810_update_lvi(state,1);
1536         set_current_state(TASK_RUNNING);
1537         remove_wait_queue(&dmabuf->wait, &waita);
1538
1539         return ret;
1540 }
1541
1542 /* in this loop, dmabuf.count signifies the amount of data that is waiting to be dma to
1543    the soundcard.  it is drained by the dma machine and filled by this loop. */
1544 static ssize_t i810_write(struct file *file, const char *buffer, size_t count, loff_t *ppos)
1545 {
1546         struct i810_state *state = (struct i810_state *)file->private_data;
1547         struct i810_card *card=state ? state->card : 0;
1548         struct dmabuf *dmabuf = &state->dmabuf;
1549         ssize_t ret;
1550         unsigned long flags;
1551         unsigned int swptr = 0;
1552         int cnt, x;
1553         DECLARE_WAITQUEUE(waita, current);
1554
1555 #ifdef DEBUG2
1556         printk("i810_audio: i810_write called, count = %d\n", count);
1557 #endif
1558
1559         if (ppos != &file->f_pos)
1560                 return -ESPIPE;
1561         if (dmabuf->mapped)
1562                 return -ENXIO;
1563         if (dmabuf->enable & ADC_RUNNING)
1564                 return -ENODEV;
1565         if (!dmabuf->write_channel) {
1566                 dmabuf->ready = 0;
1567                 dmabuf->write_channel = card->alloc_pcm_channel(card);
1568                 if(!dmabuf->write_channel)
1569                         return -EBUSY;
1570         }
1571         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
1572                 return ret;
1573         if (!access_ok(VERIFY_READ, buffer, count))
1574                 return -EFAULT;
1575         ret = 0;
1576
1577         add_wait_queue(&dmabuf->wait, &waita);
1578         while (count > 0) {
1579                 set_current_state(TASK_INTERRUPTIBLE);
1580                 spin_lock_irqsave(&state->card->lock, flags);
1581                 if (PM_SUSPENDED(card)) {
1582                         spin_unlock_irqrestore(&card->lock, flags);
1583                         schedule();
1584                         if (signal_pending(current)) {
1585                                 if (!ret) ret = -EAGAIN;
1586                                 break;
1587                         }
1588                         continue;
1589                 }
1590
1591                 swptr = dmabuf->swptr;
1592                 cnt = i810_get_free_write_space(state);
1593                 /* Bound the maximum size to how much we can copy to the
1594                  * dma buffer before we hit the end.  If we have more to
1595                  * copy then it will get done in a second pass of this
1596                  * loop starting from the beginning of the buffer.
1597                  */
1598                 if(cnt > (dmabuf->dmasize - swptr))
1599                         cnt = dmabuf->dmasize - swptr;
1600                 spin_unlock_irqrestore(&state->card->lock, flags);
1601
1602 #ifdef DEBUG2
1603                 printk(KERN_INFO "i810_audio: i810_write: %d bytes available space\n", cnt);
1604 #endif
1605                 if (cnt > count)
1606                         cnt = count;
1607                 /* Lop off the last two bits to force the code to always
1608                  * write in full samples.  This keeps software that sets
1609                  * O_NONBLOCK but doesn't check the return value of the
1610                  * write call from getting things out of state where they
1611                  * think a full 4 byte sample was written when really only
1612                  * a portion was, resulting in odd sound and stereo
1613                  * hysteresis.
1614                  */
1615                 cnt &= ~0x3;
1616                 if (cnt <= 0) {
1617                         unsigned long tmo;
1618                         // There is data waiting to be played
1619                         /*
1620                          * Force the trigger setting since we would
1621                          * deadlock with it set any other way
1622                          */
1623                         dmabuf->trigger = PCM_ENABLE_OUTPUT;
1624                         i810_update_lvi(state,0);
1625                         if (file->f_flags & O_NONBLOCK) {
1626                                 if (!ret) ret = -EAGAIN;
1627                                 goto ret;
1628                         }
1629                         /* Not strictly correct but works */
1630                         tmo = (dmabuf->dmasize * HZ * 2) / (dmabuf->rate * 4);
1631                         /* There are two situations when sleep_on_timeout returns, one is when
1632                            the interrupt is serviced correctly and the process is waked up by
1633                            ISR ON TIME. Another is when timeout is expired, which means that
1634                            either interrupt is NOT serviced correctly (pending interrupt) or it
1635                            is TOO LATE for the process to be scheduled to run (scheduler latency)
1636                            which results in a (potential) buffer underrun. And worse, there is
1637                            NOTHING we can do to prevent it. */
1638                         if (!schedule_timeout(tmo >= 2 ? tmo : 2)) {
1639 #ifdef DEBUG
1640                                 printk(KERN_ERR "i810_audio: playback schedule timeout, "
1641                                        "dmasz %u fragsz %u count %i hwptr %u swptr %u\n",
1642                                        dmabuf->dmasize, dmabuf->fragsize, dmabuf->count,
1643                                        dmabuf->hwptr, dmabuf->swptr);
1644 #endif
1645                                 /* a buffer underrun, we delay the recovery until next time the
1646                                    while loop begin and we REALLY have data to play */
1647                                 //return ret;
1648                         }
1649                         if (signal_pending(current)) {
1650                                 if (!ret) ret = -ERESTARTSYS;
1651                                 goto ret;
1652                         }
1653                         continue;
1654                 }
1655                 if (copy_from_user(dmabuf->rawbuf+swptr,buffer,cnt)) {
1656                         if (!ret) ret = -EFAULT;
1657                         goto ret;
1658                 }
1659
1660                 swptr = (swptr + cnt) % dmabuf->dmasize;
1661
1662                 spin_lock_irqsave(&state->card->lock, flags);
1663                 if (PM_SUSPENDED(card)) {
1664                         spin_unlock_irqrestore(&card->lock, flags);
1665                         continue;
1666                 }
1667
1668                 dmabuf->swptr = swptr;
1669                 dmabuf->count += cnt;
1670
1671                 count -= cnt;
1672                 buffer += cnt;
1673                 ret += cnt;
1674                 spin_unlock_irqrestore(&state->card->lock, flags);
1675         }
1676         if (swptr % dmabuf->fragsize) {
1677                 x = dmabuf->fragsize - (swptr % dmabuf->fragsize);
1678                 memset(dmabuf->rawbuf + swptr, '\0', x);
1679         }
1680 ret:
1681         i810_update_lvi(state,0);
1682         set_current_state(TASK_RUNNING);
1683         remove_wait_queue(&dmabuf->wait, &waita);
1684
1685         return ret;
1686 }
1687
1688 /* No kernel lock - we have our own spinlock */
1689 static unsigned int i810_poll(struct file *file, struct poll_table_struct *wait)
1690 {
1691         struct i810_state *state = (struct i810_state *)file->private_data;
1692         struct dmabuf *dmabuf = &state->dmabuf;
1693         unsigned long flags;
1694         unsigned int mask = 0;
1695
1696         if(!dmabuf->ready)
1697                 return 0;
1698         poll_wait(file, &dmabuf->wait, wait);
1699         spin_lock_irqsave(&state->card->lock, flags);
1700         if (dmabuf->enable & ADC_RUNNING ||
1701             dmabuf->trigger & PCM_ENABLE_INPUT) {
1702                 if (i810_get_available_read_data(state) >=
1703                     (signed)dmabuf->userfragsize)
1704                         mask |= POLLIN | POLLRDNORM;
1705         }
1706         if (dmabuf->enable & DAC_RUNNING ||
1707             dmabuf->trigger & PCM_ENABLE_OUTPUT) {
1708                 if (i810_get_free_write_space(state) >=
1709                     (signed)dmabuf->userfragsize)
1710                         mask |= POLLOUT | POLLWRNORM;
1711         }
1712         spin_unlock_irqrestore(&state->card->lock, flags);
1713         return mask;
1714 }
1715
1716 static int i810_mmap(struct file *file, struct vm_area_struct *vma)
1717 {
1718         struct i810_state *state = (struct i810_state *)file->private_data;
1719         struct dmabuf *dmabuf = &state->dmabuf;
1720         int ret = -EINVAL;
1721         unsigned long size;
1722
1723         lock_kernel();
1724         if (vma->vm_flags & VM_WRITE) {
1725                 if (!dmabuf->write_channel &&
1726                     (dmabuf->write_channel =
1727                      state->card->alloc_pcm_channel(state->card)) == NULL) {
1728                         ret = -EBUSY;
1729                         goto out;
1730                 }
1731         }
1732         if (vma->vm_flags & VM_READ) {
1733                 if (!dmabuf->read_channel &&
1734                     (dmabuf->read_channel =
1735                      state->card->alloc_rec_pcm_channel(state->card)) == NULL) {
1736                         ret = -EBUSY;
1737                         goto out;
1738                 }
1739         }
1740         if ((ret = prog_dmabuf(state, 0)) != 0)
1741                 goto out;
1742
1743         ret = -EINVAL;
1744         if (vma->vm_pgoff != 0)
1745                 goto out;
1746         size = vma->vm_end - vma->vm_start;
1747         if (size > (PAGE_SIZE << dmabuf->buforder))
1748                 goto out;
1749         ret = -EAGAIN;
1750         if (remap_page_range(vma, vma->vm_start, virt_to_phys(dmabuf->rawbuf),
1751                              size, vma->vm_page_prot))
1752                 goto out;
1753         dmabuf->mapped = 1;
1754         dmabuf->trigger = 0;
1755         ret = 0;
1756 #ifdef DEBUG_MMAP
1757         printk("i810_audio: mmap'ed %ld bytes of data space\n", size);
1758 #endif
1759 out:
1760         unlock_kernel();
1761         return ret;
1762 }
1763
1764 static int i810_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1765 {
1766         struct i810_state *state = (struct i810_state *)file->private_data;
1767         struct i810_channel *c = NULL;
1768         struct dmabuf *dmabuf = &state->dmabuf;
1769         unsigned long flags;
1770         audio_buf_info abinfo;
1771         count_info cinfo;
1772         unsigned int i_glob_cnt;
1773         int val = 0, ret;
1774         struct ac97_codec *codec = state->card->ac97_codec[0];
1775
1776 #ifdef DEBUG
1777         printk("i810_audio: i810_ioctl, arg=0x%x, cmd=", arg ? *(int *)arg : 0);
1778 #endif
1779
1780         switch (cmd)
1781         {
1782         case OSS_GETVERSION:
1783 #ifdef DEBUG
1784                 printk("OSS_GETVERSION\n");
1785 #endif
1786                 return put_user(SOUND_VERSION, (int *)arg);
1787
1788         case SNDCTL_DSP_RESET:
1789 #ifdef DEBUG
1790                 printk("SNDCTL_DSP_RESET\n");
1791 #endif
1792                 spin_lock_irqsave(&state->card->lock, flags);
1793                 if (dmabuf->enable == DAC_RUNNING) {
1794                         c = dmabuf->write_channel;
1795                         __stop_dac(state);
1796                 }
1797                 if (dmabuf->enable == ADC_RUNNING) {
1798                         c = dmabuf->read_channel;
1799                         __stop_adc(state);
1800                 }
1801                 if (c != NULL) {
1802                         outb(2, state->card->iobase+c->port+OFF_CR);   /* reset DMA machine */
1803                         while ( inb(state->card->iobase+c->port+OFF_CR) & 2 )
1804                                 cpu_relax();
1805                         outl((u32)state->card->chandma +
1806                             c->num*sizeof(struct i810_channel),
1807                             state->card->iobase+c->port+OFF_BDBAR);
1808                         CIV_TO_LVI(state->card->iobase+c->port, 0);
1809                 }
1810
1811                 spin_unlock_irqrestore(&state->card->lock, flags);
1812                 synchronize_irq(state->card->pci_dev->irq);
1813                 dmabuf->ready = 0;
1814                 dmabuf->swptr = dmabuf->hwptr = 0;
1815                 dmabuf->count = dmabuf->total_bytes = 0;
1816                 return 0;
1817
1818         case SNDCTL_DSP_SYNC:
1819 #ifdef DEBUG
1820                 printk("SNDCTL_DSP_SYNC\n");
1821 #endif
1822                 if (dmabuf->enable != DAC_RUNNING || file->f_flags & O_NONBLOCK)
1823                         return 0;
1824                 if((val = drain_dac(state, 1)))
1825                         return val;
1826                 dmabuf->total_bytes = 0;
1827                 return 0;
1828
1829         case SNDCTL_DSP_SPEED: /* set smaple rate */
1830 #ifdef DEBUG
1831                 printk("SNDCTL_DSP_SPEED\n");
1832 #endif
1833                 if (get_user(val, (int *)arg))
1834                         return -EFAULT;
1835                 if (val >= 0) {
1836                         if (file->f_mode & FMODE_WRITE) {
1837                                 if ( (state->card->ac97_status & SPDIF_ON) ) {  /* S/PDIF Enabled */
1838                                         /* AD1886 only supports 48000, need to check that */
1839                                         if ( i810_valid_spdif_rate ( codec, val ) ) {
1840                                                 /* Set DAC rate */
1841                                                 i810_set_spdif_output ( state, -1, 0 );
1842                                                 stop_dac(state);
1843                                                 dmabuf->ready = 0;
1844                                                 spin_lock_irqsave(&state->card->lock, flags);
1845                                                 i810_set_dac_rate(state, val);
1846                                                 spin_unlock_irqrestore(&state->card->lock, flags);
1847                                                 /* Set S/PDIF transmitter rate. */
1848                                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, val );
1849                                                 if ( ! (state->card->ac97_status & SPDIF_ON) ) {
1850                                                         val = dmabuf->rate;
1851                                                 }
1852                                         } else { /* Not a valid rate for S/PDIF, ignore it */
1853                                                 val = dmabuf->rate;
1854                                         }
1855                                 } else {
1856                                         stop_dac(state);
1857                                         dmabuf->ready = 0;
1858                                         spin_lock_irqsave(&state->card->lock, flags);
1859                                         i810_set_dac_rate(state, val);
1860                                         spin_unlock_irqrestore(&state->card->lock, flags);
1861                                 }
1862                         }
1863                         if (file->f_mode & FMODE_READ) {
1864                                 stop_adc(state);
1865                                 dmabuf->ready = 0;
1866                                 spin_lock_irqsave(&state->card->lock, flags);
1867                                 i810_set_adc_rate(state, val);
1868                                 spin_unlock_irqrestore(&state->card->lock, flags);
1869                         }
1870                 }
1871                 return put_user(dmabuf->rate, (int *)arg);
1872
1873         case SNDCTL_DSP_STEREO: /* set stereo or mono channel */
1874 #ifdef DEBUG
1875                 printk("SNDCTL_DSP_STEREO\n");
1876 #endif
1877                 if (dmabuf->enable & DAC_RUNNING) {
1878                         stop_dac(state);
1879                 }
1880                 if (dmabuf->enable & ADC_RUNNING) {
1881                         stop_adc(state);
1882                 }
1883                 return put_user(1, (int *)arg);
1884
1885         case SNDCTL_DSP_GETBLKSIZE:
1886                 if (file->f_mode & FMODE_WRITE) {
1887                         if (!dmabuf->ready && (val = prog_dmabuf(state, 0)))
1888                                 return val;
1889                 }
1890                 if (file->f_mode & FMODE_READ) {
1891                         if (!dmabuf->ready && (val = prog_dmabuf(state, 1)))
1892                                 return val;
1893                 }
1894 #ifdef DEBUG
1895                 printk("SNDCTL_DSP_GETBLKSIZE %d\n", dmabuf->userfragsize);
1896 #endif
1897                 return put_user(dmabuf->userfragsize, (int *)arg);
1898
1899         case SNDCTL_DSP_GETFMTS: /* Returns a mask of supported sample format*/
1900 #ifdef DEBUG
1901                 printk("SNDCTL_DSP_GETFMTS\n");
1902 #endif
1903                 return put_user(AFMT_S16_LE, (int *)arg);
1904
1905         case SNDCTL_DSP_SETFMT: /* Select sample format */
1906 #ifdef DEBUG
1907                 printk("SNDCTL_DSP_SETFMT\n");
1908 #endif
1909                 return put_user(AFMT_S16_LE, (int *)arg);
1910
1911         case SNDCTL_DSP_CHANNELS:
1912 #ifdef DEBUG
1913                 printk("SNDCTL_DSP_CHANNELS\n");
1914 #endif
1915                 if (get_user(val, (int *)arg))
1916                         return -EFAULT;
1917
1918                 if (val > 0) {
1919                         if (dmabuf->enable & DAC_RUNNING) {
1920                                 stop_dac(state);
1921                         }
1922                         if (dmabuf->enable & ADC_RUNNING) {
1923                                 stop_adc(state);
1924                         }
1925                 } else {
1926                         return put_user(state->card->channels, (int *)arg);
1927                 }
1928
1929                 /* ICH and ICH0 only support 2 channels */
1930                 if ( state->card->pci_id == PCI_DEVICE_ID_INTEL_82801
1931                      || state->card->pci_id == PCI_DEVICE_ID_INTEL_82901)
1932                         return put_user(2, (int *)arg);
1933
1934                 /* Multi-channel support was added with ICH2. Bits in */
1935                 /* Global Status and Global Control register are now  */
1936                 /* used to indicate this.                             */
1937
1938                 i_glob_cnt = inl(state->card->iobase + GLOB_CNT);
1939
1940                 /* Current # of channels enabled */
1941                 if ( i_glob_cnt & 0x0100000 )
1942                         ret = 4;
1943                 else if ( i_glob_cnt & 0x0200000 )
1944                         ret = 6;
1945                 else
1946                         ret = 2;
1947
1948                 switch ( val ) {
1949                         case 2: /* 2 channels is always supported */
1950                                 outl(i_glob_cnt & 0xffcfffff,
1951                                      state->card->iobase + GLOB_CNT);
1952                                 /* Do we need to change mixer settings????  */
1953                                 break;
1954                         case 4: /* Supported on some chipsets, better check first */
1955                                 if ( state->card->channels >= 4 ) {
1956                                         outl((i_glob_cnt & 0xffcfffff) | 0x100000,
1957                                               state->card->iobase + GLOB_CNT);
1958                                         /* Do we need to change mixer settings??? */
1959                                 } else {
1960                                         val = ret;
1961                                 }
1962                                 break;
1963                         case 6: /* Supported on some chipsets, better check first */
1964                                 if ( state->card->channels >= 6 ) {
1965                                         outl((i_glob_cnt & 0xffcfffff) | 0x200000,
1966                                               state->card->iobase + GLOB_CNT);
1967                                         /* Do we need to change mixer settings??? */
1968                                 } else {
1969                                         val = ret;
1970                                 }
1971                                 break;
1972                         default: /* nothing else is ever supported by the chipset */
1973                                 val = ret;
1974                                 break;
1975                 }
1976
1977                 return put_user(val, (int *)arg);
1978
1979         case SNDCTL_DSP_POST: /* the user has sent all data and is notifying us */
1980                 /* we update the swptr to the end of the last sg segment then return */
1981 #ifdef DEBUG
1982                 printk("SNDCTL_DSP_POST\n");
1983 #endif
1984                 if(!dmabuf->ready || (dmabuf->enable != DAC_RUNNING))
1985                         return 0;
1986                 if((dmabuf->swptr % dmabuf->fragsize) != 0) {
1987                         val = dmabuf->fragsize - (dmabuf->swptr % dmabuf->fragsize);
1988                         dmabuf->swptr += val;
1989                         dmabuf->count += val;
1990                 }
1991                 return 0;
1992
1993         case SNDCTL_DSP_SUBDIVIDE:
1994                 if (dmabuf->subdivision)
1995                         return -EINVAL;
1996                 if (get_user(val, (int *)arg))
1997                         return -EFAULT;
1998                 if (val != 1 && val != 2 && val != 4)
1999                         return -EINVAL;
2000 #ifdef DEBUG
2001                 printk("SNDCTL_DSP_SUBDIVIDE %d\n", val);
2002 #endif
2003                 dmabuf->subdivision = val;
2004                 dmabuf->ready = 0;
2005                 return 0;
2006
2007         case SNDCTL_DSP_SETFRAGMENT:
2008                 if (get_user(val, (int *)arg))
2009                         return -EFAULT;
2010
2011                 dmabuf->ossfragsize = 1<<(val & 0xffff);
2012                 dmabuf->ossmaxfrags = (val >> 16) & 0xffff;
2013                 if (!dmabuf->ossfragsize || !dmabuf->ossmaxfrags)
2014                         return -EINVAL;
2015                 /*
2016                  * Bound the frag size into our allowed range of 256 - 4096
2017                  */
2018                 if (dmabuf->ossfragsize < 256)
2019                         dmabuf->ossfragsize = 256;
2020                 else if (dmabuf->ossfragsize > 4096)
2021                         dmabuf->ossfragsize = 4096;
2022                 /*
2023                  * The numfrags could be something reasonable, or it could
2024                  * be 0xffff meaning "Give me as much as possible".  So,
2025                  * we check the numfrags * fragsize doesn't exceed our
2026                  * 64k buffer limit, nor is it less than our 8k minimum.
2027                  * If it fails either one of these checks, then adjust the
2028                  * number of fragments, not the size of them.  It's OK if
2029                  * our number of fragments doesn't equal 32 or anything
2030                  * like our hardware based number now since we are using
2031                  * a different frag count for the hardware.  Before we get
2032                  * into this though, bound the maxfrags to avoid overflow
2033                  * issues.  A reasonable bound would be 64k / 256 since our
2034                  * maximum buffer size is 64k and our minimum frag size is
2035                  * 256.  On the other end, our minimum buffer size is 8k and
2036                  * our maximum frag size is 4k, so the lower bound should
2037                  * be 2.
2038                  */
2039
2040                 if(dmabuf->ossmaxfrags > 256)
2041                         dmabuf->ossmaxfrags = 256;
2042                 else if (dmabuf->ossmaxfrags < 2)
2043                         dmabuf->ossmaxfrags = 2;
2044
2045                 val = dmabuf->ossfragsize * dmabuf->ossmaxfrags;
2046                 while (val < 8192) {
2047                     val <<= 1;
2048                     dmabuf->ossmaxfrags <<= 1;
2049                 }
2050                 while (val > 65536) {
2051                     val >>= 1;
2052                     dmabuf->ossmaxfrags >>= 1;
2053                 }
2054                 dmabuf->ready = 0;
2055 #ifdef DEBUG
2056                 printk("SNDCTL_DSP_SETFRAGMENT 0x%x, %d, %d\n", val,
2057                         dmabuf->ossfragsize, dmabuf->ossmaxfrags);
2058 #endif
2059
2060                 return 0;
2061
2062         case SNDCTL_DSP_GETOSPACE:
2063                 if (!(file->f_mode & FMODE_WRITE))
2064                         return -EINVAL;
2065                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2066                         return val;
2067                 spin_lock_irqsave(&state->card->lock, flags);
2068                 i810_update_ptr(state);
2069                 abinfo.fragsize = dmabuf->userfragsize;
2070                 abinfo.fragstotal = dmabuf->userfrags;
2071                 if (dmabuf->mapped)
2072                         abinfo.bytes = dmabuf->dmasize;
2073                 else
2074                         abinfo.bytes = i810_get_free_write_space(state);
2075                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2076                 spin_unlock_irqrestore(&state->card->lock, flags);
2077 #if defined(DEBUG) || defined(DEBUG_MMAP)
2078                 printk("SNDCTL_DSP_GETOSPACE %d, %d, %d, %d\n", abinfo.bytes,
2079                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2080 #endif
2081                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2082
2083         case SNDCTL_DSP_GETOPTR:
2084                 if (!(file->f_mode & FMODE_WRITE))
2085                         return -EINVAL;
2086                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2087                         return val;
2088                 spin_lock_irqsave(&state->card->lock, flags);
2089                 val = i810_get_free_write_space(state);
2090                 cinfo.bytes = dmabuf->total_bytes;
2091                 cinfo.ptr = dmabuf->hwptr;
2092                 cinfo.blocks = val/dmabuf->userfragsize;
2093                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_OUTPUT)) {
2094                         dmabuf->count += val;
2095                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2096                         __i810_update_lvi(state, 0);
2097                 }
2098                 spin_unlock_irqrestore(&state->card->lock, flags);
2099 #if defined(DEBUG) || defined(DEBUG_MMAP)
2100                 printk("SNDCTL_DSP_GETOPTR %d, %d, %d, %d\n", cinfo.bytes,
2101                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2102 #endif
2103                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2104
2105         case SNDCTL_DSP_GETISPACE:
2106                 if (!(file->f_mode & FMODE_READ))
2107                         return -EINVAL;
2108                 if (!dmabuf->ready && (val = prog_dmabuf(state, 1)) != 0)
2109                         return val;
2110                 spin_lock_irqsave(&state->card->lock, flags);
2111                 abinfo.bytes = i810_get_available_read_data(state);
2112                 abinfo.fragsize = dmabuf->userfragsize;
2113                 abinfo.fragstotal = dmabuf->userfrags;
2114                 abinfo.fragments = abinfo.bytes / dmabuf->userfragsize;
2115                 spin_unlock_irqrestore(&state->card->lock, flags);
2116 #if defined(DEBUG) || defined(DEBUG_MMAP)
2117                 printk("SNDCTL_DSP_GETISPACE %d, %d, %d, %d\n", abinfo.bytes,
2118                         abinfo.fragsize, abinfo.fragments, abinfo.fragstotal);
2119 #endif
2120                 return copy_to_user((void *)arg, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
2121
2122         case SNDCTL_DSP_GETIPTR:
2123                 if (!(file->f_mode & FMODE_READ))
2124                         return -EINVAL;
2125                 if (!dmabuf->ready && (val = prog_dmabuf(state, 0)) != 0)
2126                         return val;
2127                 spin_lock_irqsave(&state->card->lock, flags);
2128                 val = i810_get_available_read_data(state);
2129                 cinfo.bytes = dmabuf->total_bytes;
2130                 cinfo.blocks = val/dmabuf->userfragsize;
2131                 cinfo.ptr = dmabuf->hwptr;
2132                 if (dmabuf->mapped && (dmabuf->trigger & PCM_ENABLE_INPUT)) {
2133                         dmabuf->count -= val;
2134                         dmabuf->swptr = (dmabuf->swptr + val) % dmabuf->dmasize;
2135                         __i810_update_lvi(state, 1);
2136                 }
2137                 spin_unlock_irqrestore(&state->card->lock, flags);
2138 #if defined(DEBUG) || defined(DEBUG_MMAP)
2139                 printk("SNDCTL_DSP_GETIPTR %d, %d, %d, %d\n", cinfo.bytes,
2140                         cinfo.blocks, cinfo.ptr, dmabuf->count);
2141 #endif
2142                 return copy_to_user((void *)arg, &cinfo, sizeof(cinfo)) ? -EFAULT : 0;
2143
2144         case SNDCTL_DSP_NONBLOCK:
2145 #ifdef DEBUG
2146                 printk("SNDCTL_DSP_NONBLOCK\n");
2147 #endif
2148                 file->f_flags |= O_NONBLOCK;
2149                 return 0;
2150
2151         case SNDCTL_DSP_GETCAPS:
2152 #ifdef DEBUG
2153                 printk("SNDCTL_DSP_GETCAPS\n");
2154 #endif
2155             return put_user(DSP_CAP_REALTIME|DSP_CAP_TRIGGER|DSP_CAP_MMAP|DSP_CAP_BIND,
2156                             (int *)arg);
2157
2158         case SNDCTL_DSP_GETTRIGGER:
2159                 val = 0;
2160 #ifdef DEBUG
2161                 printk("SNDCTL_DSP_GETTRIGGER 0x%x\n", dmabuf->trigger);
2162 #endif
2163                 return put_user(dmabuf->trigger, (int *)arg);
2164
2165         case SNDCTL_DSP_SETTRIGGER:
2166                 if (get_user(val, (int *)arg))
2167                         return -EFAULT;
2168 #if defined(DEBUG) || defined(DEBUG_MMAP)
2169                 printk("SNDCTL_DSP_SETTRIGGER 0x%x\n", val);
2170 #endif
2171                 if((file->f_mode & FMODE_READ) && !(val & PCM_ENABLE_INPUT) && dmabuf->enable == ADC_RUNNING) {
2172                         stop_adc(state);
2173                 }
2174                 if((file->f_mode & FMODE_WRITE) && !(val & PCM_ENABLE_OUTPUT) && dmabuf->enable == DAC_RUNNING) {
2175                         stop_dac(state);
2176                 }
2177                 dmabuf->trigger = val;
2178                 if((file->f_mode & FMODE_WRITE) && (val & PCM_ENABLE_OUTPUT) && !(dmabuf->enable & DAC_RUNNING)) {
2179                         if (!dmabuf->write_channel) {
2180                                 dmabuf->ready = 0;
2181                                 dmabuf->write_channel = state->card->alloc_pcm_channel(state->card);
2182                                 if (!dmabuf->write_channel)
2183                                         return -EBUSY;
2184                         }
2185                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 0)))
2186                                 return ret;
2187                         if (dmabuf->mapped) {
2188                                 spin_lock_irqsave(&state->card->lock, flags);
2189                                 i810_update_ptr(state);
2190                                 dmabuf->count = 0;
2191                                 dmabuf->swptr = dmabuf->hwptr;
2192                                 dmabuf->count = i810_get_free_write_space(state);
2193                                 dmabuf->swptr = (dmabuf->swptr + dmabuf->count) % dmabuf->dmasize;
2194                                 __i810_update_lvi(state, 0);
2195                                 spin_unlock_irqrestore(&state->card->lock, flags);
2196                         } else
2197                                 start_dac(state);
2198                 }
2199                 if((file->f_mode & FMODE_READ) && (val & PCM_ENABLE_INPUT) && !(dmabuf->enable & ADC_RUNNING)) {
2200                         if (!dmabuf->read_channel) {
2201                                 dmabuf->ready = 0;
2202                                 dmabuf->read_channel = state->card->alloc_rec_pcm_channel(state->card);
2203                                 if (!dmabuf->read_channel)
2204                                         return -EBUSY;
2205                         }
2206                         if (!dmabuf->ready && (ret = prog_dmabuf(state, 1)))
2207                                 return ret;
2208                         if (dmabuf->mapped) {
2209                                 spin_lock_irqsave(&state->card->lock, flags);
2210                                 i810_update_ptr(state);
2211                                 dmabuf->swptr = dmabuf->hwptr;
2212                                 dmabuf->count = 0;
2213                                 spin_unlock_irqrestore(&state->card->lock, flags);
2214                         }
2215                         i810_update_lvi(state, 1);
2216                         start_adc(state);
2217                 }
2218                 return 0;
2219
2220         case SNDCTL_DSP_SETDUPLEX:
2221 #ifdef DEBUG
2222                 printk("SNDCTL_DSP_SETDUPLEX\n");
2223 #endif
2224                 return -EINVAL;
2225
2226         case SNDCTL_DSP_GETODELAY:
2227                 if (!(file->f_mode & FMODE_WRITE))
2228                         return -EINVAL;
2229                 spin_lock_irqsave(&state->card->lock, flags);
2230                 i810_update_ptr(state);
2231                 val = dmabuf->count;
2232                 spin_unlock_irqrestore(&state->card->lock, flags);
2233 #ifdef DEBUG
2234                 printk("SNDCTL_DSP_GETODELAY %d\n", dmabuf->count);
2235 #endif
2236                 return put_user(val, (int *)arg);
2237
2238         case SOUND_PCM_READ_RATE:
2239 #ifdef DEBUG
2240                 printk("SOUND_PCM_READ_RATE %d\n", dmabuf->rate);
2241 #endif
2242                 return put_user(dmabuf->rate, (int *)arg);
2243
2244         case SOUND_PCM_READ_CHANNELS:
2245 #ifdef DEBUG
2246                 printk("SOUND_PCM_READ_CHANNELS\n");
2247 #endif
2248                 return put_user(2, (int *)arg);
2249
2250         case SOUND_PCM_READ_BITS:
2251 #ifdef DEBUG
2252                 printk("SOUND_PCM_READ_BITS\n");
2253 #endif
2254                 return put_user(AFMT_S16_LE, (int *)arg);
2255
2256         case SNDCTL_DSP_SETSPDIF: /* Set S/PDIF Control register */
2257 #ifdef DEBUG
2258                 printk("SNDCTL_DSP_SETSPDIF\n");
2259 #endif
2260                 if (get_user(val, (int *)arg))
2261                         return -EFAULT;
2262
2263                 /* Check to make sure the codec supports S/PDIF transmitter */
2264
2265                 if((state->card->ac97_features & 4)) {
2266                         /* mask out the transmitter speed bits so the user can't set them */
2267                         val &= ~0x3000;
2268
2269                         /* Add the current transmitter speed bits to the passed value */
2270                         ret = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2271                         val |= (ret & 0x3000);
2272
2273                         i810_ac97_set(codec, AC97_SPDIF_CONTROL, val);
2274                         if(i810_ac97_get(codec, AC97_SPDIF_CONTROL) != val ) {
2275                                 printk(KERN_ERR "i810_audio: Unable to set S/PDIF configuration to 0x%04x.\n", val);
2276                                 return -EFAULT;
2277                         }
2278                 }
2279 #ifdef DEBUG
2280                 else
2281                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2282 #endif
2283                 return put_user(val, (int *)arg);
2284
2285         case SNDCTL_DSP_GETSPDIF: /* Get S/PDIF Control register */
2286 #ifdef DEBUG
2287                 printk("SNDCTL_DSP_GETSPDIF\n");
2288 #endif
2289                 if (get_user(val, (int *)arg))
2290                         return -EFAULT;
2291
2292                 /* Check to make sure the codec supports S/PDIF transmitter */
2293
2294                 if(!(state->card->ac97_features & 4)) {
2295 #ifdef DEBUG
2296                         printk(KERN_WARNING "i810_audio: S/PDIF transmitter not avalible.\n");
2297 #endif
2298                         val = 0;
2299                 } else {
2300                         val = i810_ac97_get(codec, AC97_SPDIF_CONTROL);
2301                 }
2302                 //return put_user((val & 0xcfff), (int *)arg);
2303                 return put_user(val, (int *)arg);
2304
2305         case SNDCTL_DSP_GETCHANNELMASK:
2306 #ifdef DEBUG
2307                 printk("SNDCTL_DSP_GETCHANNELMASK\n");
2308 #endif
2309                 if (get_user(val, (int *)arg))
2310                         return -EFAULT;
2311
2312                 /* Based on AC'97 DAC support, not ICH hardware */
2313                 val = DSP_BIND_FRONT;
2314                 if ( state->card->ac97_features & 0x0004 )
2315                         val |= DSP_BIND_SPDIF;
2316
2317                 if ( state->card->ac97_features & 0x0080 )
2318                         val |= DSP_BIND_SURR;
2319                 if ( state->card->ac97_features & 0x0140 )
2320                         val |= DSP_BIND_CENTER_LFE;
2321
2322                 return put_user(val, (int *)arg);
2323
2324         case SNDCTL_DSP_BIND_CHANNEL:
2325 #ifdef DEBUG
2326                 printk("SNDCTL_DSP_BIND_CHANNEL\n");
2327 #endif
2328                 if (get_user(val, (int *)arg))
2329                         return -EFAULT;
2330                 if ( val == DSP_BIND_QUERY ) {
2331                         val = DSP_BIND_FRONT; /* Always report this as being enabled */
2332                         if ( state->card->ac97_status & SPDIF_ON )
2333                                 val |= DSP_BIND_SPDIF;
2334                         else {
2335                                 if ( state->card->ac97_status & SURR_ON )
2336                                         val |= DSP_BIND_SURR;
2337                                 if ( state->card->ac97_status & CENTER_LFE_ON )
2338                                         val |= DSP_BIND_CENTER_LFE;
2339                         }
2340                 } else {  /* Not a query, set it */
2341                         if (!(file->f_mode & FMODE_WRITE))
2342                                 return -EINVAL;
2343                         if ( dmabuf->enable == DAC_RUNNING ) {
2344                                 stop_dac(state);
2345                         }
2346                         if ( val & DSP_BIND_SPDIF ) {  /* Turn on SPDIF */
2347                                 /*  Ok, this should probably define what slots
2348                                  *  to use. For now, we'll only set it to the
2349                                  *  defaults:
2350                                  *
2351                                  *   non multichannel codec maps to slots 3&4
2352                                  *   2 channel codec maps to slots 7&8
2353                                  *   4 channel codec maps to slots 6&9
2354                                  *   6 channel codec maps to slots 10&11
2355                                  *
2356                                  *  there should be some way for the app to
2357                                  *  select the slot assignment.
2358                                  */
2359
2360                                 i810_set_spdif_output ( state, AC97_EA_SPSA_3_4, dmabuf->rate );
2361                                 if ( !(state->card->ac97_status & SPDIF_ON) )
2362                                         val &= ~DSP_BIND_SPDIF;
2363                         } else {
2364                                 int mask;
2365                                 int channels;
2366
2367                                 /* Turn off S/PDIF if it was on */
2368                                 if ( state->card->ac97_status & SPDIF_ON )
2369                                         i810_set_spdif_output ( state, -1, 0 );
2370
2371                                 mask = val & (DSP_BIND_FRONT | DSP_BIND_SURR | DSP_BIND_CENTER_LFE);
2372                                 switch (mask) {
2373                                         case DSP_BIND_FRONT:
2374                                                 channels = 2;
2375                                                 break;
2376                                         case DSP_BIND_FRONT|DSP_BIND_SURR:
2377                                                 channels = 4;
2378                                                 break;
2379                                         case DSP_BIND_FRONT|DSP_BIND_SURR|DSP_BIND_CENTER_LFE:
2380                                                 channels = 6;
2381                                                 break;
2382                                         default:
2383                                                 val = DSP_BIND_FRONT;
2384                                                 channels = 2;
2385                                                 break;
2386                                 }
2387                                 i810_set_dac_channels ( state, channels );
2388
2389                                 /* check that they really got turned on */
2390                                 if (!(state->card->ac97_status & SURR_ON))
2391                                         val &= ~DSP_BIND_SURR;
2392                                 if (!(state->card->ac97_status & CENTER_LFE_ON))
2393                                         val &= ~DSP_BIND_CENTER_LFE;
2394                         }
2395                 }
2396                 return put_user(val, (int *)arg);
2397
2398         case SNDCTL_DSP_MAPINBUF:
2399         case SNDCTL_DSP_MAPOUTBUF:
2400         case SNDCTL_DSP_SETSYNCRO:
2401         case SOUND_PCM_WRITE_FILTER:
2402         case SOUND_PCM_READ_FILTER:
2403 #ifdef DEBUG
2404                 printk("SNDCTL_* -EINVAL\n");
2405 #endif
2406                 return -EINVAL;
2407         }
2408         return -EINVAL;
2409 }
2410
2411 static int i810_open(struct inode *inode, struct file *file)
2412 {
2413         int i = 0;
2414         struct i810_card *card = devs;
2415         struct i810_state *state = NULL;
2416         struct dmabuf *dmabuf = NULL;
2417
2418         /* find an avaiable virtual channel (instance of /dev/dsp) */
2419         while (card != NULL) {
2420                 /*
2421                  * If we are initializing and then fail, card could go
2422                  * away unuexpectedly while we are in the for() loop.
2423                  * So, check for card on each iteration before we check
2424                  * for card->initializing to avoid a possible oops.
2425                  * This usually only matters for times when the driver is
2426                  * autoloaded by kmod.
2427                  */
2428                 for (i = 0; i < 50 && card && card->initializing; i++) {
2429                         set_current_state(TASK_UNINTERRUPTIBLE);
2430                         schedule_timeout(HZ/20);
2431                 }
2432                 for (i = 0; i < NR_HW_CH && card && !card->initializing; i++) {
2433                         if (card->states[i] == NULL) {
2434                                 state = card->states[i] = (struct i810_state *)
2435                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
2436                                 if (state == NULL)
2437                                         return -ENOMEM;
2438                                 memset(state, 0, sizeof(struct i810_state));
2439                                 dmabuf = &state->dmabuf;
2440                                 goto found_virt;
2441                         }
2442                 }
2443                 card = card->next;
2444         }
2445         /* no more virtual channel avaiable */
2446         if (!state)
2447                 return -ENODEV;
2448
2449 found_virt:
2450         /* initialize the virtual channel */
2451         state->virt = i;
2452         state->card = card;
2453         state->magic = I810_STATE_MAGIC;
2454         init_waitqueue_head(&dmabuf->wait);
2455         init_MUTEX(&state->open_sem);
2456         file->private_data = state;
2457         dmabuf->trigger = 0;
2458
2459         /* allocate hardware channels */
2460         if(file->f_mode & FMODE_READ) {
2461                 if((dmabuf->read_channel = card->alloc_rec_pcm_channel(card)) == NULL) {
2462                         kfree (card->states[i]);
2463                         card->states[i] = NULL;;
2464                         return -EBUSY;
2465                 }
2466                 dmabuf->trigger |= PCM_ENABLE_INPUT;
2467                 i810_set_adc_rate(state, 8000);
2468         }
2469         if(file->f_mode & FMODE_WRITE) {
2470                 if((dmabuf->write_channel = card->alloc_pcm_channel(card)) == NULL) {
2471                         /* make sure we free the record channel allocated above */
2472                         if(file->f_mode & FMODE_READ)
2473                                 card->free_pcm_channel(card,dmabuf->read_channel->num);
2474                         kfree (card->states[i]);
2475                         card->states[i] = NULL;;
2476                         return -EBUSY;
2477                 }
2478                 /* Initialize to 8kHz?  What if we don't support 8kHz? */
2479                 /*  Let's change this to check for S/PDIF stuff */
2480
2481                 dmabuf->trigger |= PCM_ENABLE_OUTPUT;
2482                 if ( spdif_locked ) {
2483                         i810_set_dac_rate(state, spdif_locked);
2484                         i810_set_spdif_output(state, AC97_EA_SPSA_3_4, spdif_locked);
2485                 } else {
2486                         i810_set_dac_rate(state, 8000);
2487                         /* Put the ACLink in 2 channel mode by default */
2488                         i = inl(card->iobase + GLOB_CNT);
2489                         outl(i & 0xffcfffff, card->iobase + GLOB_CNT);
2490                 }
2491         }
2492
2493         /* set default sample format. According to OSS Programmer's Guide  /dev/dsp
2494            should be default to unsigned 8-bits, mono, with sample rate 8kHz and
2495            /dev/dspW will accept 16-bits sample, but we don't support those so we
2496            set it immediately to stereo and 16bit, which is all we do support */
2497         dmabuf->fmt |= I810_FMT_16BIT | I810_FMT_STEREO;
2498         dmabuf->ossfragsize = 0;
2499         dmabuf->ossmaxfrags  = 0;
2500         dmabuf->subdivision  = 0;
2501
2502         state->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
2503
2504         return 0;
2505 }
2506
2507 static int i810_release(struct inode *inode, struct file *file)
2508 {
2509         struct i810_state *state = (struct i810_state *)file->private_data;
2510         struct i810_card *card = state->card;
2511         struct dmabuf *dmabuf = &state->dmabuf;
2512         unsigned long flags;
2513
2514         lock_kernel();
2515
2516         /* stop DMA state machine and free DMA buffers/channels */
2517         if(dmabuf->trigger & PCM_ENABLE_OUTPUT) {
2518                 drain_dac(state, 0);
2519         }
2520         if(dmabuf->trigger & PCM_ENABLE_INPUT) {
2521                 stop_adc(state);
2522         }
2523         spin_lock_irqsave(&card->lock, flags);
2524         dealloc_dmabuf(state);
2525         if (file->f_mode & FMODE_WRITE) {
2526                 state->card->free_pcm_channel(state->card, dmabuf->write_channel->num);
2527         }
2528         if (file->f_mode & FMODE_READ) {
2529                 state->card->free_pcm_channel(state->card, dmabuf->read_channel->num);
2530         }
2531
2532         state->card->states[state->virt] = NULL;
2533         kfree(state);
2534         spin_unlock_irqrestore(&card->lock, flags);
2535         unlock_kernel();
2536
2537         return 0;
2538 }
2539
2540 static /*const*/ struct file_operations i810_audio_fops = {
2541         .owner          = THIS_MODULE,
2542         .llseek         = no_llseek,
2543         .read           = i810_read,
2544         .write          = i810_write,
2545         .poll           = i810_poll,
2546         .ioctl          = i810_ioctl,
2547         .mmap           = i810_mmap,
2548         .open           = i810_open,
2549         .release        = i810_release,
2550 };
2551
2552 /* Write AC97 codec registers */
2553
2554 static u16 i810_ac97_get_mmio(struct ac97_codec *dev, u8 reg)
2555 {
2556         struct i810_card *card = dev->private_data;
2557         int count = 100;
2558         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2559
2560         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2561                 udelay(1);
2562
2563 #ifdef DEBUG_MMIO
2564         {
2565                 u16 ans = readw(card->ac97base_mmio + reg_set);
2566                 printk(KERN_DEBUG "i810_audio: ac97_get_mmio(%d) -> 0x%04X\n", ((int) reg_set) & 0xffff, (u32) ans);
2567                 return ans;
2568         }
2569 #else
2570         return readw(card->ac97base_mmio + reg_set);
2571 #endif
2572 }
2573
2574 static u16 i810_ac97_get_io(struct ac97_codec *dev, u8 reg)
2575 {
2576         struct i810_card *card = dev->private_data;
2577         int count = 100;
2578         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2579
2580         while(count-- && (inb(card->iobase + CAS) & 1))
2581                 udelay(1);
2582
2583         return inw(card->ac97base + reg_set);
2584 }
2585
2586 static void i810_ac97_set_mmio(struct ac97_codec *dev, u8 reg, u16 data)
2587 {
2588         struct i810_card *card = dev->private_data;
2589         int count = 100;
2590         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2591
2592         while(count-- && (readb(card->iobase_mmio + CAS) & 1))
2593                 udelay(1);
2594
2595         writew(data, card->ac97base_mmio + reg_set);
2596
2597 #ifdef DEBUG_MMIO
2598         printk(KERN_DEBUG "i810_audio: ac97_set_mmio(0x%04X, %d)\n", (u32) data, ((int) reg_set) & 0xffff);
2599 #endif
2600 }
2601
2602 static void i810_ac97_set_io(struct ac97_codec *dev, u8 reg, u16 data)
2603 {
2604         struct i810_card *card = dev->private_data;
2605         int count = 100;
2606         u16 reg_set = IO_REG_OFF(dev) | (reg&0x7f);
2607
2608         while(count-- && (inb(card->iobase + CAS) & 1))
2609                 udelay(1);
2610
2611         outw(data, card->ac97base + reg_set);
2612 }
2613
2614 static u16 i810_ac97_get(struct ac97_codec *dev, u8 reg)
2615 {
2616         struct i810_card *card = dev->private_data;
2617         u16 ret;
2618
2619         spin_lock(&card->ac97_lock);
2620         if (card->use_mmio) {
2621                 ret = i810_ac97_get_mmio(dev, reg);
2622         }
2623         else {
2624                 ret = i810_ac97_get_io(dev, reg);
2625         }
2626         spin_unlock(&card->ac97_lock);
2627
2628         return ret;
2629 }
2630
2631 static void i810_ac97_set(struct ac97_codec *dev, u8 reg, u16 data)
2632 {
2633         struct i810_card *card = dev->private_data;
2634
2635         spin_lock(&card->ac97_lock);
2636         if (card->use_mmio) {
2637                 i810_ac97_set_mmio(dev, reg, data);
2638         }
2639         else {
2640                 i810_ac97_set_io(dev, reg, data);
2641         }
2642         spin_unlock(&card->ac97_lock);
2643 }
2644
2645
2646 /* OSS /dev/mixer file operation methods */
2647
2648 static int i810_open_mixdev(struct inode *inode, struct file *file)
2649 {
2650         int i;
2651         int minor = minor(inode->i_rdev);
2652         struct i810_card *card = devs;
2653
2654         for (card = devs; card != NULL; card = card->next) {
2655                 /*
2656                  * If we are initializing and then fail, card could go
2657                  * away unuexpectedly while we are in the for() loop.
2658                  * So, check for card on each iteration before we check
2659                  * for card->initializing to avoid a possible oops.
2660                  * This usually only matters for times when the driver is
2661                  * autoloaded by kmod.
2662                  */
2663                 for (i = 0; i < 50 && card && card->initializing; i++) {
2664                         set_current_state(TASK_UNINTERRUPTIBLE);
2665                         schedule_timeout(HZ/20);
2666                 }
2667                 for (i = 0; i < NR_AC97 && card && !card->initializing; i++)
2668                         if (card->ac97_codec[i] != NULL &&
2669                             card->ac97_codec[i]->dev_mixer == minor) {
2670                                 file->private_data = card->ac97_codec[i];
2671                                 return 0;
2672                         }
2673         }
2674         return -ENODEV;
2675 }
2676
2677 static int i810_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd,
2678                                 unsigned long arg)
2679 {
2680         struct ac97_codec *codec = (struct ac97_codec *)file->private_data;
2681
2682         return codec->mixer_ioctl(codec, cmd, arg);
2683 }
2684
2685 static /*const*/ struct file_operations i810_mixer_fops = {
2686         .owner          = THIS_MODULE,
2687         .llseek         = no_llseek,
2688         .ioctl          = i810_ioctl_mixdev,
2689         .open           = i810_open_mixdev,
2690 };
2691
2692 /* AC97 codec initialisation.  These small functions exist so we don't
2693    duplicate code between module init and apm resume */
2694
2695 static inline int i810_ac97_exists(struct i810_card *card, int ac97_number)
2696 {
2697         u32 reg = inl(card->iobase + GLOB_STA);
2698         switch (ac97_number) {
2699         case 0:
2700                 return reg & (1<<8);
2701         case 1:
2702                 return reg & (1<<9);
2703         case 2:
2704                 return reg & (1<<28);
2705         }
2706         return 0;
2707 }
2708
2709 static inline int i810_ac97_enable_variable_rate(struct ac97_codec *codec)
2710 {
2711         i810_ac97_set(codec, AC97_EXTENDED_STATUS, 9);
2712         i810_ac97_set(codec,AC97_EXTENDED_STATUS,
2713                       i810_ac97_get(codec, AC97_EXTENDED_STATUS)|0xE800);
2714
2715         return (i810_ac97_get(codec, AC97_EXTENDED_STATUS)&1);
2716 }
2717
2718
2719 static int i810_ac97_probe_and_powerup(struct i810_card *card,struct ac97_codec *codec)
2720 {
2721         /* Returns 0 on failure */
2722         int i;
2723
2724         if (ac97_probe_codec(codec) == 0) return 0;
2725
2726         /* power it all up */
2727         i810_ac97_set(codec, AC97_POWER_CONTROL,
2728                       i810_ac97_get(codec, AC97_POWER_CONTROL) & ~0x7f00);
2729
2730         /* wait for analog ready */
2731         for (i=10; i && ((i810_ac97_get(codec, AC97_POWER_CONTROL) & 0xf) != 0xf); i--)
2732         {
2733                 set_current_state(TASK_UNINTERRUPTIBLE);
2734                 schedule_timeout(HZ/20);
2735         }
2736         return i;
2737 }
2738
2739 /**
2740  *      i810_ac97_power_up_bus  -       bring up AC97 link
2741  *      @card : ICH audio device to power up
2742  *
2743  *      Bring up the ACLink AC97 codec bus
2744  */
2745
2746 static int i810_ac97_power_up_bus(struct i810_card *card)
2747 {
2748         u32 reg = inl(card->iobase + GLOB_CNT);
2749         int i;
2750         int primary_codec_id = 0;
2751
2752         if((reg&2)==0)  /* Cold required */
2753                 reg|=2;
2754         else
2755                 reg|=4; /* Warm */
2756
2757         reg&=~8;        /* ACLink on */
2758
2759         /* At this point we deassert AC_RESET # */
2760         outl(reg , card->iobase + GLOB_CNT);
2761
2762         /* We must now allow time for the Codec initialisation.
2763            600mS is the specified time */
2764
2765         for(i=0;i<10;i++)
2766         {
2767                 if((inl(card->iobase+GLOB_CNT)&4)==0)
2768                         break;
2769
2770                 set_current_state(TASK_UNINTERRUPTIBLE);
2771                 schedule_timeout(HZ/20);
2772         }
2773         if(i==10)
2774         {
2775                 printk(KERN_ERR "i810_audio: AC'97 reset failed.\n");
2776                 return 0;
2777         }
2778
2779         set_current_state(TASK_UNINTERRUPTIBLE);
2780         schedule_timeout(HZ/2);
2781
2782         /*
2783          *      See if the primary codec comes ready. This must happen
2784          *      before we start doing DMA stuff
2785          */
2786         /* see i810_ac97_init for the next 7 lines (jsaw) */
2787         inw(card->ac97base);
2788         if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5)
2789             && (card->use_mmio)) {
2790                 primary_codec_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2791                 printk(KERN_INFO "i810_audio: Primary codec has ID %d\n",
2792                        primary_codec_id);
2793         }
2794
2795         if(! i810_ac97_exists(card, primary_codec_id))
2796         {
2797                 printk(KERN_INFO "i810_audio: Codec not ready.. wait.. ");
2798                 set_current_state(TASK_UNINTERRUPTIBLE);
2799                 schedule_timeout(HZ);   /* actually 600mS by the spec */
2800
2801                 if(i810_ac97_exists(card, primary_codec_id))
2802                         printk("OK\n");
2803                 else
2804                         printk("no response.\n");
2805         }
2806         inw(card->ac97base);
2807         return 1;
2808 }
2809
2810 static int __init i810_ac97_init(struct i810_card *card)
2811 {
2812         int num_ac97 = 0;
2813         int ac97_id;
2814         int total_channels = 0;
2815         int nr_ac97_max = card_cap[card->pci_id_internal].nr_ac97;
2816         struct ac97_codec *codec;
2817         u16 eid;
2818         u32 reg;
2819
2820         if(!i810_ac97_power_up_bus(card)) return 0;
2821
2822         /* Number of channels supported */
2823         /* What about the codec?  Just because the ICH supports */
2824         /* multiple channels doesn't mean the codec does.       */
2825         /* we'll have to modify this in the codec section below */
2826         /* to reflect what the codec has.                       */
2827         /* ICH and ICH0 only support 2 channels so don't bother */
2828         /* to check....                                         */
2829
2830         card->channels = 2;
2831         reg = inl(card->iobase + GLOB_STA);
2832         if ( reg & 0x0200000 )
2833                 card->channels = 6;
2834         else if ( reg & 0x0100000 )
2835                 card->channels = 4;
2836         printk(KERN_INFO "i810_audio: Audio Controller supports %d channels.\n", card->channels);
2837         printk(KERN_INFO "i810_audio: Defaulting to base 2 channel mode.\n");
2838         reg = inl(card->iobase + GLOB_CNT);
2839         outl(reg & 0xffcfffff, card->iobase + GLOB_CNT);
2840
2841         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++)
2842                 card->ac97_codec[num_ac97] = NULL;
2843
2844         /*@FIXME I don't know, if I'm playing to safe here... (jsaw) */
2845         if ((nr_ac97_max > 2) && !card->use_mmio) nr_ac97_max = 2;
2846
2847         for (num_ac97 = 0; num_ac97 < nr_ac97_max; num_ac97++) {
2848                 /* codec reset */
2849                 printk(KERN_INFO "i810_audio: Resetting connection %d\n", num_ac97);
2850                 if (card->use_mmio) readw(card->ac97base_mmio + 0x80*num_ac97);
2851                 else inw(card->ac97base + 0x80*num_ac97);
2852
2853                 /* If we have the SDATA_IN Map Register, as on ICH4, we
2854                    do not loop thru all possible codec IDs but thru all
2855                    possible IO channels. Bit 0:1 of SDM then holds the
2856                    last codec ID spoken to.
2857                 */
2858                 if ((card->pci_id == PCI_DEVICE_ID_INTEL_ICH4 || card->pci_id == PCI_DEVICE_ID_INTEL_ICH5)
2859                     && (card->use_mmio)) {
2860                         ac97_id = (int) readl(card->iobase_mmio + SDM) & 0x3;
2861                         printk(KERN_INFO "i810_audio: Connection %d with codec id %d\n",
2862                                num_ac97, ac97_id);
2863                 }
2864                 else {
2865                         ac97_id = num_ac97;
2866                 }
2867
2868                 /* The ICH programmer's reference says you should   */
2869                 /* check the ready status before probing. So we chk */
2870                 /*   What do we do if it's not ready?  Wait and try */
2871                 /*   again, or abort?                               */
2872                 if (!i810_ac97_exists(card, ac97_id)) {
2873                         if(num_ac97 == 0)
2874                                 printk(KERN_ERR "i810_audio: Primary codec not ready.\n");
2875                 }
2876
2877                 if ((codec = ac97_alloc_codec()) == NULL)
2878                         return -ENOMEM;
2879
2880                 /* initialize some basic codec information, other fields will be filled
2881                    in ac97_probe_codec */
2882                 codec->private_data = card;
2883                 codec->id = ac97_id;
2884                 card->ac97_id_map[ac97_id] = num_ac97 * 0x80;
2885
2886                 if (card->use_mmio) {
2887                         codec->codec_read = i810_ac97_get_mmio;
2888                         codec->codec_write = i810_ac97_set_mmio;
2889                 }
2890                 else {
2891                         codec->codec_read = i810_ac97_get_io;
2892                         codec->codec_write = i810_ac97_set_io;
2893                 }
2894
2895                 if(!i810_ac97_probe_and_powerup(card,codec)) {
2896                         printk(KERN_ERR "i810_audio: timed out waiting for codec %d analog ready.\n", ac97_id);
2897                         ac97_release_codec(codec);
2898                         break;  /* it didn't work */
2899                 }
2900                 /* Store state information about S/PDIF transmitter */
2901                 card->ac97_status = 0;
2902
2903                 /* Don't attempt to get eid until powerup is complete */
2904                 eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
2905
2906                 if(eid==0xFFFF)
2907                 {
2908                         printk(KERN_WARNING "i810_audio: no codec attached ?\n");
2909                         ac97_release_codec(codec);
2910                         break;
2911                 }
2912
2913                 /* Check for an AC97 1.0 soft modem (ID1) */
2914
2915                 if(codec->modem)
2916                 {
2917                         printk(KERN_WARNING "i810_audio: codec %d is a softmodem - skipping.\n", ac97_id);
2918                         ac97_release_codec(codec);
2919                         continue;
2920                 }
2921
2922                 card->ac97_features = eid;
2923
2924                 /* Now check the codec for useful features to make up for
2925                    the dumbness of the 810 hardware engine */
2926
2927                 if(!(eid&0x0001))
2928                         printk(KERN_WARNING "i810_audio: only 48Khz playback available.\n");
2929                 else
2930                 {
2931                         if(!i810_ac97_enable_variable_rate(codec)) {
2932                                 printk(KERN_WARNING "i810_audio: Codec refused to allow VRA, using 48Khz only.\n");
2933                                 card->ac97_features&=~1;
2934                         }
2935                 }
2936
2937                 /* Turn on the amplifier */
2938
2939                 codec->codec_write(codec, AC97_POWER_CONTROL,
2940                          codec->codec_read(codec, AC97_POWER_CONTROL) & ~0x8000);
2941
2942                 /* Determine how many channels the codec(s) support   */
2943                 /*   - The primary codec always supports 2            */
2944                 /*   - If the codec supports AMAP, surround DACs will */
2945                 /*     automaticlly get assigned to slots.            */
2946                 /*     * Check for surround DACs and increment if     */
2947                 /*       found.                                       */
2948                 /*   - Else check if the codec is revision 2.2        */
2949                 /*     * If surround DACs exist, assign them to slots */
2950                 /*       and increment channel count.                 */
2951
2952                 /* All of this only applies to ICH2 and above. ICH    */
2953                 /* and ICH0 only support 2 channels.  ICH2 will only  */
2954                 /* support multiple codecs in a "split audio" config. */
2955                 /* as described above.                                */
2956
2957                 /* TODO: Remove all the debugging messages!           */
2958
2959                 if((eid & 0xc000) == 0) /* primary codec */
2960                         total_channels += 2;
2961
2962                 if(eid & 0x200) { /* GOOD, AMAP support */
2963                         if (eid & 0x0080) /* L/R Surround channels */
2964                                 total_channels += 2;
2965                         if (eid & 0x0140) /* LFE and Center channels */
2966                                 total_channels += 2;
2967                         printk("i810_audio: AC'97 codec %d supports AMAP, total channels = %d\n", ac97_id, total_channels);
2968                 } else if (eid & 0x0400) {  /* this only works on 2.2 compliant codecs */
2969                         eid &= 0xffcf;
2970                         if((eid & 0xc000) != 0) {
2971                                 switch ( total_channels ) {
2972                                         case 2:
2973                                                 /* Set dsa1, dsa0 to 01 */
2974                                                 eid |= 0x0010;
2975                                                 break;
2976                                         case 4:
2977                                                 /* Set dsa1, dsa0 to 10 */
2978                                                 eid |= 0x0020;
2979                                                 break;
2980                                         case 6:
2981                                                 /* Set dsa1, dsa0 to 11 */
2982                                                 eid |= 0x0030;
2983                                                 break;
2984                                 }
2985                                 total_channels += 2;
2986                         }
2987                         i810_ac97_set(codec, AC97_EXTENDED_ID, eid);
2988                         eid = i810_ac97_get(codec, AC97_EXTENDED_ID);
2989                         printk("i810_audio: AC'97 codec %d, new EID value = 0x%04x\n", ac97_id, eid);
2990                         if (eid & 0x0080) /* L/R Surround channels */
2991                                 total_channels += 2;
2992                         if (eid & 0x0140) /* LFE and Center channels */
2993                                 total_channels += 2;
2994                         printk("i810_audio: AC'97 codec %d, DAC map configured, total channels = %d\n", ac97_id, total_channels);
2995                 } else {
2996                         printk("i810_audio: AC'97 codec %d Unable to map surround DAC's (or DAC's not present), total channels = %d\n", ac97_id, total_channels);
2997                 }
2998
2999                 if ((codec->dev_mixer = register_sound_mixer(&i810_mixer_fops, -1)) < 0) {
3000                         printk(KERN_ERR "i810_audio: couldn't register mixer!\n");
3001                         ac97_release_codec(codec);
3002                         break;
3003                 }
3004
3005                 card->ac97_codec[num_ac97] = codec;
3006         }
3007
3008         /* pick the minimum of channels supported by ICHx or codec(s) */
3009         card->channels = (card->channels > total_channels)?total_channels:card->channels;
3010
3011         return num_ac97;
3012 }
3013
3014 static void __init i810_configure_clocking (void)
3015 {
3016         struct i810_card *card;
3017         struct i810_state *state;
3018         struct dmabuf *dmabuf;
3019         unsigned int i, offset, new_offset;
3020         unsigned long flags;
3021
3022         card = devs;
3023         /* We could try to set the clocking for multiple cards, but can you even have
3024          * more than one i810 in a machine?  Besides, clocking is global, so unless
3025          * someone actually thinks more than one i810 in a machine is possible and
3026          * decides to rewrite that little bit, setting the rate for more than one card
3027          * is a waste of time.
3028          */
3029         if(card != NULL) {
3030                 state = card->states[0] = (struct i810_state *)
3031                                         kmalloc(sizeof(struct i810_state), GFP_KERNEL);
3032                 if (state == NULL)
3033                         return;
3034                 memset(state, 0, sizeof(struct i810_state));
3035                 dmabuf = &state->dmabuf;
3036
3037                 dmabuf->write_channel = card->alloc_pcm_channel(card);
3038                 state->virt = 0;
3039                 state->card = card;
3040                 state->magic = I810_STATE_MAGIC;
3041                 init_waitqueue_head(&dmabuf->wait);
3042                 init_MUTEX(&state->open_sem);
3043                 dmabuf->fmt = I810_FMT_STEREO | I810_FMT_16BIT;
3044                 dmabuf->trigger = PCM_ENABLE_OUTPUT;
3045                 i810_set_spdif_output(state, -1, 0);
3046                 i810_set_dac_channels(state, 2);
3047                 i810_set_dac_rate(state, 48000);
3048                 if(prog_dmabuf(state, 0) != 0) {
3049                         goto config_out_nodmabuf;
3050                 }
3051                 if(dmabuf->dmasize < 16384) {
3052                         goto config_out;
3053                 }
3054                 dmabuf->count = dmabuf->dmasize;
3055                 CIV_TO_LVI(card->iobase+dmabuf->write_channel->port, 31);
3056                 local_irq_save(flags);
3057                 start_dac(state);
3058                 offset = i810_get_dma_addr(state, 0);
3059                 mdelay(50);
3060                 new_offset = i810_get_dma_addr(state, 0);
3061                 stop_dac(state);
3062                 local_irq_restore(flags);
3063                 i = new_offset - offset;
3064 #ifdef DEBUG_INTERRUPTS
3065                 printk("i810_audio: %d bytes in 50 milliseconds\n", i);
3066 #endif
3067                 if(i == 0)
3068                         goto config_out;
3069                 i = i / 4 * 20;
3070                 if (i > 48500 || i < 47500) {
3071                         clocking = clocking * clocking / i;
3072                         printk("i810_audio: setting clocking to %d\n", clocking);
3073                 }
3074 config_out:
3075                 dealloc_dmabuf(state);
3076 config_out_nodmabuf:
3077                 state->card->free_pcm_channel(state->card,state->dmabuf.write_channel->num);
3078                 kfree(state);
3079                 card->states[0] = NULL;
3080         }
3081 }
3082
3083 /* install the driver, we do not allocate hardware channel nor DMA buffer now, they are defered
3084    until "ACCESS" time (in prog_dmabuf called by open/read/write/ioctl/mmap) */
3085
3086 static int __init i810_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_id)
3087 {
3088         struct i810_card *card;
3089
3090         if (pci_enable_device(pci_dev))
3091                 return -EIO;
3092
3093         if (pci_set_dma_mask(pci_dev, I810_DMA_MASK)) {
3094                 printk(KERN_ERR "intel810: architecture does not support"
3095                        " 32bit PCI busmaster DMA\n");
3096                 return -ENODEV;
3097         }
3098
3099         if ((card = kmalloc(sizeof(struct i810_card), GFP_KERNEL)) == NULL) {
3100                 printk(KERN_ERR "i810_audio: out of memory\n");
3101                 return -ENOMEM;
3102         }
3103         memset(card, 0, sizeof(*card));
3104
3105         card->initializing = 1;
3106         card->pci_dev = pci_dev;
3107         card->pci_id = pci_id->device;
3108         card->ac97base = pci_resource_start (pci_dev, 0);
3109         card->iobase = pci_resource_start (pci_dev, 1);
3110
3111         /* if chipset could have mmio capability, check it */
3112         if (card_cap[pci_id->driver_data].flags & CAP_MMIO) {
3113                 card->ac97base_mmio_phys = pci_resource_start (pci_dev, 2);
3114                 card->iobase_mmio_phys = pci_resource_start (pci_dev, 3);
3115
3116                 if ((card->ac97base_mmio_phys) && (card->iobase_mmio_phys)) {
3117                         card->use_mmio = 1;
3118                 }
3119                 else {
3120                         card->ac97base_mmio_phys = 0;
3121                         card->iobase_mmio_phys = 0;
3122                 }
3123         }
3124
3125         card->irq = pci_dev->irq;
3126         card->next = devs;
3127         card->magic = I810_CARD_MAGIC;
3128 #ifdef CONFIG_PM
3129         card->pm_suspended=0;
3130 #endif
3131         spin_lock_init(&card->lock);
3132         spin_lock_init(&card->ac97_lock);
3133         devs = card;
3134
3135         pci_set_master(pci_dev);
3136
3137         printk(KERN_INFO "i810: %s found at IO 0x%04lx and 0x%04lx, "
3138                "MEM 0x%04lx and 0x%04lx, IRQ %d\n",
3139                card_names[pci_id->driver_data],
3140                card->iobase, card->ac97base,
3141                card->ac97base_mmio_phys, card->iobase_mmio_phys,
3142                card->irq);
3143
3144         card->alloc_pcm_channel = i810_alloc_pcm_channel;
3145         card->alloc_rec_pcm_channel = i810_alloc_rec_pcm_channel;
3146         card->alloc_rec_mic_channel = i810_alloc_rec_mic_channel;
3147         card->free_pcm_channel = i810_free_pcm_channel;
3148
3149         if ((card->channel = pci_alloc_consistent(pci_dev,
3150             sizeof(struct i810_channel)*NR_HW_CH, &card->chandma)) == NULL) {
3151                 printk(KERN_ERR "i810: cannot allocate channel DMA memory\n");
3152                 goto out_mem;
3153         }
3154
3155         { /* We may dispose of this altogether some time soon, so... */
3156                 struct i810_channel *cp = card->channel;
3157
3158                 cp[0].offset = 0;
3159                 cp[0].port = 0x00;
3160                 cp[0].num = 0;
3161                 cp[1].offset = 0;
3162                 cp[1].port = 0x10;
3163                 cp[1].num = 1;
3164                 cp[2].offset = 0;
3165                 cp[2].port = 0x20;
3166                 cp[2].num = 2;
3167         }
3168
3169         /* claim our iospace and irq */
3170         request_region(card->iobase, 64, card_names[pci_id->driver_data]);
3171         request_region(card->ac97base, 256, card_names[pci_id->driver_data]);
3172
3173         if (request_irq(card->irq, &i810_interrupt, SA_SHIRQ,
3174                         card_names[pci_id->driver_data], card)) {
3175                 printk(KERN_ERR "i810_audio: unable to allocate irq %d\n", card->irq);
3176                 goto out_pio;
3177         }
3178
3179         if (card->use_mmio) {
3180                 if (request_mem_region(card->ac97base_mmio_phys, 512, "ich_audio MMBAR")) {
3181                         if ((card->ac97base_mmio = ioremap(card->ac97base_mmio_phys, 512))) { /*@FIXME can ioremap fail? don't know (jsaw) */
3182                                 if (request_mem_region(card->iobase_mmio_phys, 256, "ich_audio MBBAR")) {
3183                                         if ((card->iobase_mmio = ioremap(card->iobase_mmio_phys, 256))) {
3184                                                 printk(KERN_INFO "i810: %s mmio at 0x%04lx and 0x%04lx\n",
3185                                                        card_names[pci_id->driver_data],
3186                                                        (unsigned long) card->ac97base_mmio,
3187                                                        (unsigned long) card->iobase_mmio);
3188                                         }
3189                                         else {
3190                                                 iounmap(card->ac97base_mmio);
3191                                                 release_mem_region(card->ac97base_mmio_phys, 512);
3192                                                 release_mem_region(card->iobase_mmio_phys, 512);
3193                                                 card->use_mmio = 0;
3194                                         }
3195                                 }
3196                                 else {
3197                                         iounmap(card->ac97base_mmio);
3198                                         release_mem_region(card->ac97base_mmio_phys, 512);
3199                                         card->use_mmio = 0;
3200                                 }
3201                         }
3202                 }
3203                 else {
3204                         card->use_mmio = 0;
3205                 }
3206         }
3207
3208         /* initialize AC97 codec and register /dev/mixer */
3209         if (i810_ac97_init(card) <= 0) {
3210                 free_irq(card->irq, card);
3211                 goto out_iospace;
3212         }
3213         pci_set_drvdata(pci_dev, card);
3214
3215         if(clocking == 0) {
3216                 clocking = 48000;
3217                 i810_configure_clocking();
3218         }
3219
3220         /* register /dev/dsp */
3221         if ((card->dev_audio = register_sound_dsp(&i810_audio_fops, -1)) < 0) {
3222                 int i;
3223                 printk(KERN_ERR "i810_audio: couldn't register DSP device!\n");
3224                 free_irq(card->irq, card);
3225                 for (i = 0; i < NR_AC97; i++)
3226                 if (card->ac97_codec[i] != NULL) {
3227                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3228                         ac97_release_codec(card->ac97_codec[i]);
3229                 }
3230                 goto out_iospace;
3231         }
3232
3233         card->initializing = 0;
3234         return 0;
3235
3236 out_iospace:
3237         if (card->use_mmio) {
3238                 iounmap(card->ac97base_mmio);
3239                 iounmap(card->iobase_mmio);
3240                 release_mem_region(card->ac97base_mmio_phys, 512);
3241                 release_mem_region(card->iobase_mmio_phys, 256);
3242         }
3243 out_pio:
3244         release_region(card->iobase, 64);
3245         release_region(card->ac97base, 256);
3246         pci_free_consistent(pci_dev, sizeof(struct i810_channel)*NR_HW_CH,
3247             card->channel, card->chandma);
3248 out_mem:
3249         kfree(card);
3250         return -ENODEV;
3251 }
3252
3253 static void __devexit i810_remove(struct pci_dev *pci_dev)
3254 {
3255         int i;
3256         struct i810_card *card = pci_get_drvdata(pci_dev);
3257         /* free hardware resources */
3258         free_irq(card->irq, devs);
3259         release_region(card->iobase, 64);
3260         release_region(card->ac97base, 256);
3261         if (card->use_mmio) {
3262                 iounmap(card->ac97base_mmio);
3263                 iounmap(card->iobase_mmio);
3264                 release_mem_region(card->ac97base_mmio_phys, 512);
3265                 release_mem_region(card->iobase_mmio_phys, 256);
3266         }
3267
3268         /* unregister audio devices */
3269         for (i = 0; i < NR_AC97; i++)
3270                 if (card->ac97_codec[i] != NULL) {
3271                         unregister_sound_mixer(card->ac97_codec[i]->dev_mixer);
3272                         ac97_release_codec(card->ac97_codec[i]);
3273                         card->ac97_codec[i] = NULL;
3274                 }
3275         unregister_sound_dsp(card->dev_audio);
3276         kfree(card);
3277 }
3278
3279 #ifdef CONFIG_PM
3280 static int i810_pm_suspend(struct pci_dev *dev, u32 pm_state)
3281 {
3282         struct i810_card *card = pci_get_drvdata(dev);
3283         struct i810_state *state;
3284         unsigned long flags;
3285         struct dmabuf *dmabuf;
3286         int i,num_ac97;
3287 #ifdef DEBUG
3288         printk("i810_audio: i810_pm_suspend called\n");
3289 #endif
3290         if(!card) return 0;
3291         spin_lock_irqsave(&card->lock, flags);
3292         card->pm_suspended=1;
3293         for(i=0;i<NR_HW_CH;i++) {
3294                 state = card->states[i];
3295                 if(!state) continue;
3296                 /* this happens only if there are open files */
3297                 dmabuf = &state->dmabuf;
3298                 if(dmabuf->enable & DAC_RUNNING ||
3299                    (dmabuf->count && (dmabuf->trigger & PCM_ENABLE_OUTPUT))) {
3300                         state->pm_saved_dac_rate=dmabuf->rate;
3301                         stop_dac(state);
3302                 } else {
3303                         state->pm_saved_dac_rate=0;
3304                 }
3305                 if(dmabuf->enable & ADC_RUNNING) {
3306                         state->pm_saved_adc_rate=dmabuf->rate;
3307                         stop_adc(state);
3308                 } else {
3309                         state->pm_saved_adc_rate=0;
3310                 }
3311                 dmabuf->ready = 0;
3312                 dmabuf->swptr = dmabuf->hwptr = 0;
3313                 dmabuf->count = dmabuf->total_bytes = 0;
3314         }
3315
3316         spin_unlock_irqrestore(&card->lock, flags);
3317
3318         /* save mixer settings */
3319         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3320                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3321                 if(!codec) continue;
3322                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3323                         if((supported_mixer(codec,i)) &&
3324                            (codec->read_mixer)) {
3325                                 card->pm_saved_mixer_settings[i][num_ac97]=
3326                                         codec->read_mixer(codec,i);
3327                         }
3328                 }
3329         }
3330         pci_save_state(dev,card->pm_save_state); /* XXX do we need this? */
3331         pci_disable_device(dev); /* disable busmastering */
3332         pci_set_power_state(dev,3); /* Zzz. */
3333
3334         return 0;
3335 }
3336
3337
3338 static int i810_pm_resume(struct pci_dev *dev)
3339 {
3340         int num_ac97,i=0;
3341         struct i810_card *card=pci_get_drvdata(dev);
3342         pci_enable_device(dev);
3343         pci_restore_state (dev,card->pm_save_state);
3344
3345         /* observation of a toshiba portege 3440ct suggests that the
3346            hardware has to be more or less completely reinitialized from
3347            scratch after an apm suspend.  Works For Me.   -dan */
3348
3349         i810_ac97_power_up_bus(card);
3350
3351         for (num_ac97 = 0; num_ac97 < NR_AC97; num_ac97++) {
3352                 struct ac97_codec *codec = card->ac97_codec[num_ac97];
3353                 /* check they haven't stolen the hardware while we were
3354                    away */
3355                 if(!codec || !i810_ac97_exists(card,num_ac97)) {
3356                         if(num_ac97) continue;
3357                         else BUG();
3358                 }
3359                 if(!i810_ac97_probe_and_powerup(card,codec)) BUG();
3360
3361                 if((card->ac97_features&0x0001)) {
3362                         /* at probe time we found we could do variable
3363                            rates, but APM suspend has made it forget
3364                            its magical powers */
3365                         if(!i810_ac97_enable_variable_rate(codec)) BUG();
3366                 }
3367                 /* we lost our mixer settings, so restore them */
3368                 for(i=0;i< SOUND_MIXER_NRDEVICES ;i++) {
3369                         if(supported_mixer(codec,i)){
3370                                 int val=card->
3371                                         pm_saved_mixer_settings[i][num_ac97];
3372                                 codec->mixer_state[i]=val;
3373                                 codec->write_mixer(codec,i,
3374                                                    (val  & 0xff) ,
3375                                                    ((val >> 8)  & 0xff) );
3376                         }
3377                 }
3378         }
3379
3380         /* we need to restore the sample rate from whatever it was */
3381         for(i=0;i<NR_HW_CH;i++) {
3382                 struct i810_state * state=card->states[i];
3383                 if(state) {
3384                         if(state->pm_saved_adc_rate)
3385                                 i810_set_adc_rate(state,state->pm_saved_adc_rate);
3386                         if(state->pm_saved_dac_rate)
3387                                 i810_set_dac_rate(state,state->pm_saved_dac_rate);
3388                 }
3389         }
3390
3391
3392         card->pm_suspended = 0;
3393
3394         /* any processes that were reading/writing during the suspend
3395            probably ended up here */
3396         for(i=0;i<NR_HW_CH;i++) {
3397                 struct i810_state *state = card->states[i];
3398                 if(state) wake_up(&state->dmabuf.wait);
3399         }
3400
3401         return 0;
3402 }
3403 #endif /* CONFIG_PM */
3404
3405 MODULE_AUTHOR("");
3406 MODULE_DESCRIPTION("Intel 810 audio support");
3407 MODULE_LICENSE("GPL");
3408 MODULE_PARM(ftsodell, "i");
3409 MODULE_PARM(clocking, "i");
3410 MODULE_PARM(strict_clocking, "i");
3411 MODULE_PARM(spdif_locked, "i");
3412
3413 #define I810_MODULE_NAME "intel810_audio"
3414
3415 static struct pci_driver i810_pci_driver = {
3416         .name           = I810_MODULE_NAME,
3417         .id_table       = i810_pci_tbl,
3418         .probe          = i810_probe,
3419         .remove         = __devexit_p(i810_remove),
3420 #ifdef CONFIG_PM
3421         .suspend        = i810_pm_suspend,
3422         .resume         = i810_pm_resume,
3423 #endif /* CONFIG_PM */
3424 };
3425
3426
3427 static int __init i810_init_module (void)
3428 {
3429         printk(KERN_INFO "Intel 810 + AC97 Audio, version "
3430                DRIVER_VERSION ", " __TIME__ " " __DATE__ "\n");
3431
3432         if (!pci_register_driver(&i810_pci_driver)) {
3433                 pci_unregister_driver(&i810_pci_driver);
3434                 return -ENODEV;
3435         }
3436         if(ftsodell != 0) {
3437                 printk("i810_audio: ftsodell is now a deprecated option.\n");
3438         }
3439         if(spdif_locked > 0 ) {
3440                 if(spdif_locked == 32000 || spdif_locked == 44100 || spdif_locked == 48000) {
3441                         printk("i810_audio: Enabling S/PDIF at sample rate %dHz.\n", spdif_locked);
3442                 } else {
3443                         printk("i810_audio: S/PDIF can only be locked to 32000, 44100, or 48000Hz.\n");
3444                         spdif_locked = 0;
3445                 }
3446         }
3447
3448         return 0;
3449 }
3450
3451 static void __exit i810_cleanup_module (void)
3452 {
3453         pci_unregister_driver(&i810_pci_driver);
3454 }
3455
3456 module_init(i810_init_module);
3457 module_exit(i810_cleanup_module);
3458
3459 /*
3460 Local Variables:
3461 c-basic-offset: 8
3462 End:
3463 */