2 * Routines for control of the CS8427 via i2c bus
3 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
4 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <sound/driver.h>
24 #include <linux/slab.h>
25 #include <linux/delay.h>
26 #include <sound/core.h>
27 #include <sound/control.h>
28 #include <sound/pcm.h>
29 #include <sound/cs8427.h>
30 #include <sound/asoundef.h>
32 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
33 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
34 MODULE_LICENSE("GPL");
36 #define chip_t snd_i2c_device_t
38 #define CS8427_ADDR (0x20>>1) /* fixed address */
41 snd_pcm_substream_t *substream;
42 char hw_status[24]; /* hardware status */
43 char def_status[24]; /* default status */
44 char pcm_status[24]; /* PCM private status */
46 snd_kcontrol_t *pcm_ctl;
50 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
52 cs8427_stream_t playback;
53 cs8427_stream_t capture;
56 static unsigned char swapbits(unsigned char val)
59 unsigned char res = 0;
60 for (bit = 0; bit < 8; bit++) {
68 int snd_cs8427_detect(snd_i2c_bus_t *bus, unsigned char addr)
73 res = snd_i2c_probeaddr(bus, CS8427_ADDR | (addr & 7));
78 int snd_cs8427_reg_write(snd_i2c_device_t *device, unsigned char reg, unsigned char val)
85 if ((err = snd_i2c_sendbytes(device, buf, 2)) != 2) {
86 snd_printk("unable to send bytes 0x%02x:0x%02x to CS8427 (%i)\n", buf[0], buf[1], err);
87 return err < 0 ? err : -EIO;
92 int snd_cs8427_reg_read(snd_i2c_device_t *device, unsigned char reg)
97 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
98 snd_printk("unable to send register 0x%x byte to CS8427\n", reg);
99 return err < 0 ? err : -EIO;
101 if ((err = snd_i2c_readbytes(device, &buf, 1)) != 1) {
102 snd_printk("unable to read register 0x%x byte from CS8427\n", reg);
103 return err < 0 ? err : -EIO;
108 static int snd_cs8427_select_corudata(snd_i2c_device_t *device, int udata)
110 cs8427_t *chip = snd_magic_cast(cs8427_t, device->private_data, return -ENXIO);
113 udata = udata ? CS8427_BSEL : 0;
114 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
115 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
116 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
117 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF, chip->regmap[CS8427_REG_CSDATABUF]);
124 static int snd_cs8427_send_corudata(snd_i2c_device_t *device,
126 unsigned char *ndata,
129 cs8427_t *chip = snd_magic_cast(cs8427_t, device->private_data, return -ENXIO);
130 char *hw_data = udata ? chip->playback.hw_udata : chip->playback.hw_status;
134 if (!memcmp(hw_data, ndata, count))
136 if ((err = snd_cs8427_select_corudata(device, udata)) < 0)
138 memcpy(hw_data, ndata, count);
140 memset(data, 0, sizeof(data));
141 if (memcmp(hw_data, data, count) == 0) {
142 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
143 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS | CS8427_EFTUI;
144 if ((err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF, chip->regmap[CS8427_REG_UDATABUF])) < 0)
149 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
150 for (idx = 0; idx < count; idx++)
151 data[idx + 1] = swapbits(ndata[idx]);
152 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
157 static void snd_cs8427_free(snd_i2c_device_t *device)
159 if (device->private_data)
160 snd_magic_kfree(device->private_data);
163 int snd_cs8427_create(snd_i2c_bus_t *bus,
165 snd_i2c_device_t **r_cs8427)
167 static unsigned char initvals1[] = {
168 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
169 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes, TCBL=output */
170 CS8427_SWCLK | CS8427_TCBLDIR,
171 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs, normal stereo operation */
173 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial, Rx=>serial */
174 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
175 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs, output time base = OMCK, input time base =
176 recovered input clock, recovered input clock source is ILRCK changed to AES3INPUT (workaround, see snd_cs8427_reset) */
178 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S, 24-bit, 64*Fsi */
179 CS8427_SIDEL | CS8427_SILRPOL,
180 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format = I2S, 24-bit, 64*Fsi */
181 CS8427_SODEL | CS8427_SOLRPOL,
183 static unsigned char initvals2[] = {
184 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
185 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence, biphase, parity status bits */
186 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR, */
187 0xff, /* set everything */
188 /* CS8427_REG_CSDATABUF:
189 Registers 32-55 window to CS buffer
190 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
191 Inhibit D->E transfers (all) of CS data.
192 Allow E->F transfer of CS data.
193 One byte mode; both A/B channels get same written CB data.
194 A channel info is output to chip's EMPH* pin. */
195 CS8427_CBMR | CS8427_DETCI,
196 /* CS8427_REG_UDATABUF:
197 Use internal buffer to transmit User (U) data.
198 Chip's U pin is an output.
199 Transmit all O's for user data.
200 Inhibit D->E transfers.
201 Inhibit E->F transfers. */
202 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
206 snd_i2c_device_t *device;
207 unsigned char buf[24];
209 if ((err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7), &device)) < 0)
211 chip = device->private_data = snd_magic_kcalloc(cs8427_t, 0, GFP_KERNEL);
213 snd_i2c_device_free(device);
216 device->private_free = snd_cs8427_free;
219 if ((err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER)) != CS8427_VER8427A) {
221 snd_printk("unable to find CS8427 signature (expected 0x%x, read 0x%x), initialization is not completed\n", CS8427_VER8427A, err);
224 /* turn off run bit while making changes to configuration */
225 if ((err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00)) < 0)
227 /* send initial values */
228 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
229 if ((err = snd_i2c_sendbytes(device, initvals1, 7)) != 7) {
230 err = err < 0 ? err : -EIO;
233 /* Turn off CS8427 interrupt stuff that is not used in hardware */
235 /* from address 9 to 15 */
236 buf[0] = 9; /* register */
237 if ((err = snd_i2c_sendbytes(device, buf, 7)) != 7)
239 /* send transfer initialization sequence */
240 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
241 if ((err = snd_i2c_sendbytes(device, initvals2, 4)) != 4) {
242 err = err < 0 ? err : -EIO;
245 /* write default channel status bytes */
246 buf[0] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 0));
247 buf[1] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 8));
248 buf[2] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 16));
249 buf[3] = ((unsigned char)(SNDRV_PCM_DEFAULT_CON_SPDIF >> 24));
250 memset(buf + 4, 0, 24 - 4);
251 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
253 memcpy(chip->playback.def_status, buf, 24);
254 memcpy(chip->playback.pcm_status, buf, 24);
257 /* turn on run bit and rock'n'roll */
258 snd_cs8427_reset(device);
260 #if 0 // it's nice for read tests
265 snd_i2c_sendbytes(device, buf, 1);
266 snd_i2c_readbytes(device, buf, 127);
267 for (xx = 0; xx < 127; xx++)
268 printk("reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
278 snd_i2c_device_free(device);
279 return err < 0 ? err : -EIO;
283 * Reset the chip using run bit, also lock PLL using ILRCK and
284 * put back AES3INPUT. This workaround is described in latest
285 * CS8427 datasheet, otherwise TXDSERIAL will not work.
287 void snd_cs8427_reset(snd_i2c_device_t *cs8427)
290 unsigned long end_time;
293 snd_assert(cs8427, return);
294 chip = snd_magic_cast(cs8427_t, cs8427->private_data, return);
295 snd_i2c_lock(cs8427->bus);
296 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
297 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
299 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
300 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
302 snd_i2c_unlock(cs8427->bus);
303 end_time = jiffies + HZ / 2;
304 while (time_after_eq(end_time, jiffies)) {
305 snd_i2c_lock(cs8427->bus);
306 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
307 snd_i2c_unlock(cs8427->bus);
308 if (!(data & CS8427_UNLOCK))
310 set_current_state(TASK_UNINTERRUPTIBLE);
311 schedule_timeout(HZ/100);
313 snd_i2c_lock(cs8427->bus);
314 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
315 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
316 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE, chip->regmap[CS8427_REG_CLOCKSOURCE]);
317 snd_i2c_unlock(cs8427->bus);
320 static int snd_cs8427_in_status_info(snd_kcontrol_t *kcontrol,
321 snd_ctl_elem_info_t *uinfo)
323 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
325 uinfo->value.integer.min = 0;
326 uinfo->value.integer.max = 255;
330 static int snd_cs8427_in_status_get(snd_kcontrol_t *kcontrol,
331 snd_ctl_elem_value_t *ucontrol)
333 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
336 snd_i2c_lock(device->bus);
337 data = snd_cs8427_reg_read(device, kcontrol->private_value);
338 snd_i2c_unlock(device->bus);
341 ucontrol->value.integer.value[0] = data;
345 static int snd_cs8427_qsubcode_info(snd_kcontrol_t *kcontrol,
346 snd_ctl_elem_info_t *uinfo)
348 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
353 static int snd_cs8427_qsubcode_get(snd_kcontrol_t *kcontrol,
354 snd_ctl_elem_value_t *ucontrol)
356 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
357 unsigned char reg = CS8427_REG_QSUBCODE;
360 snd_i2c_lock(device->bus);
361 if ((err = snd_i2c_sendbytes(device, ®, 1)) != 1) {
362 snd_printk("unable to send register 0x%x byte to CS8427\n", reg);
363 snd_i2c_unlock(device->bus);
364 return err < 0 ? err : -EIO;
366 if ((err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10)) != 10) {
367 snd_printk("unable to read Q-subcode bytes from CS8427\n");
368 snd_i2c_unlock(device->bus);
369 return err < 0 ? err : -EIO;
371 snd_i2c_unlock(device->bus);
375 static int snd_cs8427_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
377 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
382 static int snd_cs8427_spdif_get(snd_kcontrol_t * kcontrol,
383 snd_ctl_elem_value_t * ucontrol)
385 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
386 cs8427_t *chip = snd_magic_cast(cs8427_t, device->private_data, return -ENXIO);
388 snd_i2c_lock(device->bus);
389 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
390 snd_i2c_unlock(device->bus);
394 static int snd_cs8427_spdif_put(snd_kcontrol_t * kcontrol,
395 snd_ctl_elem_value_t * ucontrol)
397 snd_i2c_device_t *device = snd_kcontrol_chip(kcontrol);
398 cs8427_t *chip = snd_magic_cast(cs8427_t, device->private_data, return -ENXIO);
399 unsigned char *status = kcontrol->private_value ? chip->playback.pcm_status : chip->playback.def_status;
400 snd_pcm_runtime_t *runtime = chip->playback.substream ? chip->playback.substream->runtime : NULL;
403 snd_i2c_lock(device->bus);
404 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
405 memcpy(status, ucontrol->value.iec958.status, 24);
406 if (change && (kcontrol->private_value ? runtime != NULL : runtime == NULL)) {
407 err = snd_cs8427_send_corudata(device, 0, status, 24);
411 snd_i2c_unlock(device->bus);
415 static int snd_cs8427_spdif_mask_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
417 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
422 static int snd_cs8427_spdif_mask_get(snd_kcontrol_t * kcontrol,
423 snd_ctl_elem_value_t * ucontrol)
425 memset(ucontrol->value.iec958.status, 0xff, 24);
429 #define CONTROLS (sizeof(snd_cs8427_iec958_controls)/sizeof(snd_kcontrol_new_t))
431 static snd_kcontrol_new_t snd_cs8427_iec958_controls[] = {
433 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
434 .info = snd_cs8427_in_status_info,
435 .name = "IEC958 CS8427 Input Status",
436 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
437 .get = snd_cs8427_in_status_get,
441 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
442 .info = snd_cs8427_in_status_info,
443 .name = "IEC958 CS8427 Error Status",
444 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
445 .get = snd_cs8427_in_status_get,
449 .access = SNDRV_CTL_ELEM_ACCESS_READ,
450 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
451 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
452 .info = snd_cs8427_spdif_mask_info,
453 .get = snd_cs8427_spdif_mask_get,
456 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
457 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
458 .info = snd_cs8427_spdif_info,
459 .get = snd_cs8427_spdif_get,
460 .put = snd_cs8427_spdif_put,
464 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
465 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
466 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
467 .info = snd_cs8427_spdif_info,
468 .get = snd_cs8427_spdif_get,
469 .put = snd_cs8427_spdif_put,
473 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
474 .info = snd_cs8427_qsubcode_info,
475 .name = "IEC958 Q-subcode Capture Default",
476 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
477 .get = snd_cs8427_qsubcode_get
480 int snd_cs8427_iec958_build(snd_i2c_device_t *cs8427,
481 snd_pcm_substream_t *play_substream,
482 snd_pcm_substream_t *cap_substream)
484 cs8427_t *chip = snd_magic_cast(cs8427_t, cs8427->private_data, return -ENXIO);
485 snd_kcontrol_t *kctl;
489 snd_assert(play_substream && cap_substream, return -EINVAL);
490 for (idx = 0; idx < CONTROLS; idx++) {
491 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
494 kctl->id.device = play_substream->pcm->device;
495 kctl->id.subdevice = play_substream->number;
496 err = snd_ctl_add(cs8427->bus->card, kctl);
499 if (!strcmp(kctl->id.name, SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
500 chip->playback.pcm_ctl = kctl;
503 chip->playback.substream = play_substream;
504 chip->capture.substream = cap_substream;
505 snd_assert(chip->playback.pcm_ctl, return -EIO);
509 int snd_cs8427_iec958_active(snd_i2c_device_t *cs8427, int active)
513 snd_assert(cs8427, return -ENXIO);
514 chip = snd_magic_cast(cs8427_t, cs8427->private_data, return -ENXIO);
516 memcpy(chip->playback.pcm_status, chip->playback.def_status, 24);
517 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
518 snd_ctl_notify(cs8427->bus->card, SNDRV_CTL_EVENT_MASK_VALUE |
519 SNDRV_CTL_EVENT_MASK_INFO, &chip->playback.pcm_ctl->id);
523 int snd_cs8427_iec958_pcm(snd_i2c_device_t *cs8427, unsigned int rate)
529 snd_assert(cs8427, return -ENXIO);
530 chip = snd_magic_cast(cs8427_t, cs8427->private_data, return -ENXIO);
531 status = chip->playback.pcm_status;
532 snd_i2c_lock(cs8427->bus);
533 if (status[0] & IEC958_AES0_PROFESSIONAL) {
534 status[0] &= ~IEC958_AES0_PRO_FS;
536 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
537 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
538 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
539 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
542 status[3] &= ~IEC958_AES3_CON_FS;
544 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
545 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
546 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
549 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
551 snd_ctl_notify(cs8427->bus->card,
552 SNDRV_CTL_EVENT_MASK_VALUE,
553 &chip->playback.pcm_ctl->id);
554 reset = chip->rate != rate;
555 snd_i2c_unlock(cs8427->bus);
557 snd_cs8427_reset(cs8427);
558 return err < 0 ? err : 0;
561 EXPORT_SYMBOL(snd_cs8427_detect);
562 EXPORT_SYMBOL(snd_cs8427_create);
563 EXPORT_SYMBOL(snd_cs8427_reset);
564 EXPORT_SYMBOL(snd_cs8427_reg_write);
565 EXPORT_SYMBOL(snd_cs8427_reg_read);
566 EXPORT_SYMBOL(snd_cs8427_iec958_build);
567 EXPORT_SYMBOL(snd_cs8427_iec958_active);
568 EXPORT_SYMBOL(snd_cs8427_iec958_pcm);