2 * Copyright (c) 2000-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 #include <linux/config.h>
21 #ifdef CONFIG_USB_DEBUG
27 #include <linux/module.h>
28 #include <linux/pci.h>
29 #include <linux/kernel.h>
30 #include <linux/delay.h>
31 #include <linux/ioport.h>
32 #include <linux/sched.h>
33 #include <linux/slab.h>
34 #include <linux/smp_lock.h>
35 #include <linux/errno.h>
36 #include <linux/init.h>
37 #include <linux/timer.h>
38 #include <linux/list.h>
39 #include <linux/interrupt.h>
40 #include <linux/reboot.h>
41 #include <linux/usb.h>
42 #include <linux/moduleparam.h>
44 #include <linux/version.h>
45 #include "../core/hcd.h"
47 #include <asm/byteorder.h>
50 #include <asm/system.h>
51 #include <asm/unaligned.h>
54 /*-------------------------------------------------------------------------*/
57 * EHCI hc_driver implementation ... experimental, incomplete.
58 * Based on the final 1.0 register interface specification.
60 * USB 2.0 shows up in upcoming www.pcmcia.org technology.
61 * First was PCMCIA, like ISA; then CardBus, which is PCI.
62 * Next comes "CardBay", using USB 2.0 signals.
64 * Contains additional contributions by Brad Hards, Rory Bolt, and others.
65 * Special thanks to Intel and VIA for providing host controllers to
66 * test this driver on, and Cypress (including In-System Design) for
67 * providing early devices for those host controllers to talk to!
71 * 2002-11-29 Correct handling for hw async_next register.
72 * 2002-08-06 Handling for bulk and interrupt transfers is mostly shared;
73 * only scheduling is different, no arbitrary limitations.
74 * 2002-07-25 Sanity check PCI reads, mostly for better cardbus support,
75 * clean up HC run state handshaking.
76 * 2002-05-24 Preliminary FS/LS interrupts, using scheduling shortcuts
77 * 2002-05-11 Clear TT errors for FS/LS ctrl/bulk. Fill in some other
78 * missing pieces: enabling 64bit dma, handoff from BIOS/SMM.
79 * 2002-05-07 Some error path cleanups to report better errors; wmb();
80 * use non-CVS version id; better iso bandwidth claim.
81 * 2002-04-19 Control/bulk/interrupt submit no longer uses giveback() on
82 * errors in submit path. Bugfixes to interrupt scheduling/processing.
83 * 2002-03-05 Initial high-speed ISO support; reduce ITD memory; shift
84 * more checking to generic hcd framework (db). Make it work with
85 * Philips EHCI; reduce PCI traffic; shorten IRQ path (Rory Bolt).
86 * 2002-01-14 Minor cleanup; version synch.
87 * 2002-01-08 Fix roothub handoff of FS/LS to companion controllers.
88 * 2002-01-04 Control/Bulk queuing behaves.
90 * 2001-12-12 Initial patch version for Linux 2.5.1 kernel.
91 * 2001-June Works with usb-storage and NEC EHCI on 2.4
94 #define DRIVER_VERSION "2003-Jun-13"
95 #define DRIVER_AUTHOR "David Brownell"
96 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
98 static const char hcd_name [] = "ehci_hcd";
101 // #define EHCI_VERBOSE_DEBUG
102 // #define have_split_iso
108 /* magic numbers that can affect system performance */
109 #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */
110 #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */
111 #define EHCI_TUNE_RL_TT 0
112 #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */
113 #define EHCI_TUNE_MULT_TT 1
114 #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */
116 #define EHCI_IAA_JIFFIES (HZ/100) /* arbitrary; ~10 msec */
117 #define EHCI_IO_JIFFIES (HZ/10) /* io watchdog > irq_thresh */
118 #define EHCI_ASYNC_JIFFIES (HZ/20) /* async idle timeout */
119 #define EHCI_SHRINK_JIFFIES (HZ/200) /* async qh unlink delay */
121 /* Initial IRQ latency: lower than default */
122 static int log2_irq_thresh = 0; // 0 to 6
123 module_param (log2_irq_thresh, int, S_IRUGO);
124 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
126 #define INTR_MASK (STS_IAA | STS_FATAL | STS_ERR | STS_INT)
128 /*-------------------------------------------------------------------------*/
131 #include "ehci-dbg.c"
133 /*-------------------------------------------------------------------------*/
136 * handshake - spin reading hc until handshake completes or fails
137 * @ptr: address of hc register to be read
138 * @mask: bits to look at in result of read
139 * @done: value of those bits when handshake succeeds
140 * @usec: timeout in microseconds
142 * Returns negative errno, or zero on success
144 * Success happens when the "mask" bits have the specified value (hardware
145 * handshake done). There are two failure modes: "usec" have passed (major
146 * hardware flakeout), or the register reads as all-ones (hardware removed).
148 * That last failure should_only happen in cases like physical cardbus eject
149 * before driver shutdown. But it also seems to be caused by bugs in cardbus
150 * bridge shutdown: shutting down the bridge before the devices using it.
152 static int handshake (u32 *ptr, u32 mask, u32 done, int usec)
157 result = readl (ptr);
158 if (result == ~(u32)0) /* card removed */
170 * hc states include: unknown, halted, ready, running
171 * transitional states are messy just now
172 * trying to avoid "running" unless urbs are active
173 * a "ready" hc can be finishing prefetched work
176 /* force HC to halt state from unknown (EHCI spec section 2.3) */
177 static int ehci_halt (struct ehci_hcd *ehci)
179 u32 temp = readl (&ehci->regs->status);
181 if ((temp & STS_HALT) != 0)
184 temp = readl (&ehci->regs->command);
186 writel (temp, &ehci->regs->command);
187 return handshake (&ehci->regs->status, STS_HALT, STS_HALT, 16 * 125);
190 /* reset a non-running (STS_HALT == 1) controller */
191 static int ehci_reset (struct ehci_hcd *ehci)
193 u32 command = readl (&ehci->regs->command);
195 command |= CMD_RESET;
196 dbg_cmd (ehci, "reset", command);
197 writel (command, &ehci->regs->command);
198 ehci->hcd.state = USB_STATE_HALT;
199 return handshake (&ehci->regs->command, CMD_RESET, 0, 250 * 1000);
202 /* idle the controller (from running) */
203 static void ehci_ready (struct ehci_hcd *ehci)
208 if (!HCD_IS_RUNNING (ehci->hcd.state))
212 /* wait for any schedule enables/disables to take effect */
214 if (ehci->async->qh_next.qh)
216 if (ehci->next_uframe != -1)
218 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
219 temp, 16 * 125) != 0) {
220 ehci->hcd.state = USB_STATE_HALT;
224 /* then disable anything that's still active */
225 temp = readl (&ehci->regs->command);
226 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
227 writel (temp, &ehci->regs->command);
229 /* hardware can take 16 microframes to turn off ... */
230 if (handshake (&ehci->regs->status, STS_ASS | STS_PSS,
232 ehci->hcd.state = USB_STATE_HALT;
235 ehci->hcd.state = USB_STATE_READY;
238 /*-------------------------------------------------------------------------*/
240 #include "ehci-hub.c"
241 #include "ehci-mem.c"
243 #include "ehci-sched.c"
245 /*-------------------------------------------------------------------------*/
247 static void ehci_work(struct ehci_hcd *ehci, struct pt_regs *regs);
249 static void ehci_watchdog (unsigned long param)
251 struct ehci_hcd *ehci = (struct ehci_hcd *) param;
254 spin_lock_irqsave (&ehci->lock, flags);
256 /* lost IAA irqs wedge things badly; seen with a vt8235 */
258 u32 status = readl (&ehci->regs->status);
260 if (status & STS_IAA) {
261 ehci_vdbg (ehci, "lost IAA\n");
262 COUNT (ehci->stats.lost_iaa);
263 writel (STS_IAA, &ehci->regs->status);
264 ehci->reclaim_ready = 1;
268 /* stop async processing after it's idled a bit */
269 if (test_bit (TIMER_ASYNC_OFF, &ehci->actions))
270 start_unlink_async (ehci, ehci->async);
272 /* ehci could run by timer, without IRQs ... */
273 ehci_work (ehci, NULL);
275 spin_unlock_irqrestore (&ehci->lock, flags);
278 /* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
279 * off the controller (maybe it can boot from highspeed USB disks).
281 static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
283 if (cap & (1 << 16)) {
286 /* request handoff to OS */
288 pci_write_config_dword (ehci->hcd.pdev, where, cap);
290 /* and wait a while for it to happen */
294 pci_read_config_dword (ehci->hcd.pdev, where, &cap);
295 } while ((cap & (1 << 16)) && msec);
296 if (cap & (1 << 16)) {
297 ehci_err (ehci, "BIOS handoff failed (%d, %04x)\n",
301 ehci_dbg (ehci, "BIOS handoff succeeded\n");
307 ehci_reboot (struct notifier_block *self, unsigned long code, void *null)
309 struct ehci_hcd *ehci;
311 ehci = container_of (self, struct ehci_hcd, reboot_notifier);
313 /* make BIOS/etc use companion controller during reboot */
314 writel (0, &ehci->regs->configured_flag);
319 /* called by khubd or root hub init threads */
321 static int ehci_hc_reset (struct usb_hcd *hcd)
323 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
326 spin_lock_init (&ehci->lock);
328 ehci->caps = (struct ehci_caps *) hcd->regs;
329 ehci->regs = (struct ehci_regs *) (hcd->regs +
330 readb (&ehci->caps->length));
331 dbg_hcs_params (ehci, "reset");
332 dbg_hcc_params (ehci, "reset");
334 /* EHCI 0.96 and later may have "extended capabilities" */
335 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
339 pci_read_config_dword (ehci->hcd.pdev, temp, &cap);
340 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
341 switch (cap & 0xff) {
342 case 1: /* BIOS/SMM/... handoff */
343 if (bios_handoff (ehci, temp, cap) != 0)
346 case 0: /* illegal reserved capability */
347 ehci_warn (ehci, "illegal capability!\n");
350 default: /* unknown */
353 temp = (cap >> 8) & 0xff;
356 /* cache this readonly data; minimize PCI reads */
357 ehci->hcs_params = readl (&ehci->caps->hcs_params);
359 /* force HC to halt state */
360 return ehci_halt (ehci);
363 static int ehci_start (struct usb_hcd *hcd)
365 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
367 struct usb_device *udev;
374 * hw default: 1K periodic list heads, one per frame.
375 * periodic_size can shrink by USBCMD update if hcc_params allows.
377 ehci->periodic_size = DEFAULT_I_TDPS;
378 if ((retval = ehci_mem_init (ehci, SLAB_KERNEL)) < 0)
381 /* controllers may cache some of the periodic schedule ... */
382 hcc_params = readl (&ehci->caps->hcc_params);
383 if (HCC_ISOC_CACHE (hcc_params)) // full frame cache
385 else // N microframes cached
386 ehci->i_thresh = 2 + HCC_ISOC_THRES (hcc_params);
389 ehci->next_uframe = -1;
391 /* controller state: unknown --> reset */
393 /* EHCI spec section 4.1 */
394 if ((retval = ehci_reset (ehci)) != 0) {
395 ehci_mem_cleanup (ehci);
398 writel (INTR_MASK, &ehci->regs->intr_enable);
399 writel (ehci->periodic_dma, &ehci->regs->frame_list);
402 * dedicate a qh for the async ring head, since we couldn't unlink
403 * a 'real' qh without stopping the async schedule [4.8]. use it
404 * as the 'reclamation list head' too.
405 * its dummy is used in hw_alt_next of many tds, to prevent the qh
406 * from automatically advancing to the next td after short reads.
408 ehci->async->qh_next.qh = 0;
409 ehci->async->hw_next = QH_NEXT (ehci->async->qh_dma);
410 ehci->async->hw_info1 = cpu_to_le32 (QH_HEAD);
411 ehci->async->hw_token = cpu_to_le32 (QTD_STS_HALT);
412 ehci->async->hw_qtd_next = EHCI_LIST_END;
413 ehci->async->qh_state = QH_STATE_LINKED;
414 ehci->async->hw_alt_next = QTD_NEXT (ehci->async->dummy->qtd_dma);
415 writel ((u32)ehci->async->qh_dma, &ehci->regs->async_next);
418 * hcc_params controls whether ehci->regs->segment must (!!!)
419 * be used; it constrains QH/ITD/SITD and QTD locations.
420 * pci_pool consistent memory always uses segment zero.
421 * streaming mappings for I/O buffers, like pci_map_single(),
422 * can return segments above 4GB, if the device allows.
424 * NOTE: the dma mask is visible through dma_supported(), so
425 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
426 * Scsi_Host.highmem_io, and so forth. It's readonly to all
427 * host side drivers though.
429 if (HCC_64BIT_ADDR (hcc_params)) {
430 writel (0, &ehci->regs->segment);
431 if (!pci_set_dma_mask (ehci->hcd.pdev, 0xffffffffffffffffULL))
432 ehci_info (ehci, "enabled 64bit PCI DMA\n");
435 /* help hc dma work well with cachelines */
436 pci_set_mwi (ehci->hcd.pdev);
438 /* clear interrupt enables, set irq latency */
439 temp = readl (&ehci->regs->command) & 0x0fff;
440 if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
442 temp |= 1 << (16 + log2_irq_thresh);
443 // if hc can park (ehci >= 0.96), default is 3 packets per async QH
444 if (HCC_PGM_FRAMELISTLEN (hcc_params)) {
445 /* periodic schedule size can be smaller than default */
447 temp |= (EHCI_TUNE_FLS << 2);
448 switch (EHCI_TUNE_FLS) {
449 case 0: ehci->periodic_size = 1024; break;
450 case 1: ehci->periodic_size = 512; break;
451 case 2: ehci->periodic_size = 256; break;
455 temp &= ~(CMD_IAAD | CMD_ASE | CMD_PSE),
456 // Philips, Intel, and maybe others need CMD_RUN before the
457 // root hub will detect new devices (why?); NEC doesn't
459 writel (temp, &ehci->regs->command);
460 dbg_cmd (ehci, "init", temp);
462 /* set async sleep time = 10 us ... ? */
464 init_timer (&ehci->watchdog);
465 ehci->watchdog.function = ehci_watchdog;
466 ehci->watchdog.data = (unsigned long) ehci;
468 /* wire up the root hub */
469 bus = hcd_to_bus (hcd);
470 bus->root_hub = udev = usb_alloc_dev (NULL, bus);
473 ehci_mem_cleanup (ehci);
478 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
479 * are explicitly handed to companion controller(s), so no TT is
480 * involved with the root hub.
482 ehci->reboot_notifier.notifier_call = ehci_reboot;
483 register_reboot_notifier (&ehci->reboot_notifier);
485 ehci->hcd.state = USB_STATE_READY;
486 writel (FLAG_CF, &ehci->regs->configured_flag);
487 readl (&ehci->regs->command); /* unblock posted write */
489 /* PCI Serial Bus Release Number is at 0x60 offset */
490 pci_read_config_byte (hcd->pdev, 0x60, &tempbyte);
491 temp = readw (&ehci->caps->hci_version);
493 "USB %x.%x enabled, EHCI %x.%02x, driver %s\n",
494 ((tempbyte & 0xf0)>>4), (tempbyte & 0x0f),
495 temp >> 8, temp & 0xff, DRIVER_VERSION);
498 * From here on, khubd concurrently accesses the root
499 * hub; drivers will be talking to enumerated devices.
501 * Before this point the HC was idle/ready. After, khubd
502 * and device drivers may start it running.
504 udev->speed = USB_SPEED_HIGH;
505 if (hcd_register_root (hcd) != 0) {
506 if (hcd->state == USB_STATE_RUNNING)
515 create_debug_files (ehci);
520 /* always called by thread; normally rmmod */
522 static void ehci_stop (struct usb_hcd *hcd)
524 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
526 ehci_dbg (ehci, "stop\n");
528 /* no more interrupts ... */
529 if (hcd->state == USB_STATE_RUNNING)
531 if (in_interrupt ()) { /* must not happen!! */
532 ehci_err (ehci, "stopped in_interrupt!\n");
535 del_timer_sync (&ehci->watchdog);
538 /* let companion controllers work when we aren't */
539 writel (0, &ehci->regs->configured_flag);
540 unregister_reboot_notifier (&ehci->reboot_notifier);
542 remove_debug_files (ehci);
544 /* root hub is shut down separately (first, when possible) */
545 spin_lock_irq (&ehci->lock);
546 ehci_work (ehci, NULL);
547 spin_unlock_irq (&ehci->lock);
548 ehci_mem_cleanup (ehci);
551 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
552 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
553 ehci->stats.lost_iaa);
554 ehci_dbg (ehci, "complete %ld unlink %ld\n",
555 ehci->stats.complete, ehci->stats.unlink);
558 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
561 static int ehci_get_frame (struct usb_hcd *hcd)
563 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
564 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
567 /*-------------------------------------------------------------------------*/
571 /* suspend/resume, section 4.3 */
573 static int ehci_suspend (struct usb_hcd *hcd, u32 state)
575 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
579 ehci_dbg (ehci, "suspend to %d\n", state);
581 ports = HCS_N_PORTS (ehci->hcs_params);
583 // FIXME: This assumes what's probably a D3 level suspend...
585 // FIXME: usb wakeup events on this bus should resume the machine.
586 // pci config register PORTWAKECAP controls which ports can do it;
587 // bios may have initted the register...
589 /* suspend each port, then stop the hc */
590 for (i = 0; i < ports; i++) {
591 int temp = readl (&ehci->regs->port_status [i]);
593 if ((temp & PORT_PE) == 0
594 || (temp & PORT_OWNER) != 0)
596 ehci_dbg (ehci, "suspend port %d", i);
597 temp |= PORT_SUSPEND;
598 writel (temp, &ehci->regs->port_status [i]);
601 if (hcd->state == USB_STATE_RUNNING)
603 writel (readl (&ehci->regs->command) & ~CMD_RUN, &ehci->regs->command);
605 // save pci FLADJ value
607 /* who tells PCI to reduce power consumption? */
612 static int ehci_resume (struct usb_hcd *hcd)
614 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
618 ehci_dbg (ehci, "resume\n");
620 ports = HCS_N_PORTS (ehci->hcs_params);
622 // FIXME: if controller didn't retain state,
623 // return and let generic code clean it up
624 // test configured_flag ?
626 /* resume HC and each port */
627 // restore pci FLADJ value
628 // khubd and drivers will set HC running, if needed;
629 hcd->state = USB_STATE_READY;
630 // FIXME Philips/Intel/... etc don't really have a "READY"
631 // state ... turn on CMD_RUN too
632 for (i = 0; i < ports; i++) {
633 int temp = readl (&ehci->regs->port_status [i]);
635 if ((temp & PORT_PE) == 0
636 || (temp & PORT_SUSPEND) != 0)
638 ehci_dbg (ehci, "resume port %d", i);
640 writel (temp, &ehci->regs->port_status [i]);
641 readl (&ehci->regs->command); /* unblock posted writes */
644 temp &= ~PORT_RESUME;
645 writel (temp, &ehci->regs->port_status [i]);
647 readl (&ehci->regs->command); /* unblock posted writes */
653 /*-------------------------------------------------------------------------*/
656 * ehci_work is called from some interrupts, timers, and so on.
657 * it calls driver completion functions, after dropping ehci->lock.
659 static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
661 timer_action_done (ehci, TIMER_IO_WATCHDOG);
662 if (ehci->reclaim_ready)
663 end_unlink_async (ehci, regs);
664 scan_async (ehci, regs);
665 if (ehci->next_uframe != -1)
666 scan_periodic (ehci, regs);
668 /* the IO watchdog guards against hardware or driver bugs that
669 * misplace IRQs, and should let us run completely without IRQs.
671 if ((ehci->async->qh_next.ptr != 0) || (ehci->periodic_sched != 0))
672 timer_action (ehci, TIMER_IO_WATCHDOG);
675 /*-------------------------------------------------------------------------*/
677 static void ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
679 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
683 spin_lock (&ehci->lock);
685 status = readl (&ehci->regs->status);
687 /* e.g. cardbus physical eject */
688 if (status == ~(u32) 0) {
689 ehci_dbg (ehci, "device removed\n");
694 if (!status) /* irq sharing? */
697 /* clear (just) interrupts */
698 writel (status, &ehci->regs->status);
699 readl (&ehci->regs->command); /* unblock posted write */
702 #ifdef EHCI_VERBOSE_DEBUG
703 /* unrequested/ignored: Port Change Detect, Frame List Rollover */
704 dbg_status (ehci, "irq", status);
707 /* INT, ERR, and IAA interrupt rates can be throttled */
709 /* normal [4.15.1.2] or error [4.15.1.1] completion */
710 if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
711 if (likely ((status & STS_ERR) == 0))
712 COUNT (ehci->stats.normal);
714 COUNT (ehci->stats.error);
718 /* complete the unlinking of some qh [4.15.2.3] */
719 if (status & STS_IAA) {
720 COUNT (ehci->stats.reclaim);
721 ehci->reclaim_ready = 1;
725 /* PCI errors [4.15.2.4] */
726 if (unlikely ((status & STS_FATAL) != 0)) {
727 ehci_err (ehci, "fatal error\n");
730 /* generic layer kills/unlinks all urbs, then
731 * uses ehci_stop to clean up the rest
737 ehci_work (ehci, regs);
739 spin_unlock (&ehci->lock);
742 /*-------------------------------------------------------------------------*/
745 * non-error returns are a promise to giveback() the urb later
746 * we drop ownership so next owner (or urb unlink) can get it
748 * urb + dev is in hcd_dev.urb_list
749 * we're queueing TDs onto software and hardware lists
751 * hcd-specific init for hcpriv hasn't been done yet
753 * NOTE: control, bulk, and interrupt share the same code to append TDs
754 * to a (possibly active) QH, and the same QH scanning code.
756 static int ehci_urb_enqueue (
761 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
762 struct list_head qtd_list;
764 urb->transfer_flags &= ~EHCI_STATE_UNLINK;
765 INIT_LIST_HEAD (&qtd_list);
767 switch (usb_pipetype (urb->pipe)) {
768 // case PIPE_CONTROL:
771 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
773 return submit_async (ehci, urb, &qtd_list, mem_flags);
776 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
778 return intr_submit (ehci, urb, &qtd_list, mem_flags);
780 case PIPE_ISOCHRONOUS:
781 if (urb->dev->speed == USB_SPEED_HIGH)
782 return itd_submit (ehci, urb, mem_flags);
783 #ifdef have_split_iso
785 return sitd_submit (ehci, urb, mem_flags);
787 dbg ("no split iso support yet");
789 #endif /* have_split_iso */
793 /* remove from hardware lists
794 * completions normally happen asynchronously
797 static int ehci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
799 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
803 spin_lock_irqsave (&ehci->lock, flags);
804 switch (usb_pipetype (urb->pipe)) {
805 // case PIPE_CONTROL:
808 qh = (struct ehci_qh *) urb->hcpriv;
812 /* if we need to use IAA and it's busy, defer */
813 if (qh->qh_state == QH_STATE_LINKED
815 && HCD_IS_RUNNING (ehci->hcd.state)
817 struct ehci_qh *last;
819 for (last = ehci->reclaim;
821 last = last->reclaim)
823 qh->qh_state = QH_STATE_UNLINK_WAIT;
826 /* bypass IAA if the hc can't care */
827 } else if (!HCD_IS_RUNNING (ehci->hcd.state) && ehci->reclaim)
828 end_unlink_async (ehci, NULL);
830 /* something else might have unlinked the qh by now */
831 if (qh->qh_state == QH_STATE_LINKED)
832 start_unlink_async (ehci, qh);
836 qh = (struct ehci_qh *) urb->hcpriv;
839 if (qh->qh_state == QH_STATE_LINKED) {
840 /* messy, can spin or block a microframe ... */
841 intr_deschedule (ehci, qh, 1);
842 /* qh_state == IDLE */
844 qh_completions (ehci, qh, NULL);
846 /* reschedule QH iff another request is queued */
847 if (!list_empty (&qh->qtd_list)
848 && HCD_IS_RUNNING (ehci->hcd.state)) {
851 status = qh_schedule (ehci, qh);
852 spin_unlock_irqrestore (&ehci->lock, flags);
855 // shouldn't happen often, but ...
856 // FIXME kill those tds' urbs
857 err ("can't reschedule qh %p, err %d",
864 case PIPE_ISOCHRONOUS:
867 // wait till next completion, do it then.
868 // completion irqs can wait up to 1024 msec,
869 urb->transfer_flags |= EHCI_STATE_UNLINK;
872 spin_unlock_irqrestore (&ehci->lock, flags);
876 /*-------------------------------------------------------------------------*/
878 // bulk qh holds the data toggle
881 ehci_endpoint_disable (struct usb_hcd *hcd, struct hcd_dev *dev, int ep)
883 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
888 /* ASSERT: any requests/urbs are being unlinked */
889 /* ASSERT: nobody can be submitting urbs for this any more */
891 epnum = ep & USB_ENDPOINT_NUMBER_MASK;
892 if (epnum != 0 && (ep & USB_DIR_IN))
896 spin_lock_irqsave (&ehci->lock, flags);
897 qh = (struct ehci_qh *) dev->ep [epnum];
901 if (!HCD_IS_RUNNING (ehci->hcd.state))
902 qh->qh_state = QH_STATE_IDLE;
903 switch (qh->qh_state) {
904 case QH_STATE_UNLINK: /* wait for hw to finish? */
905 spin_unlock_irqrestore (&ehci->lock, flags);
906 set_current_state (TASK_UNINTERRUPTIBLE);
907 schedule_timeout (1);
909 case QH_STATE_IDLE: /* fully unlinked */
910 if (list_empty (&qh->qtd_list)) {
914 /* else FALL THROUGH */
916 /* caller was supposed to have unlinked any requests;
917 * that's not our job. just leak this memory.
919 ehci_err (ehci, "qh %p (#%d) state %d%s\n",
920 qh, epnum, qh->qh_state,
921 list_empty (&qh->qtd_list) ? "" : "(has tds)");
926 spin_unlock_irqrestore (&ehci->lock, flags);
930 /*-------------------------------------------------------------------------*/
932 static const struct hc_driver ehci_driver = {
933 .description = hcd_name,
936 * generic hardware linkage
939 .flags = HCD_MEMORY | HCD_USB2,
942 * basic lifecycle operations
944 .reset = ehci_hc_reset,
947 .suspend = ehci_suspend,
948 .resume = ehci_resume,
953 * memory lifecycle (except per-request)
955 .hcd_alloc = ehci_hcd_alloc,
956 .hcd_free = ehci_hcd_free,
959 * managing i/o requests and associated device resources
961 .urb_enqueue = ehci_urb_enqueue,
962 .urb_dequeue = ehci_urb_dequeue,
963 .endpoint_disable = ehci_endpoint_disable,
968 .get_frame_number = ehci_get_frame,
973 .hub_status_data = ehci_hub_status_data,
974 .hub_control = ehci_hub_control,
977 /*-------------------------------------------------------------------------*/
979 /* EHCI spec says PCI is required. */
981 /* PCI driver selection metadata; PCI hotplugging uses this */
982 static struct pci_device_id pci_ids [] = { {
984 /* handle any USB 2.0 EHCI controller */
986 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0x20),
988 .driver_data = (unsigned long) &ehci_driver,
990 /* no matter who makes it */
991 .vendor = PCI_ANY_ID,
992 .device = PCI_ANY_ID,
993 .subvendor = PCI_ANY_ID,
994 .subdevice = PCI_ANY_ID,
996 }, { /* end: all zeroes */ }
998 MODULE_DEVICE_TABLE (pci, pci_ids);
1000 /* pci driver glue; this is a "new style" PCI driver module */
1001 static struct pci_driver ehci_pci_driver = {
1002 .name = (char *) hcd_name,
1003 .id_table = pci_ids,
1005 .probe = usb_hcd_pci_probe,
1006 .remove = usb_hcd_pci_remove,
1009 .suspend = usb_hcd_pci_suspend,
1010 .resume = usb_hcd_pci_resume,
1014 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1016 MODULE_DESCRIPTION (DRIVER_INFO);
1017 MODULE_AUTHOR (DRIVER_AUTHOR);
1018 MODULE_LICENSE ("GPL");
1020 static int __init init (void)
1025 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1027 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1028 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1030 return pci_module_init (&ehci_pci_driver);
1034 static void __exit cleanup (void)
1036 pci_unregister_driver (&ehci_pci_driver);
1038 module_exit (cleanup);