drivers/i2c/chips/w83781d.c

   1 /*
   2     w83781d.c - Part of lm_sensors, Linux kernel modules for hardware
   3                 monitoring
   4     Copyright (c) 1998 - 2001  Frodo Looijaard <frodol@dds.nl>,
   5     Philip Edelbrock <phil@netroedge.com>,
   6     and Mark Studebaker <mdsxyz123@yahoo.com>
   7
   8     This program is free software; you can redistribute it and/or modify
   9     it under the terms of the GNU General Public License as published by
  10     the Free Software Foundation; either version 2 of the License, or
  11     (at your option) any later version.
  12
  13     This program is distributed in the hope that it will be useful,
  14     but WITHOUT ANY WARRANTY; without even the implied warranty of
  15     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16     GNU General Public License for more details.
  17
  18     You should have received a copy of the GNU General Public License
  19     along with this program; if not, write to the Free Software
  20     Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21 */
  22
  23 /*
  24     Supports following chips:
  25
  26     Chip        #vin    #fanin  #pwm    #temp   wchipid vendid  i2c     ISA
  27     as99127f    7       3       1?      3       0x30    0x12c3  yes     no
  28     asb100 "bach" (type_name = as99127f)        0x30    0x0694  yes     no
  29     w83781d     7       3       0       3       0x10    0x5ca3  yes     yes
  30     w83627hf    9       3       2       3       0x20    0x5ca3  yes     yes(LPC)
  31     w83627thf   9       3       2       3       0x90    0x5ca3  no      yes(LPC)
  32     w83782d     9       3       2-4     3       0x30    0x5ca3  yes     yes
  33     w83783s     5-6     3       2       1-2     0x40    0x5ca3  yes     no
  34     w83697hf    8       2       2       2       0x60    0x5ca3  no      yes(LPC)
  35
  36 */
  37
  38 #include <linux/module.h>
  39 #include <linux/init.h>
  40 #include <linux/slab.h>
  41 #include <linux/i2c.h>
  42 #include <linux/i2c-sensor.h>
  43 #include <linux/i2c-vid.h>
  44 #include <asm/io.h>
  45
  46 /* RT Table support #defined so we can take it out if it gets bothersome */
  47 #define W83781D_RT                      1
  48
  49 /* Addresses to scan */
  50 static unsigned short normal_i2c[] = { I2C_CLIENT_END };
  51 static unsigned short normal_i2c_range[] = { 0x20, 0x2f, I2C_CLIENT_END };
  52 static unsigned int normal_isa[] = { 0x0290, I2C_CLIENT_ISA_END };
  53 static unsigned int normal_isa_range[] = { I2C_CLIENT_ISA_END };
  54
  55 /* Insmod parameters */
  56 SENSORS_INSMOD_6(w83781d, w83782d, w83783s, w83627hf, as99127f, w83697hf);
  57 I2C_CLIENT_MODULE_PARM(force_subclients, "List of subclient addresses: "
  58                     "{bus, clientaddr, subclientaddr1, subclientaddr2}");
  59
  60 static int init = 1;
  61 MODULE_PARM(init, "i");
  62 MODULE_PARM_DESC(init, "Set to zero to bypass chip initialization");
  63
  64 /* Constants specified below */
  65
  66 /* Length of ISA address segment */
  67 #define W83781D_EXTENT                  8
  68
  69 /* Where are the ISA address/data registers relative to the base address */
  70 #define W83781D_ADDR_REG_OFFSET         5
  71 #define W83781D_DATA_REG_OFFSET         6
  72
  73 /* The W83781D registers */
  74 /* The W83782D registers for nr=7,8 are in bank 5 */
  75 #define W83781D_REG_IN_MAX(nr)          ((nr < 7) ? (0x2b + (nr) * 2) : \
  76                                                     (0x554 + (((nr) - 7) * 2)))
  77 #define W83781D_REG_IN_MIN(nr)          ((nr < 7) ? (0x2c + (nr) * 2) : \
  78                                                     (0x555 + (((nr) - 7) * 2)))
  79 #define W83781D_REG_IN(nr)              ((nr < 7) ? (0x20 + (nr)) : \
  80                                                     (0x550 + (nr) - 7))
  81
  82 #define W83781D_REG_FAN_MIN(nr)         (0x3a + (nr))
  83 #define W83781D_REG_FAN(nr)             (0x27 + (nr))
  84
  85 #define W83781D_REG_BANK                0x4E
  86 #define W83781D_REG_TEMP2_CONFIG        0x152
  87 #define W83781D_REG_TEMP3_CONFIG        0x252
  88 #define W83781D_REG_TEMP(nr)            ((nr == 3) ? (0x0250) : \
  89                                         ((nr == 2) ? (0x0150) : \
  90                                                      (0x27)))
  91 #define W83781D_REG_TEMP_HYST(nr)       ((nr == 3) ? (0x253) : \
  92                                         ((nr == 2) ? (0x153) : \
  93                                                      (0x3A)))
  94 #define W83781D_REG_TEMP_OVER(nr)       ((nr == 3) ? (0x255) : \
  95                                         ((nr == 2) ? (0x155) : \
  96                                                      (0x39)))
  97
  98 #define W83781D_REG_CONFIG              0x40
  99 #define W83781D_REG_ALARM1              0x41
 100 #define W83781D_REG_ALARM2              0x42
 101 #define W83781D_REG_ALARM3              0x450   /* not on W83781D */
 102
 103 #define W83781D_REG_IRQ                 0x4C
 104 #define W83781D_REG_BEEP_CONFIG         0x4D
 105 #define W83781D_REG_BEEP_INTS1          0x56
 106 #define W83781D_REG_BEEP_INTS2          0x57
 107 #define W83781D_REG_BEEP_INTS3          0x453   /* not on W83781D */
 108
 109 #define W83781D_REG_VID_FANDIV          0x47
 110
 111 #define W83781D_REG_CHIPID              0x49
 112 #define W83781D_REG_WCHIPID             0x58
 113 #define W83781D_REG_CHIPMAN             0x4F
 114 #define W83781D_REG_PIN                 0x4B
 115
 116 /* 782D/783S only */
 117 #define W83781D_REG_VBAT                0x5D
 118
 119 /* PWM 782D (1-4) and 783S (1-2) only */
 120 #define W83781D_REG_PWM1                0x5B    /* 782d and 783s/627hf datasheets disagree */
 121                                                 /* on which is which; */
 122 #define W83781D_REG_PWM2                0x5A    /* We follow the 782d convention here, */
 123                                                 /* However 782d is probably wrong. */
 124 #define W83781D_REG_PWM3                0x5E
 125 #define W83781D_REG_PWM4                0x5F
 126 #define W83781D_REG_PWMCLK12            0x5C
 127 #define W83781D_REG_PWMCLK34            0x45C
 128 static const u8 regpwm[] = { W83781D_REG_PWM1, W83781D_REG_PWM2,
 129         W83781D_REG_PWM3, W83781D_REG_PWM4
 130 };
 131
 132 #define W83781D_REG_PWM(nr)             (regpwm[(nr) - 1])
 133
 134 #define W83781D_REG_I2C_ADDR            0x48
 135 #define W83781D_REG_I2C_SUBADDR         0x4A
 136
 137 /* The following are undocumented in the data sheets however we
 138    received the information in an email from Winbond tech support */
 139 /* Sensor selection - not on 781d */
 140 #define W83781D_REG_SCFG1               0x5D
 141 static const u8 BIT_SCFG1[] = { 0x02, 0x04, 0x08 };
 142
 143 #define W83781D_REG_SCFG2               0x59
 144 static const u8 BIT_SCFG2[] = { 0x10, 0x20, 0x40 };
 145
 146 #define W83781D_DEFAULT_BETA            3435
 147
 148 /* RT Table registers */
 149 #define W83781D_REG_RT_IDX              0x50
 150 #define W83781D_REG_RT_VAL              0x51
 151
 152 /* Conversions. Rounding and limit checking is only done on the TO_REG
 153    variants. Note that you should be a bit careful with which arguments
 154    these macros are called: arguments may be evaluated more than once.
 155    Fixing this is just not worth it. */
 156 #define IN_TO_REG(val)                  (SENSORS_LIMIT((((val) * 10 + 8)/16),0,255))
 157 #define IN_FROM_REG(val)                (((val) * 16) / 10)
 158
 159 static inline u8
 160 FAN_TO_REG(long rpm, int div)
 161 {
 162         if (rpm == 0)
 163                 return 255;
 164         rpm = SENSORS_LIMIT(rpm, 1, 1000000);
 165         return SENSORS_LIMIT((1350000 + rpm * div / 2) / (rpm * div), 1, 254);
 166 }
 167
 168 #define FAN_FROM_REG(val,div)           ((val) == 0   ? -1 : \
 169                                         ((val) == 255 ? 0 : \
 170                                                         1350000 / ((val) * (div))))
 171
 172 #define TEMP_TO_REG(val)                (SENSORS_LIMIT(((val / 10) < 0 ? (((val / 10) - 5) / 10) : \
 173                                                                          ((val / 10) + 5) / 10), 0, 255))
 174 #define TEMP_FROM_REG(val)              ((((val ) > 0x80 ? (val) - 0x100 : (val)) * 10) * 10)
 175
 176 #define TEMP_ADD_TO_REG(val)            (SENSORS_LIMIT(((((val / 10) + 2) / 5) << 7),\
 177                                               0, 0xffff))
 178 #define TEMP_ADD_FROM_REG(val)          ((((val) >> 7) * 5) * 10)
 179
 180 #define AS99127_TEMP_ADD_TO_REG(val)    (SENSORS_LIMIT((((((val / 10) + 2)*4)/10) \
 181                                                << 7), 0, 0xffff))
 182 #define AS99127_TEMP_ADD_FROM_REG(val)  (((((val) >> 7) * 10) / 4) * 10)
 183
 184 #define ALARMS_FROM_REG(val)            (val)
 185 #define PWM_FROM_REG(val)               (val)
 186 #define PWM_TO_REG(val)                 (SENSORS_LIMIT((val),0,255))
 187 #define BEEP_MASK_FROM_REG(val)         (val)
 188 #define BEEP_MASK_TO_REG(val)           ((val) & 0xffffff)
 189
 190 #define BEEP_ENABLE_TO_REG(val)         ((val) ? 1 : 0)
 191 #define BEEP_ENABLE_FROM_REG(val)       ((val) ? 1 : 0)
 192
 193 #define DIV_FROM_REG(val)               (1 << (val))
 194
 195 static inline u8
 196 DIV_TO_REG(long val, enum chips type)
 197 {
 198         int i;
 199         val = SENSORS_LIMIT(val, 1,
 200                             ((type == w83781d
 201                               || type == as99127f) ? 8 : 128)) >> 1;
 202         for (i = 0; i < 6; i++) {
 203                 if (val == 0)
 204                         break;
 205                 val >>= 1;
 206         }
 207         return ((u8) i);
 208 }
 209
 210 /* Initial limits */
 211 #define W83781D_INIT_IN_0               (vid == 3500 ? 280 : vid / 10)
 212 #define W83781D_INIT_IN_1               (vid == 3500 ? 280 : vid / 10)
 213 #define W83781D_INIT_IN_2               330
 214 #define W83781D_INIT_IN_3               (((500)   * 100) / 168)
 215 #define W83781D_INIT_IN_4               (((1200)  * 10) / 38)
 216 #define W83781D_INIT_IN_5               (((-1200) * -604) / 2100)
 217 #define W83781D_INIT_IN_6               (((-500)  * -604) / 909)
 218 #define W83781D_INIT_IN_7               (((500)   * 100) / 168)
 219 #define W83781D_INIT_IN_8               300
 220 /* Initial limits for 782d/783s negative voltages */
 221 /* Note level shift. Change min/max below if you change these. */
 222 #define W83782D_INIT_IN_5               ((((-1200) + 1491) * 100)/514)
 223 #define W83782D_INIT_IN_6               ((( (-500)  + 771) * 100)/314)
 224
 225 #define W83781D_INIT_IN_PERCENTAGE      10
 226 #define W83781D_INIT_IN_MIN(val)        (val - val * W83781D_INIT_IN_PERCENTAGE / 100)
 227 #define W83781D_INIT_IN_MAX(val)        (val + val * W83781D_INIT_IN_PERCENTAGE / 100)
 228
 229 #define W83781D_INIT_IN_MIN_0           W83781D_INIT_IN_MIN(W83781D_INIT_IN_0)
 230 #define W83781D_INIT_IN_MAX_0           W83781D_INIT_IN_MAX(W83781D_INIT_IN_0)
 231 #define W83781D_INIT_IN_MIN_1           W83781D_INIT_IN_MIN(W83781D_INIT_IN_1)
 232 #define W83781D_INIT_IN_MAX_1           W83781D_INIT_IN_MAX(W83781D_INIT_IN_1)
 233 #define W83781D_INIT_IN_MIN_2           W83781D_INIT_IN_MIN(W83781D_INIT_IN_2)
 234 #define W83781D_INIT_IN_MAX_2           W83781D_INIT_IN_MAX(W83781D_INIT_IN_2)
 235 #define W83781D_INIT_IN_MIN_3           W83781D_INIT_IN_MIN(W83781D_INIT_IN_3)
 236 #define W83781D_INIT_IN_MAX_3           W83781D_INIT_IN_MAX(W83781D_INIT_IN_3)
 237 #define W83781D_INIT_IN_MIN_4           W83781D_INIT_IN_MIN(W83781D_INIT_IN_4)
 238 #define W83781D_INIT_IN_MAX_4           W83781D_INIT_IN_MAX(W83781D_INIT_IN_4)
 239 #define W83781D_INIT_IN_MIN_5           W83781D_INIT_IN_MIN(W83781D_INIT_IN_5)
 240 #define W83781D_INIT_IN_MAX_5           W83781D_INIT_IN_MAX(W83781D_INIT_IN_5)
 241 #define W83781D_INIT_IN_MIN_6           W83781D_INIT_IN_MIN(W83781D_INIT_IN_6)
 242 #define W83781D_INIT_IN_MAX_6           W83781D_INIT_IN_MAX(W83781D_INIT_IN_6)
 243 #define W83781D_INIT_IN_MIN_7           W83781D_INIT_IN_MIN(W83781D_INIT_IN_7)
 244 #define W83781D_INIT_IN_MAX_7           W83781D_INIT_IN_MAX(W83781D_INIT_IN_7)
 245 #define W83781D_INIT_IN_MIN_8           W83781D_INIT_IN_MIN(W83781D_INIT_IN_8)
 246 #define W83781D_INIT_IN_MAX_8           W83781D_INIT_IN_MAX(W83781D_INIT_IN_8)
 247
 248 /* Initial limits for 782d/783s negative voltages */
 249 /* These aren't direct multiples because of level shift */
 250 /* Beware going negative - check */
 251 #define W83782D_INIT_IN_MIN_5_TMP \
 252         (((-1200 * (100 + W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
 253 #define W83782D_INIT_IN_MIN_5 \
 254         ((W83782D_INIT_IN_MIN_5_TMP > 0) ? W83782D_INIT_IN_MIN_5_TMP : 0)
 255 #define W83782D_INIT_IN_MAX_5 \
 256         (((-1200 * (100 - W83781D_INIT_IN_PERCENTAGE)) + (1491 * 100))/514)
 257 #define W83782D_INIT_IN_MIN_6_TMP \
 258         ((( -500 * (100 + W83781D_INIT_IN_PERCENTAGE)) +  (771 * 100))/314)
 259 #define W83782D_INIT_IN_MIN_6 \
 260         ((W83782D_INIT_IN_MIN_6_TMP > 0) ? W83782D_INIT_IN_MIN_6_TMP : 0)
 261 #define W83782D_INIT_IN_MAX_6 \
 262         ((( -500 * (100 - W83781D_INIT_IN_PERCENTAGE)) +  (771 * 100))/314)
 263
 264 #define W83781D_INIT_FAN_MIN_1          3000
 265 #define W83781D_INIT_FAN_MIN_2          3000
 266 #define W83781D_INIT_FAN_MIN_3          3000
 267
 268 /* temp = value / 100 */
 269 #define W83781D_INIT_TEMP_OVER          6000
 270 #define W83781D_INIT_TEMP_HYST          12700   /* must be 127 for ALARM to work */
 271 #define W83781D_INIT_TEMP2_OVER         6000
 272 #define W83781D_INIT_TEMP2_HYST         5000
 273 #define W83781D_INIT_TEMP3_OVER         6000
 274 #define W83781D_INIT_TEMP3_HYST         5000
 275
 276 /* There are some complications in a module like this. First off, W83781D chips
 277    may be both present on the SMBus and the ISA bus, and we have to handle
 278    those cases separately at some places. Second, there might be several
 279    W83781D chips available (well, actually, that is probably never done; but
 280    it is a clean illustration of how to handle a case like that). Finally,
 281    a specific chip may be attached to *both* ISA and SMBus, and we would
 282    not like to detect it double. Fortunately, in the case of the W83781D at
 283    least, a register tells us what SMBus address we are on, so that helps
 284    a bit - except if there could be more than one SMBus. Groan. No solution
 285    for this yet. */
 286
 287 /* This module may seem overly long and complicated. In fact, it is not so
 288    bad. Quite a lot of bookkeeping is done. A real driver can often cut
 289    some corners. */
 290
 291 /* For each registered W83781D, we need to keep some data in memory. That
 292    data is pointed to by w83781d_list[NR]->data. The structure itself is
 293    dynamically allocated, at the same time when a new w83781d client is
 294    allocated. */
 295 struct w83781d_data {
 296         struct semaphore lock;
 297         enum chips type;
 298
 299         struct semaphore update_lock;
 300         char valid;             /* !=0 if following fields are valid */
 301         unsigned long last_updated;     /* In jiffies */
 302
 303         struct i2c_client *lm75[2];     /* for secondary I2C addresses */
 304         /* array of 2 pointers to subclients */
 305
 306         u8 in[9];               /* Register value - 8 & 9 for 782D only */
 307         u8 in_max[9];           /* Register value - 8 & 9 for 782D only */
 308         u8 in_min[9];           /* Register value - 8 & 9 for 782D only */
 309         u8 fan[3];              /* Register value */
 310         u8 fan_min[3];          /* Register value */
 311         u8 temp;
 312         u8 temp_min;            /* Register value */
 313         u8 temp_max;            /* Register value */
 314         u16 temp_add[2];        /* Register value */
 315         u16 temp_max_add[2];    /* Register value */
 316         u16 temp_min_add[2];    /* Register value */
 317         u8 fan_div[3];          /* Register encoding, shifted right */
 318         u8 vid;                 /* Register encoding, combined */
 319         u32 alarms;             /* Register encoding, combined */
 320         u32 beep_mask;          /* Register encoding, combined */
 321         u8 beep_enable;         /* Boolean */
 322         u8 pwm[4];              /* Register value */
 323         u8 pwmenable[4];        /* Boolean */
 324         u16 sens[3];            /* 782D/783S only.
 325                                    1 = pentium diode; 2 = 3904 diode;
 326                                    3000-5000 = thermistor beta.
 327                                    Default = 3435.
 328                                    Other Betas unimplemented */
 329 #ifdef W83781D_RT
 330         u8 rt[3][32];           /* Register value */
 331 #endif
 332         u8 vrm;
 333 };
 334
 335 static int w83781d_attach_adapter(struct i2c_adapter *adapter);
 336 static int w83781d_detect(struct i2c_adapter *adapter, int address, int kind);
 337 static int w83781d_detach_client(struct i2c_client *client);
 338
 339 static int w83781d_read_value(struct i2c_client *client, u16 register);
 340 static int w83781d_write_value(struct i2c_client *client, u16 register,
 341                                u16 value);
 342 static void w83781d_update_client(struct i2c_client *client);
 343 static void w83781d_init_client(struct i2c_client *client);
 344
 345 static inline u16 swap_bytes(u16 val)
 346 {
 347         return (val >> 8) | (val << 8);
 348 }
 349
 350 static struct i2c_driver w83781d_driver = {
 351         .owner = THIS_MODULE,
 352         .name = "w83781d",
 353         .id = I2C_DRIVERID_W83781D,
 354         .flags = I2C_DF_NOTIFY,
 355         .attach_adapter = w83781d_attach_adapter,
 356         .detach_client = w83781d_detach_client,
 357 };
 358
 359 /* following are the sysfs callback functions */
 360 #define show_in_reg(reg) \
 361 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 362 { \
 363         struct i2c_client *client = to_i2c_client(dev); \
 364         struct w83781d_data *data = i2c_get_clientdata(client); \
 365          \
 366         w83781d_update_client(client); \
 367          \
 368         return sprintf(buf,"%ld\n", (long)IN_FROM_REG(data->reg[nr] * 10)); \
 369 }
 370 show_in_reg(in);
 371 show_in_reg(in_min);
 372 show_in_reg(in_max);
 373
 374 #define store_in_reg(REG, reg) \
 375 static ssize_t store_in_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 376 { \
 377         struct i2c_client *client = to_i2c_client(dev); \
 378         struct w83781d_data *data = i2c_get_clientdata(client); \
 379         u32 val; \
 380          \
 381         val = simple_strtoul(buf, NULL, 10); \
 382         data->in_##reg[nr] = (IN_TO_REG(val) / 10); \
 383         w83781d_write_value(client, W83781D_REG_IN_##REG(nr), data->in_##reg[nr]); \
 384          \
 385         return count; \
 386 }
 387 store_in_reg(MIN, min);
 388 store_in_reg(MAX, max);
 389
 390 #define sysfs_in_offset(offset) \
 391 static ssize_t \
 392 show_regs_in_##offset (struct device *dev, char *buf) \
 393 { \
 394         return show_in(dev, buf, 0x##offset); \
 395 } \
 396 static DEVICE_ATTR(in_input##offset, S_IRUGO, show_regs_in_##offset, NULL)
 397
 398 #define sysfs_in_reg_offset(reg, offset) \
 399 static ssize_t show_regs_in_##reg##offset (struct device *dev, char *buf) \
 400 { \
 401         return show_in_##reg (dev, buf, 0x##offset); \
 402 } \
 403 static ssize_t store_regs_in_##reg##offset (struct device *dev, const char *buf, size_t count) \
 404 { \
 405         return store_in_##reg (dev, buf, count, 0x##offset); \
 406 } \
 407 static DEVICE_ATTR(in_##reg##offset, S_IRUGO| S_IWUSR, show_regs_in_##reg##offset, store_regs_in_##reg##offset)
 408
 409 #define sysfs_in_offsets(offset) \
 410 sysfs_in_offset(offset); \
 411 sysfs_in_reg_offset(min, offset); \
 412 sysfs_in_reg_offset(max, offset);
 413
 414 sysfs_in_offsets(0);
 415 sysfs_in_offsets(1);
 416 sysfs_in_offsets(2);
 417 sysfs_in_offsets(3);
 418 sysfs_in_offsets(4);
 419 sysfs_in_offsets(5);
 420 sysfs_in_offsets(6);
 421 sysfs_in_offsets(7);
 422 sysfs_in_offsets(8);
 423
 424 #define device_create_file_in(client, offset) \
 425 device_create_file(&client->dev, &dev_attr_in_input##offset); \
 426 device_create_file(&client->dev, &dev_attr_in_min##offset); \
 427 device_create_file(&client->dev, &dev_attr_in_max##offset);
 428
 429 #define show_fan_reg(reg) \
 430 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 431 { \
 432         struct i2c_client *client = to_i2c_client(dev); \
 433         struct w83781d_data *data = i2c_get_clientdata(client); \
 434          \
 435         w83781d_update_client(client); \
 436          \
 437         return sprintf(buf,"%ld\n", \
 438                 FAN_FROM_REG(data->reg[nr-1], (long)DIV_FROM_REG(data->fan_div[nr-1]))); \
 439 }
 440 show_fan_reg(fan);
 441 show_fan_reg(fan_min);
 442
 443 static ssize_t
 444 store_fan_min(struct device *dev, const char *buf, size_t count, int nr)
 445 {
 446         struct i2c_client *client = to_i2c_client(dev);
 447         struct w83781d_data *data = i2c_get_clientdata(client);
 448         u32 val;
 449
 450         val = simple_strtoul(buf, NULL, 10);
 451         data->fan_min[nr - 1] =
 452             FAN_TO_REG(val, DIV_FROM_REG(data->fan_div[nr - 1]));
 453         w83781d_write_value(client, W83781D_REG_FAN_MIN(nr),
 454                             data->fan_min[nr - 1]);
 455
 456         return count;
 457 }
 458
 459 #define sysfs_fan_offset(offset) \
 460 static ssize_t show_regs_fan_##offset (struct device *dev, char *buf) \
 461 { \
 462         return show_fan(dev, buf, 0x##offset); \
 463 } \
 464 static DEVICE_ATTR(fan_input##offset, S_IRUGO, show_regs_fan_##offset, NULL)
 465
 466 #define sysfs_fan_min_offset(offset) \
 467 static ssize_t show_regs_fan_min##offset (struct device *dev, char *buf) \
 468 { \
 469         return show_fan_min(dev, buf, 0x##offset); \
 470 } \
 471 static ssize_t store_regs_fan_min##offset (struct device *dev, const char *buf, size_t count) \
 472 { \
 473         return store_fan_min(dev, buf, count, 0x##offset); \
 474 } \
 475 static DEVICE_ATTR(fan_min##offset, S_IRUGO | S_IWUSR, show_regs_fan_min##offset, store_regs_fan_min##offset)
 476
 477 sysfs_fan_offset(1);
 478 sysfs_fan_min_offset(1);
 479 sysfs_fan_offset(2);
 480 sysfs_fan_min_offset(2);
 481 sysfs_fan_offset(3);
 482 sysfs_fan_min_offset(3);
 483
 484 #define device_create_file_fan(client, offset) \
 485 device_create_file(&client->dev, &dev_attr_fan_input##offset); \
 486 device_create_file(&client->dev, &dev_attr_fan_min##offset); \
 487
 488 #define show_temp_reg(reg) \
 489 static ssize_t show_##reg (struct device *dev, char *buf, int nr) \
 490 { \
 491         struct i2c_client *client = to_i2c_client(dev); \
 492         struct w83781d_data *data = i2c_get_clientdata(client); \
 493          \
 494         w83781d_update_client(client); \
 495          \
 496         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 497                 if (data->type == as99127f) { \
 498                         return sprintf(buf,"%ld\n", \
 499                                 (long)AS99127_TEMP_ADD_FROM_REG(data->reg##_add[nr-2])); \
 500                 } else { \
 501                         return sprintf(buf,"%ld\n", \
 502                                 (long)TEMP_ADD_FROM_REG(data->reg##_add[nr-2])); \
 503                 } \
 504         } else {        /* TEMP1 */ \
 505                 return sprintf(buf,"%ld\n", (long)TEMP_FROM_REG(data->reg)); \
 506         } \
 507 }
 508 show_temp_reg(temp);
 509 show_temp_reg(temp_min);
 510 show_temp_reg(temp_max);
 511
 512 #define store_temp_reg(REG, reg) \
 513 static ssize_t store_temp_##reg (struct device *dev, const char *buf, size_t count, int nr) \
 514 { \
 515         struct i2c_client *client = to_i2c_client(dev); \
 516         struct w83781d_data *data = i2c_get_clientdata(client); \
 517         u32 val; \
 518          \
 519         val = simple_strtoul(buf, NULL, 10); \
 520          \
 521         if (nr >= 2) {  /* TEMP2 and TEMP3 */ \
 522                 if (data->type == as99127f) \
 523                         data->temp_##reg##_add[nr-2] = AS99127_TEMP_ADD_TO_REG(val); \
 524                 else \
 525                         data->temp_##reg##_add[nr-2] = TEMP_ADD_TO_REG(val); \
 526                  \
 527                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 528                                 data->temp_##reg##_add[nr-2]); \
 529         } else {        /* TEMP1 */ \
 530                 data->temp_##reg = TEMP_TO_REG(val); \
 531                 w83781d_write_value(client, W83781D_REG_TEMP_##REG(nr), \
 532                         data->temp_##reg); \
 533         } \
 534          \
 535         return count; \
 536 }
 537 store_temp_reg(OVER, min);
 538 store_temp_reg(HYST, max);
 539
 540 #define sysfs_temp_offset(offset) \
 541 static ssize_t \
 542 show_regs_temp_##offset (struct device *dev, char *buf) \
 543 { \
 544         return show_temp(dev, buf, 0x##offset); \
 545 } \
 546 static DEVICE_ATTR(temp_input##offset, S_IRUGO, show_regs_temp_##offset, NULL)
 547
 548 #define sysfs_temp_reg_offset(reg, offset) \
 549 static ssize_t show_regs_temp_##reg##offset (struct device *dev, char *buf) \
 550 { \
 551         return show_temp_##reg (dev, buf, 0x##offset); \
 552 } \
 553 static ssize_t store_regs_temp_##reg##offset (struct device *dev, const char *buf, size_t count) \
 554 { \
 555         return store_temp_##reg (dev, buf, count, 0x##offset); \
 556 } \
 557 static DEVICE_ATTR(temp_##reg##offset, S_IRUGO| S_IWUSR, show_regs_temp_##reg##offset, store_regs_temp_##reg##offset)
 558
 559 #define sysfs_temp_offsets(offset) \
 560 sysfs_temp_offset(offset); \
 561 sysfs_temp_reg_offset(min, offset); \
 562 sysfs_temp_reg_offset(max, offset);
 563
 564 sysfs_temp_offsets(1);
 565 sysfs_temp_offsets(2);
 566 sysfs_temp_offsets(3);
 567
 568 #define device_create_file_temp(client, offset) \
 569 device_create_file(&client->dev, &dev_attr_temp_input##offset); \
 570 device_create_file(&client->dev, &dev_attr_temp_max##offset); \
 571 device_create_file(&client->dev, &dev_attr_temp_min##offset);
 572
 573 static ssize_t
 574 show_vid_reg(struct device *dev, char *buf)
 575 {
 576         struct i2c_client *client = to_i2c_client(dev);
 577         struct w83781d_data *data = i2c_get_clientdata(client);
 578
 579         w83781d_update_client(client);
 580
 581         return sprintf(buf, "%ld\n", (long) vid_from_reg(data->vid, data->vrm));
 582 }
 583
 584 static
 585 DEVICE_ATTR(vid, S_IRUGO, show_vid_reg, NULL)
 586 #define device_create_file_vid(client) \
 587 device_create_file(&client->dev, &dev_attr_vid);
 588 static ssize_t
 589 show_vrm_reg(struct device *dev, char *buf)
 590 {
 591         struct i2c_client *client = to_i2c_client(dev);
 592         struct w83781d_data *data = i2c_get_clientdata(client);
 593
 594         w83781d_update_client(client);
 595
 596         return sprintf(buf, "%ld\n", (long) data->vrm);
 597 }
 598
 599 static ssize_t
 600 store_vrm_reg(struct device *dev, const char *buf, size_t count)
 601 {
 602         struct i2c_client *client = to_i2c_client(dev);
 603         struct w83781d_data *data = i2c_get_clientdata(client);
 604         u32 val;
 605
 606         val = simple_strtoul(buf, NULL, 10);
 607         data->vrm = val;
 608
 609         return count;
 610 }
 611
 612 static
 613 DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm_reg, store_vrm_reg)
 614 #define device_create_file_vrm(client) \
 615 device_create_file(&client->dev, &dev_attr_vrm);
 616 static ssize_t
 617 show_alarms_reg(struct device *dev, char *buf)
 618 {
 619         struct i2c_client *client = to_i2c_client(dev);
 620         struct w83781d_data *data = i2c_get_clientdata(client);
 621
 622         w83781d_update_client(client);
 623
 624         return sprintf(buf, "%ld\n", (long) ALARMS_FROM_REG(data->alarms));
 625 }
 626
 627 static
 628 DEVICE_ATTR(alarms, S_IRUGO, show_alarms_reg, NULL)
 629 #define device_create_file_alarms(client) \
 630 device_create_file(&client->dev, &dev_attr_alarms);
 631 #define show_beep_reg(REG, reg) \
 632 static ssize_t show_beep_##reg (struct device *dev, char *buf) \
 633 { \
 634         struct i2c_client *client = to_i2c_client(dev); \
 635         struct w83781d_data *data = i2c_get_clientdata(client); \
 636          \
 637         w83781d_update_client(client); \
 638          \
 639         return sprintf(buf,"%ld\n", (long)BEEP_##REG##_FROM_REG(data->beep_##reg)); \
 640 }
 641 show_beep_reg(ENABLE, enable);
 642 show_beep_reg(MASK, mask);
 643
 644 #define BEEP_ENABLE                     0       /* Store beep_enable */
 645 #define BEEP_MASK                       1       /* Store beep_mask */
 646
 647 static ssize_t
 648 store_beep_reg(struct device *dev, const char *buf, size_t count,
 649                int update_mask)
 650 {
 651         struct i2c_client *client = to_i2c_client(dev);
 652         struct w83781d_data *data = i2c_get_clientdata(client);
 653         u32 val, val2;
 654
 655         val = simple_strtoul(buf, NULL, 10);
 656
 657         if (update_mask == BEEP_MASK) { /* We are storing beep_mask */
 658                 data->beep_mask = BEEP_MASK_TO_REG(val);
 659                 w83781d_write_value(client, W83781D_REG_BEEP_INTS1,
 660                                     data->beep_mask & 0xff);
 661
 662                 if ((data->type != w83781d) && (data->type != as99127f)) {
 663                         w83781d_write_value(client, W83781D_REG_BEEP_INTS3,
 664                                             ((data->beep_mask) >> 16) & 0xff);
 665                 }
 666
 667                 val2 = (data->beep_mask >> 8) & 0x7f;
 668         } else {                /* We are storing beep_enable */
 669                 val2 = w83781d_read_value(client, W83781D_REG_BEEP_INTS2) & 0x7f;
 670                 data->beep_enable = BEEP_ENABLE_TO_REG(val);
 671         }
 672
 673         w83781d_write_value(client, W83781D_REG_BEEP_INTS2,
 674                             val2 | data->beep_enable << 7);
 675
 676         return count;
 677 }
 678
 679 #define sysfs_beep(REG, reg) \
 680 static ssize_t show_regs_beep_##reg (struct device *dev, char *buf) \
 681 { \
 682         return show_beep_##reg(dev, buf); \
 683 } \
 684 static ssize_t store_regs_beep_##reg (struct device *dev, const char *buf, size_t count) \
 685 { \
 686         return store_beep_reg(dev, buf, count, BEEP_##REG); \
 687 } \
 688 static DEVICE_ATTR(beep_##reg, S_IRUGO | S_IWUSR, show_regs_beep_##reg, store_regs_beep_##reg)
 689
 690 sysfs_beep(ENABLE, enable);
 691 sysfs_beep(MASK, mask);
 692
 693 #define device_create_file_beep(client) \
 694 device_create_file(&client->dev, &dev_attr_beep_enable); \
 695 device_create_file(&client->dev, &dev_attr_beep_mask);
 696
 697 /* w83697hf only has two fans */
 698 static ssize_t
 699 show_fan_div_reg(struct device *dev, char *buf, int nr)
 700 {
 701         struct i2c_client *client = to_i2c_client(dev);
 702         struct w83781d_data *data = i2c_get_clientdata(client);
 703
 704         w83781d_update_client(client);
 705
 706         return sprintf(buf, "%ld\n",
 707                        (long) DIV_FROM_REG(data->fan_div[nr - 1]));
 708 }
 709
 710 /* w83697hf only has two fans */
 711 static ssize_t
 712 store_fan_div_reg(struct device *dev, const char *buf, size_t count, int nr)
 713 {
 714         struct i2c_client *client = to_i2c_client(dev);
 715         struct w83781d_data *data = i2c_get_clientdata(client);
 716         u32 val, old, old2, old3 = 0;
 717
 718         val = simple_strtoul(buf, NULL, 10);
 719         old = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
 720
 721         data->fan_div[nr - 1] = DIV_TO_REG(val, data->type);
 722
 723         /* w83781d and as99127f don't have extended divisor bits */
 724         if ((data->type != w83781d) && data->type != as99127f) {
 725                 old3 = w83781d_read_value(client, W83781D_REG_VBAT);
 726         }
 727         if (nr >= 3 && data->type != w83697hf) {
 728                 old2 = w83781d_read_value(client, W83781D_REG_PIN);
 729                 old2 = (old2 & 0x3f) | ((data->fan_div[2] & 0x03) << 6);
 730                 w83781d_write_value(client, W83781D_REG_PIN, old2);
 731
 732                 if ((data->type != w83781d) && (data->type != as99127f)) {
 733                         old3 = (old3 & 0x7f) | ((data->fan_div[2] & 0x04) << 5);
 734                 }
 735         }
 736         if (nr >= 2) {
 737                 old = (old & 0x3f) | ((data->fan_div[1] & 0x03) << 6);
 738
 739                 if ((data->type != w83781d) && (data->type != as99127f)) {
 740                         old3 = (old3 & 0xbf) | ((data->fan_div[1] & 0x04) << 4);
 741                 }
 742         }
 743         if (nr >= 1) {
 744                 old = (old & 0xcf) | ((data->fan_div[0] & 0x03) << 4);
 745                 w83781d_write_value(client, W83781D_REG_VID_FANDIV, old);
 746
 747                 if ((data->type != w83781d) && (data->type != as99127f)) {
 748                         old3 = (old3 & 0xdf) | ((data->fan_div[0] & 0x04) << 3);
 749                         w83781d_write_value(client, W83781D_REG_VBAT, old3);
 750                 }
 751         }
 752
 753         return count;
 754 }
 755
 756 #define sysfs_fan_div(offset) \
 757 static ssize_t show_regs_fan_div_##offset (struct device *dev, char *buf) \
 758 { \
 759         return show_fan_div_reg(dev, buf, offset); \
 760 } \
 761 static ssize_t store_regs_fan_div_##offset (struct device *dev, const char *buf, size_t count) \
 762 { \
 763         return store_fan_div_reg(dev, buf, count, offset); \
 764 } \
 765 static DEVICE_ATTR(fan_div##offset, S_IRUGO | S_IWUSR, show_regs_fan_div_##offset, store_regs_fan_div_##offset)
 766
 767 sysfs_fan_div(1);
 768 sysfs_fan_div(2);
 769 sysfs_fan_div(3);
 770
 771 #define device_create_file_fan_div(client, offset) \
 772 device_create_file(&client->dev, &dev_attr_fan_div##offset); \
 773
 774 /* w83697hf only has two fans */
 775 static ssize_t
 776 show_pwm_reg(struct device *dev, char *buf, int nr)
 777 {
 778         struct i2c_client *client = to_i2c_client(dev);
 779         struct w83781d_data *data = i2c_get_clientdata(client);
 780
 781         w83781d_update_client(client);
 782
 783         return sprintf(buf, "%ld\n", (long) PWM_FROM_REG(data->pwm[nr - 1]));
 784 }
 785
 786 /* w83697hf only has two fans */
 787 static ssize_t
 788 show_pwmenable_reg(struct device *dev, char *buf, int nr)
 789 {
 790         struct i2c_client *client = to_i2c_client(dev);
 791         struct w83781d_data *data = i2c_get_clientdata(client);
 792
 793         w83781d_update_client(client);
 794
 795         return sprintf(buf, "%ld\n", (long) data->pwmenable[nr - 1]);
 796 }
 797
 798 static ssize_t
 799 store_pwm_reg(struct device *dev, const char *buf, size_t count, int nr)
 800 {
 801         struct i2c_client *client = to_i2c_client(dev);
 802         struct w83781d_data *data = i2c_get_clientdata(client);
 803         u32 val;
 804
 805         val = simple_strtoul(buf, NULL, 10);
 806
 807         data->pwm[nr - 1] = PWM_TO_REG(val);
 808         w83781d_write_value(client, W83781D_REG_PWM(nr), data->pwm[nr - 1]);
 809
 810         return count;
 811 }
 812
 813 static ssize_t
 814 store_pwmenable_reg(struct device *dev, const char *buf, size_t count, int nr)
 815 {
 816         struct i2c_client *client = to_i2c_client(dev);
 817         struct w83781d_data *data = i2c_get_clientdata(client);
 818         u32 val, j, k;
 819
 820         val = simple_strtoul(buf, NULL, 10);
 821
 822         /* only PWM2 can be enabled/disabled */
 823         if (nr == 2) {
 824                 j = w83781d_read_value(client, W83781D_REG_PWMCLK12);
 825                 k = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
 826
 827                 if (val > 0) {
 828                         if (!(j & 0x08))
 829                                 w83781d_write_value(client,
 830                                                     W83781D_REG_PWMCLK12,
 831                                                     j | 0x08);
 832                         if (k & 0x10)
 833                                 w83781d_write_value(client,
 834                                                     W83781D_REG_BEEP_CONFIG,
 835                                                     k & 0xef);
 836
 837                         data->pwmenable[1] = 1;
 838                 } else {
 839                         if (j & 0x08)
 840                                 w83781d_write_value(client,
 841                                                     W83781D_REG_PWMCLK12,
 842                                                     j & 0xf7);
 843                         if (!(k & 0x10))
 844                                 w83781d_write_value(client,
 845                                                     W83781D_REG_BEEP_CONFIG,
 846                                                     j | 0x10);
 847
 848                         data->pwmenable[1] = 0;
 849                 }
 850         }
 851
 852         return count;
 853 }
 854
 855 #define sysfs_pwm(offset) \
 856 static ssize_t show_regs_pwm_##offset (struct device *dev, char *buf) \
 857 { \
 858         return show_pwm_reg(dev, buf, offset); \
 859 } \
 860 static ssize_t store_regs_pwm_##offset (struct device *dev, const char *buf, size_t count) \
 861 { \
 862         return store_pwm_reg(dev, buf, count, offset); \
 863 } \
 864 static DEVICE_ATTR(pwm##offset, S_IRUGO | S_IWUSR, show_regs_pwm_##offset, store_regs_pwm_##offset)
 865
 866 #define sysfs_pwmenable(offset) \
 867 static ssize_t show_regs_pwmenable_##offset (struct device *dev, char *buf) \
 868 { \
 869         return show_pwmenable_reg(dev, buf, offset); \
 870 } \
 871 static ssize_t store_regs_pwmenable_##offset (struct device *dev, const char *buf, size_t count) \
 872 { \
 873         return store_pwmenable_reg(dev, buf, count, offset); \
 874 } \
 875 static DEVICE_ATTR(pwm_enable##offset, S_IRUGO | S_IWUSR, show_regs_pwmenable_##offset, store_regs_pwmenable_##offset)
 876
 877 sysfs_pwm(1);
 878 sysfs_pwm(2);
 879 sysfs_pwmenable(2);             /* only PWM2 can be enabled/disabled */
 880 sysfs_pwm(3);
 881 sysfs_pwm(4);
 882
 883 #define device_create_file_pwm(client, offset) \
 884 device_create_file(&client->dev, &dev_attr_pwm##offset); \
 885
 886 #define device_create_file_pwmenable(client, offset) \
 887 device_create_file(&client->dev, &dev_attr_pwm_enable##offset); \
 888
 889 static ssize_t
 890 show_sensor_reg(struct device *dev, char *buf, int nr)
 891 {
 892         struct i2c_client *client = to_i2c_client(dev);
 893         struct w83781d_data *data = i2c_get_clientdata(client);
 894
 895         w83781d_update_client(client);
 896
 897         return sprintf(buf, "%ld\n", (long) data->sens[nr - 1]);
 898 }
 899
 900 static ssize_t
 901 store_sensor_reg(struct device *dev, const char *buf, size_t count, int nr)
 902 {
 903         struct i2c_client *client = to_i2c_client(dev);
 904         struct w83781d_data *data = i2c_get_clientdata(client);
 905         u32 val, tmp;
 906
 907         val = simple_strtoul(buf, NULL, 10);
 908
 909         switch (val) {
 910         case 1:         /* PII/Celeron diode */
 911                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 912                 w83781d_write_value(client, W83781D_REG_SCFG1,
 913                                     tmp | BIT_SCFG1[nr - 1]);
 914                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 915                 w83781d_write_value(client, W83781D_REG_SCFG2,
 916                                     tmp | BIT_SCFG2[nr - 1]);
 917                 data->sens[nr - 1] = val;
 918                 break;
 919         case 2:         /* 3904 */
 920                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 921                 w83781d_write_value(client, W83781D_REG_SCFG1,
 922                                     tmp | BIT_SCFG1[nr - 1]);
 923                 tmp = w83781d_read_value(client, W83781D_REG_SCFG2);
 924                 w83781d_write_value(client, W83781D_REG_SCFG2,
 925                                     tmp & ~BIT_SCFG2[nr - 1]);
 926                 data->sens[nr - 1] = val;
 927                 break;
 928         case W83781D_DEFAULT_BETA:      /* thermistor */
 929                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
 930                 w83781d_write_value(client, W83781D_REG_SCFG1,
 931                                     tmp & ~BIT_SCFG1[nr - 1]);
 932                 data->sens[nr - 1] = val;
 933                 break;
 934         default:
 935                 dev_err(&client->dev,
 936                        "Invalid sensor type %ld; must be 1, 2, or %d\n",
 937                        (long) val, W83781D_DEFAULT_BETA);
 938                 break;
 939         }
 940
 941         return count;
 942 }
 943
 944 #define sysfs_sensor(offset) \
 945 static ssize_t show_regs_sensor_##offset (struct device *dev, char *buf) \
 946 { \
 947     return show_sensor_reg(dev, buf, offset); \
 948 } \
 949 static ssize_t store_regs_sensor_##offset (struct device *dev, const char *buf, size_t count) \
 950 { \
 951     return store_sensor_reg(dev, buf, count, offset); \
 952 } \
 953 static DEVICE_ATTR(sensor##offset, S_IRUGO | S_IWUSR, show_regs_sensor_##offset, store_regs_sensor_##offset)
 954
 955 sysfs_sensor(1);
 956 sysfs_sensor(2);
 957 sysfs_sensor(3);
 958
 959 #define device_create_file_sensor(client, offset) \
 960 device_create_file(&client->dev, &dev_attr_sensor##offset); \
 961
 962 #ifdef W83781D_RT
 963 static ssize_t
 964 show_rt_reg(struct device *dev, char *buf, int nr)
 965 {
 966         struct i2c_client *client = to_i2c_client(dev);
 967         struct w83781d_data *data = i2c_get_clientdata(client);
 968         int i, j = 0;
 969
 970         w83781d_update_client(client);
 971
 972         for (i = 0; i < 32; i++) {
 973                 if (i > 0)
 974                         j += sprintf(buf, " %ld", (long) data->rt[nr - 1][i]);
 975                 else
 976                         j += sprintf(buf, "%ld", (long) data->rt[nr - 1][i]);
 977         }
 978         j += sprintf(buf, "\n");
 979
 980         return j;
 981 }
 982
 983 static ssize_t
 984 store_rt_reg(struct device *dev, const char *buf, size_t count, int nr)
 985 {
 986         struct i2c_client *client = to_i2c_client(dev);
 987         struct w83781d_data *data = i2c_get_clientdata(client);
 988         u32 val, i;
 989
 990         for (i = 0; i < count; i++) {
 991                 val = simple_strtoul(buf + count, NULL, 10);
 992
 993                 /* fixme: no bounds checking 0-255 */
 994                 data->rt[nr - 1][i] = val & 0xff;
 995                 w83781d_write_value(client, W83781D_REG_RT_IDX, i);
 996                 w83781d_write_value(client, W83781D_REG_RT_VAL,
 997                                     data->rt[nr - 1][i]);
 998         }
 999
1000         return count;
1001 }
1002
1003 #define sysfs_rt(offset) \
1004 static ssize_t show_regs_rt_##offset (struct device *dev, char *buf) \
1005 { \
1006         return show_rt_reg(dev, buf, offset); \
1007 } \
1008 static ssize_t store_regs_rt_##offset (struct device *dev, const char *buf, size_t count) \
1009 { \
1010     return store_rt_reg(dev, buf, count, offset); \
1011 } \
1012 static DEVICE_ATTR(rt##offset, S_IRUGO | S_IWUSR, show_regs_rt_##offset, store_regs_rt_##offset)
1013
1014 sysfs_rt(1);
1015 sysfs_rt(2);
1016 sysfs_rt(3);
1017
1018 #define device_create_file_rt(client, offset) \
1019 device_create_file(&client->dev, &dev_attr_rt##offset); \
1020
1021 #endif                          /* ifdef W83781D_RT */
1022
1023 /* This function is called when:
1024      * w83781d_driver is inserted (when this module is loaded), for each
1025        available adapter
1026      * when a new adapter is inserted (and w83781d_driver is still present) */
1027 static int
1028 w83781d_attach_adapter(struct i2c_adapter *adapter)
1029 {
1030         if (!(adapter->class & I2C_ADAP_CLASS_SMBUS))
1031                 return 0;
1032         return i2c_detect(adapter, &addr_data, w83781d_detect);
1033 }
1034
1035 /* Assumes that adapter is of I2C, not ISA variety.
1036  * OTHERWISE DON'T CALL THIS
1037  */
1038 static int
1039 w83781d_detect_subclients(struct i2c_adapter *adapter, int address, int kind,
1040                 struct i2c_client *new_client)
1041 {
1042         int i, val1 = 0, id;
1043         int err;
1044         const char *client_name;
1045         struct w83781d_data *data = i2c_get_clientdata(new_client);
1046
1047         data->lm75[0] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1048         if (!(data->lm75[0])) {
1049                 err = -ENOMEM;
1050                 goto ERROR_SC_0;
1051         }
1052         memset(data->lm75[0], 0x00, sizeof (struct i2c_client));
1053
1054         id = i2c_adapter_id(adapter);
1055
1056         if (force_subclients[0] == id && force_subclients[1] == address) {
1057                 for (i = 2; i <= 3; i++) {
1058                         if (force_subclients[i] < 0x48 ||
1059                             force_subclients[i] > 0x4f) {
1060                                 dev_err(&new_client->dev, "Invalid subclient "
1061                                         "address %d; must be 0x48-0x4f\n",
1062                                         force_subclients[i]);
1063                                 err = -EINVAL;
1064                                 goto ERROR_SC_1;
1065                         }
1066                 }
1067                 w83781d_write_value(new_client, W83781D_REG_I2C_SUBADDR,
1068                                 (force_subclients[2] & 0x07) |
1069                                 ((force_subclients[3] & 0x07) << 4));
1070                 data->lm75[0]->addr = force_subclients[2];
1071         } else {
1072                 val1 = w83781d_read_value(new_client, W83781D_REG_I2C_SUBADDR);
1073                 data->lm75[0]->addr = 0x48 + (val1 & 0x07);
1074         }
1075
1076         if (kind != w83783s) {
1077
1078                 data->lm75[1] = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
1079                 if (!(data->lm75[1])) {
1080                         err = -ENOMEM;
1081                         goto ERROR_SC_1;
1082                 }
1083                 memset(data->lm75[1], 0x0, sizeof(struct i2c_client));
1084
1085                 if (force_subclients[0] == id &&
1086                     force_subclients[1] == address) {
1087                         data->lm75[1]->addr = force_subclients[3];
1088                 } else {
1089                         data->lm75[1]->addr = 0x48 + ((val1 >> 4) & 0x07);
1090                 }
1091                 if (data->lm75[0]->addr == data->lm75[1]->addr) {
1092                         dev_err(&new_client->dev,
1093                                "Duplicate addresses 0x%x for subclients.\n",
1094                                data->lm75[0]->addr);
1095                         err = -EBUSY;
1096                         goto ERROR_SC_2;
1097                 }
1098         }
1099
1100         if (kind == w83781d)
1101                 client_name = "W83781D subclient";
1102         else if (kind == w83782d)
1103                 client_name = "W83782D subclient";
1104         else if (kind == w83783s)
1105                 client_name = "W83783S subclient";
1106         else if (kind == w83627hf)
1107                 client_name = "W83627HF subclient";
1108         else if (kind == as99127f)
1109                 client_name = "AS99127F subclient";
1110         else
1111                 client_name = "unknown subclient?";
1112
1113         for (i = 0; i <= 1; i++) {
1114                 /* store all data in w83781d */
1115                 i2c_set_clientdata(data->lm75[i], NULL);
1116                 data->lm75[i]->adapter = adapter;
1117                 data->lm75[i]->driver = &w83781d_driver;
1118                 data->lm75[i]->flags = 0;
1119                 strlcpy(data->lm75[i]->name, client_name,
1120                         DEVICE_NAME_SIZE);
1121                 if ((err = i2c_attach_client(data->lm75[i]))) {
1122                         dev_err(&new_client->dev, "Subclient %d "
1123                                 "registration at address 0x%x "
1124                                 "failed.\n", i, data->lm75[i]->addr);
1125                         if (i == 1)
1126                                 goto ERROR_SC_3;
1127                         goto ERROR_SC_2;
1128                 }
1129                 if (kind == w83783s)
1130                         break;
1131         }
1132
1133         return 0;
1134
1135 /* Undo inits in case of errors */
1136 ERROR_SC_3:
1137         i2c_detach_client(data->lm75[0]);
1138 ERROR_SC_2:
1139         if (NULL != data->lm75[1])
1140                 kfree(data->lm75[1]);
1141 ERROR_SC_1:
1142         if (NULL != data->lm75[0])
1143                 kfree(data->lm75[0]);
1144 ERROR_SC_0:
1145         return err;
1146 }
1147
1148 static int
1149 w83781d_detect(struct i2c_adapter *adapter, int address, int kind)
1150 {
1151         int i = 0, val1 = 0, val2;
1152         struct i2c_client *new_client;
1153         struct w83781d_data *data;
1154         int err;
1155         const char *client_name = "";
1156         int is_isa = i2c_is_isa_adapter(adapter);
1157         enum vendor { winbond, asus } vendid;
1158
1159         if (!is_isa
1160             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1161                 err = -EINVAL;
1162                 goto ERROR0;
1163         }
1164
1165         if (is_isa)
1166                 if (!request_region(address, W83781D_EXTENT, "w83781d")) {
1167                         err = -EBUSY;
1168                         goto ERROR0;
1169                 }
1170
1171         /* Probe whether there is anything available on this address. Already
1172            done for SMBus clients */
1173         if (kind < 0) {
1174                 if (is_isa) {
1175
1176 #define REALLY_SLOW_IO
1177                         /* We need the timeouts for at least some LM78-like
1178                            chips. But only if we read 'undefined' registers. */
1179                         i = inb_p(address + 1);
1180                         if (inb_p(address + 2) != i) {
1181                                 err = -ENODEV;
1182                                 goto ERROR1;
1183                         }
1184                         if (inb_p(address + 3) != i) {
1185                                 err = -ENODEV;
1186                                 goto ERROR1;
1187                         }
1188                         if (inb_p(address + 7) != i) {
1189                                 err = -ENODEV;
1190                                 goto ERROR1;
1191                         }
1192 #undef REALLY_SLOW_IO
1193
1194                         /* Let's just hope nothing breaks here */
1195                         i = inb_p(address + 5) & 0x7f;
1196                         outb_p(~i & 0x7f, address + 5);
1197                         if ((inb_p(address + 5) & 0x7f) != (~i & 0x7f)) {
1198                                 outb_p(i, address + 5);
1199                                 err = -ENODEV;
1200                                 goto ERROR1;
1201                         }
1202                 }
1203         }
1204
1205         /* OK. For now, we presume we have a valid client. We now create the
1206            client structure, even though we cannot fill it completely yet.
1207            But it allows us to access w83781d_{read,write}_value. */
1208
1209         if (!(new_client = kmalloc(sizeof (struct i2c_client) +
1210                                    sizeof (struct w83781d_data), GFP_KERNEL))) {
1211                 err = -ENOMEM;
1212                 goto ERROR1;
1213         }
1214
1215         memset(new_client, 0x00, sizeof (struct i2c_client) +
1216                sizeof (struct w83781d_data));
1217
1218         data = (struct w83781d_data *) (new_client + 1);
1219         i2c_set_clientdata(new_client, data);
1220         new_client->addr = address;
1221         init_MUTEX(&data->lock);
1222         new_client->adapter = adapter;
1223         new_client->driver = &w83781d_driver;
1224         new_client->flags = 0;
1225
1226         /* Now, we do the remaining detection. */
1227
1228         /* The w8378?d may be stuck in some other bank than bank 0. This may
1229            make reading other information impossible. Specify a force=... or
1230            force_*=... parameter, and the Winbond will be reset to the right
1231            bank. */
1232         if (kind < 0) {
1233                 if (w83781d_read_value(new_client, W83781D_REG_CONFIG) & 0x80){
1234                         err = -ENODEV;
1235                         goto ERROR2;
1236                 }
1237                 val1 = w83781d_read_value(new_client, W83781D_REG_BANK);
1238                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1239                 /* Check for Winbond or Asus ID if in bank 0 */
1240                 if ((!(val1 & 0x07)) &&
1241                     (((!(val1 & 0x80)) && (val2 != 0xa3) && (val2 != 0xc3)
1242                       && (val2 != 0x94))
1243                      || ((val1 & 0x80) && (val2 != 0x5c) && (val2 != 0x12)
1244                          && (val2 != 0x06)))) {
1245                         err = -ENODEV;
1246                         goto ERROR2;
1247                 }
1248                 /* If Winbond SMBus, check address at 0x48.
1249                    Asus doesn't support */
1250                 if ((!is_isa) && (((!(val1 & 0x80)) && (val2 == 0xa3)) ||
1251                                   ((val1 & 0x80) && (val2 == 0x5c)))) {
1252                         if (w83781d_read_value
1253                             (new_client, W83781D_REG_I2C_ADDR) != address) {
1254                                 err = -ENODEV;
1255                                 goto ERROR2;
1256                         }
1257                 }
1258         }
1259
1260         /* We have either had a force parameter, or we have already detected the
1261            Winbond. Put it now into bank 0 and Vendor ID High Byte */
1262         w83781d_write_value(new_client, W83781D_REG_BANK,
1263                             (w83781d_read_value(new_client,
1264                                                 W83781D_REG_BANK) & 0x78) |
1265                             0x80);
1266
1267         /* Determine the chip type. */
1268         if (kind <= 0) {
1269                 /* get vendor ID */
1270                 val2 = w83781d_read_value(new_client, W83781D_REG_CHIPMAN);
1271                 if (val2 == 0x5c)
1272                         vendid = winbond;
1273                 else if ((val2 == 0x12) || (val2 == 0x06))
1274                         vendid = asus;
1275                 else {
1276                         err = -ENODEV;
1277                         goto ERROR2;
1278                 }
1279
1280                 /* mask off lower bit, not reliable */
1281                 val1 =
1282                     w83781d_read_value(new_client, W83781D_REG_WCHIPID) & 0xfe;
1283                 if (val1 == 0x10 && vendid == winbond)
1284                         kind = w83781d;
1285                 else if (val1 == 0x30 && vendid == winbond)
1286                         kind = w83782d;
1287                 else if (val1 == 0x40 && vendid == winbond && !is_isa)
1288                         kind = w83783s;
1289                 else if ((val1 == 0x20 || val1 == 0x90) && vendid == winbond)
1290                         kind = w83627hf;
1291                 else if (val1 == 0x30 && vendid == asus && !is_isa)
1292                         kind = as99127f;
1293                 else if (val1 == 0x60 && vendid == winbond && is_isa)
1294                         kind = w83697hf;
1295                 else {
1296                         if (kind == 0)
1297                                 dev_warn(&new_client->dev,
1298                                        "Ignoring 'force' parameter for unknown chip at"
1299                                        "adapter %d, address 0x%02x\n",
1300                                        i2c_adapter_id(adapter), address);
1301                         err = -EINVAL;
1302                         goto ERROR2;
1303                 }
1304         }
1305
1306         if (kind == w83781d) {
1307                 client_name = "W83781D chip";
1308         } else if (kind == w83782d) {
1309                 client_name = "W83782D chip";
1310         } else if (kind == w83783s) {
1311                 client_name = "W83783S chip";
1312         } else if (kind == w83627hf) {
1313                 if (val1 == 0x90)
1314                         client_name = "W83627THF chip";
1315                 else
1316                         client_name = "W83627HF chip";
1317         } else if (kind == as99127f) {
1318                 client_name = "AS99127F chip";
1319         } else if (kind == w83697hf) {
1320                 client_name = "W83697HF chip";
1321         } else {
1322                 dev_err(&new_client->dev, "Internal error: unknown "
1323                                                 "kind (%d)?!?", kind);
1324                 err = -ENODEV;
1325                 goto ERROR2;
1326         }
1327
1328         /* Fill in the remaining client fields and put into the global list */
1329         strlcpy(new_client->name, client_name, DEVICE_NAME_SIZE);
1330         data->type = kind;
1331
1332         data->valid = 0;
1333         init_MUTEX(&data->update_lock);
1334
1335         /* Tell the I2C layer a new client has arrived */
1336         if ((err = i2c_attach_client(new_client)))
1337                 goto ERROR2;
1338
1339         /* attach secondary i2c lm75-like clients */
1340         if (!is_isa) {
1341                 if ((err = w83781d_detect_subclients(adapter, address,
1342                                 kind, new_client)))
1343                         goto ERROR3;
1344         } else {
1345                 data->lm75[0] = NULL;
1346                 data->lm75[1] = NULL;
1347         }
1348
1349         device_create_file_in(new_client, 0);
1350         if (kind != w83783s && kind != w83697hf)
1351                 device_create_file_in(new_client, 1);
1352         device_create_file_in(new_client, 2);
1353         device_create_file_in(new_client, 3);
1354         device_create_file_in(new_client, 4);
1355         device_create_file_in(new_client, 5);
1356         device_create_file_in(new_client, 6);
1357         if (kind != as99127f && kind != w83781d && kind != w83783s) {
1358                 device_create_file_in(new_client, 7);
1359                 device_create_file_in(new_client, 8);
1360         }
1361
1362         device_create_file_fan(new_client, 1);
1363         device_create_file_fan(new_client, 2);
1364         if (kind != w83697hf)
1365                 device_create_file_fan(new_client, 3);
1366
1367         device_create_file_temp(new_client, 1);
1368         device_create_file_temp(new_client, 2);
1369         if (kind != w83783s && kind != w83697hf)
1370                 device_create_file_temp(new_client, 3);
1371
1372         if (kind != w83697hf)
1373                 device_create_file_vid(new_client);
1374
1375         if (kind != w83697hf)
1376                 device_create_file_vrm(new_client);
1377
1378         device_create_file_fan_div(new_client, 1);
1379         device_create_file_fan_div(new_client, 2);
1380         if (kind != w83697hf)
1381                 device_create_file_fan_div(new_client, 3);
1382
1383         device_create_file_alarms(new_client);
1384
1385         device_create_file_beep(new_client);
1386
1387         if (kind != w83781d) {
1388                 device_create_file_pwm(new_client, 1);
1389                 device_create_file_pwm(new_client, 2);
1390                 device_create_file_pwmenable(new_client, 2);
1391         }
1392         if (kind == w83782d && !is_isa) {
1393                 device_create_file_pwm(new_client, 3);
1394                 device_create_file_pwm(new_client, 4);
1395         }
1396
1397         if (kind != as99127f && kind != w83781d) {
1398                 device_create_file_sensor(new_client, 1);
1399                 device_create_file_sensor(new_client, 2);
1400                 if (kind != w83783s && kind != w83697hf)
1401                         device_create_file_sensor(new_client, 3);
1402         }
1403 #ifdef W83781D_RT
1404         if (kind == w83781d) {
1405                 device_create_file_rt(new_client, 1);
1406                 device_create_file_rt(new_client, 2);
1407                 device_create_file_rt(new_client, 3);
1408         }
1409 #endif
1410
1411         /* Initialize the chip */
1412         w83781d_init_client(new_client);
1413         return 0;
1414
1415 ERROR3:
1416         i2c_detach_client(new_client);
1417 ERROR2:
1418         kfree(new_client);
1419 ERROR1:
1420         if (is_isa)
1421                 release_region(address, W83781D_EXTENT);
1422 ERROR0:
1423         return err;
1424 }
1425
1426 static int
1427 w83781d_detach_client(struct i2c_client *client)
1428 {
1429         int err;
1430
1431         if (i2c_is_isa_client(client))
1432                 release_region(client->addr, W83781D_EXTENT);
1433
1434         if ((err = i2c_detach_client(client))) {
1435                 dev_err(&client->dev,
1436                        "Client deregistration failed, client not detached.\n");
1437                 return err;
1438         }
1439
1440         kfree(client);
1441
1442         return 0;
1443 }
1444
1445 /* The SMBus locks itself, usually, but nothing may access the Winbond between
1446    bank switches. ISA access must always be locked explicitly!
1447    We ignore the W83781D BUSY flag at this moment - it could lead to deadlocks,
1448    would slow down the W83781D access and should not be necessary.
1449    There are some ugly typecasts here, but the good news is - they should
1450    nowhere else be necessary! */
1451 static int
1452 w83781d_read_value(struct i2c_client *client, u16 reg)
1453 {
1454         struct w83781d_data *data = i2c_get_clientdata(client);
1455         int res, word_sized, bank;
1456         struct i2c_client *cl;
1457
1458         down(&data->lock);
1459         if (i2c_is_isa_client(client)) {
1460                 word_sized = (((reg & 0xff00) == 0x100)
1461                               || ((reg & 0xff00) == 0x200))
1462                     && (((reg & 0x00ff) == 0x50)
1463                         || ((reg & 0x00ff) == 0x53)
1464                         || ((reg & 0x00ff) == 0x55));
1465                 if (reg & 0xff00) {
1466                         outb_p(W83781D_REG_BANK,
1467                                client->addr + W83781D_ADDR_REG_OFFSET);
1468                         outb_p(reg >> 8,
1469                                client->addr + W83781D_DATA_REG_OFFSET);
1470                 }
1471                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1472                 res = inb_p(client->addr + W83781D_DATA_REG_OFFSET);
1473                 if (word_sized) {
1474                         outb_p((reg & 0xff) + 1,
1475                                client->addr + W83781D_ADDR_REG_OFFSET);
1476                         res =
1477                             (res << 8) + inb_p(client->addr +
1478                                                W83781D_DATA_REG_OFFSET);
1479                 }
1480                 if (reg & 0xff00) {
1481                         outb_p(W83781D_REG_BANK,
1482                                client->addr + W83781D_ADDR_REG_OFFSET);
1483                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1484                 }
1485         } else {
1486                 bank = (reg >> 8) & 0x0f;
1487                 if (bank > 2)
1488                         /* switch banks */
1489                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1490                                                   bank);
1491                 if (bank == 0 || bank > 2) {
1492                         res = i2c_smbus_read_byte_data(client, reg & 0xff);
1493                 } else {
1494                         /* switch to subclient */
1495                         cl = data->lm75[bank - 1];
1496                         /* convert from ISA to LM75 I2C addresses */
1497                         switch (reg & 0xff) {
1498                         case 0x50:      /* TEMP */
1499                                 res =
1500                                     swap_bytes(i2c_smbus_read_word_data(cl, 0));
1501                                 break;
1502                         case 0x52:      /* CONFIG */
1503                                 res = i2c_smbus_read_byte_data(cl, 1);
1504                                 break;
1505                         case 0x53:      /* HYST */
1506                                 res =
1507                                     swap_bytes(i2c_smbus_read_word_data(cl, 2));
1508                                 break;
1509                         case 0x55:      /* OVER */
1510                         default:
1511                                 res =
1512                                     swap_bytes(i2c_smbus_read_word_data(cl, 3));
1513                                 break;
1514                         }
1515                 }
1516                 if (bank > 2)
1517                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1518         }
1519         up(&data->lock);
1520         return res;
1521 }
1522
1523 static int
1524 w83781d_write_value(struct i2c_client *client, u16 reg, u16 value)
1525 {
1526         struct w83781d_data *data = i2c_get_clientdata(client);
1527         int word_sized, bank;
1528         struct i2c_client *cl;
1529
1530         down(&data->lock);
1531         if (i2c_is_isa_client(client)) {
1532                 word_sized = (((reg & 0xff00) == 0x100)
1533                               || ((reg & 0xff00) == 0x200))
1534                     && (((reg & 0x00ff) == 0x53)
1535                         || ((reg & 0x00ff) == 0x55));
1536                 if (reg & 0xff00) {
1537                         outb_p(W83781D_REG_BANK,
1538                                client->addr + W83781D_ADDR_REG_OFFSET);
1539                         outb_p(reg >> 8,
1540                                client->addr + W83781D_DATA_REG_OFFSET);
1541                 }
1542                 outb_p(reg & 0xff, client->addr + W83781D_ADDR_REG_OFFSET);
1543                 if (word_sized) {
1544                         outb_p(value >> 8,
1545                                client->addr + W83781D_DATA_REG_OFFSET);
1546                         outb_p((reg & 0xff) + 1,
1547                                client->addr + W83781D_ADDR_REG_OFFSET);
1548                 }
1549                 outb_p(value & 0xff, client->addr + W83781D_DATA_REG_OFFSET);
1550                 if (reg & 0xff00) {
1551                         outb_p(W83781D_REG_BANK,
1552                                client->addr + W83781D_ADDR_REG_OFFSET);
1553                         outb_p(0, client->addr + W83781D_DATA_REG_OFFSET);
1554                 }
1555         } else {
1556                 bank = (reg >> 8) & 0x0f;
1557                 if (bank > 2)
1558                         /* switch banks */
1559                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK,
1560                                                   bank);
1561                 if (bank == 0 || bank > 2) {
1562                         i2c_smbus_write_byte_data(client, reg & 0xff,
1563                                                   value & 0xff);
1564                 } else {
1565                         /* switch to subclient */
1566                         cl = data->lm75[bank - 1];
1567                         /* convert from ISA to LM75 I2C addresses */
1568                         switch (reg & 0xff) {
1569                         case 0x52:      /* CONFIG */
1570                                 i2c_smbus_write_byte_data(cl, 1, value & 0xff);
1571                                 break;
1572                         case 0x53:      /* HYST */
1573                                 i2c_smbus_write_word_data(cl, 2,
1574                                                           swap_bytes(value));
1575                                 break;
1576                         case 0x55:      /* OVER */
1577                                 i2c_smbus_write_word_data(cl, 3,
1578                                                           swap_bytes(value));
1579                                 break;
1580                         }
1581                 }
1582                 if (bank > 2)
1583                         i2c_smbus_write_byte_data(client, W83781D_REG_BANK, 0);
1584         }
1585         up(&data->lock);
1586         return 0;
1587 }
1588
1589 /* Called when we have found a new W83781D. It should set limits, etc. */
1590 static void
1591 w83781d_init_client(struct i2c_client *client)
1592 {
1593         struct w83781d_data *data = i2c_get_clientdata(client);
1594         int vid = 0, i, p;
1595         int type = data->type;
1596         u8 tmp;
1597
1598         if (init && type != as99127f) { /* this resets registers we don't have
1599                                            documentation for on the as99127f */
1600                 /* save these registers */
1601                 i = w83781d_read_value(client, W83781D_REG_BEEP_CONFIG);
1602                 p = w83781d_read_value(client, W83781D_REG_PWMCLK12);
1603                 /* Reset all except Watchdog values and last conversion values
1604                    This sets fan-divs to 2, among others */
1605                 w83781d_write_value(client, W83781D_REG_CONFIG, 0x80);
1606                 /* Restore the registers and disable power-on abnormal beep.
1607                    This saves FAN 1/2/3 input/output values set by BIOS. */
1608                 w83781d_write_value(client, W83781D_REG_BEEP_CONFIG, i | 0x80);
1609                 w83781d_write_value(client, W83781D_REG_PWMCLK12, p);
1610                 /* Disable master beep-enable (reset turns it on).
1611                    Individual beep_mask should be reset to off but for some reason
1612                    disabling this bit helps some people not get beeped */
1613                 w83781d_write_value(client, W83781D_REG_BEEP_INTS2, 0);
1614         }
1615
1616         if (type != w83697hf) {
1617                 vid = w83781d_read_value(client, W83781D_REG_VID_FANDIV) & 0x0f;
1618                 vid |=
1619                     (w83781d_read_value(client, W83781D_REG_CHIPID) & 0x01) <<
1620                     4;
1621                 data->vrm = DEFAULT_VRM;
1622                 vid = vid_from_reg(vid, data->vrm);
1623         }
1624
1625         if ((type != w83781d) && (type != as99127f)) {
1626                 tmp = w83781d_read_value(client, W83781D_REG_SCFG1);
1627                 for (i = 1; i <= 3; i++) {
1628                         if (!(tmp & BIT_SCFG1[i - 1])) {
1629                                 data->sens[i - 1] = W83781D_DEFAULT_BETA;
1630                         } else {
1631                                 if (w83781d_read_value
1632                                     (client,
1633                                      W83781D_REG_SCFG2) & BIT_SCFG2[i - 1])
1634                                         data->sens[i - 1] = 1;
1635                                 else
1636                                         data->sens[i - 1] = 2;
1637                         }
1638                         if ((type == w83783s || type == w83697hf) && (i == 2))
1639                                 break;
1640                 }
1641         }
1642 #ifdef W83781D_RT
1643 /*
1644    Fill up the RT Tables.
1645    We assume that they are 32 bytes long, in order for temp 1-3.
1646    Data sheet documentation is sparse.
1647    We also assume that it is only for the 781D although I suspect
1648    that the others support it as well....
1649 */
1650
1651         if (init && type == w83781d) {
1652                 u16 k = 0;
1653 /*
1654     Auto-indexing doesn't seem to work...
1655     w83781d_write_value(client,W83781D_REG_RT_IDX,0);
1656 */
1657                 for (i = 0; i < 3; i++) {
1658                         int j;
1659                         for (j = 0; j < 32; j++) {
1660                                 w83781d_write_value(client,
1661                                                     W83781D_REG_RT_IDX, k++);
1662                                 data->rt[i][j] =
1663                                     w83781d_read_value(client,
1664                                                        W83781D_REG_RT_VAL);
1665                         }
1666                 }
1667         }
1668 #endif                          /* W83781D_RT */
1669
1670         if (init) {
1671                 w83781d_write_value(client, W83781D_REG_IN_MIN(0),
1672                                     IN_TO_REG(W83781D_INIT_IN_MIN_0));
1673                 w83781d_write_value(client, W83781D_REG_IN_MAX(0),
1674                                     IN_TO_REG(W83781D_INIT_IN_MAX_0));
1675                 if (type != w83783s && type != w83697hf) {
1676                         w83781d_write_value(client, W83781D_REG_IN_MIN(1),
1677                                             IN_TO_REG(W83781D_INIT_IN_MIN_1));
1678                         w83781d_write_value(client, W83781D_REG_IN_MAX(1),
1679                                             IN_TO_REG(W83781D_INIT_IN_MAX_1));
1680                 }
1681
1682                 w83781d_write_value(client, W83781D_REG_IN_MIN(2),
1683                                     IN_TO_REG(W83781D_INIT_IN_MIN_2));
1684                 w83781d_write_value(client, W83781D_REG_IN_MAX(2),
1685                                     IN_TO_REG(W83781D_INIT_IN_MAX_2));
1686                 w83781d_write_value(client, W83781D_REG_IN_MIN(3),
1687                                     IN_TO_REG(W83781D_INIT_IN_MIN_3));
1688                 w83781d_write_value(client, W83781D_REG_IN_MAX(3),
1689                                     IN_TO_REG(W83781D_INIT_IN_MAX_3));
1690                 w83781d_write_value(client, W83781D_REG_IN_MIN(4),
1691                                     IN_TO_REG(W83781D_INIT_IN_MIN_4));
1692                 w83781d_write_value(client, W83781D_REG_IN_MAX(4),
1693                                     IN_TO_REG(W83781D_INIT_IN_MAX_4));
1694                 if (type == w83781d || type == as99127f) {
1695                         w83781d_write_value(client, W83781D_REG_IN_MIN(5),
1696                                             IN_TO_REG(W83781D_INIT_IN_MIN_5));
1697                         w83781d_write_value(client, W83781D_REG_IN_MAX(5),
1698                                             IN_TO_REG(W83781D_INIT_IN_MAX_5));
1699                 } else {
1700                         w83781d_write_value(client, W83781D_REG_IN_MIN(5),
1701                                             IN_TO_REG(W83782D_INIT_IN_MIN_5));
1702                         w83781d_write_value(client, W83781D_REG_IN_MAX(5),
1703                                             IN_TO_REG(W83782D_INIT_IN_MAX_5));
1704                 }
1705                 if (type == w83781d || type == as99127f) {
1706                         w83781d_write_value(client, W83781D_REG_IN_MIN(6),
1707                                             IN_TO_REG(W83781D_INIT_IN_MIN_6));
1708                         w83781d_write_value(client, W83781D_REG_IN_MAX(6),
1709                                             IN_TO_REG(W83781D_INIT_IN_MAX_6));
1710                 } else {
1711                         w83781d_write_value(client, W83781D_REG_IN_MIN(6),
1712                                             IN_TO_REG(W83782D_INIT_IN_MIN_6));
1713                         w83781d_write_value(client, W83781D_REG_IN_MAX(6),
1714                                             IN_TO_REG(W83782D_INIT_IN_MAX_6));
1715                 }
1716                 if ((type == w83782d) || (type == w83627hf) ||
1717                     (type == w83697hf)) {
1718                         w83781d_write_value(client, W83781D_REG_IN_MIN(7),
1719                                             IN_TO_REG(W83781D_INIT_IN_MIN_7));
1720                         w83781d_write_value(client, W83781D_REG_IN_MAX(7),
1721                                             IN_TO_REG(W83781D_INIT_IN_MAX_7));
1722                         w83781d_write_value(client, W83781D_REG_IN_MIN(8),
1723                                             IN_TO_REG(W83781D_INIT_IN_MIN_8));
1724                         w83781d_write_value(client, W83781D_REG_IN_MAX(8),
1725                                             IN_TO_REG(W83781D_INIT_IN_MAX_8));
1726                         w83781d_write_value(client, W83781D_REG_VBAT,
1727                                             (w83781d_read_value
1728                                              (client,
1729                                               W83781D_REG_VBAT) | 0x01));
1730                 }
1731                 w83781d_write_value(client, W83781D_REG_FAN_MIN(1),
1732                                     FAN_TO_REG(W83781D_INIT_FAN_MIN_1, 2));
1733                 w83781d_write_value(client, W83781D_REG_FAN_MIN(2),
1734                                     FAN_TO_REG(W83781D_INIT_FAN_MIN_2, 2));
1735                 if (type != w83697hf) {
1736                         w83781d_write_value(client, W83781D_REG_FAN_MIN(3),
1737                                             FAN_TO_REG(W83781D_INIT_FAN_MIN_3,
1738                                                        2));
1739                 }
1740
1741                 w83781d_write_value(client, W83781D_REG_TEMP_OVER(1),
1742                                     TEMP_TO_REG(W83781D_INIT_TEMP_OVER));
1743                 w83781d_write_value(client, W83781D_REG_TEMP_HYST(1),
1744                                     TEMP_TO_REG(W83781D_INIT_TEMP_HYST));
1745
1746                 if (type == as99127f) {
1747                         w83781d_write_value(client, W83781D_REG_TEMP_OVER(2),
1748                                             AS99127_TEMP_ADD_TO_REG
1749                                             (W83781D_INIT_TEMP2_OVER));
1750                         w83781d_write_value(client, W83781D_REG_TEMP_HYST(2),
1751                                             AS99127_TEMP_ADD_TO_REG
1752                                             (W83781D_INIT_TEMP2_HYST));
1753                 } else {
1754                         w83781d_write_value(client, W83781D_REG_TEMP_OVER(2),
1755                                             TEMP_ADD_TO_REG
1756                                             (W83781D_INIT_TEMP2_OVER));
1757                         w83781d_write_value(client, W83781D_REG_TEMP_HYST(2),
1758                                             TEMP_ADD_TO_REG
1759                                             (W83781D_INIT_TEMP2_HYST));
1760                 }
1761                 w83781d_write_value(client, W83781D_REG_TEMP2_CONFIG, 0x00);
1762
1763                 if (type == as99127f) {
1764                         w83781d_write_value(client, W83781D_REG_TEMP_OVER(3),
1765                                             AS99127_TEMP_ADD_TO_REG
1766                                             (W83781D_INIT_TEMP3_OVER));
1767                         w83781d_write_value(client, W83781D_REG_TEMP_HYST(3),
1768                                             AS99127_TEMP_ADD_TO_REG
1769                                             (W83781D_INIT_TEMP3_HYST));
1770                 } else if (type != w83783s && type != w83697hf) {
1771                         w83781d_write_value(client, W83781D_REG_TEMP_OVER(3),
1772                                             TEMP_ADD_TO_REG
1773                                             (W83781D_INIT_TEMP3_OVER));
1774                         w83781d_write_value(client, W83781D_REG_TEMP_HYST(3),
1775                                             TEMP_ADD_TO_REG
1776                                             (W83781D_INIT_TEMP3_HYST));
1777                 }
1778                 if (type != w83783s && type != w83697hf) {
1779                         w83781d_write_value(client, W83781D_REG_TEMP3_CONFIG,
1780                                             0x00);
1781                 }
1782                 if (type != w83781d) {
1783                         /* enable comparator mode for temp2 and temp3 so
1784                            alarm indication will work correctly */
1785                         w83781d_write_value(client, W83781D_REG_IRQ, 0x41);
1786                         for (i = 0; i < 3; i++)
1787                                 data->pwmenable[i] = 1;
1788                 }
1789         }
1790
1791         /* Start monitoring */
1792         w83781d_write_value(client, W83781D_REG_CONFIG,
1793                             (w83781d_read_value(client,
1794                                                 W83781D_REG_CONFIG) & 0xf7)
1795                             | 0x01);
1796 }
1797
1798 static void
1799 w83781d_update_client(struct i2c_client *client)
1800 {
1801         struct w83781d_data *data = i2c_get_clientdata(client);
1802         int i;
1803
1804         down(&data->update_lock);
1805
1806         if (time_after
1807             (jiffies - data->last_updated, (unsigned long) (HZ + HZ / 2))
1808             || time_before(jiffies, data->last_updated) || !data->valid) {
1809                 pr_debug(KERN_DEBUG "Starting device update\n");
1810
1811                 for (i = 0; i <= 8; i++) {
1812                         if ((data->type == w83783s || data->type == w83697hf)
1813                             && (i == 1))
1814                                 continue;       /* 783S has no in1 */
1815                         data->in[i] =
1816                             w83781d_read_value(client, W83781D_REG_IN(i));
1817                         data->in_min[i] =
1818                             w83781d_read_value(client, W83781D_REG_IN_MIN(i));
1819                         data->in_max[i] =
1820                             w83781d_read_value(client, W83781D_REG_IN_MAX(i));
1821                         if ((data->type != w83782d) && (data->type != w83697hf)
1822                             && (data->type != w83627hf) && (i == 6))
1823                                 break;
1824                 }
1825                 for (i = 1; i <= 3; i++) {
1826                         data->fan[i - 1] =
1827                             w83781d_read_value(client, W83781D_REG_FAN(i));
1828                         data->fan_min[i - 1] =
1829                             w83781d_read_value(client, W83781D_REG_FAN_MIN(i));
1830                 }
1831                 if (data->type != w83781d) {
1832                         for (i = 1; i <= 4; i++) {
1833                                 data->pwm[i - 1] =
1834                                     w83781d_read_value(client,
1835                                                        W83781D_REG_PWM(i));
1836                                 if (((data->type == w83783s)
1837                                      || (data->type == w83627hf)
1838                                      || (data->type == as99127f)
1839                                      || (data->type == w83697hf)
1840                                      || ((data->type == w83782d)
1841                                          && i2c_is_isa_client(client)))
1842                                     && i == 2)
1843                                         break;
1844                         }
1845                 }
1846
1847                 data->temp = w83781d_read_value(client, W83781D_REG_TEMP(1));
1848                 data->temp_min =
1849                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(1));
1850                 data->temp_max =
1851                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(1));
1852                 data->temp_add[0] =
1853                     w83781d_read_value(client, W83781D_REG_TEMP(2));
1854                 data->temp_max_add[0] =
1855                     w83781d_read_value(client, W83781D_REG_TEMP_OVER(2));
1856                 data->temp_min_add[0] =
1857                     w83781d_read_value(client, W83781D_REG_TEMP_HYST(2));
1858                 if (data->type != w83783s && data->type != w83697hf) {
1859                         data->temp_add[1] =
1860                             w83781d_read_value(client, W83781D_REG_TEMP(3));
1861                         data->temp_max_add[1] =
1862                             w83781d_read_value(client,
1863                                                W83781D_REG_TEMP_OVER(3));
1864                         data->temp_min_add[1] =
1865                             w83781d_read_value(client,
1866                                                W83781D_REG_TEMP_HYST(3));
1867                 }
1868                 i = w83781d_read_value(client, W83781D_REG_VID_FANDIV);
1869                 if (data->type != w83697hf) {
1870                         data->vid = i & 0x0f;
1871                         data->vid |=
1872                             (w83781d_read_value(client, W83781D_REG_CHIPID) &
1873                              0x01)
1874                             << 4;
1875                 }
1876                 data->fan_div[0] = (i >> 4) & 0x03;
1877                 data->fan_div[1] = (i >> 6) & 0x03;
1878                 if (data->type != w83697hf) {
1879                         data->fan_div[2] = (w83781d_read_value(client,
1880                                                                W83781D_REG_PIN)
1881                                             >> 6) & 0x03;
1882                 }
1883                 if ((data->type != w83781d) && (data->type != as99127f)) {
1884                         i = w83781d_read_value(client, W83781D_REG_VBAT);
1885                         data->fan_div[0] |= (i >> 3) & 0x04;
1886                         data->fan_div[1] |= (i >> 4) & 0x04;
1887                         if (data->type != w83697hf)
1888                                 data->fan_div[2] |= (i >> 5) & 0x04;
1889                 }
1890                 data->alarms =
1891                     w83781d_read_value(client,
1892                                        W83781D_REG_ALARM1) +
1893                     (w83781d_read_value(client, W83781D_REG_ALARM2) << 8);
1894                 if ((data->type == w83782d) || (data->type == w83627hf)) {
1895                         data->alarms |=
1896                             w83781d_read_value(client,
1897                                                W83781D_REG_ALARM3) << 16;
1898                 }
1899                 i = w83781d_read_value(client, W83781D_REG_BEEP_INTS2);
1900                 data->beep_enable = i >> 7;
1901                 data->beep_mask = ((i & 0x7f) << 8) +
1902                     w83781d_read_value(client, W83781D_REG_BEEP_INTS1);
1903                 if ((data->type != w83781d) && (data->type != as99127f)) {
1904                         data->beep_mask |=
1905                             w83781d_read_value(client,
1906                                                W83781D_REG_BEEP_INTS3) << 16;
1907                 }
1908                 data->last_updated = jiffies;
1909                 data->valid = 1;
1910         }
1911
1912         up(&data->update_lock);
1913 }
1914
1915 static int __init
1916 sensors_w83781d_init(void)
1917 {
1918         return i2c_add_driver(&w83781d_driver);
1919 }
1920
1921 static void __exit
1922 sensors_w83781d_exit(void)
1923 {
1924         i2c_del_driver(&w83781d_driver);
1925 }
1926
1927 MODULE_AUTHOR("Frodo Looijaard <frodol@dds.nl>, "
1928               "Philip Edelbrock <phil@netroedge.com>, "
1929               "and Mark Studebaker <mdsxyz123@yahoo.com>");
1930 MODULE_DESCRIPTION("W83781D driver");
1931 MODULE_LICENSE("GPL");
1932
1933 module_init(sensors_w83781d_init);
1934 module_exit(sensors_w83781d_exit);