2 * linux/arch/mips/dec/time.c
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * Copyright (C) 2000, 2003 Maciej W. Rozycki
7 * This file contains the time handling details for PC-style clocks as
8 * found in some MIPS systems.
11 #include <linux/bcd.h>
12 #include <linux/types.h>
13 #include <linux/errno.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/param.h>
18 #include <linux/string.h>
20 #include <linux/time.h>
21 #include <linux/interrupt.h>
22 #include <linux/bcd.h>
25 #include <asm/bootinfo.h>
26 #include <asm/mipsregs.h>
29 #include <asm/sections.h>
30 #include <asm/dec/machtype.h>
31 #include <asm/dec/ioasic.h>
32 #include <asm/dec/ioasic_addrs.h>
34 #include <linux/mc146818rtc.h>
35 #include <linux/timex.h>
37 #include <asm/div64.h>
39 extern void (*board_time_init)(struct irqaction *irq);
41 extern volatile unsigned long wall_jiffies;
44 * Change this if you have some constant time drift
46 /* This is the value for the PC-style PICs. */
47 /* #define USECS_PER_JIFFY (1000020/HZ) */
49 /* This is for machines which generate the exact clock. */
50 #define USECS_PER_JIFFY (1000000/HZ)
51 #define USECS_PER_JIFFY_FRAC ((u32)((1000000ULL << 32) / HZ))
53 #define TICK_SIZE (tick_nsec / 1000)
55 /* Cycle counter value at the previous timer interrupt.. */
57 static unsigned int timerhi, timerlo;
60 * Cached "1/(clocks per usec)*2^32" value.
61 * It has to be recalculated once each jiffy.
63 static unsigned long cached_quotient = 0;
65 /* Last jiffy when do_fast_gettimeoffset() was called. */
66 static unsigned long last_jiffies = 0;
69 * On MIPS only R4000 and better have a cycle counter.
71 * FIXME: Does playing with the RP bit in c0_status interfere with this code?
73 static unsigned long do_fast_gettimeoffset(void)
76 unsigned long res, tmp;
77 unsigned long quotient;
81 quotient = cached_quotient;
83 if (last_jiffies != tmp) {
85 if (last_jiffies != 0) {
87 __asm__(".set push\n\t"
99 : "=&r" (quotient), "=&r" (r0)
100 : "r" (timerhi), "m" (timerlo),
101 "r" (tmp), "r" (USECS_PER_JIFFY),
102 "r" (USECS_PER_JIFFY_FRAC));
103 cached_quotient = quotient;
106 /* Get last timer tick in absolute kernel time */
107 count = read_c0_count();
109 /* .. relative to previous jiffy (32 bits is enough) */
111 //printk("count: %08lx, %08lx:%08lx\n", count, timerhi, timerlo);
113 __asm__("multu %2,%3"
114 : "=l" (tmp), "=h" (res)
115 : "r" (count), "r" (quotient));
118 * Due to possible jiffies inconsistencies, we need to check
119 * the result so that we'll get a timer that is monotonic.
121 if (res >= USECS_PER_JIFFY)
122 res = USECS_PER_JIFFY - 1;
127 static unsigned long do_ioasic_gettimeoffset(void)
130 unsigned long res, tmp;
131 unsigned long quotient;
135 quotient = cached_quotient;
137 if (last_jiffies != tmp) {
139 if (last_jiffies != 0) {
141 do_div64_32(r0, timerhi, timerlo, tmp);
142 do_div64_32(quotient, USECS_PER_JIFFY,
143 USECS_PER_JIFFY_FRAC, r0);
144 cached_quotient = quotient;
147 /* Get last timer tick in absolute kernel time */
148 count = ioasic_read(IO_REG_FCTR);
150 /* .. relative to previous jiffy (32 bits is enough) */
152 //printk("count: %08x, %08x:%08x\n", count, timerhi, timerlo);
154 __asm__("multu %2,%3"
155 : "=l" (tmp), "=h" (res)
156 : "r" (count), "r" (quotient));
159 * Due to possible jiffies inconsistencies, we need to check
160 * the result so that we'll get a timer that is monotonic.
162 if (res >= USECS_PER_JIFFY)
163 res = USECS_PER_JIFFY - 1;
168 /* This function must be called with interrupts disabled
169 * It was inspired by Steve McCanne's microtime-i386 for BSD. -- jrs
171 * However, the pc-audio speaker driver changes the divisor so that
172 * it gets interrupted rather more often - it loads 64 into the
173 * counter rather than 11932! This has an adverse impact on
174 * do_gettimeoffset() -- it stops working! What is also not
175 * good is that the interval that our timer function gets called
176 * is no longer 10.0002 ms, but 9.9767 ms. To get around this
177 * would require using a different timing source. Maybe someone
178 * could use the RTC - I know that this can interrupt at frequencies
179 * ranging from 8192Hz to 2Hz. If I had the energy, I'd somehow fix
180 * it so that at startup, the timer code in sched.c would select
181 * using either the RTC or the 8253 timer. The decision would be
182 * based on whether there was any other device around that needed
183 * to trample on the 8253. I'd set up the RTC to interrupt at 1024 Hz,
184 * and then do some jiggery to have a version of do_timer that
185 * advanced the clock by 1/1024 s. Every time that reached over 1/100
186 * of a second, then do all the old code. If the time was kept correct
187 * then do_gettimeoffset could just return 0 - there is no low order
188 * divider that can be accessed.
190 * Ideally, you would be able to use the RTC for the speaker driver,
191 * but it appears that the speaker driver really needs interrupt more
192 * often than every 120 us or so.
194 * Anyway, this needs more thought.... pjsg (1993-08-28)
196 * If you are really that interested, you should be reading
197 * comp.protocols.time.ntp!
200 static unsigned long do_slow_gettimeoffset(void)
203 * This is a kludge until I find a way for the
204 * DECstations without bus cycle counter. HK
209 static unsigned long (*do_gettimeoffset) (void) = do_slow_gettimeoffset;
212 * This version of gettimeofday has microsecond resolution
213 * and better than microsecond precision on fast x86 machines with TSC.
215 void do_gettimeofday(struct timeval *tv)
218 unsigned long usec, sec;
221 seq = read_seqbegin(&xtime_lock);
222 usec = do_gettimeoffset();
224 unsigned long lost = jiffies - wall_jiffies;
226 usec += lost * (1000000 / HZ);
229 usec += (xtime.tv_nsec / 1000);
230 } while (read_seqretry(&xtime_lock, seq));
232 while (usec >= 1000000) {
241 void do_settimeofday(struct timeval *tv)
243 write_seqlock_irq(&xtime_lock);
245 * This is revolting. We need to set "xtime" correctly. However, the
246 * value in this location is the value at the most recent update of
247 * wall time. Discover what correction gettimeofday() would have
248 * made, and then undo it!
250 tv->tv_usec -= do_gettimeoffset();
251 tv->tv_usec -= (jiffies - wall_jiffies) * (1000000 / HZ);
253 while (tv->tv_usec < 0) {
254 tv->tv_usec += 1000000;
258 xtime.tv_sec = tv->tv_sec;
259 xtime.tv_nsec = (tv->tv_usec * 1000);
260 time_adjust = 0; /* stop active adjtime() */
261 time_status |= STA_UNSYNC;
262 time_maxerror = NTP_PHASE_LIMIT;
263 time_esterror = NTP_PHASE_LIMIT;
264 write_sequnlock_irq(&xtime_lock);
268 * In order to set the CMOS clock precisely, set_rtc_mmss has to be
269 * called 500 ms after the second nowtime has started, because when
270 * nowtime is written into the registers of the CMOS clock, it will
271 * jump to the next second precisely 500 ms later. Check the Motorola
272 * MC146818A or Dallas DS12887 data sheet for details.
274 static int set_rtc_mmss(unsigned long nowtime)
277 int real_seconds, real_minutes, cmos_minutes;
278 unsigned char save_control, save_freq_select;
280 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
281 CMOS_WRITE((save_control | RTC_SET), RTC_CONTROL);
283 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
284 CMOS_WRITE((save_freq_select | RTC_DIV_RESET2), RTC_FREQ_SELECT);
286 cmos_minutes = CMOS_READ(RTC_MINUTES);
287 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
288 cmos_minutes = BCD2BIN(cmos_minutes);
291 * since we're only adjusting minutes and seconds,
292 * don't interfere with hour overflow. This avoids
293 * messing with unknown time zones but requires your
294 * RTC not to be off by more than 15 minutes
296 real_seconds = nowtime % 60;
297 real_minutes = nowtime / 60;
298 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
299 real_minutes += 30; /* correct for half hour time zone */
302 if (abs(real_minutes - cmos_minutes) < 30) {
303 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
304 real_seconds = BIN2BCD(real_seconds);
305 real_minutes = BIN2BCD(real_minutes);
307 CMOS_WRITE(real_seconds, RTC_SECONDS);
308 CMOS_WRITE(real_minutes, RTC_MINUTES);
311 "set_rtc_mmss: can't update from %d to %d\n",
312 cmos_minutes, real_minutes);
316 /* The following flags have to be released exactly in this order,
317 * otherwise the DS12887 (popular MC146818A clone with integrated
318 * battery and quartz) will not reset the oscillator and will not
319 * update precisely 500 ms later. You won't find this mentioned in
320 * the Dallas Semiconductor data sheets, but who believes data
321 * sheets anyway ... -- Markus Kuhn
323 CMOS_WRITE(save_control, RTC_CONTROL);
324 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
329 /* last time the cmos clock got updated */
330 static long last_rtc_update;
333 * timer_interrupt() needs to keep up the real-time clock,
334 * as well as call the "do_timer()" routine every clocktick
337 timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
339 volatile unsigned char dummy;
342 dummy = CMOS_READ(RTC_REG_C); /* ACK RTC Interrupt */
344 if (!user_mode(regs)) {
345 if (prof_buffer && current->pid) {
346 unsigned long pc = regs->cp0_epc;
348 pc -= (unsigned long) _stext;
351 * Dont ignore out-of-bounds pc values silently,
352 * put them into the last histogram slot, so if
353 * present, they will show up as a sharp peak.
355 if (pc > prof_len - 1)
357 atomic_inc((atomic_t *) & prof_buffer[pc]);
363 * If we have an externally synchronized Linux clock, then update
364 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
365 * called as close as possible to 500 ms before the new second starts.
368 seq = read_seqbegin(&xtime_lock);
370 if ((time_status & STA_UNSYNC) == 0
371 && xtime.tv_sec > last_rtc_update + 660
372 && (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2
373 && (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
374 if (set_rtc_mmss(xtime.tv_sec) == 0)
375 last_rtc_update = xtime.tv_sec;
377 /* do it again in 60 s */
378 last_rtc_update = xtime.tv_sec - 600;
380 } while (read_seqretry(&xtime_lock, seq));
382 /* As we return to user mode fire off the other CPU schedulers.. this is
383 basically because we don't yet share IRQ's around. This message is
384 rigged to be safe on the 386 - basically it's a hack, so don't look
386 /*smp_message_pass(MSG_ALL_BUT_SELF, MSG_RESCHEDULE, 0L, 0); */
387 write_sequnlock(&xtime_lock);
390 static void r4k_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
395 * The cycle counter is only 32 bit which is good for about
396 * a minute at current count rates of upto 150MHz or so.
398 count = read_c0_count();
399 timerhi += (count < timerlo); /* Wrap around */
404 * If jiffies is to overflow in this timer_interrupt we must
405 * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
406 * quotient calc still valid. -arca
409 timerhi = timerlo = 0;
412 timer_interrupt(irq, dev_id, regs);
415 static void ioasic_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
420 * The free-running counter is 32 bit which is good for about
421 * 2 minutes, 50 seconds at possible count rates of upto 25MHz.
423 count = ioasic_read(IO_REG_FCTR);
424 timerhi += (count < timerlo); /* Wrap around */
429 * If jiffies is to overflow in this timer_interrupt we must
430 * update the timer[hi]/[lo] to make do_fast_gettimeoffset()
431 * quotient calc still valid. -arca
433 ioasic_write(IO_REG_FCTR, 0);
434 timerhi = timerlo = 0;
437 timer_interrupt(irq, dev_id, regs);
440 struct irqaction irq0 = {
441 .handler = timer_interrupt,
442 .flags = SA_INTERRUPT,
446 void __init time_init(void)
448 unsigned int year, mon, day, hour, min, sec, real_year;
451 /* The Linux interpretation of the CMOS clock register contents:
452 * When the Update-In-Progress (UIP) flag goes from 1 to 0, the
453 * RTC registers show the second which has precisely just started.
454 * Let's hope other operating systems interpret the RTC the same way.
456 /* read RTC exactly on falling edge of update flag */
457 for (i = 0; i < 1000000; i++) /* may take up to 1 second... */
458 if (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP)
460 for (i = 0; i < 1000000; i++) /* must try at least 2.228 ms */
461 if (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP))
463 do { /* Isn't this overkill ? UIP above should guarantee consistency */
464 sec = CMOS_READ(RTC_SECONDS);
465 min = CMOS_READ(RTC_MINUTES);
466 hour = CMOS_READ(RTC_HOURS);
467 day = CMOS_READ(RTC_DAY_OF_MONTH);
468 mon = CMOS_READ(RTC_MONTH);
469 year = CMOS_READ(RTC_YEAR);
470 } while (sec != CMOS_READ(RTC_SECONDS));
471 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
474 hour = BCD2BIN(hour);
477 year = BCD2BIN(year);
480 * The PROM will reset the year to either '72 or '73.
481 * Therefore we store the real year separately, in one
482 * of unused BBU RAM locations.
484 real_year = CMOS_READ(RTC_DEC_YEAR);
485 year += real_year - 72 + 2000;
487 write_seqlock_irq(&xtime_lock);
488 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
490 write_sequnlock_irq(&xtime_lock);
492 if (cpu_has_counter) {
494 do_gettimeoffset = do_fast_gettimeoffset;
495 irq0.handler = r4k_timer_interrupt;
497 ioasic_write(IO_REG_FCTR, 0);
498 do_gettimeoffset = do_ioasic_gettimeoffset;
499 irq0.handler = ioasic_timer_interrupt;
501 board_time_init(&irq0);