2 * linux/arch/arm/kernel/bios32.c
4 * PCI bios-type initialisation for PCI machines
6 * Bits taken from various places.
8 #include <linux/config.h>
9 #include <linux/module.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/slab.h>
13 #include <linux/init.h>
18 #include <asm/mach-types.h>
19 #include <asm/mach/pci.h>
23 void pcibios_report_status(u_int status_mask, int warn)
25 struct pci_dev *dev = NULL;
27 while ((dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
31 * ignore host bridge - we handle
34 if (dev->bus->number == 0 && dev->devfn == 0)
37 pci_read_config_word(dev, PCI_STATUS, &status);
39 status &= status_mask;
43 /* clear the status errors */
44 pci_write_config_word(dev, PCI_STATUS, status);
47 printk("(%02x:%02x.%d: %04X) ", dev->bus->number,
48 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn),
54 * We don't use this to fix the device, but initialisation of it.
55 * It's not the correct use for this, but it works.
56 * Note that the arbiter/ISA bridge appears to be buggy, specifically in
59 * 2. ISA bridge ping-pong
60 * 3. ISA bridge master handling of target RETRY
62 * Bug 3 is responsible for the sound DMA grinding to a halt. We now
65 static void __devinit pci_fixup_83c553(struct pci_dev *dev)
68 * Set memory region to start at address 0, and enable IO
70 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_SPACE_MEMORY);
71 pci_write_config_word(dev, PCI_COMMAND, PCI_COMMAND_IO);
73 dev->resource[0].end -= dev->resource[0].start;
74 dev->resource[0].start = 0;
77 * All memory requests from ISA to be channelled to PCI
79 pci_write_config_byte(dev, 0x48, 0xff);
82 * Enable ping-pong on bus master to ISA bridge transactions.
83 * This improves the sound DMA substantially. The fixed
84 * priority arbiter also helps (see below).
86 pci_write_config_byte(dev, 0x42, 0x01);
91 pci_write_config_byte(dev, 0x40, 0x22);
94 * We used to set the arbiter to "park on last master" (bit
95 * 1 set), but unfortunately the CyberPro does not park the
96 * bus. We must therefore park on CPU. Unfortunately, this
97 * may trigger yet another bug in the 553.
99 pci_write_config_byte(dev, 0x83, 0x02);
102 * Make the ISA DMA request lowest priority, and disable
103 * rotating priorities completely.
105 pci_write_config_byte(dev, 0x80, 0x11);
106 pci_write_config_byte(dev, 0x81, 0x00);
109 * Route INTA input to IRQ 11, and set IRQ11 to be level
112 pci_write_config_word(dev, 0x44, 0xb000);
116 static void __devinit pci_fixup_unassign(struct pci_dev *dev)
118 dev->resource[0].end -= dev->resource[0].start;
119 dev->resource[0].start = 0;
123 * Prevent the PCI layer from seeing the resources allocated to this device
124 * if it is the host bridge by marking it as such. These resources are of
125 * no consequence to the PCI layer (they are handled elsewhere).
127 static void __devinit pci_fixup_dec21285(struct pci_dev *dev)
131 if (dev->devfn == 0) {
133 dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
134 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
135 dev->resource[i].start = 0;
136 dev->resource[i].end = 0;
137 dev->resource[i].flags = 0;
143 * PCI IDE controllers use non-standard I/O port decoding, respect it.
145 static void __devinit pci_fixup_ide_bases(struct pci_dev *dev)
150 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
153 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
154 r = dev->resource + i;
155 if ((r->start & ~0x80) == 0x374) {
163 * Put the DEC21142 to sleep
165 static void __devinit pci_fixup_dec21142(struct pci_dev *dev)
167 pci_write_config_dword(dev, 0x40, 0x80000000);
171 * The CY82C693 needs some rather major fixups to ensure that it does
172 * the right thing. Idea from the Alpha people, with a few additions.
174 * We ensure that the IDE base registers are set to 1f0/3f4 for the
175 * primary bus, and 170/374 for the secondary bus. Also, hide them
176 * from the PCI subsystem view as well so we won't try to perform
177 * our own auto-configuration on them.
179 * In addition, we ensure that the PCI IDE interrupts are routed to
180 * IRQ 14 and IRQ 15 respectively.
182 * The above gets us to a point where the IDE on this device is
183 * functional. However, The CY82C693U _does not work_ in bus
184 * master mode without locking the PCI bus solid.
186 static void __devinit pci_fixup_cy82c693(struct pci_dev *dev)
188 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE) {
191 if (dev->class & 0x80) { /* primary */
194 } else { /* secondary */
199 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0,
200 base0 | PCI_BASE_ADDRESS_SPACE_IO);
201 pci_write_config_dword(dev, PCI_BASE_ADDRESS_1,
202 base1 | PCI_BASE_ADDRESS_SPACE_IO);
204 dev->resource[0].start = 0;
205 dev->resource[0].end = 0;
206 dev->resource[0].flags = 0;
208 dev->resource[1].start = 0;
209 dev->resource[1].end = 0;
210 dev->resource[1].flags = 0;
211 } else if (PCI_FUNC(dev->devfn) == 0) {
213 * Setup IDE IRQ routing.
215 pci_write_config_byte(dev, 0x4b, 14);
216 pci_write_config_byte(dev, 0x4c, 15);
219 * Disable FREQACK handshake, enable USB.
221 pci_write_config_byte(dev, 0x4d, 0x41);
224 * Enable PCI retry, and PCI post-write buffer.
226 pci_write_config_byte(dev, 0x44, 0x17);
229 * Enable ISA master and DMA post write buffering.
231 pci_write_config_byte(dev, 0x45, 0x03);
235 struct pci_fixup pcibios_fixups[] = {
238 PCI_VENDOR_ID_CONTAQ, PCI_DEVICE_ID_CONTAQ_82C693,
242 PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21142,
246 PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285,
250 PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553,
254 PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_89C940F,
258 PCI_ANY_ID, PCI_ANY_ID,
263 void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
266 printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->dev.name);
267 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
271 * If the bus contains any of these devices, then we must not turn on
272 * parity checking of any kind. Currently this is CyberPro 20x0 only.
274 static inline int pdev_bad_for_parity(struct pci_dev *dev)
276 return (dev->vendor == PCI_VENDOR_ID_INTERG &&
277 (dev->device == PCI_DEVICE_ID_INTERG_2000 ||
278 dev->device == PCI_DEVICE_ID_INTERG_2010));
282 * Adjust the device resources from bus-centric to Linux-centric.
284 static void __devinit
285 pdev_fixup_device_resources(struct pci_sys_data *root, struct pci_dev *dev)
287 unsigned long offset;
290 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
291 if (dev->resource[i].start == 0)
293 if (dev->resource[i].flags & IORESOURCE_MEM)
294 offset = root->mem_offset;
296 offset = root->io_offset;
298 dev->resource[i].start += offset;
299 dev->resource[i].end += offset;
303 static void __devinit
304 pbus_assign_bus_resources(struct pci_bus *bus, struct pci_sys_data *root)
306 struct pci_dev *dev = bus->self;
311 * Assign root bus resources.
313 for (i = 0; i < 3; i++)
314 bus->resource[i] = root->resource[i];
319 * pcibios_fixup_bus - Called after each bus is probed,
320 * but before its children are examined.
322 void __devinit pcibios_fixup_bus(struct pci_bus *bus)
324 struct pci_sys_data *root = bus->sysdata;
326 u16 features = PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_FAST_BACK;
328 pbus_assign_bus_resources(bus, root);
331 * Walk the devices on this bus, working out what we can
334 list_for_each_entry(dev, &bus->devices, bus_list) {
337 pdev_fixup_device_resources(root, dev);
339 pci_read_config_word(dev, PCI_STATUS, &status);
342 * If any device on this bus does not support fast back
343 * to back transfers, then the bus as a whole is not able
344 * to support them. Having fast back to back transfers
345 * on saves us one PCI cycle per transaction.
347 if (!(status & PCI_STATUS_FAST_BACK))
348 features &= ~PCI_COMMAND_FAST_BACK;
350 if (pdev_bad_for_parity(dev))
351 features &= ~(PCI_COMMAND_SERR | PCI_COMMAND_PARITY);
353 switch (dev->class >> 8) {
354 #if defined(CONFIG_ISA) || defined(CONFIG_EISA)
355 case PCI_CLASS_BRIDGE_ISA:
356 case PCI_CLASS_BRIDGE_EISA:
358 * If this device is an ISA bridge, set isa_bridge
359 * to point at this device. We will then go looking
360 * for things like keyboard, etc.
368 * Now walk the devices again, this time setting them up.
370 list_for_each_entry(dev, &bus->devices, bus_list) {
373 pci_read_config_word(dev, PCI_COMMAND, &cmd);
375 pci_write_config_word(dev, PCI_COMMAND, cmd);
377 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE,
378 L1_CACHE_BYTES >> 2);
382 * Propagate the flags to the PCI bridge.
384 if (bus->self && bus->self->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
385 if (features & PCI_COMMAND_FAST_BACK)
386 bus->bridge_ctl |= PCI_BRIDGE_CTL_FAST_BACK;
387 if (features & PCI_COMMAND_PARITY)
388 bus->bridge_ctl |= PCI_BRIDGE_CTL_PARITY;
392 * Report what we did for this bus
394 printk(KERN_INFO "PCI: bus%d: Fast back to back transfers %sabled\n",
395 bus->number, (features & PCI_COMMAND_FAST_BACK) ? "en" : "dis");
399 * Convert from Linux-centric to bus-centric addresses for bridge devices.
402 pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
403 struct resource *res)
405 struct pci_sys_data *root = dev->sysdata;
406 unsigned long offset = 0;
408 if (res->flags & IORESOURCE_IO)
409 offset = root->io_offset;
410 if (res->flags & IORESOURCE_MEM)
411 offset = root->mem_offset;
413 region->start = res->start - offset;
414 region->end = res->end - offset;
417 #ifdef CONFIG_HOTPLUG
418 EXPORT_SYMBOL(pcibios_fixup_bus);
419 EXPORT_SYMBOL(pcibios_resource_to_bus);
423 * This is the standard PCI-PCI bridge swizzling algorithm:
430 * ^^^^^^^^^^ irq pin on bridge
432 u8 __devinit pci_std_swizzle(struct pci_dev *dev, u8 *pinp)
436 while (dev->bus->self) {
437 pin = (pin + PCI_SLOT(dev->devfn)) & 3;
439 * move up the chain of bridges,
440 * swizzling as we go.
442 dev = dev->bus->self;
446 return PCI_SLOT(dev->devfn);
450 * Swizzle the device pin each time we cross a bridge.
451 * This might update pin and returns the slot number.
453 static u8 __devinit pcibios_swizzle(struct pci_dev *dev, u8 *pin)
455 struct pci_sys_data *sys = dev->sysdata;
456 int slot = 0, oldpin = *pin;
459 slot = sys->swizzle(dev, pin);
462 printk("PCI: %s swizzling pin %d => pin %d slot %d\n",
463 pci_name(dev), oldpin, *pin, slot);
469 * Map a slot/pin to an IRQ.
471 static int pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
473 struct pci_sys_data *sys = dev->sysdata;
477 irq = sys->map_irq(dev, slot, pin);
480 printk("PCI: %s mapping slot %d pin %d => irq %d\n",
481 pci_name(dev), slot, pin, irq);
486 static void __init pcibios_init_hw(struct hw_pci *hw)
488 struct pci_sys_data *sys = NULL;
492 for (nr = busnr = 0; nr < hw->nr_controllers; nr++) {
493 sys = kmalloc(sizeof(struct pci_sys_data), GFP_KERNEL);
495 panic("PCI: unable to allocate sys data!");
497 memset(sys, 0, sizeof(struct pci_sys_data));
501 sys->swizzle = hw->swizzle;
502 sys->map_irq = hw->map_irq;
503 sys->resource[0] = &ioport_resource;
504 sys->resource[1] = &iomem_resource;
506 ret = hw->setup(nr, sys);
509 sys->bus = hw->scan(nr, sys);
512 panic("PCI: unable to scan bus!");
514 busnr = sys->bus->subordinate + 1;
516 list_add(&sys->node, &hw->buses);
525 void __init pci_common_init(struct hw_pci *hw)
527 struct pci_sys_data *sys;
529 INIT_LIST_HEAD(&hw->buses);
537 pci_fixup_irqs(pcibios_swizzle, pcibios_map_irq);
539 list_for_each_entry(sys, &hw->buses, node) {
540 struct pci_bus *bus = sys->bus;
543 * Size the bridge windows.
545 pci_bus_size_bridges(bus);
550 pci_bus_assign_resources(bus);
553 * Tell drivers about devices found.
555 pci_bus_add_devices(bus);
559 char * __init pcibios_setup(char *str)
561 if (!strcmp(str, "debug")) {
569 * From arch/i386/kernel/pci-i386.c:
571 * We need to avoid collisions with `mirrored' VGA ports
572 * and other strange ISA hardware, so we always want the
573 * addresses to be allocated in the 0x000-0x0ff region
576 * Why? Because some silly external IO cards only decode
577 * the low 10 bits of the IO address. The 0x00-0xff region
578 * is reserved for motherboard devices that decode all 16
579 * bits, so it's ok to allocate at, say, 0x2800-0x28ff,
580 * but we want to try to avoid allocating at 0x2900-0x2bff
581 * which might be mirrored at 0x0100-0x03ff..
583 void pcibios_align_resource(void *data, struct resource *res,
584 unsigned long size, unsigned long align)
586 unsigned long start = res->start;
588 if (res->flags & IORESOURCE_IO && start & 0x300)
589 start = (start + 0x3ff) & ~0x3ff;
591 res->start = (start + align - 1) & ~(align - 1);
595 * pcibios_enable_device - Enable I/O and memory.
596 * @dev: PCI device to be enabled
598 int pcibios_enable_device(struct pci_dev *dev, int mask)
604 pci_read_config_word(dev, PCI_COMMAND, &cmd);
606 for (idx = 0; idx < 6; idx++) {
607 /* Only set up the requested stuff */
608 if (!(mask & (1 << idx)))
611 r = dev->resource + idx;
612 if (!r->start && r->end) {
613 printk(KERN_ERR "PCI: Device %s not available because"
614 " of resource collisions\n", pci_name(dev));
617 if (r->flags & IORESOURCE_IO)
618 cmd |= PCI_COMMAND_IO;
619 if (r->flags & IORESOURCE_MEM)
620 cmd |= PCI_COMMAND_MEMORY;
624 * Bridges (eg, cardbus bridges) need to be fully enabled
626 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE)
627 cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY;
629 if (cmd != old_cmd) {
630 printk("PCI: enabling device %s (%04x -> %04x)\n",
631 pci_name(dev), old_cmd, cmd);
632 pci_write_config_word(dev, PCI_COMMAND, cmd);
637 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
638 enum pci_mmap_state mmap_state, int write_combine)
640 struct pci_sys_data *root = dev->sysdata;
643 if (mmap_state == pci_mmap_io) {
646 phys = root->mem_offset + (vma->vm_pgoff << PAGE_SHIFT);
652 vma->vm_flags |= VM_SHM | VM_LOCKED | VM_IO;
653 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
655 if (remap_page_range(vma, vma->vm_start, phys,
656 vma->vm_end - vma->vm_start,