2 * linux/arch/arm/mach-sa1100/sa1111.c
6 * Original code by John Dorsey
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * This file contains all generic SA1111 support.
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/ptrace.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/device.h>
25 #include <linux/slab.h>
26 #include <linux/spinlock.h>
28 #include <asm/hardware.h>
29 #include <asm/mach-types.h>
32 #include <asm/mach/irq.h>
34 #include <asm/hardware/sa1111.h>
37 * We keep the following data for the overall SA1111. Note that the
38 * struct device and struct resource are "fake"; they should be supplied
39 * by the bus above us. However, in the interests of getting all SA1111
40 * drivers converted over to the device model, we provide this as an
41 * anchor point for all the other drivers.
52 * We _really_ need to eliminate this. Its only users
53 * are the PWM and DMA checking code.
55 static struct sa1111 *g_sa1111;
57 static struct sa1111_dev usb_dev = {
59 .name = "Intel Corporation SA1111 [USB Controller]",
61 .skpcr_mask = SKPCR_UCLKEN,
62 .devid = SA1111_DEVID_USB,
73 static struct sa1111_dev sac_dev = {
75 .name = "Intel Corporation SA1111 [Audio Controller]",
77 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
78 .devid = SA1111_DEVID_SAC,
87 static struct sa1111_dev ssp_dev = {
89 .name = "Intel Corporation SA1111 [SSP Controller]",
91 .skpcr_mask = SKPCR_SCLKEN,
92 .devid = SA1111_DEVID_SSP,
95 static struct sa1111_dev kbd_dev = {
97 .name = "Intel Corporation SA1111 [PS2]",
99 .skpcr_mask = SKPCR_PTCLKEN,
100 .devid = SA1111_DEVID_PS2,
107 static struct sa1111_dev mse_dev = {
109 .name = "Intel Corporation SA1111 [PS2]",
111 .skpcr_mask = SKPCR_PMCLKEN,
112 .devid = SA1111_DEVID_PS2,
119 static struct sa1111_dev int_dev = {
121 .name = "Intel Corporation SA1111 [Interrupt Controller]",
124 .devid = SA1111_DEVID_INT,
127 static struct sa1111_dev pcmcia_dev = {
129 .name = "Intel Corporation SA1111 [PCMCIA Controller]",
132 .devid = SA1111_DEVID_PCMCIA,
143 static struct sa1111_dev *devs[] = {
152 static unsigned int dev_offset[] = {
162 * SA1111 interrupt support. Since clearing an IRQ while there are
163 * active IRQs causes the interrupt output to pulse, the upper levels
164 * will call us again if there are more interrupts to process.
167 sa1111_irq_handler(unsigned int irq, struct irqdesc *desc, struct pt_regs *regs)
169 unsigned int stat0, stat1, i;
171 stat0 = sa1111_readl(desc->data + SA1111_INTSTATCLR0);
172 stat1 = sa1111_readl(desc->data + SA1111_INTSTATCLR1);
174 sa1111_writel(stat0, desc->data + SA1111_INTSTATCLR0);
176 desc->chip->ack(irq);
178 sa1111_writel(stat1, desc->data + SA1111_INTSTATCLR1);
180 if (stat0 == 0 && stat1 == 0) {
181 do_bad_IRQ(irq, desc, regs);
185 for (i = IRQ_SA1111_START; stat0; i++, stat0 >>= 1)
187 do_edge_IRQ(i, irq_desc + i, regs);
189 for (i = IRQ_SA1111_START + 32; stat1; i++, stat1 >>= 1)
191 do_edge_IRQ(i, irq_desc + i, regs);
193 /* For level-based interrupts */
194 desc->chip->unmask(irq);
197 #define SA1111_IRQMASK_LO(x) (1 << (x - IRQ_SA1111_START))
198 #define SA1111_IRQMASK_HI(x) (1 << (x - IRQ_SA1111_START - 32))
200 static void sa1111_ack_irq(unsigned int irq)
204 static void sa1111_mask_lowirq(unsigned int irq)
206 void *mapbase = get_irq_chipdata(irq);
209 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
210 ie0 &= ~SA1111_IRQMASK_LO(irq);
211 writel(ie0, mapbase + SA1111_INTEN0);
214 static void sa1111_unmask_lowirq(unsigned int irq)
216 void *mapbase = get_irq_chipdata(irq);
219 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
220 ie0 |= SA1111_IRQMASK_LO(irq);
221 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
225 * Attempt to re-trigger the interrupt. The SA1111 contains a register
226 * (INTSET) which claims to do this. However, in practice no amount of
227 * manipulation of INTEN and INTSET guarantees that the interrupt will
228 * be triggered. In fact, its very difficult, if not impossible to get
229 * INTSET to re-trigger the interrupt.
231 static int sa1111_retrigger_lowirq(unsigned int irq)
233 unsigned int mask = SA1111_IRQMASK_LO(irq);
234 void *mapbase = get_irq_chipdata(irq);
238 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
239 for (i = 0; i < 8; i++) {
240 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
241 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
242 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
247 printk(KERN_ERR "Danger Will Robinson: failed to "
248 "re-trigger IRQ%d\n", irq);
249 return i == 8 ? -1 : 0;
252 static int sa1111_type_lowirq(unsigned int irq, unsigned int flags)
254 unsigned int mask = SA1111_IRQMASK_LO(irq);
255 void *mapbase = get_irq_chipdata(irq);
258 if (flags == IRQT_PROBE)
261 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
264 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
265 if (flags & __IRQT_RISEDGE)
269 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
270 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
275 static int sa1111_wake_lowirq(unsigned int irq, unsigned int on)
277 unsigned int mask = SA1111_IRQMASK_LO(irq);
278 void *mapbase = get_irq_chipdata(irq);
281 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
286 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
291 static struct irqchip sa1111_low_chip = {
292 .ack = sa1111_ack_irq,
293 .mask = sa1111_mask_lowirq,
294 .unmask = sa1111_unmask_lowirq,
295 .retrigger = sa1111_retrigger_lowirq,
296 .type = sa1111_type_lowirq,
297 .wake = sa1111_wake_lowirq,
300 static void sa1111_mask_highirq(unsigned int irq)
302 void *mapbase = get_irq_chipdata(irq);
305 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
306 ie1 &= ~SA1111_IRQMASK_HI(irq);
307 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
310 static void sa1111_unmask_highirq(unsigned int irq)
312 void *mapbase = get_irq_chipdata(irq);
315 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
316 ie1 |= SA1111_IRQMASK_HI(irq);
317 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
321 * Attempt to re-trigger the interrupt. The SA1111 contains a register
322 * (INTSET) which claims to do this. However, in practice no amount of
323 * manipulation of INTEN and INTSET guarantees that the interrupt will
324 * be triggered. In fact, its very difficult, if not impossible to get
325 * INTSET to re-trigger the interrupt.
327 static int sa1111_retrigger_highirq(unsigned int irq)
329 unsigned int mask = SA1111_IRQMASK_HI(irq);
330 void *mapbase = get_irq_chipdata(irq);
334 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
335 for (i = 0; i < 8; i++) {
336 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
337 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
338 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
343 printk(KERN_ERR "Danger Will Robinson: failed to "
344 "re-trigger IRQ%d\n", irq);
345 return i == 8 ? -1 : 0;
348 static int sa1111_type_highirq(unsigned int irq, unsigned int flags)
350 unsigned int mask = SA1111_IRQMASK_HI(irq);
351 void *mapbase = get_irq_chipdata(irq);
354 if (flags == IRQT_PROBE)
357 if ((!(flags & __IRQT_RISEDGE) ^ !(flags & __IRQT_FALEDGE)) == 0)
360 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
361 if (flags & __IRQT_RISEDGE)
365 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
366 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
371 static int sa1111_wake_highirq(unsigned int irq, unsigned int on)
373 unsigned int mask = SA1111_IRQMASK_HI(irq);
374 void *mapbase = get_irq_chipdata(irq);
377 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
382 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
387 static struct irqchip sa1111_high_chip = {
388 .ack = sa1111_ack_irq,
389 .mask = sa1111_mask_highirq,
390 .unmask = sa1111_unmask_highirq,
391 .retrigger = sa1111_retrigger_highirq,
392 .type = sa1111_type_highirq,
393 .wake = sa1111_wake_highirq,
396 static void __init sa1111_init_irq(struct sa1111_dev *sadev)
401 * We're guaranteed that this region hasn't been taken.
403 request_mem_region(sadev->res.start, 512, "irqs");
405 /* disable all IRQs */
406 sa1111_writel(0, sadev->mapbase + SA1111_INTEN0);
407 sa1111_writel(0, sadev->mapbase + SA1111_INTEN1);
408 sa1111_writel(0, sadev->mapbase + SA1111_WAKEEN0);
409 sa1111_writel(0, sadev->mapbase + SA1111_WAKEEN1);
412 * detect on rising edge. Note: Feb 2001 Errata for SA1111
413 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
415 sa1111_writel(0, sadev->mapbase + SA1111_INTPOL0);
416 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
417 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
418 sadev->mapbase + SA1111_INTPOL1);
421 sa1111_writel(~0, sadev->mapbase + SA1111_INTSTATCLR0);
422 sa1111_writel(~0, sadev->mapbase + SA1111_INTSTATCLR1);
424 for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) {
425 set_irq_chip(irq, &sa1111_low_chip);
426 set_irq_chipdata(irq, sadev->mapbase);
427 set_irq_handler(irq, do_edge_IRQ);
428 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
431 for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) {
432 set_irq_chip(irq, &sa1111_high_chip);
433 set_irq_chipdata(irq, sadev->mapbase);
434 set_irq_handler(irq, do_edge_IRQ);
435 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
439 * Register SA1111 interrupt
441 set_irq_type(sadev->irq[0], IRQT_RISING);
442 set_irq_data(sadev->irq[0], sadev->mapbase);
443 set_irq_chained_handler(sadev->irq[0], sa1111_irq_handler);
447 * Bring the SA1111 out of reset. This requires a set procedure:
448 * 1. nRESET asserted (by hardware)
449 * 2. CLK turned on from SA1110
450 * 3. nRESET deasserted
451 * 4. VCO turned on, PLL_BYPASS turned off
452 * 5. Wait lock time, then assert RCLKEn
453 * 7. PCR set to allow clocking of individual functions
455 * Until we've done this, the only registers we can access are:
460 static void sa1111_wake(struct sa1111 *sachip)
462 unsigned long flags, r;
464 spin_lock_irqsave(&sachip->lock, flags);
466 #ifdef CONFIG_ARCH_SA1100
468 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
469 * (SA-1110 Developer's Manual, section 9.1.2.1)
471 GAFR |= GPIO_32_768kHz;
472 GPDR |= GPIO_32_768kHz;
473 TUCR = TUCR_3_6864MHz;
474 #elif CONFIG_ARCH_PXA
475 pxa_gpio_mode(GPIO11_3_6MHz_MD);
477 #error missing clock setup
481 * Turn VCO on, and disable PLL Bypass.
483 r = sa1111_readl(sachip->base + SA1111_SKCR);
485 sa1111_writel(r, sachip->base + SA1111_SKCR);
486 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
487 sa1111_writel(r, sachip->base + SA1111_SKCR);
490 * Wait lock time. SA1111 manual _doesn't_
491 * specify a figure for this! We choose 100us.
496 * Enable RCLK. We also ensure that RDYEN is set.
498 r |= SKCR_RCLKEN | SKCR_RDYEN;
499 sa1111_writel(r, sachip->base + SA1111_SKCR);
502 * Wait 14 RCLK cycles for the chip to finish coming out
503 * of reset. (RCLK=24MHz). This is 590ns.
508 * Ensure all clocks are initially off.
510 sa1111_writel(0, sachip->base + SA1111_SKPCR);
512 spin_unlock_irqrestore(&sachip->lock, flags);
515 #ifdef CONFIG_ARCH_SA1100
517 static u32 sa1111_dma_mask[] = {
529 * Configure the SA1111 shared memory controller.
532 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
533 unsigned int cas_latency)
535 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
537 if (cas_latency == 3)
540 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
543 * Now clear the bits in the DMA mask to work around the SA1111
544 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
545 * Chip Specification Update, June 2000, Erratum #7).
547 if (sachip->dev->dma_mask)
548 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
554 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
555 struct sa1111_dev *sadev, unsigned int offset)
557 snprintf(sadev->dev.bus_id, sizeof(sadev->dev.bus_id),
561 * If the parent device has a DMA mask associated with it,
562 * propagate it down to the children.
564 if (sachip->dev->dma_mask) {
565 sadev->dma_mask = *sachip->dev->dma_mask;
566 sadev->dev.dma_mask = &sadev->dma_mask;
569 sadev->dev.parent = sachip->dev;
570 sadev->dev.bus = &sa1111_bus_type;
571 sadev->res.start = sachip->phys + offset;
572 sadev->res.end = sadev->res.start + 511;
573 sadev->res.name = sadev->dev.name;
574 sadev->res.flags = IORESOURCE_MEM;
575 sadev->mapbase = sachip->base + offset;
577 if (request_resource(parent, &sadev->res)) {
578 printk("SA1111: failed to allocate resource for %s\n",
583 device_register(&sadev->dev);
587 * sa1111_probe - probe for a single SA1111 chip.
588 * @phys_addr: physical address of device.
590 * Probe for a SA1111 chip. This must be called
591 * before any other SA1111-specific code.
594 * %-ENODEV device not found.
595 * %-EBUSY physical address already marked in-use.
599 __sa1111_probe(struct device *me, struct resource *mem, int irq)
601 struct sa1111 *sachip;
603 unsigned int has_devs, val;
604 int i, ret = -ENODEV;
606 sachip = kmalloc(sizeof(struct sa1111), GFP_KERNEL);
610 memset(sachip, 0, sizeof(struct sa1111));
612 spin_lock_init(&sachip->lock);
615 dev_set_drvdata(sachip->dev, sachip);
617 sachip->phys = mem->start;
621 * Map the whole region. This also maps the
622 * registers for our children.
624 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
631 * Probe for the chip. Only touch the SBI registers.
633 id = sa1111_readl(sachip->base + SA1111_SKID);
634 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
635 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
640 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
641 "silicon revision %lx, metal revision %lx\n",
642 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
645 * We found it. Wake the chip up, and initialise.
649 #ifdef CONFIG_ARCH_SA1100
651 * The SDRAM configuration of the SA1110 and the SA1111 must
652 * match. This is very important to ensure that SA1111 accesses
653 * don't corrupt the SDRAM. Note that this ungates the SA1111's
654 * MBGNT signal, so we must have called sa1110_mb_disable()
657 sa1111_configure_smc(sachip, 1,
658 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
659 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
662 * We only need to turn on DCLK whenever we want to use the
663 * DMA. It can otherwise be held firmly in the off position.
664 * (currently, we always enable it.)
666 val = sa1111_readl(sachip->base + SA1111_SKPCR);
667 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
670 * Enable the SA1110 memory bus request and grant signals.
676 * The interrupt controller must be initialised before any
677 * other device to ensure that the interrupts are available.
680 int_dev.irq[0] = irq;
681 sa1111_init_one_child(sachip, mem, &int_dev, SA1111_INTC);
682 sa1111_init_irq(&int_dev);
688 if (machine_is_assabet() || machine_is_jornada720() ||
690 has_devs &= ~(1 << 4);
692 has_devs &= ~(1 << 1);
694 for (i = 0; i < ARRAY_SIZE(devs); i++)
695 if (has_devs & (1 << i))
696 sa1111_init_one_child(sachip, mem, devs[i], dev_offset[i]);
701 iounmap(sachip->base);
707 static void __sa1111_remove(struct sa1111 *sachip)
711 for (i = 0; i < ARRAY_SIZE(devs); i++) {
712 put_device(&devs[i]->dev);
713 release_resource(&devs[i]->res);
716 iounmap(sachip->base);
721 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
722 * Chip Specification Update" (June 2000), erratum #7, there is a
723 * significant bug in the SA1111 SDRAM shared memory controller. If
724 * an access to a region of memory above 1MB relative to the bank base,
725 * it is important that address bit 10 _NOT_ be asserted. Depending
726 * on the configuration of the RAM, bit 10 may correspond to one
727 * of several different (processor-relative) address bits.
729 * This routine only identifies whether or not a given DMA address
730 * is susceptible to the bug.
732 int sa1111_check_dma_bug(dma_addr_t addr)
734 struct sa1111 *sachip = g_sa1111;
735 unsigned int physaddr = SA1111_DMA_ADDR((unsigned int)addr);
738 /* Section 4.6 of the "Intel StrongARM SA-1111 Development Module
739 * User's Guide" mentions that jumpers R51 and R52 control the
740 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
741 * SDRAM bank 1 on Neponset). The default configuration selects
742 * Assabet, so any address in bank 1 is necessarily invalid.
744 if ((machine_is_assabet() || machine_is_pfs168()) && addr >= 0xc8000000)
747 /* The bug only applies to buffers located more than one megabyte
748 * above the start of the target bank:
750 if (physaddr<(1<<20))
753 smcr = sa1111_readl(sachip->base + SA1111_SMCR);
754 switch (FExtr(smcr, SMCR_DRAC)) {
755 case 01: /* 10 row + bank address bits, A<20> must not be set */
756 if (physaddr & (1<<20))
759 case 02: /* 11 row + bank address bits, A<23> must not be set */
760 if (physaddr & (1<<23))
763 case 03: /* 12 row + bank address bits, A<24> must not be set */
764 if (physaddr & (1<<24))
767 case 04: /* 13 row + bank address bits, A<25> must not be set */
768 if (physaddr & (1<<25))
771 case 05: /* 14 row + bank address bits, A<20> must not be set */
772 if (physaddr & (1<<20))
775 case 06: /* 15 row + bank address bits, A<20> must not be set */
776 if (physaddr & (1<<20))
780 printk(KERN_ERR "%s(): invalid SMCR DRAC value 0%lo\n",
781 __FUNCTION__, FExtr(smcr, SMCR_DRAC));
788 struct sa1111_save_data {
793 unsigned char skpwm0;
794 unsigned char skpwm1;
797 * Interrupt controller
799 unsigned int intpol0;
800 unsigned int intpol1;
803 unsigned int wakepol0;
804 unsigned int wakepol1;
805 unsigned int wakeen0;
806 unsigned int wakeen1;
809 static int sa1111_suspend(struct device *dev, u32 state, u32 level)
811 struct sa1111 *sachip = dev_get_drvdata(dev);
812 struct sa1111_save_data *save;
816 if (!dev->saved_state && level == SUSPEND_NOTIFY)
817 dev->saved_state = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
818 if (!dev->saved_state)
821 save = (struct sa1111_save_data *)dev->saved_state;
823 spin_lock_irqsave(&sachip->lock, flags);
828 if (level == SUSPEND_SAVE_STATE) {
830 save->skcr = sa1111_readl(base + SA1111_SKCR);
831 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
832 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
833 save->skaud = sa1111_readl(base + SA1111_SKAUD);
834 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
835 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
837 base = sachip->base + SA1111_INTC;
838 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
839 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
840 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
841 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
842 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
843 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
844 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
845 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
851 if (level == SUSPEND_POWER_DOWN && state == 4) {
852 unsigned int val = sa1111_readl(sachip->base + SA1111_SKCR);
854 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
855 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
856 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
859 spin_unlock_irqrestore(&sachip->lock, flags);
865 * sa1111_resume - Restore the SA1111 device state.
866 * @dev: device to restore
867 * @level: resume level
869 * Restore the general state of the SA1111; clock control and
870 * interrupt controller. Other parts of the SA1111 must be
871 * restored by their respective drivers, and must be called
872 * via LDM after this function.
874 static int sa1111_resume(struct device *dev, u32 level)
876 struct sa1111 *sachip = dev_get_drvdata(dev);
877 struct sa1111_save_data *save;
878 unsigned long flags, id;
881 save = (struct sa1111_save_data *)dev->saved_state;
885 spin_lock_irqsave(&sachip->lock, flags);
888 * Ensure that the SA1111 is still here.
889 * FIXME: shouldn't do this here.
891 id = sa1111_readl(sachip->base + SA1111_SKID);
892 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
893 __sa1111_remove(sachip);
894 dev_set_drvdata(dev, NULL);
900 * First of all, wake up the chip.
902 if (level == RESUME_POWER_ON) {
905 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
906 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
909 if (level == RESUME_RESTORE_STATE) {
911 sa1111_writel(save->skcr, base + SA1111_SKCR);
912 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
913 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
914 sa1111_writel(save->skaud, base + SA1111_SKAUD);
915 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
916 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
918 base = sachip->base + SA1111_INTC;
919 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
920 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
921 sa1111_writel(save->inten0, base + SA1111_INTEN0);
922 sa1111_writel(save->inten1, base + SA1111_INTEN1);
923 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
924 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
925 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
926 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
929 spin_unlock_irqrestore(&sachip->lock, flags);
931 if (level == RESUME_ENABLE) {
932 dev->saved_state = NULL;
939 static int sa1111_probe(struct device *dev)
941 struct platform_device *pdev = to_platform_device(dev);
942 struct resource *mem = NULL, *irq = NULL;
945 for (i = 0; i < pdev->num_resources; i++) {
946 if (pdev->resource[i].flags & IORESOURCE_MEM)
947 mem = &pdev->resource[i];
948 if (pdev->resource[i].flags & IORESOURCE_IRQ)
949 irq = &pdev->resource[i];
951 return __sa1111_probe(dev, mem, irq ? irq->start : NO_IRQ);
954 static int sa1111_remove(struct device *dev)
956 struct sa1111 *sachip = dev_get_drvdata(dev);
959 __sa1111_remove(sachip);
960 dev_set_drvdata(dev, NULL);
962 kfree(dev->saved_state);
963 dev->saved_state = NULL;
970 * Not sure if this should be on the system bus or not yet.
971 * We really want some way to register a system device at
972 * the per-machine level, and then have this driver pick
973 * up the registered devices.
975 * We also need to handle the SDRAM configuration for
976 * PXA250/SA1110 machine classes.
978 static struct device_driver sa1111_device_driver = {
980 .bus = &platform_bus_type,
981 .probe = sa1111_probe,
982 .remove = sa1111_remove,
983 .suspend = sa1111_suspend,
984 .resume = sa1111_resume,
988 * Register the SA1111 driver with LDM.
990 static int sa1111_driver_init(void)
992 driver_register(&sa1111_device_driver);
996 arch_initcall(sa1111_driver_init);
999 * Get the parent device driver (us) structure
1000 * from a child function device
1002 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1004 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1008 * The bits in the opdiv field are non-linear.
1010 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1012 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1014 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1016 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1018 fbdiv = (skcdr & 0x007f) + 2;
1019 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1020 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1022 return 3686400 * fbdiv / (ipdiv * opdiv);
1026 * sa1111_pll_clock - return the current PLL clock frequency.
1027 * @sadev: SA1111 function block
1029 * BUG: we should look at SKCR. We also blindly believe that
1030 * the chip is being fed with the 3.6864MHz clock.
1032 * Returns the PLL clock in Hz.
1034 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1036 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1038 return __sa1111_pll_clock(sachip);
1042 * sa1111_select_audio_mode - select I2S or AC link mode
1043 * @sadev: SA1111 function block
1044 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1046 * Frob the SKCR to select AC Link mode or I2S mode for
1049 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1051 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1052 unsigned long flags;
1055 spin_lock_irqsave(&sachip->lock, flags);
1057 val = sa1111_readl(sachip->base + SA1111_SKCR);
1058 if (mode == SA1111_AUDIO_I2S) {
1063 sa1111_writel(val, sachip->base + SA1111_SKCR);
1065 spin_unlock_irqrestore(&sachip->lock, flags);
1069 * sa1111_set_audio_rate - set the audio sample rate
1070 * @sadev: SA1111 SAC function block
1071 * @rate: sample rate to select
1073 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1075 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1078 if (sadev->devid != SA1111_DEVID_SAC)
1081 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1087 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1093 * sa1111_get_audio_rate - get the audio sample rate
1094 * @sadev: SA1111 SAC function block device
1096 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1098 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1101 if (sadev->devid != SA1111_DEVID_SAC)
1104 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1106 return __sa1111_pll_clock(sachip) / (256 * div);
1110 * Individual device operations.
1114 * sa1111_enable_device - enable an on-chip SA1111 function block
1115 * @sadev: SA1111 function block device to enable
1117 void sa1111_enable_device(struct sa1111_dev *sadev)
1119 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1120 unsigned long flags;
1123 spin_lock_irqsave(&sachip->lock, flags);
1124 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1125 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1126 spin_unlock_irqrestore(&sachip->lock, flags);
1130 * sa1111_disable_device - disable an on-chip SA1111 function block
1131 * @sadev: SA1111 function block device to disable
1133 void sa1111_disable_device(struct sa1111_dev *sadev)
1135 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1136 unsigned long flags;
1139 spin_lock_irqsave(&sachip->lock, flags);
1140 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1141 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1142 spin_unlock_irqrestore(&sachip->lock, flags);
1146 * SA1111 "Register Access Bus."
1148 * We model this as a regular bus type, and hang devices directly
1151 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1153 struct sa1111_dev *dev = SA1111_DEV(_dev);
1154 struct sa1111_driver *drv = SA1111_DRV(_drv);
1156 return dev->devid == drv->devid;
1159 struct bus_type sa1111_bus_type = {
1161 .match = sa1111_match,
1164 static int sa1111_rab_bus_init(void)
1166 return bus_register(&sa1111_bus_type);
1169 postcore_initcall(sa1111_rab_bus_init);
1171 EXPORT_SYMBOL(sa1111_check_dma_bug);
1172 EXPORT_SYMBOL(sa1111_select_audio_mode);
1173 EXPORT_SYMBOL(sa1111_set_audio_rate);
1174 EXPORT_SYMBOL(sa1111_get_audio_rate);
1175 EXPORT_SYMBOL(sa1111_enable_device);
1176 EXPORT_SYMBOL(sa1111_disable_device);
1177 EXPORT_SYMBOL(sa1111_pll_clock);
1178 EXPORT_SYMBOL(sa1111_bus_type);