arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.last_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 sdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034         sdiff = data - kvm->arch.last_tsc_write;
1035         if (sdiff < 0)
1036                 sdiff = -sdiff;
1037
1038         /*
1039          * Special case: close write to TSC within 5 seconds of
1040          * another CPU is interpreted as an attempt to synchronize
1041          * The 5 seconds is to accommodate host load / swapping as
1042          * well as any reset of TSC during the boot process.
1043          *
1044          * In that case, for a reliable TSC, we can match TSC offsets,
1045          * or make a best guest using elapsed value.
1046          */
1047         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1048             elapsed < 5ULL * NSEC_PER_SEC) {
1049                 if (!check_tsc_unstable()) {
1050                         offset = kvm->arch.last_tsc_offset;
1051                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1052                 } else {
1053                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1054                         offset += delta;
1055                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1056                 }
1057                 ns = kvm->arch.last_tsc_nsec;
1058         }
1059         kvm->arch.last_tsc_nsec = ns;
1060         kvm->arch.last_tsc_write = data;
1061         kvm->arch.last_tsc_offset = offset;
1062         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1063         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1064
1065         /* Reset of TSC must disable overshoot protection below */
1066         vcpu->arch.hv_clock.tsc_timestamp = 0;
1067         vcpu->arch.last_tsc_write = data;
1068         vcpu->arch.last_tsc_nsec = ns;
1069 }
1070 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1071
1072 static int kvm_guest_time_update(struct kvm_vcpu *v)
1073 {
1074         unsigned long flags;
1075         struct kvm_vcpu_arch *vcpu = &v->arch;
1076         void *shared_kaddr;
1077         unsigned long this_tsc_khz;
1078         s64 kernel_ns, max_kernel_ns;
1079         u64 tsc_timestamp;
1080
1081         /* Keep irq disabled to prevent changes to the clock */
1082         local_irq_save(flags);
1083         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1084         kernel_ns = get_kernel_ns();
1085         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1086         if (unlikely(this_tsc_khz == 0)) {
1087                 local_irq_restore(flags);
1088                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1089                 return 1;
1090         }
1091
1092         /*
1093          * We may have to catch up the TSC to match elapsed wall clock
1094          * time for two reasons, even if kvmclock is used.
1095          *   1) CPU could have been running below the maximum TSC rate
1096          *   2) Broken TSC compensation resets the base at each VCPU
1097          *      entry to avoid unknown leaps of TSC even when running
1098          *      again on the same CPU.  This may cause apparent elapsed
1099          *      time to disappear, and the guest to stand still or run
1100          *      very slowly.
1101          */
1102         if (vcpu->tsc_catchup) {
1103                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1104                 if (tsc > tsc_timestamp) {
1105                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1106                         tsc_timestamp = tsc;
1107                 }
1108         }
1109
1110         local_irq_restore(flags);
1111
1112         if (!vcpu->time_page)
1113                 return 0;
1114
1115         /*
1116          * Time as measured by the TSC may go backwards when resetting the base
1117          * tsc_timestamp.  The reason for this is that the TSC resolution is
1118          * higher than the resolution of the other clock scales.  Thus, many
1119          * possible measurments of the TSC correspond to one measurement of any
1120          * other clock, and so a spread of values is possible.  This is not a
1121          * problem for the computation of the nanosecond clock; with TSC rates
1122          * around 1GHZ, there can only be a few cycles which correspond to one
1123          * nanosecond value, and any path through this code will inevitably
1124          * take longer than that.  However, with the kernel_ns value itself,
1125          * the precision may be much lower, down to HZ granularity.  If the
1126          * first sampling of TSC against kernel_ns ends in the low part of the
1127          * range, and the second in the high end of the range, we can get:
1128          *
1129          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1130          *
1131          * As the sampling errors potentially range in the thousands of cycles,
1132          * it is possible such a time value has already been observed by the
1133          * guest.  To protect against this, we must compute the system time as
1134          * observed by the guest and ensure the new system time is greater.
1135          */
1136         max_kernel_ns = 0;
1137         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1138                 max_kernel_ns = vcpu->last_guest_tsc -
1139                                 vcpu->hv_clock.tsc_timestamp;
1140                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1141                                     vcpu->hv_clock.tsc_to_system_mul,
1142                                     vcpu->hv_clock.tsc_shift);
1143                 max_kernel_ns += vcpu->last_kernel_ns;
1144         }
1145
1146         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1147                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1148                                    &vcpu->hv_clock.tsc_shift,
1149                                    &vcpu->hv_clock.tsc_to_system_mul);
1150                 vcpu->hw_tsc_khz = this_tsc_khz;
1151         }
1152
1153         if (max_kernel_ns > kernel_ns)
1154                 kernel_ns = max_kernel_ns;
1155
1156         /* With all the info we got, fill in the values */
1157         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1158         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1159         vcpu->last_kernel_ns = kernel_ns;
1160         vcpu->last_guest_tsc = tsc_timestamp;
1161         vcpu->hv_clock.flags = 0;
1162
1163         /*
1164          * The interface expects us to write an even number signaling that the
1165          * update is finished. Since the guest won't see the intermediate
1166          * state, we just increase by 2 at the end.
1167          */
1168         vcpu->hv_clock.version += 2;
1169
1170         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1171
1172         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1173                sizeof(vcpu->hv_clock));
1174
1175         kunmap_atomic(shared_kaddr, KM_USER0);
1176
1177         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1178         return 0;
1179 }
1180
1181 static bool msr_mtrr_valid(unsigned msr)
1182 {
1183         switch (msr) {
1184         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1185         case MSR_MTRRfix64K_00000:
1186         case MSR_MTRRfix16K_80000:
1187         case MSR_MTRRfix16K_A0000:
1188         case MSR_MTRRfix4K_C0000:
1189         case MSR_MTRRfix4K_C8000:
1190         case MSR_MTRRfix4K_D0000:
1191         case MSR_MTRRfix4K_D8000:
1192         case MSR_MTRRfix4K_E0000:
1193         case MSR_MTRRfix4K_E8000:
1194         case MSR_MTRRfix4K_F0000:
1195         case MSR_MTRRfix4K_F8000:
1196         case MSR_MTRRdefType:
1197         case MSR_IA32_CR_PAT:
1198                 return true;
1199         case 0x2f8:
1200                 return true;
1201         }
1202         return false;
1203 }
1204
1205 static bool valid_pat_type(unsigned t)
1206 {
1207         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1208 }
1209
1210 static bool valid_mtrr_type(unsigned t)
1211 {
1212         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1213 }
1214
1215 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1216 {
1217         int i;
1218
1219         if (!msr_mtrr_valid(msr))
1220                 return false;
1221
1222         if (msr == MSR_IA32_CR_PAT) {
1223                 for (i = 0; i < 8; i++)
1224                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1225                                 return false;
1226                 return true;
1227         } else if (msr == MSR_MTRRdefType) {
1228                 if (data & ~0xcff)
1229                         return false;
1230                 return valid_mtrr_type(data & 0xff);
1231         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1232                 for (i = 0; i < 8 ; i++)
1233                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1234                                 return false;
1235                 return true;
1236         }
1237
1238         /* variable MTRRs */
1239         return valid_mtrr_type(data & 0xff);
1240 }
1241
1242 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1243 {
1244         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1245
1246         if (!mtrr_valid(vcpu, msr, data))
1247                 return 1;
1248
1249         if (msr == MSR_MTRRdefType) {
1250                 vcpu->arch.mtrr_state.def_type = data;
1251                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1252         } else if (msr == MSR_MTRRfix64K_00000)
1253                 p[0] = data;
1254         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1255                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1256         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1257                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1258         else if (msr == MSR_IA32_CR_PAT)
1259                 vcpu->arch.pat = data;
1260         else {  /* Variable MTRRs */
1261                 int idx, is_mtrr_mask;
1262                 u64 *pt;
1263
1264                 idx = (msr - 0x200) / 2;
1265                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1266                 if (!is_mtrr_mask)
1267                         pt =
1268                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1269                 else
1270                         pt =
1271                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1272                 *pt = data;
1273         }
1274
1275         kvm_mmu_reset_context(vcpu);
1276         return 0;
1277 }
1278
1279 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1280 {
1281         u64 mcg_cap = vcpu->arch.mcg_cap;
1282         unsigned bank_num = mcg_cap & 0xff;
1283
1284         switch (msr) {
1285         case MSR_IA32_MCG_STATUS:
1286                 vcpu->arch.mcg_status = data;
1287                 break;
1288         case MSR_IA32_MCG_CTL:
1289                 if (!(mcg_cap & MCG_CTL_P))
1290                         return 1;
1291                 if (data != 0 && data != ~(u64)0)
1292                         return -1;
1293                 vcpu->arch.mcg_ctl = data;
1294                 break;
1295         default:
1296                 if (msr >= MSR_IA32_MC0_CTL &&
1297                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1298                         u32 offset = msr - MSR_IA32_MC0_CTL;
1299                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1300                          * some Linux kernels though clear bit 10 in bank 4 to
1301                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1302                          * this to avoid an uncatched #GP in the guest
1303                          */
1304                         if ((offset & 0x3) == 0 &&
1305                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1306                                 return -1;
1307                         vcpu->arch.mce_banks[offset] = data;
1308                         break;
1309                 }
1310                 return 1;
1311         }
1312         return 0;
1313 }
1314
1315 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1316 {
1317         struct kvm *kvm = vcpu->kvm;
1318         int lm = is_long_mode(vcpu);
1319         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1320                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1321         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1322                 : kvm->arch.xen_hvm_config.blob_size_32;
1323         u32 page_num = data & ~PAGE_MASK;
1324         u64 page_addr = data & PAGE_MASK;
1325         u8 *page;
1326         int r;
1327
1328         r = -E2BIG;
1329         if (page_num >= blob_size)
1330                 goto out;
1331         r = -ENOMEM;
1332         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1333         if (IS_ERR(page)) {
1334                 r = PTR_ERR(page);
1335                 goto out;
1336         }
1337         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1338                 goto out_free;
1339         r = 0;
1340 out_free:
1341         kfree(page);
1342 out:
1343         return r;
1344 }
1345
1346 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1347 {
1348         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1349 }
1350
1351 static bool kvm_hv_msr_partition_wide(u32 msr)
1352 {
1353         bool r = false;
1354         switch (msr) {
1355         case HV_X64_MSR_GUEST_OS_ID:
1356         case HV_X64_MSR_HYPERCALL:
1357                 r = true;
1358                 break;
1359         }
1360
1361         return r;
1362 }
1363
1364 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1365 {
1366         struct kvm *kvm = vcpu->kvm;
1367
1368         switch (msr) {
1369         case HV_X64_MSR_GUEST_OS_ID:
1370                 kvm->arch.hv_guest_os_id = data;
1371                 /* setting guest os id to zero disables hypercall page */
1372                 if (!kvm->arch.hv_guest_os_id)
1373                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1374                 break;
1375         case HV_X64_MSR_HYPERCALL: {
1376                 u64 gfn;
1377                 unsigned long addr;
1378                 u8 instructions[4];
1379
1380                 /* if guest os id is not set hypercall should remain disabled */
1381                 if (!kvm->arch.hv_guest_os_id)
1382                         break;
1383                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1384                         kvm->arch.hv_hypercall = data;
1385                         break;
1386                 }
1387                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1388                 addr = gfn_to_hva(kvm, gfn);
1389                 if (kvm_is_error_hva(addr))
1390                         return 1;
1391                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1392                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1393                 if (__copy_to_user((void __user *)addr, instructions, 4))
1394                         return 1;
1395                 kvm->arch.hv_hypercall = data;
1396                 break;
1397         }
1398         default:
1399                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1400                           "data 0x%llx\n", msr, data);
1401                 return 1;
1402         }
1403         return 0;
1404 }
1405
1406 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1407 {
1408         switch (msr) {
1409         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1410                 unsigned long addr;
1411
1412                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1413                         vcpu->arch.hv_vapic = data;
1414                         break;
1415                 }
1416                 addr = gfn_to_hva(vcpu->kvm, data >>
1417                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1418                 if (kvm_is_error_hva(addr))
1419                         return 1;
1420                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1421                         return 1;
1422                 vcpu->arch.hv_vapic = data;
1423                 break;
1424         }
1425         case HV_X64_MSR_EOI:
1426                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1427         case HV_X64_MSR_ICR:
1428                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1429         case HV_X64_MSR_TPR:
1430                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1431         default:
1432                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1433                           "data 0x%llx\n", msr, data);
1434                 return 1;
1435         }
1436
1437         return 0;
1438 }
1439
1440 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1441 {
1442         gpa_t gpa = data & ~0x3f;
1443
1444         /* Bits 2:5 are resrved, Should be zero */
1445         if (data & 0x3c)
1446                 return 1;
1447
1448         vcpu->arch.apf.msr_val = data;
1449
1450         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1451                 kvm_clear_async_pf_completion_queue(vcpu);
1452                 kvm_async_pf_hash_reset(vcpu);
1453                 return 0;
1454         }
1455
1456         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1457                 return 1;
1458
1459         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1460         kvm_async_pf_wakeup_all(vcpu);
1461         return 0;
1462 }
1463
1464 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1465 {
1466         if (vcpu->arch.time_page) {
1467                 kvm_release_page_dirty(vcpu->arch.time_page);
1468                 vcpu->arch.time_page = NULL;
1469         }
1470 }
1471
1472 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1473 {
1474         u64 delta;
1475
1476         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1477                 return;
1478
1479         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1480         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1481         vcpu->arch.st.accum_steal = delta;
1482 }
1483
1484 static void record_steal_time(struct kvm_vcpu *vcpu)
1485 {
1486         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1487                 return;
1488
1489         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1490                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1491                 return;
1492
1493         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1494         vcpu->arch.st.steal.version += 2;
1495         vcpu->arch.st.accum_steal = 0;
1496
1497         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1498                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1499 }
1500
1501 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1502 {
1503         bool pr = false;
1504
1505         switch (msr) {
1506         case MSR_EFER:
1507                 return set_efer(vcpu, data);
1508         case MSR_K7_HWCR:
1509                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1510                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1511                 if (data != 0) {
1512                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1513                                 data);
1514                         return 1;
1515                 }
1516                 break;
1517         case MSR_FAM10H_MMIO_CONF_BASE:
1518                 if (data != 0) {
1519                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1520                                 "0x%llx\n", data);
1521                         return 1;
1522                 }
1523                 break;
1524         case MSR_AMD64_NB_CFG:
1525                 break;
1526         case MSR_IA32_DEBUGCTLMSR:
1527                 if (!data) {
1528                         /* We support the non-activated case already */
1529                         break;
1530                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1531                         /* Values other than LBR and BTF are vendor-specific,
1532                            thus reserved and should throw a #GP */
1533                         return 1;
1534                 }
1535                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1536                         __func__, data);
1537                 break;
1538         case MSR_IA32_UCODE_REV:
1539         case MSR_IA32_UCODE_WRITE:
1540         case MSR_VM_HSAVE_PA:
1541         case MSR_AMD64_PATCH_LOADER:
1542                 break;
1543         case 0x200 ... 0x2ff:
1544                 return set_msr_mtrr(vcpu, msr, data);
1545         case MSR_IA32_APICBASE:
1546                 kvm_set_apic_base(vcpu, data);
1547                 break;
1548         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1549                 return kvm_x2apic_msr_write(vcpu, msr, data);
1550         case MSR_IA32_TSCDEADLINE:
1551                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1552                 break;
1553         case MSR_IA32_MISC_ENABLE:
1554                 vcpu->arch.ia32_misc_enable_msr = data;
1555                 break;
1556         case MSR_KVM_WALL_CLOCK_NEW:
1557         case MSR_KVM_WALL_CLOCK:
1558                 vcpu->kvm->arch.wall_clock = data;
1559                 kvm_write_wall_clock(vcpu->kvm, data);
1560                 break;
1561         case MSR_KVM_SYSTEM_TIME_NEW:
1562         case MSR_KVM_SYSTEM_TIME: {
1563                 kvmclock_reset(vcpu);
1564
1565                 vcpu->arch.time = data;
1566                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1567
1568                 /* we verify if the enable bit is set... */
1569                 if (!(data & 1))
1570                         break;
1571
1572                 /* ...but clean it before doing the actual write */
1573                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1574
1575                 vcpu->arch.time_page =
1576                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1577
1578                 if (is_error_page(vcpu->arch.time_page)) {
1579                         kvm_release_page_clean(vcpu->arch.time_page);
1580                         vcpu->arch.time_page = NULL;
1581                 }
1582                 break;
1583         }
1584         case MSR_KVM_ASYNC_PF_EN:
1585                 if (kvm_pv_enable_async_pf(vcpu, data))
1586                         return 1;
1587                 break;
1588         case MSR_KVM_STEAL_TIME:
1589
1590                 if (unlikely(!sched_info_on()))
1591                         return 1;
1592
1593                 if (data & KVM_STEAL_RESERVED_MASK)
1594                         return 1;
1595
1596                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1597                                                         data & KVM_STEAL_VALID_BITS))
1598                         return 1;
1599
1600                 vcpu->arch.st.msr_val = data;
1601
1602                 if (!(data & KVM_MSR_ENABLED))
1603                         break;
1604
1605                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1606
1607                 preempt_disable();
1608                 accumulate_steal_time(vcpu);
1609                 preempt_enable();
1610
1611                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1612
1613                 break;
1614
1615         case MSR_IA32_MCG_CTL:
1616         case MSR_IA32_MCG_STATUS:
1617         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1618                 return set_msr_mce(vcpu, msr, data);
1619
1620         /* Performance counters are not protected by a CPUID bit,
1621          * so we should check all of them in the generic path for the sake of
1622          * cross vendor migration.
1623          * Writing a zero into the event select MSRs disables them,
1624          * which we perfectly emulate ;-). Any other value should be at least
1625          * reported, some guests depend on them.
1626          */
1627         case MSR_K7_EVNTSEL0:
1628         case MSR_K7_EVNTSEL1:
1629         case MSR_K7_EVNTSEL2:
1630         case MSR_K7_EVNTSEL3:
1631                 if (data != 0)
1632                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1633                                 "0x%x data 0x%llx\n", msr, data);
1634                 break;
1635         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1636          * so we ignore writes to make it happy.
1637          */
1638         case MSR_K7_PERFCTR0:
1639         case MSR_K7_PERFCTR1:
1640         case MSR_K7_PERFCTR2:
1641         case MSR_K7_PERFCTR3:
1642                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1643                         "0x%x data 0x%llx\n", msr, data);
1644                 break;
1645         case MSR_P6_PERFCTR0:
1646         case MSR_P6_PERFCTR1:
1647                 pr = true;
1648         case MSR_P6_EVNTSEL0:
1649         case MSR_P6_EVNTSEL1:
1650                 if (kvm_pmu_msr(vcpu, msr))
1651                         return kvm_pmu_set_msr(vcpu, msr, data);
1652
1653                 if (pr || data != 0)
1654                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1655                                 "0x%x data 0x%llx\n", msr, data);
1656                 break;
1657         case MSR_K7_CLK_CTL:
1658                 /*
1659                  * Ignore all writes to this no longer documented MSR.
1660                  * Writes are only relevant for old K7 processors,
1661                  * all pre-dating SVM, but a recommended workaround from
1662                  * AMD for these chips. It is possible to speicify the
1663                  * affected processor models on the command line, hence
1664                  * the need to ignore the workaround.
1665                  */
1666                 break;
1667         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1668                 if (kvm_hv_msr_partition_wide(msr)) {
1669                         int r;
1670                         mutex_lock(&vcpu->kvm->lock);
1671                         r = set_msr_hyperv_pw(vcpu, msr, data);
1672                         mutex_unlock(&vcpu->kvm->lock);
1673                         return r;
1674                 } else
1675                         return set_msr_hyperv(vcpu, msr, data);
1676                 break;
1677         case MSR_IA32_BBL_CR_CTL3:
1678                 /* Drop writes to this legacy MSR -- see rdmsr
1679                  * counterpart for further detail.
1680                  */
1681                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1682                 break;
1683         case MSR_AMD64_OSVW_ID_LENGTH:
1684                 if (!guest_cpuid_has_osvw(vcpu))
1685                         return 1;
1686                 vcpu->arch.osvw.length = data;
1687                 break;
1688         case MSR_AMD64_OSVW_STATUS:
1689                 if (!guest_cpuid_has_osvw(vcpu))
1690                         return 1;
1691                 vcpu->arch.osvw.status = data;
1692                 break;
1693         default:
1694                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1695                         return xen_hvm_config(vcpu, data);
1696                 if (kvm_pmu_msr(vcpu, msr))
1697                         return kvm_pmu_set_msr(vcpu, msr, data);
1698                 if (!ignore_msrs) {
1699                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1700                                 msr, data);
1701                         return 1;
1702                 } else {
1703                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1704                                 msr, data);
1705                         break;
1706                 }
1707         }
1708         return 0;
1709 }
1710 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1711
1712
1713 /*
1714  * Reads an msr value (of 'msr_index') into 'pdata'.
1715  * Returns 0 on success, non-0 otherwise.
1716  * Assumes vcpu_load() was already called.
1717  */
1718 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1719 {
1720         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1721 }
1722
1723 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1724 {
1725         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1726
1727         if (!msr_mtrr_valid(msr))
1728                 return 1;
1729
1730         if (msr == MSR_MTRRdefType)
1731                 *pdata = vcpu->arch.mtrr_state.def_type +
1732                          (vcpu->arch.mtrr_state.enabled << 10);
1733         else if (msr == MSR_MTRRfix64K_00000)
1734                 *pdata = p[0];
1735         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1736                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1737         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1738                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1739         else if (msr == MSR_IA32_CR_PAT)
1740                 *pdata = vcpu->arch.pat;
1741         else {  /* Variable MTRRs */
1742                 int idx, is_mtrr_mask;
1743                 u64 *pt;
1744
1745                 idx = (msr - 0x200) / 2;
1746                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1747                 if (!is_mtrr_mask)
1748                         pt =
1749                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1750                 else
1751                         pt =
1752                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1753                 *pdata = *pt;
1754         }
1755
1756         return 0;
1757 }
1758
1759 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1760 {
1761         u64 data;
1762         u64 mcg_cap = vcpu->arch.mcg_cap;
1763         unsigned bank_num = mcg_cap & 0xff;
1764
1765         switch (msr) {
1766         case MSR_IA32_P5_MC_ADDR:
1767         case MSR_IA32_P5_MC_TYPE:
1768                 data = 0;
1769                 break;
1770         case MSR_IA32_MCG_CAP:
1771                 data = vcpu->arch.mcg_cap;
1772                 break;
1773         case MSR_IA32_MCG_CTL:
1774                 if (!(mcg_cap & MCG_CTL_P))
1775                         return 1;
1776                 data = vcpu->arch.mcg_ctl;
1777                 break;
1778         case MSR_IA32_MCG_STATUS:
1779                 data = vcpu->arch.mcg_status;
1780                 break;
1781         default:
1782                 if (msr >= MSR_IA32_MC0_CTL &&
1783                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1784                         u32 offset = msr - MSR_IA32_MC0_CTL;
1785                         data = vcpu->arch.mce_banks[offset];
1786                         break;
1787                 }
1788                 return 1;
1789         }
1790         *pdata = data;
1791         return 0;
1792 }
1793
1794 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1795 {
1796         u64 data = 0;
1797         struct kvm *kvm = vcpu->kvm;
1798
1799         switch (msr) {
1800         case HV_X64_MSR_GUEST_OS_ID:
1801                 data = kvm->arch.hv_guest_os_id;
1802                 break;
1803         case HV_X64_MSR_HYPERCALL:
1804                 data = kvm->arch.hv_hypercall;
1805                 break;
1806         default:
1807                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1808                 return 1;
1809         }
1810
1811         *pdata = data;
1812         return 0;
1813 }
1814
1815 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1816 {
1817         u64 data = 0;
1818
1819         switch (msr) {
1820         case HV_X64_MSR_VP_INDEX: {
1821                 int r;
1822                 struct kvm_vcpu *v;
1823                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1824                         if (v == vcpu)
1825                                 data = r;
1826                 break;
1827         }
1828         case HV_X64_MSR_EOI:
1829                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1830         case HV_X64_MSR_ICR:
1831                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1832         case HV_X64_MSR_TPR:
1833                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1834         case HV_X64_MSR_APIC_ASSIST_PAGE:
1835                 data = vcpu->arch.hv_vapic;
1836                 break;
1837         default:
1838                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1839                 return 1;
1840         }
1841         *pdata = data;
1842         return 0;
1843 }
1844
1845 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1846 {
1847         u64 data;
1848
1849         switch (msr) {
1850         case MSR_IA32_PLATFORM_ID:
1851         case MSR_IA32_EBL_CR_POWERON:
1852         case MSR_IA32_DEBUGCTLMSR:
1853         case MSR_IA32_LASTBRANCHFROMIP:
1854         case MSR_IA32_LASTBRANCHTOIP:
1855         case MSR_IA32_LASTINTFROMIP:
1856         case MSR_IA32_LASTINTTOIP:
1857         case MSR_K8_SYSCFG:
1858         case MSR_K7_HWCR:
1859         case MSR_VM_HSAVE_PA:
1860         case MSR_K7_EVNTSEL0:
1861         case MSR_K7_PERFCTR0:
1862         case MSR_K8_INT_PENDING_MSG:
1863         case MSR_AMD64_NB_CFG:
1864         case MSR_FAM10H_MMIO_CONF_BASE:
1865                 data = 0;
1866                 break;
1867         case MSR_P6_PERFCTR0:
1868         case MSR_P6_PERFCTR1:
1869         case MSR_P6_EVNTSEL0:
1870         case MSR_P6_EVNTSEL1:
1871                 if (kvm_pmu_msr(vcpu, msr))
1872                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1873                 data = 0;
1874                 break;
1875         case MSR_IA32_UCODE_REV:
1876                 data = 0x100000000ULL;
1877                 break;
1878         case MSR_MTRRcap:
1879                 data = 0x500 | KVM_NR_VAR_MTRR;
1880                 break;
1881         case 0x200 ... 0x2ff:
1882                 return get_msr_mtrr(vcpu, msr, pdata);
1883         case 0xcd: /* fsb frequency */
1884                 data = 3;
1885                 break;
1886                 /*
1887                  * MSR_EBC_FREQUENCY_ID
1888                  * Conservative value valid for even the basic CPU models.
1889                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1890                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1891                  * and 266MHz for model 3, or 4. Set Core Clock
1892                  * Frequency to System Bus Frequency Ratio to 1 (bits
1893                  * 31:24) even though these are only valid for CPU
1894                  * models > 2, however guests may end up dividing or
1895                  * multiplying by zero otherwise.
1896                  */
1897         case MSR_EBC_FREQUENCY_ID:
1898                 data = 1 << 24;
1899                 break;
1900         case MSR_IA32_APICBASE:
1901                 data = kvm_get_apic_base(vcpu);
1902                 break;
1903         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1904                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1905                 break;
1906         case MSR_IA32_TSCDEADLINE:
1907                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1908                 break;
1909         case MSR_IA32_MISC_ENABLE:
1910                 data = vcpu->arch.ia32_misc_enable_msr;
1911                 break;
1912         case MSR_IA32_PERF_STATUS:
1913                 /* TSC increment by tick */
1914                 data = 1000ULL;
1915                 /* CPU multiplier */
1916                 data |= (((uint64_t)4ULL) << 40);
1917                 break;
1918         case MSR_EFER:
1919                 data = vcpu->arch.efer;
1920                 break;
1921         case MSR_KVM_WALL_CLOCK:
1922         case MSR_KVM_WALL_CLOCK_NEW:
1923                 data = vcpu->kvm->arch.wall_clock;
1924                 break;
1925         case MSR_KVM_SYSTEM_TIME:
1926         case MSR_KVM_SYSTEM_TIME_NEW:
1927                 data = vcpu->arch.time;
1928                 break;
1929         case MSR_KVM_ASYNC_PF_EN:
1930                 data = vcpu->arch.apf.msr_val;
1931                 break;
1932         case MSR_KVM_STEAL_TIME:
1933                 data = vcpu->arch.st.msr_val;
1934                 break;
1935         case MSR_IA32_P5_MC_ADDR:
1936         case MSR_IA32_P5_MC_TYPE:
1937         case MSR_IA32_MCG_CAP:
1938         case MSR_IA32_MCG_CTL:
1939         case MSR_IA32_MCG_STATUS:
1940         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1941                 return get_msr_mce(vcpu, msr, pdata);
1942         case MSR_K7_CLK_CTL:
1943                 /*
1944                  * Provide expected ramp-up count for K7. All other
1945                  * are set to zero, indicating minimum divisors for
1946                  * every field.
1947                  *
1948                  * This prevents guest kernels on AMD host with CPU
1949                  * type 6, model 8 and higher from exploding due to
1950                  * the rdmsr failing.
1951                  */
1952                 data = 0x20000000;
1953                 break;
1954         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1955                 if (kvm_hv_msr_partition_wide(msr)) {
1956                         int r;
1957                         mutex_lock(&vcpu->kvm->lock);
1958                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1959                         mutex_unlock(&vcpu->kvm->lock);
1960                         return r;
1961                 } else
1962                         return get_msr_hyperv(vcpu, msr, pdata);
1963                 break;
1964         case MSR_IA32_BBL_CR_CTL3:
1965                 /* This legacy MSR exists but isn't fully documented in current
1966                  * silicon.  It is however accessed by winxp in very narrow
1967                  * scenarios where it sets bit #19, itself documented as
1968                  * a "reserved" bit.  Best effort attempt to source coherent
1969                  * read data here should the balance of the register be
1970                  * interpreted by the guest:
1971                  *
1972                  * L2 cache control register 3: 64GB range, 256KB size,
1973                  * enabled, latency 0x1, configured
1974                  */
1975                 data = 0xbe702111;
1976                 break;
1977         case MSR_AMD64_OSVW_ID_LENGTH:
1978                 if (!guest_cpuid_has_osvw(vcpu))
1979                         return 1;
1980                 data = vcpu->arch.osvw.length;
1981                 break;
1982         case MSR_AMD64_OSVW_STATUS:
1983                 if (!guest_cpuid_has_osvw(vcpu))
1984                         return 1;
1985                 data = vcpu->arch.osvw.status;
1986                 break;
1987         default:
1988                 if (kvm_pmu_msr(vcpu, msr))
1989                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1990                 if (!ignore_msrs) {
1991                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1992                         return 1;
1993                 } else {
1994                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1995                         data = 0;
1996                 }
1997                 break;
1998         }
1999         *pdata = data;
2000         return 0;
2001 }
2002 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2003
2004 /*
2005  * Read or write a bunch of msrs. All parameters are kernel addresses.
2006  *
2007  * @return number of msrs set successfully.
2008  */
2009 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2010                     struct kvm_msr_entry *entries,
2011                     int (*do_msr)(struct kvm_vcpu *vcpu,
2012                                   unsigned index, u64 *data))
2013 {
2014         int i, idx;
2015
2016         idx = srcu_read_lock(&vcpu->kvm->srcu);
2017         for (i = 0; i < msrs->nmsrs; ++i)
2018                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2019                         break;
2020         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2021
2022         return i;
2023 }
2024
2025 /*
2026  * Read or write a bunch of msrs. Parameters are user addresses.
2027  *
2028  * @return number of msrs set successfully.
2029  */
2030 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2031                   int (*do_msr)(struct kvm_vcpu *vcpu,
2032                                 unsigned index, u64 *data),
2033                   int writeback)
2034 {
2035         struct kvm_msrs msrs;
2036         struct kvm_msr_entry *entries;
2037         int r, n;
2038         unsigned size;
2039
2040         r = -EFAULT;
2041         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2042                 goto out;
2043
2044         r = -E2BIG;
2045         if (msrs.nmsrs >= MAX_IO_MSRS)
2046                 goto out;
2047
2048         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2049         entries = memdup_user(user_msrs->entries, size);
2050         if (IS_ERR(entries)) {
2051                 r = PTR_ERR(entries);
2052                 goto out;
2053         }
2054
2055         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2056         if (r < 0)
2057                 goto out_free;
2058
2059         r = -EFAULT;
2060         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2061                 goto out_free;
2062
2063         r = n;
2064
2065 out_free:
2066         kfree(entries);
2067 out:
2068         return r;
2069 }
2070
2071 int kvm_dev_ioctl_check_extension(long ext)
2072 {
2073         int r;
2074
2075         switch (ext) {
2076         case KVM_CAP_IRQCHIP:
2077         case KVM_CAP_HLT:
2078         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2079         case KVM_CAP_SET_TSS_ADDR:
2080         case KVM_CAP_EXT_CPUID:
2081         case KVM_CAP_CLOCKSOURCE:
2082         case KVM_CAP_PIT:
2083         case KVM_CAP_NOP_IO_DELAY:
2084         case KVM_CAP_MP_STATE:
2085         case KVM_CAP_SYNC_MMU:
2086         case KVM_CAP_USER_NMI:
2087         case KVM_CAP_REINJECT_CONTROL:
2088         case KVM_CAP_IRQ_INJECT_STATUS:
2089         case KVM_CAP_ASSIGN_DEV_IRQ:
2090         case KVM_CAP_IRQFD:
2091         case KVM_CAP_IOEVENTFD:
2092         case KVM_CAP_PIT2:
2093         case KVM_CAP_PIT_STATE2:
2094         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2095         case KVM_CAP_XEN_HVM:
2096         case KVM_CAP_ADJUST_CLOCK:
2097         case KVM_CAP_VCPU_EVENTS:
2098         case KVM_CAP_HYPERV:
2099         case KVM_CAP_HYPERV_VAPIC:
2100         case KVM_CAP_HYPERV_SPIN:
2101         case KVM_CAP_PCI_SEGMENT:
2102         case KVM_CAP_DEBUGREGS:
2103         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2104         case KVM_CAP_XSAVE:
2105         case KVM_CAP_ASYNC_PF:
2106         case KVM_CAP_GET_TSC_KHZ:
2107                 r = 1;
2108                 break;
2109         case KVM_CAP_COALESCED_MMIO:
2110                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2111                 break;
2112         case KVM_CAP_VAPIC:
2113                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2114                 break;
2115         case KVM_CAP_NR_VCPUS:
2116                 r = KVM_SOFT_MAX_VCPUS;
2117                 break;
2118         case KVM_CAP_MAX_VCPUS:
2119                 r = KVM_MAX_VCPUS;
2120                 break;
2121         case KVM_CAP_NR_MEMSLOTS:
2122                 r = KVM_MEMORY_SLOTS;
2123                 break;
2124         case KVM_CAP_PV_MMU:    /* obsolete */
2125                 r = 0;
2126                 break;
2127         case KVM_CAP_IOMMU:
2128                 r = iommu_present(&pci_bus_type);
2129                 break;
2130         case KVM_CAP_MCE:
2131                 r = KVM_MAX_MCE_BANKS;
2132                 break;
2133         case KVM_CAP_XCRS:
2134                 r = cpu_has_xsave;
2135                 break;
2136         case KVM_CAP_TSC_CONTROL:
2137                 r = kvm_has_tsc_control;
2138                 break;
2139         case KVM_CAP_TSC_DEADLINE_TIMER:
2140                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2141                 break;
2142         default:
2143                 r = 0;
2144                 break;
2145         }
2146         return r;
2147
2148 }
2149
2150 long kvm_arch_dev_ioctl(struct file *filp,
2151                         unsigned int ioctl, unsigned long arg)
2152 {
2153         void __user *argp = (void __user *)arg;
2154         long r;
2155
2156         switch (ioctl) {
2157         case KVM_GET_MSR_INDEX_LIST: {
2158                 struct kvm_msr_list __user *user_msr_list = argp;
2159                 struct kvm_msr_list msr_list;
2160                 unsigned n;
2161
2162                 r = -EFAULT;
2163                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2164                         goto out;
2165                 n = msr_list.nmsrs;
2166                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2167                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2168                         goto out;
2169                 r = -E2BIG;
2170                 if (n < msr_list.nmsrs)
2171                         goto out;
2172                 r = -EFAULT;
2173                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2174                                  num_msrs_to_save * sizeof(u32)))
2175                         goto out;
2176                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2177                                  &emulated_msrs,
2178                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2179                         goto out;
2180                 r = 0;
2181                 break;
2182         }
2183         case KVM_GET_SUPPORTED_CPUID: {
2184                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2185                 struct kvm_cpuid2 cpuid;
2186
2187                 r = -EFAULT;
2188                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2189                         goto out;
2190                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2191                                                       cpuid_arg->entries);
2192                 if (r)
2193                         goto out;
2194
2195                 r = -EFAULT;
2196                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2197                         goto out;
2198                 r = 0;
2199                 break;
2200         }
2201         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2202                 u64 mce_cap;
2203
2204                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2205                 r = -EFAULT;
2206                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2207                         goto out;
2208                 r = 0;
2209                 break;
2210         }
2211         default:
2212                 r = -EINVAL;
2213         }
2214 out:
2215         return r;
2216 }
2217
2218 static void wbinvd_ipi(void *garbage)
2219 {
2220         wbinvd();
2221 }
2222
2223 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2224 {
2225         return vcpu->kvm->arch.iommu_domain &&
2226                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2227 }
2228
2229 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2230 {
2231         /* Address WBINVD may be executed by guest */
2232         if (need_emulate_wbinvd(vcpu)) {
2233                 if (kvm_x86_ops->has_wbinvd_exit())
2234                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2235                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2236                         smp_call_function_single(vcpu->cpu,
2237                                         wbinvd_ipi, NULL, 1);
2238         }
2239
2240         kvm_x86_ops->vcpu_load(vcpu, cpu);
2241         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2242                 /* Make sure TSC doesn't go backwards */
2243                 s64 tsc_delta;
2244                 u64 tsc;
2245
2246                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2247                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2248                              tsc - vcpu->arch.last_guest_tsc;
2249
2250                 if (tsc_delta < 0)
2251                         mark_tsc_unstable("KVM discovered backwards TSC");
2252                 if (check_tsc_unstable()) {
2253                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2254                         vcpu->arch.tsc_catchup = 1;
2255                 }
2256                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2257                 if (vcpu->cpu != cpu)
2258                         kvm_migrate_timers(vcpu);
2259                 vcpu->cpu = cpu;
2260         }
2261
2262         accumulate_steal_time(vcpu);
2263         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2264 }
2265
2266 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2267 {
2268         kvm_x86_ops->vcpu_put(vcpu);
2269         kvm_put_guest_fpu(vcpu);
2270         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2271 }
2272
2273 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2274                                     struct kvm_lapic_state *s)
2275 {
2276         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2277
2278         return 0;
2279 }
2280
2281 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2282                                     struct kvm_lapic_state *s)
2283 {
2284         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2285         kvm_apic_post_state_restore(vcpu);
2286         update_cr8_intercept(vcpu);
2287
2288         return 0;
2289 }
2290
2291 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2292                                     struct kvm_interrupt *irq)
2293 {
2294         if (irq->irq < 0 || irq->irq >= 256)
2295                 return -EINVAL;
2296         if (irqchip_in_kernel(vcpu->kvm))
2297                 return -ENXIO;
2298
2299         kvm_queue_interrupt(vcpu, irq->irq, false);
2300         kvm_make_request(KVM_REQ_EVENT, vcpu);
2301
2302         return 0;
2303 }
2304
2305 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2306 {
2307         kvm_inject_nmi(vcpu);
2308
2309         return 0;
2310 }
2311
2312 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2313                                            struct kvm_tpr_access_ctl *tac)
2314 {
2315         if (tac->flags)
2316                 return -EINVAL;
2317         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2318         return 0;
2319 }
2320
2321 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2322                                         u64 mcg_cap)
2323 {
2324         int r;
2325         unsigned bank_num = mcg_cap & 0xff, bank;
2326
2327         r = -EINVAL;
2328         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2329                 goto out;
2330         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2331                 goto out;
2332         r = 0;
2333         vcpu->arch.mcg_cap = mcg_cap;
2334         /* Init IA32_MCG_CTL to all 1s */
2335         if (mcg_cap & MCG_CTL_P)
2336                 vcpu->arch.mcg_ctl = ~(u64)0;
2337         /* Init IA32_MCi_CTL to all 1s */
2338         for (bank = 0; bank < bank_num; bank++)
2339                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2340 out:
2341         return r;
2342 }
2343
2344 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2345                                       struct kvm_x86_mce *mce)
2346 {
2347         u64 mcg_cap = vcpu->arch.mcg_cap;
2348         unsigned bank_num = mcg_cap & 0xff;
2349         u64 *banks = vcpu->arch.mce_banks;
2350
2351         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2352                 return -EINVAL;
2353         /*
2354          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2355          * reporting is disabled
2356          */
2357         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2358             vcpu->arch.mcg_ctl != ~(u64)0)
2359                 return 0;
2360         banks += 4 * mce->bank;
2361         /*
2362          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2363          * reporting is disabled for the bank
2364          */
2365         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2366                 return 0;
2367         if (mce->status & MCI_STATUS_UC) {
2368                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2369                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2370                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2371                         return 0;
2372                 }
2373                 if (banks[1] & MCI_STATUS_VAL)
2374                         mce->status |= MCI_STATUS_OVER;
2375                 banks[2] = mce->addr;
2376                 banks[3] = mce->misc;
2377                 vcpu->arch.mcg_status = mce->mcg_status;
2378                 banks[1] = mce->status;
2379                 kvm_queue_exception(vcpu, MC_VECTOR);
2380         } else if (!(banks[1] & MCI_STATUS_VAL)
2381                    || !(banks[1] & MCI_STATUS_UC)) {
2382                 if (banks[1] & MCI_STATUS_VAL)
2383                         mce->status |= MCI_STATUS_OVER;
2384                 banks[2] = mce->addr;
2385                 banks[3] = mce->misc;
2386                 banks[1] = mce->status;
2387         } else
2388                 banks[1] |= MCI_STATUS_OVER;
2389         return 0;
2390 }
2391
2392 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2393                                                struct kvm_vcpu_events *events)
2394 {
2395         process_nmi(vcpu);
2396         events->exception.injected =
2397                 vcpu->arch.exception.pending &&
2398                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2399         events->exception.nr = vcpu->arch.exception.nr;
2400         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2401         events->exception.pad = 0;
2402         events->exception.error_code = vcpu->arch.exception.error_code;
2403
2404         events->interrupt.injected =
2405                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2406         events->interrupt.nr = vcpu->arch.interrupt.nr;
2407         events->interrupt.soft = 0;
2408         events->interrupt.shadow =
2409                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2410                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2411
2412         events->nmi.injected = vcpu->arch.nmi_injected;
2413         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2414         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2415         events->nmi.pad = 0;
2416
2417         events->sipi_vector = vcpu->arch.sipi_vector;
2418
2419         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2420                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2421                          | KVM_VCPUEVENT_VALID_SHADOW);
2422         memset(&events->reserved, 0, sizeof(events->reserved));
2423 }
2424
2425 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2426                                               struct kvm_vcpu_events *events)
2427 {
2428         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2429                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2430                               | KVM_VCPUEVENT_VALID_SHADOW))
2431                 return -EINVAL;
2432
2433         process_nmi(vcpu);
2434         vcpu->arch.exception.pending = events->exception.injected;
2435         vcpu->arch.exception.nr = events->exception.nr;
2436         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2437         vcpu->arch.exception.error_code = events->exception.error_code;
2438
2439         vcpu->arch.interrupt.pending = events->interrupt.injected;
2440         vcpu->arch.interrupt.nr = events->interrupt.nr;
2441         vcpu->arch.interrupt.soft = events->interrupt.soft;
2442         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2443                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2444                                                   events->interrupt.shadow);
2445
2446         vcpu->arch.nmi_injected = events->nmi.injected;
2447         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2448                 vcpu->arch.nmi_pending = events->nmi.pending;
2449         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2450
2451         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2452                 vcpu->arch.sipi_vector = events->sipi_vector;
2453
2454         kvm_make_request(KVM_REQ_EVENT, vcpu);
2455
2456         return 0;
2457 }
2458
2459 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2460                                              struct kvm_debugregs *dbgregs)
2461 {
2462         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2463         dbgregs->dr6 = vcpu->arch.dr6;
2464         dbgregs->dr7 = vcpu->arch.dr7;
2465         dbgregs->flags = 0;
2466         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2467 }
2468
2469 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2470                                             struct kvm_debugregs *dbgregs)
2471 {
2472         if (dbgregs->flags)
2473                 return -EINVAL;
2474
2475         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2476         vcpu->arch.dr6 = dbgregs->dr6;
2477         vcpu->arch.dr7 = dbgregs->dr7;
2478
2479         return 0;
2480 }
2481
2482 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2483                                          struct kvm_xsave *guest_xsave)
2484 {
2485         if (cpu_has_xsave)
2486                 memcpy(guest_xsave->region,
2487                         &vcpu->arch.guest_fpu.state->xsave,
2488                         xstate_size);
2489         else {
2490                 memcpy(guest_xsave->region,
2491                         &vcpu->arch.guest_fpu.state->fxsave,
2492                         sizeof(struct i387_fxsave_struct));
2493                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2494                         XSTATE_FPSSE;
2495         }
2496 }
2497
2498 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2499                                         struct kvm_xsave *guest_xsave)
2500 {
2501         u64 xstate_bv =
2502                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2503
2504         if (cpu_has_xsave)
2505                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2506                         guest_xsave->region, xstate_size);
2507         else {
2508                 if (xstate_bv & ~XSTATE_FPSSE)
2509                         return -EINVAL;
2510                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2511                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2512         }
2513         return 0;
2514 }
2515
2516 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2517                                         struct kvm_xcrs *guest_xcrs)
2518 {
2519         if (!cpu_has_xsave) {
2520                 guest_xcrs->nr_xcrs = 0;
2521                 return;
2522         }
2523
2524         guest_xcrs->nr_xcrs = 1;
2525         guest_xcrs->flags = 0;
2526         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2527         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2528 }
2529
2530 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2531                                        struct kvm_xcrs *guest_xcrs)
2532 {
2533         int i, r = 0;
2534
2535         if (!cpu_has_xsave)
2536                 return -EINVAL;
2537
2538         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2539                 return -EINVAL;
2540
2541         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2542                 /* Only support XCR0 currently */
2543                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2544                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2545                                 guest_xcrs->xcrs[0].value);
2546                         break;
2547                 }
2548         if (r)
2549                 r = -EINVAL;
2550         return r;
2551 }
2552
2553 long kvm_arch_vcpu_ioctl(struct file *filp,
2554                          unsigned int ioctl, unsigned long arg)
2555 {
2556         struct kvm_vcpu *vcpu = filp->private_data;
2557         void __user *argp = (void __user *)arg;
2558         int r;
2559         union {
2560                 struct kvm_lapic_state *lapic;
2561                 struct kvm_xsave *xsave;
2562                 struct kvm_xcrs *xcrs;
2563                 void *buffer;
2564         } u;
2565
2566         u.buffer = NULL;
2567         switch (ioctl) {
2568         case KVM_GET_LAPIC: {
2569                 r = -EINVAL;
2570                 if (!vcpu->arch.apic)
2571                         goto out;
2572                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2573
2574                 r = -ENOMEM;
2575                 if (!u.lapic)
2576                         goto out;
2577                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2578                 if (r)
2579                         goto out;
2580                 r = -EFAULT;
2581                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2582                         goto out;
2583                 r = 0;
2584                 break;
2585         }
2586         case KVM_SET_LAPIC: {
2587                 r = -EINVAL;
2588                 if (!vcpu->arch.apic)
2589                         goto out;
2590                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2591                 if (IS_ERR(u.lapic)) {
2592                         r = PTR_ERR(u.lapic);
2593                         goto out;
2594                 }
2595
2596                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2597                 if (r)
2598                         goto out;
2599                 r = 0;
2600                 break;
2601         }
2602         case KVM_INTERRUPT: {
2603                 struct kvm_interrupt irq;
2604
2605                 r = -EFAULT;
2606                 if (copy_from_user(&irq, argp, sizeof irq))
2607                         goto out;
2608                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2609                 if (r)
2610                         goto out;
2611                 r = 0;
2612                 break;
2613         }
2614         case KVM_NMI: {
2615                 r = kvm_vcpu_ioctl_nmi(vcpu);
2616                 if (r)
2617                         goto out;
2618                 r = 0;
2619                 break;
2620         }
2621         case KVM_SET_CPUID: {
2622                 struct kvm_cpuid __user *cpuid_arg = argp;
2623                 struct kvm_cpuid cpuid;
2624
2625                 r = -EFAULT;
2626                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2627                         goto out;
2628                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2629                 if (r)
2630                         goto out;
2631                 break;
2632         }
2633         case KVM_SET_CPUID2: {
2634                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2635                 struct kvm_cpuid2 cpuid;
2636
2637                 r = -EFAULT;
2638                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2639                         goto out;
2640                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2641                                               cpuid_arg->entries);
2642                 if (r)
2643                         goto out;
2644                 break;
2645         }
2646         case KVM_GET_CPUID2: {
2647                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2648                 struct kvm_cpuid2 cpuid;
2649
2650                 r = -EFAULT;
2651                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2652                         goto out;
2653                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2654                                               cpuid_arg->entries);
2655                 if (r)
2656                         goto out;
2657                 r = -EFAULT;
2658                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2659                         goto out;
2660                 r = 0;
2661                 break;
2662         }
2663         case KVM_GET_MSRS:
2664                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2665                 break;
2666         case KVM_SET_MSRS:
2667                 r = msr_io(vcpu, argp, do_set_msr, 0);
2668                 break;
2669         case KVM_TPR_ACCESS_REPORTING: {
2670                 struct kvm_tpr_access_ctl tac;
2671
2672                 r = -EFAULT;
2673                 if (copy_from_user(&tac, argp, sizeof tac))
2674                         goto out;
2675                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2676                 if (r)
2677                         goto out;
2678                 r = -EFAULT;
2679                 if (copy_to_user(argp, &tac, sizeof tac))
2680                         goto out;
2681                 r = 0;
2682                 break;
2683         };
2684         case KVM_SET_VAPIC_ADDR: {
2685                 struct kvm_vapic_addr va;
2686
2687                 r = -EINVAL;
2688                 if (!irqchip_in_kernel(vcpu->kvm))
2689                         goto out;
2690                 r = -EFAULT;
2691                 if (copy_from_user(&va, argp, sizeof va))
2692                         goto out;
2693                 r = 0;
2694                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2695                 break;
2696         }
2697         case KVM_X86_SETUP_MCE: {
2698                 u64 mcg_cap;
2699
2700                 r = -EFAULT;
2701                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2702                         goto out;
2703                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2704                 break;
2705         }
2706         case KVM_X86_SET_MCE: {
2707                 struct kvm_x86_mce mce;
2708
2709                 r = -EFAULT;
2710                 if (copy_from_user(&mce, argp, sizeof mce))
2711                         goto out;
2712                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2713                 break;
2714         }
2715         case KVM_GET_VCPU_EVENTS: {
2716                 struct kvm_vcpu_events events;
2717
2718                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2719
2720                 r = -EFAULT;
2721                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2722                         break;
2723                 r = 0;
2724                 break;
2725         }
2726         case KVM_SET_VCPU_EVENTS: {
2727                 struct kvm_vcpu_events events;
2728
2729                 r = -EFAULT;
2730                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2731                         break;
2732
2733                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2734                 break;
2735         }
2736         case KVM_GET_DEBUGREGS: {
2737                 struct kvm_debugregs dbgregs;
2738
2739                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2740
2741                 r = -EFAULT;
2742                 if (copy_to_user(argp, &dbgregs,
2743                                  sizeof(struct kvm_debugregs)))
2744                         break;
2745                 r = 0;
2746                 break;
2747         }
2748         case KVM_SET_DEBUGREGS: {
2749                 struct kvm_debugregs dbgregs;
2750
2751                 r = -EFAULT;
2752                 if (copy_from_user(&dbgregs, argp,
2753                                    sizeof(struct kvm_debugregs)))
2754                         break;
2755
2756                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2757                 break;
2758         }
2759         case KVM_GET_XSAVE: {
2760                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2761                 r = -ENOMEM;
2762                 if (!u.xsave)
2763                         break;
2764
2765                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2766
2767                 r = -EFAULT;
2768                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2769                         break;
2770                 r = 0;
2771                 break;
2772         }
2773         case KVM_SET_XSAVE: {
2774                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2775                 if (IS_ERR(u.xsave)) {
2776                         r = PTR_ERR(u.xsave);
2777                         goto out;
2778                 }
2779
2780                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2781                 break;
2782         }
2783         case KVM_GET_XCRS: {
2784                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2785                 r = -ENOMEM;
2786                 if (!u.xcrs)
2787                         break;
2788
2789                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2790
2791                 r = -EFAULT;
2792                 if (copy_to_user(argp, u.xcrs,
2793                                  sizeof(struct kvm_xcrs)))
2794                         break;
2795                 r = 0;
2796                 break;
2797         }
2798         case KVM_SET_XCRS: {
2799                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2800                 if (IS_ERR(u.xcrs)) {
2801                         r = PTR_ERR(u.xcrs);
2802                         goto out;
2803                 }
2804
2805                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2806                 break;
2807         }
2808         case KVM_SET_TSC_KHZ: {
2809                 u32 user_tsc_khz;
2810
2811                 r = -EINVAL;
2812                 user_tsc_khz = (u32)arg;
2813
2814                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2815                         goto out;
2816
2817                 if (user_tsc_khz == 0)
2818                         user_tsc_khz = tsc_khz;
2819
2820                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2821
2822                 r = 0;
2823                 goto out;
2824         }
2825         case KVM_GET_TSC_KHZ: {
2826                 r = vcpu->arch.virtual_tsc_khz;
2827                 goto out;
2828         }
2829         default:
2830                 r = -EINVAL;
2831         }
2832 out:
2833         kfree(u.buffer);
2834         return r;
2835 }
2836
2837 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2838 {
2839         return VM_FAULT_SIGBUS;
2840 }
2841
2842 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2843 {
2844         int ret;
2845
2846         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2847                 return -1;
2848         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2849         return ret;
2850 }
2851
2852 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2853                                               u64 ident_addr)
2854 {
2855         kvm->arch.ept_identity_map_addr = ident_addr;
2856         return 0;
2857 }
2858
2859 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2860                                           u32 kvm_nr_mmu_pages)
2861 {
2862         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2863                 return -EINVAL;
2864
2865         mutex_lock(&kvm->slots_lock);
2866         spin_lock(&kvm->mmu_lock);
2867
2868         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2869         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2870
2871         spin_unlock(&kvm->mmu_lock);
2872         mutex_unlock(&kvm->slots_lock);
2873         return 0;
2874 }
2875
2876 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2877 {
2878         return kvm->arch.n_max_mmu_pages;
2879 }
2880
2881 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2882 {
2883         int r;
2884
2885         r = 0;
2886         switch (chip->chip_id) {
2887         case KVM_IRQCHIP_PIC_MASTER:
2888                 memcpy(&chip->chip.pic,
2889                         &pic_irqchip(kvm)->pics[0],
2890                         sizeof(struct kvm_pic_state));
2891                 break;
2892         case KVM_IRQCHIP_PIC_SLAVE:
2893                 memcpy(&chip->chip.pic,
2894                         &pic_irqchip(kvm)->pics[1],
2895                         sizeof(struct kvm_pic_state));
2896                 break;
2897         case KVM_IRQCHIP_IOAPIC:
2898                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2899                 break;
2900         default:
2901                 r = -EINVAL;
2902                 break;
2903         }
2904         return r;
2905 }
2906
2907 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2908 {
2909         int r;
2910
2911         r = 0;
2912         switch (chip->chip_id) {
2913         case KVM_IRQCHIP_PIC_MASTER:
2914                 spin_lock(&pic_irqchip(kvm)->lock);
2915                 memcpy(&pic_irqchip(kvm)->pics[0],
2916                         &chip->chip.pic,
2917                         sizeof(struct kvm_pic_state));
2918                 spin_unlock(&pic_irqchip(kvm)->lock);
2919                 break;
2920         case KVM_IRQCHIP_PIC_SLAVE:
2921                 spin_lock(&pic_irqchip(kvm)->lock);
2922                 memcpy(&pic_irqchip(kvm)->pics[1],
2923                         &chip->chip.pic,
2924                         sizeof(struct kvm_pic_state));
2925                 spin_unlock(&pic_irqchip(kvm)->lock);
2926                 break;
2927         case KVM_IRQCHIP_IOAPIC:
2928                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2929                 break;
2930         default:
2931                 r = -EINVAL;
2932                 break;
2933         }
2934         kvm_pic_update_irq(pic_irqchip(kvm));
2935         return r;
2936 }
2937
2938 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2939 {
2940         int r = 0;
2941
2942         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2943         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2944         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2945         return r;
2946 }
2947
2948 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2949 {
2950         int r = 0;
2951
2952         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2953         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2954         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2955         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2956         return r;
2957 }
2958
2959 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2960 {
2961         int r = 0;
2962
2963         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2964         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2965                 sizeof(ps->channels));
2966         ps->flags = kvm->arch.vpit->pit_state.flags;
2967         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2968         memset(&ps->reserved, 0, sizeof(ps->reserved));
2969         return r;
2970 }
2971
2972 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2973 {
2974         int r = 0, start = 0;
2975         u32 prev_legacy, cur_legacy;
2976         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2977         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2978         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2979         if (!prev_legacy && cur_legacy)
2980                 start = 1;
2981         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2982                sizeof(kvm->arch.vpit->pit_state.channels));
2983         kvm->arch.vpit->pit_state.flags = ps->flags;
2984         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2985         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2986         return r;
2987 }
2988
2989 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2990                                  struct kvm_reinject_control *control)
2991 {
2992         if (!kvm->arch.vpit)
2993                 return -ENXIO;
2994         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2995         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2996         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2997         return 0;
2998 }
2999
3000 /**
3001  * write_protect_slot - write protect a slot for dirty logging
3002  * @kvm: the kvm instance
3003  * @memslot: the slot we protect
3004  * @dirty_bitmap: the bitmap indicating which pages are dirty
3005  * @nr_dirty_pages: the number of dirty pages
3006  *
3007  * We have two ways to find all sptes to protect:
3008  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3009  *    checks ones that have a spte mapping a page in the slot.
3010  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3011  *
3012  * Generally speaking, if there are not so many dirty pages compared to the
3013  * number of shadow pages, we should use the latter.
3014  *
3015  * Note that letting others write into a page marked dirty in the old bitmap
3016  * by using the remaining tlb entry is not a problem.  That page will become
3017  * write protected again when we flush the tlb and then be reported dirty to
3018  * the user space by copying the old bitmap.
3019  */
3020 static void write_protect_slot(struct kvm *kvm,
3021                                struct kvm_memory_slot *memslot,
3022                                unsigned long *dirty_bitmap,
3023                                unsigned long nr_dirty_pages)
3024 {
3025         /* Not many dirty pages compared to # of shadow pages. */
3026         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3027                 unsigned long gfn_offset;
3028
3029                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3030                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3031
3032                         spin_lock(&kvm->mmu_lock);
3033                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3034                         spin_unlock(&kvm->mmu_lock);
3035                 }
3036                 kvm_flush_remote_tlbs(kvm);
3037         } else {
3038                 spin_lock(&kvm->mmu_lock);
3039                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3040                 spin_unlock(&kvm->mmu_lock);
3041         }
3042 }
3043
3044 /*
3045  * Get (and clear) the dirty memory log for a memory slot.
3046  */
3047 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3048                                       struct kvm_dirty_log *log)
3049 {
3050         int r;
3051         struct kvm_memory_slot *memslot;
3052         unsigned long n, nr_dirty_pages;
3053
3054         mutex_lock(&kvm->slots_lock);
3055
3056         r = -EINVAL;
3057         if (log->slot >= KVM_MEMORY_SLOTS)
3058                 goto out;
3059
3060         memslot = id_to_memslot(kvm->memslots, log->slot);
3061         r = -ENOENT;
3062         if (!memslot->dirty_bitmap)
3063                 goto out;
3064
3065         n = kvm_dirty_bitmap_bytes(memslot);
3066         nr_dirty_pages = memslot->nr_dirty_pages;
3067
3068         /* If nothing is dirty, don't bother messing with page tables. */
3069         if (nr_dirty_pages) {
3070                 struct kvm_memslots *slots, *old_slots;
3071                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3072
3073                 dirty_bitmap = memslot->dirty_bitmap;
3074                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3075                 if (dirty_bitmap == dirty_bitmap_head)
3076                         dirty_bitmap_head += n / sizeof(long);
3077                 memset(dirty_bitmap_head, 0, n);
3078
3079                 r = -ENOMEM;
3080                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3081                 if (!slots)
3082                         goto out;
3083
3084                 memslot = id_to_memslot(slots, log->slot);
3085                 memslot->nr_dirty_pages = 0;
3086                 memslot->dirty_bitmap = dirty_bitmap_head;
3087                 update_memslots(slots, NULL);
3088
3089                 old_slots = kvm->memslots;
3090                 rcu_assign_pointer(kvm->memslots, slots);
3091                 synchronize_srcu_expedited(&kvm->srcu);
3092                 kfree(old_slots);
3093
3094                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3095
3096                 r = -EFAULT;
3097                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3098                         goto out;
3099         } else {
3100                 r = -EFAULT;
3101                 if (clear_user(log->dirty_bitmap, n))
3102                         goto out;
3103         }
3104
3105         r = 0;
3106 out:
3107         mutex_unlock(&kvm->slots_lock);
3108         return r;
3109 }
3110
3111 long kvm_arch_vm_ioctl(struct file *filp,
3112                        unsigned int ioctl, unsigned long arg)
3113 {
3114         struct kvm *kvm = filp->private_data;
3115         void __user *argp = (void __user *)arg;
3116         int r = -ENOTTY;
3117         /*
3118          * This union makes it completely explicit to gcc-3.x
3119          * that these two variables' stack usage should be
3120          * combined, not added together.
3121          */
3122         union {
3123                 struct kvm_pit_state ps;
3124                 struct kvm_pit_state2 ps2;
3125                 struct kvm_pit_config pit_config;
3126         } u;
3127
3128         switch (ioctl) {
3129         case KVM_SET_TSS_ADDR:
3130                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3131                 if (r < 0)
3132                         goto out;
3133                 break;
3134         case KVM_SET_IDENTITY_MAP_ADDR: {
3135                 u64 ident_addr;
3136
3137                 r = -EFAULT;
3138                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3139                         goto out;
3140                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3141                 if (r < 0)
3142                         goto out;
3143                 break;
3144         }
3145         case KVM_SET_NR_MMU_PAGES:
3146                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3147                 if (r)
3148                         goto out;
3149                 break;
3150         case KVM_GET_NR_MMU_PAGES:
3151                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3152                 break;
3153         case KVM_CREATE_IRQCHIP: {
3154                 struct kvm_pic *vpic;
3155
3156                 mutex_lock(&kvm->lock);
3157                 r = -EEXIST;
3158                 if (kvm->arch.vpic)
3159                         goto create_irqchip_unlock;
3160                 r = -ENOMEM;
3161                 vpic = kvm_create_pic(kvm);
3162                 if (vpic) {
3163                         r = kvm_ioapic_init(kvm);
3164                         if (r) {
3165                                 mutex_lock(&kvm->slots_lock);
3166                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3167                                                           &vpic->dev_master);
3168                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3169                                                           &vpic->dev_slave);
3170                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3171                                                           &vpic->dev_eclr);
3172                                 mutex_unlock(&kvm->slots_lock);
3173                                 kfree(vpic);
3174                                 goto create_irqchip_unlock;
3175                         }
3176                 } else
3177                         goto create_irqchip_unlock;
3178                 smp_wmb();
3179                 kvm->arch.vpic = vpic;
3180                 smp_wmb();
3181                 r = kvm_setup_default_irq_routing(kvm);
3182                 if (r) {
3183                         mutex_lock(&kvm->slots_lock);
3184                         mutex_lock(&kvm->irq_lock);
3185                         kvm_ioapic_destroy(kvm);
3186                         kvm_destroy_pic(kvm);
3187                         mutex_unlock(&kvm->irq_lock);
3188                         mutex_unlock(&kvm->slots_lock);
3189                 }
3190         create_irqchip_unlock:
3191                 mutex_unlock(&kvm->lock);
3192                 break;
3193         }
3194         case KVM_CREATE_PIT:
3195                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3196                 goto create_pit;
3197         case KVM_CREATE_PIT2:
3198                 r = -EFAULT;
3199                 if (copy_from_user(&u.pit_config, argp,
3200                                    sizeof(struct kvm_pit_config)))
3201                         goto out;
3202         create_pit:
3203                 mutex_lock(&kvm->slots_lock);
3204                 r = -EEXIST;
3205                 if (kvm->arch.vpit)
3206                         goto create_pit_unlock;
3207                 r = -ENOMEM;
3208                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3209                 if (kvm->arch.vpit)
3210                         r = 0;
3211         create_pit_unlock:
3212                 mutex_unlock(&kvm->slots_lock);
3213                 break;
3214         case KVM_IRQ_LINE_STATUS:
3215         case KVM_IRQ_LINE: {
3216                 struct kvm_irq_level irq_event;
3217
3218                 r = -EFAULT;
3219                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3220                         goto out;
3221                 r = -ENXIO;
3222                 if (irqchip_in_kernel(kvm)) {
3223                         __s32 status;
3224                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3225                                         irq_event.irq, irq_event.level);
3226                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3227                                 r = -EFAULT;
3228                                 irq_event.status = status;
3229                                 if (copy_to_user(argp, &irq_event,
3230                                                         sizeof irq_event))
3231                                         goto out;
3232                         }
3233                         r = 0;
3234                 }
3235                 break;
3236         }
3237         case KVM_GET_IRQCHIP: {
3238                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3239                 struct kvm_irqchip *chip;
3240
3241                 chip = memdup_user(argp, sizeof(*chip));
3242                 if (IS_ERR(chip)) {
3243                         r = PTR_ERR(chip);
3244                         goto out;
3245                 }
3246
3247                 r = -ENXIO;
3248                 if (!irqchip_in_kernel(kvm))
3249                         goto get_irqchip_out;
3250                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3251                 if (r)
3252                         goto get_irqchip_out;
3253                 r = -EFAULT;
3254                 if (copy_to_user(argp, chip, sizeof *chip))
3255                         goto get_irqchip_out;
3256                 r = 0;
3257         get_irqchip_out:
3258                 kfree(chip);
3259                 if (r)
3260                         goto out;
3261                 break;
3262         }
3263         case KVM_SET_IRQCHIP: {
3264                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3265                 struct kvm_irqchip *chip;
3266
3267                 chip = memdup_user(argp, sizeof(*chip));
3268                 if (IS_ERR(chip)) {
3269                         r = PTR_ERR(chip);
3270                         goto out;
3271                 }
3272
3273                 r = -ENXIO;
3274                 if (!irqchip_in_kernel(kvm))
3275                         goto set_irqchip_out;
3276                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3277                 if (r)
3278                         goto set_irqchip_out;
3279                 r = 0;
3280         set_irqchip_out:
3281                 kfree(chip);
3282                 if (r)
3283                         goto out;
3284                 break;
3285         }
3286         case KVM_GET_PIT: {
3287                 r = -EFAULT;
3288                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3289                         goto out;
3290                 r = -ENXIO;
3291                 if (!kvm->arch.vpit)
3292                         goto out;
3293                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3294                 if (r)
3295                         goto out;
3296                 r = -EFAULT;
3297                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3298                         goto out;
3299                 r = 0;
3300                 break;
3301         }
3302         case KVM_SET_PIT: {
3303                 r = -EFAULT;
3304                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3305                         goto out;
3306                 r = -ENXIO;
3307                 if (!kvm->arch.vpit)
3308                         goto out;
3309                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3310                 if (r)
3311                         goto out;
3312                 r = 0;
3313                 break;
3314         }
3315         case KVM_GET_PIT2: {
3316                 r = -ENXIO;
3317                 if (!kvm->arch.vpit)
3318                         goto out;
3319                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3320                 if (r)
3321                         goto out;
3322                 r = -EFAULT;
3323                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3324                         goto out;
3325                 r = 0;
3326                 break;
3327         }
3328         case KVM_SET_PIT2: {
3329                 r = -EFAULT;
3330                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3331                         goto out;
3332                 r = -ENXIO;
3333                 if (!kvm->arch.vpit)
3334                         goto out;
3335                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3336                 if (r)
3337                         goto out;
3338                 r = 0;
3339                 break;
3340         }
3341         case KVM_REINJECT_CONTROL: {
3342                 struct kvm_reinject_control control;
3343                 r =  -EFAULT;
3344                 if (copy_from_user(&control, argp, sizeof(control)))
3345                         goto out;
3346                 r = kvm_vm_ioctl_reinject(kvm, &control);
3347                 if (r)
3348                         goto out;
3349                 r = 0;
3350                 break;
3351         }
3352         case KVM_XEN_HVM_CONFIG: {
3353                 r = -EFAULT;
3354                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3355                                    sizeof(struct kvm_xen_hvm_config)))
3356                         goto out;
3357                 r = -EINVAL;
3358                 if (kvm->arch.xen_hvm_config.flags)
3359                         goto out;
3360                 r = 0;
3361                 break;
3362         }
3363         case KVM_SET_CLOCK: {
3364                 struct kvm_clock_data user_ns;
3365                 u64 now_ns;
3366                 s64 delta;
3367
3368                 r = -EFAULT;
3369                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3370                         goto out;
3371
3372                 r = -EINVAL;
3373                 if (user_ns.flags)
3374                         goto out;
3375
3376                 r = 0;
3377                 local_irq_disable();
3378                 now_ns = get_kernel_ns();
3379                 delta = user_ns.clock - now_ns;
3380                 local_irq_enable();
3381                 kvm->arch.kvmclock_offset = delta;
3382                 break;
3383         }
3384         case KVM_GET_CLOCK: {
3385                 struct kvm_clock_data user_ns;
3386                 u64 now_ns;
3387
3388                 local_irq_disable();
3389                 now_ns = get_kernel_ns();
3390                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3391                 local_irq_enable();
3392                 user_ns.flags = 0;
3393                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3394
3395                 r = -EFAULT;
3396                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3397                         goto out;
3398                 r = 0;
3399                 break;
3400         }
3401
3402         default:
3403                 ;
3404         }
3405 out:
3406         return r;
3407 }
3408
3409 static void kvm_init_msr_list(void)
3410 {
3411         u32 dummy[2];
3412         unsigned i, j;
3413
3414         /* skip the first msrs in the list. KVM-specific */
3415         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3416                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3417                         continue;
3418                 if (j < i)
3419                         msrs_to_save[j] = msrs_to_save[i];
3420                 j++;
3421         }
3422         num_msrs_to_save = j;
3423 }
3424
3425 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3426                            const void *v)
3427 {
3428         int handled = 0;
3429         int n;
3430
3431         do {
3432                 n = min(len, 8);
3433                 if (!(vcpu->arch.apic &&
3434                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3435                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3436                         break;
3437                 handled += n;
3438                 addr += n;
3439                 len -= n;
3440                 v += n;
3441         } while (len);
3442
3443         return handled;
3444 }
3445
3446 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3447 {
3448         int handled = 0;
3449         int n;
3450
3451         do {
3452                 n = min(len, 8);
3453                 if (!(vcpu->arch.apic &&
3454                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3455                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3456                         break;
3457                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3458                 handled += n;
3459                 addr += n;
3460                 len -= n;
3461                 v += n;
3462         } while (len);
3463
3464         return handled;
3465 }
3466
3467 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3468                         struct kvm_segment *var, int seg)
3469 {
3470         kvm_x86_ops->set_segment(vcpu, var, seg);
3471 }
3472
3473 void kvm_get_segment(struct kvm_vcpu *vcpu,
3474                      struct kvm_segment *var, int seg)
3475 {
3476         kvm_x86_ops->get_segment(vcpu, var, seg);
3477 }
3478
3479 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3480 {
3481         gpa_t t_gpa;
3482         struct x86_exception exception;
3483
3484         BUG_ON(!mmu_is_nested(vcpu));
3485
3486         /* NPT walks are always user-walks */
3487         access |= PFERR_USER_MASK;
3488         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3489
3490         return t_gpa;
3491 }
3492
3493 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3494                               struct x86_exception *exception)
3495 {
3496         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3497         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3498 }
3499
3500  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3501                                 struct x86_exception *exception)
3502 {
3503         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3504         access |= PFERR_FETCH_MASK;
3505         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3506 }
3507
3508 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3509                                struct x86_exception *exception)
3510 {
3511         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3512         access |= PFERR_WRITE_MASK;
3513         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3514 }
3515
3516 /* uses this to access any guest's mapped memory without checking CPL */
3517 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3518                                 struct x86_exception *exception)
3519 {
3520         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3521 }
3522
3523 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3524                                       struct kvm_vcpu *vcpu, u32 access,
3525                                       struct x86_exception *exception)
3526 {
3527         void *data = val;
3528         int r = X86EMUL_CONTINUE;
3529
3530         while (bytes) {
3531                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3532                                                             exception);
3533                 unsigned offset = addr & (PAGE_SIZE-1);
3534                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3535                 int ret;
3536
3537                 if (gpa == UNMAPPED_GVA)
3538                         return X86EMUL_PROPAGATE_FAULT;
3539                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3540                 if (ret < 0) {
3541                         r = X86EMUL_IO_NEEDED;
3542                         goto out;
3543                 }
3544
3545                 bytes -= toread;
3546                 data += toread;
3547                 addr += toread;
3548         }
3549 out:
3550         return r;
3551 }
3552
3553 /* used for instruction fetching */
3554 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3555                                 gva_t addr, void *val, unsigned int bytes,
3556                                 struct x86_exception *exception)
3557 {
3558         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3559         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3560
3561         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3562                                           access | PFERR_FETCH_MASK,
3563                                           exception);
3564 }
3565
3566 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3567                                gva_t addr, void *val, unsigned int bytes,
3568                                struct x86_exception *exception)
3569 {
3570         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3571         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3572
3573         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3574                                           exception);
3575 }
3576 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3577
3578 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3579                                       gva_t addr, void *val, unsigned int bytes,
3580                                       struct x86_exception *exception)
3581 {
3582         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3583         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3584 }
3585
3586 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3587                                        gva_t addr, void *val,
3588                                        unsigned int bytes,
3589                                        struct x86_exception *exception)
3590 {
3591         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3592         void *data = val;
3593         int r = X86EMUL_CONTINUE;
3594
3595         while (bytes) {
3596                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3597                                                              PFERR_WRITE_MASK,
3598                                                              exception);
3599                 unsigned offset = addr & (PAGE_SIZE-1);
3600                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3601                 int ret;
3602
3603                 if (gpa == UNMAPPED_GVA)
3604                         return X86EMUL_PROPAGATE_FAULT;
3605                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3606                 if (ret < 0) {
3607                         r = X86EMUL_IO_NEEDED;
3608                         goto out;
3609                 }
3610
3611                 bytes -= towrite;
3612                 data += towrite;
3613                 addr += towrite;
3614         }
3615 out:
3616         return r;
3617 }
3618 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3619
3620 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3621                                 gpa_t *gpa, struct x86_exception *exception,
3622                                 bool write)
3623 {
3624         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3625
3626         if (vcpu_match_mmio_gva(vcpu, gva) &&
3627                   check_write_user_access(vcpu, write, access,
3628                   vcpu->arch.access)) {
3629                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3630                                         (gva & (PAGE_SIZE - 1));
3631                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3632                 return 1;
3633         }
3634
3635         if (write)
3636                 access |= PFERR_WRITE_MASK;
3637
3638         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3639
3640         if (*gpa == UNMAPPED_GVA)
3641                 return -1;
3642
3643         /* For APIC access vmexit */
3644         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3645                 return 1;
3646
3647         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3648                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3649                 return 1;
3650         }
3651
3652         return 0;
3653 }
3654
3655 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3656                         const void *val, int bytes)
3657 {
3658         int ret;
3659
3660         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3661         if (ret < 0)
3662                 return 0;
3663         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3664         return 1;
3665 }
3666
3667 struct read_write_emulator_ops {
3668         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3669                                   int bytes);
3670         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3671                                   void *val, int bytes);
3672         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3673                                int bytes, void *val);
3674         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3675                                     void *val, int bytes);
3676         bool write;
3677 };
3678
3679 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3680 {
3681         if (vcpu->mmio_read_completed) {
3682                 memcpy(val, vcpu->mmio_data, bytes);
3683                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3684                                vcpu->mmio_phys_addr, *(u64 *)val);
3685                 vcpu->mmio_read_completed = 0;
3686                 return 1;
3687         }
3688
3689         return 0;
3690 }
3691
3692 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3693                         void *val, int bytes)
3694 {
3695         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3696 }
3697
3698 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3699                          void *val, int bytes)
3700 {
3701         return emulator_write_phys(vcpu, gpa, val, bytes);
3702 }
3703
3704 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3705 {
3706         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3707         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3708 }
3709
3710 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3711                           void *val, int bytes)
3712 {
3713         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3714         return X86EMUL_IO_NEEDED;
3715 }
3716
3717 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3718                            void *val, int bytes)
3719 {
3720         memcpy(vcpu->mmio_data, val, bytes);
3721         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3722         return X86EMUL_CONTINUE;
3723 }
3724
3725 static struct read_write_emulator_ops read_emultor = {
3726         .read_write_prepare = read_prepare,
3727         .read_write_emulate = read_emulate,
3728         .read_write_mmio = vcpu_mmio_read,
3729         .read_write_exit_mmio = read_exit_mmio,
3730 };
3731
3732 static struct read_write_emulator_ops write_emultor = {
3733         .read_write_emulate = write_emulate,
3734         .read_write_mmio = write_mmio,
3735         .read_write_exit_mmio = write_exit_mmio,
3736         .write = true,
3737 };
3738
3739 static int emulator_read_write_onepage(unsigned long addr, void *val,
3740                                        unsigned int bytes,
3741                                        struct x86_exception *exception,
3742                                        struct kvm_vcpu *vcpu,
3743                                        struct read_write_emulator_ops *ops)
3744 {
3745         gpa_t gpa;
3746         int handled, ret;
3747         bool write = ops->write;
3748
3749         if (ops->read_write_prepare &&
3750                   ops->read_write_prepare(vcpu, val, bytes))
3751                 return X86EMUL_CONTINUE;
3752
3753         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3754
3755         if (ret < 0)
3756                 return X86EMUL_PROPAGATE_FAULT;
3757
3758         /* For APIC access vmexit */
3759         if (ret)
3760                 goto mmio;
3761
3762         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3763                 return X86EMUL_CONTINUE;
3764
3765 mmio:
3766         /*
3767          * Is this MMIO handled locally?
3768          */
3769         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3770         if (handled == bytes)
3771                 return X86EMUL_CONTINUE;
3772
3773         gpa += handled;
3774         bytes -= handled;
3775         val += handled;
3776
3777         vcpu->mmio_needed = 1;
3778         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3779         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3780         vcpu->mmio_size = bytes;
3781         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3782         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3783         vcpu->mmio_index = 0;
3784
3785         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3786 }
3787
3788 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3789                         void *val, unsigned int bytes,
3790                         struct x86_exception *exception,
3791                         struct read_write_emulator_ops *ops)
3792 {
3793         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3794
3795         /* Crossing a page boundary? */
3796         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3797                 int rc, now;
3798
3799                 now = -addr & ~PAGE_MASK;
3800                 rc = emulator_read_write_onepage(addr, val, now, exception,
3801                                                  vcpu, ops);
3802
3803                 if (rc != X86EMUL_CONTINUE)
3804                         return rc;
3805                 addr += now;
3806                 val += now;
3807                 bytes -= now;
3808         }
3809
3810         return emulator_read_write_onepage(addr, val, bytes, exception,
3811                                            vcpu, ops);
3812 }
3813
3814 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3815                                   unsigned long addr,
3816                                   void *val,
3817                                   unsigned int bytes,
3818                                   struct x86_exception *exception)
3819 {
3820         return emulator_read_write(ctxt, addr, val, bytes,
3821                                    exception, &read_emultor);
3822 }
3823
3824 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3825                             unsigned long addr,
3826                             const void *val,
3827                             unsigned int bytes,
3828                             struct x86_exception *exception)
3829 {
3830         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3831                                    exception, &write_emultor);
3832 }
3833
3834 #define CMPXCHG_TYPE(t, ptr, old, new) \
3835         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3836
3837 #ifdef CONFIG_X86_64
3838 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3839 #else
3840 #  define CMPXCHG64(ptr, old, new) \
3841         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3842 #endif
3843
3844 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3845                                      unsigned long addr,
3846                                      const void *old,
3847                                      const void *new,
3848                                      unsigned int bytes,
3849                                      struct x86_exception *exception)
3850 {
3851         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3852         gpa_t gpa;
3853         struct page *page;
3854         char *kaddr;
3855         bool exchanged;
3856
3857         /* guests cmpxchg8b have to be emulated atomically */
3858         if (bytes > 8 || (bytes & (bytes - 1)))
3859                 goto emul_write;
3860
3861         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3862
3863         if (gpa == UNMAPPED_GVA ||
3864             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3865                 goto emul_write;
3866
3867         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3868                 goto emul_write;
3869
3870         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3871         if (is_error_page(page)) {
3872                 kvm_release_page_clean(page);
3873                 goto emul_write;
3874         }
3875
3876         kaddr = kmap_atomic(page, KM_USER0);
3877         kaddr += offset_in_page(gpa);
3878         switch (bytes) {
3879         case 1:
3880                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3881                 break;
3882         case 2:
3883                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3884                 break;
3885         case 4:
3886                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3887                 break;
3888         case 8:
3889                 exchanged = CMPXCHG64(kaddr, old, new);
3890                 break;
3891         default:
3892                 BUG();
3893         }
3894         kunmap_atomic(kaddr, KM_USER0);
3895         kvm_release_page_dirty(page);
3896
3897         if (!exchanged)
3898                 return X86EMUL_CMPXCHG_FAILED;
3899
3900         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3901
3902         return X86EMUL_CONTINUE;
3903
3904 emul_write:
3905         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3906
3907         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3908 }
3909
3910 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3911 {
3912         /* TODO: String I/O for in kernel device */
3913         int r;
3914
3915         if (vcpu->arch.pio.in)
3916                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3917                                     vcpu->arch.pio.size, pd);
3918         else
3919                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3920                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3921                                      pd);
3922         return r;
3923 }
3924
3925 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3926                                unsigned short port, void *val,
3927                                unsigned int count, bool in)
3928 {
3929         trace_kvm_pio(!in, port, size, count);
3930
3931         vcpu->arch.pio.port = port;
3932         vcpu->arch.pio.in = in;
3933         vcpu->arch.pio.count  = count;
3934         vcpu->arch.pio.size = size;
3935
3936         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3937                 vcpu->arch.pio.count = 0;
3938                 return 1;
3939         }
3940
3941         vcpu->run->exit_reason = KVM_EXIT_IO;
3942         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3943         vcpu->run->io.size = size;
3944         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3945         vcpu->run->io.count = count;
3946         vcpu->run->io.port = port;
3947
3948         return 0;
3949 }
3950
3951 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3952                                     int size, unsigned short port, void *val,
3953                                     unsigned int count)
3954 {
3955         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3956         int ret;
3957
3958         if (vcpu->arch.pio.count)
3959                 goto data_avail;
3960
3961         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3962         if (ret) {
3963 data_avail:
3964                 memcpy(val, vcpu->arch.pio_data, size * count);
3965                 vcpu->arch.pio.count = 0;
3966                 return 1;
3967         }
3968
3969         return 0;
3970 }
3971
3972 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3973                                      int size, unsigned short port,
3974                                      const void *val, unsigned int count)
3975 {
3976         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3977
3978         memcpy(vcpu->arch.pio_data, val, size * count);
3979         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3980 }
3981
3982 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3983 {
3984         return kvm_x86_ops->get_segment_base(vcpu, seg);
3985 }
3986
3987 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3988 {
3989         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3990 }
3991
3992 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3993 {
3994         if (!need_emulate_wbinvd(vcpu))
3995                 return X86EMUL_CONTINUE;
3996
3997         if (kvm_x86_ops->has_wbinvd_exit()) {
3998                 int cpu = get_cpu();
3999
4000                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4001                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4002                                 wbinvd_ipi, NULL, 1);
4003                 put_cpu();
4004                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4005         } else
4006                 wbinvd();
4007         return X86EMUL_CONTINUE;
4008 }
4009 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4010
4011 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4012 {
4013         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4014 }
4015
4016 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4017 {
4018         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4019 }
4020
4021 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4022 {
4023
4024         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4025 }
4026
4027 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4028 {
4029         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4030 }
4031
4032 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4033 {
4034         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4035         unsigned long value;
4036
4037         switch (cr) {
4038         case 0:
4039                 value = kvm_read_cr0(vcpu);
4040                 break;
4041         case 2:
4042                 value = vcpu->arch.cr2;
4043                 break;
4044         case 3:
4045                 value = kvm_read_cr3(vcpu);
4046                 break;
4047         case 4:
4048                 value = kvm_read_cr4(vcpu);
4049                 break;
4050         case 8:
4051                 value = kvm_get_cr8(vcpu);
4052                 break;
4053         default:
4054                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4055                 return 0;
4056         }
4057
4058         return value;
4059 }
4060
4061 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4062 {
4063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4064         int res = 0;
4065
4066         switch (cr) {
4067         case 0:
4068                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4069                 break;
4070         case 2:
4071                 vcpu->arch.cr2 = val;
4072                 break;
4073         case 3:
4074                 res = kvm_set_cr3(vcpu, val);
4075                 break;
4076         case 4:
4077                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4078                 break;
4079         case 8:
4080                 res = kvm_set_cr8(vcpu, val);
4081                 break;
4082         default:
4083                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4084                 res = -1;
4085         }
4086
4087         return res;
4088 }
4089
4090 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4091 {
4092         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4093 }
4094
4095 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4096 {
4097         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4098 }
4099
4100 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4101 {
4102         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4103 }
4104
4105 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4106 {
4107         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4108 }
4109
4110 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4111 {
4112         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4113 }
4114
4115 static unsigned long emulator_get_cached_segment_base(
4116         struct x86_emulate_ctxt *ctxt, int seg)
4117 {
4118         return get_segment_base(emul_to_vcpu(ctxt), seg);
4119 }
4120
4121 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4122                                  struct desc_struct *desc, u32 *base3,
4123                                  int seg)
4124 {
4125         struct kvm_segment var;
4126
4127         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4128         *selector = var.selector;
4129
4130         if (var.unusable)
4131                 return false;
4132
4133         if (var.g)
4134                 var.limit >>= 12;
4135         set_desc_limit(desc, var.limit);
4136         set_desc_base(desc, (unsigned long)var.base);
4137 #ifdef CONFIG_X86_64
4138         if (base3)
4139                 *base3 = var.base >> 32;
4140 #endif
4141         desc->type = var.type;
4142         desc->s = var.s;
4143         desc->dpl = var.dpl;
4144         desc->p = var.present;
4145         desc->avl = var.avl;
4146         desc->l = var.l;
4147         desc->d = var.db;
4148         desc->g = var.g;
4149
4150         return true;
4151 }
4152
4153 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4154                                  struct desc_struct *desc, u32 base3,
4155                                  int seg)
4156 {
4157         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4158         struct kvm_segment var;
4159
4160         var.selector = selector;
4161         var.base = get_desc_base(desc);
4162 #ifdef CONFIG_X86_64
4163         var.base |= ((u64)base3) << 32;
4164 #endif
4165         var.limit = get_desc_limit(desc);
4166         if (desc->g)
4167                 var.limit = (var.limit << 12) | 0xfff;
4168         var.type = desc->type;
4169         var.present = desc->p;
4170         var.dpl = desc->dpl;
4171         var.db = desc->d;
4172         var.s = desc->s;
4173         var.l = desc->l;
4174         var.g = desc->g;
4175         var.avl = desc->avl;
4176         var.present = desc->p;
4177         var.unusable = !var.present;
4178         var.padding = 0;
4179
4180         kvm_set_segment(vcpu, &var, seg);
4181         return;
4182 }
4183
4184 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4185                             u32 msr_index, u64 *pdata)
4186 {
4187         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4188 }
4189
4190 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4191                             u32 msr_index, u64 data)
4192 {
4193         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4194 }
4195
4196 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4197                              u32 pmc, u64 *pdata)
4198 {
4199         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4200 }
4201
4202 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4203 {
4204         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4205 }
4206
4207 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4208 {
4209         preempt_disable();
4210         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4211         /*
4212          * CR0.TS may reference the host fpu state, not the guest fpu state,
4213          * so it may be clear at this point.
4214          */
4215         clts();
4216 }
4217
4218 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4219 {
4220         preempt_enable();
4221 }
4222
4223 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4224                               struct x86_instruction_info *info,
4225                               enum x86_intercept_stage stage)
4226 {
4227         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4228 }
4229
4230 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4231                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4232 {
4233         struct kvm_cpuid_entry2 *cpuid = NULL;
4234
4235         if (eax && ecx)
4236                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4237                                             *eax, *ecx);
4238
4239         if (cpuid) {
4240                 *eax = cpuid->eax;
4241                 *ecx = cpuid->ecx;
4242                 if (ebx)
4243                         *ebx = cpuid->ebx;
4244                 if (edx)
4245                         *edx = cpuid->edx;
4246                 return true;
4247         }
4248
4249         return false;
4250 }
4251
4252 static struct x86_emulate_ops emulate_ops = {
4253         .read_std            = kvm_read_guest_virt_system,
4254         .write_std           = kvm_write_guest_virt_system,
4255         .fetch               = kvm_fetch_guest_virt,
4256         .read_emulated       = emulator_read_emulated,
4257         .write_emulated      = emulator_write_emulated,
4258         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4259         .invlpg              = emulator_invlpg,
4260         .pio_in_emulated     = emulator_pio_in_emulated,
4261         .pio_out_emulated    = emulator_pio_out_emulated,
4262         .get_segment         = emulator_get_segment,
4263         .set_segment         = emulator_set_segment,
4264         .get_cached_segment_base = emulator_get_cached_segment_base,
4265         .get_gdt             = emulator_get_gdt,
4266         .get_idt             = emulator_get_idt,
4267         .set_gdt             = emulator_set_gdt,
4268         .set_idt             = emulator_set_idt,
4269         .get_cr              = emulator_get_cr,
4270         .set_cr              = emulator_set_cr,
4271         .cpl                 = emulator_get_cpl,
4272         .get_dr              = emulator_get_dr,
4273         .set_dr              = emulator_set_dr,
4274         .set_msr             = emulator_set_msr,
4275         .get_msr             = emulator_get_msr,
4276         .read_pmc            = emulator_read_pmc,
4277         .halt                = emulator_halt,
4278         .wbinvd              = emulator_wbinvd,
4279         .fix_hypercall       = emulator_fix_hypercall,
4280         .get_fpu             = emulator_get_fpu,
4281         .put_fpu             = emulator_put_fpu,
4282         .intercept           = emulator_intercept,
4283         .get_cpuid           = emulator_get_cpuid,
4284 };
4285
4286 static void cache_all_regs(struct kvm_vcpu *vcpu)
4287 {
4288         kvm_register_read(vcpu, VCPU_REGS_RAX);
4289         kvm_register_read(vcpu, VCPU_REGS_RSP);
4290         kvm_register_read(vcpu, VCPU_REGS_RIP);
4291         vcpu->arch.regs_dirty = ~0;
4292 }
4293
4294 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4295 {
4296         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4297         /*
4298          * an sti; sti; sequence only disable interrupts for the first
4299          * instruction. So, if the last instruction, be it emulated or
4300          * not, left the system with the INT_STI flag enabled, it
4301          * means that the last instruction is an sti. We should not
4302          * leave the flag on in this case. The same goes for mov ss
4303          */
4304         if (!(int_shadow & mask))
4305                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4306 }
4307
4308 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4309 {
4310         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4311         if (ctxt->exception.vector == PF_VECTOR)
4312                 kvm_propagate_fault(vcpu, &ctxt->exception);
4313         else if (ctxt->exception.error_code_valid)
4314                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4315                                       ctxt->exception.error_code);
4316         else
4317                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4318 }
4319
4320 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4321                               const unsigned long *regs)
4322 {
4323         memset(&ctxt->twobyte, 0,
4324                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4325         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4326
4327         ctxt->fetch.start = 0;
4328         ctxt->fetch.end = 0;
4329         ctxt->io_read.pos = 0;
4330         ctxt->io_read.end = 0;
4331         ctxt->mem_read.pos = 0;
4332         ctxt->mem_read.end = 0;
4333 }
4334
4335 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4336 {
4337         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4338         int cs_db, cs_l;
4339
4340         /*
4341          * TODO: fix emulate.c to use guest_read/write_register
4342          * instead of direct ->regs accesses, can save hundred cycles
4343          * on Intel for instructions that don't read/change RSP, for
4344          * for example.
4345          */
4346         cache_all_regs(vcpu);
4347
4348         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4349
4350         ctxt->eflags = kvm_get_rflags(vcpu);
4351         ctxt->eip = kvm_rip_read(vcpu);
4352         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4353                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4354                      cs_l                               ? X86EMUL_MODE_PROT64 :
4355                      cs_db                              ? X86EMUL_MODE_PROT32 :
4356                                                           X86EMUL_MODE_PROT16;
4357         ctxt->guest_mode = is_guest_mode(vcpu);
4358
4359         init_decode_cache(ctxt, vcpu->arch.regs);
4360         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4361 }
4362
4363 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4364 {
4365         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4366         int ret;
4367
4368         init_emulate_ctxt(vcpu);
4369
4370         ctxt->op_bytes = 2;
4371         ctxt->ad_bytes = 2;
4372         ctxt->_eip = ctxt->eip + inc_eip;
4373         ret = emulate_int_real(ctxt, irq);
4374
4375         if (ret != X86EMUL_CONTINUE)
4376                 return EMULATE_FAIL;
4377
4378         ctxt->eip = ctxt->_eip;
4379         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4380         kvm_rip_write(vcpu, ctxt->eip);
4381         kvm_set_rflags(vcpu, ctxt->eflags);
4382
4383         if (irq == NMI_VECTOR)
4384                 vcpu->arch.nmi_pending = 0;
4385         else
4386                 vcpu->arch.interrupt.pending = false;
4387
4388         return EMULATE_DONE;
4389 }
4390 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4391
4392 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4393 {
4394         int r = EMULATE_DONE;
4395
4396         ++vcpu->stat.insn_emulation_fail;
4397         trace_kvm_emulate_insn_failed(vcpu);
4398         if (!is_guest_mode(vcpu)) {
4399                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4400                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4401                 vcpu->run->internal.ndata = 0;
4402                 r = EMULATE_FAIL;
4403         }
4404         kvm_queue_exception(vcpu, UD_VECTOR);
4405
4406         return r;
4407 }
4408
4409 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4410 {
4411         gpa_t gpa;
4412
4413         if (tdp_enabled)
4414                 return false;
4415
4416         /*
4417          * if emulation was due to access to shadowed page table
4418          * and it failed try to unshadow page and re-entetr the
4419          * guest to let CPU execute the instruction.
4420          */
4421         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4422                 return true;
4423
4424         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4425
4426         if (gpa == UNMAPPED_GVA)
4427                 return true; /* let cpu generate fault */
4428
4429         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4430                 return true;
4431
4432         return false;
4433 }
4434
4435 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4436                               unsigned long cr2,  int emulation_type)
4437 {
4438         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4439         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4440
4441         last_retry_eip = vcpu->arch.last_retry_eip;
4442         last_retry_addr = vcpu->arch.last_retry_addr;
4443
4444         /*
4445          * If the emulation is caused by #PF and it is non-page_table
4446          * writing instruction, it means the VM-EXIT is caused by shadow
4447          * page protected, we can zap the shadow page and retry this
4448          * instruction directly.
4449          *
4450          * Note: if the guest uses a non-page-table modifying instruction
4451          * on the PDE that points to the instruction, then we will unmap
4452          * the instruction and go to an infinite loop. So, we cache the
4453          * last retried eip and the last fault address, if we meet the eip
4454          * and the address again, we can break out of the potential infinite
4455          * loop.
4456          */
4457         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4458
4459         if (!(emulation_type & EMULTYPE_RETRY))
4460                 return false;
4461
4462         if (x86_page_table_writing_insn(ctxt))
4463                 return false;
4464
4465         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4466                 return false;
4467
4468         vcpu->arch.last_retry_eip = ctxt->eip;
4469         vcpu->arch.last_retry_addr = cr2;
4470
4471         if (!vcpu->arch.mmu.direct_map)
4472                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4473
4474         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4475
4476         return true;
4477 }
4478
4479 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4480                             unsigned long cr2,
4481                             int emulation_type,
4482                             void *insn,
4483                             int insn_len)
4484 {
4485         int r;
4486         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4487         bool writeback = true;
4488
4489         kvm_clear_exception_queue(vcpu);
4490
4491         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4492                 init_emulate_ctxt(vcpu);
4493                 ctxt->interruptibility = 0;
4494                 ctxt->have_exception = false;
4495                 ctxt->perm_ok = false;
4496
4497                 ctxt->only_vendor_specific_insn
4498                         = emulation_type & EMULTYPE_TRAP_UD;
4499
4500                 r = x86_decode_insn(ctxt, insn, insn_len);
4501
4502                 trace_kvm_emulate_insn_start(vcpu);
4503                 ++vcpu->stat.insn_emulation;
4504                 if (r != EMULATION_OK)  {
4505                         if (emulation_type & EMULTYPE_TRAP_UD)
4506                                 return EMULATE_FAIL;
4507                         if (reexecute_instruction(vcpu, cr2))
4508                                 return EMULATE_DONE;
4509                         if (emulation_type & EMULTYPE_SKIP)
4510                                 return EMULATE_FAIL;
4511                         return handle_emulation_failure(vcpu);
4512                 }
4513         }
4514
4515         if (emulation_type & EMULTYPE_SKIP) {
4516                 kvm_rip_write(vcpu, ctxt->_eip);
4517                 return EMULATE_DONE;
4518         }
4519
4520         if (retry_instruction(ctxt, cr2, emulation_type))
4521                 return EMULATE_DONE;
4522
4523         /* this is needed for vmware backdoor interface to work since it
4524            changes registers values  during IO operation */
4525         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4526                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4527                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4528         }
4529
4530 restart:
4531         r = x86_emulate_insn(ctxt);
4532
4533         if (r == EMULATION_INTERCEPTED)
4534                 return EMULATE_DONE;
4535
4536         if (r == EMULATION_FAILED) {
4537                 if (reexecute_instruction(vcpu, cr2))
4538                         return EMULATE_DONE;
4539
4540                 return handle_emulation_failure(vcpu);
4541         }
4542
4543         if (ctxt->have_exception) {
4544                 inject_emulated_exception(vcpu);
4545                 r = EMULATE_DONE;
4546         } else if (vcpu->arch.pio.count) {
4547                 if (!vcpu->arch.pio.in)
4548                         vcpu->arch.pio.count = 0;
4549                 else
4550                         writeback = false;
4551                 r = EMULATE_DO_MMIO;
4552         } else if (vcpu->mmio_needed) {
4553                 if (!vcpu->mmio_is_write)
4554                         writeback = false;
4555                 r = EMULATE_DO_MMIO;
4556         } else if (r == EMULATION_RESTART)
4557                 goto restart;
4558         else
4559                 r = EMULATE_DONE;
4560
4561         if (writeback) {
4562                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4563                 kvm_set_rflags(vcpu, ctxt->eflags);
4564                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4565                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4566                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4567                 kvm_rip_write(vcpu, ctxt->eip);
4568         } else
4569                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4570
4571         return r;
4572 }
4573 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4574
4575 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4576 {
4577         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4578         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4579                                             size, port, &val, 1);
4580         /* do not return to emulator after return from userspace */
4581         vcpu->arch.pio.count = 0;
4582         return ret;
4583 }
4584 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4585
4586 static void tsc_bad(void *info)
4587 {
4588         __this_cpu_write(cpu_tsc_khz, 0);
4589 }
4590
4591 static void tsc_khz_changed(void *data)
4592 {
4593         struct cpufreq_freqs *freq = data;
4594         unsigned long khz = 0;
4595
4596         if (data)
4597                 khz = freq->new;
4598         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4599                 khz = cpufreq_quick_get(raw_smp_processor_id());
4600         if (!khz)
4601                 khz = tsc_khz;
4602         __this_cpu_write(cpu_tsc_khz, khz);
4603 }
4604
4605 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4606                                      void *data)
4607 {
4608         struct cpufreq_freqs *freq = data;
4609         struct kvm *kvm;
4610         struct kvm_vcpu *vcpu;
4611         int i, send_ipi = 0;
4612
4613         /*
4614          * We allow guests to temporarily run on slowing clocks,
4615          * provided we notify them after, or to run on accelerating
4616          * clocks, provided we notify them before.  Thus time never
4617          * goes backwards.
4618          *
4619          * However, we have a problem.  We can't atomically update
4620          * the frequency of a given CPU from this function; it is
4621          * merely a notifier, which can be called from any CPU.
4622          * Changing the TSC frequency at arbitrary points in time
4623          * requires a recomputation of local variables related to
4624          * the TSC for each VCPU.  We must flag these local variables
4625          * to be updated and be sure the update takes place with the
4626          * new frequency before any guests proceed.
4627          *
4628          * Unfortunately, the combination of hotplug CPU and frequency
4629          * change creates an intractable locking scenario; the order
4630          * of when these callouts happen is undefined with respect to
4631          * CPU hotplug, and they can race with each other.  As such,
4632          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4633          * undefined; you can actually have a CPU frequency change take
4634          * place in between the computation of X and the setting of the
4635          * variable.  To protect against this problem, all updates of
4636          * the per_cpu tsc_khz variable are done in an interrupt
4637          * protected IPI, and all callers wishing to update the value
4638          * must wait for a synchronous IPI to complete (which is trivial
4639          * if the caller is on the CPU already).  This establishes the
4640          * necessary total order on variable updates.
4641          *
4642          * Note that because a guest time update may take place
4643          * anytime after the setting of the VCPU's request bit, the
4644          * correct TSC value must be set before the request.  However,
4645          * to ensure the update actually makes it to any guest which
4646          * starts running in hardware virtualization between the set
4647          * and the acquisition of the spinlock, we must also ping the
4648          * CPU after setting the request bit.
4649          *
4650          */
4651
4652         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4653                 return 0;
4654         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4655                 return 0;
4656
4657         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4658
4659         raw_spin_lock(&kvm_lock);
4660         list_for_each_entry(kvm, &vm_list, vm_list) {
4661                 kvm_for_each_vcpu(i, vcpu, kvm) {
4662                         if (vcpu->cpu != freq->cpu)
4663                                 continue;
4664                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4665                         if (vcpu->cpu != smp_processor_id())
4666                                 send_ipi = 1;
4667                 }
4668         }
4669         raw_spin_unlock(&kvm_lock);
4670
4671         if (freq->old < freq->new && send_ipi) {
4672                 /*
4673                  * We upscale the frequency.  Must make the guest
4674                  * doesn't see old kvmclock values while running with
4675                  * the new frequency, otherwise we risk the guest sees
4676                  * time go backwards.
4677                  *
4678                  * In case we update the frequency for another cpu
4679                  * (which might be in guest context) send an interrupt
4680                  * to kick the cpu out of guest context.  Next time
4681                  * guest context is entered kvmclock will be updated,
4682                  * so the guest will not see stale values.
4683                  */
4684                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4685         }
4686         return 0;
4687 }
4688
4689 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4690         .notifier_call  = kvmclock_cpufreq_notifier
4691 };
4692
4693 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4694                                         unsigned long action, void *hcpu)
4695 {
4696         unsigned int cpu = (unsigned long)hcpu;
4697
4698         switch (action) {
4699                 case CPU_ONLINE:
4700                 case CPU_DOWN_FAILED:
4701                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4702                         break;
4703                 case CPU_DOWN_PREPARE:
4704                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4705                         break;
4706         }
4707         return NOTIFY_OK;
4708 }
4709
4710 static struct notifier_block kvmclock_cpu_notifier_block = {
4711         .notifier_call  = kvmclock_cpu_notifier,
4712         .priority = -INT_MAX
4713 };
4714
4715 static void kvm_timer_init(void)
4716 {
4717         int cpu;
4718
4719         max_tsc_khz = tsc_khz;
4720         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4721         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4722 #ifdef CONFIG_CPU_FREQ
4723                 struct cpufreq_policy policy;
4724                 memset(&policy, 0, sizeof(policy));
4725                 cpu = get_cpu();
4726                 cpufreq_get_policy(&policy, cpu);
4727                 if (policy.cpuinfo.max_freq)
4728                         max_tsc_khz = policy.cpuinfo.max_freq;
4729                 put_cpu();
4730 #endif
4731                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4732                                           CPUFREQ_TRANSITION_NOTIFIER);
4733         }
4734         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4735         for_each_online_cpu(cpu)
4736                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4737 }
4738
4739 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4740
4741 int kvm_is_in_guest(void)
4742 {
4743         return __this_cpu_read(current_vcpu) != NULL;
4744 }
4745
4746 static int kvm_is_user_mode(void)
4747 {
4748         int user_mode = 3;
4749
4750         if (__this_cpu_read(current_vcpu))
4751                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4752
4753         return user_mode != 0;
4754 }
4755
4756 static unsigned long kvm_get_guest_ip(void)
4757 {
4758         unsigned long ip = 0;
4759
4760         if (__this_cpu_read(current_vcpu))
4761                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4762
4763         return ip;
4764 }
4765
4766 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4767         .is_in_guest            = kvm_is_in_guest,
4768         .is_user_mode           = kvm_is_user_mode,
4769         .get_guest_ip           = kvm_get_guest_ip,
4770 };
4771
4772 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4773 {
4774         __this_cpu_write(current_vcpu, vcpu);
4775 }
4776 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4777
4778 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4779 {
4780         __this_cpu_write(current_vcpu, NULL);
4781 }
4782 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4783
4784 static void kvm_set_mmio_spte_mask(void)
4785 {
4786         u64 mask;
4787         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4788
4789         /*
4790          * Set the reserved bits and the present bit of an paging-structure
4791          * entry to generate page fault with PFER.RSV = 1.
4792          */
4793         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4794         mask |= 1ull;
4795
4796 #ifdef CONFIG_X86_64
4797         /*
4798          * If reserved bit is not supported, clear the present bit to disable
4799          * mmio page fault.
4800          */
4801         if (maxphyaddr == 52)
4802                 mask &= ~1ull;
4803 #endif
4804
4805         kvm_mmu_set_mmio_spte_mask(mask);
4806 }
4807
4808 int kvm_arch_init(void *opaque)
4809 {
4810         int r;
4811         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4812
4813         if (kvm_x86_ops) {
4814                 printk(KERN_ERR "kvm: already loaded the other module\n");
4815                 r = -EEXIST;
4816                 goto out;
4817         }
4818
4819         if (!ops->cpu_has_kvm_support()) {
4820                 printk(KERN_ERR "kvm: no hardware support\n");
4821                 r = -EOPNOTSUPP;
4822                 goto out;
4823         }
4824         if (ops->disabled_by_bios()) {
4825                 printk(KERN_ERR "kvm: disabled by bios\n");
4826                 r = -EOPNOTSUPP;
4827                 goto out;
4828         }
4829
4830         r = kvm_mmu_module_init();
4831         if (r)
4832                 goto out;
4833
4834         kvm_set_mmio_spte_mask();
4835         kvm_init_msr_list();
4836
4837         kvm_x86_ops = ops;
4838         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4839                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4840
4841         kvm_timer_init();
4842
4843         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4844
4845         if (cpu_has_xsave)
4846                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4847
4848         return 0;
4849
4850 out:
4851         return r;
4852 }
4853
4854 void kvm_arch_exit(void)
4855 {
4856         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4857
4858         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4859                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4860                                             CPUFREQ_TRANSITION_NOTIFIER);
4861         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4862         kvm_x86_ops = NULL;
4863         kvm_mmu_module_exit();
4864 }
4865
4866 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4867 {
4868         ++vcpu->stat.halt_exits;
4869         if (irqchip_in_kernel(vcpu->kvm)) {
4870                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4871                 return 1;
4872         } else {
4873                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4874                 return 0;
4875         }
4876 }
4877 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4878
4879 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4880 {
4881         u64 param, ingpa, outgpa, ret;
4882         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4883         bool fast, longmode;
4884         int cs_db, cs_l;
4885
4886         /*
4887          * hypercall generates UD from non zero cpl and real mode
4888          * per HYPER-V spec
4889          */
4890         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4891                 kvm_queue_exception(vcpu, UD_VECTOR);
4892                 return 0;
4893         }
4894
4895         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4896         longmode = is_long_mode(vcpu) && cs_l == 1;
4897
4898         if (!longmode) {
4899                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4900                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4901                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4902                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4903                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4904                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4905         }
4906 #ifdef CONFIG_X86_64
4907         else {
4908                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4909                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4910                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4911         }
4912 #endif
4913
4914         code = param & 0xffff;
4915         fast = (param >> 16) & 0x1;
4916         rep_cnt = (param >> 32) & 0xfff;
4917         rep_idx = (param >> 48) & 0xfff;
4918
4919         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4920
4921         switch (code) {
4922         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4923                 kvm_vcpu_on_spin(vcpu);
4924                 break;
4925         default:
4926                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4927                 break;
4928         }
4929
4930         ret = res | (((u64)rep_done & 0xfff) << 32);
4931         if (longmode) {
4932                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4933         } else {
4934                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4935                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4936         }
4937
4938         return 1;
4939 }
4940
4941 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4942 {
4943         unsigned long nr, a0, a1, a2, a3, ret;
4944         int r = 1;
4945
4946         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4947                 return kvm_hv_hypercall(vcpu);
4948
4949         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4950         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4951         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4952         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4953         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4954
4955         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4956
4957         if (!is_long_mode(vcpu)) {
4958                 nr &= 0xFFFFFFFF;
4959                 a0 &= 0xFFFFFFFF;
4960                 a1 &= 0xFFFFFFFF;
4961                 a2 &= 0xFFFFFFFF;
4962                 a3 &= 0xFFFFFFFF;
4963         }
4964
4965         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4966                 ret = -KVM_EPERM;
4967                 goto out;
4968         }
4969
4970         switch (nr) {
4971         case KVM_HC_VAPIC_POLL_IRQ:
4972                 ret = 0;
4973                 break;
4974         default:
4975                 ret = -KVM_ENOSYS;
4976                 break;
4977         }
4978 out:
4979         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4980         ++vcpu->stat.hypercalls;
4981         return r;
4982 }
4983 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4984
4985 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4986 {
4987         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4988         char instruction[3];
4989         unsigned long rip = kvm_rip_read(vcpu);
4990
4991         /*
4992          * Blow out the MMU to ensure that no other VCPU has an active mapping
4993          * to ensure that the updated hypercall appears atomically across all
4994          * VCPUs.
4995          */
4996         kvm_mmu_zap_all(vcpu->kvm);
4997
4998         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4999
5000         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5001 }
5002
5003 /*
5004  * Check if userspace requested an interrupt window, and that the
5005  * interrupt window is open.
5006  *
5007  * No need to exit to userspace if we already have an interrupt queued.
5008  */
5009 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5010 {
5011         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5012                 vcpu->run->request_interrupt_window &&
5013                 kvm_arch_interrupt_allowed(vcpu));
5014 }
5015
5016 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5017 {
5018         struct kvm_run *kvm_run = vcpu->run;
5019
5020         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5021         kvm_run->cr8 = kvm_get_cr8(vcpu);
5022         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5023         if (irqchip_in_kernel(vcpu->kvm))
5024                 kvm_run->ready_for_interrupt_injection = 1;
5025         else
5026                 kvm_run->ready_for_interrupt_injection =
5027                         kvm_arch_interrupt_allowed(vcpu) &&
5028                         !kvm_cpu_has_interrupt(vcpu) &&
5029                         !kvm_event_needs_reinjection(vcpu);
5030 }
5031
5032 static void vapic_enter(struct kvm_vcpu *vcpu)
5033 {
5034         struct kvm_lapic *apic = vcpu->arch.apic;
5035         struct page *page;
5036
5037         if (!apic || !apic->vapic_addr)
5038                 return;
5039
5040         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5041
5042         vcpu->arch.apic->vapic_page = page;
5043 }
5044
5045 static void vapic_exit(struct kvm_vcpu *vcpu)
5046 {
5047         struct kvm_lapic *apic = vcpu->arch.apic;
5048         int idx;
5049
5050         if (!apic || !apic->vapic_addr)
5051                 return;
5052
5053         idx = srcu_read_lock(&vcpu->kvm->srcu);
5054         kvm_release_page_dirty(apic->vapic_page);
5055         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5056         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5057 }
5058
5059 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5060 {
5061         int max_irr, tpr;
5062
5063         if (!kvm_x86_ops->update_cr8_intercept)
5064                 return;
5065
5066         if (!vcpu->arch.apic)
5067                 return;
5068
5069         if (!vcpu->arch.apic->vapic_addr)
5070                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5071         else
5072                 max_irr = -1;
5073
5074         if (max_irr != -1)
5075                 max_irr >>= 4;
5076
5077         tpr = kvm_lapic_get_cr8(vcpu);
5078
5079         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5080 }
5081
5082 static void inject_pending_event(struct kvm_vcpu *vcpu)
5083 {
5084         /* try to reinject previous events if any */
5085         if (vcpu->arch.exception.pending) {
5086                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5087                                         vcpu->arch.exception.has_error_code,
5088                                         vcpu->arch.exception.error_code);
5089                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5090                                           vcpu->arch.exception.has_error_code,
5091                                           vcpu->arch.exception.error_code,
5092                                           vcpu->arch.exception.reinject);
5093                 return;
5094         }
5095
5096         if (vcpu->arch.nmi_injected) {
5097                 kvm_x86_ops->set_nmi(vcpu);
5098                 return;
5099         }
5100
5101         if (vcpu->arch.interrupt.pending) {
5102                 kvm_x86_ops->set_irq(vcpu);
5103                 return;
5104         }
5105
5106         /* try to inject new event if pending */
5107         if (vcpu->arch.nmi_pending) {
5108                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5109                         --vcpu->arch.nmi_pending;
5110                         vcpu->arch.nmi_injected = true;
5111                         kvm_x86_ops->set_nmi(vcpu);
5112                 }
5113         } else if (kvm_cpu_has_interrupt(vcpu)) {
5114                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5115                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5116                                             false);
5117                         kvm_x86_ops->set_irq(vcpu);
5118                 }
5119         }
5120 }
5121
5122 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5123 {
5124         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5125                         !vcpu->guest_xcr0_loaded) {
5126                 /* kvm_set_xcr() also depends on this */
5127                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5128                 vcpu->guest_xcr0_loaded = 1;
5129         }
5130 }
5131
5132 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5133 {
5134         if (vcpu->guest_xcr0_loaded) {
5135                 if (vcpu->arch.xcr0 != host_xcr0)
5136                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5137                 vcpu->guest_xcr0_loaded = 0;
5138         }
5139 }
5140
5141 static void process_nmi(struct kvm_vcpu *vcpu)
5142 {
5143         unsigned limit = 2;
5144
5145         /*
5146          * x86 is limited to one NMI running, and one NMI pending after it.
5147          * If an NMI is already in progress, limit further NMIs to just one.
5148          * Otherwise, allow two (and we'll inject the first one immediately).
5149          */
5150         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5151                 limit = 1;
5152
5153         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5154         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5155         kvm_make_request(KVM_REQ_EVENT, vcpu);
5156 }
5157
5158 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5159 {
5160         int r;
5161         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5162                 vcpu->run->request_interrupt_window;
5163         bool req_immediate_exit = 0;
5164
5165         if (vcpu->requests) {
5166                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5167                         kvm_mmu_unload(vcpu);
5168                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5169                         __kvm_migrate_timers(vcpu);
5170                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5171                         r = kvm_guest_time_update(vcpu);
5172                         if (unlikely(r))
5173                                 goto out;
5174                 }
5175                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5176                         kvm_mmu_sync_roots(vcpu);
5177                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5178                         kvm_x86_ops->tlb_flush(vcpu);
5179                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5180                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5181                         r = 0;
5182                         goto out;
5183                 }
5184                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5185                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5186                         r = 0;
5187                         goto out;
5188                 }
5189                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5190                         vcpu->fpu_active = 0;
5191                         kvm_x86_ops->fpu_deactivate(vcpu);
5192                 }
5193                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5194                         /* Page is swapped out. Do synthetic halt */
5195                         vcpu->arch.apf.halted = true;
5196                         r = 1;
5197                         goto out;
5198                 }
5199                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5200                         record_steal_time(vcpu);
5201                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5202                         process_nmi(vcpu);
5203                 req_immediate_exit =
5204                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5205                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5206                         kvm_handle_pmu_event(vcpu);
5207                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5208                         kvm_deliver_pmi(vcpu);
5209         }
5210
5211         r = kvm_mmu_reload(vcpu);
5212         if (unlikely(r))
5213                 goto out;
5214
5215         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5216                 inject_pending_event(vcpu);
5217
5218                 /* enable NMI/IRQ window open exits if needed */
5219                 if (vcpu->arch.nmi_pending)
5220                         kvm_x86_ops->enable_nmi_window(vcpu);
5221                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5222                         kvm_x86_ops->enable_irq_window(vcpu);
5223
5224                 if (kvm_lapic_enabled(vcpu)) {
5225                         update_cr8_intercept(vcpu);
5226                         kvm_lapic_sync_to_vapic(vcpu);
5227                 }
5228         }
5229
5230         preempt_disable();
5231
5232         kvm_x86_ops->prepare_guest_switch(vcpu);
5233         if (vcpu->fpu_active)
5234                 kvm_load_guest_fpu(vcpu);
5235         kvm_load_guest_xcr0(vcpu);
5236
5237         vcpu->mode = IN_GUEST_MODE;
5238
5239         /* We should set ->mode before check ->requests,
5240          * see the comment in make_all_cpus_request.
5241          */
5242         smp_mb();
5243
5244         local_irq_disable();
5245
5246         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5247             || need_resched() || signal_pending(current)) {
5248                 vcpu->mode = OUTSIDE_GUEST_MODE;
5249                 smp_wmb();
5250                 local_irq_enable();
5251                 preempt_enable();
5252                 kvm_x86_ops->cancel_injection(vcpu);
5253                 r = 1;
5254                 goto out;
5255         }
5256
5257         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5258
5259         if (req_immediate_exit)
5260                 smp_send_reschedule(vcpu->cpu);
5261
5262         kvm_guest_enter();
5263
5264         if (unlikely(vcpu->arch.switch_db_regs)) {
5265                 set_debugreg(0, 7);
5266                 set_debugreg(vcpu->arch.eff_db[0], 0);
5267                 set_debugreg(vcpu->arch.eff_db[1], 1);
5268                 set_debugreg(vcpu->arch.eff_db[2], 2);
5269                 set_debugreg(vcpu->arch.eff_db[3], 3);
5270         }
5271
5272         trace_kvm_entry(vcpu->vcpu_id);
5273         kvm_x86_ops->run(vcpu);
5274
5275         /*
5276          * If the guest has used debug registers, at least dr7
5277          * will be disabled while returning to the host.
5278          * If we don't have active breakpoints in the host, we don't
5279          * care about the messed up debug address registers. But if
5280          * we have some of them active, restore the old state.
5281          */
5282         if (hw_breakpoint_active())
5283                 hw_breakpoint_restore();
5284
5285         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5286
5287         vcpu->mode = OUTSIDE_GUEST_MODE;
5288         smp_wmb();
5289         local_irq_enable();
5290
5291         ++vcpu->stat.exits;
5292
5293         /*
5294          * We must have an instruction between local_irq_enable() and
5295          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5296          * the interrupt shadow.  The stat.exits increment will do nicely.
5297          * But we need to prevent reordering, hence this barrier():
5298          */
5299         barrier();
5300
5301         kvm_guest_exit();
5302
5303         preempt_enable();
5304
5305         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5306
5307         /*
5308          * Profile KVM exit RIPs:
5309          */
5310         if (unlikely(prof_on == KVM_PROFILING)) {
5311                 unsigned long rip = kvm_rip_read(vcpu);
5312                 profile_hit(KVM_PROFILING, (void *)rip);
5313         }
5314
5315         if (unlikely(vcpu->arch.tsc_always_catchup))
5316                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5317
5318         kvm_lapic_sync_from_vapic(vcpu);
5319
5320         r = kvm_x86_ops->handle_exit(vcpu);
5321 out:
5322         return r;
5323 }
5324
5325
5326 static int __vcpu_run(struct kvm_vcpu *vcpu)
5327 {
5328         int r;
5329         struct kvm *kvm = vcpu->kvm;
5330
5331         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5332                 pr_debug("vcpu %d received sipi with vector # %x\n",
5333                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5334                 kvm_lapic_reset(vcpu);
5335                 r = kvm_arch_vcpu_reset(vcpu);
5336                 if (r)
5337                         return r;
5338                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5339         }
5340
5341         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5342         vapic_enter(vcpu);
5343
5344         r = 1;
5345         while (r > 0) {
5346                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5347                     !vcpu->arch.apf.halted)
5348                         r = vcpu_enter_guest(vcpu);
5349                 else {
5350                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5351                         kvm_vcpu_block(vcpu);
5352                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5353                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5354                         {
5355                                 switch(vcpu->arch.mp_state) {
5356                                 case KVM_MP_STATE_HALTED:
5357                                         vcpu->arch.mp_state =
5358                                                 KVM_MP_STATE_RUNNABLE;
5359                                 case KVM_MP_STATE_RUNNABLE:
5360                                         vcpu->arch.apf.halted = false;
5361                                         break;
5362                                 case KVM_MP_STATE_SIPI_RECEIVED:
5363                                 default:
5364                                         r = -EINTR;
5365                                         break;
5366                                 }
5367                         }
5368                 }
5369
5370                 if (r <= 0)
5371                         break;
5372
5373                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5374                 if (kvm_cpu_has_pending_timer(vcpu))
5375                         kvm_inject_pending_timer_irqs(vcpu);
5376
5377                 if (dm_request_for_irq_injection(vcpu)) {
5378                         r = -EINTR;
5379                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5380                         ++vcpu->stat.request_irq_exits;
5381                 }
5382
5383                 kvm_check_async_pf_completion(vcpu);
5384
5385                 if (signal_pending(current)) {
5386                         r = -EINTR;
5387                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5388                         ++vcpu->stat.signal_exits;
5389                 }
5390                 if (need_resched()) {
5391                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5392                         kvm_resched(vcpu);
5393                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5394                 }
5395         }
5396
5397         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5398
5399         vapic_exit(vcpu);
5400
5401         return r;
5402 }
5403
5404 static int complete_mmio(struct kvm_vcpu *vcpu)
5405 {
5406         struct kvm_run *run = vcpu->run;
5407         int r;
5408
5409         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5410                 return 1;
5411
5412         if (vcpu->mmio_needed) {
5413                 vcpu->mmio_needed = 0;
5414                 if (!vcpu->mmio_is_write)
5415                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5416                                run->mmio.data, 8);
5417                 vcpu->mmio_index += 8;
5418                 if (vcpu->mmio_index < vcpu->mmio_size) {
5419                         run->exit_reason = KVM_EXIT_MMIO;
5420                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5421                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5422                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5423                         run->mmio.is_write = vcpu->mmio_is_write;
5424                         vcpu->mmio_needed = 1;
5425                         return 0;
5426                 }
5427                 if (vcpu->mmio_is_write)
5428                         return 1;
5429                 vcpu->mmio_read_completed = 1;
5430         }
5431         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5432         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5433         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5434         if (r != EMULATE_DONE)
5435                 return 0;
5436         return 1;
5437 }
5438
5439 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5440 {
5441         int r;
5442         sigset_t sigsaved;
5443
5444         if (!tsk_used_math(current) && init_fpu(current))
5445                 return -ENOMEM;
5446
5447         if (vcpu->sigset_active)
5448                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5449
5450         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5451                 kvm_vcpu_block(vcpu);
5452                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5453                 r = -EAGAIN;
5454                 goto out;
5455         }
5456
5457         /* re-sync apic's tpr */
5458         if (!irqchip_in_kernel(vcpu->kvm)) {
5459                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5460                         r = -EINVAL;
5461                         goto out;
5462                 }
5463         }
5464
5465         r = complete_mmio(vcpu);
5466         if (r <= 0)
5467                 goto out;
5468
5469         r = __vcpu_run(vcpu);
5470
5471 out:
5472         post_kvm_run_save(vcpu);
5473         if (vcpu->sigset_active)
5474                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5475
5476         return r;
5477 }
5478
5479 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5480 {
5481         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5482                 /*
5483                  * We are here if userspace calls get_regs() in the middle of
5484                  * instruction emulation. Registers state needs to be copied
5485                  * back from emulation context to vcpu. Usrapace shouldn't do
5486                  * that usually, but some bad designed PV devices (vmware
5487                  * backdoor interface) need this to work
5488                  */
5489                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5490                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5491                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5492         }
5493         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5494         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5495         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5496         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5497         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5498         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5499         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5500         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5501 #ifdef CONFIG_X86_64
5502         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5503         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5504         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5505         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5506         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5507         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5508         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5509         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5510 #endif
5511
5512         regs->rip = kvm_rip_read(vcpu);
5513         regs->rflags = kvm_get_rflags(vcpu);
5514
5515         return 0;
5516 }
5517
5518 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5519 {
5520         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5521         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5522
5523         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5524         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5525         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5526         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5527         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5528         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5529         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5530         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5531 #ifdef CONFIG_X86_64
5532         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5533         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5534         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5535         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5536         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5537         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5538         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5539         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5540 #endif
5541
5542         kvm_rip_write(vcpu, regs->rip);
5543         kvm_set_rflags(vcpu, regs->rflags);
5544
5545         vcpu->arch.exception.pending = false;
5546
5547         kvm_make_request(KVM_REQ_EVENT, vcpu);
5548
5549         return 0;
5550 }
5551
5552 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5553 {
5554         struct kvm_segment cs;
5555
5556         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5557         *db = cs.db;
5558         *l = cs.l;
5559 }
5560 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5561
5562 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5563                                   struct kvm_sregs *sregs)
5564 {
5565         struct desc_ptr dt;
5566
5567         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5568         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5569         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5570         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5571         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5572         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5573
5574         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5575         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5576
5577         kvm_x86_ops->get_idt(vcpu, &dt);
5578         sregs->idt.limit = dt.size;
5579         sregs->idt.base = dt.address;
5580         kvm_x86_ops->get_gdt(vcpu, &dt);
5581         sregs->gdt.limit = dt.size;
5582         sregs->gdt.base = dt.address;
5583
5584         sregs->cr0 = kvm_read_cr0(vcpu);
5585         sregs->cr2 = vcpu->arch.cr2;
5586         sregs->cr3 = kvm_read_cr3(vcpu);
5587         sregs->cr4 = kvm_read_cr4(vcpu);
5588         sregs->cr8 = kvm_get_cr8(vcpu);
5589         sregs->efer = vcpu->arch.efer;
5590         sregs->apic_base = kvm_get_apic_base(vcpu);
5591
5592         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5593
5594         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5595                 set_bit(vcpu->arch.interrupt.nr,
5596                         (unsigned long *)sregs->interrupt_bitmap);
5597
5598         return 0;
5599 }
5600
5601 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5602                                     struct kvm_mp_state *mp_state)
5603 {
5604         mp_state->mp_state = vcpu->arch.mp_state;
5605         return 0;
5606 }
5607
5608 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5609                                     struct kvm_mp_state *mp_state)
5610 {
5611         vcpu->arch.mp_state = mp_state->mp_state;
5612         kvm_make_request(KVM_REQ_EVENT, vcpu);
5613         return 0;
5614 }
5615
5616 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5617                     bool has_error_code, u32 error_code)
5618 {
5619         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5620         int ret;
5621
5622         init_emulate_ctxt(vcpu);
5623
5624         ret = emulator_task_switch(ctxt, tss_selector, reason,
5625                                    has_error_code, error_code);
5626
5627         if (ret)
5628                 return EMULATE_FAIL;
5629
5630         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5631         kvm_rip_write(vcpu, ctxt->eip);
5632         kvm_set_rflags(vcpu, ctxt->eflags);
5633         kvm_make_request(KVM_REQ_EVENT, vcpu);
5634         return EMULATE_DONE;
5635 }
5636 EXPORT_SYMBOL_GPL(kvm_task_switch);
5637
5638 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5639                                   struct kvm_sregs *sregs)
5640 {
5641         int mmu_reset_needed = 0;
5642         int pending_vec, max_bits, idx;
5643         struct desc_ptr dt;
5644
5645         dt.size = sregs->idt.limit;
5646         dt.address = sregs->idt.base;
5647         kvm_x86_ops->set_idt(vcpu, &dt);
5648         dt.size = sregs->gdt.limit;
5649         dt.address = sregs->gdt.base;
5650         kvm_x86_ops->set_gdt(vcpu, &dt);
5651
5652         vcpu->arch.cr2 = sregs->cr2;
5653         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5654         vcpu->arch.cr3 = sregs->cr3;
5655         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5656
5657         kvm_set_cr8(vcpu, sregs->cr8);
5658
5659         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5660         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5661         kvm_set_apic_base(vcpu, sregs->apic_base);
5662
5663         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5664         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5665         vcpu->arch.cr0 = sregs->cr0;
5666
5667         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5668         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5669         if (sregs->cr4 & X86_CR4_OSXSAVE)
5670                 kvm_update_cpuid(vcpu);
5671
5672         idx = srcu_read_lock(&vcpu->kvm->srcu);
5673         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5674                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5675                 mmu_reset_needed = 1;
5676         }
5677         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5678
5679         if (mmu_reset_needed)
5680                 kvm_mmu_reset_context(vcpu);
5681
5682         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5683         pending_vec = find_first_bit(
5684                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5685         if (pending_vec < max_bits) {
5686                 kvm_queue_interrupt(vcpu, pending_vec, false);
5687                 pr_debug("Set back pending irq %d\n", pending_vec);
5688         }
5689
5690         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5691         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5692         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5693         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5694         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5695         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5696
5697         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5698         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5699
5700         update_cr8_intercept(vcpu);
5701
5702         /* Older userspace won't unhalt the vcpu on reset. */
5703         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5704             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5705             !is_protmode(vcpu))
5706                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5707
5708         kvm_make_request(KVM_REQ_EVENT, vcpu);
5709
5710         return 0;
5711 }
5712
5713 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5714                                         struct kvm_guest_debug *dbg)
5715 {
5716         unsigned long rflags;
5717         int i, r;
5718
5719         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5720                 r = -EBUSY;
5721                 if (vcpu->arch.exception.pending)
5722                         goto out;
5723                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5724                         kvm_queue_exception(vcpu, DB_VECTOR);
5725                 else
5726                         kvm_queue_exception(vcpu, BP_VECTOR);
5727         }
5728
5729         /*
5730          * Read rflags as long as potentially injected trace flags are still
5731          * filtered out.
5732          */
5733         rflags = kvm_get_rflags(vcpu);
5734
5735         vcpu->guest_debug = dbg->control;
5736         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5737                 vcpu->guest_debug = 0;
5738
5739         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5740                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5741                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5742                 vcpu->arch.switch_db_regs =
5743                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5744         } else {
5745                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5746                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5747                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5748         }
5749
5750         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5751                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5752                         get_segment_base(vcpu, VCPU_SREG_CS);
5753
5754         /*
5755          * Trigger an rflags update that will inject or remove the trace
5756          * flags.
5757          */
5758         kvm_set_rflags(vcpu, rflags);
5759
5760         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5761
5762         r = 0;
5763
5764 out:
5765
5766         return r;
5767 }
5768
5769 /*
5770  * Translate a guest virtual address to a guest physical address.
5771  */
5772 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5773                                     struct kvm_translation *tr)
5774 {
5775         unsigned long vaddr = tr->linear_address;
5776         gpa_t gpa;
5777         int idx;
5778
5779         idx = srcu_read_lock(&vcpu->kvm->srcu);
5780         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5781         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5782         tr->physical_address = gpa;
5783         tr->valid = gpa != UNMAPPED_GVA;
5784         tr->writeable = 1;
5785         tr->usermode = 0;
5786
5787         return 0;
5788 }
5789
5790 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5791 {
5792         struct i387_fxsave_struct *fxsave =
5793                         &vcpu->arch.guest_fpu.state->fxsave;
5794
5795         memcpy(fpu->fpr, fxsave->st_space, 128);
5796         fpu->fcw = fxsave->cwd;
5797         fpu->fsw = fxsave->swd;
5798         fpu->ftwx = fxsave->twd;
5799         fpu->last_opcode = fxsave->fop;
5800         fpu->last_ip = fxsave->rip;
5801         fpu->last_dp = fxsave->rdp;
5802         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5803
5804         return 0;
5805 }
5806
5807 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5808 {
5809         struct i387_fxsave_struct *fxsave =
5810                         &vcpu->arch.guest_fpu.state->fxsave;
5811
5812         memcpy(fxsave->st_space, fpu->fpr, 128);
5813         fxsave->cwd = fpu->fcw;
5814         fxsave->swd = fpu->fsw;
5815         fxsave->twd = fpu->ftwx;
5816         fxsave->fop = fpu->last_opcode;
5817         fxsave->rip = fpu->last_ip;
5818         fxsave->rdp = fpu->last_dp;
5819         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5820
5821         return 0;
5822 }
5823
5824 int fx_init(struct kvm_vcpu *vcpu)
5825 {
5826         int err;
5827
5828         err = fpu_alloc(&vcpu->arch.guest_fpu);
5829         if (err)
5830                 return err;
5831
5832         fpu_finit(&vcpu->arch.guest_fpu);
5833
5834         /*
5835          * Ensure guest xcr0 is valid for loading
5836          */
5837         vcpu->arch.xcr0 = XSTATE_FP;
5838
5839         vcpu->arch.cr0 |= X86_CR0_ET;
5840
5841         return 0;
5842 }
5843 EXPORT_SYMBOL_GPL(fx_init);
5844
5845 static void fx_free(struct kvm_vcpu *vcpu)
5846 {
5847         fpu_free(&vcpu->arch.guest_fpu);
5848 }
5849
5850 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5851 {
5852         if (vcpu->guest_fpu_loaded)
5853                 return;
5854
5855         /*
5856          * Restore all possible states in the guest,
5857          * and assume host would use all available bits.
5858          * Guest xcr0 would be loaded later.
5859          */
5860         kvm_put_guest_xcr0(vcpu);
5861         vcpu->guest_fpu_loaded = 1;
5862         unlazy_fpu(current);
5863         fpu_restore_checking(&vcpu->arch.guest_fpu);
5864         trace_kvm_fpu(1);
5865 }
5866
5867 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5868 {
5869         kvm_put_guest_xcr0(vcpu);
5870
5871         if (!vcpu->guest_fpu_loaded)
5872                 return;
5873
5874         vcpu->guest_fpu_loaded = 0;
5875         fpu_save_init(&vcpu->arch.guest_fpu);
5876         ++vcpu->stat.fpu_reload;
5877         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5878         trace_kvm_fpu(0);
5879 }
5880
5881 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5882 {
5883         kvmclock_reset(vcpu);
5884
5885         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5886         fx_free(vcpu);
5887         kvm_x86_ops->vcpu_free(vcpu);
5888 }
5889
5890 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5891                                                 unsigned int id)
5892 {
5893         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5894                 printk_once(KERN_WARNING
5895                 "kvm: SMP vm created on host with unstable TSC; "
5896                 "guest TSC will not be reliable\n");
5897         return kvm_x86_ops->vcpu_create(kvm, id);
5898 }
5899
5900 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5901 {
5902         int r;
5903
5904         vcpu->arch.mtrr_state.have_fixed = 1;
5905         vcpu_load(vcpu);
5906         r = kvm_arch_vcpu_reset(vcpu);
5907         if (r == 0)
5908                 r = kvm_mmu_setup(vcpu);
5909         vcpu_put(vcpu);
5910
5911         return r;
5912 }
5913
5914 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5915 {
5916         vcpu->arch.apf.msr_val = 0;
5917
5918         vcpu_load(vcpu);
5919         kvm_mmu_unload(vcpu);
5920         vcpu_put(vcpu);
5921
5922         fx_free(vcpu);
5923         kvm_x86_ops->vcpu_free(vcpu);
5924 }
5925
5926 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5927 {
5928         atomic_set(&vcpu->arch.nmi_queued, 0);
5929         vcpu->arch.nmi_pending = 0;
5930         vcpu->arch.nmi_injected = false;
5931
5932         vcpu->arch.switch_db_regs = 0;
5933         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5934         vcpu->arch.dr6 = DR6_FIXED_1;
5935         vcpu->arch.dr7 = DR7_FIXED_1;
5936
5937         kvm_make_request(KVM_REQ_EVENT, vcpu);
5938         vcpu->arch.apf.msr_val = 0;
5939         vcpu->arch.st.msr_val = 0;
5940
5941         kvmclock_reset(vcpu);
5942
5943         kvm_clear_async_pf_completion_queue(vcpu);
5944         kvm_async_pf_hash_reset(vcpu);
5945         vcpu->arch.apf.halted = false;
5946
5947         kvm_pmu_reset(vcpu);
5948
5949         return kvm_x86_ops->vcpu_reset(vcpu);
5950 }
5951
5952 int kvm_arch_hardware_enable(void *garbage)
5953 {
5954         struct kvm *kvm;
5955         struct kvm_vcpu *vcpu;
5956         int i;
5957
5958         kvm_shared_msr_cpu_online();
5959         list_for_each_entry(kvm, &vm_list, vm_list)
5960                 kvm_for_each_vcpu(i, vcpu, kvm)
5961                         if (vcpu->cpu == smp_processor_id())
5962                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5963         return kvm_x86_ops->hardware_enable(garbage);
5964 }
5965
5966 void kvm_arch_hardware_disable(void *garbage)
5967 {
5968         kvm_x86_ops->hardware_disable(garbage);
5969         drop_user_return_notifiers(garbage);
5970 }
5971
5972 int kvm_arch_hardware_setup(void)
5973 {
5974         return kvm_x86_ops->hardware_setup();
5975 }
5976
5977 void kvm_arch_hardware_unsetup(void)
5978 {
5979         kvm_x86_ops->hardware_unsetup();
5980 }
5981
5982 void kvm_arch_check_processor_compat(void *rtn)
5983 {
5984         kvm_x86_ops->check_processor_compatibility(rtn);
5985 }
5986
5987 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5988 {
5989         struct page *page;
5990         struct kvm *kvm;
5991         int r;
5992
5993         BUG_ON(vcpu->kvm == NULL);
5994         kvm = vcpu->kvm;
5995
5996         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5997         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5998                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5999         else
6000                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6001
6002         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6003         if (!page) {
6004                 r = -ENOMEM;
6005                 goto fail;
6006         }
6007         vcpu->arch.pio_data = page_address(page);
6008
6009         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6010
6011         r = kvm_mmu_create(vcpu);
6012         if (r < 0)
6013                 goto fail_free_pio_data;
6014
6015         if (irqchip_in_kernel(kvm)) {
6016                 r = kvm_create_lapic(vcpu);
6017                 if (r < 0)
6018                         goto fail_mmu_destroy;
6019         }
6020
6021         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6022                                        GFP_KERNEL);
6023         if (!vcpu->arch.mce_banks) {
6024                 r = -ENOMEM;
6025                 goto fail_free_lapic;
6026         }
6027         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6028
6029         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6030                 goto fail_free_mce_banks;
6031
6032         kvm_async_pf_hash_reset(vcpu);
6033         kvm_pmu_init(vcpu);
6034
6035         return 0;
6036 fail_free_mce_banks:
6037         kfree(vcpu->arch.mce_banks);
6038 fail_free_lapic:
6039         kvm_free_lapic(vcpu);
6040 fail_mmu_destroy:
6041         kvm_mmu_destroy(vcpu);
6042 fail_free_pio_data:
6043         free_page((unsigned long)vcpu->arch.pio_data);
6044 fail:
6045         return r;
6046 }
6047
6048 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6049 {
6050         int idx;
6051
6052         kvm_pmu_destroy(vcpu);
6053         kfree(vcpu->arch.mce_banks);
6054         kvm_free_lapic(vcpu);
6055         idx = srcu_read_lock(&vcpu->kvm->srcu);
6056         kvm_mmu_destroy(vcpu);
6057         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6058         free_page((unsigned long)vcpu->arch.pio_data);
6059 }
6060
6061 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6062 {
6063         if (type)
6064                 return -EINVAL;
6065
6066         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6067         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6068
6069         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6070         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6071
6072         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6073
6074         return 0;
6075 }
6076
6077 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6078 {
6079         vcpu_load(vcpu);
6080         kvm_mmu_unload(vcpu);
6081         vcpu_put(vcpu);
6082 }
6083
6084 static void kvm_free_vcpus(struct kvm *kvm)
6085 {
6086         unsigned int i;
6087         struct kvm_vcpu *vcpu;
6088
6089         /*
6090          * Unpin any mmu pages first.
6091          */
6092         kvm_for_each_vcpu(i, vcpu, kvm) {
6093                 kvm_clear_async_pf_completion_queue(vcpu);
6094                 kvm_unload_vcpu_mmu(vcpu);
6095         }
6096         kvm_for_each_vcpu(i, vcpu, kvm)
6097                 kvm_arch_vcpu_free(vcpu);
6098
6099         mutex_lock(&kvm->lock);
6100         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6101                 kvm->vcpus[i] = NULL;
6102
6103         atomic_set(&kvm->online_vcpus, 0);
6104         mutex_unlock(&kvm->lock);
6105 }
6106
6107 void kvm_arch_sync_events(struct kvm *kvm)
6108 {
6109         kvm_free_all_assigned_devices(kvm);
6110         kvm_free_pit(kvm);
6111 }
6112
6113 void kvm_arch_destroy_vm(struct kvm *kvm)
6114 {
6115         kvm_iommu_unmap_guest(kvm);
6116         kfree(kvm->arch.vpic);
6117         kfree(kvm->arch.vioapic);
6118         kvm_free_vcpus(kvm);
6119         if (kvm->arch.apic_access_page)
6120                 put_page(kvm->arch.apic_access_page);
6121         if (kvm->arch.ept_identity_pagetable)
6122                 put_page(kvm->arch.ept_identity_pagetable);
6123 }
6124
6125 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6126                                 struct kvm_memory_slot *memslot,
6127                                 struct kvm_memory_slot old,
6128                                 struct kvm_userspace_memory_region *mem,
6129                                 int user_alloc)
6130 {
6131         int npages = memslot->npages;
6132         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6133
6134         /* Prevent internal slot pages from being moved by fork()/COW. */
6135         if (memslot->id >= KVM_MEMORY_SLOTS)
6136                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6137
6138         /*To keep backward compatibility with older userspace,
6139          *x86 needs to hanlde !user_alloc case.
6140          */
6141         if (!user_alloc) {
6142                 if (npages && !old.rmap) {
6143                         unsigned long userspace_addr;
6144
6145                         down_write(&current->mm->mmap_sem);
6146                         userspace_addr = do_mmap(NULL, 0,
6147                                                  npages * PAGE_SIZE,
6148                                                  PROT_READ | PROT_WRITE,
6149                                                  map_flags,
6150                                                  0);
6151                         up_write(&current->mm->mmap_sem);
6152
6153                         if (IS_ERR((void *)userspace_addr))
6154                                 return PTR_ERR((void *)userspace_addr);
6155
6156                         memslot->userspace_addr = userspace_addr;
6157                 }
6158         }
6159
6160
6161         return 0;
6162 }
6163
6164 void kvm_arch_commit_memory_region(struct kvm *kvm,
6165                                 struct kvm_userspace_memory_region *mem,
6166                                 struct kvm_memory_slot old,
6167                                 int user_alloc)
6168 {
6169
6170         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6171
6172         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6173                 int ret;
6174
6175                 down_write(&current->mm->mmap_sem);
6176                 ret = do_munmap(current->mm, old.userspace_addr,
6177                                 old.npages * PAGE_SIZE);
6178                 up_write(&current->mm->mmap_sem);
6179                 if (ret < 0)
6180                         printk(KERN_WARNING
6181                                "kvm_vm_ioctl_set_memory_region: "
6182                                "failed to munmap memory\n");
6183         }
6184
6185         if (!kvm->arch.n_requested_mmu_pages)
6186                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6187
6188         spin_lock(&kvm->mmu_lock);
6189         if (nr_mmu_pages)
6190                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6191         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6192         spin_unlock(&kvm->mmu_lock);
6193 }
6194
6195 void kvm_arch_flush_shadow(struct kvm *kvm)
6196 {
6197         kvm_mmu_zap_all(kvm);
6198         kvm_reload_remote_mmus(kvm);
6199 }
6200
6201 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6202 {
6203         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6204                 !vcpu->arch.apf.halted)
6205                 || !list_empty_careful(&vcpu->async_pf.done)
6206                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6207                 || atomic_read(&vcpu->arch.nmi_queued) ||
6208                 (kvm_arch_interrupt_allowed(vcpu) &&
6209                  kvm_cpu_has_interrupt(vcpu));
6210 }
6211
6212 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6213 {
6214         int me;
6215         int cpu = vcpu->cpu;
6216
6217         if (waitqueue_active(&vcpu->wq)) {
6218                 wake_up_interruptible(&vcpu->wq);
6219                 ++vcpu->stat.halt_wakeup;
6220         }
6221
6222         me = get_cpu();
6223         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6224                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6225                         smp_send_reschedule(cpu);
6226         put_cpu();
6227 }
6228
6229 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6230 {
6231         return kvm_x86_ops->interrupt_allowed(vcpu);
6232 }
6233
6234 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6235 {
6236         unsigned long current_rip = kvm_rip_read(vcpu) +
6237                 get_segment_base(vcpu, VCPU_SREG_CS);
6238
6239         return current_rip == linear_rip;
6240 }
6241 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6242
6243 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6244 {
6245         unsigned long rflags;
6246
6247         rflags = kvm_x86_ops->get_rflags(vcpu);
6248         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6249                 rflags &= ~X86_EFLAGS_TF;
6250         return rflags;
6251 }
6252 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6253
6254 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6255 {
6256         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6257             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6258                 rflags |= X86_EFLAGS_TF;
6259         kvm_x86_ops->set_rflags(vcpu, rflags);
6260         kvm_make_request(KVM_REQ_EVENT, vcpu);
6261 }
6262 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6263
6264 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6265 {
6266         int r;
6267
6268         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6269               is_error_page(work->page))
6270                 return;
6271
6272         r = kvm_mmu_reload(vcpu);
6273         if (unlikely(r))
6274                 return;
6275
6276         if (!vcpu->arch.mmu.direct_map &&
6277               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6278                 return;
6279
6280         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6281 }
6282
6283 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6284 {
6285         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6286 }
6287
6288 static inline u32 kvm_async_pf_next_probe(u32 key)
6289 {
6290         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6291 }
6292
6293 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6294 {
6295         u32 key = kvm_async_pf_hash_fn(gfn);
6296
6297         while (vcpu->arch.apf.gfns[key] != ~0)
6298                 key = kvm_async_pf_next_probe(key);
6299
6300         vcpu->arch.apf.gfns[key] = gfn;
6301 }
6302
6303 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6304 {
6305         int i;
6306         u32 key = kvm_async_pf_hash_fn(gfn);
6307
6308         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6309                      (vcpu->arch.apf.gfns[key] != gfn &&
6310                       vcpu->arch.apf.gfns[key] != ~0); i++)
6311                 key = kvm_async_pf_next_probe(key);
6312
6313         return key;
6314 }
6315
6316 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6317 {
6318         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6319 }
6320
6321 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6322 {
6323         u32 i, j, k;
6324
6325         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6326         while (true) {
6327                 vcpu->arch.apf.gfns[i] = ~0;
6328                 do {
6329                         j = kvm_async_pf_next_probe(j);
6330                         if (vcpu->arch.apf.gfns[j] == ~0)
6331                                 return;
6332                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6333                         /*
6334                          * k lies cyclically in ]i,j]
6335                          * |    i.k.j |
6336                          * |....j i.k.| or  |.k..j i...|
6337                          */
6338                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6339                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6340                 i = j;
6341         }
6342 }
6343
6344 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6345 {
6346
6347         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6348                                       sizeof(val));
6349 }
6350
6351 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6352                                      struct kvm_async_pf *work)
6353 {
6354         struct x86_exception fault;
6355
6356         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6357         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6358
6359         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6360             (vcpu->arch.apf.send_user_only &&
6361              kvm_x86_ops->get_cpl(vcpu) == 0))
6362                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6363         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6364                 fault.vector = PF_VECTOR;
6365                 fault.error_code_valid = true;
6366                 fault.error_code = 0;
6367                 fault.nested_page_fault = false;
6368                 fault.address = work->arch.token;
6369                 kvm_inject_page_fault(vcpu, &fault);
6370         }
6371 }
6372
6373 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6374                                  struct kvm_async_pf *work)
6375 {
6376         struct x86_exception fault;
6377
6378         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6379         if (is_error_page(work->page))
6380                 work->arch.token = ~0; /* broadcast wakeup */
6381         else
6382                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6383
6384         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6385             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6386                 fault.vector = PF_VECTOR;
6387                 fault.error_code_valid = true;
6388                 fault.error_code = 0;
6389                 fault.nested_page_fault = false;
6390                 fault.address = work->arch.token;
6391                 kvm_inject_page_fault(vcpu, &fault);
6392         }
6393         vcpu->arch.apf.halted = false;
6394 }
6395
6396 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6397 {
6398         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6399                 return true;
6400         else
6401                 return !kvm_event_needs_reinjection(vcpu) &&
6402                         kvm_x86_ops->interrupt_allowed(vcpu);
6403 }
6404
6405 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6406 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6407 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6408 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6409 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6410 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6411 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6412 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6413 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6414 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);