arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 351
 352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 353 {
 354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 356         else
 357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 358 }
 359
 360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 361 {
 362         kvm_make_request(KVM_REQ_EVENT, vcpu);
 363         vcpu->arch.nmi_pending = 1;
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 366
 367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 368 {
 369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 372
 373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 378
 379 /*
 380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 381  * a #GP and return false.
 382  */
 383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 384 {
 385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 386                 return true;
 387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 388         return false;
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 391
 392 /*
 393  * This function will be used to read from the physical memory of the currently
 394  * running guest. The difference to kvm_read_guest_page is that this function
 395  * can read from guest physical or from the guest's guest physical memory.
 396  */
 397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 398                             gfn_t ngfn, void *data, int offset, int len,
 399                             u32 access)
 400 {
 401         gfn_t real_gfn;
 402         gpa_t ngpa;
 403
 404         ngpa     = gfn_to_gpa(ngfn);
 405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 406         if (real_gfn == UNMAPPED_GVA)
 407                 return -EFAULT;
 408
 409         real_gfn = gpa_to_gfn(real_gfn);
 410
 411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 414
 415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 416                                void *data, int offset, int len, u32 access)
 417 {
 418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 419                                        data, offset, len, access);
 420 }
 421
 422 /*
 423  * Load the pae pdptrs.  Return true is they are all valid.
 424  */
 425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 426 {
 427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 429         int i;
 430         int ret;
 431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 432
 433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 434                                       offset * sizeof(u64), sizeof(pdpte),
 435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 436         if (ret < 0) {
 437                 ret = 0;
 438                 goto out;
 439         }
 440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 441                 if (is_present_gpte(pdpte[i]) &&
 442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 443                         ret = 0;
 444                         goto out;
 445                 }
 446         }
 447         ret = 1;
 448
 449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 450         __set_bit(VCPU_EXREG_PDPTR,
 451                   (unsigned long *)&vcpu->arch.regs_avail);
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_dirty);
 454 out:
 455
 456         return ret;
 457 }
 458 EXPORT_SYMBOL_GPL(load_pdptrs);
 459
 460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 461 {
 462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 463         bool changed = true;
 464         int offset;
 465         gfn_t gfn;
 466         int r;
 467
 468         if (is_long_mode(vcpu) || !is_pae(vcpu))
 469                 return false;
 470
 471         if (!test_bit(VCPU_EXREG_PDPTR,
 472                       (unsigned long *)&vcpu->arch.regs_avail))
 473                 return true;
 474
 475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 479         if (r < 0)
 480                 goto out;
 481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 482 out:
 483
 484         return changed;
 485 }
 486
 487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 488 {
 489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 491                                     X86_CR0_CD | X86_CR0_NW;
 492
 493         cr0 |= X86_CR0_ET;
 494
 495 #ifdef CONFIG_X86_64
 496         if (cr0 & 0xffffffff00000000UL)
 497                 return 1;
 498 #endif
 499
 500         cr0 &= ~CR0_RESERVED_BITS;
 501
 502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 503                 return 1;
 504
 505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 506                 return 1;
 507
 508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 509 #ifdef CONFIG_X86_64
 510                 if ((vcpu->arch.efer & EFER_LME)) {
 511                         int cs_db, cs_l;
 512
 513                         if (!is_pae(vcpu))
 514                                 return 1;
 515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 516                         if (cs_l)
 517                                 return 1;
 518                 } else
 519 #endif
 520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 521                                                  kvm_read_cr3(vcpu)))
 522                         return 1;
 523         }
 524
 525         kvm_x86_ops->set_cr0(vcpu, cr0);
 526
 527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 528                 kvm_clear_async_pf_completion_queue(vcpu);
 529                 kvm_async_pf_hash_reset(vcpu);
 530         }
 531
 532         if ((cr0 ^ old_cr0) & update_bits)
 533                 kvm_mmu_reset_context(vcpu);
 534         return 0;
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 537
 538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 539 {
 540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 541 }
 542 EXPORT_SYMBOL_GPL(kvm_lmsw);
 543
 544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 545 {
 546         u64 xcr0;
 547
 548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 549         if (index != XCR_XFEATURE_ENABLED_MASK)
 550                 return 1;
 551         xcr0 = xcr;
 552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 553                 return 1;
 554         if (!(xcr0 & XSTATE_FP))
 555                 return 1;
 556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 557                 return 1;
 558         if (xcr0 & ~host_xcr0)
 559                 return 1;
 560         vcpu->arch.xcr0 = xcr0;
 561         vcpu->guest_xcr0_loaded = 0;
 562         return 0;
 563 }
 564
 565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 566 {
 567         if (__kvm_set_xcr(vcpu, index, xcr)) {
 568                 kvm_inject_gp(vcpu, 0);
 569                 return 1;
 570         }
 571         return 0;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 574
 575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 576 {
 577         struct kvm_cpuid_entry2 *best;
 578
 579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 581 }
 582
 583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 584 {
 585         struct kvm_cpuid_entry2 *best;
 586
 587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 589 }
 590
 591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 592 {
 593         struct kvm_cpuid_entry2 *best;
 594
 595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 597 }
 598
 599 static void update_cpuid(struct kvm_vcpu *vcpu)
 600 {
 601         struct kvm_cpuid_entry2 *best;
 602
 603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 604         if (!best)
 605                 return;
 606
 607         /* Update OSXSAVE bit */
 608         if (cpu_has_xsave && best->function == 0x1) {
 609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 612         }
 613 }
 614
 615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 616 {
 617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 619                                    X86_CR4_PAE | X86_CR4_SMEP;
 620         if (cr4 & CR4_RESERVED_BITS)
 621                 return 1;
 622
 623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 624                 return 1;
 625
 626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 627                 return 1;
 628
 629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 630                 return 1;
 631
 632         if (is_long_mode(vcpu)) {
 633                 if (!(cr4 & X86_CR4_PAE))
 634                         return 1;
 635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 636                    && ((cr4 ^ old_cr4) & pdptr_bits)
 637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 638                                    kvm_read_cr3(vcpu)))
 639                 return 1;
 640
 641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 642                 return 1;
 643
 644         if ((cr4 ^ old_cr4) & pdptr_bits)
 645                 kvm_mmu_reset_context(vcpu);
 646
 647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 648                 update_cpuid(vcpu);
 649
 650         return 0;
 651 }
 652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 653
 654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 655 {
 656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 657                 kvm_mmu_sync_roots(vcpu);
 658                 kvm_mmu_flush_tlb(vcpu);
 659                 return 0;
 660         }
 661
 662         if (is_long_mode(vcpu)) {
 663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 664                         return 1;
 665         } else {
 666                 if (is_pae(vcpu)) {
 667                         if (cr3 & CR3_PAE_RESERVED_BITS)
 668                                 return 1;
 669                         if (is_paging(vcpu) &&
 670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 671                                 return 1;
 672                 }
 673                 /*
 674                  * We don't check reserved bits in nonpae mode, because
 675                  * this isn't enforced, and VMware depends on this.
 676                  */
 677         }
 678
 679         /*
 680          * Does the new cr3 value map to physical memory? (Note, we
 681          * catch an invalid cr3 even in real-mode, because it would
 682          * cause trouble later on when we turn on paging anyway.)
 683          *
 684          * A real CPU would silently accept an invalid cr3 and would
 685          * attempt to use it - with largely undefined (and often hard
 686          * to debug) behavior on the guest side.
 687          */
 688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 689                 return 1;
 690         vcpu->arch.cr3 = cr3;
 691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 692         vcpu->arch.mmu.new_cr3(vcpu);
 693         return 0;
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 696
 697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 698 {
 699         if (cr8 & CR8_RESERVED_BITS)
 700                 return 1;
 701         if (irqchip_in_kernel(vcpu->kvm))
 702                 kvm_lapic_set_tpr(vcpu, cr8);
 703         else
 704                 vcpu->arch.cr8 = cr8;
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 708
 709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 710 {
 711         if (irqchip_in_kernel(vcpu->kvm))
 712                 return kvm_lapic_get_cr8(vcpu);
 713         else
 714                 return vcpu->arch.cr8;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 717
 718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         switch (dr) {
 721         case 0 ... 3:
 722                 vcpu->arch.db[dr] = val;
 723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 724                         vcpu->arch.eff_db[dr] = val;
 725                 break;
 726         case 4:
 727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 728                         return 1; /* #UD */
 729                 /* fall through */
 730         case 6:
 731                 if (val & 0xffffffff00000000ULL)
 732                         return -1; /* #GP */
 733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 734                 break;
 735         case 5:
 736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 737                         return 1; /* #UD */
 738                 /* fall through */
 739         default: /* 7 */
 740                 if (val & 0xffffffff00000000ULL)
 741                         return -1; /* #GP */
 742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 746                 }
 747                 break;
 748         }
 749
 750         return 0;
 751 }
 752
 753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 754 {
 755         int res;
 756
 757         res = __kvm_set_dr(vcpu, dr, val);
 758         if (res > 0)
 759                 kvm_queue_exception(vcpu, UD_VECTOR);
 760         else if (res < 0)
 761                 kvm_inject_gp(vcpu, 0);
 762
 763         return res;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_set_dr);
 766
 767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 768 {
 769         switch (dr) {
 770         case 0 ... 3:
 771                 *val = vcpu->arch.db[dr];
 772                 break;
 773         case 4:
 774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 775                         return 1;
 776                 /* fall through */
 777         case 6:
 778                 *val = vcpu->arch.dr6;
 779                 break;
 780         case 5:
 781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 782                         return 1;
 783                 /* fall through */
 784         default: /* 7 */
 785                 *val = vcpu->arch.dr7;
 786                 break;
 787         }
 788
 789         return 0;
 790 }
 791
 792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 793 {
 794         if (_kvm_get_dr(vcpu, dr, val)) {
 795                 kvm_queue_exception(vcpu, UD_VECTOR);
 796                 return 1;
 797         }
 798         return 0;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_get_dr);
 801
 802 /*
 803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 805  *
 806  * This list is modified at module load time to reflect the
 807  * capabilities of the host cpu. This capabilities test skips MSRs that are
 808  * kvm-specific. Those are put in the beginning of the list.
 809  */
 810
 811 #define KVM_SAVE_MSRS_BEGIN     9
 812 static u32 msrs_to_save[] = {
 813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 818         MSR_STAR,
 819 #ifdef CONFIG_X86_64
 820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 821 #endif
 822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 823 };
 824
 825 static unsigned num_msrs_to_save;
 826
 827 static u32 emulated_msrs[] = {
 828         MSR_IA32_MISC_ENABLE,
 829         MSR_IA32_MCG_STATUS,
 830         MSR_IA32_MCG_CTL,
 831 };
 832
 833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 834 {
 835         u64 old_efer = vcpu->arch.efer;
 836
 837         if (efer & efer_reserved_bits)
 838                 return 1;
 839
 840         if (is_paging(vcpu)
 841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 842                 return 1;
 843
 844         if (efer & EFER_FFXSR) {
 845                 struct kvm_cpuid_entry2 *feat;
 846
 847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 849                         return 1;
 850         }
 851
 852         if (efer & EFER_SVME) {
 853                 struct kvm_cpuid_entry2 *feat;
 854
 855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 857                         return 1;
 858         }
 859
 860         efer &= ~EFER_LMA;
 861         efer |= vcpu->arch.efer & EFER_LMA;
 862
 863         kvm_x86_ops->set_efer(vcpu, efer);
 864
 865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 866
 867         /* Update reserved bits */
 868         if ((efer ^ old_efer) & EFER_NX)
 869                 kvm_mmu_reset_context(vcpu);
 870
 871         return 0;
 872 }
 873
 874 void kvm_enable_efer_bits(u64 mask)
 875 {
 876        efer_reserved_bits &= ~mask;
 877 }
 878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 879
 880
 881 /*
 882  * Writes msr value into into the appropriate "register".
 883  * Returns 0 on success, non-0 otherwise.
 884  * Assumes vcpu_load() was already called.
 885  */
 886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 887 {
 888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 889 }
 890
 891 /*
 892  * Adapt set_msr() to msr_io()'s calling convention
 893  */
 894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 895 {
 896         return kvm_set_msr(vcpu, index, *data);
 897 }
 898
 899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 900 {
 901         int version;
 902         int r;
 903         struct pvclock_wall_clock wc;
 904         struct timespec boot;
 905
 906         if (!wall_clock)
 907                 return;
 908
 909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 910         if (r)
 911                 return;
 912
 913         if (version & 1)
 914                 ++version;  /* first time write, random junk */
 915
 916         ++version;
 917
 918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 919
 920         /*
 921          * The guest calculates current wall clock time by adding
 922          * system time (updated by kvm_guest_time_update below) to the
 923          * wall clock specified here.  guest system time equals host
 924          * system time for us, thus we must fill in host boot time here.
 925          */
 926         getboottime(&boot);
 927
 928         wc.sec = boot.tv_sec;
 929         wc.nsec = boot.tv_nsec;
 930         wc.version = version;
 931
 932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 933
 934         version++;
 935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 936 }
 937
 938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 939 {
 940         uint32_t quotient, remainder;
 941
 942         /* Don't try to replace with do_div(), this one calculates
 943          * "(dividend << 32) / divisor" */
 944         __asm__ ( "divl %4"
 945                   : "=a" (quotient), "=d" (remainder)
 946                   : "0" (0), "1" (dividend), "r" (divisor) );
 947         return quotient;
 948 }
 949
 950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 951                                s8 *pshift, u32 *pmultiplier)
 952 {
 953         uint64_t scaled64;
 954         int32_t  shift = 0;
 955         uint64_t tps64;
 956         uint32_t tps32;
 957
 958         tps64 = base_khz * 1000LL;
 959         scaled64 = scaled_khz * 1000LL;
 960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 961                 tps64 >>= 1;
 962                 shift--;
 963         }
 964
 965         tps32 = (uint32_t)tps64;
 966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 968                         scaled64 >>= 1;
 969                 else
 970                         tps32 <<= 1;
 971                 shift++;
 972         }
 973
 974         *pshift = shift;
 975         *pmultiplier = div_frac(scaled64, tps32);
 976
 977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 979 }
 980
 981 static inline u64 get_kernel_ns(void)
 982 {
 983         struct timespec ts;
 984
 985         WARN_ON(preemptible());
 986         ktime_get_ts(&ts);
 987         monotonic_to_bootbased(&ts);
 988         return timespec_to_ns(&ts);
 989 }
 990
 991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 992 unsigned long max_tsc_khz;
 993
 994 static inline int kvm_tsc_changes_freq(void)
 995 {
 996         int cpu = get_cpu();
 997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 998                   cpufreq_quick_get(cpu) != 0;
 999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1492 {
1493         u64 delta;
1494
1495         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1496                 return;
1497
1498         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500         vcpu->arch.st.accum_steal = delta;
1501 }
1502
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1504 {
1505         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1506                 return;
1507
1508         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1510                 return;
1511
1512         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513         vcpu->arch.st.steal.version += 2;
1514         vcpu->arch.st.accum_steal = 0;
1515
1516         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1518 }
1519
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1521 {
1522         switch (msr) {
1523         case MSR_EFER:
1524                 return set_efer(vcpu, data);
1525         case MSR_K7_HWCR:
1526                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1527                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1528                 if (data != 0) {
1529                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1530                                 data);
1531                         return 1;
1532                 }
1533                 break;
1534         case MSR_FAM10H_MMIO_CONF_BASE:
1535                 if (data != 0) {
1536                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1537                                 "0x%llx\n", data);
1538                         return 1;
1539                 }
1540                 break;
1541         case MSR_AMD64_NB_CFG:
1542                 break;
1543         case MSR_IA32_DEBUGCTLMSR:
1544                 if (!data) {
1545                         /* We support the non-activated case already */
1546                         break;
1547                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548                         /* Values other than LBR and BTF are vendor-specific,
1549                            thus reserved and should throw a #GP */
1550                         return 1;
1551                 }
1552                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1553                         __func__, data);
1554                 break;
1555         case MSR_IA32_UCODE_REV:
1556         case MSR_IA32_UCODE_WRITE:
1557         case MSR_VM_HSAVE_PA:
1558         case MSR_AMD64_PATCH_LOADER:
1559                 break;
1560         case 0xe2:
1561         case 0x200 ... 0x2ff:
1562                 return set_msr_mtrr(vcpu, msr, data);
1563         case MSR_IA32_APICBASE:
1564                 kvm_set_apic_base(vcpu, data);
1565                 break;
1566         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1567                 return kvm_x2apic_msr_write(vcpu, msr, data);
1568         case MSR_IA32_MISC_ENABLE:
1569                 vcpu->arch.ia32_misc_enable_msr = data;
1570                 break;
1571         case MSR_KVM_WALL_CLOCK_NEW:
1572         case MSR_KVM_WALL_CLOCK:
1573                 vcpu->kvm->arch.wall_clock = data;
1574                 kvm_write_wall_clock(vcpu->kvm, data);
1575                 break;
1576         case MSR_KVM_SYSTEM_TIME_NEW:
1577         case MSR_KVM_SYSTEM_TIME: {
1578                 kvmclock_reset(vcpu);
1579
1580                 vcpu->arch.time = data;
1581                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1582
1583                 /* we verify if the enable bit is set... */
1584                 if (!(data & 1))
1585                         break;
1586
1587                 /* ...but clean it before doing the actual write */
1588                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1589
1590                 vcpu->arch.time_page =
1591                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1592
1593                 if (is_error_page(vcpu->arch.time_page)) {
1594                         kvm_release_page_clean(vcpu->arch.time_page);
1595                         vcpu->arch.time_page = NULL;
1596                 }
1597                 break;
1598         }
1599         case MSR_KVM_ASYNC_PF_EN:
1600                 if (kvm_pv_enable_async_pf(vcpu, data))
1601                         return 1;
1602                 break;
1603         case MSR_KVM_STEAL_TIME:
1604
1605                 if (unlikely(!sched_info_on()))
1606                         return 1;
1607
1608                 if (data & KVM_STEAL_RESERVED_MASK)
1609                         return 1;
1610
1611                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1612                                                         data & KVM_STEAL_VALID_BITS))
1613                         return 1;
1614
1615                 vcpu->arch.st.msr_val = data;
1616
1617                 if (!(data & KVM_MSR_ENABLED))
1618                         break;
1619
1620                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1621
1622                 preempt_disable();
1623                 accumulate_steal_time(vcpu);
1624                 preempt_enable();
1625
1626                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1627
1628                 break;
1629
1630         case MSR_IA32_MCG_CTL:
1631         case MSR_IA32_MCG_STATUS:
1632         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1633                 return set_msr_mce(vcpu, msr, data);
1634
1635         /* Performance counters are not protected by a CPUID bit,
1636          * so we should check all of them in the generic path for the sake of
1637          * cross vendor migration.
1638          * Writing a zero into the event select MSRs disables them,
1639          * which we perfectly emulate ;-). Any other value should be at least
1640          * reported, some guests depend on them.
1641          */
1642         case MSR_P6_EVNTSEL0:
1643         case MSR_P6_EVNTSEL1:
1644         case MSR_K7_EVNTSEL0:
1645         case MSR_K7_EVNTSEL1:
1646         case MSR_K7_EVNTSEL2:
1647         case MSR_K7_EVNTSEL3:
1648                 if (data != 0)
1649                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1650                                 "0x%x data 0x%llx\n", msr, data);
1651                 break;
1652         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1653          * so we ignore writes to make it happy.
1654          */
1655         case MSR_P6_PERFCTR0:
1656         case MSR_P6_PERFCTR1:
1657         case MSR_K7_PERFCTR0:
1658         case MSR_K7_PERFCTR1:
1659         case MSR_K7_PERFCTR2:
1660         case MSR_K7_PERFCTR3:
1661                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1662                         "0x%x data 0x%llx\n", msr, data);
1663                 break;
1664         case MSR_K7_CLK_CTL:
1665                 /*
1666                  * Ignore all writes to this no longer documented MSR.
1667                  * Writes are only relevant for old K7 processors,
1668                  * all pre-dating SVM, but a recommended workaround from
1669                  * AMD for these chips. It is possible to speicify the
1670                  * affected processor models on the command line, hence
1671                  * the need to ignore the workaround.
1672                  */
1673                 break;
1674         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1675                 if (kvm_hv_msr_partition_wide(msr)) {
1676                         int r;
1677                         mutex_lock(&vcpu->kvm->lock);
1678                         r = set_msr_hyperv_pw(vcpu, msr, data);
1679                         mutex_unlock(&vcpu->kvm->lock);
1680                         return r;
1681                 } else
1682                         return set_msr_hyperv(vcpu, msr, data);
1683                 break;
1684         case MSR_IA32_BBL_CR_CTL3:
1685                 /* Drop writes to this legacy MSR -- see rdmsr
1686                  * counterpart for further detail.
1687                  */
1688                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1689                 break;
1690         default:
1691                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1692                         return xen_hvm_config(vcpu, data);
1693                 if (!ignore_msrs) {
1694                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1695                                 msr, data);
1696                         return 1;
1697                 } else {
1698                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1699                                 msr, data);
1700                         break;
1701                 }
1702         }
1703         return 0;
1704 }
1705 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1706
1707
1708 /*
1709  * Reads an msr value (of 'msr_index') into 'pdata'.
1710  * Returns 0 on success, non-0 otherwise.
1711  * Assumes vcpu_load() was already called.
1712  */
1713 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1714 {
1715         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1716 }
1717
1718 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1719 {
1720         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1721
1722         if (!msr_mtrr_valid(msr))
1723                 return 1;
1724
1725         if (msr == MSR_MTRRdefType)
1726                 *pdata = vcpu->arch.mtrr_state.def_type +
1727                          (vcpu->arch.mtrr_state.enabled << 10);
1728         else if (msr == MSR_MTRRfix64K_00000)
1729                 *pdata = p[0];
1730         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1731                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1732         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1733                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1734         else if (msr == MSR_IA32_CR_PAT)
1735                 *pdata = vcpu->arch.pat;
1736         else {  /* Variable MTRRs */
1737                 int idx, is_mtrr_mask;
1738                 u64 *pt;
1739
1740                 idx = (msr - 0x200) / 2;
1741                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1742                 if (!is_mtrr_mask)
1743                         pt =
1744                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1745                 else
1746                         pt =
1747                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1748                 *pdata = *pt;
1749         }
1750
1751         return 0;
1752 }
1753
1754 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1755 {
1756         u64 data;
1757         u64 mcg_cap = vcpu->arch.mcg_cap;
1758         unsigned bank_num = mcg_cap & 0xff;
1759
1760         switch (msr) {
1761         case MSR_IA32_P5_MC_ADDR:
1762         case MSR_IA32_P5_MC_TYPE:
1763                 data = 0;
1764                 break;
1765         case MSR_IA32_MCG_CAP:
1766                 data = vcpu->arch.mcg_cap;
1767                 break;
1768         case MSR_IA32_MCG_CTL:
1769                 if (!(mcg_cap & MCG_CTL_P))
1770                         return 1;
1771                 data = vcpu->arch.mcg_ctl;
1772                 break;
1773         case MSR_IA32_MCG_STATUS:
1774                 data = vcpu->arch.mcg_status;
1775                 break;
1776         default:
1777                 if (msr >= MSR_IA32_MC0_CTL &&
1778                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1779                         u32 offset = msr - MSR_IA32_MC0_CTL;
1780                         data = vcpu->arch.mce_banks[offset];
1781                         break;
1782                 }
1783                 return 1;
1784         }
1785         *pdata = data;
1786         return 0;
1787 }
1788
1789 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1790 {
1791         u64 data = 0;
1792         struct kvm *kvm = vcpu->kvm;
1793
1794         switch (msr) {
1795         case HV_X64_MSR_GUEST_OS_ID:
1796                 data = kvm->arch.hv_guest_os_id;
1797                 break;
1798         case HV_X64_MSR_HYPERCALL:
1799                 data = kvm->arch.hv_hypercall;
1800                 break;
1801         default:
1802                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1803                 return 1;
1804         }
1805
1806         *pdata = data;
1807         return 0;
1808 }
1809
1810 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1811 {
1812         u64 data = 0;
1813
1814         switch (msr) {
1815         case HV_X64_MSR_VP_INDEX: {
1816                 int r;
1817                 struct kvm_vcpu *v;
1818                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1819                         if (v == vcpu)
1820                                 data = r;
1821                 break;
1822         }
1823         case HV_X64_MSR_EOI:
1824                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1825         case HV_X64_MSR_ICR:
1826                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1827         case HV_X64_MSR_TPR:
1828                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1829         default:
1830                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1831                 return 1;
1832         }
1833         *pdata = data;
1834         return 0;
1835 }
1836
1837 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1838 {
1839         u64 data;
1840
1841         switch (msr) {
1842         case MSR_IA32_PLATFORM_ID:
1843         case MSR_IA32_UCODE_REV:
1844         case MSR_IA32_EBL_CR_POWERON:
1845         case MSR_IA32_DEBUGCTLMSR:
1846         case MSR_IA32_LASTBRANCHFROMIP:
1847         case MSR_IA32_LASTBRANCHTOIP:
1848         case MSR_IA32_LASTINTFROMIP:
1849         case MSR_IA32_LASTINTTOIP:
1850         case MSR_K8_SYSCFG:
1851         case MSR_K7_HWCR:
1852         case MSR_VM_HSAVE_PA:
1853         case MSR_P6_PERFCTR0:
1854         case MSR_P6_PERFCTR1:
1855         case MSR_P6_EVNTSEL0:
1856         case MSR_P6_EVNTSEL1:
1857         case MSR_K7_EVNTSEL0:
1858         case MSR_K7_PERFCTR0:
1859         case MSR_K8_INT_PENDING_MSG:
1860         case MSR_AMD64_NB_CFG:
1861         case MSR_FAM10H_MMIO_CONF_BASE:
1862         case 0xe2:
1863                 data = 0;
1864                 break;
1865         case MSR_MTRRcap:
1866                 data = 0x500 | KVM_NR_VAR_MTRR;
1867                 break;
1868         case 0x200 ... 0x2ff:
1869                 return get_msr_mtrr(vcpu, msr, pdata);
1870         case 0xcd: /* fsb frequency */
1871                 data = 3;
1872                 break;
1873                 /*
1874                  * MSR_EBC_FREQUENCY_ID
1875                  * Conservative value valid for even the basic CPU models.
1876                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1877                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1878                  * and 266MHz for model 3, or 4. Set Core Clock
1879                  * Frequency to System Bus Frequency Ratio to 1 (bits
1880                  * 31:24) even though these are only valid for CPU
1881                  * models > 2, however guests may end up dividing or
1882                  * multiplying by zero otherwise.
1883                  */
1884         case MSR_EBC_FREQUENCY_ID:
1885                 data = 1 << 24;
1886                 break;
1887         case MSR_IA32_APICBASE:
1888                 data = kvm_get_apic_base(vcpu);
1889                 break;
1890         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1891                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1892                 break;
1893         case MSR_IA32_MISC_ENABLE:
1894                 data = vcpu->arch.ia32_misc_enable_msr;
1895                 break;
1896         case MSR_IA32_PERF_STATUS:
1897                 /* TSC increment by tick */
1898                 data = 1000ULL;
1899                 /* CPU multiplier */
1900                 data |= (((uint64_t)4ULL) << 40);
1901                 break;
1902         case MSR_EFER:
1903                 data = vcpu->arch.efer;
1904                 break;
1905         case MSR_KVM_WALL_CLOCK:
1906         case MSR_KVM_WALL_CLOCK_NEW:
1907                 data = vcpu->kvm->arch.wall_clock;
1908                 break;
1909         case MSR_KVM_SYSTEM_TIME:
1910         case MSR_KVM_SYSTEM_TIME_NEW:
1911                 data = vcpu->arch.time;
1912                 break;
1913         case MSR_KVM_ASYNC_PF_EN:
1914                 data = vcpu->arch.apf.msr_val;
1915                 break;
1916         case MSR_KVM_STEAL_TIME:
1917                 data = vcpu->arch.st.msr_val;
1918                 break;
1919         case MSR_IA32_P5_MC_ADDR:
1920         case MSR_IA32_P5_MC_TYPE:
1921         case MSR_IA32_MCG_CAP:
1922         case MSR_IA32_MCG_CTL:
1923         case MSR_IA32_MCG_STATUS:
1924         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1925                 return get_msr_mce(vcpu, msr, pdata);
1926         case MSR_K7_CLK_CTL:
1927                 /*
1928                  * Provide expected ramp-up count for K7. All other
1929                  * are set to zero, indicating minimum divisors for
1930                  * every field.
1931                  *
1932                  * This prevents guest kernels on AMD host with CPU
1933                  * type 6, model 8 and higher from exploding due to
1934                  * the rdmsr failing.
1935                  */
1936                 data = 0x20000000;
1937                 break;
1938         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1939                 if (kvm_hv_msr_partition_wide(msr)) {
1940                         int r;
1941                         mutex_lock(&vcpu->kvm->lock);
1942                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1943                         mutex_unlock(&vcpu->kvm->lock);
1944                         return r;
1945                 } else
1946                         return get_msr_hyperv(vcpu, msr, pdata);
1947                 break;
1948         case MSR_IA32_BBL_CR_CTL3:
1949                 /* This legacy MSR exists but isn't fully documented in current
1950                  * silicon.  It is however accessed by winxp in very narrow
1951                  * scenarios where it sets bit #19, itself documented as
1952                  * a "reserved" bit.  Best effort attempt to source coherent
1953                  * read data here should the balance of the register be
1954                  * interpreted by the guest:
1955                  *
1956                  * L2 cache control register 3: 64GB range, 256KB size,
1957                  * enabled, latency 0x1, configured
1958                  */
1959                 data = 0xbe702111;
1960                 break;
1961         default:
1962                 if (!ignore_msrs) {
1963                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1964                         return 1;
1965                 } else {
1966                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1967                         data = 0;
1968                 }
1969                 break;
1970         }
1971         *pdata = data;
1972         return 0;
1973 }
1974 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1975
1976 /*
1977  * Read or write a bunch of msrs. All parameters are kernel addresses.
1978  *
1979  * @return number of msrs set successfully.
1980  */
1981 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1982                     struct kvm_msr_entry *entries,
1983                     int (*do_msr)(struct kvm_vcpu *vcpu,
1984                                   unsigned index, u64 *data))
1985 {
1986         int i, idx;
1987
1988         idx = srcu_read_lock(&vcpu->kvm->srcu);
1989         for (i = 0; i < msrs->nmsrs; ++i)
1990                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1991                         break;
1992         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1993
1994         return i;
1995 }
1996
1997 /*
1998  * Read or write a bunch of msrs. Parameters are user addresses.
1999  *
2000  * @return number of msrs set successfully.
2001  */
2002 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2003                   int (*do_msr)(struct kvm_vcpu *vcpu,
2004                                 unsigned index, u64 *data),
2005                   int writeback)
2006 {
2007         struct kvm_msrs msrs;
2008         struct kvm_msr_entry *entries;
2009         int r, n;
2010         unsigned size;
2011
2012         r = -EFAULT;
2013         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2014                 goto out;
2015
2016         r = -E2BIG;
2017         if (msrs.nmsrs >= MAX_IO_MSRS)
2018                 goto out;
2019
2020         r = -ENOMEM;
2021         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2022         entries = kmalloc(size, GFP_KERNEL);
2023         if (!entries)
2024                 goto out;
2025
2026         r = -EFAULT;
2027         if (copy_from_user(entries, user_msrs->entries, size))
2028                 goto out_free;
2029
2030         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2031         if (r < 0)
2032                 goto out_free;
2033
2034         r = -EFAULT;
2035         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2036                 goto out_free;
2037
2038         r = n;
2039
2040 out_free:
2041         kfree(entries);
2042 out:
2043         return r;
2044 }
2045
2046 int kvm_dev_ioctl_check_extension(long ext)
2047 {
2048         int r;
2049
2050         switch (ext) {
2051         case KVM_CAP_IRQCHIP:
2052         case KVM_CAP_HLT:
2053         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2054         case KVM_CAP_SET_TSS_ADDR:
2055         case KVM_CAP_EXT_CPUID:
2056         case KVM_CAP_CLOCKSOURCE:
2057         case KVM_CAP_PIT:
2058         case KVM_CAP_NOP_IO_DELAY:
2059         case KVM_CAP_MP_STATE:
2060         case KVM_CAP_SYNC_MMU:
2061         case KVM_CAP_USER_NMI:
2062         case KVM_CAP_REINJECT_CONTROL:
2063         case KVM_CAP_IRQ_INJECT_STATUS:
2064         case KVM_CAP_ASSIGN_DEV_IRQ:
2065         case KVM_CAP_IRQFD:
2066         case KVM_CAP_IOEVENTFD:
2067         case KVM_CAP_PIT2:
2068         case KVM_CAP_PIT_STATE2:
2069         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2070         case KVM_CAP_XEN_HVM:
2071         case KVM_CAP_ADJUST_CLOCK:
2072         case KVM_CAP_VCPU_EVENTS:
2073         case KVM_CAP_HYPERV:
2074         case KVM_CAP_HYPERV_VAPIC:
2075         case KVM_CAP_HYPERV_SPIN:
2076         case KVM_CAP_PCI_SEGMENT:
2077         case KVM_CAP_DEBUGREGS:
2078         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2079         case KVM_CAP_XSAVE:
2080         case KVM_CAP_ASYNC_PF:
2081         case KVM_CAP_GET_TSC_KHZ:
2082                 r = 1;
2083                 break;
2084         case KVM_CAP_COALESCED_MMIO:
2085                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2086                 break;
2087         case KVM_CAP_VAPIC:
2088                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2089                 break;
2090         case KVM_CAP_NR_VCPUS:
2091                 r = KVM_MAX_VCPUS;
2092                 break;
2093         case KVM_CAP_NR_MEMSLOTS:
2094                 r = KVM_MEMORY_SLOTS;
2095                 break;
2096         case KVM_CAP_PV_MMU:    /* obsolete */
2097                 r = 0;
2098                 break;
2099         case KVM_CAP_IOMMU:
2100                 r = iommu_found();
2101                 break;
2102         case KVM_CAP_MCE:
2103                 r = KVM_MAX_MCE_BANKS;
2104                 break;
2105         case KVM_CAP_XCRS:
2106                 r = cpu_has_xsave;
2107                 break;
2108         case KVM_CAP_TSC_CONTROL:
2109                 r = kvm_has_tsc_control;
2110                 break;
2111         default:
2112                 r = 0;
2113                 break;
2114         }
2115         return r;
2116
2117 }
2118
2119 long kvm_arch_dev_ioctl(struct file *filp,
2120                         unsigned int ioctl, unsigned long arg)
2121 {
2122         void __user *argp = (void __user *)arg;
2123         long r;
2124
2125         switch (ioctl) {
2126         case KVM_GET_MSR_INDEX_LIST: {
2127                 struct kvm_msr_list __user *user_msr_list = argp;
2128                 struct kvm_msr_list msr_list;
2129                 unsigned n;
2130
2131                 r = -EFAULT;
2132                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2133                         goto out;
2134                 n = msr_list.nmsrs;
2135                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2136                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2137                         goto out;
2138                 r = -E2BIG;
2139                 if (n < msr_list.nmsrs)
2140                         goto out;
2141                 r = -EFAULT;
2142                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2143                                  num_msrs_to_save * sizeof(u32)))
2144                         goto out;
2145                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2146                                  &emulated_msrs,
2147                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2148                         goto out;
2149                 r = 0;
2150                 break;
2151         }
2152         case KVM_GET_SUPPORTED_CPUID: {
2153                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2154                 struct kvm_cpuid2 cpuid;
2155
2156                 r = -EFAULT;
2157                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2158                         goto out;
2159                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2160                                                       cpuid_arg->entries);
2161                 if (r)
2162                         goto out;
2163
2164                 r = -EFAULT;
2165                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2166                         goto out;
2167                 r = 0;
2168                 break;
2169         }
2170         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2171                 u64 mce_cap;
2172
2173                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2174                 r = -EFAULT;
2175                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2176                         goto out;
2177                 r = 0;
2178                 break;
2179         }
2180         default:
2181                 r = -EINVAL;
2182         }
2183 out:
2184         return r;
2185 }
2186
2187 static void wbinvd_ipi(void *garbage)
2188 {
2189         wbinvd();
2190 }
2191
2192 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2193 {
2194         return vcpu->kvm->arch.iommu_domain &&
2195                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2196 }
2197
2198 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2199 {
2200         /* Address WBINVD may be executed by guest */
2201         if (need_emulate_wbinvd(vcpu)) {
2202                 if (kvm_x86_ops->has_wbinvd_exit())
2203                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2204                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2205                         smp_call_function_single(vcpu->cpu,
2206                                         wbinvd_ipi, NULL, 1);
2207         }
2208
2209         kvm_x86_ops->vcpu_load(vcpu, cpu);
2210         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2211                 /* Make sure TSC doesn't go backwards */
2212                 s64 tsc_delta;
2213                 u64 tsc;
2214
2215                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2216                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2217                              tsc - vcpu->arch.last_guest_tsc;
2218
2219                 if (tsc_delta < 0)
2220                         mark_tsc_unstable("KVM discovered backwards TSC");
2221                 if (check_tsc_unstable()) {
2222                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2223                         vcpu->arch.tsc_catchup = 1;
2224                 }
2225                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2226                 if (vcpu->cpu != cpu)
2227                         kvm_migrate_timers(vcpu);
2228                 vcpu->cpu = cpu;
2229         }
2230
2231         accumulate_steal_time(vcpu);
2232         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2233 }
2234
2235 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2236 {
2237         kvm_x86_ops->vcpu_put(vcpu);
2238         kvm_put_guest_fpu(vcpu);
2239         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2240 }
2241
2242 static int is_efer_nx(void)
2243 {
2244         unsigned long long efer = 0;
2245
2246         rdmsrl_safe(MSR_EFER, &efer);
2247         return efer & EFER_NX;
2248 }
2249
2250 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2251 {
2252         int i;
2253         struct kvm_cpuid_entry2 *e, *entry;
2254
2255         entry = NULL;
2256         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2257                 e = &vcpu->arch.cpuid_entries[i];
2258                 if (e->function == 0x80000001) {
2259                         entry = e;
2260                         break;
2261                 }
2262         }
2263         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2264                 entry->edx &= ~(1 << 20);
2265                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2266         }
2267 }
2268
2269 /* when an old userspace process fills a new kernel module */
2270 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2271                                     struct kvm_cpuid *cpuid,
2272                                     struct kvm_cpuid_entry __user *entries)
2273 {
2274         int r, i;
2275         struct kvm_cpuid_entry *cpuid_entries;
2276
2277         r = -E2BIG;
2278         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2279                 goto out;
2280         r = -ENOMEM;
2281         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2282         if (!cpuid_entries)
2283                 goto out;
2284         r = -EFAULT;
2285         if (copy_from_user(cpuid_entries, entries,
2286                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2287                 goto out_free;
2288         for (i = 0; i < cpuid->nent; i++) {
2289                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2290                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2291                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2292                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2293                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2294                 vcpu->arch.cpuid_entries[i].index = 0;
2295                 vcpu->arch.cpuid_entries[i].flags = 0;
2296                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2297                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2298                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2299         }
2300         vcpu->arch.cpuid_nent = cpuid->nent;
2301         cpuid_fix_nx_cap(vcpu);
2302         r = 0;
2303         kvm_apic_set_version(vcpu);
2304         kvm_x86_ops->cpuid_update(vcpu);
2305         update_cpuid(vcpu);
2306
2307 out_free:
2308         vfree(cpuid_entries);
2309 out:
2310         return r;
2311 }
2312
2313 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2314                                      struct kvm_cpuid2 *cpuid,
2315                                      struct kvm_cpuid_entry2 __user *entries)
2316 {
2317         int r;
2318
2319         r = -E2BIG;
2320         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2321                 goto out;
2322         r = -EFAULT;
2323         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2324                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2325                 goto out;
2326         vcpu->arch.cpuid_nent = cpuid->nent;
2327         kvm_apic_set_version(vcpu);
2328         kvm_x86_ops->cpuid_update(vcpu);
2329         update_cpuid(vcpu);
2330         return 0;
2331
2332 out:
2333         return r;
2334 }
2335
2336 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2337                                      struct kvm_cpuid2 *cpuid,
2338                                      struct kvm_cpuid_entry2 __user *entries)
2339 {
2340         int r;
2341
2342         r = -E2BIG;
2343         if (cpuid->nent < vcpu->arch.cpuid_nent)
2344                 goto out;
2345         r = -EFAULT;
2346         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2347                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2348                 goto out;
2349         return 0;
2350
2351 out:
2352         cpuid->nent = vcpu->arch.cpuid_nent;
2353         return r;
2354 }
2355
2356 static void cpuid_mask(u32 *word, int wordnum)
2357 {
2358         *word &= boot_cpu_data.x86_capability[wordnum];
2359 }
2360
2361 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2362                            u32 index)
2363 {
2364         entry->function = function;
2365         entry->index = index;
2366         cpuid_count(entry->function, entry->index,
2367                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2368         entry->flags = 0;
2369 }
2370
2371 static bool supported_xcr0_bit(unsigned bit)
2372 {
2373         u64 mask = ((u64)1 << bit);
2374
2375         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2376 }
2377
2378 #define F(x) bit(X86_FEATURE_##x)
2379
2380 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2381                          u32 index, int *nent, int maxnent)
2382 {
2383         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2384 #ifdef CONFIG_X86_64
2385         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2386                                 ? F(GBPAGES) : 0;
2387         unsigned f_lm = F(LM);
2388 #else
2389         unsigned f_gbpages = 0;
2390         unsigned f_lm = 0;
2391 #endif
2392         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2393
2394         /* cpuid 1.edx */
2395         const u32 kvm_supported_word0_x86_features =
2396                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2397                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2398                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2399                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2400                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2401                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2402                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2403                 0 /* HTT, TM, Reserved, PBE */;
2404         /* cpuid 0x80000001.edx */
2405         const u32 kvm_supported_word1_x86_features =
2406                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2407                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2408                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2409                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2410                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2411                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2412                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2413                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2414         /* cpuid 1.ecx */
2415         const u32 kvm_supported_word4_x86_features =
2416                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64 */ | F(MWAIT) |
2417                 0 /* DS-CPL, VMX, SMX, EST */ |
2418                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2419                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2420                 0 /* Reserved, DCA */ | F(XMM4_1) |
2421                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2422                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2423                 F(F16C) | F(RDRAND);
2424         /* cpuid 0x80000001.ecx */
2425         const u32 kvm_supported_word6_x86_features =
2426                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2427                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2428                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2429                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2430
2431         /* cpuid 0xC0000001.edx */
2432         const u32 kvm_supported_word5_x86_features =
2433                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2434                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2435                 F(PMM) | F(PMM_EN);
2436
2437         /* cpuid 7.0.ebx */
2438         const u32 kvm_supported_word9_x86_features =
2439                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2440
2441         /* all calls to cpuid_count() should be made on the same cpu */
2442         get_cpu();
2443         do_cpuid_1_ent(entry, function, index);
2444         ++*nent;
2445
2446         switch (function) {
2447         case 0:
2448                 entry->eax = min(entry->eax, (u32)0xd);
2449                 break;
2450         case 1:
2451                 entry->edx &= kvm_supported_word0_x86_features;
2452                 cpuid_mask(&entry->edx, 0);
2453                 entry->ecx &= kvm_supported_word4_x86_features;
2454                 cpuid_mask(&entry->ecx, 4);
2455                 /* we support x2apic emulation even if host does not support
2456                  * it since we emulate x2apic in software */
2457                 entry->ecx |= F(X2APIC);
2458                 break;
2459         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2460          * may return different values. This forces us to get_cpu() before
2461          * issuing the first command, and also to emulate this annoying behavior
2462          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2463         case 2: {
2464                 int t, times = entry->eax & 0xff;
2465
2466                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2467                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2468                 for (t = 1; t < times && *nent < maxnent; ++t) {
2469                         do_cpuid_1_ent(&entry[t], function, 0);
2470                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2471                         ++*nent;
2472                 }
2473                 break;
2474         }
2475         /* function 4 has additional index. */
2476         case 4: {
2477                 int i, cache_type;
2478
2479                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2480                 /* read more entries until cache_type is zero */
2481                 for (i = 1; *nent < maxnent; ++i) {
2482                         cache_type = entry[i - 1].eax & 0x1f;
2483                         if (!cache_type)
2484                                 break;
2485                         do_cpuid_1_ent(&entry[i], function, i);
2486                         entry[i].flags |=
2487                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2488                         ++*nent;
2489                 }
2490                 break;
2491         }
2492         case 7: {
2493                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2494                 /* Mask ebx against host capbability word 9 */
2495                 if (index == 0) {
2496                         entry->ebx &= kvm_supported_word9_x86_features;
2497                         cpuid_mask(&entry->ebx, 9);
2498                 } else
2499                         entry->ebx = 0;
2500                 entry->eax = 0;
2501                 entry->ecx = 0;
2502                 entry->edx = 0;
2503                 break;
2504         }
2505         case 9:
2506                 break;
2507         /* function 0xb has additional index. */
2508         case 0xb: {
2509                 int i, level_type;
2510
2511                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2512                 /* read more entries until level_type is zero */
2513                 for (i = 1; *nent < maxnent; ++i) {
2514                         level_type = entry[i - 1].ecx & 0xff00;
2515                         if (!level_type)
2516                                 break;
2517                         do_cpuid_1_ent(&entry[i], function, i);
2518                         entry[i].flags |=
2519                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2520                         ++*nent;
2521                 }
2522                 break;
2523         }
2524         case 0xd: {
2525                 int idx, i;
2526
2527                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2528                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2529                         do_cpuid_1_ent(&entry[i], function, idx);
2530                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2531                                 continue;
2532                         entry[i].flags |=
2533                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2534                         ++*nent;
2535                         ++i;
2536                 }
2537                 break;
2538         }
2539         case KVM_CPUID_SIGNATURE: {
2540                 char signature[12] = "KVMKVMKVM\0\0";
2541                 u32 *sigptr = (u32 *)signature;
2542                 entry->eax = 0;
2543                 entry->ebx = sigptr[0];
2544                 entry->ecx = sigptr[1];
2545                 entry->edx = sigptr[2];
2546                 break;
2547         }
2548         case KVM_CPUID_FEATURES:
2549                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2550                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2551                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2552                              (1 << KVM_FEATURE_ASYNC_PF) |
2553                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2554
2555                 if (sched_info_on())
2556                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2557
2558                 entry->ebx = 0;
2559                 entry->ecx = 0;
2560                 entry->edx = 0;
2561                 break;
2562         case 0x80000000:
2563                 entry->eax = min(entry->eax, 0x8000001a);
2564                 break;
2565         case 0x80000001:
2566                 entry->edx &= kvm_supported_word1_x86_features;
2567                 cpuid_mask(&entry->edx, 1);
2568                 entry->ecx &= kvm_supported_word6_x86_features;
2569                 cpuid_mask(&entry->ecx, 6);
2570                 break;
2571         case 0x80000008: {
2572                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2573                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2574                 unsigned phys_as = entry->eax & 0xff;
2575
2576                 if (!g_phys_as)
2577                         g_phys_as = phys_as;
2578                 entry->eax = g_phys_as | (virt_as << 8);
2579                 entry->ebx = entry->edx = 0;
2580                 break;
2581         }
2582         case 0x80000019:
2583                 entry->ecx = entry->edx = 0;
2584                 break;
2585         case 0x8000001a:
2586                 break;
2587         case 0x8000001d:
2588                 break;
2589         /*Add support for Centaur's CPUID instruction*/
2590         case 0xC0000000:
2591                 /*Just support up to 0xC0000004 now*/
2592                 entry->eax = min(entry->eax, 0xC0000004);
2593                 break;
2594         case 0xC0000001:
2595                 entry->edx &= kvm_supported_word5_x86_features;
2596                 cpuid_mask(&entry->edx, 5);
2597                 break;
2598         case 3: /* Processor serial number */
2599         case 5: /* MONITOR/MWAIT */
2600         case 6: /* Thermal management */
2601         case 0xA: /* Architectural Performance Monitoring */
2602         case 0x80000007: /* Advanced power management */
2603         case 0xC0000002:
2604         case 0xC0000003:
2605         case 0xC0000004:
2606         default:
2607                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2608                 break;
2609         }
2610
2611         kvm_x86_ops->set_supported_cpuid(function, entry);
2612
2613         put_cpu();
2614 }
2615
2616 #undef F
2617
2618 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2619                                      struct kvm_cpuid_entry2 __user *entries)
2620 {
2621         struct kvm_cpuid_entry2 *cpuid_entries;
2622         int limit, nent = 0, r = -E2BIG;
2623         u32 func;
2624
2625         if (cpuid->nent < 1)
2626                 goto out;
2627         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2628                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2629         r = -ENOMEM;
2630         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2631         if (!cpuid_entries)
2632                 goto out;
2633
2634         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2635         limit = cpuid_entries[0].eax;
2636         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2637                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2638                              &nent, cpuid->nent);
2639         r = -E2BIG;
2640         if (nent >= cpuid->nent)
2641                 goto out_free;
2642
2643         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2644         limit = cpuid_entries[nent - 1].eax;
2645         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2646                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2647                              &nent, cpuid->nent);
2648
2649
2650
2651         r = -E2BIG;
2652         if (nent >= cpuid->nent)
2653                 goto out_free;
2654
2655         /* Add support for Centaur's CPUID instruction. */
2656         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2657                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2658                                 &nent, cpuid->nent);
2659
2660                 r = -E2BIG;
2661                 if (nent >= cpuid->nent)
2662                         goto out_free;
2663
2664                 limit = cpuid_entries[nent - 1].eax;
2665                 for (func = 0xC0000001;
2666                         func <= limit && nent < cpuid->nent; ++func)
2667                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2668                                         &nent, cpuid->nent);
2669
2670                 r = -E2BIG;
2671                 if (nent >= cpuid->nent)
2672                         goto out_free;
2673         }
2674
2675         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2676                      cpuid->nent);
2677
2678         r = -E2BIG;
2679         if (nent >= cpuid->nent)
2680                 goto out_free;
2681
2682         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2683                      cpuid->nent);
2684
2685         r = -E2BIG;
2686         if (nent >= cpuid->nent)
2687                 goto out_free;
2688
2689         r = -EFAULT;
2690         if (copy_to_user(entries, cpuid_entries,
2691                          nent * sizeof(struct kvm_cpuid_entry2)))
2692                 goto out_free;
2693         cpuid->nent = nent;
2694         r = 0;
2695
2696 out_free:
2697         vfree(cpuid_entries);
2698 out:
2699         return r;
2700 }
2701
2702 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2703                                     struct kvm_lapic_state *s)
2704 {
2705         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2706
2707         return 0;
2708 }
2709
2710 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2711                                     struct kvm_lapic_state *s)
2712 {
2713         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2714         kvm_apic_post_state_restore(vcpu);
2715         update_cr8_intercept(vcpu);
2716
2717         return 0;
2718 }
2719
2720 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2721                                     struct kvm_interrupt *irq)
2722 {
2723         if (irq->irq < 0 || irq->irq >= 256)
2724                 return -EINVAL;
2725         if (irqchip_in_kernel(vcpu->kvm))
2726                 return -ENXIO;
2727
2728         kvm_queue_interrupt(vcpu, irq->irq, false);
2729         kvm_make_request(KVM_REQ_EVENT, vcpu);
2730
2731         return 0;
2732 }
2733
2734 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2735 {
2736         kvm_inject_nmi(vcpu);
2737
2738         return 0;
2739 }
2740
2741 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2742                                            struct kvm_tpr_access_ctl *tac)
2743 {
2744         if (tac->flags)
2745                 return -EINVAL;
2746         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2747         return 0;
2748 }
2749
2750 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2751                                         u64 mcg_cap)
2752 {
2753         int r;
2754         unsigned bank_num = mcg_cap & 0xff, bank;
2755
2756         r = -EINVAL;
2757         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2758                 goto out;
2759         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2760                 goto out;
2761         r = 0;
2762         vcpu->arch.mcg_cap = mcg_cap;
2763         /* Init IA32_MCG_CTL to all 1s */
2764         if (mcg_cap & MCG_CTL_P)
2765                 vcpu->arch.mcg_ctl = ~(u64)0;
2766         /* Init IA32_MCi_CTL to all 1s */
2767         for (bank = 0; bank < bank_num; bank++)
2768                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2769 out:
2770         return r;
2771 }
2772
2773 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2774                                       struct kvm_x86_mce *mce)
2775 {
2776         u64 mcg_cap = vcpu->arch.mcg_cap;
2777         unsigned bank_num = mcg_cap & 0xff;
2778         u64 *banks = vcpu->arch.mce_banks;
2779
2780         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2781                 return -EINVAL;
2782         /*
2783          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2784          * reporting is disabled
2785          */
2786         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2787             vcpu->arch.mcg_ctl != ~(u64)0)
2788                 return 0;
2789         banks += 4 * mce->bank;
2790         /*
2791          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2792          * reporting is disabled for the bank
2793          */
2794         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2795                 return 0;
2796         if (mce->status & MCI_STATUS_UC) {
2797                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2798                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2799                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2800                         return 0;
2801                 }
2802                 if (banks[1] & MCI_STATUS_VAL)
2803                         mce->status |= MCI_STATUS_OVER;
2804                 banks[2] = mce->addr;
2805                 banks[3] = mce->misc;
2806                 vcpu->arch.mcg_status = mce->mcg_status;
2807                 banks[1] = mce->status;
2808                 kvm_queue_exception(vcpu, MC_VECTOR);
2809         } else if (!(banks[1] & MCI_STATUS_VAL)
2810                    || !(banks[1] & MCI_STATUS_UC)) {
2811                 if (banks[1] & MCI_STATUS_VAL)
2812                         mce->status |= MCI_STATUS_OVER;
2813                 banks[2] = mce->addr;
2814                 banks[3] = mce->misc;
2815                 banks[1] = mce->status;
2816         } else
2817                 banks[1] |= MCI_STATUS_OVER;
2818         return 0;
2819 }
2820
2821 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2822                                                struct kvm_vcpu_events *events)
2823 {
2824         events->exception.injected =
2825                 vcpu->arch.exception.pending &&
2826                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2827         events->exception.nr = vcpu->arch.exception.nr;
2828         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2829         events->exception.pad = 0;
2830         events->exception.error_code = vcpu->arch.exception.error_code;
2831
2832         events->interrupt.injected =
2833                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2834         events->interrupt.nr = vcpu->arch.interrupt.nr;
2835         events->interrupt.soft = 0;
2836         events->interrupt.shadow =
2837                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2838                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2839
2840         events->nmi.injected = vcpu->arch.nmi_injected;
2841         events->nmi.pending = vcpu->arch.nmi_pending;
2842         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2843         events->nmi.pad = 0;
2844
2845         events->sipi_vector = vcpu->arch.sipi_vector;
2846
2847         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2848                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2849                          | KVM_VCPUEVENT_VALID_SHADOW);
2850         memset(&events->reserved, 0, sizeof(events->reserved));
2851 }
2852
2853 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2854                                               struct kvm_vcpu_events *events)
2855 {
2856         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2857                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2858                               | KVM_VCPUEVENT_VALID_SHADOW))
2859                 return -EINVAL;
2860
2861         vcpu->arch.exception.pending = events->exception.injected;
2862         vcpu->arch.exception.nr = events->exception.nr;
2863         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2864         vcpu->arch.exception.error_code = events->exception.error_code;
2865
2866         vcpu->arch.interrupt.pending = events->interrupt.injected;
2867         vcpu->arch.interrupt.nr = events->interrupt.nr;
2868         vcpu->arch.interrupt.soft = events->interrupt.soft;
2869         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2870                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2871                                                   events->interrupt.shadow);
2872
2873         vcpu->arch.nmi_injected = events->nmi.injected;
2874         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2875                 vcpu->arch.nmi_pending = events->nmi.pending;
2876         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2877
2878         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2879                 vcpu->arch.sipi_vector = events->sipi_vector;
2880
2881         kvm_make_request(KVM_REQ_EVENT, vcpu);
2882
2883         return 0;
2884 }
2885
2886 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2887                                              struct kvm_debugregs *dbgregs)
2888 {
2889         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2890         dbgregs->dr6 = vcpu->arch.dr6;
2891         dbgregs->dr7 = vcpu->arch.dr7;
2892         dbgregs->flags = 0;
2893         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2894 }
2895
2896 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2897                                             struct kvm_debugregs *dbgregs)
2898 {
2899         if (dbgregs->flags)
2900                 return -EINVAL;
2901
2902         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2903         vcpu->arch.dr6 = dbgregs->dr6;
2904         vcpu->arch.dr7 = dbgregs->dr7;
2905
2906         return 0;
2907 }
2908
2909 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2910                                          struct kvm_xsave *guest_xsave)
2911 {
2912         if (cpu_has_xsave)
2913                 memcpy(guest_xsave->region,
2914                         &vcpu->arch.guest_fpu.state->xsave,
2915                         xstate_size);
2916         else {
2917                 memcpy(guest_xsave->region,
2918                         &vcpu->arch.guest_fpu.state->fxsave,
2919                         sizeof(struct i387_fxsave_struct));
2920                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2921                         XSTATE_FPSSE;
2922         }
2923 }
2924
2925 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2926                                         struct kvm_xsave *guest_xsave)
2927 {
2928         u64 xstate_bv =
2929                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2930
2931         if (cpu_has_xsave)
2932                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2933                         guest_xsave->region, xstate_size);
2934         else {
2935                 if (xstate_bv & ~XSTATE_FPSSE)
2936                         return -EINVAL;
2937                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2938                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2939         }
2940         return 0;
2941 }
2942
2943 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2944                                         struct kvm_xcrs *guest_xcrs)
2945 {
2946         if (!cpu_has_xsave) {
2947                 guest_xcrs->nr_xcrs = 0;
2948                 return;
2949         }
2950
2951         guest_xcrs->nr_xcrs = 1;
2952         guest_xcrs->flags = 0;
2953         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2954         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2955 }
2956
2957 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2958                                        struct kvm_xcrs *guest_xcrs)
2959 {
2960         int i, r = 0;
2961
2962         if (!cpu_has_xsave)
2963                 return -EINVAL;
2964
2965         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2966                 return -EINVAL;
2967
2968         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2969                 /* Only support XCR0 currently */
2970                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2971                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2972                                 guest_xcrs->xcrs[0].value);
2973                         break;
2974                 }
2975         if (r)
2976                 r = -EINVAL;
2977         return r;
2978 }
2979
2980 long kvm_arch_vcpu_ioctl(struct file *filp,
2981                          unsigned int ioctl, unsigned long arg)
2982 {
2983         struct kvm_vcpu *vcpu = filp->private_data;
2984         void __user *argp = (void __user *)arg;
2985         int r;
2986         union {
2987                 struct kvm_lapic_state *lapic;
2988                 struct kvm_xsave *xsave;
2989                 struct kvm_xcrs *xcrs;
2990                 void *buffer;
2991         } u;
2992
2993         u.buffer = NULL;
2994         switch (ioctl) {
2995         case KVM_GET_LAPIC: {
2996                 r = -EINVAL;
2997                 if (!vcpu->arch.apic)
2998                         goto out;
2999                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3000
3001                 r = -ENOMEM;
3002                 if (!u.lapic)
3003                         goto out;
3004                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3005                 if (r)
3006                         goto out;
3007                 r = -EFAULT;
3008                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3009                         goto out;
3010                 r = 0;
3011                 break;
3012         }
3013         case KVM_SET_LAPIC: {
3014                 r = -EINVAL;
3015                 if (!vcpu->arch.apic)
3016                         goto out;
3017                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3018                 r = -ENOMEM;
3019                 if (!u.lapic)
3020                         goto out;
3021                 r = -EFAULT;
3022                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3023                         goto out;
3024                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3025                 if (r)
3026                         goto out;
3027                 r = 0;
3028                 break;
3029         }
3030         case KVM_INTERRUPT: {
3031                 struct kvm_interrupt irq;
3032
3033                 r = -EFAULT;
3034                 if (copy_from_user(&irq, argp, sizeof irq))
3035                         goto out;
3036                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3037                 if (r)
3038                         goto out;
3039                 r = 0;
3040                 break;
3041         }
3042         case KVM_NMI: {
3043                 r = kvm_vcpu_ioctl_nmi(vcpu);
3044                 if (r)
3045                         goto out;
3046                 r = 0;
3047                 break;
3048         }
3049         case KVM_SET_CPUID: {
3050                 struct kvm_cpuid __user *cpuid_arg = argp;
3051                 struct kvm_cpuid cpuid;
3052
3053                 r = -EFAULT;
3054                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3055                         goto out;
3056                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3057                 if (r)
3058                         goto out;
3059                 break;
3060         }
3061         case KVM_SET_CPUID2: {
3062                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3063                 struct kvm_cpuid2 cpuid;
3064
3065                 r = -EFAULT;
3066                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3067                         goto out;
3068                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3069                                               cpuid_arg->entries);
3070                 if (r)
3071                         goto out;
3072                 break;
3073         }
3074         case KVM_GET_CPUID2: {
3075                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3076                 struct kvm_cpuid2 cpuid;
3077
3078                 r = -EFAULT;
3079                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3080                         goto out;
3081                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3082                                               cpuid_arg->entries);
3083                 if (r)
3084                         goto out;
3085                 r = -EFAULT;
3086                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3087                         goto out;
3088                 r = 0;
3089                 break;
3090         }
3091         case KVM_GET_MSRS:
3092                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3093                 break;
3094         case KVM_SET_MSRS:
3095                 r = msr_io(vcpu, argp, do_set_msr, 0);
3096                 break;
3097         case KVM_TPR_ACCESS_REPORTING: {
3098                 struct kvm_tpr_access_ctl tac;
3099
3100                 r = -EFAULT;
3101                 if (copy_from_user(&tac, argp, sizeof tac))
3102                         goto out;
3103                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3104                 if (r)
3105                         goto out;
3106                 r = -EFAULT;
3107                 if (copy_to_user(argp, &tac, sizeof tac))
3108                         goto out;
3109                 r = 0;
3110                 break;
3111         };
3112         case KVM_SET_VAPIC_ADDR: {
3113                 struct kvm_vapic_addr va;
3114
3115                 r = -EINVAL;
3116                 if (!irqchip_in_kernel(vcpu->kvm))
3117                         goto out;
3118                 r = -EFAULT;
3119                 if (copy_from_user(&va, argp, sizeof va))
3120                         goto out;
3121                 r = 0;
3122                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3123                 break;
3124         }
3125         case KVM_X86_SETUP_MCE: {
3126                 u64 mcg_cap;
3127
3128                 r = -EFAULT;
3129                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3130                         goto out;
3131                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3132                 break;
3133         }
3134         case KVM_X86_SET_MCE: {
3135                 struct kvm_x86_mce mce;
3136
3137                 r = -EFAULT;
3138                 if (copy_from_user(&mce, argp, sizeof mce))
3139                         goto out;
3140                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3141                 break;
3142         }
3143         case KVM_GET_VCPU_EVENTS: {
3144                 struct kvm_vcpu_events events;
3145
3146                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3147
3148                 r = -EFAULT;
3149                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3150                         break;
3151                 r = 0;
3152                 break;
3153         }
3154         case KVM_SET_VCPU_EVENTS: {
3155                 struct kvm_vcpu_events events;
3156
3157                 r = -EFAULT;
3158                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3159                         break;
3160
3161                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3162                 break;
3163         }
3164         case KVM_GET_DEBUGREGS: {
3165                 struct kvm_debugregs dbgregs;
3166
3167                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3168
3169                 r = -EFAULT;
3170                 if (copy_to_user(argp, &dbgregs,
3171                                  sizeof(struct kvm_debugregs)))
3172                         break;
3173                 r = 0;
3174                 break;
3175         }
3176         case KVM_SET_DEBUGREGS: {
3177                 struct kvm_debugregs dbgregs;
3178
3179                 r = -EFAULT;
3180                 if (copy_from_user(&dbgregs, argp,
3181                                    sizeof(struct kvm_debugregs)))
3182                         break;
3183
3184                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3185                 break;
3186         }
3187         case KVM_GET_XSAVE: {
3188                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3189                 r = -ENOMEM;
3190                 if (!u.xsave)
3191                         break;
3192
3193                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3194
3195                 r = -EFAULT;
3196                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3197                         break;
3198                 r = 0;
3199                 break;
3200         }
3201         case KVM_SET_XSAVE: {
3202                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3203                 r = -ENOMEM;
3204                 if (!u.xsave)
3205                         break;
3206
3207                 r = -EFAULT;
3208                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3209                         break;
3210
3211                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3212                 break;
3213         }
3214         case KVM_GET_XCRS: {
3215                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3216                 r = -ENOMEM;
3217                 if (!u.xcrs)
3218                         break;
3219
3220                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3221
3222                 r = -EFAULT;
3223                 if (copy_to_user(argp, u.xcrs,
3224                                  sizeof(struct kvm_xcrs)))
3225                         break;
3226                 r = 0;
3227                 break;
3228         }
3229         case KVM_SET_XCRS: {
3230                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3231                 r = -ENOMEM;
3232                 if (!u.xcrs)
3233                         break;
3234
3235                 r = -EFAULT;
3236                 if (copy_from_user(u.xcrs, argp,
3237                                    sizeof(struct kvm_xcrs)))
3238                         break;
3239
3240                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3241                 break;
3242         }
3243         case KVM_SET_TSC_KHZ: {
3244                 u32 user_tsc_khz;
3245
3246                 r = -EINVAL;
3247                 if (!kvm_has_tsc_control)
3248                         break;
3249
3250                 user_tsc_khz = (u32)arg;
3251
3252                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3253                         goto out;
3254
3255                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3256
3257                 r = 0;
3258                 goto out;
3259         }
3260         case KVM_GET_TSC_KHZ: {
3261                 r = -EIO;
3262                 if (check_tsc_unstable())
3263                         goto out;
3264
3265                 r = vcpu_tsc_khz(vcpu);
3266
3267                 goto out;
3268         }
3269         default:
3270                 r = -EINVAL;
3271         }
3272 out:
3273         kfree(u.buffer);
3274         return r;
3275 }
3276
3277 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3278 {
3279         int ret;
3280
3281         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3282                 return -1;
3283         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3284         return ret;
3285 }
3286
3287 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3288                                               u64 ident_addr)
3289 {
3290         kvm->arch.ept_identity_map_addr = ident_addr;
3291         return 0;
3292 }
3293
3294 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3295                                           u32 kvm_nr_mmu_pages)
3296 {
3297         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3298                 return -EINVAL;
3299
3300         mutex_lock(&kvm->slots_lock);
3301         spin_lock(&kvm->mmu_lock);
3302
3303         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3304         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3305
3306         spin_unlock(&kvm->mmu_lock);
3307         mutex_unlock(&kvm->slots_lock);
3308         return 0;
3309 }
3310
3311 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3312 {
3313         return kvm->arch.n_max_mmu_pages;
3314 }
3315
3316 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3317 {
3318         int r;
3319
3320         r = 0;
3321         switch (chip->chip_id) {
3322         case KVM_IRQCHIP_PIC_MASTER:
3323                 memcpy(&chip->chip.pic,
3324                         &pic_irqchip(kvm)->pics[0],
3325                         sizeof(struct kvm_pic_state));
3326                 break;
3327         case KVM_IRQCHIP_PIC_SLAVE:
3328                 memcpy(&chip->chip.pic,
3329                         &pic_irqchip(kvm)->pics[1],
3330                         sizeof(struct kvm_pic_state));
3331                 break;
3332         case KVM_IRQCHIP_IOAPIC:
3333                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3334                 break;
3335         default:
3336                 r = -EINVAL;
3337                 break;
3338         }
3339         return r;
3340 }
3341
3342 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3343 {
3344         int r;
3345
3346         r = 0;
3347         switch (chip->chip_id) {
3348         case KVM_IRQCHIP_PIC_MASTER:
3349                 spin_lock(&pic_irqchip(kvm)->lock);
3350                 memcpy(&pic_irqchip(kvm)->pics[0],
3351                         &chip->chip.pic,
3352                         sizeof(struct kvm_pic_state));
3353                 spin_unlock(&pic_irqchip(kvm)->lock);
3354                 break;
3355         case KVM_IRQCHIP_PIC_SLAVE:
3356                 spin_lock(&pic_irqchip(kvm)->lock);
3357                 memcpy(&pic_irqchip(kvm)->pics[1],
3358                         &chip->chip.pic,
3359                         sizeof(struct kvm_pic_state));
3360                 spin_unlock(&pic_irqchip(kvm)->lock);
3361                 break;
3362         case KVM_IRQCHIP_IOAPIC:
3363                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3364                 break;
3365         default:
3366                 r = -EINVAL;
3367                 break;
3368         }
3369         kvm_pic_update_irq(pic_irqchip(kvm));
3370         return r;
3371 }
3372
3373 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3374 {
3375         int r = 0;
3376
3377         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3378         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3379         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3380         return r;
3381 }
3382
3383 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3384 {
3385         int r = 0;
3386
3387         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3388         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3389         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3390         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3391         return r;
3392 }
3393
3394 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3395 {
3396         int r = 0;
3397
3398         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3399         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3400                 sizeof(ps->channels));
3401         ps->flags = kvm->arch.vpit->pit_state.flags;
3402         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3403         memset(&ps->reserved, 0, sizeof(ps->reserved));
3404         return r;
3405 }
3406
3407 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3408 {
3409         int r = 0, start = 0;
3410         u32 prev_legacy, cur_legacy;
3411         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3412         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3413         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3414         if (!prev_legacy && cur_legacy)
3415                 start = 1;
3416         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3417                sizeof(kvm->arch.vpit->pit_state.channels));
3418         kvm->arch.vpit->pit_state.flags = ps->flags;
3419         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3420         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3421         return r;
3422 }
3423
3424 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3425                                  struct kvm_reinject_control *control)
3426 {
3427         if (!kvm->arch.vpit)
3428                 return -ENXIO;
3429         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3430         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3431         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3432         return 0;
3433 }
3434
3435 /*
3436  * Get (and clear) the dirty memory log for a memory slot.
3437  */
3438 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3439                                       struct kvm_dirty_log *log)
3440 {
3441         int r, i;
3442         struct kvm_memory_slot *memslot;
3443         unsigned long n;
3444         unsigned long is_dirty = 0;
3445
3446         mutex_lock(&kvm->slots_lock);
3447
3448         r = -EINVAL;
3449         if (log->slot >= KVM_MEMORY_SLOTS)
3450                 goto out;
3451
3452         memslot = &kvm->memslots->memslots[log->slot];
3453         r = -ENOENT;
3454         if (!memslot->dirty_bitmap)
3455                 goto out;
3456
3457         n = kvm_dirty_bitmap_bytes(memslot);
3458
3459         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3460                 is_dirty = memslot->dirty_bitmap[i];
3461
3462         /* If nothing is dirty, don't bother messing with page tables. */
3463         if (is_dirty) {
3464                 struct kvm_memslots *slots, *old_slots;
3465                 unsigned long *dirty_bitmap;
3466
3467                 dirty_bitmap = memslot->dirty_bitmap_head;
3468                 if (memslot->dirty_bitmap == dirty_bitmap)
3469                         dirty_bitmap += n / sizeof(long);
3470                 memset(dirty_bitmap, 0, n);
3471
3472                 r = -ENOMEM;
3473                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3474                 if (!slots)
3475                         goto out;
3476                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3477                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3478                 slots->generation++;
3479
3480                 old_slots = kvm->memslots;
3481                 rcu_assign_pointer(kvm->memslots, slots);
3482                 synchronize_srcu_expedited(&kvm->srcu);
3483                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3484                 kfree(old_slots);
3485
3486                 spin_lock(&kvm->mmu_lock);
3487                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3488                 spin_unlock(&kvm->mmu_lock);
3489
3490                 r = -EFAULT;
3491                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3492                         goto out;
3493         } else {
3494                 r = -EFAULT;
3495                 if (clear_user(log->dirty_bitmap, n))
3496                         goto out;
3497         }
3498
3499         r = 0;
3500 out:
3501         mutex_unlock(&kvm->slots_lock);
3502         return r;
3503 }
3504
3505 long kvm_arch_vm_ioctl(struct file *filp,
3506                        unsigned int ioctl, unsigned long arg)
3507 {
3508         struct kvm *kvm = filp->private_data;
3509         void __user *argp = (void __user *)arg;
3510         int r = -ENOTTY;
3511         /*
3512          * This union makes it completely explicit to gcc-3.x
3513          * that these two variables' stack usage should be
3514          * combined, not added together.
3515          */
3516         union {
3517                 struct kvm_pit_state ps;
3518                 struct kvm_pit_state2 ps2;
3519                 struct kvm_pit_config pit_config;
3520         } u;
3521
3522         switch (ioctl) {
3523         case KVM_SET_TSS_ADDR:
3524                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3525                 if (r < 0)
3526                         goto out;
3527                 break;
3528         case KVM_SET_IDENTITY_MAP_ADDR: {
3529                 u64 ident_addr;
3530
3531                 r = -EFAULT;
3532                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3533                         goto out;
3534                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3535                 if (r < 0)
3536                         goto out;
3537                 break;
3538         }
3539         case KVM_SET_NR_MMU_PAGES:
3540                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3541                 if (r)
3542                         goto out;
3543                 break;
3544         case KVM_GET_NR_MMU_PAGES:
3545                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3546                 break;
3547         case KVM_CREATE_IRQCHIP: {
3548                 struct kvm_pic *vpic;
3549
3550                 mutex_lock(&kvm->lock);
3551                 r = -EEXIST;
3552                 if (kvm->arch.vpic)
3553                         goto create_irqchip_unlock;
3554                 r = -ENOMEM;
3555                 vpic = kvm_create_pic(kvm);
3556                 if (vpic) {
3557                         r = kvm_ioapic_init(kvm);
3558                         if (r) {
3559                                 mutex_lock(&kvm->slots_lock);
3560                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3561                                                           &vpic->dev);
3562                                 mutex_unlock(&kvm->slots_lock);
3563                                 kfree(vpic);
3564                                 goto create_irqchip_unlock;
3565                         }
3566                 } else
3567                         goto create_irqchip_unlock;
3568                 smp_wmb();
3569                 kvm->arch.vpic = vpic;
3570                 smp_wmb();
3571                 r = kvm_setup_default_irq_routing(kvm);
3572                 if (r) {
3573                         mutex_lock(&kvm->slots_lock);
3574                         mutex_lock(&kvm->irq_lock);
3575                         kvm_ioapic_destroy(kvm);
3576                         kvm_destroy_pic(kvm);
3577                         mutex_unlock(&kvm->irq_lock);
3578                         mutex_unlock(&kvm->slots_lock);
3579                 }
3580         create_irqchip_unlock:
3581                 mutex_unlock(&kvm->lock);
3582                 break;
3583         }
3584         case KVM_CREATE_PIT:
3585                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3586                 goto create_pit;
3587         case KVM_CREATE_PIT2:
3588                 r = -EFAULT;
3589                 if (copy_from_user(&u.pit_config, argp,
3590                                    sizeof(struct kvm_pit_config)))
3591                         goto out;
3592         create_pit:
3593                 mutex_lock(&kvm->slots_lock);
3594                 r = -EEXIST;
3595                 if (kvm->arch.vpit)
3596                         goto create_pit_unlock;
3597                 r = -ENOMEM;
3598                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3599                 if (kvm->arch.vpit)
3600                         r = 0;
3601         create_pit_unlock:
3602                 mutex_unlock(&kvm->slots_lock);
3603                 break;
3604         case KVM_IRQ_LINE_STATUS:
3605         case KVM_IRQ_LINE: {
3606                 struct kvm_irq_level irq_event;
3607
3608                 r = -EFAULT;
3609                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3610                         goto out;
3611                 r = -ENXIO;
3612                 if (irqchip_in_kernel(kvm)) {
3613                         __s32 status;
3614                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3615                                         irq_event.irq, irq_event.level);
3616                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3617                                 r = -EFAULT;
3618                                 irq_event.status = status;
3619                                 if (copy_to_user(argp, &irq_event,
3620                                                         sizeof irq_event))
3621                                         goto out;
3622                         }
3623                         r = 0;
3624                 }
3625                 break;
3626         }
3627         case KVM_GET_IRQCHIP: {
3628                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3629                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3630
3631                 r = -ENOMEM;
3632                 if (!chip)
3633                         goto out;
3634                 r = -EFAULT;
3635                 if (copy_from_user(chip, argp, sizeof *chip))
3636                         goto get_irqchip_out;
3637                 r = -ENXIO;
3638                 if (!irqchip_in_kernel(kvm))
3639                         goto get_irqchip_out;
3640                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3641                 if (r)
3642                         goto get_irqchip_out;
3643                 r = -EFAULT;
3644                 if (copy_to_user(argp, chip, sizeof *chip))
3645                         goto get_irqchip_out;
3646                 r = 0;
3647         get_irqchip_out:
3648                 kfree(chip);
3649                 if (r)
3650                         goto out;
3651                 break;
3652         }
3653         case KVM_SET_IRQCHIP: {
3654                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3655                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3656
3657                 r = -ENOMEM;
3658                 if (!chip)
3659                         goto out;
3660                 r = -EFAULT;
3661                 if (copy_from_user(chip, argp, sizeof *chip))
3662                         goto set_irqchip_out;
3663                 r = -ENXIO;
3664                 if (!irqchip_in_kernel(kvm))
3665                         goto set_irqchip_out;
3666                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3667                 if (r)
3668                         goto set_irqchip_out;
3669                 r = 0;
3670         set_irqchip_out:
3671                 kfree(chip);
3672                 if (r)
3673                         goto out;
3674                 break;
3675         }
3676         case KVM_GET_PIT: {
3677                 r = -EFAULT;
3678                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3679                         goto out;
3680                 r = -ENXIO;
3681                 if (!kvm->arch.vpit)
3682                         goto out;
3683                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3684                 if (r)
3685                         goto out;
3686                 r = -EFAULT;
3687                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3688                         goto out;
3689                 r = 0;
3690                 break;
3691         }
3692         case KVM_SET_PIT: {
3693                 r = -EFAULT;
3694                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3695                         goto out;
3696                 r = -ENXIO;
3697                 if (!kvm->arch.vpit)
3698                         goto out;
3699                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3700                 if (r)
3701                         goto out;
3702                 r = 0;
3703                 break;
3704         }
3705         case KVM_GET_PIT2: {
3706                 r = -ENXIO;
3707                 if (!kvm->arch.vpit)
3708                         goto out;
3709                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3710                 if (r)
3711                         goto out;
3712                 r = -EFAULT;
3713                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3714                         goto out;
3715                 r = 0;
3716                 break;
3717         }
3718         case KVM_SET_PIT2: {
3719                 r = -EFAULT;
3720                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3721                         goto out;
3722                 r = -ENXIO;
3723                 if (!kvm->arch.vpit)
3724                         goto out;
3725                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3726                 if (r)
3727                         goto out;
3728                 r = 0;
3729                 break;
3730         }
3731         case KVM_REINJECT_CONTROL: {
3732                 struct kvm_reinject_control control;
3733                 r =  -EFAULT;
3734                 if (copy_from_user(&control, argp, sizeof(control)))
3735                         goto out;
3736                 r = kvm_vm_ioctl_reinject(kvm, &control);
3737                 if (r)
3738                         goto out;
3739                 r = 0;
3740                 break;
3741         }
3742         case KVM_XEN_HVM_CONFIG: {
3743                 r = -EFAULT;
3744                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3745                                    sizeof(struct kvm_xen_hvm_config)))
3746                         goto out;
3747                 r = -EINVAL;
3748                 if (kvm->arch.xen_hvm_config.flags)
3749                         goto out;
3750                 r = 0;
3751                 break;
3752         }
3753         case KVM_SET_CLOCK: {
3754                 struct kvm_clock_data user_ns;
3755                 u64 now_ns;
3756                 s64 delta;
3757
3758                 r = -EFAULT;
3759                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3760                         goto out;
3761
3762                 r = -EINVAL;
3763                 if (user_ns.flags)
3764                         goto out;
3765
3766                 r = 0;
3767                 local_irq_disable();
3768                 now_ns = get_kernel_ns();
3769                 delta = user_ns.clock - now_ns;
3770                 local_irq_enable();
3771                 kvm->arch.kvmclock_offset = delta;
3772                 break;
3773         }
3774         case KVM_GET_CLOCK: {
3775                 struct kvm_clock_data user_ns;
3776                 u64 now_ns;
3777
3778                 local_irq_disable();
3779                 now_ns = get_kernel_ns();
3780                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3781                 local_irq_enable();
3782                 user_ns.flags = 0;
3783                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3784
3785                 r = -EFAULT;
3786                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3787                         goto out;
3788                 r = 0;
3789                 break;
3790         }
3791
3792         default:
3793                 ;
3794         }
3795 out:
3796         return r;
3797 }
3798
3799 static void kvm_init_msr_list(void)
3800 {
3801         u32 dummy[2];
3802         unsigned i, j;
3803
3804         /* skip the first msrs in the list. KVM-specific */
3805         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3806                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3807                         continue;
3808                 if (j < i)
3809                         msrs_to_save[j] = msrs_to_save[i];
3810                 j++;
3811         }
3812         num_msrs_to_save = j;
3813 }
3814
3815 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3816                            const void *v)
3817 {
3818         int handled = 0;
3819         int n;
3820
3821         do {
3822                 n = min(len, 8);
3823                 if (!(vcpu->arch.apic &&
3824                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3825                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3826                         break;
3827                 handled += n;
3828                 addr += n;
3829                 len -= n;
3830                 v += n;
3831         } while (len);
3832
3833         return handled;
3834 }
3835
3836 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3837 {
3838         int handled = 0;
3839         int n;
3840
3841         do {
3842                 n = min(len, 8);
3843                 if (!(vcpu->arch.apic &&
3844                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3845                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3846                         break;
3847                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3848                 handled += n;
3849                 addr += n;
3850                 len -= n;
3851                 v += n;
3852         } while (len);
3853
3854         return handled;
3855 }
3856
3857 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3858                         struct kvm_segment *var, int seg)
3859 {
3860         kvm_x86_ops->set_segment(vcpu, var, seg);
3861 }
3862
3863 void kvm_get_segment(struct kvm_vcpu *vcpu,
3864                      struct kvm_segment *var, int seg)
3865 {
3866         kvm_x86_ops->get_segment(vcpu, var, seg);
3867 }
3868
3869 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3870 {
3871         return gpa;
3872 }
3873
3874 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3875 {
3876         gpa_t t_gpa;
3877         struct x86_exception exception;
3878
3879         BUG_ON(!mmu_is_nested(vcpu));
3880
3881         /* NPT walks are always user-walks */
3882         access |= PFERR_USER_MASK;
3883         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3884
3885         return t_gpa;
3886 }
3887
3888 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3889                               struct x86_exception *exception)
3890 {
3891         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3892         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3893 }
3894
3895  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3896                                 struct x86_exception *exception)
3897 {
3898         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3899         access |= PFERR_FETCH_MASK;
3900         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3901 }
3902
3903 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3904                                struct x86_exception *exception)
3905 {
3906         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3907         access |= PFERR_WRITE_MASK;
3908         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3909 }
3910
3911 /* uses this to access any guest's mapped memory without checking CPL */
3912 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3913                                 struct x86_exception *exception)
3914 {
3915         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3916 }
3917
3918 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3919                                       struct kvm_vcpu *vcpu, u32 access,
3920                                       struct x86_exception *exception)
3921 {
3922         void *data = val;
3923         int r = X86EMUL_CONTINUE;
3924
3925         while (bytes) {
3926                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3927                                                             exception);
3928                 unsigned offset = addr & (PAGE_SIZE-1);
3929                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3930                 int ret;
3931
3932                 if (gpa == UNMAPPED_GVA)
3933                         return X86EMUL_PROPAGATE_FAULT;
3934                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3935                 if (ret < 0) {
3936                         r = X86EMUL_IO_NEEDED;
3937                         goto out;
3938                 }
3939
3940                 bytes -= toread;
3941                 data += toread;
3942                 addr += toread;
3943         }
3944 out:
3945         return r;
3946 }
3947
3948 /* used for instruction fetching */
3949 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3950                                 gva_t addr, void *val, unsigned int bytes,
3951                                 struct x86_exception *exception)
3952 {
3953         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3954         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3955
3956         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3957                                           access | PFERR_FETCH_MASK,
3958                                           exception);
3959 }
3960
3961 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3962                                gva_t addr, void *val, unsigned int bytes,
3963                                struct x86_exception *exception)
3964 {
3965         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3966         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3967
3968         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3969                                           exception);
3970 }
3971 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3972
3973 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3974                                       gva_t addr, void *val, unsigned int bytes,
3975                                       struct x86_exception *exception)
3976 {
3977         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3978         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3979 }
3980
3981 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3982                                        gva_t addr, void *val,
3983                                        unsigned int bytes,
3984                                        struct x86_exception *exception)
3985 {
3986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3987         void *data = val;
3988         int r = X86EMUL_CONTINUE;
3989
3990         while (bytes) {
3991                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3992                                                              PFERR_WRITE_MASK,
3993                                                              exception);
3994                 unsigned offset = addr & (PAGE_SIZE-1);
3995                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3996                 int ret;
3997
3998                 if (gpa == UNMAPPED_GVA)
3999                         return X86EMUL_PROPAGATE_FAULT;
4000                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4001                 if (ret < 0) {
4002                         r = X86EMUL_IO_NEEDED;
4003                         goto out;
4004                 }
4005
4006                 bytes -= towrite;
4007                 data += towrite;
4008                 addr += towrite;
4009         }
4010 out:
4011         return r;
4012 }
4013 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4014
4015 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4016                                 gpa_t *gpa, struct x86_exception *exception,
4017                                 bool write)
4018 {
4019         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4020
4021         if (vcpu_match_mmio_gva(vcpu, gva) &&
4022                   check_write_user_access(vcpu, write, access,
4023                   vcpu->arch.access)) {
4024                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4025                                         (gva & (PAGE_SIZE - 1));
4026                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4027                 return 1;
4028         }
4029
4030         if (write)
4031                 access |= PFERR_WRITE_MASK;
4032
4033         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4034
4035         if (*gpa == UNMAPPED_GVA)
4036                 return -1;
4037
4038         /* For APIC access vmexit */
4039         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4040                 return 1;
4041
4042         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4043                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4044                 return 1;
4045         }
4046
4047         return 0;
4048 }
4049
4050 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4051                                   unsigned long addr,
4052                                   void *val,
4053                                   unsigned int bytes,
4054                                   struct x86_exception *exception)
4055 {
4056         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4057         gpa_t gpa;
4058         int handled, ret;
4059
4060         if (vcpu->mmio_read_completed) {
4061                 memcpy(val, vcpu->mmio_data, bytes);
4062                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4063                                vcpu->mmio_phys_addr, *(u64 *)val);
4064                 vcpu->mmio_read_completed = 0;
4065                 return X86EMUL_CONTINUE;
4066         }
4067
4068         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, false);
4069
4070         if (ret < 0)
4071                 return X86EMUL_PROPAGATE_FAULT;
4072
4073         if (ret)
4074                 goto mmio;
4075
4076         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
4077             == X86EMUL_CONTINUE)
4078                 return X86EMUL_CONTINUE;
4079
4080 mmio:
4081         /*
4082          * Is this MMIO handled locally?
4083          */
4084         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
4085
4086         if (handled == bytes)
4087                 return X86EMUL_CONTINUE;
4088
4089         gpa += handled;
4090         bytes -= handled;
4091         val += handled;
4092
4093         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4094
4095         vcpu->mmio_needed = 1;
4096         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4097         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4098         vcpu->mmio_size = bytes;
4099         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4100         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
4101         vcpu->mmio_index = 0;
4102
4103         return X86EMUL_IO_NEEDED;
4104 }
4105
4106 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4107                         const void *val, int bytes)
4108 {
4109         int ret;
4110
4111         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4112         if (ret < 0)
4113                 return 0;
4114         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4115         return 1;
4116 }
4117
4118 static int emulator_write_emulated_onepage(unsigned long addr,
4119                                            const void *val,
4120                                            unsigned int bytes,
4121                                            struct x86_exception *exception,
4122                                            struct kvm_vcpu *vcpu)
4123 {
4124         gpa_t gpa;
4125         int handled, ret;
4126
4127         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, true);
4128
4129         if (ret < 0)
4130                 return X86EMUL_PROPAGATE_FAULT;
4131
4132         /* For APIC access vmexit */
4133         if (ret)
4134                 goto mmio;
4135
4136         if (emulator_write_phys(vcpu, gpa, val, bytes))
4137                 return X86EMUL_CONTINUE;
4138
4139 mmio:
4140         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4141         /*
4142          * Is this MMIO handled locally?
4143          */
4144         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4145         if (handled == bytes)
4146                 return X86EMUL_CONTINUE;
4147
4148         gpa += handled;
4149         bytes -= handled;
4150         val += handled;
4151
4152         vcpu->mmio_needed = 1;
4153         memcpy(vcpu->mmio_data, val, bytes);
4154         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4155         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4156         vcpu->mmio_size = bytes;
4157         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4158         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4159         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4160         vcpu->mmio_index = 0;
4161
4162         return X86EMUL_CONTINUE;
4163 }
4164
4165 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4166                             unsigned long addr,
4167                             const void *val,
4168                             unsigned int bytes,
4169                             struct x86_exception *exception)
4170 {
4171         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4172
4173         /* Crossing a page boundary? */
4174         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4175                 int rc, now;
4176
4177                 now = -addr & ~PAGE_MASK;
4178                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4179                                                      vcpu);
4180                 if (rc != X86EMUL_CONTINUE)
4181                         return rc;
4182                 addr += now;
4183                 val += now;
4184                 bytes -= now;
4185         }
4186         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4187                                                vcpu);
4188 }
4189
4190 #define CMPXCHG_TYPE(t, ptr, old, new) \
4191         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4192
4193 #ifdef CONFIG_X86_64
4194 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4195 #else
4196 #  define CMPXCHG64(ptr, old, new) \
4197         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4198 #endif
4199
4200 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4201                                      unsigned long addr,
4202                                      const void *old,
4203                                      const void *new,
4204                                      unsigned int bytes,
4205                                      struct x86_exception *exception)
4206 {
4207         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4208         gpa_t gpa;
4209         struct page *page;
4210         char *kaddr;
4211         bool exchanged;
4212
4213         /* guests cmpxchg8b have to be emulated atomically */
4214         if (bytes > 8 || (bytes & (bytes - 1)))
4215                 goto emul_write;
4216
4217         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4218
4219         if (gpa == UNMAPPED_GVA ||
4220             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4221                 goto emul_write;
4222
4223         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4224                 goto emul_write;
4225
4226         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4227         if (is_error_page(page)) {
4228                 kvm_release_page_clean(page);
4229                 goto emul_write;
4230         }
4231
4232         kaddr = kmap_atomic(page, KM_USER0);
4233         kaddr += offset_in_page(gpa);
4234         switch (bytes) {
4235         case 1:
4236                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4237                 break;
4238         case 2:
4239                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4240                 break;
4241         case 4:
4242                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4243                 break;
4244         case 8:
4245                 exchanged = CMPXCHG64(kaddr, old, new);
4246                 break;
4247         default:
4248                 BUG();
4249         }
4250         kunmap_atomic(kaddr, KM_USER0);
4251         kvm_release_page_dirty(page);
4252
4253         if (!exchanged)
4254                 return X86EMUL_CMPXCHG_FAILED;
4255
4256         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4257
4258         return X86EMUL_CONTINUE;
4259
4260 emul_write:
4261         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4262
4263         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4264 }
4265
4266 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4267 {
4268         /* TODO: String I/O for in kernel device */
4269         int r;
4270
4271         if (vcpu->arch.pio.in)
4272                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4273                                     vcpu->arch.pio.size, pd);
4274         else
4275                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4276                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4277                                      pd);
4278         return r;
4279 }
4280
4281
4282 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4283                                     int size, unsigned short port, void *val,
4284                                     unsigned int count)
4285 {
4286         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4287
4288         if (vcpu->arch.pio.count)
4289                 goto data_avail;
4290
4291         trace_kvm_pio(0, port, size, count);
4292
4293         vcpu->arch.pio.port = port;
4294         vcpu->arch.pio.in = 1;
4295         vcpu->arch.pio.count  = count;
4296         vcpu->arch.pio.size = size;
4297
4298         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4299         data_avail:
4300                 memcpy(val, vcpu->arch.pio_data, size * count);
4301                 vcpu->arch.pio.count = 0;
4302                 return 1;
4303         }
4304
4305         vcpu->run->exit_reason = KVM_EXIT_IO;
4306         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4307         vcpu->run->io.size = size;
4308         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4309         vcpu->run->io.count = count;
4310         vcpu->run->io.port = port;
4311
4312         return 0;
4313 }
4314
4315 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4316                                      int size, unsigned short port,
4317                                      const void *val, unsigned int count)
4318 {
4319         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4320
4321         trace_kvm_pio(1, port, size, count);
4322
4323         vcpu->arch.pio.port = port;
4324         vcpu->arch.pio.in = 0;
4325         vcpu->arch.pio.count = count;
4326         vcpu->arch.pio.size = size;
4327
4328         memcpy(vcpu->arch.pio_data, val, size * count);
4329
4330         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4331                 vcpu->arch.pio.count = 0;
4332                 return 1;
4333         }
4334
4335         vcpu->run->exit_reason = KVM_EXIT_IO;
4336         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4337         vcpu->run->io.size = size;
4338         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4339         vcpu->run->io.count = count;
4340         vcpu->run->io.port = port;
4341
4342         return 0;
4343 }
4344
4345 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4346 {
4347         return kvm_x86_ops->get_segment_base(vcpu, seg);
4348 }
4349
4350 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4351 {
4352         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4353 }
4354
4355 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4356 {
4357         if (!need_emulate_wbinvd(vcpu))
4358                 return X86EMUL_CONTINUE;
4359
4360         if (kvm_x86_ops->has_wbinvd_exit()) {
4361                 int cpu = get_cpu();
4362
4363                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4364                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4365                                 wbinvd_ipi, NULL, 1);
4366                 put_cpu();
4367                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4368         } else
4369                 wbinvd();
4370         return X86EMUL_CONTINUE;
4371 }
4372 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4373
4374 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4375 {
4376         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4377 }
4378
4379 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4380 {
4381         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4382 }
4383
4384 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4385 {
4386
4387         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4388 }
4389
4390 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4391 {
4392         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4393 }
4394
4395 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4396 {
4397         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4398         unsigned long value;
4399
4400         switch (cr) {
4401         case 0:
4402                 value = kvm_read_cr0(vcpu);
4403                 break;
4404         case 2:
4405                 value = vcpu->arch.cr2;
4406                 break;
4407         case 3:
4408                 value = kvm_read_cr3(vcpu);
4409                 break;
4410         case 4:
4411                 value = kvm_read_cr4(vcpu);
4412                 break;
4413         case 8:
4414                 value = kvm_get_cr8(vcpu);
4415                 break;
4416         default:
4417                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4418                 return 0;
4419         }
4420
4421         return value;
4422 }
4423
4424 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4425 {
4426         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4427         int res = 0;
4428
4429         switch (cr) {
4430         case 0:
4431                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4432                 break;
4433         case 2:
4434                 vcpu->arch.cr2 = val;
4435                 break;
4436         case 3:
4437                 res = kvm_set_cr3(vcpu, val);
4438                 break;
4439         case 4:
4440                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4441                 break;
4442         case 8:
4443                 res = kvm_set_cr8(vcpu, val);
4444                 break;
4445         default:
4446                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4447                 res = -1;
4448         }
4449
4450         return res;
4451 }
4452
4453 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4454 {
4455         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4456 }
4457
4458 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4459 {
4460         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4461 }
4462
4463 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4464 {
4465         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4466 }
4467
4468 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4469 {
4470         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4471 }
4472
4473 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4474 {
4475         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4476 }
4477
4478 static unsigned long emulator_get_cached_segment_base(
4479         struct x86_emulate_ctxt *ctxt, int seg)
4480 {
4481         return get_segment_base(emul_to_vcpu(ctxt), seg);
4482 }
4483
4484 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4485                                  struct desc_struct *desc, u32 *base3,
4486                                  int seg)
4487 {
4488         struct kvm_segment var;
4489
4490         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4491         *selector = var.selector;
4492
4493         if (var.unusable)
4494                 return false;
4495
4496         if (var.g)
4497                 var.limit >>= 12;
4498         set_desc_limit(desc, var.limit);
4499         set_desc_base(desc, (unsigned long)var.base);
4500 #ifdef CONFIG_X86_64
4501         if (base3)
4502                 *base3 = var.base >> 32;
4503 #endif
4504         desc->type = var.type;
4505         desc->s = var.s;
4506         desc->dpl = var.dpl;
4507         desc->p = var.present;
4508         desc->avl = var.avl;
4509         desc->l = var.l;
4510         desc->d = var.db;
4511         desc->g = var.g;
4512
4513         return true;
4514 }
4515
4516 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4517                                  struct desc_struct *desc, u32 base3,
4518                                  int seg)
4519 {
4520         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4521         struct kvm_segment var;
4522
4523         var.selector = selector;
4524         var.base = get_desc_base(desc);
4525 #ifdef CONFIG_X86_64
4526         var.base |= ((u64)base3) << 32;
4527 #endif
4528         var.limit = get_desc_limit(desc);
4529         if (desc->g)
4530                 var.limit = (var.limit << 12) | 0xfff;
4531         var.type = desc->type;
4532         var.present = desc->p;
4533         var.dpl = desc->dpl;
4534         var.db = desc->d;
4535         var.s = desc->s;
4536         var.l = desc->l;
4537         var.g = desc->g;
4538         var.avl = desc->avl;
4539         var.present = desc->p;
4540         var.unusable = !var.present;
4541         var.padding = 0;
4542
4543         kvm_set_segment(vcpu, &var, seg);
4544         return;
4545 }
4546
4547 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4548                             u32 msr_index, u64 *pdata)
4549 {
4550         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4551 }
4552
4553 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4554                             u32 msr_index, u64 data)
4555 {
4556         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4557 }
4558
4559 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4560 {
4561         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4562 }
4563
4564 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4565 {
4566         preempt_disable();
4567         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4568         /*
4569          * CR0.TS may reference the host fpu state, not the guest fpu state,
4570          * so it may be clear at this point.
4571          */
4572         clts();
4573 }
4574
4575 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4576 {
4577         preempt_enable();
4578 }
4579
4580 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4581                               struct x86_instruction_info *info,
4582                               enum x86_intercept_stage stage)
4583 {
4584         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4585 }
4586
4587 static struct x86_emulate_ops emulate_ops = {
4588         .read_std            = kvm_read_guest_virt_system,
4589         .write_std           = kvm_write_guest_virt_system,
4590         .fetch               = kvm_fetch_guest_virt,
4591         .read_emulated       = emulator_read_emulated,
4592         .write_emulated      = emulator_write_emulated,
4593         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4594         .invlpg              = emulator_invlpg,
4595         .pio_in_emulated     = emulator_pio_in_emulated,
4596         .pio_out_emulated    = emulator_pio_out_emulated,
4597         .get_segment         = emulator_get_segment,
4598         .set_segment         = emulator_set_segment,
4599         .get_cached_segment_base = emulator_get_cached_segment_base,
4600         .get_gdt             = emulator_get_gdt,
4601         .get_idt             = emulator_get_idt,
4602         .set_gdt             = emulator_set_gdt,
4603         .set_idt             = emulator_set_idt,
4604         .get_cr              = emulator_get_cr,
4605         .set_cr              = emulator_set_cr,
4606         .cpl                 = emulator_get_cpl,
4607         .get_dr              = emulator_get_dr,
4608         .set_dr              = emulator_set_dr,
4609         .set_msr             = emulator_set_msr,
4610         .get_msr             = emulator_get_msr,
4611         .halt                = emulator_halt,
4612         .wbinvd              = emulator_wbinvd,
4613         .fix_hypercall       = emulator_fix_hypercall,
4614         .get_fpu             = emulator_get_fpu,
4615         .put_fpu             = emulator_put_fpu,
4616         .intercept           = emulator_intercept,
4617 };
4618
4619 static void cache_all_regs(struct kvm_vcpu *vcpu)
4620 {
4621         kvm_register_read(vcpu, VCPU_REGS_RAX);
4622         kvm_register_read(vcpu, VCPU_REGS_RSP);
4623         kvm_register_read(vcpu, VCPU_REGS_RIP);
4624         vcpu->arch.regs_dirty = ~0;
4625 }
4626
4627 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4628 {
4629         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4630         /*
4631          * an sti; sti; sequence only disable interrupts for the first
4632          * instruction. So, if the last instruction, be it emulated or
4633          * not, left the system with the INT_STI flag enabled, it
4634          * means that the last instruction is an sti. We should not
4635          * leave the flag on in this case. The same goes for mov ss
4636          */
4637         if (!(int_shadow & mask))
4638                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4639 }
4640
4641 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4642 {
4643         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4644         if (ctxt->exception.vector == PF_VECTOR)
4645                 kvm_propagate_fault(vcpu, &ctxt->exception);
4646         else if (ctxt->exception.error_code_valid)
4647                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4648                                       ctxt->exception.error_code);
4649         else
4650                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4651 }
4652
4653 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4654                               const unsigned long *regs)
4655 {
4656         memset(&ctxt->twobyte, 0,
4657                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4658         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4659
4660         ctxt->fetch.start = 0;
4661         ctxt->fetch.end = 0;
4662         ctxt->io_read.pos = 0;
4663         ctxt->io_read.end = 0;
4664         ctxt->mem_read.pos = 0;
4665         ctxt->mem_read.end = 0;
4666 }
4667
4668 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4669 {
4670         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4671         int cs_db, cs_l;
4672
4673         /*
4674          * TODO: fix emulate.c to use guest_read/write_register
4675          * instead of direct ->regs accesses, can save hundred cycles
4676          * on Intel for instructions that don't read/change RSP, for
4677          * for example.
4678          */
4679         cache_all_regs(vcpu);
4680
4681         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4682
4683         ctxt->eflags = kvm_get_rflags(vcpu);
4684         ctxt->eip = kvm_rip_read(vcpu);
4685         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4686                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4687                      cs_l                               ? X86EMUL_MODE_PROT64 :
4688                      cs_db                              ? X86EMUL_MODE_PROT32 :
4689                                                           X86EMUL_MODE_PROT16;
4690         ctxt->guest_mode = is_guest_mode(vcpu);
4691
4692         init_decode_cache(ctxt, vcpu->arch.regs);
4693         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4694 }
4695
4696 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4697 {
4698         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4699         int ret;
4700
4701         init_emulate_ctxt(vcpu);
4702
4703         ctxt->op_bytes = 2;
4704         ctxt->ad_bytes = 2;
4705         ctxt->_eip = ctxt->eip + inc_eip;
4706         ret = emulate_int_real(ctxt, irq);
4707
4708         if (ret != X86EMUL_CONTINUE)
4709                 return EMULATE_FAIL;
4710
4711         ctxt->eip = ctxt->_eip;
4712         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4713         kvm_rip_write(vcpu, ctxt->eip);
4714         kvm_set_rflags(vcpu, ctxt->eflags);
4715
4716         if (irq == NMI_VECTOR)
4717                 vcpu->arch.nmi_pending = false;
4718         else
4719                 vcpu->arch.interrupt.pending = false;
4720
4721         return EMULATE_DONE;
4722 }
4723 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4724
4725 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4726 {
4727         int r = EMULATE_DONE;
4728
4729         ++vcpu->stat.insn_emulation_fail;
4730         trace_kvm_emulate_insn_failed(vcpu);
4731         if (!is_guest_mode(vcpu)) {
4732                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4733                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4734                 vcpu->run->internal.ndata = 0;
4735                 r = EMULATE_FAIL;
4736         }
4737         kvm_queue_exception(vcpu, UD_VECTOR);
4738
4739         return r;
4740 }
4741
4742 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4743 {
4744         gpa_t gpa;
4745
4746         if (tdp_enabled)
4747                 return false;
4748
4749         /*
4750          * if emulation was due to access to shadowed page table
4751          * and it failed try to unshadow page and re-entetr the
4752          * guest to let CPU execute the instruction.
4753          */
4754         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4755                 return true;
4756
4757         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4758
4759         if (gpa == UNMAPPED_GVA)
4760                 return true; /* let cpu generate fault */
4761
4762         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4763                 return true;
4764
4765         return false;
4766 }
4767
4768 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4769                             unsigned long cr2,
4770                             int emulation_type,
4771                             void *insn,
4772                             int insn_len)
4773 {
4774         int r;
4775         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4776         bool writeback = true;
4777
4778         kvm_clear_exception_queue(vcpu);
4779
4780         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4781                 init_emulate_ctxt(vcpu);
4782                 ctxt->interruptibility = 0;
4783                 ctxt->have_exception = false;
4784                 ctxt->perm_ok = false;
4785
4786                 ctxt->only_vendor_specific_insn
4787                         = emulation_type & EMULTYPE_TRAP_UD;
4788
4789                 r = x86_decode_insn(ctxt, insn, insn_len);
4790
4791                 trace_kvm_emulate_insn_start(vcpu);
4792                 ++vcpu->stat.insn_emulation;
4793                 if (r)  {
4794                         if (emulation_type & EMULTYPE_TRAP_UD)
4795                                 return EMULATE_FAIL;
4796                         if (reexecute_instruction(vcpu, cr2))
4797                                 return EMULATE_DONE;
4798                         if (emulation_type & EMULTYPE_SKIP)
4799                                 return EMULATE_FAIL;
4800                         return handle_emulation_failure(vcpu);
4801                 }
4802         }
4803
4804         if (emulation_type & EMULTYPE_SKIP) {
4805                 kvm_rip_write(vcpu, ctxt->_eip);
4806                 return EMULATE_DONE;
4807         }
4808
4809         /* this is needed for vmware backdoor interface to work since it
4810            changes registers values  during IO operation */
4811         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4812                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4813                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4814         }
4815
4816 restart:
4817         r = x86_emulate_insn(ctxt);
4818
4819         if (r == EMULATION_INTERCEPTED)
4820                 return EMULATE_DONE;
4821
4822         if (r == EMULATION_FAILED) {
4823                 if (reexecute_instruction(vcpu, cr2))
4824                         return EMULATE_DONE;
4825
4826                 return handle_emulation_failure(vcpu);
4827         }
4828
4829         if (ctxt->have_exception) {
4830                 inject_emulated_exception(vcpu);
4831                 r = EMULATE_DONE;
4832         } else if (vcpu->arch.pio.count) {
4833                 if (!vcpu->arch.pio.in)
4834                         vcpu->arch.pio.count = 0;
4835                 else
4836                         writeback = false;
4837                 r = EMULATE_DO_MMIO;
4838         } else if (vcpu->mmio_needed) {
4839                 if (!vcpu->mmio_is_write)
4840                         writeback = false;
4841                 r = EMULATE_DO_MMIO;
4842         } else if (r == EMULATION_RESTART)
4843                 goto restart;
4844         else
4845                 r = EMULATE_DONE;
4846
4847         if (writeback) {
4848                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4849                 kvm_set_rflags(vcpu, ctxt->eflags);
4850                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4851                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4852                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4853                 kvm_rip_write(vcpu, ctxt->eip);
4854         } else
4855                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4856
4857         return r;
4858 }
4859 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4860
4861 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4862 {
4863         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4864         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4865                                             size, port, &val, 1);
4866         /* do not return to emulator after return from userspace */
4867         vcpu->arch.pio.count = 0;
4868         return ret;
4869 }
4870 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4871
4872 static void tsc_bad(void *info)
4873 {
4874         __this_cpu_write(cpu_tsc_khz, 0);
4875 }
4876
4877 static void tsc_khz_changed(void *data)
4878 {
4879         struct cpufreq_freqs *freq = data;
4880         unsigned long khz = 0;
4881
4882         if (data)
4883                 khz = freq->new;
4884         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4885                 khz = cpufreq_quick_get(raw_smp_processor_id());
4886         if (!khz)
4887                 khz = tsc_khz;
4888         __this_cpu_write(cpu_tsc_khz, khz);
4889 }
4890
4891 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4892                                      void *data)
4893 {
4894         struct cpufreq_freqs *freq = data;
4895         struct kvm *kvm;
4896         struct kvm_vcpu *vcpu;
4897         int i, send_ipi = 0;
4898
4899         /*
4900          * We allow guests to temporarily run on slowing clocks,
4901          * provided we notify them after, or to run on accelerating
4902          * clocks, provided we notify them before.  Thus time never
4903          * goes backwards.
4904          *
4905          * However, we have a problem.  We can't atomically update
4906          * the frequency of a given CPU from this function; it is
4907          * merely a notifier, which can be called from any CPU.
4908          * Changing the TSC frequency at arbitrary points in time
4909          * requires a recomputation of local variables related to
4910          * the TSC for each VCPU.  We must flag these local variables
4911          * to be updated and be sure the update takes place with the
4912          * new frequency before any guests proceed.
4913          *
4914          * Unfortunately, the combination of hotplug CPU and frequency
4915          * change creates an intractable locking scenario; the order
4916          * of when these callouts happen is undefined with respect to
4917          * CPU hotplug, and they can race with each other.  As such,
4918          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4919          * undefined; you can actually have a CPU frequency change take
4920          * place in between the computation of X and the setting of the
4921          * variable.  To protect against this problem, all updates of
4922          * the per_cpu tsc_khz variable are done in an interrupt
4923          * protected IPI, and all callers wishing to update the value
4924          * must wait for a synchronous IPI to complete (which is trivial
4925          * if the caller is on the CPU already).  This establishes the
4926          * necessary total order on variable updates.
4927          *
4928          * Note that because a guest time update may take place
4929          * anytime after the setting of the VCPU's request bit, the
4930          * correct TSC value must be set before the request.  However,
4931          * to ensure the update actually makes it to any guest which
4932          * starts running in hardware virtualization between the set
4933          * and the acquisition of the spinlock, we must also ping the
4934          * CPU after setting the request bit.
4935          *
4936          */
4937
4938         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4939                 return 0;
4940         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4941                 return 0;
4942
4943         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4944
4945         raw_spin_lock(&kvm_lock);
4946         list_for_each_entry(kvm, &vm_list, vm_list) {
4947                 kvm_for_each_vcpu(i, vcpu, kvm) {
4948                         if (vcpu->cpu != freq->cpu)
4949                                 continue;
4950                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4951                         if (vcpu->cpu != smp_processor_id())
4952                                 send_ipi = 1;
4953                 }
4954         }
4955         raw_spin_unlock(&kvm_lock);
4956
4957         if (freq->old < freq->new && send_ipi) {
4958                 /*
4959                  * We upscale the frequency.  Must make the guest
4960                  * doesn't see old kvmclock values while running with
4961                  * the new frequency, otherwise we risk the guest sees
4962                  * time go backwards.
4963                  *
4964                  * In case we update the frequency for another cpu
4965                  * (which might be in guest context) send an interrupt
4966                  * to kick the cpu out of guest context.  Next time
4967                  * guest context is entered kvmclock will be updated,
4968                  * so the guest will not see stale values.
4969                  */
4970                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4971         }
4972         return 0;
4973 }
4974
4975 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4976         .notifier_call  = kvmclock_cpufreq_notifier
4977 };
4978
4979 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4980                                         unsigned long action, void *hcpu)
4981 {
4982         unsigned int cpu = (unsigned long)hcpu;
4983
4984         switch (action) {
4985                 case CPU_ONLINE:
4986                 case CPU_DOWN_FAILED:
4987                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4988                         break;
4989                 case CPU_DOWN_PREPARE:
4990                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4991                         break;
4992         }
4993         return NOTIFY_OK;
4994 }
4995
4996 static struct notifier_block kvmclock_cpu_notifier_block = {
4997         .notifier_call  = kvmclock_cpu_notifier,
4998         .priority = -INT_MAX
4999 };
5000
5001 static void kvm_timer_init(void)
5002 {
5003         int cpu;
5004
5005         max_tsc_khz = tsc_khz;
5006         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5007         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5008 #ifdef CONFIG_CPU_FREQ
5009                 struct cpufreq_policy policy;
5010                 memset(&policy, 0, sizeof(policy));
5011                 cpu = get_cpu();
5012                 cpufreq_get_policy(&policy, cpu);
5013                 if (policy.cpuinfo.max_freq)
5014                         max_tsc_khz = policy.cpuinfo.max_freq;
5015                 put_cpu();
5016 #endif
5017                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5018                                           CPUFREQ_TRANSITION_NOTIFIER);
5019         }
5020         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5021         for_each_online_cpu(cpu)
5022                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5023 }
5024
5025 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5026
5027 static int kvm_is_in_guest(void)
5028 {
5029         return percpu_read(current_vcpu) != NULL;
5030 }
5031
5032 static int kvm_is_user_mode(void)
5033 {
5034         int user_mode = 3;
5035
5036         if (percpu_read(current_vcpu))
5037                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5038
5039         return user_mode != 0;
5040 }
5041
5042 static unsigned long kvm_get_guest_ip(void)
5043 {
5044         unsigned long ip = 0;
5045
5046         if (percpu_read(current_vcpu))
5047                 ip = kvm_rip_read(percpu_read(current_vcpu));
5048
5049         return ip;
5050 }
5051
5052 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5053         .is_in_guest            = kvm_is_in_guest,
5054         .is_user_mode           = kvm_is_user_mode,
5055         .get_guest_ip           = kvm_get_guest_ip,
5056 };
5057
5058 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5059 {
5060         percpu_write(current_vcpu, vcpu);
5061 }
5062 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5063
5064 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5065 {
5066         percpu_write(current_vcpu, NULL);
5067 }
5068 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5069
5070 static void kvm_set_mmio_spte_mask(void)
5071 {
5072         u64 mask;
5073         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5074
5075         /*
5076          * Set the reserved bits and the present bit of an paging-structure
5077          * entry to generate page fault with PFER.RSV = 1.
5078          */
5079         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5080         mask |= 1ull;
5081
5082 #ifdef CONFIG_X86_64
5083         /*
5084          * If reserved bit is not supported, clear the present bit to disable
5085          * mmio page fault.
5086          */
5087         if (maxphyaddr == 52)
5088                 mask &= ~1ull;
5089 #endif
5090
5091         kvm_mmu_set_mmio_spte_mask(mask);
5092 }
5093
5094 int kvm_arch_init(void *opaque)
5095 {
5096         int r;
5097         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5098
5099         if (kvm_x86_ops) {
5100                 printk(KERN_ERR "kvm: already loaded the other module\n");
5101                 r = -EEXIST;
5102                 goto out;
5103         }
5104
5105         if (!ops->cpu_has_kvm_support()) {
5106                 printk(KERN_ERR "kvm: no hardware support\n");
5107                 r = -EOPNOTSUPP;
5108                 goto out;
5109         }
5110         if (ops->disabled_by_bios()) {
5111                 printk(KERN_ERR "kvm: disabled by bios\n");
5112                 r = -EOPNOTSUPP;
5113                 goto out;
5114         }
5115
5116         r = kvm_mmu_module_init();
5117         if (r)
5118                 goto out;
5119
5120         kvm_set_mmio_spte_mask();
5121         kvm_init_msr_list();
5122
5123         kvm_x86_ops = ops;
5124         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5125                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5126
5127         kvm_timer_init();
5128
5129         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5130
5131         if (cpu_has_xsave)
5132                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5133
5134         return 0;
5135
5136 out:
5137         return r;
5138 }
5139
5140 void kvm_arch_exit(void)
5141 {
5142         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5143
5144         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5145                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5146                                             CPUFREQ_TRANSITION_NOTIFIER);
5147         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5148         kvm_x86_ops = NULL;
5149         kvm_mmu_module_exit();
5150 }
5151
5152 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5153 {
5154         ++vcpu->stat.halt_exits;
5155         if (irqchip_in_kernel(vcpu->kvm)) {
5156                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5157                 return 1;
5158         } else {
5159                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5160                 return 0;
5161         }
5162 }
5163 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5164
5165 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5166                            unsigned long a1)
5167 {
5168         if (is_long_mode(vcpu))
5169                 return a0;
5170         else
5171                 return a0 | ((gpa_t)a1 << 32);
5172 }
5173
5174 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5175 {
5176         u64 param, ingpa, outgpa, ret;
5177         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5178         bool fast, longmode;
5179         int cs_db, cs_l;
5180
5181         /*
5182          * hypercall generates UD from non zero cpl and real mode
5183          * per HYPER-V spec
5184          */
5185         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5186                 kvm_queue_exception(vcpu, UD_VECTOR);
5187                 return 0;
5188         }
5189
5190         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5191         longmode = is_long_mode(vcpu) && cs_l == 1;
5192
5193         if (!longmode) {
5194                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5195                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5196                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5197                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5198                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5199                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5200         }
5201 #ifdef CONFIG_X86_64
5202         else {
5203                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5204                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5205                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5206         }
5207 #endif
5208
5209         code = param & 0xffff;
5210         fast = (param >> 16) & 0x1;
5211         rep_cnt = (param >> 32) & 0xfff;
5212         rep_idx = (param >> 48) & 0xfff;
5213
5214         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5215
5216         switch (code) {
5217         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5218                 kvm_vcpu_on_spin(vcpu);
5219                 break;
5220         default:
5221                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5222                 break;
5223         }
5224
5225         ret = res | (((u64)rep_done & 0xfff) << 32);
5226         if (longmode) {
5227                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5228         } else {
5229                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5230                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5231         }
5232
5233         return 1;
5234 }
5235
5236 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5237 {
5238         unsigned long nr, a0, a1, a2, a3, ret;
5239         int r = 1;
5240
5241         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5242                 return kvm_hv_hypercall(vcpu);
5243
5244         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5245         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5246         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5247         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5248         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5249
5250         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5251
5252         if (!is_long_mode(vcpu)) {
5253                 nr &= 0xFFFFFFFF;
5254                 a0 &= 0xFFFFFFFF;
5255                 a1 &= 0xFFFFFFFF;
5256                 a2 &= 0xFFFFFFFF;
5257                 a3 &= 0xFFFFFFFF;
5258         }
5259
5260         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5261                 ret = -KVM_EPERM;
5262                 goto out;
5263         }
5264
5265         switch (nr) {
5266         case KVM_HC_VAPIC_POLL_IRQ:
5267                 ret = 0;
5268                 break;
5269         case KVM_HC_MMU_OP:
5270                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5271                 break;
5272         default:
5273                 ret = -KVM_ENOSYS;
5274                 break;
5275         }
5276 out:
5277         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5278         ++vcpu->stat.hypercalls;
5279         return r;
5280 }
5281 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5282
5283 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5284 {
5285         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5286         char instruction[3];
5287         unsigned long rip = kvm_rip_read(vcpu);
5288
5289         /*
5290          * Blow out the MMU to ensure that no other VCPU has an active mapping
5291          * to ensure that the updated hypercall appears atomically across all
5292          * VCPUs.
5293          */
5294         kvm_mmu_zap_all(vcpu->kvm);
5295
5296         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5297
5298         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5299 }
5300
5301 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5302 {
5303         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5304         int j, nent = vcpu->arch.cpuid_nent;
5305
5306         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5307         /* when no next entry is found, the current entry[i] is reselected */
5308         for (j = i + 1; ; j = (j + 1) % nent) {
5309                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5310                 if (ej->function == e->function) {
5311                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5312                         return j;
5313                 }
5314         }
5315         return 0; /* silence gcc, even though control never reaches here */
5316 }
5317
5318 /* find an entry with matching function, matching index (if needed), and that
5319  * should be read next (if it's stateful) */
5320 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5321         u32 function, u32 index)
5322 {
5323         if (e->function != function)
5324                 return 0;
5325         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5326                 return 0;
5327         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5328             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5329                 return 0;
5330         return 1;
5331 }
5332
5333 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5334                                               u32 function, u32 index)
5335 {
5336         int i;
5337         struct kvm_cpuid_entry2 *best = NULL;
5338
5339         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5340                 struct kvm_cpuid_entry2 *e;
5341
5342                 e = &vcpu->arch.cpuid_entries[i];
5343                 if (is_matching_cpuid_entry(e, function, index)) {
5344                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5345                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5346                         best = e;
5347                         break;
5348                 }
5349         }
5350         return best;
5351 }
5352 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5353
5354 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5355 {
5356         struct kvm_cpuid_entry2 *best;
5357
5358         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5359         if (!best || best->eax < 0x80000008)
5360                 goto not_found;
5361         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5362         if (best)
5363                 return best->eax & 0xff;
5364 not_found:
5365         return 36;
5366 }
5367
5368 /*
5369  * If no match is found, check whether we exceed the vCPU's limit
5370  * and return the content of the highest valid _standard_ leaf instead.
5371  * This is to satisfy the CPUID specification.
5372  */
5373 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5374                                                   u32 function, u32 index)
5375 {
5376         struct kvm_cpuid_entry2 *maxlevel;
5377
5378         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5379         if (!maxlevel || maxlevel->eax >= function)
5380                 return NULL;
5381         if (function & 0x80000000) {
5382                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5383                 if (!maxlevel)
5384                         return NULL;
5385         }
5386         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5387 }
5388
5389 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5390 {
5391         u32 function, index;
5392         struct kvm_cpuid_entry2 *best;
5393
5394         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5395         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5396         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5397         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5398         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5399         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5400         best = kvm_find_cpuid_entry(vcpu, function, index);
5401
5402         if (!best)
5403                 best = check_cpuid_limit(vcpu, function, index);
5404
5405         if (best) {
5406                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5407                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5408                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5409                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5410         }
5411         kvm_x86_ops->skip_emulated_instruction(vcpu);
5412         trace_kvm_cpuid(function,
5413                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5414                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5415                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5416                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5417 }
5418 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5419
5420 /*
5421  * Check if userspace requested an interrupt window, and that the
5422  * interrupt window is open.
5423  *
5424  * No need to exit to userspace if we already have an interrupt queued.
5425  */
5426 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5427 {
5428         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5429                 vcpu->run->request_interrupt_window &&
5430                 kvm_arch_interrupt_allowed(vcpu));
5431 }
5432
5433 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5434 {
5435         struct kvm_run *kvm_run = vcpu->run;
5436
5437         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5438         kvm_run->cr8 = kvm_get_cr8(vcpu);
5439         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5440         if (irqchip_in_kernel(vcpu->kvm))
5441                 kvm_run->ready_for_interrupt_injection = 1;
5442         else
5443                 kvm_run->ready_for_interrupt_injection =
5444                         kvm_arch_interrupt_allowed(vcpu) &&
5445                         !kvm_cpu_has_interrupt(vcpu) &&
5446                         !kvm_event_needs_reinjection(vcpu);
5447 }
5448
5449 static void vapic_enter(struct kvm_vcpu *vcpu)
5450 {
5451         struct kvm_lapic *apic = vcpu->arch.apic;
5452         struct page *page;
5453
5454         if (!apic || !apic->vapic_addr)
5455                 return;
5456
5457         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5458
5459         vcpu->arch.apic->vapic_page = page;
5460 }
5461
5462 static void vapic_exit(struct kvm_vcpu *vcpu)
5463 {
5464         struct kvm_lapic *apic = vcpu->arch.apic;
5465         int idx;
5466
5467         if (!apic || !apic->vapic_addr)
5468                 return;
5469
5470         idx = srcu_read_lock(&vcpu->kvm->srcu);
5471         kvm_release_page_dirty(apic->vapic_page);
5472         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5473         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5474 }
5475
5476 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5477 {
5478         int max_irr, tpr;
5479
5480         if (!kvm_x86_ops->update_cr8_intercept)
5481                 return;
5482
5483         if (!vcpu->arch.apic)
5484                 return;
5485
5486         if (!vcpu->arch.apic->vapic_addr)
5487                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5488         else
5489                 max_irr = -1;
5490
5491         if (max_irr != -1)
5492                 max_irr >>= 4;
5493
5494         tpr = kvm_lapic_get_cr8(vcpu);
5495
5496         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5497 }
5498
5499 static void inject_pending_event(struct kvm_vcpu *vcpu)
5500 {
5501         /* try to reinject previous events if any */
5502         if (vcpu->arch.exception.pending) {
5503                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5504                                         vcpu->arch.exception.has_error_code,
5505                                         vcpu->arch.exception.error_code);
5506                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5507                                           vcpu->arch.exception.has_error_code,
5508                                           vcpu->arch.exception.error_code,
5509                                           vcpu->arch.exception.reinject);
5510                 return;
5511         }
5512
5513         if (vcpu->arch.nmi_injected) {
5514                 kvm_x86_ops->set_nmi(vcpu);
5515                 return;
5516         }
5517
5518         if (vcpu->arch.interrupt.pending) {
5519                 kvm_x86_ops->set_irq(vcpu);
5520                 return;
5521         }
5522
5523         /* try to inject new event if pending */
5524         if (vcpu->arch.nmi_pending) {
5525                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5526                         vcpu->arch.nmi_pending = false;
5527                         vcpu->arch.nmi_injected = true;
5528                         kvm_x86_ops->set_nmi(vcpu);
5529                 }
5530         } else if (kvm_cpu_has_interrupt(vcpu)) {
5531                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5532                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5533                                             false);
5534                         kvm_x86_ops->set_irq(vcpu);
5535                 }
5536         }
5537 }
5538
5539 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5540 {
5541         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5542                         !vcpu->guest_xcr0_loaded) {
5543                 /* kvm_set_xcr() also depends on this */
5544                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5545                 vcpu->guest_xcr0_loaded = 1;
5546         }
5547 }
5548
5549 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5550 {
5551         if (vcpu->guest_xcr0_loaded) {
5552                 if (vcpu->arch.xcr0 != host_xcr0)
5553                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5554                 vcpu->guest_xcr0_loaded = 0;
5555         }
5556 }
5557
5558 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5559 {
5560         int r;
5561         bool nmi_pending;
5562         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5563                 vcpu->run->request_interrupt_window;
5564
5565         if (vcpu->requests) {
5566                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5567                         kvm_mmu_unload(vcpu);
5568                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5569                         __kvm_migrate_timers(vcpu);
5570                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5571                         r = kvm_guest_time_update(vcpu);
5572                         if (unlikely(r))
5573                                 goto out;
5574                 }
5575                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5576                         kvm_mmu_sync_roots(vcpu);
5577                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5578                         kvm_x86_ops->tlb_flush(vcpu);
5579                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5580                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5581                         r = 0;
5582                         goto out;
5583                 }
5584                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5585                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5586                         r = 0;
5587                         goto out;
5588                 }
5589                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5590                         vcpu->fpu_active = 0;
5591                         kvm_x86_ops->fpu_deactivate(vcpu);
5592                 }
5593                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5594                         /* Page is swapped out. Do synthetic halt */
5595                         vcpu->arch.apf.halted = true;
5596                         r = 1;
5597                         goto out;
5598                 }
5599                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5600                         record_steal_time(vcpu);
5601
5602         }
5603
5604         r = kvm_mmu_reload(vcpu);
5605         if (unlikely(r))
5606                 goto out;
5607
5608         /*
5609          * An NMI can be injected between local nmi_pending read and
5610          * vcpu->arch.nmi_pending read inside inject_pending_event().
5611          * But in that case, KVM_REQ_EVENT will be set, which makes
5612          * the race described above benign.
5613          */
5614         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5615
5616         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5617                 inject_pending_event(vcpu);
5618
5619                 /* enable NMI/IRQ window open exits if needed */
5620                 if (nmi_pending)
5621                         kvm_x86_ops->enable_nmi_window(vcpu);
5622                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5623                         kvm_x86_ops->enable_irq_window(vcpu);
5624
5625                 if (kvm_lapic_enabled(vcpu)) {
5626                         update_cr8_intercept(vcpu);
5627                         kvm_lapic_sync_to_vapic(vcpu);
5628                 }
5629         }
5630
5631         preempt_disable();
5632
5633         kvm_x86_ops->prepare_guest_switch(vcpu);
5634         if (vcpu->fpu_active)
5635                 kvm_load_guest_fpu(vcpu);
5636         kvm_load_guest_xcr0(vcpu);
5637
5638         vcpu->mode = IN_GUEST_MODE;
5639
5640         /* We should set ->mode before check ->requests,
5641          * see the comment in make_all_cpus_request.
5642          */
5643         smp_mb();
5644
5645         local_irq_disable();
5646
5647         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5648             || need_resched() || signal_pending(current)) {
5649                 vcpu->mode = OUTSIDE_GUEST_MODE;
5650                 smp_wmb();
5651                 local_irq_enable();
5652                 preempt_enable();
5653                 kvm_x86_ops->cancel_injection(vcpu);
5654                 r = 1;
5655                 goto out;
5656         }
5657
5658         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5659
5660         kvm_guest_enter();
5661
5662         if (unlikely(vcpu->arch.switch_db_regs)) {
5663                 set_debugreg(0, 7);
5664                 set_debugreg(vcpu->arch.eff_db[0], 0);
5665                 set_debugreg(vcpu->arch.eff_db[1], 1);
5666                 set_debugreg(vcpu->arch.eff_db[2], 2);
5667                 set_debugreg(vcpu->arch.eff_db[3], 3);
5668         }
5669
5670         trace_kvm_entry(vcpu->vcpu_id);
5671         kvm_x86_ops->run(vcpu);
5672
5673         /*
5674          * If the guest has used debug registers, at least dr7
5675          * will be disabled while returning to the host.
5676          * If we don't have active breakpoints in the host, we don't
5677          * care about the messed up debug address registers. But if
5678          * we have some of them active, restore the old state.
5679          */
5680         if (hw_breakpoint_active())
5681                 hw_breakpoint_restore();
5682
5683         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5684
5685         vcpu->mode = OUTSIDE_GUEST_MODE;
5686         smp_wmb();
5687         local_irq_enable();
5688
5689         ++vcpu->stat.exits;
5690
5691         /*
5692          * We must have an instruction between local_irq_enable() and
5693          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5694          * the interrupt shadow.  The stat.exits increment will do nicely.
5695          * But we need to prevent reordering, hence this barrier():
5696          */
5697         barrier();
5698
5699         kvm_guest_exit();
5700
5701         preempt_enable();
5702
5703         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5704
5705         /*
5706          * Profile KVM exit RIPs:
5707          */
5708         if (unlikely(prof_on == KVM_PROFILING)) {
5709                 unsigned long rip = kvm_rip_read(vcpu);
5710                 profile_hit(KVM_PROFILING, (void *)rip);
5711         }
5712
5713
5714         kvm_lapic_sync_from_vapic(vcpu);
5715
5716         r = kvm_x86_ops->handle_exit(vcpu);
5717 out:
5718         return r;
5719 }
5720
5721
5722 static int __vcpu_run(struct kvm_vcpu *vcpu)
5723 {
5724         int r;
5725         struct kvm *kvm = vcpu->kvm;
5726
5727         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5728                 pr_debug("vcpu %d received sipi with vector # %x\n",
5729                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5730                 kvm_lapic_reset(vcpu);
5731                 r = kvm_arch_vcpu_reset(vcpu);
5732                 if (r)
5733                         return r;
5734                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5735         }
5736
5737         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5738         vapic_enter(vcpu);
5739
5740         r = 1;
5741         while (r > 0) {
5742                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5743                     !vcpu->arch.apf.halted)
5744                         r = vcpu_enter_guest(vcpu);
5745                 else {
5746                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5747                         kvm_vcpu_block(vcpu);
5748                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5749                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5750                         {
5751                                 switch(vcpu->arch.mp_state) {
5752                                 case KVM_MP_STATE_HALTED:
5753                                         vcpu->arch.mp_state =
5754                                                 KVM_MP_STATE_RUNNABLE;
5755                                 case KVM_MP_STATE_RUNNABLE:
5756                                         vcpu->arch.apf.halted = false;
5757                                         break;
5758                                 case KVM_MP_STATE_SIPI_RECEIVED:
5759                                 default:
5760                                         r = -EINTR;
5761                                         break;
5762                                 }
5763                         }
5764                 }
5765
5766                 if (r <= 0)
5767                         break;
5768
5769                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5770                 if (kvm_cpu_has_pending_timer(vcpu))
5771                         kvm_inject_pending_timer_irqs(vcpu);
5772
5773                 if (dm_request_for_irq_injection(vcpu)) {
5774                         r = -EINTR;
5775                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5776                         ++vcpu->stat.request_irq_exits;
5777                 }
5778
5779                 kvm_check_async_pf_completion(vcpu);
5780
5781                 if (signal_pending(current)) {
5782                         r = -EINTR;
5783                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5784                         ++vcpu->stat.signal_exits;
5785                 }
5786                 if (need_resched()) {
5787                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5788                         kvm_resched(vcpu);
5789                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5790                 }
5791         }
5792
5793         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5794
5795         vapic_exit(vcpu);
5796
5797         return r;
5798 }
5799
5800 static int complete_mmio(struct kvm_vcpu *vcpu)
5801 {
5802         struct kvm_run *run = vcpu->run;
5803         int r;
5804
5805         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5806                 return 1;
5807
5808         if (vcpu->mmio_needed) {
5809                 vcpu->mmio_needed = 0;
5810                 if (!vcpu->mmio_is_write)
5811                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5812                                run->mmio.data, 8);
5813                 vcpu->mmio_index += 8;
5814                 if (vcpu->mmio_index < vcpu->mmio_size) {
5815                         run->exit_reason = KVM_EXIT_MMIO;
5816                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5817                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5818                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5819                         run->mmio.is_write = vcpu->mmio_is_write;
5820                         vcpu->mmio_needed = 1;
5821                         return 0;
5822                 }
5823                 if (vcpu->mmio_is_write)
5824                         return 1;
5825                 vcpu->mmio_read_completed = 1;
5826         }
5827         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5828         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5829         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5830         if (r != EMULATE_DONE)
5831                 return 0;
5832         return 1;
5833 }
5834
5835 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5836 {
5837         int r;
5838         sigset_t sigsaved;
5839
5840         if (!tsk_used_math(current) && init_fpu(current))
5841                 return -ENOMEM;
5842
5843         if (vcpu->sigset_active)
5844                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5845
5846         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5847                 kvm_vcpu_block(vcpu);
5848                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5849                 r = -EAGAIN;
5850                 goto out;
5851         }
5852
5853         /* re-sync apic's tpr */
5854         if (!irqchip_in_kernel(vcpu->kvm)) {
5855                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5856                         r = -EINVAL;
5857                         goto out;
5858                 }
5859         }
5860
5861         r = complete_mmio(vcpu);
5862         if (r <= 0)
5863                 goto out;
5864
5865         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5866                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5867                                      kvm_run->hypercall.ret);
5868
5869         r = __vcpu_run(vcpu);
5870
5871 out:
5872         post_kvm_run_save(vcpu);
5873         if (vcpu->sigset_active)
5874                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5875
5876         return r;
5877 }
5878
5879 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5880 {
5881         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5882                 /*
5883                  * We are here if userspace calls get_regs() in the middle of
5884                  * instruction emulation. Registers state needs to be copied
5885                  * back from emulation context to vcpu. Usrapace shouldn't do
5886                  * that usually, but some bad designed PV devices (vmware
5887                  * backdoor interface) need this to work
5888                  */
5889                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5890                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5891                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5892         }
5893         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5894         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5895         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5896         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5897         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5898         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5899         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5900         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5901 #ifdef CONFIG_X86_64
5902         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5903         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5904         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5905         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5906         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5907         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5908         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5909         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5910 #endif
5911
5912         regs->rip = kvm_rip_read(vcpu);
5913         regs->rflags = kvm_get_rflags(vcpu);
5914
5915         return 0;
5916 }
5917
5918 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5919 {
5920         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5921         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5922
5923         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5924         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5925         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5926         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5927         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5928         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5929         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5930         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5931 #ifdef CONFIG_X86_64
5932         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5933         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5934         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5935         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5936         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5937         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5938         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5939         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5940 #endif
5941
5942         kvm_rip_write(vcpu, regs->rip);
5943         kvm_set_rflags(vcpu, regs->rflags);
5944
5945         vcpu->arch.exception.pending = false;
5946
5947         kvm_make_request(KVM_REQ_EVENT, vcpu);
5948
5949         return 0;
5950 }
5951
5952 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5953 {
5954         struct kvm_segment cs;
5955
5956         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5957         *db = cs.db;
5958         *l = cs.l;
5959 }
5960 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5961
5962 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5963                                   struct kvm_sregs *sregs)
5964 {
5965         struct desc_ptr dt;
5966
5967         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5968         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5969         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5970         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5971         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5972         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5973
5974         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5975         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5976
5977         kvm_x86_ops->get_idt(vcpu, &dt);
5978         sregs->idt.limit = dt.size;
5979         sregs->idt.base = dt.address;
5980         kvm_x86_ops->get_gdt(vcpu, &dt);
5981         sregs->gdt.limit = dt.size;
5982         sregs->gdt.base = dt.address;
5983
5984         sregs->cr0 = kvm_read_cr0(vcpu);
5985         sregs->cr2 = vcpu->arch.cr2;
5986         sregs->cr3 = kvm_read_cr3(vcpu);
5987         sregs->cr4 = kvm_read_cr4(vcpu);
5988         sregs->cr8 = kvm_get_cr8(vcpu);
5989         sregs->efer = vcpu->arch.efer;
5990         sregs->apic_base = kvm_get_apic_base(vcpu);
5991
5992         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5993
5994         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5995                 set_bit(vcpu->arch.interrupt.nr,
5996                         (unsigned long *)sregs->interrupt_bitmap);
5997
5998         return 0;
5999 }
6000
6001 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6002                                     struct kvm_mp_state *mp_state)
6003 {
6004         mp_state->mp_state = vcpu->arch.mp_state;
6005         return 0;
6006 }
6007
6008 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6009                                     struct kvm_mp_state *mp_state)
6010 {
6011         vcpu->arch.mp_state = mp_state->mp_state;
6012         kvm_make_request(KVM_REQ_EVENT, vcpu);
6013         return 0;
6014 }
6015
6016 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6017                     bool has_error_code, u32 error_code)
6018 {
6019         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6020         int ret;
6021
6022         init_emulate_ctxt(vcpu);
6023
6024         ret = emulator_task_switch(ctxt, tss_selector, reason,
6025                                    has_error_code, error_code);
6026
6027         if (ret)
6028                 return EMULATE_FAIL;
6029
6030         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6031         kvm_rip_write(vcpu, ctxt->eip);
6032         kvm_set_rflags(vcpu, ctxt->eflags);
6033         kvm_make_request(KVM_REQ_EVENT, vcpu);
6034         return EMULATE_DONE;
6035 }
6036 EXPORT_SYMBOL_GPL(kvm_task_switch);
6037
6038 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6039                                   struct kvm_sregs *sregs)
6040 {
6041         int mmu_reset_needed = 0;
6042         int pending_vec, max_bits, idx;
6043         struct desc_ptr dt;
6044
6045         dt.size = sregs->idt.limit;
6046         dt.address = sregs->idt.base;
6047         kvm_x86_ops->set_idt(vcpu, &dt);
6048         dt.size = sregs->gdt.limit;
6049         dt.address = sregs->gdt.base;
6050         kvm_x86_ops->set_gdt(vcpu, &dt);
6051
6052         vcpu->arch.cr2 = sregs->cr2;
6053         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6054         vcpu->arch.cr3 = sregs->cr3;
6055         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6056
6057         kvm_set_cr8(vcpu, sregs->cr8);
6058
6059         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6060         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6061         kvm_set_apic_base(vcpu, sregs->apic_base);
6062
6063         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6064         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6065         vcpu->arch.cr0 = sregs->cr0;
6066
6067         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6068         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6069         if (sregs->cr4 & X86_CR4_OSXSAVE)
6070                 update_cpuid(vcpu);
6071
6072         idx = srcu_read_lock(&vcpu->kvm->srcu);
6073         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6074                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6075                 mmu_reset_needed = 1;
6076         }
6077         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6078
6079         if (mmu_reset_needed)
6080                 kvm_mmu_reset_context(vcpu);
6081
6082         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6083         pending_vec = find_first_bit(
6084                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6085         if (pending_vec < max_bits) {
6086                 kvm_queue_interrupt(vcpu, pending_vec, false);
6087                 pr_debug("Set back pending irq %d\n", pending_vec);
6088         }
6089
6090         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6091         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6092         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6093         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6094         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6095         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6096
6097         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6098         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6099
6100         update_cr8_intercept(vcpu);
6101
6102         /* Older userspace won't unhalt the vcpu on reset. */
6103         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6104             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6105             !is_protmode(vcpu))
6106                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6107
6108         kvm_make_request(KVM_REQ_EVENT, vcpu);
6109
6110         return 0;
6111 }
6112
6113 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6114                                         struct kvm_guest_debug *dbg)
6115 {
6116         unsigned long rflags;
6117         int i, r;
6118
6119         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6120                 r = -EBUSY;
6121                 if (vcpu->arch.exception.pending)
6122                         goto out;
6123                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6124                         kvm_queue_exception(vcpu, DB_VECTOR);
6125                 else
6126                         kvm_queue_exception(vcpu, BP_VECTOR);
6127         }
6128
6129         /*
6130          * Read rflags as long as potentially injected trace flags are still
6131          * filtered out.
6132          */
6133         rflags = kvm_get_rflags(vcpu);
6134
6135         vcpu->guest_debug = dbg->control;
6136         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6137                 vcpu->guest_debug = 0;
6138
6139         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6140                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6141                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6142                 vcpu->arch.switch_db_regs =
6143                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6144         } else {
6145                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6146                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6147                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6148         }
6149
6150         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6151                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6152                         get_segment_base(vcpu, VCPU_SREG_CS);
6153
6154         /*
6155          * Trigger an rflags update that will inject or remove the trace
6156          * flags.
6157          */
6158         kvm_set_rflags(vcpu, rflags);
6159
6160         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6161
6162         r = 0;
6163
6164 out:
6165
6166         return r;
6167 }
6168
6169 /*
6170  * Translate a guest virtual address to a guest physical address.
6171  */
6172 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6173                                     struct kvm_translation *tr)
6174 {
6175         unsigned long vaddr = tr->linear_address;
6176         gpa_t gpa;
6177         int idx;
6178
6179         idx = srcu_read_lock(&vcpu->kvm->srcu);
6180         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6181         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6182         tr->physical_address = gpa;
6183         tr->valid = gpa != UNMAPPED_GVA;
6184         tr->writeable = 1;
6185         tr->usermode = 0;
6186
6187         return 0;
6188 }
6189
6190 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6191 {
6192         struct i387_fxsave_struct *fxsave =
6193                         &vcpu->arch.guest_fpu.state->fxsave;
6194
6195         memcpy(fpu->fpr, fxsave->st_space, 128);
6196         fpu->fcw = fxsave->cwd;
6197         fpu->fsw = fxsave->swd;
6198         fpu->ftwx = fxsave->twd;
6199         fpu->last_opcode = fxsave->fop;
6200         fpu->last_ip = fxsave->rip;
6201         fpu->last_dp = fxsave->rdp;
6202         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6203
6204         return 0;
6205 }
6206
6207 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6208 {
6209         struct i387_fxsave_struct *fxsave =
6210                         &vcpu->arch.guest_fpu.state->fxsave;
6211
6212         memcpy(fxsave->st_space, fpu->fpr, 128);
6213         fxsave->cwd = fpu->fcw;
6214         fxsave->swd = fpu->fsw;
6215         fxsave->twd = fpu->ftwx;
6216         fxsave->fop = fpu->last_opcode;
6217         fxsave->rip = fpu->last_ip;
6218         fxsave->rdp = fpu->last_dp;
6219         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6220
6221         return 0;
6222 }
6223
6224 int fx_init(struct kvm_vcpu *vcpu)
6225 {
6226         int err;
6227
6228         err = fpu_alloc(&vcpu->arch.guest_fpu);
6229         if (err)
6230                 return err;
6231
6232         fpu_finit(&vcpu->arch.guest_fpu);
6233
6234         /*
6235          * Ensure guest xcr0 is valid for loading
6236          */
6237         vcpu->arch.xcr0 = XSTATE_FP;
6238
6239         vcpu->arch.cr0 |= X86_CR0_ET;
6240
6241         return 0;
6242 }
6243 EXPORT_SYMBOL_GPL(fx_init);
6244
6245 static void fx_free(struct kvm_vcpu *vcpu)
6246 {
6247         fpu_free(&vcpu->arch.guest_fpu);
6248 }
6249
6250 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6251 {
6252         if (vcpu->guest_fpu_loaded)
6253                 return;
6254
6255         /*
6256          * Restore all possible states in the guest,
6257          * and assume host would use all available bits.
6258          * Guest xcr0 would be loaded later.
6259          */
6260         kvm_put_guest_xcr0(vcpu);
6261         vcpu->guest_fpu_loaded = 1;
6262         unlazy_fpu(current);
6263         fpu_restore_checking(&vcpu->arch.guest_fpu);
6264         trace_kvm_fpu(1);
6265 }
6266
6267 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6268 {
6269         kvm_put_guest_xcr0(vcpu);
6270
6271         if (!vcpu->guest_fpu_loaded)
6272                 return;
6273
6274         vcpu->guest_fpu_loaded = 0;
6275         fpu_save_init(&vcpu->arch.guest_fpu);
6276         ++vcpu->stat.fpu_reload;
6277         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6278         trace_kvm_fpu(0);
6279 }
6280
6281 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6282 {
6283         kvmclock_reset(vcpu);
6284
6285         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6286         fx_free(vcpu);
6287         kvm_x86_ops->vcpu_free(vcpu);
6288 }
6289
6290 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6291                                                 unsigned int id)
6292 {
6293         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6294                 printk_once(KERN_WARNING
6295                 "kvm: SMP vm created on host with unstable TSC; "
6296                 "guest TSC will not be reliable\n");
6297         return kvm_x86_ops->vcpu_create(kvm, id);
6298 }
6299
6300 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6301 {
6302         int r;
6303
6304         vcpu->arch.mtrr_state.have_fixed = 1;
6305         vcpu_load(vcpu);
6306         r = kvm_arch_vcpu_reset(vcpu);
6307         if (r == 0)
6308                 r = kvm_mmu_setup(vcpu);
6309         vcpu_put(vcpu);
6310
6311         return r;
6312 }
6313
6314 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6315 {
6316         vcpu->arch.apf.msr_val = 0;
6317
6318         vcpu_load(vcpu);
6319         kvm_mmu_unload(vcpu);
6320         vcpu_put(vcpu);
6321
6322         fx_free(vcpu);
6323         kvm_x86_ops->vcpu_free(vcpu);
6324 }
6325
6326 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6327 {
6328         vcpu->arch.nmi_pending = false;
6329         vcpu->arch.nmi_injected = false;
6330
6331         vcpu->arch.switch_db_regs = 0;
6332         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6333         vcpu->arch.dr6 = DR6_FIXED_1;
6334         vcpu->arch.dr7 = DR7_FIXED_1;
6335
6336         kvm_make_request(KVM_REQ_EVENT, vcpu);
6337         vcpu->arch.apf.msr_val = 0;
6338         vcpu->arch.st.msr_val = 0;
6339
6340         kvmclock_reset(vcpu);
6341
6342         kvm_clear_async_pf_completion_queue(vcpu);
6343         kvm_async_pf_hash_reset(vcpu);
6344         vcpu->arch.apf.halted = false;
6345
6346         return kvm_x86_ops->vcpu_reset(vcpu);
6347 }
6348
6349 int kvm_arch_hardware_enable(void *garbage)
6350 {
6351         struct kvm *kvm;
6352         struct kvm_vcpu *vcpu;
6353         int i;
6354
6355         kvm_shared_msr_cpu_online();
6356         list_for_each_entry(kvm, &vm_list, vm_list)
6357                 kvm_for_each_vcpu(i, vcpu, kvm)
6358                         if (vcpu->cpu == smp_processor_id())
6359                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6360         return kvm_x86_ops->hardware_enable(garbage);
6361 }
6362
6363 void kvm_arch_hardware_disable(void *garbage)
6364 {
6365         kvm_x86_ops->hardware_disable(garbage);
6366         drop_user_return_notifiers(garbage);
6367 }
6368
6369 int kvm_arch_hardware_setup(void)
6370 {
6371         return kvm_x86_ops->hardware_setup();
6372 }
6373
6374 void kvm_arch_hardware_unsetup(void)
6375 {
6376         kvm_x86_ops->hardware_unsetup();
6377 }
6378
6379 void kvm_arch_check_processor_compat(void *rtn)
6380 {
6381         kvm_x86_ops->check_processor_compatibility(rtn);
6382 }
6383
6384 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6385 {
6386         struct page *page;
6387         struct kvm *kvm;
6388         int r;
6389
6390         BUG_ON(vcpu->kvm == NULL);
6391         kvm = vcpu->kvm;
6392
6393         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6394         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6395         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6396         vcpu->arch.mmu.translate_gpa = translate_gpa;
6397         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6398         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6399                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6400         else
6401                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6402
6403         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6404         if (!page) {
6405                 r = -ENOMEM;
6406                 goto fail;
6407         }
6408         vcpu->arch.pio_data = page_address(page);
6409
6410         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6411
6412         r = kvm_mmu_create(vcpu);
6413         if (r < 0)
6414                 goto fail_free_pio_data;
6415
6416         if (irqchip_in_kernel(kvm)) {
6417                 r = kvm_create_lapic(vcpu);
6418                 if (r < 0)
6419                         goto fail_mmu_destroy;
6420         }
6421
6422         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6423                                        GFP_KERNEL);
6424         if (!vcpu->arch.mce_banks) {
6425                 r = -ENOMEM;
6426                 goto fail_free_lapic;
6427         }
6428         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6429
6430         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6431                 goto fail_free_mce_banks;
6432
6433         kvm_async_pf_hash_reset(vcpu);
6434
6435         return 0;
6436 fail_free_mce_banks:
6437         kfree(vcpu->arch.mce_banks);
6438 fail_free_lapic:
6439         kvm_free_lapic(vcpu);
6440 fail_mmu_destroy:
6441         kvm_mmu_destroy(vcpu);
6442 fail_free_pio_data:
6443         free_page((unsigned long)vcpu->arch.pio_data);
6444 fail:
6445         return r;
6446 }
6447
6448 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6449 {
6450         int idx;
6451
6452         kfree(vcpu->arch.mce_banks);
6453         kvm_free_lapic(vcpu);
6454         idx = srcu_read_lock(&vcpu->kvm->srcu);
6455         kvm_mmu_destroy(vcpu);
6456         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6457         free_page((unsigned long)vcpu->arch.pio_data);
6458 }
6459
6460 int kvm_arch_init_vm(struct kvm *kvm)
6461 {
6462         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6463         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6464
6465         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6466         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6467
6468         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6469
6470         return 0;
6471 }
6472
6473 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6474 {
6475         vcpu_load(vcpu);
6476         kvm_mmu_unload(vcpu);
6477         vcpu_put(vcpu);
6478 }
6479
6480 static void kvm_free_vcpus(struct kvm *kvm)
6481 {
6482         unsigned int i;
6483         struct kvm_vcpu *vcpu;
6484
6485         /*
6486          * Unpin any mmu pages first.
6487          */
6488         kvm_for_each_vcpu(i, vcpu, kvm) {
6489                 kvm_clear_async_pf_completion_queue(vcpu);
6490                 kvm_unload_vcpu_mmu(vcpu);
6491         }
6492         kvm_for_each_vcpu(i, vcpu, kvm)
6493                 kvm_arch_vcpu_free(vcpu);
6494
6495         mutex_lock(&kvm->lock);
6496         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6497                 kvm->vcpus[i] = NULL;
6498
6499         atomic_set(&kvm->online_vcpus, 0);
6500         mutex_unlock(&kvm->lock);
6501 }
6502
6503 void kvm_arch_sync_events(struct kvm *kvm)
6504 {
6505         kvm_free_all_assigned_devices(kvm);
6506         kvm_free_pit(kvm);
6507 }
6508
6509 void kvm_arch_destroy_vm(struct kvm *kvm)
6510 {
6511         kvm_iommu_unmap_guest(kvm);
6512         kfree(kvm->arch.vpic);
6513         kfree(kvm->arch.vioapic);
6514         kvm_free_vcpus(kvm);
6515         if (kvm->arch.apic_access_page)
6516                 put_page(kvm->arch.apic_access_page);
6517         if (kvm->arch.ept_identity_pagetable)
6518                 put_page(kvm->arch.ept_identity_pagetable);
6519 }
6520
6521 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6522                                 struct kvm_memory_slot *memslot,
6523                                 struct kvm_memory_slot old,
6524                                 struct kvm_userspace_memory_region *mem,
6525                                 int user_alloc)
6526 {
6527         int npages = memslot->npages;
6528         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6529
6530         /* Prevent internal slot pages from being moved by fork()/COW. */
6531         if (memslot->id >= KVM_MEMORY_SLOTS)
6532                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6533
6534         /*To keep backward compatibility with older userspace,
6535          *x86 needs to hanlde !user_alloc case.
6536          */
6537         if (!user_alloc) {
6538                 if (npages && !old.rmap) {
6539                         unsigned long userspace_addr;
6540
6541                         down_write(&current->mm->mmap_sem);
6542                         userspace_addr = do_mmap(NULL, 0,
6543                                                  npages * PAGE_SIZE,
6544                                                  PROT_READ | PROT_WRITE,
6545                                                  map_flags,
6546                                                  0);
6547                         up_write(&current->mm->mmap_sem);
6548
6549                         if (IS_ERR((void *)userspace_addr))
6550                                 return PTR_ERR((void *)userspace_addr);
6551
6552                         memslot->userspace_addr = userspace_addr;
6553                 }
6554         }
6555
6556
6557         return 0;
6558 }
6559
6560 void kvm_arch_commit_memory_region(struct kvm *kvm,
6561                                 struct kvm_userspace_memory_region *mem,
6562                                 struct kvm_memory_slot old,
6563                                 int user_alloc)
6564 {
6565
6566         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6567
6568         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6569                 int ret;
6570
6571                 down_write(&current->mm->mmap_sem);
6572                 ret = do_munmap(current->mm, old.userspace_addr,
6573                                 old.npages * PAGE_SIZE);
6574                 up_write(&current->mm->mmap_sem);
6575                 if (ret < 0)
6576                         printk(KERN_WARNING
6577                                "kvm_vm_ioctl_set_memory_region: "
6578                                "failed to munmap memory\n");
6579         }
6580
6581         if (!kvm->arch.n_requested_mmu_pages)
6582                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6583
6584         spin_lock(&kvm->mmu_lock);
6585         if (nr_mmu_pages)
6586                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6587         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6588         spin_unlock(&kvm->mmu_lock);
6589 }
6590
6591 void kvm_arch_flush_shadow(struct kvm *kvm)
6592 {
6593         kvm_mmu_zap_all(kvm);
6594         kvm_reload_remote_mmus(kvm);
6595 }
6596
6597 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6598 {
6599         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6600                 !vcpu->arch.apf.halted)
6601                 || !list_empty_careful(&vcpu->async_pf.done)
6602                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6603                 || vcpu->arch.nmi_pending ||
6604                 (kvm_arch_interrupt_allowed(vcpu) &&
6605                  kvm_cpu_has_interrupt(vcpu));
6606 }
6607
6608 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6609 {
6610         int me;
6611         int cpu = vcpu->cpu;
6612
6613         if (waitqueue_active(&vcpu->wq)) {
6614                 wake_up_interruptible(&vcpu->wq);
6615                 ++vcpu->stat.halt_wakeup;
6616         }
6617
6618         me = get_cpu();
6619         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6620                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6621                         smp_send_reschedule(cpu);
6622         put_cpu();
6623 }
6624
6625 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6626 {
6627         return kvm_x86_ops->interrupt_allowed(vcpu);
6628 }
6629
6630 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6631 {
6632         unsigned long current_rip = kvm_rip_read(vcpu) +
6633                 get_segment_base(vcpu, VCPU_SREG_CS);
6634
6635         return current_rip == linear_rip;
6636 }
6637 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6638
6639 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6640 {
6641         unsigned long rflags;
6642
6643         rflags = kvm_x86_ops->get_rflags(vcpu);
6644         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6645                 rflags &= ~X86_EFLAGS_TF;
6646         return rflags;
6647 }
6648 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6649
6650 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6651 {
6652         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6653             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6654                 rflags |= X86_EFLAGS_TF;
6655         kvm_x86_ops->set_rflags(vcpu, rflags);
6656         kvm_make_request(KVM_REQ_EVENT, vcpu);
6657 }
6658 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6659
6660 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6661 {
6662         int r;
6663
6664         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6665               is_error_page(work->page))
6666                 return;
6667
6668         r = kvm_mmu_reload(vcpu);
6669         if (unlikely(r))
6670                 return;
6671
6672         if (!vcpu->arch.mmu.direct_map &&
6673               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6674                 return;
6675
6676         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6677 }
6678
6679 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6680 {
6681         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6682 }
6683
6684 static inline u32 kvm_async_pf_next_probe(u32 key)
6685 {
6686         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6687 }
6688
6689 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6690 {
6691         u32 key = kvm_async_pf_hash_fn(gfn);
6692
6693         while (vcpu->arch.apf.gfns[key] != ~0)
6694                 key = kvm_async_pf_next_probe(key);
6695
6696         vcpu->arch.apf.gfns[key] = gfn;
6697 }
6698
6699 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6700 {
6701         int i;
6702         u32 key = kvm_async_pf_hash_fn(gfn);
6703
6704         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6705                      (vcpu->arch.apf.gfns[key] != gfn &&
6706                       vcpu->arch.apf.gfns[key] != ~0); i++)
6707                 key = kvm_async_pf_next_probe(key);
6708
6709         return key;
6710 }
6711
6712 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6713 {
6714         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6715 }
6716
6717 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6718 {
6719         u32 i, j, k;
6720
6721         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6722         while (true) {
6723                 vcpu->arch.apf.gfns[i] = ~0;
6724                 do {
6725                         j = kvm_async_pf_next_probe(j);
6726                         if (vcpu->arch.apf.gfns[j] == ~0)
6727                                 return;
6728                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6729                         /*
6730                          * k lies cyclically in ]i,j]
6731                          * |    i.k.j |
6732                          * |....j i.k.| or  |.k..j i...|
6733                          */
6734                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6735                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6736                 i = j;
6737         }
6738 }
6739
6740 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6741 {
6742
6743         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6744                                       sizeof(val));
6745 }
6746
6747 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6748                                      struct kvm_async_pf *work)
6749 {
6750         struct x86_exception fault;
6751
6752         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6753         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6754
6755         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6756             (vcpu->arch.apf.send_user_only &&
6757              kvm_x86_ops->get_cpl(vcpu) == 0))
6758                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6759         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6760                 fault.vector = PF_VECTOR;
6761                 fault.error_code_valid = true;
6762                 fault.error_code = 0;
6763                 fault.nested_page_fault = false;
6764                 fault.address = work->arch.token;
6765                 kvm_inject_page_fault(vcpu, &fault);
6766         }
6767 }
6768
6769 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6770                                  struct kvm_async_pf *work)
6771 {
6772         struct x86_exception fault;
6773
6774         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6775         if (is_error_page(work->page))
6776                 work->arch.token = ~0; /* broadcast wakeup */
6777         else
6778                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6779
6780         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6781             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6782                 fault.vector = PF_VECTOR;
6783                 fault.error_code_valid = true;
6784                 fault.error_code = 0;
6785                 fault.nested_page_fault = false;
6786                 fault.address = work->arch.token;
6787                 kvm_inject_page_fault(vcpu, &fault);
6788         }
6789         vcpu->arch.apf.halted = false;
6790 }
6791
6792 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6793 {
6794         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6795                 return true;
6796         else
6797                 return !kvm_event_needs_reinjection(vcpu) &&
6798                         kvm_x86_ops->interrupt_allowed(vcpu);
6799 }
6800
6801 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6802 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6803 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6804 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6805 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6806 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6807 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6808 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6809 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6810 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6811 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6812 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);