bf98da193c5d3fcaff7231997cf2c539c564af77
[linux-flexiantxendom0-3.2.10.git] / sound / isa / cs423x / cs4231_lib.c
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@suse.cz>
3  *  Routines for control of CS4231(A)/CS4232/InterWave & compatible chips
4  *
5  *  Bugs:
6  *     - sometimes record brokes playback with WSS portion of 
7  *       Yamaha OPL3-SA3 chip
8  *     - CS4231 (GUS MAX) - still trouble with occasional noises
9  *                        - broken initialization?
10  *
11  *   This program is free software; you can redistribute it and/or modify
12  *   it under the terms of the GNU General Public License as published by
13  *   the Free Software Foundation; either version 2 of the License, or
14  *   (at your option) any later version.
15  *
16  *   This program is distributed in the hope that it will be useful,
17  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
18  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  *   GNU General Public License for more details.
20  *
21  *   You should have received a copy of the GNU General Public License
22  *   along with this program; if not, write to the Free Software
23  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
24  *
25  */
26
27 #include <sound/driver.h>
28 #include <linux/delay.h>
29 #include <linux/pm.h>
30 #include <linux/init.h>
31 #include <linux/interrupt.h>
32 #include <linux/slab.h>
33 #include <linux/ioport.h>
34 #include <sound/core.h>
35 #include <sound/cs4231.h>
36 #include <sound/pcm_params.h>
37
38 #include <asm/io.h>
39 #include <asm/dma.h>
40 #include <asm/irq.h>
41
42 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>");
43 MODULE_DESCRIPTION("Routines for control of CS4231(A)/CS4232/InterWave & compatible chips");
44 MODULE_LICENSE("GPL");
45
46 #define chip_t cs4231_t
47
48 #if 0
49 #define SNDRV_DEBUG_MCE
50 #endif
51
52 /*
53  *  Some variables
54  */
55
56 static unsigned char freq_bits[14] = {
57         /* 5510 */      0x00 | CS4231_XTAL2,
58         /* 6620 */      0x0E | CS4231_XTAL2,
59         /* 8000 */      0x00 | CS4231_XTAL1,
60         /* 9600 */      0x0E | CS4231_XTAL1,
61         /* 11025 */     0x02 | CS4231_XTAL2,
62         /* 16000 */     0x02 | CS4231_XTAL1,
63         /* 18900 */     0x04 | CS4231_XTAL2,
64         /* 22050 */     0x06 | CS4231_XTAL2,
65         /* 27042 */     0x04 | CS4231_XTAL1,
66         /* 32000 */     0x06 | CS4231_XTAL1,
67         /* 33075 */     0x0C | CS4231_XTAL2,
68         /* 37800 */     0x08 | CS4231_XTAL2,
69         /* 44100 */     0x0A | CS4231_XTAL2,
70         /* 48000 */     0x0C | CS4231_XTAL1
71 };
72
73 static unsigned int rates[14] = {
74         5510, 6620, 8000, 9600, 11025, 16000, 18900, 22050,
75         27042, 32000, 33075, 37800, 44100, 48000
76 };
77
78 static snd_pcm_hw_constraint_list_t hw_constraints_rates = {
79         .count = 14,
80         .list = rates,
81         .mask = 0,
82 };
83
84 static int snd_cs4231_xrate(snd_pcm_runtime_t *runtime)
85 {
86         return snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
87 }
88
89 static unsigned char snd_cs4231_original_image[32] =
90 {
91         0x00,                   /* 00/00 - lic */
92         0x00,                   /* 01/01 - ric */
93         0x9f,                   /* 02/02 - la1ic */
94         0x9f,                   /* 03/03 - ra1ic */
95         0x9f,                   /* 04/04 - la2ic */
96         0x9f,                   /* 05/05 - ra2ic */
97         0xbf,                   /* 06/06 - loc */
98         0xbf,                   /* 07/07 - roc */
99         0x20,                   /* 08/08 - pdfr */
100         CS4231_AUTOCALIB,       /* 09/09 - ic */
101         0x00,                   /* 0a/10 - pc */
102         0x00,                   /* 0b/11 - ti */
103         CS4231_MODE2,           /* 0c/12 - mi */
104         0xfc,                   /* 0d/13 - lbc */
105         0x00,                   /* 0e/14 - pbru */
106         0x00,                   /* 0f/15 - pbrl */
107         0x80,                   /* 10/16 - afei */
108         0x01,                   /* 11/17 - afeii */
109         0x9f,                   /* 12/18 - llic */
110         0x9f,                   /* 13/19 - rlic */
111         0x00,                   /* 14/20 - tlb */
112         0x00,                   /* 15/21 - thb */
113         0x00,                   /* 16/22 - la3mic/reserved */
114         0x00,                   /* 17/23 - ra3mic/reserved */
115         0x00,                   /* 18/24 - afs */
116         0x00,                   /* 19/25 - lamoc/version */
117         0xcf,                   /* 1a/26 - mioc */
118         0x00,                   /* 1b/27 - ramoc/reserved */
119         0x20,                   /* 1c/28 - cdfr */
120         0x00,                   /* 1d/29 - res4 */
121         0x00,                   /* 1e/30 - cbru */
122         0x00,                   /* 1f/31 - cbrl */
123 };
124
125 /*
126  *  Basic I/O functions
127  */
128
129 #if !defined(EBUS_SUPPORT) && !defined(SBUS_SUPPORT)
130 #define __CS4231_INLINE__ inline
131 #else
132 #define __CS4231_INLINE__ /* nothing */
133 #endif
134
135 static __CS4231_INLINE__ void cs4231_outb(cs4231_t *chip, u8 offset, u8 val)
136 {
137 #ifdef EBUS_SUPPORT
138         if (chip->ebus->flag) {
139                 writeb(val, chip->port + (offset << 2));
140         } else {
141 #endif
142 #ifdef SBUS_SUPPORT
143                 sbus_writeb(val, chip->port + (offset << 2));
144 #endif
145 #ifdef EBUS_SUPPORT
146         }
147 #endif
148 #ifdef LEGACY_SUPPORT
149         outb(val, chip->port + offset);
150 #endif
151 }
152
153 static __CS4231_INLINE__ u8 cs4231_inb(cs4231_t *chip, u8 offset)
154 {
155 #ifdef EBUS_SUPPORT
156         if (chip->ebus_flag) {
157                 return readb(chip->port + (offset << 2));
158         } else {
159 #endif
160 #ifdef SBUS_SUPPORT
161                 return sbus_readb(chip->port + (offset << 2));
162 #endif
163 #ifdef EBUS_SUPPORT
164         }
165 #endif
166 #ifdef LEGACY_SUPPORT
167         return inb(chip->port + offset);
168 #endif
169 }
170
171 void snd_cs4231_outm(cs4231_t *chip, unsigned char reg,
172                      unsigned char mask, unsigned char value)
173 {
174         int timeout;
175         unsigned char tmp;
176
177         for (timeout = 250;
178              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
179              timeout--)
180                 udelay(100);
181 #ifdef CONFIG_SND_DEBUG
182         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
183                 snd_printk("outm: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
184 #endif
185         if (chip->calibrate_mute) {
186                 chip->image[reg] &= mask;
187                 chip->image[reg] |= value;
188         } else {
189                 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
190                 mb();
191                 tmp = (chip->image[reg] & mask) | value;
192                 cs4231_outb(chip, CS4231P(REG), tmp);
193                 chip->image[reg] = tmp;
194                 mb();
195         }
196 }
197
198 static void snd_cs4231_dout(cs4231_t *chip, unsigned char reg, unsigned char value)
199 {
200         int timeout;
201
202         for (timeout = 250;
203              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
204              timeout--)
205                 udelay(10);
206         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
207         cs4231_outb(chip, CS4231P(REG), value);
208         mb();
209 }
210
211 void snd_cs4231_out(cs4231_t *chip, unsigned char reg, unsigned char value)
212 {
213         int timeout;
214
215         for (timeout = 250;
216              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
217              timeout--)
218                 udelay(100);
219 #ifdef CONFIG_SND_DEBUG
220         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
221                 snd_printk("out: auto calibration time out - reg = 0x%x, value = 0x%x\n", reg, value);
222 #endif
223         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
224         cs4231_outb(chip, CS4231P(REG), value);
225         chip->image[reg] = value;
226         mb();
227 #if 0
228         printk("codec out - reg 0x%x = 0x%x\n", chip->mce_bit | reg, value);
229 #endif
230 }
231
232 unsigned char snd_cs4231_in(cs4231_t *chip, unsigned char reg)
233 {
234         int timeout;
235
236         for (timeout = 250;
237              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
238              timeout--)
239                 udelay(100);
240 #ifdef CONFIG_SND_DEBUG
241         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
242                 snd_printk("in: auto calibration time out - reg = 0x%x\n", reg);
243 #endif
244         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | reg);
245         mb();
246         return cs4231_inb(chip, CS4231P(REG));
247 }
248
249 void snd_cs4236_ext_out(cs4231_t *chip, unsigned char reg, unsigned char val)
250 {
251         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
252         cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
253         cs4231_outb(chip, CS4231P(REG), val);
254         chip->eimage[CS4236_REG(reg)] = val;
255 #if 0
256         printk("ext out : reg = 0x%x, val = 0x%x\n", reg, val);
257 #endif
258 }
259
260 unsigned char snd_cs4236_ext_in(cs4231_t *chip, unsigned char reg)
261 {
262         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | 0x17);
263         cs4231_outb(chip, CS4231P(REG), reg | (chip->image[CS4236_EXT_REG] & 0x01));
264 #if 1
265         return cs4231_inb(chip, CS4231P(REG));
266 #else
267         {
268                 unsigned char res;
269                 res = cs4231_inb(chip, CS4231P(REG));
270                 printk("ext in : reg = 0x%x, val = 0x%x\n", reg, res);
271                 return res;
272         }
273 #endif
274 }
275
276 #ifdef CONFIG_SND_DEBUG
277
278 void snd_cs4231_debug(cs4231_t *chip)
279 {
280         printk("CS4231 REGS:      INDEX = 0x%02x  ", cs4231_inb(chip, CS4231P(REGSEL)));
281         printk("                 STATUS = 0x%02x\n", cs4231_inb(chip, CS4231P(STATUS)));
282         printk("  0x00: left input      = 0x%02x  ", snd_cs4231_in(chip, 0x00));
283         printk("  0x10: alt 1 (CFIG 2)  = 0x%02x\n", snd_cs4231_in(chip, 0x10));
284         printk("  0x01: right input     = 0x%02x  ", snd_cs4231_in(chip, 0x01));
285         printk("  0x11: alt 2 (CFIG 3)  = 0x%02x\n", snd_cs4231_in(chip, 0x11));
286         printk("  0x02: GF1 left input  = 0x%02x  ", snd_cs4231_in(chip, 0x02));
287         printk("  0x12: left line in    = 0x%02x\n", snd_cs4231_in(chip, 0x12));
288         printk("  0x03: GF1 right input = 0x%02x  ", snd_cs4231_in(chip, 0x03));
289         printk("  0x13: right line in   = 0x%02x\n", snd_cs4231_in(chip, 0x13));
290         printk("  0x04: CD left input   = 0x%02x  ", snd_cs4231_in(chip, 0x04));
291         printk("  0x14: timer low       = 0x%02x\n", snd_cs4231_in(chip, 0x14));
292         printk("  0x05: CD right input  = 0x%02x  ", snd_cs4231_in(chip, 0x05));
293         printk("  0x15: timer high      = 0x%02x\n", snd_cs4231_in(chip, 0x15));
294         printk("  0x06: left output     = 0x%02x  ", snd_cs4231_in(chip, 0x06));
295         printk("  0x16: left MIC (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x16));
296         printk("  0x07: right output    = 0x%02x  ", snd_cs4231_in(chip, 0x07));
297         printk("  0x17: right MIC (PnP) = 0x%02x\n", snd_cs4231_in(chip, 0x17));
298         printk("  0x08: playback format = 0x%02x  ", snd_cs4231_in(chip, 0x08));
299         printk("  0x18: IRQ status      = 0x%02x\n", snd_cs4231_in(chip, 0x18));
300         printk("  0x09: iface (CFIG 1)  = 0x%02x  ", snd_cs4231_in(chip, 0x09));
301         printk("  0x19: left line out   = 0x%02x\n", snd_cs4231_in(chip, 0x19));
302         printk("  0x0a: pin control     = 0x%02x  ", snd_cs4231_in(chip, 0x0a));
303         printk("  0x1a: mono control    = 0x%02x\n", snd_cs4231_in(chip, 0x1a));
304         printk("  0x0b: init & status   = 0x%02x  ", snd_cs4231_in(chip, 0x0b));
305         printk("  0x1b: right line out  = 0x%02x\n", snd_cs4231_in(chip, 0x1b));
306         printk("  0x0c: revision & mode = 0x%02x  ", snd_cs4231_in(chip, 0x0c));
307         printk("  0x1c: record format   = 0x%02x\n", snd_cs4231_in(chip, 0x1c));
308         printk("  0x0d: loopback        = 0x%02x  ", snd_cs4231_in(chip, 0x0d));
309         printk("  0x1d: var freq (PnP)  = 0x%02x\n", snd_cs4231_in(chip, 0x1d));
310         printk("  0x0e: ply upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0e));
311         printk("  0x1e: ply lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1e));
312         printk("  0x0f: rec upr count   = 0x%02x  ", snd_cs4231_in(chip, 0x0f));
313         printk("  0x1f: rec lwr count   = 0x%02x\n", snd_cs4231_in(chip, 0x1f));
314 }
315
316 #endif
317
318 /*
319  *  CS4231 detection / MCE routines
320  */
321
322 static void snd_cs4231_busy_wait(cs4231_t *chip)
323 {
324         int timeout;
325
326         /* huh.. looks like this sequence is proper for CS4231A chip (GUS MAX) */
327         for (timeout = 5; timeout > 0; timeout--)
328                 cs4231_inb(chip, CS4231P(REGSEL));
329         /* end of cleanup sequence */
330         for (timeout = 250;
331              timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT);
332              timeout--)
333                 udelay(10);
334 }
335
336 void snd_cs4231_mce_up(cs4231_t *chip)
337 {
338         unsigned long flags;
339         int timeout;
340
341         for (timeout = 250; timeout > 0 && (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT); timeout--)
342                 udelay(100);
343 #ifdef CONFIG_SND_DEBUG
344         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
345                 snd_printk("mce_up - auto calibration time out (0)\n");
346 #endif
347         spin_lock_irqsave(&chip->reg_lock, flags);
348         chip->mce_bit |= CS4231_MCE;
349         timeout = cs4231_inb(chip, CS4231P(REGSEL));
350         if (timeout == 0x80)
351                 snd_printk("mce_up [0x%lx]: serious init problem - codec still busy\n", chip->port);
352         if (!(timeout & CS4231_MCE))
353                 cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
354         spin_unlock_irqrestore(&chip->reg_lock, flags);
355 }
356
357 void snd_cs4231_mce_down(cs4231_t *chip)
358 {
359         unsigned long flags;
360         int timeout;
361         signed long time;
362
363         snd_cs4231_busy_wait(chip);
364 #if 0
365         printk("(1) timeout = %i\n", timeout);
366 #endif
367 #ifdef CONFIG_SND_DEBUG
368         if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
369                 snd_printk("mce_down [0x%lx] - auto calibration time out (0)\n", (long)CS4231P(REGSEL));
370 #endif
371         spin_lock_irqsave(&chip->reg_lock, flags);
372         chip->mce_bit &= ~CS4231_MCE;
373         timeout = cs4231_inb(chip, CS4231P(REGSEL));
374         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
375         spin_unlock_irqrestore(&chip->reg_lock, flags);
376         if (timeout == 0x80)
377                 snd_printk("mce_down [0x%lx]: serious init problem - codec still busy\n", chip->port);
378         if ((timeout & CS4231_MCE) == 0 ||
379             !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
380                 return;
381         }
382         snd_cs4231_busy_wait(chip);
383
384         /* calibration process */
385
386         for (timeout = 500; timeout > 0 && (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0; timeout--)
387                 udelay(10);
388         if ((snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) == 0) {
389                 snd_printd("cs4231_mce_down - auto calibration time out (1)\n");
390                 return;
391         }
392 #if 0
393         printk("(2) timeout = %i, jiffies = %li\n", timeout, jiffies);
394 #endif
395         timeout = HZ / 4 / 2;
396         time = 2;
397         while (snd_cs4231_in(chip, CS4231_TEST_INIT) & CS4231_CALIB_IN_PROGRESS) {
398                 set_current_state(TASK_INTERRUPTIBLE);
399                 time = schedule_timeout(time);
400                 if (time > 0)
401                         continue;
402                 time = 2;
403                 if (--timeout < 0) {
404                         snd_printk("mce_down - auto calibration time out (2)\n");
405                         return;
406                 }
407         }
408 #if 0
409         printk("(3) jiffies = %li\n", jiffies);
410 #endif
411         timeout = HZ / 10 / 2;
412         time = 2;
413         while (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT) {
414                 set_current_state(TASK_INTERRUPTIBLE);          
415                 time = schedule_timeout(time);
416                 if (time > 0)
417                         continue;
418                 time = 2;
419                 if (--timeout < 0) {
420                         snd_printk(KERN_ERR "mce_down - auto calibration time out (3)\n");
421                         return;
422                 }
423         }
424 #if 0
425         printk("(4) jiffies = %li\n", jiffies);
426         snd_printk("mce_down - exit = 0x%x\n", cs4231_inb(chip, CS4231P(REGSEL)));
427 #endif
428 }
429
430 static unsigned int snd_cs4231_get_count(unsigned char format, unsigned int size)
431 {
432         switch (format & 0xe0) {
433         case CS4231_LINEAR_16:
434         case CS4231_LINEAR_16_BIG:
435                 size >>= 1;
436                 break;
437         case CS4231_ADPCM_16:
438                 return size >> 2;
439         }
440         if (format & CS4231_STEREO)
441                 size >>= 1;
442         return size;
443 }
444
445 static int snd_cs4231_trigger(snd_pcm_substream_t *substream,
446                               int cmd)
447 {
448         cs4231_t *chip = snd_pcm_substream_chip(substream);
449         int result = 0;
450         unsigned int what;
451         struct list_head *pos;
452         snd_pcm_substream_t *s;
453         int do_start;
454
455 #if 0
456         printk("codec trigger!!! - what = %i, enable = %i, status = 0x%x\n", what, enable, cs4231_inb(chip, CS4231P(STATUS)));
457 #endif
458
459         switch (cmd) {
460         case SNDRV_PCM_TRIGGER_START:
461         case SNDRV_PCM_TRIGGER_RESUME:
462                 do_start = 1; break;
463         case SNDRV_PCM_TRIGGER_STOP:
464         case SNDRV_PCM_TRIGGER_SUSPEND:
465                 do_start = 0; break;
466         default:
467                 return -EINVAL;
468         }
469
470         what = 0;
471         snd_pcm_group_for_each(pos, substream) {
472                 s = snd_pcm_group_substream_entry(pos);
473                 if (s == chip->playback_substream) {
474                         what |= CS4231_PLAYBACK_ENABLE;
475                         snd_pcm_trigger_done(s, substream);
476                 } else if (s == chip->capture_substream) {
477                         what |= CS4231_RECORD_ENABLE;
478                         snd_pcm_trigger_done(s, substream);
479                 }
480         }
481         spin_lock(&chip->reg_lock);
482         if (do_start) {
483                 chip->image[CS4231_IFACE_CTRL] |= what;
484                 if (chip->trigger)
485                         chip->trigger(chip, what, 1);
486         } else {
487                 chip->image[CS4231_IFACE_CTRL] &= ~what;
488                 if (chip->trigger)
489                         chip->trigger(chip, what, 0);
490         }
491         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
492         spin_unlock(&chip->reg_lock);
493 #if 0
494         snd_cs4231_debug(chip);
495 #endif
496         return result;
497 }
498
499 /*
500  *  CODEC I/O
501  */
502
503 static unsigned char snd_cs4231_get_rate(unsigned int rate)
504 {
505         int i;
506
507         for (i = 0; i < 14; i++)
508                 if (rate == rates[i])
509                         return freq_bits[i];
510         // snd_BUG();
511         return freq_bits[13];
512 }
513
514 static unsigned char snd_cs4231_get_format(cs4231_t *chip,
515                                            int format,
516                                            int channels)
517 {
518         unsigned char rformat;
519
520         rformat = CS4231_LINEAR_8;
521         switch (format) {
522         case SNDRV_PCM_FORMAT_MU_LAW:   rformat = CS4231_ULAW_8; break;
523         case SNDRV_PCM_FORMAT_A_LAW:    rformat = CS4231_ALAW_8; break;
524         case SNDRV_PCM_FORMAT_S16_LE:   rformat = CS4231_LINEAR_16; break;
525         case SNDRV_PCM_FORMAT_S16_BE:   rformat = CS4231_LINEAR_16_BIG; break;
526         case SNDRV_PCM_FORMAT_IMA_ADPCM:        rformat = CS4231_ADPCM_16; break;
527         }
528         if (channels > 1)
529                 rformat |= CS4231_STEREO;
530 #if 0
531         snd_printk("get_format: 0x%x (mode=0x%x)\n", format, mode);
532 #endif
533         return rformat;
534 }
535
536 static void snd_cs4231_calibrate_mute(cs4231_t *chip, int mute)
537 {
538         unsigned long flags;
539
540         mute = mute ? 1 : 0;
541         spin_lock_irqsave(&chip->reg_lock, flags);
542         if (chip->calibrate_mute == mute) {
543                 spin_unlock_irqrestore(&chip->reg_lock, flags);
544                 return;
545         }
546         if (!mute) {
547                 snd_cs4231_dout(chip, CS4231_LEFT_INPUT, chip->image[CS4231_LEFT_INPUT]);
548                 snd_cs4231_dout(chip, CS4231_RIGHT_INPUT, chip->image[CS4231_RIGHT_INPUT]);
549                 snd_cs4231_dout(chip, CS4231_LOOPBACK, chip->image[CS4231_LOOPBACK]);
550         }
551         snd_cs4231_dout(chip, CS4231_AUX1_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_LEFT_INPUT]);
552         snd_cs4231_dout(chip, CS4231_AUX1_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX1_RIGHT_INPUT]);
553         snd_cs4231_dout(chip, CS4231_AUX2_LEFT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_LEFT_INPUT]);
554         snd_cs4231_dout(chip, CS4231_AUX2_RIGHT_INPUT, mute ? 0x80 : chip->image[CS4231_AUX2_RIGHT_INPUT]);
555         snd_cs4231_dout(chip, CS4231_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LEFT_OUTPUT]);
556         snd_cs4231_dout(chip, CS4231_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_OUTPUT]);
557         snd_cs4231_dout(chip, CS4231_LEFT_LINE_IN, mute ? 0x80 : chip->image[CS4231_LEFT_LINE_IN]);
558         snd_cs4231_dout(chip, CS4231_RIGHT_LINE_IN, mute ? 0x80 : chip->image[CS4231_RIGHT_LINE_IN]);
559         snd_cs4231_dout(chip, CS4231_MONO_CTRL, mute ? 0xc0 : chip->image[CS4231_MONO_CTRL]);
560         if (chip->hardware == CS4231_HW_INTERWAVE) {
561                 snd_cs4231_dout(chip, CS4231_LEFT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_LEFT_MIC_INPUT]);
562                 snd_cs4231_dout(chip, CS4231_RIGHT_MIC_INPUT, mute ? 0x80 : chip->image[CS4231_RIGHT_MIC_INPUT]);               
563                 snd_cs4231_dout(chip, CS4231_LINE_LEFT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_LEFT_OUTPUT]);
564                 snd_cs4231_dout(chip, CS4231_LINE_RIGHT_OUTPUT, mute ? 0x80 : chip->image[CS4231_LINE_RIGHT_OUTPUT]);
565         }
566         chip->calibrate_mute = mute;
567         spin_unlock_irqrestore(&chip->reg_lock, flags);
568 }
569
570 static void snd_cs4231_playback_format(cs4231_t *chip,
571                                        snd_pcm_hw_params_t *params,
572                                        unsigned char pdfr)
573 {
574         unsigned long flags;
575         int full_calib = 1;
576
577         down(&chip->mce_mutex);
578         snd_cs4231_calibrate_mute(chip, 1);
579         if (chip->hardware == CS4231_HW_CS4231A ||
580             (chip->hardware & CS4231_HW_CS4232_MASK)) {
581                 spin_lock_irqsave(&chip->reg_lock, flags);
582                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (pdfr & 0x0f)) {      /* rate is same? */
583                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x10);
584                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
585                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x10);
586                         udelay(100); /* Fixes audible clicks at least on GUS MAX */
587                         full_calib = 0;
588                 }
589                 spin_unlock_irqrestore(&chip->reg_lock, flags);
590         }
591         if (full_calib) {
592                 snd_cs4231_mce_up(chip);
593                 spin_lock_irqsave(&chip->reg_lock, flags);
594                 if (chip->hardware != CS4231_HW_INTERWAVE && !chip->single_dma) {
595                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
596                                         (chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE) ?
597                                         (pdfr & 0xf0) | (chip->image[CS4231_REC_FORMAT] & 0x0f) :
598                                         pdfr);
599                 } else {
600                         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT] = pdfr);
601                 }
602                 spin_unlock_irqrestore(&chip->reg_lock, flags);
603                 snd_cs4231_mce_down(chip);
604         }
605         snd_cs4231_calibrate_mute(chip, 0);
606         up(&chip->mce_mutex);
607 }
608
609 static void snd_cs4231_capture_format(cs4231_t *chip,
610                                       snd_pcm_hw_params_t *params,
611                                       unsigned char cdfr)
612 {
613         unsigned long flags;
614         int full_calib = 1;
615
616         down(&chip->mce_mutex);
617         snd_cs4231_calibrate_mute(chip, 1);
618         if (chip->hardware == CS4231_HW_CS4231A ||
619             (chip->hardware & CS4231_HW_CS4232_MASK)) {
620                 spin_lock_irqsave(&chip->reg_lock, flags);
621                 if ((chip->image[CS4231_PLAYBK_FORMAT] & 0x0f) == (cdfr & 0x0f) ||      /* rate is same? */
622                     (chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
623                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | 0x20);
624                         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT] = cdfr);
625                         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~0x20);
626                         full_calib = 0;
627                 }
628                 spin_unlock_irqrestore(&chip->reg_lock, flags);
629         }
630         if (full_calib) {
631                 snd_cs4231_mce_up(chip);
632                 spin_lock_irqsave(&chip->reg_lock, flags);
633                 if (chip->hardware != CS4231_HW_INTERWAVE) {
634                         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE)) {
635                                 snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT,
636                                                ((chip->single_dma ? cdfr : chip->image[CS4231_PLAYBK_FORMAT]) & 0xf0) |
637                                                (cdfr & 0x0f));
638                                 spin_unlock_irqrestore(&chip->reg_lock, flags);
639                                 snd_cs4231_mce_down(chip);
640                                 snd_cs4231_mce_up(chip);
641                                 spin_lock_irqsave(&chip->reg_lock, flags);
642                         }
643                 }
644                 snd_cs4231_out(chip, CS4231_REC_FORMAT, cdfr);
645                 spin_unlock_irqrestore(&chip->reg_lock, flags);
646                 snd_cs4231_mce_down(chip);
647         }
648         snd_cs4231_calibrate_mute(chip, 0);
649         up(&chip->mce_mutex);
650 }
651
652 /*
653  *  Timer interface
654  */
655
656 static unsigned long snd_cs4231_timer_resolution(snd_timer_t * timer)
657 {
658         cs4231_t *chip = snd_timer_chip(timer);
659         if (chip->hardware & CS4231_HW_CS4236B_MASK)
660                 return 14467;
661         else
662                 return chip->image[CS4231_PLAYBK_FORMAT] & 1 ? 9969 : 9920;
663 }
664
665 static int snd_cs4231_timer_start(snd_timer_t * timer)
666 {
667         unsigned long flags;
668         unsigned int ticks;
669         cs4231_t *chip = snd_timer_chip(timer);
670         spin_lock_irqsave(&chip->reg_lock, flags);
671         ticks = timer->sticks;
672         if ((chip->image[CS4231_ALT_FEATURE_1] & CS4231_TIMER_ENABLE) == 0 ||
673             (unsigned char)(ticks >> 8) != chip->image[CS4231_TIMER_HIGH] ||
674             (unsigned char)ticks != chip->image[CS4231_TIMER_LOW]) {
675                 snd_cs4231_out(chip, CS4231_TIMER_HIGH, chip->image[CS4231_TIMER_HIGH] = (unsigned char) (ticks >> 8));
676                 snd_cs4231_out(chip, CS4231_TIMER_LOW, chip->image[CS4231_TIMER_LOW] = (unsigned char) ticks);
677                 snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] | CS4231_TIMER_ENABLE);
678         }
679         spin_unlock_irqrestore(&chip->reg_lock, flags);
680         return 0;
681 }
682
683 static int snd_cs4231_timer_stop(snd_timer_t * timer)
684 {
685         unsigned long flags;
686         cs4231_t *chip = snd_timer_chip(timer);
687         spin_lock_irqsave(&chip->reg_lock, flags);
688         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1] &= ~CS4231_TIMER_ENABLE);
689         spin_unlock_irqrestore(&chip->reg_lock, flags);
690         return 0;
691 }
692
693 static void snd_cs4231_init(cs4231_t *chip)
694 {
695         unsigned long flags;
696
697         snd_cs4231_mce_down(chip);
698
699 #ifdef SNDRV_DEBUGq_MCE
700         snd_printk("init: (1)\n");
701 #endif
702         snd_cs4231_mce_up(chip);
703         spin_lock_irqsave(&chip->reg_lock, flags);
704         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
705                              CS4231_RECORD_ENABLE | CS4231_RECORD_PIO |
706                              CS4231_CALIB_MODE);
707         chip->image[CS4231_IFACE_CTRL] |= CS4231_AUTOCALIB;
708         snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
709         spin_unlock_irqrestore(&chip->reg_lock, flags);
710         snd_cs4231_mce_down(chip);
711
712 #ifdef SNDRV_DEBUG_MCE
713         snd_printk("init: (2)\n");
714 #endif
715
716         snd_cs4231_mce_up(chip);
717         spin_lock_irqsave(&chip->reg_lock, flags);
718         snd_cs4231_out(chip, CS4231_ALT_FEATURE_1, chip->image[CS4231_ALT_FEATURE_1]);
719         spin_unlock_irqrestore(&chip->reg_lock, flags);
720         snd_cs4231_mce_down(chip);
721
722 #ifdef SNDRV_DEBUG_MCE
723         snd_printk("init: (3) - afei = 0x%x\n", chip->image[CS4231_ALT_FEATURE_1]);
724 #endif
725
726         spin_lock_irqsave(&chip->reg_lock, flags);
727         snd_cs4231_out(chip, CS4231_ALT_FEATURE_2, chip->image[CS4231_ALT_FEATURE_2]);
728         spin_unlock_irqrestore(&chip->reg_lock, flags);
729
730         snd_cs4231_mce_up(chip);
731         spin_lock_irqsave(&chip->reg_lock, flags);
732         snd_cs4231_out(chip, CS4231_PLAYBK_FORMAT, chip->image[CS4231_PLAYBK_FORMAT]);
733         spin_unlock_irqrestore(&chip->reg_lock, flags);
734         snd_cs4231_mce_down(chip);
735
736 #ifdef SNDRV_DEBUG_MCE
737         snd_printk("init: (4)\n");
738 #endif
739
740         snd_cs4231_mce_up(chip);
741         spin_lock_irqsave(&chip->reg_lock, flags);
742         snd_cs4231_out(chip, CS4231_REC_FORMAT, chip->image[CS4231_REC_FORMAT]);
743         spin_unlock_irqrestore(&chip->reg_lock, flags);
744         snd_cs4231_mce_down(chip);
745
746 #ifdef SNDRV_DEBUG_MCE
747         snd_printk("init: (5)\n");
748 #endif
749 }
750
751 static int snd_cs4231_open(cs4231_t *chip, unsigned int mode)
752 {
753         unsigned long flags;
754
755         down(&chip->open_mutex);
756         if ((chip->mode & mode) ||
757             ((chip->mode & CS4231_MODE_OPEN) && chip->single_dma)) {
758                 up(&chip->open_mutex);
759                 return -EAGAIN;
760         }
761         if (chip->mode & CS4231_MODE_OPEN) {
762                 chip->mode |= mode;
763                 up(&chip->open_mutex);
764                 return 0;
765         }
766         /* ok. now enable and ack CODEC IRQ */
767         spin_lock_irqsave(&chip->reg_lock, flags);
768         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
769                        CS4231_RECORD_IRQ |
770                        CS4231_TIMER_IRQ);
771         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
772         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
773         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
774         chip->image[CS4231_PIN_CTRL] |= CS4231_IRQ_ENABLE;
775         snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
776         snd_cs4231_out(chip, CS4231_IRQ_STATUS, CS4231_PLAYBACK_IRQ |
777                        CS4231_RECORD_IRQ |
778                        CS4231_TIMER_IRQ);
779         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
780         spin_unlock_irqrestore(&chip->reg_lock, flags);
781
782         chip->mode = mode;
783         up(&chip->open_mutex);
784         return 0;
785 }
786
787 static void snd_cs4231_close(cs4231_t *chip, unsigned int mode)
788 {
789         unsigned long flags;
790
791         down(&chip->open_mutex);
792         chip->mode &= ~mode;
793         if (chip->mode & CS4231_MODE_OPEN) {
794                 up(&chip->open_mutex);
795                 return;
796         }
797         snd_cs4231_calibrate_mute(chip, 1);
798
799         /* disable IRQ */
800         spin_lock_irqsave(&chip->reg_lock, flags);
801         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
802         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
803         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
804         chip->image[CS4231_PIN_CTRL] &= ~CS4231_IRQ_ENABLE;
805         snd_cs4231_out(chip, CS4231_PIN_CTRL, chip->image[CS4231_PIN_CTRL]);
806
807         /* now disable record & playback */
808
809         if (chip->image[CS4231_IFACE_CTRL] & (CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
810                                                CS4231_RECORD_ENABLE | CS4231_RECORD_PIO)) {
811                 spin_unlock_irqrestore(&chip->reg_lock, flags);
812                 snd_cs4231_mce_up(chip);
813                 spin_lock_irqsave(&chip->reg_lock, flags);
814                 chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO |
815                                                      CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
816                 snd_cs4231_out(chip, CS4231_IFACE_CTRL, chip->image[CS4231_IFACE_CTRL]);
817                 spin_unlock_irqrestore(&chip->reg_lock, flags);
818                 snd_cs4231_mce_down(chip);
819                 spin_lock_irqsave(&chip->reg_lock, flags);
820         }
821
822         /* clear IRQ again */
823         snd_cs4231_out(chip, CS4231_IRQ_STATUS, 0);
824         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
825         cs4231_outb(chip, CS4231P(STATUS), 0);  /* clear IRQ */
826         spin_unlock_irqrestore(&chip->reg_lock, flags);
827
828         snd_cs4231_calibrate_mute(chip, 0);
829
830         chip->mode = 0;
831         up(&chip->open_mutex);
832 }
833
834 /*
835  *  timer open/close
836  */
837
838 static int snd_cs4231_timer_open(snd_timer_t * timer)
839 {
840         cs4231_t *chip = snd_timer_chip(timer);
841         snd_cs4231_open(chip, CS4231_MODE_TIMER);
842         return 0;
843 }
844
845 static int snd_cs4231_timer_close(snd_timer_t * timer)
846 {
847         cs4231_t *chip = snd_timer_chip(timer);
848         snd_cs4231_close(chip, CS4231_MODE_TIMER);
849         return 0;
850 }
851
852 static struct _snd_timer_hardware snd_cs4231_timer_table =
853 {
854         .flags =        SNDRV_TIMER_HW_AUTO,
855         .resolution =   9945,
856         .ticks =        65535,
857         .open =         snd_cs4231_timer_open,
858         .close =        snd_cs4231_timer_close,
859         .c_resolution = snd_cs4231_timer_resolution,
860         .start =        snd_cs4231_timer_start,
861         .stop =         snd_cs4231_timer_stop,
862 };
863
864 /*
865  *  ok.. exported functions..
866  */
867
868 static int snd_cs4231_playback_hw_params(snd_pcm_substream_t * substream,
869                                          snd_pcm_hw_params_t * hw_params)
870 {
871         cs4231_t *chip = snd_pcm_substream_chip(substream);
872         unsigned char new_pdfr;
873         int err;
874
875         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
876                 return err;
877         new_pdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
878                    snd_cs4231_get_rate(params_rate(hw_params));
879         chip->set_playback_format(chip, hw_params, new_pdfr);
880         return 0;
881 }
882
883 static int snd_cs4231_playback_hw_free(snd_pcm_substream_t * substream)
884 {
885         return snd_pcm_lib_free_pages(substream);
886 }
887
888 #ifdef LEGACY_SUPPORT
889 static int snd_cs4231_playback_prepare(snd_pcm_substream_t * substream)
890 {
891         cs4231_t *chip = snd_pcm_substream_chip(substream);
892         snd_pcm_runtime_t *runtime = substream->runtime;
893         unsigned long flags;
894         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
895         unsigned int count = snd_pcm_lib_period_bytes(substream);
896
897         spin_lock_irqsave(&chip->reg_lock, flags);
898         chip->p_dma_size = size;
899         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_PLAYBACK_ENABLE | CS4231_PLAYBACK_PIO);
900         snd_dma_program(chip->dma1, runtime->dma_addr, size, DMA_MODE_WRITE | DMA_AUTOINIT);
901         count = snd_cs4231_get_count(chip->image[CS4231_PLAYBK_FORMAT], count) - 1;
902         snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
903         snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
904         spin_unlock_irqrestore(&chip->reg_lock, flags);
905 #if 0
906         snd_cs4231_debug(chip);
907 #endif
908         return 0;
909 }
910 #endif /* LEGACY_SUPPORT */
911
912 static int snd_cs4231_capture_hw_params(snd_pcm_substream_t * substream,
913                                         snd_pcm_hw_params_t * hw_params)
914 {
915         cs4231_t *chip = snd_pcm_substream_chip(substream);
916         unsigned char new_cdfr;
917         int err;
918
919         if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
920                 return err;
921         new_cdfr = snd_cs4231_get_format(chip, params_format(hw_params), params_channels(hw_params)) |
922                    snd_cs4231_get_rate(params_rate(hw_params));
923         chip->set_capture_format(chip, hw_params, new_cdfr);
924         return 0;
925 }
926
927 static int snd_cs4231_capture_hw_free(snd_pcm_substream_t * substream)
928 {
929         return snd_pcm_lib_free_pages(substream);
930 }
931
932 #ifdef LEGACY_SUPPORT
933 static int snd_cs4231_capture_prepare(snd_pcm_substream_t * substream)
934 {
935         cs4231_t *chip = snd_pcm_substream_chip(substream);
936         snd_pcm_runtime_t *runtime = substream->runtime;
937         unsigned long flags;
938         unsigned int size = snd_pcm_lib_buffer_bytes(substream);
939         unsigned int count = snd_pcm_lib_period_bytes(substream);
940
941         spin_lock_irqsave(&chip->reg_lock, flags);
942         chip->c_dma_size = size;
943         chip->image[CS4231_IFACE_CTRL] &= ~(CS4231_RECORD_ENABLE | CS4231_RECORD_PIO);
944         snd_dma_program(chip->dma2, runtime->dma_addr, size, DMA_MODE_READ | DMA_AUTOINIT);
945         count = snd_cs4231_get_count(chip->image[CS4231_REC_FORMAT], count) - 1;
946         if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
947                 snd_cs4231_out(chip, CS4231_PLY_LWR_CNT, (unsigned char) count);
948                 snd_cs4231_out(chip, CS4231_PLY_UPR_CNT, (unsigned char) (count >> 8));
949         } else {
950                 snd_cs4231_out(chip, CS4231_REC_LWR_CNT, (unsigned char) count);
951                 snd_cs4231_out(chip, CS4231_REC_UPR_CNT, (unsigned char) (count >> 8));
952         }
953         spin_unlock_irqrestore(&chip->reg_lock, flags);
954         return 0;
955 }
956 #endif
957
958 static void snd_cs4231_overrange(cs4231_t *chip)
959 {
960         unsigned long flags;
961         unsigned char res;
962
963         spin_lock_irqsave(&chip->reg_lock, flags);
964         res = snd_cs4231_in(chip, CS4231_TEST_INIT);
965         spin_unlock_irqrestore(&chip->reg_lock, flags);
966         if (res & (0x08 | 0x02))        /* detect overrange only above 0dB; may be user selectable? */
967                 chip->capture_substream->runtime->overrange++;
968 }
969
970 irqreturn_t snd_cs4231_interrupt(int irq, void *dev_id, struct pt_regs *regs)
971 {
972         cs4231_t *chip = snd_magic_cast(cs4231_t, dev_id, return IRQ_NONE);
973         unsigned char status;
974
975         status = snd_cs4231_in(chip, CS4231_IRQ_STATUS);
976         if (status & CS4231_TIMER_IRQ) {
977                 if (chip->timer)
978                         snd_timer_interrupt(chip->timer, chip->timer->sticks);
979         }               
980         if (chip->single_dma && chip->hardware != CS4231_HW_INTERWAVE) {
981                 if (status & CS4231_PLAYBACK_IRQ) {
982                         if (chip->mode & CS4231_MODE_PLAY)
983                                 snd_pcm_period_elapsed(chip->playback_substream);
984                         if (chip->mode & CS4231_MODE_RECORD) {
985                                 snd_cs4231_overrange(chip);
986                                 snd_pcm_period_elapsed(chip->capture_substream);
987                         }
988                 }
989         } else {
990                 if (status & CS4231_PLAYBACK_IRQ)
991                         snd_pcm_period_elapsed(chip->playback_substream);
992                 if (status & CS4231_RECORD_IRQ) {
993                         snd_cs4231_overrange(chip);
994                         snd_pcm_period_elapsed(chip->capture_substream);
995                 }
996         }
997
998         spin_lock(&chip->reg_lock);
999         snd_cs4231_outm(chip, CS4231_IRQ_STATUS, ~CS4231_ALL_IRQS | ~status, 0);
1000         spin_unlock(&chip->reg_lock);
1001         return IRQ_HANDLED;
1002 }
1003
1004 #ifdef LEGACY_SUPPORT
1005 static snd_pcm_uframes_t snd_cs4231_playback_pointer(snd_pcm_substream_t * substream)
1006 {
1007         cs4231_t *chip = snd_pcm_substream_chip(substream);
1008         size_t ptr;
1009
1010         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_PLAYBACK_ENABLE))
1011                 return 0;
1012         ptr = snd_dma_pointer(chip->dma1, chip->p_dma_size);
1013         return bytes_to_frames(substream->runtime, ptr);
1014 }
1015
1016 static snd_pcm_uframes_t snd_cs4231_capture_pointer(snd_pcm_substream_t * substream)
1017 {
1018         cs4231_t *chip = snd_pcm_substream_chip(substream);
1019         size_t ptr;
1020         
1021         if (!(chip->image[CS4231_IFACE_CTRL] & CS4231_RECORD_ENABLE))
1022                 return 0;
1023         ptr = snd_dma_pointer(chip->dma2, chip->c_dma_size);
1024         return bytes_to_frames(substream->runtime, ptr);
1025 }
1026 #endif /* LEGACY_SUPPORT */
1027
1028 /*
1029
1030  */
1031
1032 int snd_cs4231_probe(cs4231_t *chip)
1033 {
1034         unsigned long flags;
1035         int i, id, rev;
1036         unsigned char *ptr;
1037         unsigned int hw;
1038
1039 #if 0
1040         snd_cs4231_debug(chip);
1041 #endif
1042         id = 0;
1043         for (i = 0; i < 50; i++) {
1044                 mb();
1045                 if (cs4231_inb(chip, CS4231P(REGSEL)) & CS4231_INIT)
1046                         udelay(2000);
1047                 else {
1048                         spin_lock_irqsave(&chip->reg_lock, flags);
1049                         snd_cs4231_out(chip, CS4231_MISC_INFO, CS4231_MODE2);
1050                         id = snd_cs4231_in(chip, CS4231_MISC_INFO) & 0x0f;
1051                         spin_unlock_irqrestore(&chip->reg_lock, flags);
1052                         if (id == 0x0a)
1053                                 break;  /* this is valid value */
1054                 }
1055         }
1056         snd_printdd("cs4231: port = 0x%lx, id = 0x%x\n", chip->port, id);
1057         if (id != 0x0a)
1058                 return -ENODEV; /* no valid device found */
1059
1060         if (((hw = chip->hardware) & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1061                 rev = snd_cs4231_in(chip, CS4231_VERSION) & 0xe7;
1062                 snd_printdd("CS4231: VERSION (I25) = 0x%x\n", rev);
1063                 if (rev == 0x80) {
1064                         unsigned char tmp = snd_cs4231_in(chip, 23);
1065                         snd_cs4231_out(chip, 23, ~tmp);
1066                         if (snd_cs4231_in(chip, 23) != tmp)
1067                                 chip->hardware = CS4231_HW_AD1845;
1068                         else
1069                                 chip->hardware = CS4231_HW_CS4231;
1070                 } else if (rev == 0xa0) {
1071                         chip->hardware = CS4231_HW_CS4231A;
1072                 } else if (rev == 0xa2) {
1073                         chip->hardware = CS4231_HW_CS4232;
1074                 } else if (rev == 0xb2) {
1075                         chip->hardware = CS4231_HW_CS4232A;
1076                 } else if (rev == 0x83) {
1077                         chip->hardware = CS4231_HW_CS4236;
1078                 } else if (rev == 0x03) {
1079                         chip->hardware = CS4231_HW_CS4236B;
1080                 } else {
1081                         snd_printk("unknown CS chip with version 0x%x\n", rev);
1082                         return -ENODEV;         /* unknown CS4231 chip? */
1083                 }
1084         }
1085         spin_lock_irqsave(&chip->reg_lock, flags);
1086         cs4231_inb(chip, CS4231P(STATUS));      /* clear any pendings IRQ */
1087         cs4231_outb(chip, CS4231P(STATUS), 0);
1088         mb();
1089         spin_unlock_irqrestore(&chip->reg_lock, flags);
1090
1091         chip->image[CS4231_MISC_INFO] = CS4231_MODE2;
1092         switch (chip->hardware) {
1093         case CS4231_HW_INTERWAVE:
1094                 chip->image[CS4231_MISC_INFO] = CS4231_IW_MODE3;
1095                 break;
1096         case CS4231_HW_CS4235:
1097         case CS4231_HW_CS4236B:
1098         case CS4231_HW_CS4237B:
1099         case CS4231_HW_CS4238B:
1100         case CS4231_HW_CS4239:
1101                 if (hw == CS4231_HW_DETECT3)
1102                         chip->image[CS4231_MISC_INFO] = CS4231_4236_MODE3;
1103                 else
1104                         chip->hardware = CS4231_HW_CS4236;
1105                 break;
1106         }
1107
1108         chip->image[CS4231_IFACE_CTRL] =
1109             (chip->image[CS4231_IFACE_CTRL] & ~CS4231_SINGLE_DMA) |
1110             (chip->single_dma ? CS4231_SINGLE_DMA : 0);
1111         chip->image[CS4231_ALT_FEATURE_1] = 0x80;
1112         chip->image[CS4231_ALT_FEATURE_2] = chip->hardware == CS4231_HW_INTERWAVE ? 0xc2 : 0x01;
1113         ptr = (unsigned char *) &chip->image;
1114         snd_cs4231_mce_down(chip);
1115         spin_lock_irqsave(&chip->reg_lock, flags);
1116         for (i = 0; i < 32; i++)        /* ok.. fill all CS4231 registers */
1117                 snd_cs4231_out(chip, i, *ptr++);
1118         spin_unlock_irqrestore(&chip->reg_lock, flags);
1119         snd_cs4231_mce_up(chip);
1120         snd_cs4231_mce_down(chip);
1121
1122         mdelay(2);
1123
1124         /* ok.. try check hardware version for CS4236+ chips */
1125         if ((hw & CS4231_HW_TYPE_MASK) == CS4231_HW_DETECT) {
1126                 if (chip->hardware == CS4231_HW_CS4236B) {
1127                         rev = snd_cs4236_ext_in(chip, CS4236_VERSION);
1128                         snd_cs4236_ext_out(chip, CS4236_VERSION, 0xff);
1129                         id = snd_cs4236_ext_in(chip, CS4236_VERSION);
1130                         snd_cs4236_ext_out(chip, CS4236_VERSION, rev);
1131                         snd_printdd("CS4231: ext version; rev = 0x%x, id = 0x%x\n", rev, id);
1132                         if ((id & 0x1f) == 0x1d) {      /* CS4235 */
1133                                 chip->hardware = CS4231_HW_CS4235;
1134                                 switch (id >> 5) {
1135                                 case 4:
1136                                 case 5:
1137                                 case 6:
1138                                         break;
1139                                 default:
1140                                         snd_printk("unknown CS4235 chip (enhanced version = 0x%x)\n", id);
1141                                 }
1142                         } else if ((id & 0x1f) == 0x0b) {       /* CS4236/B */
1143                                 switch (id >> 5) {
1144                                 case 4:
1145                                 case 5:
1146                                 case 6:
1147                                 case 7:
1148                                         chip->hardware = CS4231_HW_CS4236B;
1149                                         break;
1150                                 default:
1151                                         snd_printk("unknown CS4236 chip (enhanced version = 0x%x)\n", id);
1152                                 }
1153                         } else if ((id & 0x1f) == 0x08) {       /* CS4237B */
1154                                 chip->hardware = CS4231_HW_CS4237B;
1155                                 switch (id >> 5) {
1156                                 case 4:
1157                                 case 5:
1158                                 case 6:
1159                                 case 7:
1160                                         break;
1161                                 default:
1162                                         snd_printk("unknown CS4237B chip (enhanced version = 0x%x)\n", id);
1163                                 }
1164                         } else if ((id & 0x1f) == 0x09) {       /* CS4238B */
1165                                 chip->hardware = CS4231_HW_CS4238B;
1166                                 switch (id >> 5) {
1167                                 case 5:
1168                                 case 6:
1169                                 case 7:
1170                                         break;
1171                                 default:
1172                                         snd_printk("unknown CS4238B chip (enhanced version = 0x%x)\n", id);
1173                                 }
1174                         } else if ((id & 0x1f) == 0x1e) {       /* CS4239 */
1175                                 chip->hardware = CS4231_HW_CS4239;
1176                                 switch (id >> 5) {
1177                                 case 4:
1178                                 case 5:
1179                                 case 6:
1180                                         break;
1181                                 default:
1182                                         snd_printk("unknown CS4239 chip (enhanced version = 0x%x)\n", id);
1183                                 }
1184                         } else {
1185                                 snd_printk("unknown CS4236/CS423xB chip (enhanced version = 0x%x)\n", id);
1186                         }
1187                 }
1188         }
1189         return 0;               /* all things are ok.. */
1190 }
1191
1192 /*
1193
1194  */
1195
1196 static snd_pcm_hardware_t snd_cs4231_playback =
1197 {
1198         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1199                                  SNDRV_PCM_INFO_MMAP_VALID |
1200                                  SNDRV_PCM_INFO_RESUME |
1201                                  SNDRV_PCM_INFO_SYNC_START),
1202         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1203                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1204         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1205         .rate_min =             5510,
1206         .rate_max =             48000,
1207         .channels_min =         1,
1208         .channels_max =         2,
1209         .buffer_bytes_max =     (128*1024),
1210         .period_bytes_min =     64,
1211         .period_bytes_max =     (128*1024),
1212         .periods_min =          1,
1213         .periods_max =          1024,
1214         .fifo_size =            0,
1215 };
1216
1217 static snd_pcm_hardware_t snd_cs4231_capture =
1218 {
1219         .info =                 (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1220                                  SNDRV_PCM_INFO_MMAP_VALID |
1221                                  SNDRV_PCM_INFO_RESUME |
1222                                  SNDRV_PCM_INFO_SYNC_START),
1223         .formats =              (SNDRV_PCM_FMTBIT_MU_LAW | SNDRV_PCM_FMTBIT_A_LAW | SNDRV_PCM_FMTBIT_IMA_ADPCM |
1224                                  SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE),
1225         .rates =                SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000,
1226         .rate_min =             5510,
1227         .rate_max =             48000,
1228         .channels_min =         1,
1229         .channels_max =         2,
1230         .buffer_bytes_max =     (128*1024),
1231         .period_bytes_min =     64,
1232         .period_bytes_max =     (128*1024),
1233         .periods_min =          1,
1234         .periods_max =          1024,
1235         .fifo_size =            0,
1236 };
1237
1238 /*
1239
1240  */
1241
1242 static int snd_cs4231_playback_open(snd_pcm_substream_t * substream)
1243 {
1244         cs4231_t *chip = snd_pcm_substream_chip(substream);
1245         snd_pcm_runtime_t *runtime = substream->runtime;
1246         int err;
1247
1248         runtime->hw = snd_cs4231_playback;
1249
1250         /* hardware bug in InterWave chipset */
1251         if (chip->hardware == CS4231_HW_INTERWAVE && chip->dma1 > 3)
1252                 runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_MU_LAW;
1253         
1254         /* hardware limitation of cheap chips */
1255         if (chip->hardware == CS4231_HW_CS4235 ||
1256             chip->hardware == CS4231_HW_CS4239)
1257                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1258
1259 #ifdef LEGACY_SUPPORT
1260         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.buffer_bytes_max);
1261         snd_pcm_limit_isa_dma_size(chip->dma1, &runtime->hw.period_bytes_max);
1262
1263         if (chip->claim_dma) {
1264                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma1)) < 0)
1265                         return err;
1266         }
1267 #endif
1268
1269         if ((err = snd_cs4231_open(chip, CS4231_MODE_PLAY)) < 0) {
1270 #ifdef LEGACY_SUPPORT
1271                 if (chip->release_dma)
1272                         chip->release_dma(chip, chip->dma_private_data, chip->dma1);
1273 #endif
1274                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1275                 return err;
1276         }
1277         chip->playback_substream = substream;
1278 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1279         chip->p_periods_sent = 0;
1280 #endif
1281         snd_pcm_set_sync(substream);
1282         chip->rate_constraint(runtime);
1283         return 0;
1284 }
1285
1286 static int snd_cs4231_capture_open(snd_pcm_substream_t * substream)
1287 {
1288         cs4231_t *chip = snd_pcm_substream_chip(substream);
1289         snd_pcm_runtime_t *runtime = substream->runtime;
1290         int err;
1291
1292         runtime->hw = snd_cs4231_capture;
1293
1294         /* hardware limitation of cheap chips */
1295         if (chip->hardware == CS4231_HW_CS4235 ||
1296             chip->hardware == CS4231_HW_CS4239)
1297                 runtime->hw.formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE;
1298
1299 #ifdef LEGACY_SUPPORT
1300         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.buffer_bytes_max);
1301         snd_pcm_limit_isa_dma_size(chip->dma2, &runtime->hw.period_bytes_max);
1302
1303         if (chip->claim_dma) {
1304                 if ((err = chip->claim_dma(chip, chip->dma_private_data, chip->dma2)) < 0)
1305                         return err;
1306         }
1307 #endif
1308
1309         if ((err = snd_cs4231_open(chip, CS4231_MODE_RECORD)) < 0) {
1310 #ifdef LEGACY_SUPPORT
1311                 if (chip->release_dma)
1312                         chip->release_dma(chip, chip->dma_private_data, chip->dma2);
1313 #endif
1314                 snd_free_pages(runtime->dma_area, runtime->dma_bytes);
1315                 return err;
1316         }
1317         chip->capture_substream = substream;
1318 #if defined(SBUS_SUPPORT) || defined(EBUS_SUPPORT)
1319         chip->c_periods_sent = 0;
1320 #endif
1321         snd_pcm_set_sync(substream);
1322         chip->rate_constraint(runtime);
1323         return 0;
1324 }
1325
1326 static int snd_cs4231_playback_close(snd_pcm_substream_t * substream)
1327 {
1328         cs4231_t *chip = snd_pcm_substream_chip(substream);
1329
1330         chip->playback_substream = NULL;
1331         snd_cs4231_close(chip, CS4231_MODE_PLAY);
1332         return 0;
1333 }
1334
1335 static int snd_cs4231_capture_close(snd_pcm_substream_t * substream)
1336 {
1337         cs4231_t *chip = snd_pcm_substream_chip(substream);
1338
1339         chip->capture_substream = NULL;
1340         snd_cs4231_close(chip, CS4231_MODE_RECORD);
1341         return 0;
1342 }
1343
1344 #ifdef CONFIG_PM
1345
1346 static void snd_cs4231_suspend(cs4231_t *chip)
1347 {
1348         int reg;
1349         unsigned long flags;
1350         
1351         spin_lock_irqsave(&chip->reg_lock, flags);
1352         for (reg = 0; reg < 32; reg++)
1353                 chip->image[reg] = snd_cs4231_in(chip, reg);
1354         spin_unlock_irqrestore(&chip->reg_lock, flags);
1355 }
1356
1357 static void snd_cs4231_resume(cs4231_t *chip)
1358 {
1359         int reg;
1360         unsigned long flags;
1361         int timeout;
1362         
1363         snd_cs4231_mce_up(chip);
1364         spin_lock_irqsave(&chip->reg_lock, flags);
1365         for (reg = 0; reg < 32; reg++) {
1366                 switch (reg) {
1367                 case CS4231_VERSION:
1368                         break;
1369                 default:
1370                         snd_cs4231_out(chip, reg, chip->image[reg]);
1371                         break;
1372                 }
1373         }
1374         spin_unlock_irqrestore(&chip->reg_lock, flags);
1375 #if 0
1376         snd_cs4231_mce_down(chip);
1377 #else
1378         /* The following is a workaround to avoid freeze after resume on TP600E.
1379            This is the first half of copy of snd_cs4231_mce_down(), but doesn't
1380            include rescheduling.  -- iwai
1381            */
1382         snd_cs4231_busy_wait(chip);
1383         spin_lock_irqsave(&chip->reg_lock, flags);
1384         chip->mce_bit &= ~CS4231_MCE;
1385         timeout = cs4231_inb(chip, CS4231P(REGSEL));
1386         cs4231_outb(chip, CS4231P(REGSEL), chip->mce_bit | (timeout & 0x1f));
1387         spin_unlock_irqrestore(&chip->reg_lock, flags);
1388         if (timeout == 0x80)
1389                 snd_printk("down [0x%lx]: serious init problem - codec still busy\n", chip->port);
1390         if ((timeout & CS4231_MCE) == 0 ||
1391             !(chip->hardware & (CS4231_HW_CS4231_MASK | CS4231_HW_CS4232_MASK))) {
1392                 return;
1393         }
1394         snd_cs4231_busy_wait(chip);
1395 #endif
1396 }
1397
1398 static int snd_cs4231_pm_callback(struct pm_dev *dev, pm_request_t rqst, void *data)
1399 {
1400         cs4231_t *chip = snd_magic_cast(cs4231_t, dev->data, return 0);
1401
1402         switch (rqst) {
1403         case PM_SUSPEND:
1404                 if (chip->suspend)
1405                         (*chip->suspend)(chip);
1406                 break;
1407         case PM_RESUME:
1408                 if (chip->resume)
1409                         (*chip->resume)(chip);
1410                 break;
1411         }
1412         return 0;
1413 }
1414
1415 #endif /* CONFIG_PM */
1416
1417 #ifdef LEGACY_SUPPORT
1418
1419 static int snd_cs4231_free(cs4231_t *chip)
1420 {
1421         if (chip->res_port) {
1422                 release_resource(chip->res_port);
1423                 kfree_nocheck(chip->res_port);
1424         }
1425         if (chip->res_cport) {
1426                 release_resource(chip->res_cport);
1427                 kfree_nocheck(chip->res_cport);
1428         }
1429         if (chip->irq >= 0) {
1430                 disable_irq(chip->irq);
1431                 if (!(chip->hwshare & CS4231_HWSHARE_IRQ))
1432                         free_irq(chip->irq, (void *) chip);
1433         }
1434         if (!(chip->hwshare & CS4231_HWSHARE_DMA1) && chip->dma1 >= 0) {
1435                 snd_dma_disable(chip->dma1);
1436                 free_dma(chip->dma1);
1437         }
1438         if (!(chip->hwshare & CS4231_HWSHARE_DMA2) && chip->dma2 >= 0 && chip->dma2 != chip->dma1) {
1439                 snd_dma_disable(chip->dma2);
1440                 free_dma(chip->dma2);
1441         }
1442 #ifdef CONFIG_PM
1443         if (chip->pm_dev)
1444                 pm_unregister(chip->pm_dev);
1445 #endif
1446         if (chip->timer)
1447                 snd_device_free(chip->card, chip->timer);
1448         snd_magic_kfree(chip);
1449         return 0;
1450 }
1451
1452 static int snd_cs4231_dev_free(snd_device_t *device)
1453 {
1454         cs4231_t *chip = snd_magic_cast(cs4231_t, device->device_data, return -ENXIO);
1455         return snd_cs4231_free(chip);   
1456 }
1457
1458 #endif /* LEGACY_SUPPORT */
1459
1460 const char *snd_cs4231_chip_id(cs4231_t *chip)
1461 {
1462         switch (chip->hardware) {
1463         case CS4231_HW_CS4231:  return "CS4231";
1464         case CS4231_HW_CS4231A: return "CS4231A";
1465         case CS4231_HW_CS4232:  return "CS4232";
1466         case CS4231_HW_CS4232A: return "CS4232A";
1467         case CS4231_HW_CS4235:  return "CS4235";
1468         case CS4231_HW_CS4236:  return "CS4236";
1469         case CS4231_HW_CS4236B: return "CS4236B";
1470         case CS4231_HW_CS4237B: return "CS4237B";
1471         case CS4231_HW_CS4238B: return "CS4238B";
1472         case CS4231_HW_CS4239:  return "CS4239";
1473         case CS4231_HW_INTERWAVE: return "AMD InterWave";
1474         case CS4231_HW_OPL3SA2: return chip->card->shortname;
1475         case CS4231_HW_AD1845: return "AD1845";
1476         default: return "???";
1477         }
1478 }
1479
1480 static int snd_cs4231_new(snd_card_t * card,
1481                           unsigned short hardware,
1482                           unsigned short hwshare,
1483                           cs4231_t ** rchip)
1484 {
1485         cs4231_t *chip;
1486
1487         *rchip = NULL;
1488         chip = snd_magic_kcalloc(cs4231_t, 0, GFP_KERNEL);
1489         if (chip == NULL)
1490                 return -ENOMEM;
1491         chip->hardware = hardware;
1492         chip->hwshare = hwshare;
1493
1494         spin_lock_init(&chip->reg_lock);
1495         init_MUTEX(&chip->mce_mutex);
1496         init_MUTEX(&chip->open_mutex);
1497         chip->card = card;
1498         chip->rate_constraint = snd_cs4231_xrate;
1499         chip->set_playback_format = snd_cs4231_playback_format;
1500         chip->set_capture_format = snd_cs4231_capture_format;
1501         memcpy(&chip->image, &snd_cs4231_original_image, sizeof(snd_cs4231_original_image));
1502         
1503         *rchip = chip;
1504         return 0;
1505 }
1506
1507 #ifdef LEGACY_SUPPORT
1508
1509 int snd_cs4231_create(snd_card_t * card,
1510                       unsigned long port,
1511                       unsigned long cport,
1512                       int irq, int dma1, int dma2,
1513                       unsigned short hardware,
1514                       unsigned short hwshare,
1515                       cs4231_t ** rchip)
1516 {
1517         static snd_device_ops_t ops = {
1518                 .dev_free =     snd_cs4231_dev_free,
1519         };
1520         cs4231_t *chip;
1521         int err;
1522
1523         err = snd_cs4231_new(card, hardware, hwshare, &chip);
1524         if (err < 0)
1525                 return err;
1526         
1527         chip->irq = -1;
1528         chip->dma1 = -1;
1529         chip->dma2 = -1;
1530
1531         if ((chip->res_port = request_region(port, 4, "CS4231")) == NULL) {
1532                 snd_cs4231_free(chip);
1533                 return -EBUSY;
1534         }
1535         chip->port = port;
1536         if ((long)cport >= 0 && (chip->res_cport = request_region(cport, 8, "CS4232 Control")) == NULL) {
1537                 snd_cs4231_free(chip);
1538                 return -ENODEV;
1539         }
1540         chip->cport = cport;
1541         if (!(hwshare & CS4231_HWSHARE_IRQ) && request_irq(irq, snd_cs4231_interrupt, SA_INTERRUPT, "CS4231", (void *) chip)) {
1542                 snd_cs4231_free(chip);
1543                 return -EBUSY;
1544         }
1545         chip->irq = irq;
1546         if (!(hwshare & CS4231_HWSHARE_DMA1) && request_dma(dma1, "CS4231 - 1")) {
1547                 snd_cs4231_free(chip);
1548                 return -EBUSY;
1549         }
1550         chip->dma1 = dma1;
1551         if (!(hwshare & CS4231_HWSHARE_DMA2) && dma1 != dma2 && dma2 >= 0 && request_dma(dma2, "CS4231 - 2")) {
1552                 snd_cs4231_free(chip);
1553                 return -EBUSY;
1554         }
1555         if (dma1 == dma2 || dma2 < 0) {
1556                 chip->single_dma = 1;
1557                 chip->dma2 = chip->dma1;
1558         } else
1559                 chip->dma2 = dma2;
1560
1561         /* global setup */
1562         if (snd_cs4231_probe(chip) < 0) {
1563                 snd_cs4231_free(chip);
1564                 return -ENODEV;
1565         }
1566         snd_cs4231_init(chip);
1567
1568         if (chip->hardware & CS4231_HW_CS4232_MASK) {
1569                 if (chip->res_cport == NULL)
1570                         snd_printk("CS4232 control port features are not accessible\n");
1571         }
1572
1573         /* Register device */
1574         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1575                 snd_cs4231_free(chip);
1576                 return err;
1577         }
1578
1579 #ifdef CONFIG_PM
1580         /* Power Management */
1581         chip->suspend = snd_cs4231_suspend;
1582         chip->resume = snd_cs4231_resume;
1583         chip->pm_dev = pm_register(PM_ISA_DEV, 0, snd_cs4231_pm_callback);
1584         if (chip->pm_dev)
1585                 chip->pm_dev->data = chip;
1586 #endif
1587
1588         *rchip = chip;
1589         return 0;
1590 }
1591
1592 #endif /* LEGACY_SUPPORT */
1593
1594 static snd_pcm_ops_t snd_cs4231_playback_ops = {
1595         .open =         snd_cs4231_playback_open,
1596         .close =        snd_cs4231_playback_close,
1597         .ioctl =        snd_pcm_lib_ioctl,
1598         .hw_params =    snd_cs4231_playback_hw_params,
1599         .hw_free =      snd_cs4231_playback_hw_free,
1600         .prepare =      snd_cs4231_playback_prepare,
1601         .trigger =      snd_cs4231_trigger,
1602         .pointer =      snd_cs4231_playback_pointer,
1603 };
1604
1605 static snd_pcm_ops_t snd_cs4231_capture_ops = {
1606         .open =         snd_cs4231_capture_open,
1607         .close =        snd_cs4231_capture_close,
1608         .ioctl =        snd_pcm_lib_ioctl,
1609         .hw_params =    snd_cs4231_capture_hw_params,
1610         .hw_free =      snd_cs4231_capture_hw_free,
1611         .prepare =      snd_cs4231_capture_prepare,
1612         .trigger =      snd_cs4231_trigger,
1613         .pointer =      snd_cs4231_capture_pointer,
1614 };
1615
1616 static void snd_cs4231_pcm_free(snd_pcm_t *pcm)
1617 {
1618         cs4231_t *chip = snd_magic_cast(cs4231_t, pcm->private_data, return);
1619         chip->pcm = NULL;
1620         snd_pcm_lib_preallocate_free_for_all(pcm);
1621 }
1622
1623 int snd_cs4231_pcm(cs4231_t *chip, int device, snd_pcm_t **rpcm)
1624 {
1625         snd_pcm_t *pcm;
1626         int err;
1627
1628         if ((err = snd_pcm_new(chip->card, "CS4231", device, 1, 1, &pcm)) < 0)
1629                 return err;
1630
1631         spin_lock_init(&chip->reg_lock);
1632         init_MUTEX(&chip->mce_mutex);
1633         init_MUTEX(&chip->open_mutex);
1634
1635         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_cs4231_playback_ops);
1636         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_cs4231_capture_ops);
1637         
1638         /* global setup */
1639         pcm->private_data = chip;
1640         pcm->private_free = snd_cs4231_pcm_free;
1641         pcm->info_flags = 0;
1642         if (chip->single_dma)
1643                 pcm->info_flags |= SNDRV_PCM_INFO_HALF_DUPLEX;
1644         if (chip->hardware != CS4231_HW_INTERWAVE)
1645                 pcm->info_flags |= SNDRV_PCM_INFO_JOINT_DUPLEX;
1646         strcpy(pcm->name, snd_cs4231_chip_id(chip));
1647
1648 #ifdef LEGACY_SUPPORT
1649         snd_pcm_lib_preallocate_isa_pages_for_all(pcm, 64*1024, chip->dma1 > 3 || chip->dma2 > 3 ? 128*1024 : 64*1024);
1650 #else
1651 #  ifdef EBUS_SUPPORT
1652         if (chip->ebus_flag) {
1653                 snd_pcm_lib_preallocate_pci_pages_for_all(chip->dev_u.pdev, pcm,
1654                                                           64*1024, 128*1024);
1655         } else {
1656 #  endif
1657 #  ifdef SBUS_SUPPORT
1658                 snd_pcm_lib_preallocate_sbus_pages_for_all(chip->dev_u.sdev, pcm,
1659                                                            64*1024, 128*1024);
1660 #  endif
1661 #  ifdef EBUS_SUPPORT
1662         }
1663 #  endif
1664 #endif
1665
1666         chip->pcm = pcm;
1667         if (rpcm)
1668                 *rpcm = pcm;
1669         return 0;
1670 }
1671
1672 static void snd_cs4231_timer_free(snd_timer_t *timer)
1673 {
1674         cs4231_t *chip = snd_magic_cast(cs4231_t, timer->private_data, return);
1675         chip->timer = NULL;
1676 }
1677
1678 int snd_cs4231_timer(cs4231_t *chip, int device, snd_timer_t **rtimer)
1679 {
1680         snd_timer_t *timer;
1681         snd_timer_id_t tid;
1682         int err;
1683
1684         /* Timer initialization */
1685         tid.dev_class = SNDRV_TIMER_CLASS_CARD;
1686         tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE;
1687         tid.card = chip->card->number;
1688         tid.device = device;
1689         tid.subdevice = 0;
1690         if ((err = snd_timer_new(chip->card, "CS4231", &tid, &timer)) < 0)
1691                 return err;
1692         strcpy(timer->name, snd_cs4231_chip_id(chip));
1693         timer->private_data = chip;
1694         timer->private_free = snd_cs4231_timer_free;
1695         timer->hw = snd_cs4231_timer_table;
1696         chip->timer = timer;
1697         if (rtimer)
1698                 *rtimer = timer;
1699         return 0;
1700 }
1701         
1702 /*
1703  *  MIXER part
1704  */
1705
1706 static int snd_cs4231_info_mux(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1707 {
1708         static char *texts[4] = {
1709                 "Line", "Aux", "Mic", "Mix"
1710         };
1711         static char *opl3sa_texts[4] = {
1712                 "Line", "CD", "Mic", "Mix"
1713         };
1714         static char *gusmax_texts[4] = {
1715                 "Line", "Synth", "Mic", "Mix"
1716         };
1717         char **ptexts = texts;
1718         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1719
1720         snd_assert(chip->card != NULL, return -EINVAL);
1721         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1722         uinfo->count = 2;
1723         uinfo->value.enumerated.items = 4;
1724         if (uinfo->value.enumerated.item > 3)
1725                 uinfo->value.enumerated.item = 3;
1726         if (!strcmp(chip->card->driver, "GUS MAX"))
1727                 ptexts = gusmax_texts;
1728         switch (chip->hardware) {
1729         case CS4231_HW_INTERWAVE: ptexts = gusmax_texts; break;
1730         case CS4231_HW_OPL3SA2: ptexts = opl3sa_texts; break;
1731         }
1732         strcpy(uinfo->value.enumerated.name, ptexts[uinfo->value.enumerated.item]);
1733         return 0;
1734 }
1735
1736 static int snd_cs4231_get_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1737 {
1738         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1739         unsigned long flags;
1740         
1741         spin_lock_irqsave(&chip->reg_lock, flags);
1742         ucontrol->value.enumerated.item[0] = (chip->image[CS4231_LEFT_INPUT] & CS4231_MIXS_ALL) >> 6;
1743         ucontrol->value.enumerated.item[1] = (chip->image[CS4231_RIGHT_INPUT] & CS4231_MIXS_ALL) >> 6;
1744         spin_unlock_irqrestore(&chip->reg_lock, flags);
1745         return 0;
1746 }
1747
1748 static int snd_cs4231_put_mux(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1749 {
1750         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1751         unsigned long flags;
1752         unsigned short left, right;
1753         int change;
1754         
1755         if (ucontrol->value.enumerated.item[0] > 3 ||
1756             ucontrol->value.enumerated.item[1] > 3)
1757                 return -EINVAL;
1758         left = ucontrol->value.enumerated.item[0] << 6;
1759         right = ucontrol->value.enumerated.item[1] << 6;
1760         spin_lock_irqsave(&chip->reg_lock, flags);
1761         left = (chip->image[CS4231_LEFT_INPUT] & ~CS4231_MIXS_ALL) | left;
1762         right = (chip->image[CS4231_RIGHT_INPUT] & ~CS4231_MIXS_ALL) | right;
1763         change = left != chip->image[CS4231_LEFT_INPUT] ||
1764                  right != chip->image[CS4231_RIGHT_INPUT];
1765         snd_cs4231_out(chip, CS4231_LEFT_INPUT, left);
1766         snd_cs4231_out(chip, CS4231_RIGHT_INPUT, right);
1767         spin_unlock_irqrestore(&chip->reg_lock, flags);
1768         return change;
1769 }
1770
1771 int snd_cs4231_info_single(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1772 {
1773         int mask = (kcontrol->private_value >> 16) & 0xff;
1774
1775         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1776         uinfo->count = 1;
1777         uinfo->value.integer.min = 0;
1778         uinfo->value.integer.max = mask;
1779         return 0;
1780 }
1781
1782 int snd_cs4231_get_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1783 {
1784         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1785         unsigned long flags;
1786         int reg = kcontrol->private_value & 0xff;
1787         int shift = (kcontrol->private_value >> 8) & 0xff;
1788         int mask = (kcontrol->private_value >> 16) & 0xff;
1789         int invert = (kcontrol->private_value >> 24) & 0xff;
1790         
1791         spin_lock_irqsave(&chip->reg_lock, flags);
1792         ucontrol->value.integer.value[0] = (chip->image[reg] >> shift) & mask;
1793         spin_unlock_irqrestore(&chip->reg_lock, flags);
1794         if (invert)
1795                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1796         return 0;
1797 }
1798
1799 int snd_cs4231_put_single(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1800 {
1801         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1802         unsigned long flags;
1803         int reg = kcontrol->private_value & 0xff;
1804         int shift = (kcontrol->private_value >> 8) & 0xff;
1805         int mask = (kcontrol->private_value >> 16) & 0xff;
1806         int invert = (kcontrol->private_value >> 24) & 0xff;
1807         int change;
1808         unsigned short val;
1809         
1810         val = (ucontrol->value.integer.value[0] & mask);
1811         if (invert)
1812                 val = mask - val;
1813         val <<= shift;
1814         spin_lock_irqsave(&chip->reg_lock, flags);
1815         val = (chip->image[reg] & ~(mask << shift)) | val;
1816         change = val != chip->image[reg];
1817         snd_cs4231_out(chip, reg, val);
1818         spin_unlock_irqrestore(&chip->reg_lock, flags);
1819         return change;
1820 }
1821
1822 int snd_cs4231_info_double(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
1823 {
1824         int mask = (kcontrol->private_value >> 24) & 0xff;
1825
1826         uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1827         uinfo->count = 2;
1828         uinfo->value.integer.min = 0;
1829         uinfo->value.integer.max = mask;
1830         return 0;
1831 }
1832
1833 int snd_cs4231_get_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1834 {
1835         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1836         unsigned long flags;
1837         int left_reg = kcontrol->private_value & 0xff;
1838         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1839         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1840         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1841         int mask = (kcontrol->private_value >> 24) & 0xff;
1842         int invert = (kcontrol->private_value >> 22) & 1;
1843         
1844         spin_lock_irqsave(&chip->reg_lock, flags);
1845         ucontrol->value.integer.value[0] = (chip->image[left_reg] >> shift_left) & mask;
1846         ucontrol->value.integer.value[1] = (chip->image[right_reg] >> shift_right) & mask;
1847         spin_unlock_irqrestore(&chip->reg_lock, flags);
1848         if (invert) {
1849                 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1850                 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1851         }
1852         return 0;
1853 }
1854
1855 int snd_cs4231_put_double(snd_kcontrol_t * kcontrol, snd_ctl_elem_value_t * ucontrol)
1856 {
1857         cs4231_t *chip = snd_kcontrol_chip(kcontrol);
1858         unsigned long flags;
1859         int left_reg = kcontrol->private_value & 0xff;
1860         int right_reg = (kcontrol->private_value >> 8) & 0xff;
1861         int shift_left = (kcontrol->private_value >> 16) & 0x07;
1862         int shift_right = (kcontrol->private_value >> 19) & 0x07;
1863         int mask = (kcontrol->private_value >> 24) & 0xff;
1864         int invert = (kcontrol->private_value >> 22) & 1;
1865         int change;
1866         unsigned short val1, val2;
1867         
1868         val1 = ucontrol->value.integer.value[0] & mask;
1869         val2 = ucontrol->value.integer.value[1] & mask;
1870         if (invert) {
1871                 val1 = mask - val1;
1872                 val2 = mask - val2;
1873         }
1874         val1 <<= shift_left;
1875         val2 <<= shift_right;
1876         spin_lock_irqsave(&chip->reg_lock, flags);
1877         val1 = (chip->image[left_reg] & ~(mask << shift_left)) | val1;
1878         val2 = (chip->image[right_reg] & ~(mask << shift_right)) | val2;
1879         change = val1 != chip->image[left_reg] || val2 != chip->image[right_reg];
1880         snd_cs4231_out(chip, left_reg, val1);
1881         snd_cs4231_out(chip, right_reg, val2);
1882         spin_unlock_irqrestore(&chip->reg_lock, flags);
1883         return change;
1884 }
1885
1886 #define CS4231_CONTROLS (sizeof(snd_cs4231_controls)/sizeof(snd_kcontrol_new_t))
1887
1888 static snd_kcontrol_new_t snd_cs4231_controls[] = {
1889 CS4231_DOUBLE("PCM Playback Switch", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 7, 7, 1, 1),
1890 CS4231_DOUBLE("PCM Playback Volume", 0, CS4231_LEFT_OUTPUT, CS4231_RIGHT_OUTPUT, 0, 0, 63, 1),
1891 CS4231_DOUBLE("Line Playback Switch", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 7, 7, 1, 1),
1892 CS4231_DOUBLE("Line Playback Volume", 0, CS4231_LEFT_LINE_IN, CS4231_RIGHT_LINE_IN, 0, 0, 31, 1),
1893 CS4231_DOUBLE("Aux Playback Switch", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 7, 7, 1, 1),
1894 CS4231_DOUBLE("Aux Playback Volume", 0, CS4231_AUX1_LEFT_INPUT, CS4231_AUX1_RIGHT_INPUT, 0, 0, 31, 1),
1895 CS4231_DOUBLE("Aux Playback Switch", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 7, 7, 1, 1),
1896 CS4231_DOUBLE("Aux Playback Volume", 1, CS4231_AUX2_LEFT_INPUT, CS4231_AUX2_RIGHT_INPUT, 0, 0, 31, 1),
1897 CS4231_SINGLE("Mono Playback Switch", 0, CS4231_MONO_CTRL, 7, 1, 1),
1898 CS4231_SINGLE("Mono Playback Volume", 0, CS4231_MONO_CTRL, 0, 15, 1),
1899 CS4231_SINGLE("Mono Output Playback Switch", 0, CS4231_MONO_CTRL, 6, 1, 1),
1900 CS4231_SINGLE("Mono Output Playback Bypass", 0, CS4231_MONO_CTRL, 5, 1, 0),
1901 CS4231_DOUBLE("Capture Volume", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 0, 0, 15, 0),
1902 {
1903         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1904         .name = "Capture Source",
1905         .info = snd_cs4231_info_mux,
1906         .get = snd_cs4231_get_mux,
1907         .put = snd_cs4231_put_mux,
1908 },
1909 CS4231_DOUBLE("Mic Boost", 0, CS4231_LEFT_INPUT, CS4231_RIGHT_INPUT, 5, 5, 1, 0),
1910 CS4231_SINGLE("Loopback Capture Switch", 0, CS4231_LOOPBACK, 0, 1, 0),
1911 CS4231_SINGLE("Loopback Capture Volume", 0, CS4231_LOOPBACK, 2, 63, 1)
1912 };
1913                                         
1914 int snd_cs4231_mixer(cs4231_t *chip)
1915 {
1916         snd_card_t *card;
1917         unsigned int idx;
1918         int err;
1919
1920         snd_assert(chip != NULL && chip->pcm != NULL, return -EINVAL);
1921
1922         card = chip->card;
1923
1924         strcpy(card->mixername, chip->pcm->name);
1925
1926         for (idx = 0; idx < CS4231_CONTROLS; idx++) {
1927                 if ((err = snd_ctl_add(card, snd_ctl_new1(&snd_cs4231_controls[idx], chip))) < 0)
1928                         return err;
1929         }
1930         return 0;
1931 }
1932
1933 EXPORT_SYMBOL(snd_cs4231_out);
1934 EXPORT_SYMBOL(snd_cs4231_in);
1935 EXPORT_SYMBOL(snd_cs4231_outm);
1936 EXPORT_SYMBOL(snd_cs4236_ext_out);
1937 EXPORT_SYMBOL(snd_cs4236_ext_in);
1938 EXPORT_SYMBOL(snd_cs4231_mce_up);
1939 EXPORT_SYMBOL(snd_cs4231_mce_down);
1940 EXPORT_SYMBOL(snd_cs4231_interrupt);
1941 EXPORT_SYMBOL(snd_cs4231_chip_id);
1942 EXPORT_SYMBOL(snd_cs4231_create);
1943 EXPORT_SYMBOL(snd_cs4231_pcm);
1944 EXPORT_SYMBOL(snd_cs4231_mixer);
1945 EXPORT_SYMBOL(snd_cs4231_timer);
1946 EXPORT_SYMBOL(snd_cs4231_info_single);
1947 EXPORT_SYMBOL(snd_cs4231_get_single);
1948 EXPORT_SYMBOL(snd_cs4231_put_single);
1949 EXPORT_SYMBOL(snd_cs4231_info_double);
1950 EXPORT_SYMBOL(snd_cs4231_get_double);
1951 EXPORT_SYMBOL(snd_cs4231_put_double);
1952
1953 /*
1954  *  INIT part
1955  */
1956
1957 static int __init alsa_cs4231_init(void)
1958 {
1959         return 0;
1960 }
1961
1962 static void __exit alsa_cs4231_exit(void)
1963 {
1964 }
1965
1966 module_init(alsa_cs4231_init)
1967 module_exit(alsa_cs4231_exit)