sound/pci/rme32.c

   1 /*
   2  *   ALSA driver for RME Digi32, Digi32/8 and Digi32 PRO audio interfaces
   3  *
   4  *      Copyright (c) 2002-2004 Martin Langer <martin-langer@gmx.de>,
   5  *                              Pilo Chambert <pilo.c@wanadoo.fr>
   6  *
   7  *      Thanks to :        Anders Torger <torger@ludd.luth.se>,
   8  *                         Henk Hesselink <henk@anda.nl>
   9  *                         for writing the digi96-driver
  10  *                         and RME for all informations.
  11  *
  12  *   This program is free software; you can redistribute it and/or modify
  13  *   it under the terms of the GNU General Public License as published by
  14  *   the Free Software Foundation; either version 2 of the License, or
  15  *   (at your option) any later version.
  16  *
  17  *   This program is distributed in the hope that it will be useful,
  18  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  19  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  20  *   GNU General Public License for more details.
  21  *
  22  *   You should have received a copy of the GNU General Public License
  23  *   along with this program; if not, write to the Free Software
  24  *   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25  *
  26  *
  27  * ****************************************************************************
  28  *
  29  * Note #1 "Sek'd models" ................................... martin 2002-12-07
  30  *
  31  * Identical soundcards by Sek'd were labeled:
  32  * RME Digi 32     = Sek'd Prodif 32
  33  * RME Digi 32 Pro = Sek'd Prodif 96
  34  * RME Digi 32/8   = Sek'd Prodif Gold
  35  *
  36  * ****************************************************************************
  37  *
  38  * Note #2 "full duplex mode" ............................... martin 2002-12-07
  39  *
  40  * Full duplex doesn't work. All cards (32, 32/8, 32Pro) are working identical
  41  * in this mode. Rec data and play data are using the same buffer therefore. At
  42  * first you have got the playing bits in the buffer and then (after playing
  43  * them) they were overwitten by the captured sound of the CS8412/14. Both
  44  * modes (play/record) are running harmonically hand in hand in the same buffer
  45  * and you have only one start bit plus one interrupt bit to control this
  46  * paired action.
  47  * This is opposite to the latter rme96 where playing and capturing is totally
  48  * separated and so their full duplex mode is supported by alsa (using two
  49  * start bits and two interrupts for two different buffers).
  50  * But due to the wrong sequence of playing and capturing ALSA shows no solved
  51  * full duplex support for the rme32 at the moment. That's bad, but I'm not
  52  * able to solve it. Are you motivated enough to solve this problem now? Your
  53  * patch would be welcome!
  54  *
  55  * ****************************************************************************
  56  *
  57  * "The story after the long seeking" -- tiwai
  58  *
  59  * Ok, the situation regarding the full duplex is now improved a bit.
  60  * In the fullduplex mode (given by the module parameter), the hardware buffer
  61  * is split to halves for read and write directions at the DMA pointer.
  62  * That is, the half above the current DMA pointer is used for write, and
  63  * the half below is used for read.  To mangle this strange behavior, an
  64  * software intermediate buffer is introduced.  This is, of course, not good
  65  * from the viewpoint of the data transfer efficiency.  However, this allows
  66  * you to use arbitrary buffer sizes, instead of the fixed I/O buffer size.
  67  *
  68  * ****************************************************************************
  69  */
  70
  71
  72 #include <linux/delay.h>
  73 #include <linux/init.h>
  74 #include <linux/interrupt.h>
  75 #include <linux/pci.h>
  76 #include <linux/slab.h>
  77 #include <linux/moduleparam.h>
  78
  79 #include <sound/core.h>
  80 #include <sound/info.h>
  81 #include <sound/control.h>
  82 #include <sound/pcm.h>
  83 #include <sound/pcm_params.h>
  84 #include <sound/pcm-indirect.h>
  85 #include <sound/asoundef.h>
  86 #include <sound/initval.h>
  87
  88 #include <asm/io.h>
  89
  90 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  91 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  92 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
  93 static int fullduplex[SNDRV_CARDS]; // = {[0 ... (SNDRV_CARDS - 1)] = 1};
  94
  95 module_param_array(index, int, NULL, 0444);
  96 MODULE_PARM_DESC(index, "Index value for RME Digi32 soundcard.");
  97 module_param_array(id, charp, NULL, 0444);
  98 MODULE_PARM_DESC(id, "ID string for RME Digi32 soundcard.");
  99 module_param_array(enable, bool, NULL, 0444);
 100 MODULE_PARM_DESC(enable, "Enable RME Digi32 soundcard.");
 101 module_param_array(fullduplex, bool, NULL, 0444);
 102 MODULE_PARM_DESC(fullduplex, "Support full-duplex mode.");
 103 MODULE_AUTHOR("Martin Langer <martin-langer@gmx.de>, Pilo Chambert <pilo.c@wanadoo.fr>");
 104 MODULE_DESCRIPTION("RME Digi32, Digi32/8, Digi32 PRO");
 105 MODULE_LICENSE("GPL");
 106 MODULE_SUPPORTED_DEVICE("{{RME,Digi32}," "{RME,Digi32/8}," "{RME,Digi32 PRO}}");
 107
 108 /* Defines for RME Digi32 series */
 109 #define RME32_SPDIF_NCHANNELS 2
 110
 111 /* Playback and capture buffer size */
 112 #define RME32_BUFFER_SIZE 0x20000
 113
 114 /* IO area size */
 115 #define RME32_IO_SIZE 0x30000
 116
 117 /* IO area offsets */
 118 #define RME32_IO_DATA_BUFFER        0x0
 119 #define RME32_IO_CONTROL_REGISTER   0x20000
 120 #define RME32_IO_GET_POS            0x20000
 121 #define RME32_IO_CONFIRM_ACTION_IRQ 0x20004
 122 #define RME32_IO_RESET_POS          0x20100
 123
 124 /* Write control register bits */
 125 #define RME32_WCR_START     (1 << 0)    /* startbit */
 126 #define RME32_WCR_MONO      (1 << 1)    /* 0=stereo, 1=mono
 127                                            Setting the whole card to mono
 128                                            doesn't seem to be very useful.
 129                                            A software-solution can handle
 130                                            full-duplex with one direction in
 131                                            stereo and the other way in mono.
 132                                            So, the hardware should work all
 133                                            the time in stereo! */
 134 #define RME32_WCR_MODE24    (1 << 2)    /* 0=16bit, 1=32bit */
 135 #define RME32_WCR_SEL       (1 << 3)    /* 0=input on output, 1=normal playback/capture */
 136 #define RME32_WCR_FREQ_0    (1 << 4)    /* frequency (play) */
 137 #define RME32_WCR_FREQ_1    (1 << 5)
 138 #define RME32_WCR_INP_0     (1 << 6)    /* input switch */
 139 #define RME32_WCR_INP_1     (1 << 7)
 140 #define RME32_WCR_RESET     (1 << 8)    /* Reset address */
 141 #define RME32_WCR_MUTE      (1 << 9)    /* digital mute for output */
 142 #define RME32_WCR_PRO       (1 << 10)   /* 1=professional, 0=consumer */
 143 #define RME32_WCR_DS_BM     (1 << 11)   /* 1=DoubleSpeed (only PRO-Version); 1=BlockMode (only Adat-Version) */
 144 #define RME32_WCR_ADAT      (1 << 12)   /* Adat Mode (only Adat-Version) */
 145 #define RME32_WCR_AUTOSYNC  (1 << 13)   /* AutoSync */
 146 #define RME32_WCR_PD        (1 << 14)   /* DAC Reset (only PRO-Version) */
 147 #define RME32_WCR_EMP       (1 << 15)   /* 1=Emphasis on (only PRO-Version) */
 148
 149 #define RME32_WCR_BITPOS_FREQ_0 4
 150 #define RME32_WCR_BITPOS_FREQ_1 5
 151 #define RME32_WCR_BITPOS_INP_0 6
 152 #define RME32_WCR_BITPOS_INP_1 7
 153
 154 /* Read control register bits */
 155 #define RME32_RCR_AUDIO_ADDR_MASK 0x1ffff
 156 #define RME32_RCR_LOCK      (1 << 23)   /* 1=locked, 0=not locked */
 157 #define RME32_RCR_ERF       (1 << 26)   /* 1=Error, 0=no Error */
 158 #define RME32_RCR_FREQ_0    (1 << 27)   /* CS841x frequency (record) */
 159 #define RME32_RCR_FREQ_1    (1 << 28)
 160 #define RME32_RCR_FREQ_2    (1 << 29)
 161 #define RME32_RCR_KMODE     (1 << 30)   /* card mode: 1=PLL, 0=quartz */
 162 #define RME32_RCR_IRQ       (1 << 31)   /* interrupt */
 163
 164 #define RME32_RCR_BITPOS_F0 27
 165 #define RME32_RCR_BITPOS_F1 28
 166 #define RME32_RCR_BITPOS_F2 29
 167
 168 /* Input types */
 169 #define RME32_INPUT_OPTICAL 0
 170 #define RME32_INPUT_COAXIAL 1
 171 #define RME32_INPUT_INTERNAL 2
 172 #define RME32_INPUT_XLR 3
 173
 174 /* Clock modes */
 175 #define RME32_CLOCKMODE_SLAVE 0
 176 #define RME32_CLOCKMODE_MASTER_32 1
 177 #define RME32_CLOCKMODE_MASTER_44 2
 178 #define RME32_CLOCKMODE_MASTER_48 3
 179
 180 /* Block sizes in bytes */
 181 #define RME32_BLOCK_SIZE 8192
 182
 183 /* Software intermediate buffer (max) size */
 184 #define RME32_MID_BUFFER_SIZE (1024*1024)
 185
 186 /* Hardware revisions */
 187 #define RME32_32_REVISION 192
 188 #define RME32_328_REVISION_OLD 100
 189 #define RME32_328_REVISION_NEW 101
 190 #define RME32_PRO_REVISION_WITH_8412 192
 191 #define RME32_PRO_REVISION_WITH_8414 150
 192
 193
 194 struct rme32 {
 195         spinlock_t lock;
 196         int irq;
 197         unsigned long port;
 198         void __iomem *iobase;
 199
 200         u32 wcreg;              /* cached write control register value */
 201         u32 wcreg_spdif;        /* S/PDIF setup */
 202         u32 wcreg_spdif_stream; /* S/PDIF setup (temporary) */
 203         u32 rcreg;              /* cached read control register value */
 204
 205         u8 rev;                 /* card revision number */
 206
 207         struct snd_pcm_substream *playback_substream;
 208         struct snd_pcm_substream *capture_substream;
 209
 210         int playback_frlog;     /* log2 of framesize */
 211         int capture_frlog;
 212
 213         size_t playback_periodsize;     /* in bytes, zero if not used */
 214         size_t capture_periodsize;      /* in bytes, zero if not used */
 215
 216         unsigned int fullduplex_mode;
 217         int running;
 218
 219         struct snd_pcm_indirect playback_pcm;
 220         struct snd_pcm_indirect capture_pcm;
 221
 222         struct snd_card *card;
 223         struct snd_pcm *spdif_pcm;
 224         struct snd_pcm *adat_pcm;
 225         struct pci_dev *pci;
 226         struct snd_kcontrol *spdif_ctl;
 227 };
 228
 229 static struct pci_device_id snd_rme32_ids[] = {
 230         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32,
 231          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 232         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_8,
 233          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 234         {PCI_VENDOR_ID_XILINX_RME, PCI_DEVICE_ID_RME_DIGI32_PRO,
 235          PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0,},
 236         {0,}
 237 };
 238
 239 MODULE_DEVICE_TABLE(pci, snd_rme32_ids);
 240
 241 #define RME32_ISWORKING(rme32) ((rme32)->wcreg & RME32_WCR_START)
 242 #define RME32_PRO_WITH_8414(rme32) ((rme32)->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO && (rme32)->rev == RME32_PRO_REVISION_WITH_8414)
 243
 244 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream);
 245
 246 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream);
 247
 248 static int snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd);
 249
 250 static void snd_rme32_proc_init(struct rme32 * rme32);
 251
 252 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32);
 253
 254 static inline unsigned int snd_rme32_pcm_byteptr(struct rme32 * rme32)
 255 {
 256         return (readl(rme32->iobase + RME32_IO_GET_POS)
 257                 & RME32_RCR_AUDIO_ADDR_MASK);
 258 }
 259
 260 /* silence callback for halfduplex mode */
 261 static int snd_rme32_playback_silence(struct snd_pcm_substream *substream, int channel, /* not used (interleaved data) */
 262                                       snd_pcm_uframes_t pos,
 263                                       snd_pcm_uframes_t count)
 264 {
 265         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 266         count <<= rme32->playback_frlog;
 267         pos <<= rme32->playback_frlog;
 268         memset_io(rme32->iobase + RME32_IO_DATA_BUFFER + pos, 0, count);
 269         return 0;
 270 }
 271
 272 /* copy callback for halfduplex mode */
 273 static int snd_rme32_playback_copy(struct snd_pcm_substream *substream, int channel,    /* not used (interleaved data) */
 274                                    snd_pcm_uframes_t pos,
 275                                    void __user *src, snd_pcm_uframes_t count)
 276 {
 277         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 278         count <<= rme32->playback_frlog;
 279         pos <<= rme32->playback_frlog;
 280         if (copy_from_user_toio(rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 281                             src, count))
 282                 return -EFAULT;
 283         return 0;
 284 }
 285
 286 /* copy callback for halfduplex mode */
 287 static int snd_rme32_capture_copy(struct snd_pcm_substream *substream, int channel,     /* not used (interleaved data) */
 288                                   snd_pcm_uframes_t pos,
 289                                   void __user *dst, snd_pcm_uframes_t count)
 290 {
 291         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 292         count <<= rme32->capture_frlog;
 293         pos <<= rme32->capture_frlog;
 294         if (copy_to_user_fromio(dst,
 295                             rme32->iobase + RME32_IO_DATA_BUFFER + pos,
 296                             count))
 297                 return -EFAULT;
 298         return 0;
 299 }
 300
 301 /*
 302  * SPDIF I/O capabilities (half-duplex mode)
 303  */
 304 static struct snd_pcm_hardware snd_rme32_spdif_info = {
 305         .info =         (SNDRV_PCM_INFO_MMAP_IOMEM |
 306                          SNDRV_PCM_INFO_MMAP_VALID |
 307                          SNDRV_PCM_INFO_INTERLEAVED |
 308                          SNDRV_PCM_INFO_PAUSE |
 309                          SNDRV_PCM_INFO_SYNC_START),
 310         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 311                          SNDRV_PCM_FMTBIT_S32_LE),
 312         .rates =        (SNDRV_PCM_RATE_32000 |
 313                          SNDRV_PCM_RATE_44100 |
 314                          SNDRV_PCM_RATE_48000),
 315         .rate_min =     32000,
 316         .rate_max =     48000,
 317         .channels_min = 2,
 318         .channels_max = 2,
 319         .buffer_bytes_max = RME32_BUFFER_SIZE,
 320         .period_bytes_min = RME32_BLOCK_SIZE,
 321         .period_bytes_max = RME32_BLOCK_SIZE,
 322         .periods_min =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 323         .periods_max =  RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 324         .fifo_size =    0,
 325 };
 326
 327 /*
 328  * ADAT I/O capabilities (half-duplex mode)
 329  */
 330 static struct snd_pcm_hardware snd_rme32_adat_info =
 331 {
 332         .info =              (SNDRV_PCM_INFO_MMAP_IOMEM |
 333                               SNDRV_PCM_INFO_MMAP_VALID |
 334                               SNDRV_PCM_INFO_INTERLEAVED |
 335                               SNDRV_PCM_INFO_PAUSE |
 336                               SNDRV_PCM_INFO_SYNC_START),
 337         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 338         .rates =             (SNDRV_PCM_RATE_44100 |
 339                               SNDRV_PCM_RATE_48000),
 340         .rate_min =          44100,
 341         .rate_max =          48000,
 342         .channels_min =      8,
 343         .channels_max =      8,
 344         .buffer_bytes_max =  RME32_BUFFER_SIZE,
 345         .period_bytes_min =  RME32_BLOCK_SIZE,
 346         .period_bytes_max =  RME32_BLOCK_SIZE,
 347         .periods_min =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 348         .periods_max =      RME32_BUFFER_SIZE / RME32_BLOCK_SIZE,
 349         .fifo_size =        0,
 350 };
 351
 352 /*
 353  * SPDIF I/O capabilities (full-duplex mode)
 354  */
 355 static struct snd_pcm_hardware snd_rme32_spdif_fd_info = {
 356         .info =         (SNDRV_PCM_INFO_MMAP |
 357                          SNDRV_PCM_INFO_MMAP_VALID |
 358                          SNDRV_PCM_INFO_INTERLEAVED |
 359                          SNDRV_PCM_INFO_PAUSE |
 360                          SNDRV_PCM_INFO_SYNC_START),
 361         .formats =      (SNDRV_PCM_FMTBIT_S16_LE |
 362                          SNDRV_PCM_FMTBIT_S32_LE),
 363         .rates =        (SNDRV_PCM_RATE_32000 |
 364                          SNDRV_PCM_RATE_44100 |
 365                          SNDRV_PCM_RATE_48000),
 366         .rate_min =     32000,
 367         .rate_max =     48000,
 368         .channels_min = 2,
 369         .channels_max = 2,
 370         .buffer_bytes_max = RME32_MID_BUFFER_SIZE,
 371         .period_bytes_min = RME32_BLOCK_SIZE,
 372         .period_bytes_max = RME32_BLOCK_SIZE,
 373         .periods_min =  2,
 374         .periods_max =  RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 375         .fifo_size =    0,
 376 };
 377
 378 /*
 379  * ADAT I/O capabilities (full-duplex mode)
 380  */
 381 static struct snd_pcm_hardware snd_rme32_adat_fd_info =
 382 {
 383         .info =              (SNDRV_PCM_INFO_MMAP |
 384                               SNDRV_PCM_INFO_MMAP_VALID |
 385                               SNDRV_PCM_INFO_INTERLEAVED |
 386                               SNDRV_PCM_INFO_PAUSE |
 387                               SNDRV_PCM_INFO_SYNC_START),
 388         .formats=            SNDRV_PCM_FMTBIT_S16_LE,
 389         .rates =             (SNDRV_PCM_RATE_44100 |
 390                               SNDRV_PCM_RATE_48000),
 391         .rate_min =          44100,
 392         .rate_max =          48000,
 393         .channels_min =      8,
 394         .channels_max =      8,
 395         .buffer_bytes_max =  RME32_MID_BUFFER_SIZE,
 396         .period_bytes_min =  RME32_BLOCK_SIZE,
 397         .period_bytes_max =  RME32_BLOCK_SIZE,
 398         .periods_min =      2,
 399         .periods_max =      RME32_MID_BUFFER_SIZE / RME32_BLOCK_SIZE,
 400         .fifo_size =        0,
 401 };
 402
 403 static void snd_rme32_reset_dac(struct rme32 *rme32)
 404 {
 405         writel(rme32->wcreg | RME32_WCR_PD,
 406                rme32->iobase + RME32_IO_CONTROL_REGISTER);
 407         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 408 }
 409
 410 static int snd_rme32_playback_getrate(struct rme32 * rme32)
 411 {
 412         int rate;
 413
 414         rate = ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 415                (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 416         switch (rate) {
 417         case 1:
 418                 rate = 32000;
 419                 break;
 420         case 2:
 421                 rate = 44100;
 422                 break;
 423         case 3:
 424                 rate = 48000;
 425                 break;
 426         default:
 427                 return -1;
 428         }
 429         return (rme32->wcreg & RME32_WCR_DS_BM) ? rate << 1 : rate;
 430 }
 431
 432 static int snd_rme32_capture_getrate(struct rme32 * rme32, int *is_adat)
 433 {
 434         int n;
 435
 436         *is_adat = 0;
 437         if (rme32->rcreg & RME32_RCR_LOCK) {
 438                 /* ADAT rate */
 439                 *is_adat = 1;
 440         }
 441         if (rme32->rcreg & RME32_RCR_ERF) {
 442                 return -1;
 443         }
 444
 445         /* S/PDIF rate */
 446         n = ((rme32->rcreg >> RME32_RCR_BITPOS_F0) & 1) +
 447                 (((rme32->rcreg >> RME32_RCR_BITPOS_F1) & 1) << 1) +
 448                 (((rme32->rcreg >> RME32_RCR_BITPOS_F2) & 1) << 2);
 449
 450         if (RME32_PRO_WITH_8414(rme32))
 451                 switch (n) {    /* supporting the CS8414 */
 452                 case 0:
 453                 case 1:
 454                 case 2:
 455                         return -1;
 456                 case 3:
 457                         return 96000;
 458                 case 4:
 459                         return 88200;
 460                 case 5:
 461                         return 48000;
 462                 case 6:
 463                         return 44100;
 464                 case 7:
 465                         return 32000;
 466                 default:
 467                         return -1;
 468                         break;
 469                 }
 470         else
 471                 switch (n) {    /* supporting the CS8412 */
 472                 case 0:
 473                         return -1;
 474                 case 1:
 475                         return 48000;
 476                 case 2:
 477                         return 44100;
 478                 case 3:
 479                         return 32000;
 480                 case 4:
 481                         return 48000;
 482                 case 5:
 483                         return 44100;
 484                 case 6:
 485                         return 44056;
 486                 case 7:
 487                         return 32000;
 488                 default:
 489                         break;
 490                 }
 491         return -1;
 492 }
 493
 494 static int snd_rme32_playback_setrate(struct rme32 * rme32, int rate)
 495 {
 496         int ds;
 497
 498         ds = rme32->wcreg & RME32_WCR_DS_BM;
 499         switch (rate) {
 500         case 32000:
 501                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 502                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 503                         ~RME32_WCR_FREQ_1;
 504                 break;
 505         case 44100:
 506                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 507                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 508                         ~RME32_WCR_FREQ_0;
 509                 break;
 510         case 48000:
 511                 rme32->wcreg &= ~RME32_WCR_DS_BM;
 512                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 513                         RME32_WCR_FREQ_1;
 514                 break;
 515         case 64000:
 516                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 517                         return -EINVAL;
 518                 rme32->wcreg |= RME32_WCR_DS_BM;
 519                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 520                         ~RME32_WCR_FREQ_1;
 521                 break;
 522         case 88200:
 523                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 524                         return -EINVAL;
 525                 rme32->wcreg |= RME32_WCR_DS_BM;
 526                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_1) &
 527                         ~RME32_WCR_FREQ_0;
 528                 break;
 529         case 96000:
 530                 if (rme32->pci->device != PCI_DEVICE_ID_RME_DIGI32_PRO)
 531                         return -EINVAL;
 532                 rme32->wcreg |= RME32_WCR_DS_BM;
 533                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 534                         RME32_WCR_FREQ_1;
 535                 break;
 536         default:
 537                 return -EINVAL;
 538         }
 539         if ((!ds && rme32->wcreg & RME32_WCR_DS_BM) ||
 540             (ds && !(rme32->wcreg & RME32_WCR_DS_BM)))
 541         {
 542                 /* change to/from double-speed: reset the DAC (if available) */
 543                 snd_rme32_reset_dac(rme32);
 544         } else {
 545                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 546         }
 547         return 0;
 548 }
 549
 550 static int snd_rme32_setclockmode(struct rme32 * rme32, int mode)
 551 {
 552         switch (mode) {
 553         case RME32_CLOCKMODE_SLAVE:
 554                 /* AutoSync */
 555                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) &
 556                         ~RME32_WCR_FREQ_1;
 557                 break;
 558         case RME32_CLOCKMODE_MASTER_32:
 559                 /* Internal 32.0kHz */
 560                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) &
 561                         ~RME32_WCR_FREQ_1;
 562                 break;
 563         case RME32_CLOCKMODE_MASTER_44:
 564                 /* Internal 44.1kHz */
 565                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_FREQ_0) |
 566                         RME32_WCR_FREQ_1;
 567                 break;
 568         case RME32_CLOCKMODE_MASTER_48:
 569                 /* Internal 48.0kHz */
 570                 rme32->wcreg = (rme32->wcreg | RME32_WCR_FREQ_0) |
 571                         RME32_WCR_FREQ_1;
 572                 break;
 573         default:
 574                 return -EINVAL;
 575         }
 576         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 577         return 0;
 578 }
 579
 580 static int snd_rme32_getclockmode(struct rme32 * rme32)
 581 {
 582         return ((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_0) & 1) +
 583             (((rme32->wcreg >> RME32_WCR_BITPOS_FREQ_1) & 1) << 1);
 584 }
 585
 586 static int snd_rme32_setinputtype(struct rme32 * rme32, int type)
 587 {
 588         switch (type) {
 589         case RME32_INPUT_OPTICAL:
 590                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) &
 591                         ~RME32_WCR_INP_1;
 592                 break;
 593         case RME32_INPUT_COAXIAL:
 594                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) &
 595                         ~RME32_WCR_INP_1;
 596                 break;
 597         case RME32_INPUT_INTERNAL:
 598                 rme32->wcreg = (rme32->wcreg & ~RME32_WCR_INP_0) |
 599                         RME32_WCR_INP_1;
 600                 break;
 601         case RME32_INPUT_XLR:
 602                 rme32->wcreg = (rme32->wcreg | RME32_WCR_INP_0) |
 603                         RME32_WCR_INP_1;
 604                 break;
 605         default:
 606                 return -EINVAL;
 607         }
 608         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 609         return 0;
 610 }
 611
 612 static int snd_rme32_getinputtype(struct rme32 * rme32)
 613 {
 614         return ((rme32->wcreg >> RME32_WCR_BITPOS_INP_0) & 1) +
 615             (((rme32->wcreg >> RME32_WCR_BITPOS_INP_1) & 1) << 1);
 616 }
 617
 618 static void
 619 snd_rme32_setframelog(struct rme32 * rme32, int n_channels, int is_playback)
 620 {
 621         int frlog;
 622
 623         if (n_channels == 2) {
 624                 frlog = 1;
 625         } else {
 626                 /* assume 8 channels */
 627                 frlog = 3;
 628         }
 629         if (is_playback) {
 630                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 631                 rme32->playback_frlog = frlog;
 632         } else {
 633                 frlog += (rme32->wcreg & RME32_WCR_MODE24) ? 2 : 1;
 634                 rme32->capture_frlog = frlog;
 635         }
 636 }
 637
 638 static int snd_rme32_setformat(struct rme32 * rme32, int format)
 639 {
 640         switch (format) {
 641         case SNDRV_PCM_FORMAT_S16_LE:
 642                 rme32->wcreg &= ~RME32_WCR_MODE24;
 643                 break;
 644         case SNDRV_PCM_FORMAT_S32_LE:
 645                 rme32->wcreg |= RME32_WCR_MODE24;
 646                 break;
 647         default:
 648                 return -EINVAL;
 649         }
 650         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 651         return 0;
 652 }
 653
 654 static int
 655 snd_rme32_playback_hw_params(struct snd_pcm_substream *substream,
 656                              struct snd_pcm_hw_params *params)
 657 {
 658         int err, rate, dummy;
 659         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 660         struct snd_pcm_runtime *runtime = substream->runtime;
 661
 662         if (rme32->fullduplex_mode) {
 663                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 664                 if (err < 0)
 665                         return err;
 666         } else {
 667                 runtime->dma_area = (void __force *)(rme32->iobase +
 668                                                      RME32_IO_DATA_BUFFER);
 669                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 670                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 671         }
 672
 673         spin_lock_irq(&rme32->lock);
 674         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 675             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 676                 /* AutoSync */
 677                 if ((int)params_rate(params) != rate) {
 678                         spin_unlock_irq(&rme32->lock);
 679                         return -EIO;
 680                 }
 681         } else if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 682                 spin_unlock_irq(&rme32->lock);
 683                 return err;
 684         }
 685         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 686                 spin_unlock_irq(&rme32->lock);
 687                 return err;
 688         }
 689
 690         snd_rme32_setframelog(rme32, params_channels(params), 1);
 691         if (rme32->capture_periodsize != 0) {
 692                 if (params_period_size(params) << rme32->playback_frlog != rme32->capture_periodsize) {
 693                         spin_unlock_irq(&rme32->lock);
 694                         return -EBUSY;
 695                 }
 696         }
 697         rme32->playback_periodsize = params_period_size(params) << rme32->playback_frlog;
 698         /* S/PDIF setup */
 699         if ((rme32->wcreg & RME32_WCR_ADAT) == 0) {
 700                 rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
 701                 rme32->wcreg |= rme32->wcreg_spdif_stream;
 702                 writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 703         }
 704         spin_unlock_irq(&rme32->lock);
 705
 706         return 0;
 707 }
 708
 709 static int
 710 snd_rme32_capture_hw_params(struct snd_pcm_substream *substream,
 711                             struct snd_pcm_hw_params *params)
 712 {
 713         int err, isadat, rate;
 714         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 715         struct snd_pcm_runtime *runtime = substream->runtime;
 716
 717         if (rme32->fullduplex_mode) {
 718                 err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
 719                 if (err < 0)
 720                         return err;
 721         } else {
 722                 runtime->dma_area = (void __force *)rme32->iobase +
 723                                         RME32_IO_DATA_BUFFER;
 724                 runtime->dma_addr = rme32->port + RME32_IO_DATA_BUFFER;
 725                 runtime->dma_bytes = RME32_BUFFER_SIZE;
 726         }
 727
 728         spin_lock_irq(&rme32->lock);
 729         /* enable AutoSync for record-preparing */
 730         rme32->wcreg |= RME32_WCR_AUTOSYNC;
 731         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 732
 733         if ((err = snd_rme32_setformat(rme32, params_format(params))) < 0) {
 734                 spin_unlock_irq(&rme32->lock);
 735                 return err;
 736         }
 737         if ((err = snd_rme32_playback_setrate(rme32, params_rate(params))) < 0) {
 738                 spin_unlock_irq(&rme32->lock);
 739                 return err;
 740         }
 741         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 742                 if ((int)params_rate(params) != rate) {
 743                         spin_unlock_irq(&rme32->lock);
 744                         return -EIO;
 745                 }
 746                 if ((isadat && runtime->hw.channels_min == 2) ||
 747                     (!isadat && runtime->hw.channels_min == 8)) {
 748                         spin_unlock_irq(&rme32->lock);
 749                         return -EIO;
 750                 }
 751         }
 752         /* AutoSync off for recording */
 753         rme32->wcreg &= ~RME32_WCR_AUTOSYNC;
 754         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 755
 756         snd_rme32_setframelog(rme32, params_channels(params), 0);
 757         if (rme32->playback_periodsize != 0) {
 758                 if (params_period_size(params) << rme32->capture_frlog !=
 759                     rme32->playback_periodsize) {
 760                         spin_unlock_irq(&rme32->lock);
 761                         return -EBUSY;
 762                 }
 763         }
 764         rme32->capture_periodsize =
 765             params_period_size(params) << rme32->capture_frlog;
 766         spin_unlock_irq(&rme32->lock);
 767
 768         return 0;
 769 }
 770
 771 static int snd_rme32_pcm_hw_free(struct snd_pcm_substream *substream)
 772 {
 773         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 774         if (! rme32->fullduplex_mode)
 775                 return 0;
 776         return snd_pcm_lib_free_pages(substream);
 777 }
 778
 779 static void snd_rme32_pcm_start(struct rme32 * rme32, int from_pause)
 780 {
 781         if (!from_pause) {
 782                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 783         }
 784
 785         rme32->wcreg |= RME32_WCR_START;
 786         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 787 }
 788
 789 static void snd_rme32_pcm_stop(struct rme32 * rme32, int to_pause)
 790 {
 791         /*
 792          * Check if there is an unconfirmed IRQ, if so confirm it, or else
 793          * the hardware will not stop generating interrupts
 794          */
 795         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 796         if (rme32->rcreg & RME32_RCR_IRQ) {
 797                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 798         }
 799         rme32->wcreg &= ~RME32_WCR_START;
 800         if (rme32->wcreg & RME32_WCR_SEL)
 801                 rme32->wcreg |= RME32_WCR_MUTE;
 802         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 803         if (! to_pause)
 804                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
 805 }
 806
 807 static irqreturn_t snd_rme32_interrupt(int irq, void *dev_id)
 808 {
 809         struct rme32 *rme32 = (struct rme32 *) dev_id;
 810
 811         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
 812         if (!(rme32->rcreg & RME32_RCR_IRQ)) {
 813                 return IRQ_NONE;
 814         } else {
 815                 if (rme32->capture_substream) {
 816                         snd_pcm_period_elapsed(rme32->capture_substream);
 817                 }
 818                 if (rme32->playback_substream) {
 819                         snd_pcm_period_elapsed(rme32->playback_substream);
 820                 }
 821                 writel(0, rme32->iobase + RME32_IO_CONFIRM_ACTION_IRQ);
 822         }
 823         return IRQ_HANDLED;
 824 }
 825
 826 static unsigned int period_bytes[] = { RME32_BLOCK_SIZE };
 827
 828
 829 static struct snd_pcm_hw_constraint_list hw_constraints_period_bytes = {
 830         .count = ARRAY_SIZE(period_bytes),
 831         .list = period_bytes,
 832         .mask = 0
 833 };
 834
 835 static void snd_rme32_set_buffer_constraint(struct rme32 *rme32, struct snd_pcm_runtime *runtime)
 836 {
 837         if (! rme32->fullduplex_mode) {
 838                 snd_pcm_hw_constraint_minmax(runtime,
 839                                              SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
 840                                              RME32_BUFFER_SIZE, RME32_BUFFER_SIZE);
 841                 snd_pcm_hw_constraint_list(runtime, 0,
 842                                            SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
 843                                            &hw_constraints_period_bytes);
 844         }
 845 }
 846
 847 static int snd_rme32_playback_spdif_open(struct snd_pcm_substream *substream)
 848 {
 849         int rate, dummy;
 850         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 851         struct snd_pcm_runtime *runtime = substream->runtime;
 852
 853         snd_pcm_set_sync(substream);
 854
 855         spin_lock_irq(&rme32->lock);
 856         if (rme32->playback_substream != NULL) {
 857                 spin_unlock_irq(&rme32->lock);
 858                 return -EBUSY;
 859         }
 860         rme32->wcreg &= ~RME32_WCR_ADAT;
 861         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 862         rme32->playback_substream = substream;
 863         spin_unlock_irq(&rme32->lock);
 864
 865         if (rme32->fullduplex_mode)
 866                 runtime->hw = snd_rme32_spdif_fd_info;
 867         else
 868                 runtime->hw = snd_rme32_spdif_info;
 869         if (rme32->pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO) {
 870                 runtime->hw.rates |= SNDRV_PCM_RATE_64000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 871                 runtime->hw.rate_max = 96000;
 872         }
 873         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 874             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 875                 /* AutoSync */
 876                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 877                 runtime->hw.rate_min = rate;
 878                 runtime->hw.rate_max = rate;
 879         }
 880
 881         snd_rme32_set_buffer_constraint(rme32, runtime);
 882
 883         rme32->wcreg_spdif_stream = rme32->wcreg_spdif;
 884         rme32->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
 885         snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
 886                        SNDRV_CTL_EVENT_MASK_INFO, &rme32->spdif_ctl->id);
 887         return 0;
 888 }
 889
 890 static int snd_rme32_capture_spdif_open(struct snd_pcm_substream *substream)
 891 {
 892         int isadat, rate;
 893         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 894         struct snd_pcm_runtime *runtime = substream->runtime;
 895
 896         snd_pcm_set_sync(substream);
 897
 898         spin_lock_irq(&rme32->lock);
 899         if (rme32->capture_substream != NULL) {
 900                 spin_unlock_irq(&rme32->lock);
 901                 return -EBUSY;
 902         }
 903         rme32->capture_substream = substream;
 904         spin_unlock_irq(&rme32->lock);
 905
 906         if (rme32->fullduplex_mode)
 907                 runtime->hw = snd_rme32_spdif_fd_info;
 908         else
 909                 runtime->hw = snd_rme32_spdif_info;
 910         if (RME32_PRO_WITH_8414(rme32)) {
 911                 runtime->hw.rates |= SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000;
 912                 runtime->hw.rate_max = 96000;
 913         }
 914         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 915                 if (isadat) {
 916                         return -EIO;
 917                 }
 918                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 919                 runtime->hw.rate_min = rate;
 920                 runtime->hw.rate_max = rate;
 921         }
 922
 923         snd_rme32_set_buffer_constraint(rme32, runtime);
 924
 925         return 0;
 926 }
 927
 928 static int
 929 snd_rme32_playback_adat_open(struct snd_pcm_substream *substream)
 930 {
 931         int rate, dummy;
 932         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 933         struct snd_pcm_runtime *runtime = substream->runtime;
 934
 935         snd_pcm_set_sync(substream);
 936
 937         spin_lock_irq(&rme32->lock);
 938         if (rme32->playback_substream != NULL) {
 939                 spin_unlock_irq(&rme32->lock);
 940                 return -EBUSY;
 941         }
 942         rme32->wcreg |= RME32_WCR_ADAT;
 943         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
 944         rme32->playback_substream = substream;
 945         spin_unlock_irq(&rme32->lock);
 946
 947         if (rme32->fullduplex_mode)
 948                 runtime->hw = snd_rme32_adat_fd_info;
 949         else
 950                 runtime->hw = snd_rme32_adat_info;
 951         if ((rme32->rcreg & RME32_RCR_KMODE) &&
 952             (rate = snd_rme32_capture_getrate(rme32, &dummy)) > 0) {
 953                 /* AutoSync */
 954                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 955                 runtime->hw.rate_min = rate;
 956                 runtime->hw.rate_max = rate;
 957         }
 958
 959         snd_rme32_set_buffer_constraint(rme32, runtime);
 960         return 0;
 961 }
 962
 963 static int
 964 snd_rme32_capture_adat_open(struct snd_pcm_substream *substream)
 965 {
 966         int isadat, rate;
 967         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
 968         struct snd_pcm_runtime *runtime = substream->runtime;
 969
 970         if (rme32->fullduplex_mode)
 971                 runtime->hw = snd_rme32_adat_fd_info;
 972         else
 973                 runtime->hw = snd_rme32_adat_info;
 974         if ((rate = snd_rme32_capture_getrate(rme32, &isadat)) > 0) {
 975                 if (!isadat) {
 976                         return -EIO;
 977                 }
 978                 runtime->hw.rates = snd_pcm_rate_to_rate_bit(rate);
 979                 runtime->hw.rate_min = rate;
 980                 runtime->hw.rate_max = rate;
 981         }
 982
 983         snd_pcm_set_sync(substream);
 984
 985         spin_lock_irq(&rme32->lock);
 986         if (rme32->capture_substream != NULL) {
 987                 spin_unlock_irq(&rme32->lock);
 988                 return -EBUSY;
 989         }
 990         rme32->capture_substream = substream;
 991         spin_unlock_irq(&rme32->lock);
 992
 993         snd_rme32_set_buffer_constraint(rme32, runtime);
 994         return 0;
 995 }
 996
 997 static int snd_rme32_playback_close(struct snd_pcm_substream *substream)
 998 {
 999         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1000         int spdif = 0;
1001
1002         spin_lock_irq(&rme32->lock);
1003         rme32->playback_substream = NULL;
1004         rme32->playback_periodsize = 0;
1005         spdif = (rme32->wcreg & RME32_WCR_ADAT) == 0;
1006         spin_unlock_irq(&rme32->lock);
1007         if (spdif) {
1008                 rme32->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
1009                 snd_ctl_notify(rme32->card, SNDRV_CTL_EVENT_MASK_VALUE |
1010                                SNDRV_CTL_EVENT_MASK_INFO,
1011                                &rme32->spdif_ctl->id);
1012         }
1013         return 0;
1014 }
1015
1016 static int snd_rme32_capture_close(struct snd_pcm_substream *substream)
1017 {
1018         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1019
1020         spin_lock_irq(&rme32->lock);
1021         rme32->capture_substream = NULL;
1022         rme32->capture_periodsize = 0;
1023         spin_unlock(&rme32->lock);
1024         return 0;
1025 }
1026
1027 static int snd_rme32_playback_prepare(struct snd_pcm_substream *substream)
1028 {
1029         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1030
1031         spin_lock_irq(&rme32->lock);
1032         if (rme32->fullduplex_mode) {
1033                 memset(&rme32->playback_pcm, 0, sizeof(rme32->playback_pcm));
1034                 rme32->playback_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1035                 rme32->playback_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1036         } else {
1037                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1038         }
1039         if (rme32->wcreg & RME32_WCR_SEL)
1040                 rme32->wcreg &= ~RME32_WCR_MUTE;
1041         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1042         spin_unlock_irq(&rme32->lock);
1043         return 0;
1044 }
1045
1046 static int snd_rme32_capture_prepare(struct snd_pcm_substream *substream)
1047 {
1048         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1049
1050         spin_lock_irq(&rme32->lock);
1051         if (rme32->fullduplex_mode) {
1052                 memset(&rme32->capture_pcm, 0, sizeof(rme32->capture_pcm));
1053                 rme32->capture_pcm.hw_buffer_size = RME32_BUFFER_SIZE;
1054                 rme32->capture_pcm.hw_queue_size = RME32_BUFFER_SIZE / 2;
1055                 rme32->capture_pcm.sw_buffer_size = snd_pcm_lib_buffer_bytes(substream);
1056         } else {
1057                 writel(0, rme32->iobase + RME32_IO_RESET_POS);
1058         }
1059         spin_unlock_irq(&rme32->lock);
1060         return 0;
1061 }
1062
1063 static int
1064 snd_rme32_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1065 {
1066         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1067         struct snd_pcm_substream *s;
1068
1069         spin_lock(&rme32->lock);
1070         snd_pcm_group_for_each_entry(s, substream) {
1071                 if (s != rme32->playback_substream &&
1072                     s != rme32->capture_substream)
1073                         continue;
1074                 switch (cmd) {
1075                 case SNDRV_PCM_TRIGGER_START:
1076                         rme32->running |= (1 << s->stream);
1077                         if (rme32->fullduplex_mode) {
1078                                 /* remember the current DMA position */
1079                                 if (s == rme32->playback_substream) {
1080                                         rme32->playback_pcm.hw_io =
1081                                         rme32->playback_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1082                                 } else {
1083                                         rme32->capture_pcm.hw_io =
1084                                         rme32->capture_pcm.hw_data = snd_rme32_pcm_byteptr(rme32);
1085                                 }
1086                         }
1087                         break;
1088                 case SNDRV_PCM_TRIGGER_STOP:
1089                         rme32->running &= ~(1 << s->stream);
1090                         break;
1091                 }
1092                 snd_pcm_trigger_done(s, substream);
1093         }
1094
1095         /* prefill playback buffer */
1096         if (cmd == SNDRV_PCM_TRIGGER_START && rme32->fullduplex_mode) {
1097                 snd_pcm_group_for_each_entry(s, substream) {
1098                         if (s == rme32->playback_substream) {
1099                                 s->ops->ack(s);
1100                                 break;
1101                         }
1102                 }
1103         }
1104
1105         switch (cmd) {
1106         case SNDRV_PCM_TRIGGER_START:
1107                 if (rme32->running && ! RME32_ISWORKING(rme32))
1108                         snd_rme32_pcm_start(rme32, 0);
1109                 break;
1110         case SNDRV_PCM_TRIGGER_STOP:
1111                 if (! rme32->running && RME32_ISWORKING(rme32))
1112                         snd_rme32_pcm_stop(rme32, 0);
1113                 break;
1114         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
1115                 if (rme32->running && RME32_ISWORKING(rme32))
1116                         snd_rme32_pcm_stop(rme32, 1);
1117                 break;
1118         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
1119                 if (rme32->running && ! RME32_ISWORKING(rme32))
1120                         snd_rme32_pcm_start(rme32, 1);
1121                 break;
1122         }
1123         spin_unlock(&rme32->lock);
1124         return 0;
1125 }
1126
1127 /* pointer callback for halfduplex mode */
1128 static snd_pcm_uframes_t
1129 snd_rme32_playback_pointer(struct snd_pcm_substream *substream)
1130 {
1131         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1132         return snd_rme32_pcm_byteptr(rme32) >> rme32->playback_frlog;
1133 }
1134
1135 static snd_pcm_uframes_t
1136 snd_rme32_capture_pointer(struct snd_pcm_substream *substream)
1137 {
1138         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1139         return snd_rme32_pcm_byteptr(rme32) >> rme32->capture_frlog;
1140 }
1141
1142
1143 /* ack and pointer callbacks for fullduplex mode */
1144 static void snd_rme32_pb_trans_copy(struct snd_pcm_substream *substream,
1145                                     struct snd_pcm_indirect *rec, size_t bytes)
1146 {
1147         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1148         memcpy_toio(rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1149                     substream->runtime->dma_area + rec->sw_data, bytes);
1150 }
1151
1152 static int snd_rme32_playback_fd_ack(struct snd_pcm_substream *substream)
1153 {
1154         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1155         struct snd_pcm_indirect *rec, *cprec;
1156
1157         rec = &rme32->playback_pcm;
1158         cprec = &rme32->capture_pcm;
1159         spin_lock(&rme32->lock);
1160         rec->hw_queue_size = RME32_BUFFER_SIZE;
1161         if (rme32->running & (1 << SNDRV_PCM_STREAM_CAPTURE))
1162                 rec->hw_queue_size -= cprec->hw_ready;
1163         spin_unlock(&rme32->lock);
1164         snd_pcm_indirect_playback_transfer(substream, rec,
1165                                            snd_rme32_pb_trans_copy);
1166         return 0;
1167 }
1168
1169 static void snd_rme32_cp_trans_copy(struct snd_pcm_substream *substream,
1170                                     struct snd_pcm_indirect *rec, size_t bytes)
1171 {
1172         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1173         memcpy_fromio(substream->runtime->dma_area + rec->sw_data,
1174                       rme32->iobase + RME32_IO_DATA_BUFFER + rec->hw_data,
1175                       bytes);
1176 }
1177
1178 static int snd_rme32_capture_fd_ack(struct snd_pcm_substream *substream)
1179 {
1180         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1181         snd_pcm_indirect_capture_transfer(substream, &rme32->capture_pcm,
1182                                           snd_rme32_cp_trans_copy);
1183         return 0;
1184 }
1185
1186 static snd_pcm_uframes_t
1187 snd_rme32_playback_fd_pointer(struct snd_pcm_substream *substream)
1188 {
1189         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1190         return snd_pcm_indirect_playback_pointer(substream, &rme32->playback_pcm,
1191                                                  snd_rme32_pcm_byteptr(rme32));
1192 }
1193
1194 static snd_pcm_uframes_t
1195 snd_rme32_capture_fd_pointer(struct snd_pcm_substream *substream)
1196 {
1197         struct rme32 *rme32 = snd_pcm_substream_chip(substream);
1198         return snd_pcm_indirect_capture_pointer(substream, &rme32->capture_pcm,
1199                                                 snd_rme32_pcm_byteptr(rme32));
1200 }
1201
1202 /* for halfduplex mode */
1203 static struct snd_pcm_ops snd_rme32_playback_spdif_ops = {
1204         .open =         snd_rme32_playback_spdif_open,
1205         .close =        snd_rme32_playback_close,
1206         .ioctl =        snd_pcm_lib_ioctl,
1207         .hw_params =    snd_rme32_playback_hw_params,
1208         .hw_free =      snd_rme32_pcm_hw_free,
1209         .prepare =      snd_rme32_playback_prepare,
1210         .trigger =      snd_rme32_pcm_trigger,
1211         .pointer =      snd_rme32_playback_pointer,
1212         .copy =         snd_rme32_playback_copy,
1213         .silence =      snd_rme32_playback_silence,
1214         .mmap =         snd_pcm_lib_mmap_iomem,
1215 };
1216
1217 static struct snd_pcm_ops snd_rme32_capture_spdif_ops = {
1218         .open =         snd_rme32_capture_spdif_open,
1219         .close =        snd_rme32_capture_close,
1220         .ioctl =        snd_pcm_lib_ioctl,
1221         .hw_params =    snd_rme32_capture_hw_params,
1222         .hw_free =      snd_rme32_pcm_hw_free,
1223         .prepare =      snd_rme32_capture_prepare,
1224         .trigger =      snd_rme32_pcm_trigger,
1225         .pointer =      snd_rme32_capture_pointer,
1226         .copy =         snd_rme32_capture_copy,
1227         .mmap =         snd_pcm_lib_mmap_iomem,
1228 };
1229
1230 static struct snd_pcm_ops snd_rme32_playback_adat_ops = {
1231         .open =         snd_rme32_playback_adat_open,
1232         .close =        snd_rme32_playback_close,
1233         .ioctl =        snd_pcm_lib_ioctl,
1234         .hw_params =    snd_rme32_playback_hw_params,
1235         .prepare =      snd_rme32_playback_prepare,
1236         .trigger =      snd_rme32_pcm_trigger,
1237         .pointer =      snd_rme32_playback_pointer,
1238         .copy =         snd_rme32_playback_copy,
1239         .silence =      snd_rme32_playback_silence,
1240         .mmap =         snd_pcm_lib_mmap_iomem,
1241 };
1242
1243 static struct snd_pcm_ops snd_rme32_capture_adat_ops = {
1244         .open =         snd_rme32_capture_adat_open,
1245         .close =        snd_rme32_capture_close,
1246         .ioctl =        snd_pcm_lib_ioctl,
1247         .hw_params =    snd_rme32_capture_hw_params,
1248         .prepare =      snd_rme32_capture_prepare,
1249         .trigger =      snd_rme32_pcm_trigger,
1250         .pointer =      snd_rme32_capture_pointer,
1251         .copy =         snd_rme32_capture_copy,
1252         .mmap =         snd_pcm_lib_mmap_iomem,
1253 };
1254
1255 /* for fullduplex mode */
1256 static struct snd_pcm_ops snd_rme32_playback_spdif_fd_ops = {
1257         .open =         snd_rme32_playback_spdif_open,
1258         .close =        snd_rme32_playback_close,
1259         .ioctl =        snd_pcm_lib_ioctl,
1260         .hw_params =    snd_rme32_playback_hw_params,
1261         .hw_free =      snd_rme32_pcm_hw_free,
1262         .prepare =      snd_rme32_playback_prepare,
1263         .trigger =      snd_rme32_pcm_trigger,
1264         .pointer =      snd_rme32_playback_fd_pointer,
1265         .ack =          snd_rme32_playback_fd_ack,
1266 };
1267
1268 static struct snd_pcm_ops snd_rme32_capture_spdif_fd_ops = {
1269         .open =         snd_rme32_capture_spdif_open,
1270         .close =        snd_rme32_capture_close,
1271         .ioctl =        snd_pcm_lib_ioctl,
1272         .hw_params =    snd_rme32_capture_hw_params,
1273         .hw_free =      snd_rme32_pcm_hw_free,
1274         .prepare =      snd_rme32_capture_prepare,
1275         .trigger =      snd_rme32_pcm_trigger,
1276         .pointer =      snd_rme32_capture_fd_pointer,
1277         .ack =          snd_rme32_capture_fd_ack,
1278 };
1279
1280 static struct snd_pcm_ops snd_rme32_playback_adat_fd_ops = {
1281         .open =         snd_rme32_playback_adat_open,
1282         .close =        snd_rme32_playback_close,
1283         .ioctl =        snd_pcm_lib_ioctl,
1284         .hw_params =    snd_rme32_playback_hw_params,
1285         .prepare =      snd_rme32_playback_prepare,
1286         .trigger =      snd_rme32_pcm_trigger,
1287         .pointer =      snd_rme32_playback_fd_pointer,
1288         .ack =          snd_rme32_playback_fd_ack,
1289 };
1290
1291 static struct snd_pcm_ops snd_rme32_capture_adat_fd_ops = {
1292         .open =         snd_rme32_capture_adat_open,
1293         .close =        snd_rme32_capture_close,
1294         .ioctl =        snd_pcm_lib_ioctl,
1295         .hw_params =    snd_rme32_capture_hw_params,
1296         .prepare =      snd_rme32_capture_prepare,
1297         .trigger =      snd_rme32_pcm_trigger,
1298         .pointer =      snd_rme32_capture_fd_pointer,
1299         .ack =          snd_rme32_capture_fd_ack,
1300 };
1301
1302 static void snd_rme32_free(void *private_data)
1303 {
1304         struct rme32 *rme32 = (struct rme32 *) private_data;
1305
1306         if (rme32 == NULL) {
1307                 return;
1308         }
1309         if (rme32->irq >= 0) {
1310                 snd_rme32_pcm_stop(rme32, 0);
1311                 free_irq(rme32->irq, (void *) rme32);
1312                 rme32->irq = -1;
1313         }
1314         if (rme32->iobase) {
1315                 iounmap(rme32->iobase);
1316                 rme32->iobase = NULL;
1317         }
1318         if (rme32->port) {
1319                 pci_release_regions(rme32->pci);
1320                 rme32->port = 0;
1321         }
1322         pci_disable_device(rme32->pci);
1323 }
1324
1325 static void snd_rme32_free_spdif_pcm(struct snd_pcm *pcm)
1326 {
1327         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1328         rme32->spdif_pcm = NULL;
1329 }
1330
1331 static void
1332 snd_rme32_free_adat_pcm(struct snd_pcm *pcm)
1333 {
1334         struct rme32 *rme32 = (struct rme32 *) pcm->private_data;
1335         rme32->adat_pcm = NULL;
1336 }
1337
1338 static int __devinit snd_rme32_create(struct rme32 * rme32)
1339 {
1340         struct pci_dev *pci = rme32->pci;
1341         int err;
1342
1343         rme32->irq = -1;
1344         spin_lock_init(&rme32->lock);
1345
1346         if ((err = pci_enable_device(pci)) < 0)
1347                 return err;
1348
1349         if ((err = pci_request_regions(pci, "RME32")) < 0)
1350                 return err;
1351         rme32->port = pci_resource_start(rme32->pci, 0);
1352
1353         if ((rme32->iobase = ioremap_nocache(rme32->port, RME32_IO_SIZE)) == 0) {
1354                 snd_printk(KERN_ERR "unable to remap memory region 0x%lx-0x%lx\n",
1355                            rme32->port, rme32->port + RME32_IO_SIZE - 1);
1356                 return -ENOMEM;
1357         }
1358
1359         if (request_irq(pci->irq, snd_rme32_interrupt, IRQF_SHARED,
1360                         "RME32", rme32)) {
1361                 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
1362                 return -EBUSY;
1363         }
1364         rme32->irq = pci->irq;
1365
1366         /* read the card's revision number */
1367         pci_read_config_byte(pci, 8, &rme32->rev);
1368
1369         /* set up ALSA pcm device for S/PDIF */
1370         if ((err = snd_pcm_new(rme32->card, "Digi32 IEC958", 0, 1, 1, &rme32->spdif_pcm)) < 0) {
1371                 return err;
1372         }
1373         rme32->spdif_pcm->private_data = rme32;
1374         rme32->spdif_pcm->private_free = snd_rme32_free_spdif_pcm;
1375         strcpy(rme32->spdif_pcm->name, "Digi32 IEC958");
1376         if (rme32->fullduplex_mode) {
1377                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1378                                 &snd_rme32_playback_spdif_fd_ops);
1379                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1380                                 &snd_rme32_capture_spdif_fd_ops);
1381                 snd_pcm_lib_preallocate_pages_for_all(rme32->spdif_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1382                                                       snd_dma_continuous_data(GFP_KERNEL),
1383                                                       0, RME32_MID_BUFFER_SIZE);
1384                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1385         } else {
1386                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1387                                 &snd_rme32_playback_spdif_ops);
1388                 snd_pcm_set_ops(rme32->spdif_pcm, SNDRV_PCM_STREAM_CAPTURE,
1389                                 &snd_rme32_capture_spdif_ops);
1390                 rme32->spdif_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1391         }
1392
1393         /* set up ALSA pcm device for ADAT */
1394         if ((pci->device == PCI_DEVICE_ID_RME_DIGI32) ||
1395             (pci->device == PCI_DEVICE_ID_RME_DIGI32_PRO)) {
1396                 /* ADAT is not available on DIGI32 and DIGI32 Pro */
1397                 rme32->adat_pcm = NULL;
1398         }
1399         else {
1400                 if ((err = snd_pcm_new(rme32->card, "Digi32 ADAT", 1,
1401                                        1, 1, &rme32->adat_pcm)) < 0)
1402                 {
1403                         return err;
1404                 }
1405                 rme32->adat_pcm->private_data = rme32;
1406                 rme32->adat_pcm->private_free = snd_rme32_free_adat_pcm;
1407                 strcpy(rme32->adat_pcm->name, "Digi32 ADAT");
1408                 if (rme32->fullduplex_mode) {
1409                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1410                                         &snd_rme32_playback_adat_fd_ops);
1411                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1412                                         &snd_rme32_capture_adat_fd_ops);
1413                         snd_pcm_lib_preallocate_pages_for_all(rme32->adat_pcm, SNDRV_DMA_TYPE_CONTINUOUS,
1414                                                               snd_dma_continuous_data(GFP_KERNEL),
1415                                                               0, RME32_MID_BUFFER_SIZE);
1416                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
1417                 } else {
1418                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_PLAYBACK,
1419                                         &snd_rme32_playback_adat_ops);
1420                         snd_pcm_set_ops(rme32->adat_pcm, SNDRV_PCM_STREAM_CAPTURE,
1421                                         &snd_rme32_capture_adat_ops);
1422                         rme32->adat_pcm->info_flags = SNDRV_PCM_INFO_HALF_DUPLEX;
1423                 }
1424         }
1425
1426
1427         rme32->playback_periodsize = 0;
1428         rme32->capture_periodsize = 0;
1429
1430         /* make sure playback/capture is stopped, if by some reason active */
1431         snd_rme32_pcm_stop(rme32, 0);
1432
1433         /* reset DAC */
1434         snd_rme32_reset_dac(rme32);
1435
1436         /* reset buffer pointer */
1437         writel(0, rme32->iobase + RME32_IO_RESET_POS);
1438
1439         /* set default values in registers */
1440         rme32->wcreg = RME32_WCR_SEL |   /* normal playback */
1441                 RME32_WCR_INP_0 | /* input select */
1442                 RME32_WCR_MUTE;  /* muting on */
1443         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1444
1445
1446         /* init switch interface */
1447         if ((err = snd_rme32_create_switches(rme32->card, rme32)) < 0) {
1448                 return err;
1449         }
1450
1451         /* init proc interface */
1452         snd_rme32_proc_init(rme32);
1453
1454         rme32->capture_substream = NULL;
1455         rme32->playback_substream = NULL;
1456
1457         return 0;
1458 }
1459
1460 /*
1461  * proc interface
1462  */
1463
1464 static void
1465 snd_rme32_proc_read(struct snd_info_entry * entry, struct snd_info_buffer *buffer)
1466 {
1467         int n;
1468         struct rme32 *rme32 = (struct rme32 *) entry->private_data;
1469
1470         rme32->rcreg = readl(rme32->iobase + RME32_IO_CONTROL_REGISTER);
1471
1472         snd_iprintf(buffer, rme32->card->longname);
1473         snd_iprintf(buffer, " (index #%d)\n", rme32->card->number + 1);
1474
1475         snd_iprintf(buffer, "\nGeneral settings\n");
1476         if (rme32->fullduplex_mode)
1477                 snd_iprintf(buffer, "  Full-duplex mode\n");
1478         else
1479                 snd_iprintf(buffer, "  Half-duplex mode\n");
1480         if (RME32_PRO_WITH_8414(rme32)) {
1481                 snd_iprintf(buffer, "  receiver: CS8414\n");
1482         } else {
1483                 snd_iprintf(buffer, "  receiver: CS8412\n");
1484         }
1485         if (rme32->wcreg & RME32_WCR_MODE24) {
1486                 snd_iprintf(buffer, "  format: 24 bit");
1487         } else {
1488                 snd_iprintf(buffer, "  format: 16 bit");
1489         }
1490         if (rme32->wcreg & RME32_WCR_MONO) {
1491                 snd_iprintf(buffer, ", Mono\n");
1492         } else {
1493                 snd_iprintf(buffer, ", Stereo\n");
1494         }
1495
1496         snd_iprintf(buffer, "\nInput settings\n");
1497         switch (snd_rme32_getinputtype(rme32)) {
1498         case RME32_INPUT_OPTICAL:
1499                 snd_iprintf(buffer, "  input: optical");
1500                 break;
1501         case RME32_INPUT_COAXIAL:
1502                 snd_iprintf(buffer, "  input: coaxial");
1503                 break;
1504         case RME32_INPUT_INTERNAL:
1505                 snd_iprintf(buffer, "  input: internal");
1506                 break;
1507         case RME32_INPUT_XLR:
1508                 snd_iprintf(buffer, "  input: XLR");
1509                 break;
1510         }
1511         if (snd_rme32_capture_getrate(rme32, &n) < 0) {
1512                 snd_iprintf(buffer, "\n  sample rate: no valid signal\n");
1513         } else {
1514                 if (n) {
1515                         snd_iprintf(buffer, " (8 channels)\n");
1516                 } else {
1517                         snd_iprintf(buffer, " (2 channels)\n");
1518                 }
1519                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1520                             snd_rme32_capture_getrate(rme32, &n));
1521         }
1522
1523         snd_iprintf(buffer, "\nOutput settings\n");
1524         if (rme32->wcreg & RME32_WCR_SEL) {
1525                 snd_iprintf(buffer, "  output signal: normal playback");
1526         } else {
1527                 snd_iprintf(buffer, "  output signal: same as input");
1528         }
1529         if (rme32->wcreg & RME32_WCR_MUTE) {
1530                 snd_iprintf(buffer, " (muted)\n");
1531         } else {
1532                 snd_iprintf(buffer, "\n");
1533         }
1534
1535         /* master output frequency */
1536         if (!
1537             ((!(rme32->wcreg & RME32_WCR_FREQ_0))
1538              && (!(rme32->wcreg & RME32_WCR_FREQ_1)))) {
1539                 snd_iprintf(buffer, "  sample rate: %d Hz\n",
1540                             snd_rme32_playback_getrate(rme32));
1541         }
1542         if (rme32->rcreg & RME32_RCR_KMODE) {
1543                 snd_iprintf(buffer, "  sample clock source: AutoSync\n");
1544         } else {
1545                 snd_iprintf(buffer, "  sample clock source: Internal\n");
1546         }
1547         if (rme32->wcreg & RME32_WCR_PRO) {
1548                 snd_iprintf(buffer, "  format: AES/EBU (professional)\n");
1549         } else {
1550                 snd_iprintf(buffer, "  format: IEC958 (consumer)\n");
1551         }
1552         if (rme32->wcreg & RME32_WCR_EMP) {
1553                 snd_iprintf(buffer, "  emphasis: on\n");
1554         } else {
1555                 snd_iprintf(buffer, "  emphasis: off\n");
1556         }
1557 }
1558
1559 static void __devinit snd_rme32_proc_init(struct rme32 * rme32)
1560 {
1561         struct snd_info_entry *entry;
1562
1563         if (! snd_card_proc_new(rme32->card, "rme32", &entry))
1564                 snd_info_set_text_ops(entry, rme32, snd_rme32_proc_read);
1565 }
1566
1567 /*
1568  * control interface
1569  */
1570
1571 #define snd_rme32_info_loopback_control         snd_ctl_boolean_mono_info
1572
1573 static int
1574 snd_rme32_get_loopback_control(struct snd_kcontrol *kcontrol,
1575                                struct snd_ctl_elem_value *ucontrol)
1576 {
1577         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1578
1579         spin_lock_irq(&rme32->lock);
1580         ucontrol->value.integer.value[0] =
1581             rme32->wcreg & RME32_WCR_SEL ? 0 : 1;
1582         spin_unlock_irq(&rme32->lock);
1583         return 0;
1584 }
1585 static int
1586 snd_rme32_put_loopback_control(struct snd_kcontrol *kcontrol,
1587                                struct snd_ctl_elem_value *ucontrol)
1588 {
1589         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1590         unsigned int val;
1591         int change;
1592
1593         val = ucontrol->value.integer.value[0] ? 0 : RME32_WCR_SEL;
1594         spin_lock_irq(&rme32->lock);
1595         val = (rme32->wcreg & ~RME32_WCR_SEL) | val;
1596         change = val != rme32->wcreg;
1597         if (ucontrol->value.integer.value[0])
1598                 val &= ~RME32_WCR_MUTE;
1599         else
1600                 val |= RME32_WCR_MUTE;
1601         rme32->wcreg = val;
1602         writel(val, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1603         spin_unlock_irq(&rme32->lock);
1604         return change;
1605 }
1606
1607 static int
1608 snd_rme32_info_inputtype_control(struct snd_kcontrol *kcontrol,
1609                                  struct snd_ctl_elem_info *uinfo)
1610 {
1611         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1612         static char *texts[4] = { "Optical", "Coaxial", "Internal", "XLR" };
1613
1614         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1615         uinfo->count = 1;
1616         switch (rme32->pci->device) {
1617         case PCI_DEVICE_ID_RME_DIGI32:
1618         case PCI_DEVICE_ID_RME_DIGI32_8:
1619                 uinfo->value.enumerated.items = 3;
1620                 break;
1621         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1622                 uinfo->value.enumerated.items = 4;
1623                 break;
1624         default:
1625                 snd_BUG();
1626                 break;
1627         }
1628         if (uinfo->value.enumerated.item >
1629             uinfo->value.enumerated.items - 1) {
1630                 uinfo->value.enumerated.item =
1631                     uinfo->value.enumerated.items - 1;
1632         }
1633         strcpy(uinfo->value.enumerated.name,
1634                texts[uinfo->value.enumerated.item]);
1635         return 0;
1636 }
1637 static int
1638 snd_rme32_get_inputtype_control(struct snd_kcontrol *kcontrol,
1639                                 struct snd_ctl_elem_value *ucontrol)
1640 {
1641         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1642         unsigned int items = 3;
1643
1644         spin_lock_irq(&rme32->lock);
1645         ucontrol->value.enumerated.item[0] = snd_rme32_getinputtype(rme32);
1646
1647         switch (rme32->pci->device) {
1648         case PCI_DEVICE_ID_RME_DIGI32:
1649         case PCI_DEVICE_ID_RME_DIGI32_8:
1650                 items = 3;
1651                 break;
1652         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1653                 items = 4;
1654                 break;
1655         default:
1656                 snd_BUG();
1657                 break;
1658         }
1659         if (ucontrol->value.enumerated.item[0] >= items) {
1660                 ucontrol->value.enumerated.item[0] = items - 1;
1661         }
1662
1663         spin_unlock_irq(&rme32->lock);
1664         return 0;
1665 }
1666 static int
1667 snd_rme32_put_inputtype_control(struct snd_kcontrol *kcontrol,
1668                                 struct snd_ctl_elem_value *ucontrol)
1669 {
1670         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1671         unsigned int val;
1672         int change, items = 3;
1673
1674         switch (rme32->pci->device) {
1675         case PCI_DEVICE_ID_RME_DIGI32:
1676         case PCI_DEVICE_ID_RME_DIGI32_8:
1677                 items = 3;
1678                 break;
1679         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1680                 items = 4;
1681                 break;
1682         default:
1683                 snd_BUG();
1684                 break;
1685         }
1686         val = ucontrol->value.enumerated.item[0] % items;
1687
1688         spin_lock_irq(&rme32->lock);
1689         change = val != (unsigned int)snd_rme32_getinputtype(rme32);
1690         snd_rme32_setinputtype(rme32, val);
1691         spin_unlock_irq(&rme32->lock);
1692         return change;
1693 }
1694
1695 static int
1696 snd_rme32_info_clockmode_control(struct snd_kcontrol *kcontrol,
1697                                  struct snd_ctl_elem_info *uinfo)
1698 {
1699         static char *texts[4] = { "AutoSync",
1700                                   "Internal 32.0kHz",
1701                                   "Internal 44.1kHz",
1702                                   "Internal 48.0kHz" };
1703
1704         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1705         uinfo->count = 1;
1706         uinfo->value.enumerated.items = 4;
1707         if (uinfo->value.enumerated.item > 3) {
1708                 uinfo->value.enumerated.item = 3;
1709         }
1710         strcpy(uinfo->value.enumerated.name,
1711                texts[uinfo->value.enumerated.item]);
1712         return 0;
1713 }
1714 static int
1715 snd_rme32_get_clockmode_control(struct snd_kcontrol *kcontrol,
1716                                 struct snd_ctl_elem_value *ucontrol)
1717 {
1718         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1719
1720         spin_lock_irq(&rme32->lock);
1721         ucontrol->value.enumerated.item[0] = snd_rme32_getclockmode(rme32);
1722         spin_unlock_irq(&rme32->lock);
1723         return 0;
1724 }
1725 static int
1726 snd_rme32_put_clockmode_control(struct snd_kcontrol *kcontrol,
1727                                 struct snd_ctl_elem_value *ucontrol)
1728 {
1729         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1730         unsigned int val;
1731         int change;
1732
1733         val = ucontrol->value.enumerated.item[0] % 3;
1734         spin_lock_irq(&rme32->lock);
1735         change = val != (unsigned int)snd_rme32_getclockmode(rme32);
1736         snd_rme32_setclockmode(rme32, val);
1737         spin_unlock_irq(&rme32->lock);
1738         return change;
1739 }
1740
1741 static u32 snd_rme32_convert_from_aes(struct snd_aes_iec958 * aes)
1742 {
1743         u32 val = 0;
1744         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME32_WCR_PRO : 0;
1745         if (val & RME32_WCR_PRO)
1746                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1747         else
1748                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME32_WCR_EMP : 0;
1749         return val;
1750 }
1751
1752 static void snd_rme32_convert_to_aes(struct snd_aes_iec958 * aes, u32 val)
1753 {
1754         aes->status[0] = ((val & RME32_WCR_PRO) ? IEC958_AES0_PROFESSIONAL : 0);
1755         if (val & RME32_WCR_PRO)
1756                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1757         else
1758                 aes->status[0] |= (val & RME32_WCR_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1759 }
1760
1761 static int snd_rme32_control_spdif_info(struct snd_kcontrol *kcontrol,
1762                                         struct snd_ctl_elem_info *uinfo)
1763 {
1764         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1765         uinfo->count = 1;
1766         return 0;
1767 }
1768
1769 static int snd_rme32_control_spdif_get(struct snd_kcontrol *kcontrol,
1770                                        struct snd_ctl_elem_value *ucontrol)
1771 {
1772         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1773
1774         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1775                                  rme32->wcreg_spdif);
1776         return 0;
1777 }
1778
1779 static int snd_rme32_control_spdif_put(struct snd_kcontrol *kcontrol,
1780                                        struct snd_ctl_elem_value *ucontrol)
1781 {
1782         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1783         int change;
1784         u32 val;
1785
1786         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1787         spin_lock_irq(&rme32->lock);
1788         change = val != rme32->wcreg_spdif;
1789         rme32->wcreg_spdif = val;
1790         spin_unlock_irq(&rme32->lock);
1791         return change;
1792 }
1793
1794 static int snd_rme32_control_spdif_stream_info(struct snd_kcontrol *kcontrol,
1795                                                struct snd_ctl_elem_info *uinfo)
1796 {
1797         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1798         uinfo->count = 1;
1799         return 0;
1800 }
1801
1802 static int snd_rme32_control_spdif_stream_get(struct snd_kcontrol *kcontrol,
1803                                               struct snd_ctl_elem_value *
1804                                               ucontrol)
1805 {
1806         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1807
1808         snd_rme32_convert_to_aes(&ucontrol->value.iec958,
1809                                  rme32->wcreg_spdif_stream);
1810         return 0;
1811 }
1812
1813 static int snd_rme32_control_spdif_stream_put(struct snd_kcontrol *kcontrol,
1814                                               struct snd_ctl_elem_value *
1815                                               ucontrol)
1816 {
1817         struct rme32 *rme32 = snd_kcontrol_chip(kcontrol);
1818         int change;
1819         u32 val;
1820
1821         val = snd_rme32_convert_from_aes(&ucontrol->value.iec958);
1822         spin_lock_irq(&rme32->lock);
1823         change = val != rme32->wcreg_spdif_stream;
1824         rme32->wcreg_spdif_stream = val;
1825         rme32->wcreg &= ~(RME32_WCR_PRO | RME32_WCR_EMP);
1826         rme32->wcreg |= val;
1827         writel(rme32->wcreg, rme32->iobase + RME32_IO_CONTROL_REGISTER);
1828         spin_unlock_irq(&rme32->lock);
1829         return change;
1830 }
1831
1832 static int snd_rme32_control_spdif_mask_info(struct snd_kcontrol *kcontrol,
1833                                              struct snd_ctl_elem_info *uinfo)
1834 {
1835         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1836         uinfo->count = 1;
1837         return 0;
1838 }
1839
1840 static int snd_rme32_control_spdif_mask_get(struct snd_kcontrol *kcontrol,
1841                                             struct snd_ctl_elem_value *
1842                                             ucontrol)
1843 {
1844         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1845         return 0;
1846 }
1847
1848 static struct snd_kcontrol_new snd_rme32_controls[] = {
1849         {
1850                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1851                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1852                 .info = snd_rme32_control_spdif_info,
1853                 .get =  snd_rme32_control_spdif_get,
1854                 .put =  snd_rme32_control_spdif_put
1855         },
1856         {
1857                 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1858                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1859                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1860                 .info = snd_rme32_control_spdif_stream_info,
1861                 .get =  snd_rme32_control_spdif_stream_get,
1862                 .put =  snd_rme32_control_spdif_stream_put
1863         },
1864         {
1865                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1866                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1867                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1868                 .info = snd_rme32_control_spdif_mask_info,
1869                 .get =  snd_rme32_control_spdif_mask_get,
1870                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_CON_EMPHASIS
1871         },
1872         {
1873                 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1874                 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1875                 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1876                 .info = snd_rme32_control_spdif_mask_info,
1877                 .get =  snd_rme32_control_spdif_mask_get,
1878                 .private_value = IEC958_AES0_PROFESSIONAL | IEC958_AES0_PRO_EMPHASIS
1879         },
1880         {
1881                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1882                 .name = "Input Connector",
1883                 .info = snd_rme32_info_inputtype_control,
1884                 .get =  snd_rme32_get_inputtype_control,
1885                 .put =  snd_rme32_put_inputtype_control
1886         },
1887         {
1888                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1889                 .name = "Loopback Input",
1890                 .info = snd_rme32_info_loopback_control,
1891                 .get =  snd_rme32_get_loopback_control,
1892                 .put =  snd_rme32_put_loopback_control
1893         },
1894         {
1895                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1896                 .name = "Sample Clock Source",
1897                 .info = snd_rme32_info_clockmode_control,
1898                 .get =  snd_rme32_get_clockmode_control,
1899                 .put =  snd_rme32_put_clockmode_control
1900         }
1901 };
1902
1903 static int snd_rme32_create_switches(struct snd_card *card, struct rme32 * rme32)
1904 {
1905         int idx, err;
1906         struct snd_kcontrol *kctl;
1907
1908         for (idx = 0; idx < (int)ARRAY_SIZE(snd_rme32_controls); idx++) {
1909                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme32_controls[idx], rme32))) < 0)
1910                         return err;
1911                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
1912                         rme32->spdif_ctl = kctl;
1913         }
1914
1915         return 0;
1916 }
1917
1918 /*
1919  * Card initialisation
1920  */
1921
1922 static void snd_rme32_card_free(struct snd_card *card)
1923 {
1924         snd_rme32_free(card->private_data);
1925 }
1926
1927 static int __devinit
1928 snd_rme32_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
1929 {
1930         static int dev;
1931         struct rme32 *rme32;
1932         struct snd_card *card;
1933         int err;
1934
1935         if (dev >= SNDRV_CARDS) {
1936                 return -ENODEV;
1937         }
1938         if (!enable[dev]) {
1939                 dev++;
1940                 return -ENOENT;
1941         }
1942
1943         if ((card = snd_card_new(index[dev], id[dev], THIS_MODULE,
1944                                  sizeof(struct rme32))) == NULL)
1945                 return -ENOMEM;
1946         card->private_free = snd_rme32_card_free;
1947         rme32 = (struct rme32 *) card->private_data;
1948         rme32->card = card;
1949         rme32->pci = pci;
1950         snd_card_set_dev(card, &pci->dev);
1951         if (fullduplex[dev])
1952                 rme32->fullduplex_mode = 1;
1953         if ((err = snd_rme32_create(rme32)) < 0) {
1954                 snd_card_free(card);
1955                 return err;
1956         }
1957
1958         strcpy(card->driver, "Digi32");
1959         switch (rme32->pci->device) {
1960         case PCI_DEVICE_ID_RME_DIGI32:
1961                 strcpy(card->shortname, "RME Digi32");
1962                 break;
1963         case PCI_DEVICE_ID_RME_DIGI32_8:
1964                 strcpy(card->shortname, "RME Digi32/8");
1965                 break;
1966         case PCI_DEVICE_ID_RME_DIGI32_PRO:
1967                 strcpy(card->shortname, "RME Digi32 PRO");
1968                 break;
1969         }
1970         sprintf(card->longname, "%s (Rev. %d) at 0x%lx, irq %d",
1971                 card->shortname, rme32->rev, rme32->port, rme32->irq);
1972
1973         if ((err = snd_card_register(card)) < 0) {
1974                 snd_card_free(card);
1975                 return err;
1976         }
1977         pci_set_drvdata(pci, card);
1978         dev++;
1979         return 0;
1980 }
1981
1982 static void __devexit snd_rme32_remove(struct pci_dev *pci)
1983 {
1984         snd_card_free(pci_get_drvdata(pci));
1985         pci_set_drvdata(pci, NULL);
1986 }
1987
1988 static struct pci_driver driver = {
1989         .name =         "RME Digi32",
1990         .id_table =     snd_rme32_ids,
1991         .probe =        snd_rme32_probe,
1992         .remove =       __devexit_p(snd_rme32_remove),
1993 };
1994
1995 static int __init alsa_card_rme32_init(void)
1996 {
1997         return pci_register_driver(&driver);
1998 }
1999
2000 static void __exit alsa_card_rme32_exit(void)
2001 {
2002         pci_unregister_driver(&driver);
2003 }
2004
2005 module_init(alsa_card_rme32_init)
2006 module_exit(alsa_card_rme32_exit)