2 * dme1737.c - Driver for the SMSC DME1737, Asus A8000, and SMSC SCH311x
3 * Super-I/O chips integrated hardware monitoring features.
4 * Copyright (c) 2007 Juerg Haefliger <juergh@gmail.com>
6 * This driver is an I2C/ISA hybrid, meaning that it uses the I2C bus to access
7 * the chip registers if a DME1737 (or A8000) is found and the ISA bus if a
8 * SCH311x chip is found. Both types of chips have very similar hardware
9 * monitoring capabilities but differ in the way they can be accessed.
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/slab.h>
29 #include <linux/jiffies.h>
30 #include <linux/i2c.h>
31 #include <linux/platform_device.h>
32 #include <linux/hwmon.h>
33 #include <linux/hwmon-sysfs.h>
34 #include <linux/hwmon-vid.h>
35 #include <linux/err.h>
36 #include <linux/mutex.h>
37 #include <linux/acpi.h>
40 /* ISA device, if found */
41 static struct platform_device *pdev;
43 /* Module load parameters */
44 static int force_start;
45 module_param(force_start, bool, 0);
46 MODULE_PARM_DESC(force_start, "Force the chip to start monitoring inputs");
48 static unsigned short force_id;
49 module_param(force_id, ushort, 0);
50 MODULE_PARM_DESC(force_id, "Override the detected device ID");
52 /* Addresses to scan */
53 static const unsigned short normal_i2c[] = {0x2c, 0x2d, 0x2e, I2C_CLIENT_END};
55 /* Insmod parameters */
56 I2C_CLIENT_INSMOD_1(dme1737);
58 /* ---------------------------------------------------------------------
61 * The sensors are defined as follows:
63 * Voltages Temperatures
64 * -------- ------------
65 * in0 +5VTR (+5V stdby) temp1 Remote diode 1
66 * in1 Vccp (proc core) temp2 Internal temp
67 * in2 VCC (internal +3.3V) temp3 Remote diode 2
70 * in5 VTR (+3.3V stby)
73 * --------------------------------------------------------------------- */
75 /* Voltages (in) numbered 0-6 (ix) */
76 #define DME1737_REG_IN(ix) ((ix) < 5 ? 0x20 + (ix) \
78 #define DME1737_REG_IN_MIN(ix) ((ix) < 5 ? 0x44 + (ix) * 2 \
80 #define DME1737_REG_IN_MAX(ix) ((ix) < 5 ? 0x45 + (ix) * 2 \
83 /* Temperatures (temp) numbered 0-2 (ix) */
84 #define DME1737_REG_TEMP(ix) (0x25 + (ix))
85 #define DME1737_REG_TEMP_MIN(ix) (0x4e + (ix) * 2)
86 #define DME1737_REG_TEMP_MAX(ix) (0x4f + (ix) * 2)
87 #define DME1737_REG_TEMP_OFFSET(ix) ((ix) == 0 ? 0x1f \
90 /* Voltage and temperature LSBs
91 * The LSBs (4 bits each) are stored in 5 registers with the following layouts:
92 * IN_TEMP_LSB(0) = [in5, in6]
93 * IN_TEMP_LSB(1) = [temp3, temp1]
94 * IN_TEMP_LSB(2) = [in4, temp2]
95 * IN_TEMP_LSB(3) = [in3, in0]
96 * IN_TEMP_LSB(4) = [in2, in1] */
97 #define DME1737_REG_IN_TEMP_LSB(ix) (0x84 + (ix))
98 static const u8 DME1737_REG_IN_LSB[] = {3, 4, 4, 3, 2, 0, 0};
99 static const u8 DME1737_REG_IN_LSB_SHL[] = {4, 4, 0, 0, 0, 0, 4};
100 static const u8 DME1737_REG_TEMP_LSB[] = {1, 2, 1};
101 static const u8 DME1737_REG_TEMP_LSB_SHL[] = {4, 4, 0};
103 /* Fans numbered 0-5 (ix) */
104 #define DME1737_REG_FAN(ix) ((ix) < 4 ? 0x28 + (ix) * 2 \
106 #define DME1737_REG_FAN_MIN(ix) ((ix) < 4 ? 0x54 + (ix) * 2 \
108 #define DME1737_REG_FAN_OPT(ix) ((ix) < 4 ? 0x90 + (ix) \
110 #define DME1737_REG_FAN_MAX(ix) (0xb4 + (ix)) /* only for fan[4-5] */
112 /* PWMs numbered 0-2, 4-5 (ix) */
113 #define DME1737_REG_PWM(ix) ((ix) < 3 ? 0x30 + (ix) \
115 #define DME1737_REG_PWM_CONFIG(ix) (0x5c + (ix)) /* only for pwm[0-2] */
116 #define DME1737_REG_PWM_MIN(ix) (0x64 + (ix)) /* only for pwm[0-2] */
117 #define DME1737_REG_PWM_FREQ(ix) ((ix) < 3 ? 0x5f + (ix) \
119 /* The layout of the ramp rate registers is different from the other pwm
120 * registers. The bits for the 3 PWMs are stored in 2 registers:
121 * PWM_RR(0) = [OFF3, OFF2, OFF1, RES, RR1E, RR1-2, RR1-1, RR1-0]
122 * PWM_RR(1) = [RR2E, RR2-2, RR2-1, RR2-0, RR3E, RR3-2, RR3-1, RR3-0] */
123 #define DME1737_REG_PWM_RR(ix) (0x62 + (ix)) /* only for pwm[0-2] */
125 /* Thermal zones 0-2 */
126 #define DME1737_REG_ZONE_LOW(ix) (0x67 + (ix))
127 #define DME1737_REG_ZONE_ABS(ix) (0x6a + (ix))
128 /* The layout of the hysteresis registers is different from the other zone
129 * registers. The bits for the 3 zones are stored in 2 registers:
130 * ZONE_HYST(0) = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
131 * ZONE_HYST(1) = [H3-3, H3-2, H3-1, H3-0, RES, RES, RES, RES] */
132 #define DME1737_REG_ZONE_HYST(ix) (0x6d + (ix))
134 /* Alarm registers and bit mapping
135 * The 3 8-bit alarm registers will be concatenated to a single 32-bit
136 * alarm value [0, ALARM3, ALARM2, ALARM1]. */
137 #define DME1737_REG_ALARM1 0x41
138 #define DME1737_REG_ALARM2 0x42
139 #define DME1737_REG_ALARM3 0x83
140 static const u8 DME1737_BIT_ALARM_IN[] = {0, 1, 2, 3, 8, 16, 17};
141 static const u8 DME1737_BIT_ALARM_TEMP[] = {4, 5, 6};
142 static const u8 DME1737_BIT_ALARM_FAN[] = {10, 11, 12, 13, 22, 23};
144 /* Miscellaneous registers */
145 #define DME1737_REG_DEVICE 0x3d
146 #define DME1737_REG_COMPANY 0x3e
147 #define DME1737_REG_VERSTEP 0x3f
148 #define DME1737_REG_CONFIG 0x40
149 #define DME1737_REG_CONFIG2 0x7f
150 #define DME1737_REG_VID 0x43
151 #define DME1737_REG_TACH_PWM 0x81
153 /* ---------------------------------------------------------------------
155 * --------------------------------------------------------------------- */
157 /* Chip identification */
158 #define DME1737_COMPANY_SMSC 0x5c
159 #define DME1737_VERSTEP 0x88
160 #define DME1737_VERSTEP_MASK 0xf8
161 #define SCH311X_DEVICE 0x8c
163 /* Length of ISA address segment */
164 #define DME1737_EXTENT 2
166 /* ---------------------------------------------------------------------
167 * Data structures and manipulation thereof
168 * --------------------------------------------------------------------- */
170 /* For ISA chips, we abuse the i2c_client addr and name fields. We also use
171 the driver field to differentiate between I2C and ISA chips. */
172 struct dme1737_data {
173 struct i2c_client client;
174 struct device *hwmon_dev;
176 struct mutex update_lock;
177 int valid; /* !=0 if following fields are valid */
178 unsigned long last_update; /* in jiffies */
179 unsigned long last_vbat; /* in jiffies */
186 /* Register values */
213 /* Nominal voltage values */
214 static const int IN_NOMINAL[] = {5000, 2250, 3300, 5000, 12000, 3300, 3300};
217 * Voltage inputs have 16 bits resolution, limit values have 8 bits
219 static inline int IN_FROM_REG(int reg, int ix, int res)
221 return (reg * IN_NOMINAL[ix] + (3 << (res - 3))) / (3 << (res - 2));
224 static inline int IN_TO_REG(int val, int ix)
226 return SENSORS_LIMIT((val * 192 + IN_NOMINAL[ix] / 2) /
227 IN_NOMINAL[ix], 0, 255);
231 * The register values represent temperatures in 2's complement notation from
232 * -127 degrees C to +127 degrees C. Temp inputs have 16 bits resolution, limit
233 * values have 8 bits resolution. */
234 static inline int TEMP_FROM_REG(int reg, int res)
236 return (reg * 1000) >> (res - 8);
239 static inline int TEMP_TO_REG(int val)
241 return SENSORS_LIMIT((val < 0 ? val - 500 : val + 500) / 1000,
245 /* Temperature range */
246 static const int TEMP_RANGE[] = {2000, 2500, 3333, 4000, 5000, 6666, 8000,
247 10000, 13333, 16000, 20000, 26666, 32000,
248 40000, 53333, 80000};
250 static inline int TEMP_RANGE_FROM_REG(int reg)
252 return TEMP_RANGE[(reg >> 4) & 0x0f];
255 static int TEMP_RANGE_TO_REG(int val, int reg)
259 for (i = 15; i > 0; i--) {
260 if (val > (TEMP_RANGE[i] + TEMP_RANGE[i - 1] + 1) / 2) {
265 return (reg & 0x0f) | (i << 4);
268 /* Temperature hysteresis
270 * reg[0] = [H1-3, H1-2, H1-1, H1-0, H2-3, H2-2, H2-1, H2-0]
271 * reg[1] = [H3-3, H3-2, H3-1, H3-0, xxxx, xxxx, xxxx, xxxx] */
272 static inline int TEMP_HYST_FROM_REG(int reg, int ix)
274 return (((ix == 1) ? reg : reg >> 4) & 0x0f) * 1000;
277 static inline int TEMP_HYST_TO_REG(int val, int ix, int reg)
279 int hyst = SENSORS_LIMIT((val + 500) / 1000, 0, 15);
281 return (ix == 1) ? (reg & 0xf0) | hyst : (reg & 0x0f) | (hyst << 4);
285 static inline int FAN_FROM_REG(int reg, int tpc)
290 return (reg == 0 || reg == 0xffff) ? 0 : 90000 * 60 / reg;
294 static inline int FAN_TO_REG(int val, int tpc)
297 return SENSORS_LIMIT(val / tpc, 0, 0xffff);
299 return (val <= 0) ? 0xffff :
300 SENSORS_LIMIT(90000 * 60 / val, 0, 0xfffe);
304 /* Fan TPC (tach pulse count)
305 * Converts a register value to a TPC multiplier or returns 0 if the tachometer
306 * is configured in legacy (non-tpc) mode */
307 static inline int FAN_TPC_FROM_REG(int reg)
309 return (reg & 0x20) ? 0 : 60 >> (reg & 0x03);
313 * The type of a fan is expressed in number of pulses-per-revolution that it
315 static inline int FAN_TYPE_FROM_REG(int reg)
317 int edge = (reg >> 1) & 0x03;
319 return (edge > 0) ? 1 << (edge - 1) : 0;
322 static inline int FAN_TYPE_TO_REG(int val, int reg)
324 int edge = (val == 4) ? 3 : val;
326 return (reg & 0xf9) | (edge << 1);
330 static const int FAN_MAX[] = {0x54, 0x38, 0x2a, 0x21, 0x1c, 0x18, 0x15, 0x12,
333 static int FAN_MAX_FROM_REG(int reg)
337 for (i = 10; i > 0; i--) {
338 if (reg == FAN_MAX[i]) {
343 return 1000 + i * 500;
346 static int FAN_MAX_TO_REG(int val)
350 for (i = 10; i > 0; i--) {
351 if (val > (1000 + (i - 1) * 500)) {
360 * Register to enable mapping:
361 * 000: 2 fan on zone 1 auto
362 * 001: 2 fan on zone 2 auto
363 * 010: 2 fan on zone 3 auto
365 * 100: -1 fan disabled
366 * 101: 2 fan on hottest of zones 2,3 auto
367 * 110: 2 fan on hottest of zones 1,2,3 auto
368 * 111: 1 fan in manual mode */
369 static inline int PWM_EN_FROM_REG(int reg)
371 static const int en[] = {2, 2, 2, 0, -1, 2, 2, 1};
373 return en[(reg >> 5) & 0x07];
376 static inline int PWM_EN_TO_REG(int val, int reg)
378 int en = (val == 1) ? 7 : 3;
380 return (reg & 0x1f) | ((en & 0x07) << 5);
383 /* PWM auto channels zone
384 * Register to auto channels zone mapping (ACZ is a bitfield with bit x
385 * corresponding to zone x+1):
386 * 000: 001 fan on zone 1 auto
387 * 001: 010 fan on zone 2 auto
388 * 010: 100 fan on zone 3 auto
389 * 011: 000 fan full on
390 * 100: 000 fan disabled
391 * 101: 110 fan on hottest of zones 2,3 auto
392 * 110: 111 fan on hottest of zones 1,2,3 auto
393 * 111: 000 fan in manual mode */
394 static inline int PWM_ACZ_FROM_REG(int reg)
396 static const int acz[] = {1, 2, 4, 0, 0, 6, 7, 0};
398 return acz[(reg >> 5) & 0x07];
401 static inline int PWM_ACZ_TO_REG(int val, int reg)
403 int acz = (val == 4) ? 2 : val - 1;
405 return (reg & 0x1f) | ((acz & 0x07) << 5);
409 static const int PWM_FREQ[] = {11, 15, 22, 29, 35, 44, 59, 88,
410 15000, 20000, 30000, 25000, 0, 0, 0, 0};
412 static inline int PWM_FREQ_FROM_REG(int reg)
414 return PWM_FREQ[reg & 0x0f];
417 static int PWM_FREQ_TO_REG(int val, int reg)
421 /* the first two cases are special - stupid chip design! */
424 } else if (val > 22500) {
427 for (i = 9; i > 0; i--) {
428 if (val > (PWM_FREQ[i] + PWM_FREQ[i - 1] + 1) / 2) {
434 return (reg & 0xf0) | i;
439 * reg[0] = [OFF3, OFF2, OFF1, RES, RR1-E, RR1-2, RR1-1, RR1-0]
440 * reg[1] = [RR2-E, RR2-2, RR2-1, RR2-0, RR3-E, RR3-2, RR3-1, RR3-0] */
441 static const u8 PWM_RR[] = {206, 104, 69, 41, 26, 18, 10, 5};
443 static inline int PWM_RR_FROM_REG(int reg, int ix)
445 int rr = (ix == 1) ? reg >> 4 : reg;
447 return (rr & 0x08) ? PWM_RR[rr & 0x07] : 0;
450 static int PWM_RR_TO_REG(int val, int ix, int reg)
454 for (i = 0; i < 7; i++) {
455 if (val > (PWM_RR[i] + PWM_RR[i + 1] + 1) / 2) {
460 return (ix == 1) ? (reg & 0x8f) | (i << 4) : (reg & 0xf8) | i;
463 /* PWM ramp rate enable */
464 static inline int PWM_RR_EN_FROM_REG(int reg, int ix)
466 return PWM_RR_FROM_REG(reg, ix) ? 1 : 0;
469 static inline int PWM_RR_EN_TO_REG(int val, int ix, int reg)
471 int en = (ix == 1) ? 0x80 : 0x08;
473 return val ? reg | en : reg & ~en;
477 * The PWM min/off bits are part of the PMW ramp rate register 0 (see above for
478 * the register layout). */
479 static inline int PWM_OFF_FROM_REG(int reg, int ix)
481 return (reg >> (ix + 5)) & 0x01;
484 static inline int PWM_OFF_TO_REG(int val, int ix, int reg)
486 return (reg & ~(1 << (ix + 5))) | ((val & 0x01) << (ix + 5));
489 /* ---------------------------------------------------------------------
492 * ISA access is performed through an index/data register pair and needs to
493 * be protected by a mutex during runtime (not required for initialization).
494 * We use data->update_lock for this and need to ensure that we acquire it
495 * before calling dme1737_read or dme1737_write.
496 * --------------------------------------------------------------------- */
498 static u8 dme1737_read(struct i2c_client *client, u8 reg)
502 if (client->driver) { /* I2C device */
503 val = i2c_smbus_read_byte_data(client, reg);
506 dev_warn(&client->dev, "Read from register "
507 "0x%02x failed! Please report to the driver "
508 "maintainer.\n", reg);
510 } else { /* ISA device */
511 outb(reg, client->addr);
512 val = inb(client->addr + 1);
518 static s32 dme1737_write(struct i2c_client *client, u8 reg, u8 val)
522 if (client->driver) { /* I2C device */
523 res = i2c_smbus_write_byte_data(client, reg, val);
526 dev_warn(&client->dev, "Write to register "
527 "0x%02x failed! Please report to the driver "
528 "maintainer.\n", reg);
530 } else { /* ISA device */
531 outb(reg, client->addr);
532 outb(val, client->addr + 1);
538 static struct dme1737_data *dme1737_update_device(struct device *dev)
540 struct dme1737_data *data = dev_get_drvdata(dev);
541 struct i2c_client *client = &data->client;
545 mutex_lock(&data->update_lock);
547 /* Enable a Vbat monitoring cycle every 10 mins */
548 if (time_after(jiffies, data->last_vbat + 600 * HZ) || !data->valid) {
549 dme1737_write(client, DME1737_REG_CONFIG, dme1737_read(client,
550 DME1737_REG_CONFIG) | 0x10);
551 data->last_vbat = jiffies;
554 /* Sample register contents every 1 sec */
555 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
556 data->vid = dme1737_read(client, DME1737_REG_VID) & 0x3f;
558 /* In (voltage) registers */
559 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
560 /* Voltage inputs are stored as 16 bit values even
561 * though they have only 12 bits resolution. This is
562 * to make it consistent with the temp inputs. */
563 data->in[ix] = dme1737_read(client,
564 DME1737_REG_IN(ix)) << 8;
565 data->in_min[ix] = dme1737_read(client,
566 DME1737_REG_IN_MIN(ix));
567 data->in_max[ix] = dme1737_read(client,
568 DME1737_REG_IN_MAX(ix));
572 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
573 /* Temp inputs are stored as 16 bit values even
574 * though they have only 12 bits resolution. This is
575 * to take advantage of implicit conversions between
576 * register values (2's complement) and temp values
577 * (signed decimal). */
578 data->temp[ix] = dme1737_read(client,
579 DME1737_REG_TEMP(ix)) << 8;
580 data->temp_min[ix] = dme1737_read(client,
581 DME1737_REG_TEMP_MIN(ix));
582 data->temp_max[ix] = dme1737_read(client,
583 DME1737_REG_TEMP_MAX(ix));
584 data->temp_offset[ix] = dme1737_read(client,
585 DME1737_REG_TEMP_OFFSET(ix));
588 /* In and temp LSB registers
589 * The LSBs are latched when the MSBs are read, so the order in
590 * which the registers are read (MSB first, then LSB) is
592 for (ix = 0; ix < ARRAY_SIZE(lsb); ix++) {
593 lsb[ix] = dme1737_read(client,
594 DME1737_REG_IN_TEMP_LSB(ix));
596 for (ix = 0; ix < ARRAY_SIZE(data->in); ix++) {
597 data->in[ix] |= (lsb[DME1737_REG_IN_LSB[ix]] <<
598 DME1737_REG_IN_LSB_SHL[ix]) & 0xf0;
600 for (ix = 0; ix < ARRAY_SIZE(data->temp); ix++) {
601 data->temp[ix] |= (lsb[DME1737_REG_TEMP_LSB[ix]] <<
602 DME1737_REG_TEMP_LSB_SHL[ix]) & 0xf0;
606 for (ix = 0; ix < ARRAY_SIZE(data->fan); ix++) {
607 /* Skip reading registers if optional fans are not
609 if (!(data->has_fan & (1 << ix))) {
612 data->fan[ix] = dme1737_read(client,
613 DME1737_REG_FAN(ix));
614 data->fan[ix] |= dme1737_read(client,
615 DME1737_REG_FAN(ix) + 1) << 8;
616 data->fan_min[ix] = dme1737_read(client,
617 DME1737_REG_FAN_MIN(ix));
618 data->fan_min[ix] |= dme1737_read(client,
619 DME1737_REG_FAN_MIN(ix) + 1) << 8;
620 data->fan_opt[ix] = dme1737_read(client,
621 DME1737_REG_FAN_OPT(ix));
622 /* fan_max exists only for fan[5-6] */
624 data->fan_max[ix - 4] = dme1737_read(client,
625 DME1737_REG_FAN_MAX(ix));
630 for (ix = 0; ix < ARRAY_SIZE(data->pwm); ix++) {
631 /* Skip reading registers if optional PWMs are not
633 if (!(data->has_pwm & (1 << ix))) {
636 data->pwm[ix] = dme1737_read(client,
637 DME1737_REG_PWM(ix));
638 data->pwm_freq[ix] = dme1737_read(client,
639 DME1737_REG_PWM_FREQ(ix));
640 /* pwm_config and pwm_min exist only for pwm[1-3] */
642 data->pwm_config[ix] = dme1737_read(client,
643 DME1737_REG_PWM_CONFIG(ix));
644 data->pwm_min[ix] = dme1737_read(client,
645 DME1737_REG_PWM_MIN(ix));
648 for (ix = 0; ix < ARRAY_SIZE(data->pwm_rr); ix++) {
649 data->pwm_rr[ix] = dme1737_read(client,
650 DME1737_REG_PWM_RR(ix));
653 /* Thermal zone registers */
654 for (ix = 0; ix < ARRAY_SIZE(data->zone_low); ix++) {
655 data->zone_low[ix] = dme1737_read(client,
656 DME1737_REG_ZONE_LOW(ix));
657 data->zone_abs[ix] = dme1737_read(client,
658 DME1737_REG_ZONE_ABS(ix));
660 for (ix = 0; ix < ARRAY_SIZE(data->zone_hyst); ix++) {
661 data->zone_hyst[ix] = dme1737_read(client,
662 DME1737_REG_ZONE_HYST(ix));
665 /* Alarm registers */
666 data->alarms = dme1737_read(client,
668 /* Bit 7 tells us if the other alarm registers are non-zero and
669 * therefore also need to be read */
670 if (data->alarms & 0x80) {
671 data->alarms |= dme1737_read(client,
672 DME1737_REG_ALARM2) << 8;
673 data->alarms |= dme1737_read(client,
674 DME1737_REG_ALARM3) << 16;
677 /* The ISA chips require explicit clearing of alarm bits.
678 * Don't worry, an alarm will come back if the condition
679 * that causes it still exists */
680 if (!client->driver) {
681 if (data->alarms & 0xff0000) {
682 dme1737_write(client, DME1737_REG_ALARM3,
685 if (data->alarms & 0xff00) {
686 dme1737_write(client, DME1737_REG_ALARM2,
689 if (data->alarms & 0xff) {
690 dme1737_write(client, DME1737_REG_ALARM1,
695 data->last_update = jiffies;
699 mutex_unlock(&data->update_lock);
704 /* ---------------------------------------------------------------------
705 * Voltage sysfs attributes
707 * --------------------------------------------------------------------- */
709 #define SYS_IN_INPUT 0
712 #define SYS_IN_ALARM 3
714 static ssize_t show_in(struct device *dev, struct device_attribute *attr,
717 struct dme1737_data *data = dme1737_update_device(dev);
718 struct sensor_device_attribute_2
719 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
720 int ix = sensor_attr_2->index;
721 int fn = sensor_attr_2->nr;
726 res = IN_FROM_REG(data->in[ix], ix, 16);
729 res = IN_FROM_REG(data->in_min[ix], ix, 8);
732 res = IN_FROM_REG(data->in_max[ix], ix, 8);
735 res = (data->alarms >> DME1737_BIT_ALARM_IN[ix]) & 0x01;
739 dev_dbg(dev, "Unknown function %d.\n", fn);
742 return sprintf(buf, "%d\n", res);
745 static ssize_t set_in(struct device *dev, struct device_attribute *attr,
746 const char *buf, size_t count)
748 struct dme1737_data *data = dev_get_drvdata(dev);
749 struct i2c_client *client = &data->client;
750 struct sensor_device_attribute_2
751 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
752 int ix = sensor_attr_2->index;
753 int fn = sensor_attr_2->nr;
754 long val = simple_strtol(buf, NULL, 10);
756 mutex_lock(&data->update_lock);
759 data->in_min[ix] = IN_TO_REG(val, ix);
760 dme1737_write(client, DME1737_REG_IN_MIN(ix),
764 data->in_max[ix] = IN_TO_REG(val, ix);
765 dme1737_write(client, DME1737_REG_IN_MAX(ix),
769 dev_dbg(dev, "Unknown function %d.\n", fn);
771 mutex_unlock(&data->update_lock);
776 /* ---------------------------------------------------------------------
777 * Temperature sysfs attributes
779 * --------------------------------------------------------------------- */
781 #define SYS_TEMP_INPUT 0
782 #define SYS_TEMP_MIN 1
783 #define SYS_TEMP_MAX 2
784 #define SYS_TEMP_OFFSET 3
785 #define SYS_TEMP_ALARM 4
786 #define SYS_TEMP_FAULT 5
788 static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
791 struct dme1737_data *data = dme1737_update_device(dev);
792 struct sensor_device_attribute_2
793 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
794 int ix = sensor_attr_2->index;
795 int fn = sensor_attr_2->nr;
800 res = TEMP_FROM_REG(data->temp[ix], 16);
803 res = TEMP_FROM_REG(data->temp_min[ix], 8);
806 res = TEMP_FROM_REG(data->temp_max[ix], 8);
808 case SYS_TEMP_OFFSET:
809 res = TEMP_FROM_REG(data->temp_offset[ix], 8);
812 res = (data->alarms >> DME1737_BIT_ALARM_TEMP[ix]) & 0x01;
815 res = (((u16)data->temp[ix] & 0xff00) == 0x8000);
819 dev_dbg(dev, "Unknown function %d.\n", fn);
822 return sprintf(buf, "%d\n", res);
825 static ssize_t set_temp(struct device *dev, struct device_attribute *attr,
826 const char *buf, size_t count)
828 struct dme1737_data *data = dev_get_drvdata(dev);
829 struct i2c_client *client = &data->client;
830 struct sensor_device_attribute_2
831 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
832 int ix = sensor_attr_2->index;
833 int fn = sensor_attr_2->nr;
834 long val = simple_strtol(buf, NULL, 10);
836 mutex_lock(&data->update_lock);
839 data->temp_min[ix] = TEMP_TO_REG(val);
840 dme1737_write(client, DME1737_REG_TEMP_MIN(ix),
844 data->temp_max[ix] = TEMP_TO_REG(val);
845 dme1737_write(client, DME1737_REG_TEMP_MAX(ix),
848 case SYS_TEMP_OFFSET:
849 data->temp_offset[ix] = TEMP_TO_REG(val);
850 dme1737_write(client, DME1737_REG_TEMP_OFFSET(ix),
851 data->temp_offset[ix]);
854 dev_dbg(dev, "Unknown function %d.\n", fn);
856 mutex_unlock(&data->update_lock);
861 /* ---------------------------------------------------------------------
862 * Zone sysfs attributes
864 * --------------------------------------------------------------------- */
866 #define SYS_ZONE_AUTO_CHANNELS_TEMP 0
867 #define SYS_ZONE_AUTO_POINT1_TEMP_HYST 1
868 #define SYS_ZONE_AUTO_POINT1_TEMP 2
869 #define SYS_ZONE_AUTO_POINT2_TEMP 3
870 #define SYS_ZONE_AUTO_POINT3_TEMP 4
872 static ssize_t show_zone(struct device *dev, struct device_attribute *attr,
875 struct dme1737_data *data = dme1737_update_device(dev);
876 struct sensor_device_attribute_2
877 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
878 int ix = sensor_attr_2->index;
879 int fn = sensor_attr_2->nr;
883 case SYS_ZONE_AUTO_CHANNELS_TEMP:
884 /* check config2 for non-standard temp-to-zone mapping */
885 if ((ix == 1) && (data->config2 & 0x02)) {
891 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
892 res = TEMP_FROM_REG(data->zone_low[ix], 8) -
893 TEMP_HYST_FROM_REG(data->zone_hyst[ix == 2], ix);
895 case SYS_ZONE_AUTO_POINT1_TEMP:
896 res = TEMP_FROM_REG(data->zone_low[ix], 8);
898 case SYS_ZONE_AUTO_POINT2_TEMP:
899 /* pwm_freq holds the temp range bits in the upper nibble */
900 res = TEMP_FROM_REG(data->zone_low[ix], 8) +
901 TEMP_RANGE_FROM_REG(data->pwm_freq[ix]);
903 case SYS_ZONE_AUTO_POINT3_TEMP:
904 res = TEMP_FROM_REG(data->zone_abs[ix], 8);
908 dev_dbg(dev, "Unknown function %d.\n", fn);
911 return sprintf(buf, "%d\n", res);
914 static ssize_t set_zone(struct device *dev, struct device_attribute *attr,
915 const char *buf, size_t count)
917 struct dme1737_data *data = dev_get_drvdata(dev);
918 struct i2c_client *client = &data->client;
919 struct sensor_device_attribute_2
920 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
921 int ix = sensor_attr_2->index;
922 int fn = sensor_attr_2->nr;
923 long val = simple_strtol(buf, NULL, 10);
925 mutex_lock(&data->update_lock);
927 case SYS_ZONE_AUTO_POINT1_TEMP_HYST:
928 /* Refresh the cache */
929 data->zone_low[ix] = dme1737_read(client,
930 DME1737_REG_ZONE_LOW(ix));
931 /* Modify the temp hyst value */
932 data->zone_hyst[ix == 2] = TEMP_HYST_TO_REG(
933 TEMP_FROM_REG(data->zone_low[ix], 8) -
934 val, ix, dme1737_read(client,
935 DME1737_REG_ZONE_HYST(ix == 2)));
936 dme1737_write(client, DME1737_REG_ZONE_HYST(ix == 2),
937 data->zone_hyst[ix == 2]);
939 case SYS_ZONE_AUTO_POINT1_TEMP:
940 data->zone_low[ix] = TEMP_TO_REG(val);
941 dme1737_write(client, DME1737_REG_ZONE_LOW(ix),
944 case SYS_ZONE_AUTO_POINT2_TEMP:
945 /* Refresh the cache */
946 data->zone_low[ix] = dme1737_read(client,
947 DME1737_REG_ZONE_LOW(ix));
948 /* Modify the temp range value (which is stored in the upper
949 * nibble of the pwm_freq register) */
950 data->pwm_freq[ix] = TEMP_RANGE_TO_REG(val -
951 TEMP_FROM_REG(data->zone_low[ix], 8),
953 DME1737_REG_PWM_FREQ(ix)));
954 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
957 case SYS_ZONE_AUTO_POINT3_TEMP:
958 data->zone_abs[ix] = TEMP_TO_REG(val);
959 dme1737_write(client, DME1737_REG_ZONE_ABS(ix),
963 dev_dbg(dev, "Unknown function %d.\n", fn);
965 mutex_unlock(&data->update_lock);
970 /* ---------------------------------------------------------------------
971 * Fan sysfs attributes
973 * --------------------------------------------------------------------- */
975 #define SYS_FAN_INPUT 0
976 #define SYS_FAN_MIN 1
977 #define SYS_FAN_MAX 2
978 #define SYS_FAN_ALARM 3
979 #define SYS_FAN_TYPE 4
981 static ssize_t show_fan(struct device *dev, struct device_attribute *attr,
984 struct dme1737_data *data = dme1737_update_device(dev);
985 struct sensor_device_attribute_2
986 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
987 int ix = sensor_attr_2->index;
988 int fn = sensor_attr_2->nr;
993 res = FAN_FROM_REG(data->fan[ix],
995 FAN_TPC_FROM_REG(data->fan_opt[ix]));
998 res = FAN_FROM_REG(data->fan_min[ix],
1000 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1003 /* only valid for fan[5-6] */
1004 res = FAN_MAX_FROM_REG(data->fan_max[ix - 4]);
1007 res = (data->alarms >> DME1737_BIT_ALARM_FAN[ix]) & 0x01;
1010 /* only valid for fan[1-4] */
1011 res = FAN_TYPE_FROM_REG(data->fan_opt[ix]);
1015 dev_dbg(dev, "Unknown function %d.\n", fn);
1018 return sprintf(buf, "%d\n", res);
1021 static ssize_t set_fan(struct device *dev, struct device_attribute *attr,
1022 const char *buf, size_t count)
1024 struct dme1737_data *data = dev_get_drvdata(dev);
1025 struct i2c_client *client = &data->client;
1026 struct sensor_device_attribute_2
1027 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1028 int ix = sensor_attr_2->index;
1029 int fn = sensor_attr_2->nr;
1030 long val = simple_strtol(buf, NULL, 10);
1032 mutex_lock(&data->update_lock);
1036 data->fan_min[ix] = FAN_TO_REG(val, 0);
1038 /* Refresh the cache */
1039 data->fan_opt[ix] = dme1737_read(client,
1040 DME1737_REG_FAN_OPT(ix));
1041 /* Modify the fan min value */
1042 data->fan_min[ix] = FAN_TO_REG(val,
1043 FAN_TPC_FROM_REG(data->fan_opt[ix]));
1045 dme1737_write(client, DME1737_REG_FAN_MIN(ix),
1046 data->fan_min[ix] & 0xff);
1047 dme1737_write(client, DME1737_REG_FAN_MIN(ix) + 1,
1048 data->fan_min[ix] >> 8);
1051 /* Only valid for fan[5-6] */
1052 data->fan_max[ix - 4] = FAN_MAX_TO_REG(val);
1053 dme1737_write(client, DME1737_REG_FAN_MAX(ix),
1054 data->fan_max[ix - 4]);
1057 /* Only valid for fan[1-4] */
1058 if (!(val == 1 || val == 2 || val == 4)) {
1060 dev_warn(dev, "Fan type value %ld not "
1061 "supported. Choose one of 1, 2, or 4.\n",
1065 data->fan_opt[ix] = FAN_TYPE_TO_REG(val, dme1737_read(client,
1066 DME1737_REG_FAN_OPT(ix)));
1067 dme1737_write(client, DME1737_REG_FAN_OPT(ix),
1071 dev_dbg(dev, "Unknown function %d.\n", fn);
1074 mutex_unlock(&data->update_lock);
1079 /* ---------------------------------------------------------------------
1080 * PWM sysfs attributes
1082 * --------------------------------------------------------------------- */
1085 #define SYS_PWM_FREQ 1
1086 #define SYS_PWM_ENABLE 2
1087 #define SYS_PWM_RAMP_RATE 3
1088 #define SYS_PWM_AUTO_CHANNELS_ZONE 4
1089 #define SYS_PWM_AUTO_PWM_MIN 5
1090 #define SYS_PWM_AUTO_POINT1_PWM 6
1091 #define SYS_PWM_AUTO_POINT2_PWM 7
1093 static ssize_t show_pwm(struct device *dev, struct device_attribute *attr,
1096 struct dme1737_data *data = dme1737_update_device(dev);
1097 struct sensor_device_attribute_2
1098 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1099 int ix = sensor_attr_2->index;
1100 int fn = sensor_attr_2->nr;
1105 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 0) {
1108 res = data->pwm[ix];
1112 res = PWM_FREQ_FROM_REG(data->pwm_freq[ix]);
1114 case SYS_PWM_ENABLE:
1116 res = 1; /* pwm[5-6] hard-wired to manual mode */
1118 res = PWM_EN_FROM_REG(data->pwm_config[ix]);
1121 case SYS_PWM_RAMP_RATE:
1122 /* Only valid for pwm[1-3] */
1123 res = PWM_RR_FROM_REG(data->pwm_rr[ix > 0], ix);
1125 case SYS_PWM_AUTO_CHANNELS_ZONE:
1126 /* Only valid for pwm[1-3] */
1127 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1128 res = PWM_ACZ_FROM_REG(data->pwm_config[ix]);
1130 res = data->pwm_acz[ix];
1133 case SYS_PWM_AUTO_PWM_MIN:
1134 /* Only valid for pwm[1-3] */
1135 if (PWM_OFF_FROM_REG(data->pwm_rr[0], ix)) {
1136 res = data->pwm_min[ix];
1141 case SYS_PWM_AUTO_POINT1_PWM:
1142 /* Only valid for pwm[1-3] */
1143 res = data->pwm_min[ix];
1145 case SYS_PWM_AUTO_POINT2_PWM:
1146 /* Only valid for pwm[1-3] */
1147 res = 255; /* hard-wired */
1151 dev_dbg(dev, "Unknown function %d.\n", fn);
1154 return sprintf(buf, "%d\n", res);
1157 static struct attribute *dme1737_attr_pwm[];
1158 static void dme1737_chmod_file(struct device*, struct attribute*, mode_t);
1160 static ssize_t set_pwm(struct device *dev, struct device_attribute *attr,
1161 const char *buf, size_t count)
1163 struct dme1737_data *data = dev_get_drvdata(dev);
1164 struct i2c_client *client = &data->client;
1165 struct sensor_device_attribute_2
1166 *sensor_attr_2 = to_sensor_dev_attr_2(attr);
1167 int ix = sensor_attr_2->index;
1168 int fn = sensor_attr_2->nr;
1169 long val = simple_strtol(buf, NULL, 10);
1171 mutex_lock(&data->update_lock);
1174 data->pwm[ix] = SENSORS_LIMIT(val, 0, 255);
1175 dme1737_write(client, DME1737_REG_PWM(ix), data->pwm[ix]);
1178 data->pwm_freq[ix] = PWM_FREQ_TO_REG(val, dme1737_read(client,
1179 DME1737_REG_PWM_FREQ(ix)));
1180 dme1737_write(client, DME1737_REG_PWM_FREQ(ix),
1181 data->pwm_freq[ix]);
1183 case SYS_PWM_ENABLE:
1184 /* Only valid for pwm[1-3] */
1185 if (val < 0 || val > 2) {
1187 dev_warn(dev, "PWM enable %ld not "
1188 "supported. Choose one of 0, 1, or 2.\n",
1192 /* Refresh the cache */
1193 data->pwm_config[ix] = dme1737_read(client,
1194 DME1737_REG_PWM_CONFIG(ix));
1195 if (val == PWM_EN_FROM_REG(data->pwm_config[ix])) {
1196 /* Bail out if no change */
1199 /* Do some housekeeping if we are currently in auto mode */
1200 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1201 /* Save the current zone channel assignment */
1202 data->pwm_acz[ix] = PWM_ACZ_FROM_REG(
1203 data->pwm_config[ix]);
1204 /* Save the current ramp rate state and disable it */
1205 data->pwm_rr[ix > 0] = dme1737_read(client,
1206 DME1737_REG_PWM_RR(ix > 0));
1207 data->pwm_rr_en &= ~(1 << ix);
1208 if (PWM_RR_EN_FROM_REG(data->pwm_rr[ix > 0], ix)) {
1209 data->pwm_rr_en |= (1 << ix);
1210 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(0, ix,
1211 data->pwm_rr[ix > 0]);
1212 dme1737_write(client,
1213 DME1737_REG_PWM_RR(ix > 0),
1214 data->pwm_rr[ix > 0]);
1217 /* Set the new PWM mode */
1220 /* Change permissions of pwm[ix] to read-only */
1221 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1223 /* Turn fan fully on */
1224 data->pwm_config[ix] = PWM_EN_TO_REG(0,
1225 data->pwm_config[ix]);
1226 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1227 data->pwm_config[ix]);
1230 /* Turn on manual mode */
1231 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1232 data->pwm_config[ix]);
1233 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1234 data->pwm_config[ix]);
1235 /* Change permissions of pwm[ix] to read-writeable */
1236 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1240 /* Change permissions of pwm[ix] to read-only */
1241 dme1737_chmod_file(dev, dme1737_attr_pwm[ix],
1243 /* Turn on auto mode using the saved zone channel
1245 data->pwm_config[ix] = PWM_ACZ_TO_REG(
1247 data->pwm_config[ix]);
1248 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1249 data->pwm_config[ix]);
1250 /* Enable PWM ramp rate if previously enabled */
1251 if (data->pwm_rr_en & (1 << ix)) {
1252 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(1, ix,
1253 dme1737_read(client,
1254 DME1737_REG_PWM_RR(ix > 0)));
1255 dme1737_write(client,
1256 DME1737_REG_PWM_RR(ix > 0),
1257 data->pwm_rr[ix > 0]);
1262 case SYS_PWM_RAMP_RATE:
1263 /* Only valid for pwm[1-3] */
1264 /* Refresh the cache */
1265 data->pwm_config[ix] = dme1737_read(client,
1266 DME1737_REG_PWM_CONFIG(ix));
1267 data->pwm_rr[ix > 0] = dme1737_read(client,
1268 DME1737_REG_PWM_RR(ix > 0));
1269 /* Set the ramp rate value */
1271 data->pwm_rr[ix > 0] = PWM_RR_TO_REG(val, ix,
1272 data->pwm_rr[ix > 0]);
1274 /* Enable/disable the feature only if the associated PWM
1275 * output is in automatic mode. */
1276 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1277 data->pwm_rr[ix > 0] = PWM_RR_EN_TO_REG(val > 0, ix,
1278 data->pwm_rr[ix > 0]);
1280 dme1737_write(client, DME1737_REG_PWM_RR(ix > 0),
1281 data->pwm_rr[ix > 0]);
1283 case SYS_PWM_AUTO_CHANNELS_ZONE:
1284 /* Only valid for pwm[1-3] */
1285 if (!(val == 1 || val == 2 || val == 4 ||
1286 val == 6 || val == 7)) {
1288 dev_warn(dev, "PWM auto channels zone %ld "
1289 "not supported. Choose one of 1, 2, 4, 6, "
1293 /* Refresh the cache */
1294 data->pwm_config[ix] = dme1737_read(client,
1295 DME1737_REG_PWM_CONFIG(ix));
1296 if (PWM_EN_FROM_REG(data->pwm_config[ix]) == 2) {
1297 /* PWM is already in auto mode so update the temp
1298 * channel assignment */
1299 data->pwm_config[ix] = PWM_ACZ_TO_REG(val,
1300 data->pwm_config[ix]);
1301 dme1737_write(client, DME1737_REG_PWM_CONFIG(ix),
1302 data->pwm_config[ix]);
1304 /* PWM is not in auto mode so we save the temp
1305 * channel assignment for later use */
1306 data->pwm_acz[ix] = val;
1309 case SYS_PWM_AUTO_PWM_MIN:
1310 /* Only valid for pwm[1-3] */
1311 /* Refresh the cache */
1312 data->pwm_min[ix] = dme1737_read(client,
1313 DME1737_REG_PWM_MIN(ix));
1314 /* There are only 2 values supported for the auto_pwm_min
1315 * value: 0 or auto_point1_pwm. So if the temperature drops
1316 * below the auto_point1_temp_hyst value, the fan either turns
1317 * off or runs at auto_point1_pwm duty-cycle. */
1318 if (val > ((data->pwm_min[ix] + 1) / 2)) {
1319 data->pwm_rr[0] = PWM_OFF_TO_REG(1, ix,
1320 dme1737_read(client,
1321 DME1737_REG_PWM_RR(0)));
1323 data->pwm_rr[0] = PWM_OFF_TO_REG(0, ix,
1324 dme1737_read(client,
1325 DME1737_REG_PWM_RR(0)));
1327 dme1737_write(client, DME1737_REG_PWM_RR(0),
1330 case SYS_PWM_AUTO_POINT1_PWM:
1331 /* Only valid for pwm[1-3] */
1332 data->pwm_min[ix] = SENSORS_LIMIT(val, 0, 255);
1333 dme1737_write(client, DME1737_REG_PWM_MIN(ix),
1337 dev_dbg(dev, "Unknown function %d.\n", fn);
1340 mutex_unlock(&data->update_lock);
1345 /* ---------------------------------------------------------------------
1346 * Miscellaneous sysfs attributes
1347 * --------------------------------------------------------------------- */
1349 static ssize_t show_vrm(struct device *dev, struct device_attribute *attr,
1352 struct i2c_client *client = to_i2c_client(dev);
1353 struct dme1737_data *data = i2c_get_clientdata(client);
1355 return sprintf(buf, "%d\n", data->vrm);
1358 static ssize_t set_vrm(struct device *dev, struct device_attribute *attr,
1359 const char *buf, size_t count)
1361 struct dme1737_data *data = dev_get_drvdata(dev);
1362 long val = simple_strtol(buf, NULL, 10);
1368 static ssize_t show_vid(struct device *dev, struct device_attribute *attr,
1371 struct dme1737_data *data = dme1737_update_device(dev);
1373 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1376 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1379 struct dme1737_data *data = dev_get_drvdata(dev);
1381 return sprintf(buf, "%s\n", data->client.name);
1384 /* ---------------------------------------------------------------------
1385 * Sysfs device attribute defines and structs
1386 * --------------------------------------------------------------------- */
1390 #define SENSOR_DEVICE_ATTR_IN(ix) \
1391 static SENSOR_DEVICE_ATTR_2(in##ix##_input, S_IRUGO, \
1392 show_in, NULL, SYS_IN_INPUT, ix); \
1393 static SENSOR_DEVICE_ATTR_2(in##ix##_min, S_IRUGO | S_IWUSR, \
1394 show_in, set_in, SYS_IN_MIN, ix); \
1395 static SENSOR_DEVICE_ATTR_2(in##ix##_max, S_IRUGO | S_IWUSR, \
1396 show_in, set_in, SYS_IN_MAX, ix); \
1397 static SENSOR_DEVICE_ATTR_2(in##ix##_alarm, S_IRUGO, \
1398 show_in, NULL, SYS_IN_ALARM, ix)
1400 SENSOR_DEVICE_ATTR_IN(0);
1401 SENSOR_DEVICE_ATTR_IN(1);
1402 SENSOR_DEVICE_ATTR_IN(2);
1403 SENSOR_DEVICE_ATTR_IN(3);
1404 SENSOR_DEVICE_ATTR_IN(4);
1405 SENSOR_DEVICE_ATTR_IN(5);
1406 SENSOR_DEVICE_ATTR_IN(6);
1408 /* Temperatures 1-3 */
1410 #define SENSOR_DEVICE_ATTR_TEMP(ix) \
1411 static SENSOR_DEVICE_ATTR_2(temp##ix##_input, S_IRUGO, \
1412 show_temp, NULL, SYS_TEMP_INPUT, ix-1); \
1413 static SENSOR_DEVICE_ATTR_2(temp##ix##_min, S_IRUGO | S_IWUSR, \
1414 show_temp, set_temp, SYS_TEMP_MIN, ix-1); \
1415 static SENSOR_DEVICE_ATTR_2(temp##ix##_max, S_IRUGO | S_IWUSR, \
1416 show_temp, set_temp, SYS_TEMP_MAX, ix-1); \
1417 static SENSOR_DEVICE_ATTR_2(temp##ix##_offset, S_IRUGO, \
1418 show_temp, set_temp, SYS_TEMP_OFFSET, ix-1); \
1419 static SENSOR_DEVICE_ATTR_2(temp##ix##_alarm, S_IRUGO, \
1420 show_temp, NULL, SYS_TEMP_ALARM, ix-1); \
1421 static SENSOR_DEVICE_ATTR_2(temp##ix##_fault, S_IRUGO, \
1422 show_temp, NULL, SYS_TEMP_FAULT, ix-1)
1424 SENSOR_DEVICE_ATTR_TEMP(1);
1425 SENSOR_DEVICE_ATTR_TEMP(2);
1426 SENSOR_DEVICE_ATTR_TEMP(3);
1430 #define SENSOR_DEVICE_ATTR_ZONE(ix) \
1431 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_channels_temp, S_IRUGO, \
1432 show_zone, NULL, SYS_ZONE_AUTO_CHANNELS_TEMP, ix-1); \
1433 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp_hyst, S_IRUGO, \
1434 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP_HYST, ix-1); \
1435 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point1_temp, S_IRUGO, \
1436 show_zone, set_zone, SYS_ZONE_AUTO_POINT1_TEMP, ix-1); \
1437 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point2_temp, S_IRUGO, \
1438 show_zone, set_zone, SYS_ZONE_AUTO_POINT2_TEMP, ix-1); \
1439 static SENSOR_DEVICE_ATTR_2(zone##ix##_auto_point3_temp, S_IRUGO, \
1440 show_zone, set_zone, SYS_ZONE_AUTO_POINT3_TEMP, ix-1)
1442 SENSOR_DEVICE_ATTR_ZONE(1);
1443 SENSOR_DEVICE_ATTR_ZONE(2);
1444 SENSOR_DEVICE_ATTR_ZONE(3);
1448 #define SENSOR_DEVICE_ATTR_FAN_1TO4(ix) \
1449 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1450 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1451 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1452 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1453 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1454 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1455 static SENSOR_DEVICE_ATTR_2(fan##ix##_type, S_IRUGO | S_IWUSR, \
1456 show_fan, set_fan, SYS_FAN_TYPE, ix-1)
1458 SENSOR_DEVICE_ATTR_FAN_1TO4(1);
1459 SENSOR_DEVICE_ATTR_FAN_1TO4(2);
1460 SENSOR_DEVICE_ATTR_FAN_1TO4(3);
1461 SENSOR_DEVICE_ATTR_FAN_1TO4(4);
1465 #define SENSOR_DEVICE_ATTR_FAN_5TO6(ix) \
1466 static SENSOR_DEVICE_ATTR_2(fan##ix##_input, S_IRUGO, \
1467 show_fan, NULL, SYS_FAN_INPUT, ix-1); \
1468 static SENSOR_DEVICE_ATTR_2(fan##ix##_min, S_IRUGO | S_IWUSR, \
1469 show_fan, set_fan, SYS_FAN_MIN, ix-1); \
1470 static SENSOR_DEVICE_ATTR_2(fan##ix##_alarm, S_IRUGO, \
1471 show_fan, NULL, SYS_FAN_ALARM, ix-1); \
1472 static SENSOR_DEVICE_ATTR_2(fan##ix##_max, S_IRUGO | S_IWUSR, \
1473 show_fan, set_fan, SYS_FAN_MAX, ix-1)
1475 SENSOR_DEVICE_ATTR_FAN_5TO6(5);
1476 SENSOR_DEVICE_ATTR_FAN_5TO6(6);
1480 #define SENSOR_DEVICE_ATTR_PWM_1TO3(ix) \
1481 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO, \
1482 show_pwm, set_pwm, SYS_PWM, ix-1); \
1483 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO, \
1484 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1485 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1486 show_pwm, set_pwm, SYS_PWM_ENABLE, ix-1); \
1487 static SENSOR_DEVICE_ATTR_2(pwm##ix##_ramp_rate, S_IRUGO, \
1488 show_pwm, set_pwm, SYS_PWM_RAMP_RATE, ix-1); \
1489 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_channels_zone, S_IRUGO, \
1490 show_pwm, set_pwm, SYS_PWM_AUTO_CHANNELS_ZONE, ix-1); \
1491 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_pwm_min, S_IRUGO, \
1492 show_pwm, set_pwm, SYS_PWM_AUTO_PWM_MIN, ix-1); \
1493 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point1_pwm, S_IRUGO, \
1494 show_pwm, set_pwm, SYS_PWM_AUTO_POINT1_PWM, ix-1); \
1495 static SENSOR_DEVICE_ATTR_2(pwm##ix##_auto_point2_pwm, S_IRUGO, \
1496 show_pwm, NULL, SYS_PWM_AUTO_POINT2_PWM, ix-1)
1498 SENSOR_DEVICE_ATTR_PWM_1TO3(1);
1499 SENSOR_DEVICE_ATTR_PWM_1TO3(2);
1500 SENSOR_DEVICE_ATTR_PWM_1TO3(3);
1504 #define SENSOR_DEVICE_ATTR_PWM_5TO6(ix) \
1505 static SENSOR_DEVICE_ATTR_2(pwm##ix, S_IRUGO | S_IWUSR, \
1506 show_pwm, set_pwm, SYS_PWM, ix-1); \
1507 static SENSOR_DEVICE_ATTR_2(pwm##ix##_freq, S_IRUGO | S_IWUSR, \
1508 show_pwm, set_pwm, SYS_PWM_FREQ, ix-1); \
1509 static SENSOR_DEVICE_ATTR_2(pwm##ix##_enable, S_IRUGO, \
1510 show_pwm, NULL, SYS_PWM_ENABLE, ix-1)
1512 SENSOR_DEVICE_ATTR_PWM_5TO6(5);
1513 SENSOR_DEVICE_ATTR_PWM_5TO6(6);
1517 static DEVICE_ATTR(vrm, S_IRUGO | S_IWUSR, show_vrm, set_vrm);
1518 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1519 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); /* for ISA devices */
1521 #define SENSOR_DEV_ATTR_IN(ix) \
1522 &sensor_dev_attr_in##ix##_input.dev_attr.attr, \
1523 &sensor_dev_attr_in##ix##_min.dev_attr.attr, \
1524 &sensor_dev_attr_in##ix##_max.dev_attr.attr, \
1525 &sensor_dev_attr_in##ix##_alarm.dev_attr.attr
1527 /* These attributes are read-writeable only if the chip is *not* locked */
1528 #define SENSOR_DEV_ATTR_TEMP_LOCK(ix) \
1529 &sensor_dev_attr_temp##ix##_offset.dev_attr.attr
1531 #define SENSOR_DEV_ATTR_TEMP(ix) \
1532 SENSOR_DEV_ATTR_TEMP_LOCK(ix), \
1533 &sensor_dev_attr_temp##ix##_input.dev_attr.attr, \
1534 &sensor_dev_attr_temp##ix##_min.dev_attr.attr, \
1535 &sensor_dev_attr_temp##ix##_max.dev_attr.attr, \
1536 &sensor_dev_attr_temp##ix##_alarm.dev_attr.attr, \
1537 &sensor_dev_attr_temp##ix##_fault.dev_attr.attr
1539 /* These attributes are read-writeable only if the chip is *not* locked */
1540 #define SENSOR_DEV_ATTR_ZONE_LOCK(ix) \
1541 &sensor_dev_attr_zone##ix##_auto_point1_temp_hyst.dev_attr.attr, \
1542 &sensor_dev_attr_zone##ix##_auto_point1_temp.dev_attr.attr, \
1543 &sensor_dev_attr_zone##ix##_auto_point2_temp.dev_attr.attr, \
1544 &sensor_dev_attr_zone##ix##_auto_point3_temp.dev_attr.attr
1546 #define SENSOR_DEV_ATTR_ZONE(ix) \
1547 SENSOR_DEV_ATTR_ZONE_LOCK(ix), \
1548 &sensor_dev_attr_zone##ix##_auto_channels_temp.dev_attr.attr
1550 #define SENSOR_DEV_ATTR_FAN_1TO4(ix) \
1551 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1552 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1553 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1554 &sensor_dev_attr_fan##ix##_type.dev_attr.attr
1556 #define SENSOR_DEV_ATTR_FAN_5TO6(ix) \
1557 &sensor_dev_attr_fan##ix##_input.dev_attr.attr, \
1558 &sensor_dev_attr_fan##ix##_min.dev_attr.attr, \
1559 &sensor_dev_attr_fan##ix##_alarm.dev_attr.attr, \
1560 &sensor_dev_attr_fan##ix##_max.dev_attr.attr
1562 /* These attributes are read-writeable only if the chip is *not* locked */
1563 #define SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix) \
1564 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr, \
1565 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr, \
1566 &sensor_dev_attr_pwm##ix##_ramp_rate.dev_attr.attr, \
1567 &sensor_dev_attr_pwm##ix##_auto_channels_zone.dev_attr.attr, \
1568 &sensor_dev_attr_pwm##ix##_auto_pwm_min.dev_attr.attr, \
1569 &sensor_dev_attr_pwm##ix##_auto_point1_pwm.dev_attr.attr
1571 #define SENSOR_DEV_ATTR_PWM_1TO3(ix) \
1572 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(ix), \
1573 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1574 &sensor_dev_attr_pwm##ix##_auto_point2_pwm.dev_attr.attr
1576 /* These attributes are read-writeable only if the chip is *not* locked */
1577 #define SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix) \
1578 &sensor_dev_attr_pwm##ix.dev_attr.attr, \
1579 &sensor_dev_attr_pwm##ix##_freq.dev_attr.attr
1581 #define SENSOR_DEV_ATTR_PWM_5TO6(ix) \
1582 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(ix), \
1583 &sensor_dev_attr_pwm##ix##_enable.dev_attr.attr
1585 /* This struct holds all the attributes that are always present and need to be
1586 * created unconditionally. The attributes that need modification of their
1587 * permissions are created read-only and write permissions are added or removed
1588 * on the fly when required */
1589 static struct attribute *dme1737_attr[] ={
1591 SENSOR_DEV_ATTR_IN(0),
1592 SENSOR_DEV_ATTR_IN(1),
1593 SENSOR_DEV_ATTR_IN(2),
1594 SENSOR_DEV_ATTR_IN(3),
1595 SENSOR_DEV_ATTR_IN(4),
1596 SENSOR_DEV_ATTR_IN(5),
1597 SENSOR_DEV_ATTR_IN(6),
1599 SENSOR_DEV_ATTR_TEMP(1),
1600 SENSOR_DEV_ATTR_TEMP(2),
1601 SENSOR_DEV_ATTR_TEMP(3),
1603 SENSOR_DEV_ATTR_ZONE(1),
1604 SENSOR_DEV_ATTR_ZONE(2),
1605 SENSOR_DEV_ATTR_ZONE(3),
1608 &dev_attr_cpu0_vid.attr,
1612 static const struct attribute_group dme1737_group = {
1613 .attrs = dme1737_attr,
1616 /* The following structs hold the PWM attributes, some of which are optional.
1617 * Their creation depends on the chip configuration which is determined during
1619 static struct attribute *dme1737_attr_pwm1[] = {
1620 SENSOR_DEV_ATTR_PWM_1TO3(1),
1623 static struct attribute *dme1737_attr_pwm2[] = {
1624 SENSOR_DEV_ATTR_PWM_1TO3(2),
1627 static struct attribute *dme1737_attr_pwm3[] = {
1628 SENSOR_DEV_ATTR_PWM_1TO3(3),
1631 static struct attribute *dme1737_attr_pwm5[] = {
1632 SENSOR_DEV_ATTR_PWM_5TO6(5),
1635 static struct attribute *dme1737_attr_pwm6[] = {
1636 SENSOR_DEV_ATTR_PWM_5TO6(6),
1640 static const struct attribute_group dme1737_pwm_group[] = {
1641 { .attrs = dme1737_attr_pwm1 },
1642 { .attrs = dme1737_attr_pwm2 },
1643 { .attrs = dme1737_attr_pwm3 },
1645 { .attrs = dme1737_attr_pwm5 },
1646 { .attrs = dme1737_attr_pwm6 },
1649 /* The following structs hold the fan attributes, some of which are optional.
1650 * Their creation depends on the chip configuration which is determined during
1652 static struct attribute *dme1737_attr_fan1[] = {
1653 SENSOR_DEV_ATTR_FAN_1TO4(1),
1656 static struct attribute *dme1737_attr_fan2[] = {
1657 SENSOR_DEV_ATTR_FAN_1TO4(2),
1660 static struct attribute *dme1737_attr_fan3[] = {
1661 SENSOR_DEV_ATTR_FAN_1TO4(3),
1664 static struct attribute *dme1737_attr_fan4[] = {
1665 SENSOR_DEV_ATTR_FAN_1TO4(4),
1668 static struct attribute *dme1737_attr_fan5[] = {
1669 SENSOR_DEV_ATTR_FAN_5TO6(5),
1672 static struct attribute *dme1737_attr_fan6[] = {
1673 SENSOR_DEV_ATTR_FAN_5TO6(6),
1677 static const struct attribute_group dme1737_fan_group[] = {
1678 { .attrs = dme1737_attr_fan1 },
1679 { .attrs = dme1737_attr_fan2 },
1680 { .attrs = dme1737_attr_fan3 },
1681 { .attrs = dme1737_attr_fan4 },
1682 { .attrs = dme1737_attr_fan5 },
1683 { .attrs = dme1737_attr_fan6 },
1686 /* The permissions of all of the following attributes are changed to read-
1687 * writeable if the chip is *not* locked. Otherwise they stay read-only. */
1688 static struct attribute *dme1737_attr_lock[] = {
1690 SENSOR_DEV_ATTR_TEMP_LOCK(1),
1691 SENSOR_DEV_ATTR_TEMP_LOCK(2),
1692 SENSOR_DEV_ATTR_TEMP_LOCK(3),
1694 SENSOR_DEV_ATTR_ZONE_LOCK(1),
1695 SENSOR_DEV_ATTR_ZONE_LOCK(2),
1696 SENSOR_DEV_ATTR_ZONE_LOCK(3),
1700 static const struct attribute_group dme1737_lock_group = {
1701 .attrs = dme1737_attr_lock,
1704 /* The permissions of the following PWM attributes are changed to read-
1705 * writeable if the chip is *not* locked and the respective PWM is available.
1706 * Otherwise they stay read-only. */
1707 static struct attribute *dme1737_attr_pwm1_lock[] = {
1708 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(1),
1711 static struct attribute *dme1737_attr_pwm2_lock[] = {
1712 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(2),
1715 static struct attribute *dme1737_attr_pwm3_lock[] = {
1716 SENSOR_DEV_ATTR_PWM_1TO3_LOCK(3),
1719 static struct attribute *dme1737_attr_pwm5_lock[] = {
1720 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(5),
1723 static struct attribute *dme1737_attr_pwm6_lock[] = {
1724 SENSOR_DEV_ATTR_PWM_5TO6_LOCK(6),
1728 static const struct attribute_group dme1737_pwm_lock_group[] = {
1729 { .attrs = dme1737_attr_pwm1_lock },
1730 { .attrs = dme1737_attr_pwm2_lock },
1731 { .attrs = dme1737_attr_pwm3_lock },
1733 { .attrs = dme1737_attr_pwm5_lock },
1734 { .attrs = dme1737_attr_pwm6_lock },
1737 /* Pwm[1-3] are read-writeable if the associated pwm is in manual mode and the
1738 * chip is not locked. Otherwise they are read-only. */
1739 static struct attribute *dme1737_attr_pwm[] = {
1740 &sensor_dev_attr_pwm1.dev_attr.attr,
1741 &sensor_dev_attr_pwm2.dev_attr.attr,
1742 &sensor_dev_attr_pwm3.dev_attr.attr,
1745 /* ---------------------------------------------------------------------
1746 * Super-IO functions
1747 * --------------------------------------------------------------------- */
1749 static inline void dme1737_sio_enter(int sio_cip)
1751 outb(0x55, sio_cip);
1754 static inline void dme1737_sio_exit(int sio_cip)
1756 outb(0xaa, sio_cip);
1759 static inline int dme1737_sio_inb(int sio_cip, int reg)
1762 return inb(sio_cip + 1);
1765 static inline void dme1737_sio_outb(int sio_cip, int reg, int val)
1768 outb(val, sio_cip + 1);
1771 /* ---------------------------------------------------------------------
1772 * Device initialization
1773 * --------------------------------------------------------------------- */
1775 static int dme1737_i2c_get_features(int, struct dme1737_data*);
1777 static void dme1737_chmod_file(struct device *dev,
1778 struct attribute *attr, mode_t mode)
1780 if (sysfs_chmod_file(&dev->kobj, attr, mode)) {
1781 dev_warn(dev, "Failed to change permissions of %s.\n",
1786 static void dme1737_chmod_group(struct device *dev,
1787 const struct attribute_group *group,
1790 struct attribute **attr;
1792 for (attr = group->attrs; *attr; attr++) {
1793 dme1737_chmod_file(dev, *attr, mode);
1797 static void dme1737_remove_files(struct device *dev)
1799 struct dme1737_data *data = dev_get_drvdata(dev);
1802 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1803 if (data->has_fan & (1 << ix)) {
1804 sysfs_remove_group(&dev->kobj,
1805 &dme1737_fan_group[ix]);
1809 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1810 if (data->has_pwm & (1 << ix)) {
1811 sysfs_remove_group(&dev->kobj,
1812 &dme1737_pwm_group[ix]);
1816 sysfs_remove_group(&dev->kobj, &dme1737_group);
1818 if (!data->client.driver) {
1819 sysfs_remove_file(&dev->kobj, &dev_attr_name.attr);
1823 static int dme1737_create_files(struct device *dev)
1825 struct dme1737_data *data = dev_get_drvdata(dev);
1828 /* Create a name attribute for ISA devices */
1829 if (!data->client.driver &&
1830 (err = sysfs_create_file(&dev->kobj, &dev_attr_name.attr))) {
1834 /* Create standard sysfs attributes */
1835 if ((err = sysfs_create_group(&dev->kobj, &dme1737_group))) {
1839 /* Create fan sysfs attributes */
1840 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1841 if (data->has_fan & (1 << ix)) {
1842 if ((err = sysfs_create_group(&dev->kobj,
1843 &dme1737_fan_group[ix]))) {
1849 /* Create PWM sysfs attributes */
1850 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_group); ix++) {
1851 if (data->has_pwm & (1 << ix)) {
1852 if ((err = sysfs_create_group(&dev->kobj,
1853 &dme1737_pwm_group[ix]))) {
1859 /* Inform if the device is locked. Otherwise change the permissions of
1860 * selected attributes from read-only to read-writeable. */
1861 if (data->config & 0x02) {
1862 dev_info(dev, "Device is locked. Some attributes "
1863 "will be read-only.\n");
1865 /* Change permissions of standard attributes */
1866 dme1737_chmod_group(dev, &dme1737_lock_group,
1869 /* Change permissions of PWM attributes */
1870 for (ix = 0; ix < ARRAY_SIZE(dme1737_pwm_lock_group); ix++) {
1871 if (data->has_pwm & (1 << ix)) {
1872 dme1737_chmod_group(dev,
1873 &dme1737_pwm_lock_group[ix],
1878 /* Change permissions of pwm[1-3] if in manual mode */
1879 for (ix = 0; ix < 3; ix++) {
1880 if ((data->has_pwm & (1 << ix)) &&
1881 (PWM_EN_FROM_REG(data->pwm_config[ix]) == 1)) {
1882 dme1737_chmod_file(dev,
1883 dme1737_attr_pwm[ix],
1892 dme1737_remove_files(dev);
1897 static int dme1737_init_device(struct device *dev)
1899 struct dme1737_data *data = dev_get_drvdata(dev);
1900 struct i2c_client *client = &data->client;
1904 data->config = dme1737_read(client, DME1737_REG_CONFIG);
1905 /* Inform if part is not monitoring/started */
1906 if (!(data->config & 0x01)) {
1908 dev_err(dev, "Device is not monitoring. "
1909 "Use the force_start load parameter to "
1914 /* Force monitoring */
1915 data->config |= 0x01;
1916 dme1737_write(client, DME1737_REG_CONFIG, data->config);
1918 /* Inform if part is not ready */
1919 if (!(data->config & 0x04)) {
1920 dev_err(dev, "Device is not ready.\n");
1924 /* Determine which optional fan and pwm features are enabled/present */
1925 if (client->driver) { /* I2C chip */
1926 data->config2 = dme1737_read(client, DME1737_REG_CONFIG2);
1927 /* Check if optional fan3 input is enabled */
1928 if (data->config2 & 0x04) {
1929 data->has_fan |= (1 << 2);
1932 /* Fan4 and pwm3 are only available if the client's I2C address
1933 * is the default 0x2e. Otherwise the I/Os associated with
1934 * these functions are used for addr enable/select. */
1935 if (data->client.addr == 0x2e) {
1936 data->has_fan |= (1 << 3);
1937 data->has_pwm |= (1 << 2);
1940 /* Determine which of the optional fan[5-6] and pwm[5-6]
1941 * features are enabled. For this, we need to query the runtime
1942 * registers through the Super-IO LPC interface. Try both
1943 * config ports 0x2e and 0x4e. */
1944 if (dme1737_i2c_get_features(0x2e, data) &&
1945 dme1737_i2c_get_features(0x4e, data)) {
1946 dev_warn(dev, "Failed to query Super-IO for optional "
1949 } else { /* ISA chip */
1950 /* Fan3 and pwm3 are always available. Fan[4-5] and pwm[5-6]
1951 * don't exist in the ISA chip. */
1952 data->has_fan |= (1 << 2);
1953 data->has_pwm |= (1 << 2);
1956 /* Fan1, fan2, pwm1, and pwm2 are always present */
1957 data->has_fan |= 0x03;
1958 data->has_pwm |= 0x03;
1960 dev_info(dev, "Optional features: pwm3=%s, pwm5=%s, pwm6=%s, "
1961 "fan3=%s, fan4=%s, fan5=%s, fan6=%s.\n",
1962 (data->has_pwm & (1 << 2)) ? "yes" : "no",
1963 (data->has_pwm & (1 << 4)) ? "yes" : "no",
1964 (data->has_pwm & (1 << 5)) ? "yes" : "no",
1965 (data->has_fan & (1 << 2)) ? "yes" : "no",
1966 (data->has_fan & (1 << 3)) ? "yes" : "no",
1967 (data->has_fan & (1 << 4)) ? "yes" : "no",
1968 (data->has_fan & (1 << 5)) ? "yes" : "no");
1970 reg = dme1737_read(client, DME1737_REG_TACH_PWM);
1971 /* Inform if fan-to-pwm mapping differs from the default */
1972 if (client->driver && reg != 0xa4) { /* I2C chip */
1973 dev_warn(dev, "Non-standard fan to pwm mapping: "
1974 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d, "
1975 "fan4->pwm%d. Please report to the driver "
1977 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1978 ((reg >> 4) & 0x03) + 1, ((reg >> 6) & 0x03) + 1);
1979 } else if (!client->driver && reg != 0x24) { /* ISA chip */
1980 dev_warn(dev, "Non-standard fan to pwm mapping: "
1981 "fan1->pwm%d, fan2->pwm%d, fan3->pwm%d. "
1982 "Please report to the driver maintainer.\n",
1983 (reg & 0x03) + 1, ((reg >> 2) & 0x03) + 1,
1984 ((reg >> 4) & 0x03) + 1);
1987 /* Switch pwm[1-3] to manual mode if they are currently disabled and
1988 * set the duty-cycles to 0% (which is identical to the PWMs being
1990 if (!(data->config & 0x02)) {
1991 for (ix = 0; ix < 3; ix++) {
1992 data->pwm_config[ix] = dme1737_read(client,
1993 DME1737_REG_PWM_CONFIG(ix));
1994 if ((data->has_pwm & (1 << ix)) &&
1995 (PWM_EN_FROM_REG(data->pwm_config[ix]) == -1)) {
1996 dev_info(dev, "Switching pwm%d to "
1997 "manual mode.\n", ix + 1);
1998 data->pwm_config[ix] = PWM_EN_TO_REG(1,
1999 data->pwm_config[ix]);
2000 dme1737_write(client, DME1737_REG_PWM(ix), 0);
2001 dme1737_write(client,
2002 DME1737_REG_PWM_CONFIG(ix),
2003 data->pwm_config[ix]);
2008 /* Initialize the default PWM auto channels zone (acz) assignments */
2009 data->pwm_acz[0] = 1; /* pwm1 -> zone1 */
2010 data->pwm_acz[1] = 2; /* pwm2 -> zone2 */
2011 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2014 data->vrm = vid_which_vrm();
2019 /* ---------------------------------------------------------------------
2020 * I2C device detection and registration
2021 * --------------------------------------------------------------------- */
2023 static struct i2c_driver dme1737_i2c_driver;
2025 static int dme1737_i2c_get_features(int sio_cip, struct dme1737_data *data)
2030 dme1737_sio_enter(sio_cip);
2033 * The DME1737 can return either 0x78 or 0x77 as its device ID. */
2034 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2035 if (!(reg == 0x77 || reg == 0x78)) {
2040 /* Select logical device A (runtime registers) */
2041 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2043 /* Get the base address of the runtime registers */
2044 if (!(addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2045 dme1737_sio_inb(sio_cip, 0x61))) {
2050 /* Read the runtime registers to determine which optional features
2051 * are enabled and available. Bits [3:2] of registers 0x43-0x46 are set
2052 * to '10' if the respective feature is enabled. */
2053 if ((inb(addr + 0x43) & 0x0c) == 0x08) { /* fan6 */
2054 data->has_fan |= (1 << 5);
2056 if ((inb(addr + 0x44) & 0x0c) == 0x08) { /* pwm6 */
2057 data->has_pwm |= (1 << 5);
2059 if ((inb(addr + 0x45) & 0x0c) == 0x08) { /* fan5 */
2060 data->has_fan |= (1 << 4);
2062 if ((inb(addr + 0x46) & 0x0c) == 0x08) { /* pwm5 */
2063 data->has_pwm |= (1 << 4);
2067 dme1737_sio_exit(sio_cip);
2072 static int dme1737_i2c_detect(struct i2c_adapter *adapter, int address,
2075 u8 company, verstep = 0;
2076 struct i2c_client *client;
2077 struct dme1737_data *data;
2082 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
2086 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2091 client = &data->client;
2092 i2c_set_clientdata(client, data);
2093 client->addr = address;
2094 client->adapter = adapter;
2095 client->driver = &dme1737_i2c_driver;
2098 /* A negative kind means that the driver was loaded with no force
2099 * parameter (default), so we must identify the chip. */
2101 company = dme1737_read(client, DME1737_REG_COMPANY);
2102 verstep = dme1737_read(client, DME1737_REG_VERSTEP);
2104 if (!((company == DME1737_COMPANY_SMSC) &&
2105 ((verstep & DME1737_VERSTEP_MASK) == DME1737_VERSTEP))) {
2114 /* Fill in the remaining client fields and put it into the global
2116 strlcpy(client->name, name, I2C_NAME_SIZE);
2117 mutex_init(&data->update_lock);
2119 /* Tell the I2C layer a new client has arrived */
2120 if ((err = i2c_attach_client(client))) {
2124 dev_info(dev, "Found a DME1737 chip at 0x%02x (rev 0x%02x).\n",
2125 client->addr, verstep);
2127 /* Initialize the DME1737 chip */
2128 if ((err = dme1737_init_device(dev))) {
2129 dev_err(dev, "Failed to initialize device.\n");
2133 /* Create sysfs files */
2134 if ((err = dme1737_create_files(dev))) {
2135 dev_err(dev, "Failed to create sysfs files.\n");
2139 /* Register device */
2140 data->hwmon_dev = hwmon_device_register(dev);
2141 if (IS_ERR(data->hwmon_dev)) {
2142 dev_err(dev, "Failed to register device.\n");
2143 err = PTR_ERR(data->hwmon_dev);
2150 dme1737_remove_files(dev);
2152 i2c_detach_client(client);
2159 static int dme1737_i2c_attach_adapter(struct i2c_adapter *adapter)
2161 if (!(adapter->class & I2C_CLASS_HWMON)) {
2165 return i2c_probe(adapter, &addr_data, dme1737_i2c_detect);
2168 static int dme1737_i2c_detach_client(struct i2c_client *client)
2170 struct dme1737_data *data = i2c_get_clientdata(client);
2173 hwmon_device_unregister(data->hwmon_dev);
2174 dme1737_remove_files(&client->dev);
2176 if ((err = i2c_detach_client(client))) {
2184 static struct i2c_driver dme1737_i2c_driver = {
2188 .attach_adapter = dme1737_i2c_attach_adapter,
2189 .detach_client = dme1737_i2c_detach_client,
2192 /* ---------------------------------------------------------------------
2193 * ISA device detection and registration
2194 * --------------------------------------------------------------------- */
2196 static int __init dme1737_isa_detect(int sio_cip, unsigned short *addr)
2199 unsigned short base_addr;
2201 dme1737_sio_enter(sio_cip);
2204 * We currently know about SCH3112 (0x7c), SCH3114 (0x7d), and
2205 * SCH3116 (0x7f). */
2206 reg = force_id ? force_id : dme1737_sio_inb(sio_cip, 0x20);
2207 if (!(reg == 0x7c || reg == 0x7d || reg == 0x7f)) {
2212 /* Select logical device A (runtime registers) */
2213 dme1737_sio_outb(sio_cip, 0x07, 0x0a);
2215 /* Get the base address of the runtime registers */
2216 if (!(base_addr = (dme1737_sio_inb(sio_cip, 0x60) << 8) |
2217 dme1737_sio_inb(sio_cip, 0x61))) {
2218 printk(KERN_ERR "dme1737: Base address not set.\n");
2223 /* Access to the hwmon registers is through an index/data register
2224 * pair located at offset 0x70/0x71. */
2225 *addr = base_addr + 0x70;
2228 dme1737_sio_exit(sio_cip);
2232 static int __init dme1737_isa_device_add(unsigned short addr)
2234 struct resource res = {
2236 .end = addr + DME1737_EXTENT - 1,
2238 .flags = IORESOURCE_IO,
2242 err = acpi_check_resource_conflict(&res);
2246 if (!(pdev = platform_device_alloc("dme1737", addr))) {
2247 printk(KERN_ERR "dme1737: Failed to allocate device.\n");
2252 if ((err = platform_device_add_resources(pdev, &res, 1))) {
2253 printk(KERN_ERR "dme1737: Failed to add device resource "
2254 "(err = %d).\n", err);
2255 goto exit_device_put;
2258 if ((err = platform_device_add(pdev))) {
2259 printk(KERN_ERR "dme1737: Failed to add device (err = %d).\n",
2261 goto exit_device_put;
2267 platform_device_put(pdev);
2273 static int __devinit dme1737_isa_probe(struct platform_device *pdev)
2276 struct resource *res;
2277 struct i2c_client *client;
2278 struct dme1737_data *data;
2279 struct device *dev = &pdev->dev;
2282 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
2283 if (!request_region(res->start, DME1737_EXTENT, "dme1737")) {
2284 dev_err(dev, "Failed to request region 0x%04x-0x%04x.\n",
2285 (unsigned short)res->start,
2286 (unsigned short)res->start + DME1737_EXTENT - 1);
2291 if (!(data = kzalloc(sizeof(struct dme1737_data), GFP_KERNEL))) {
2293 goto exit_release_region;
2296 client = &data->client;
2297 i2c_set_clientdata(client, data);
2298 client->addr = res->start;
2299 platform_set_drvdata(pdev, data);
2301 company = dme1737_read(client, DME1737_REG_COMPANY);
2302 device = dme1737_read(client, DME1737_REG_DEVICE);
2304 if (!((company == DME1737_COMPANY_SMSC) &&
2305 (device == SCH311X_DEVICE))) {
2310 /* Fill in the remaining client fields and initialize the mutex */
2311 strlcpy(client->name, "sch311x", I2C_NAME_SIZE);
2312 mutex_init(&data->update_lock);
2314 dev_info(dev, "Found a SCH311x chip at 0x%04x\n", client->addr);
2316 /* Initialize the chip */
2317 if ((err = dme1737_init_device(dev))) {
2318 dev_err(dev, "Failed to initialize device.\n");
2322 /* Create sysfs files */
2323 if ((err = dme1737_create_files(dev))) {
2324 dev_err(dev, "Failed to create sysfs files.\n");
2328 /* Register device */
2329 data->hwmon_dev = hwmon_device_register(dev);
2330 if (IS_ERR(data->hwmon_dev)) {
2331 dev_err(dev, "Failed to register device.\n");
2332 err = PTR_ERR(data->hwmon_dev);
2333 goto exit_remove_files;
2339 dme1737_remove_files(dev);
2341 platform_set_drvdata(pdev, NULL);
2343 exit_release_region:
2344 release_region(res->start, DME1737_EXTENT);
2349 static int __devexit dme1737_isa_remove(struct platform_device *pdev)
2351 struct dme1737_data *data = platform_get_drvdata(pdev);
2353 hwmon_device_unregister(data->hwmon_dev);
2354 dme1737_remove_files(&pdev->dev);
2355 release_region(data->client.addr, DME1737_EXTENT);
2356 platform_set_drvdata(pdev, NULL);
2362 static struct platform_driver dme1737_isa_driver = {
2364 .owner = THIS_MODULE,
2367 .probe = dme1737_isa_probe,
2368 .remove = __devexit_p(dme1737_isa_remove),
2371 /* ---------------------------------------------------------------------
2372 * Module initialization and cleanup
2373 * --------------------------------------------------------------------- */
2375 static int __init dme1737_init(void)
2378 unsigned short addr;
2380 if ((err = i2c_add_driver(&dme1737_i2c_driver))) {
2384 if (dme1737_isa_detect(0x2e, &addr) &&
2385 dme1737_isa_detect(0x4e, &addr)) {
2386 /* Return 0 if we didn't find an ISA device */
2390 if ((err = platform_driver_register(&dme1737_isa_driver))) {
2391 goto exit_del_i2c_driver;
2394 /* Sets global pdev as a side effect */
2395 if ((err = dme1737_isa_device_add(addr))) {
2396 goto exit_del_isa_driver;
2401 exit_del_isa_driver:
2402 platform_driver_unregister(&dme1737_isa_driver);
2403 exit_del_i2c_driver:
2404 i2c_del_driver(&dme1737_i2c_driver);
2409 static void __exit dme1737_exit(void)
2412 platform_device_unregister(pdev);
2413 platform_driver_unregister(&dme1737_isa_driver);
2416 i2c_del_driver(&dme1737_i2c_driver);
2419 MODULE_AUTHOR("Juerg Haefliger <juergh@gmail.com>");
2420 MODULE_DESCRIPTION("DME1737 sensors");
2421 MODULE_LICENSE("GPL");
2423 module_init(dme1737_init);
2424 module_exit(dme1737_exit);