arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 #define KVM_NR_SHARED_MSRS 16
 100
 101 struct kvm_shared_msrs_global {
 102         int nr;
 103         u32 msrs[KVM_NR_SHARED_MSRS];
 104 };
 105
 106 struct kvm_shared_msrs {
 107         struct user_return_notifier urn;
 108         bool registered;
 109         struct kvm_shared_msr_values {
 110                 u64 host;
 111                 u64 curr;
 112         } values[KVM_NR_SHARED_MSRS];
 113 };
 114
 115 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 116 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 117
 118 struct kvm_stats_debugfs_item debugfs_entries[] = {
 119         { "pf_fixed", VCPU_STAT(pf_fixed) },
 120         { "pf_guest", VCPU_STAT(pf_guest) },
 121         { "tlb_flush", VCPU_STAT(tlb_flush) },
 122         { "invlpg", VCPU_STAT(invlpg) },
 123         { "exits", VCPU_STAT(exits) },
 124         { "io_exits", VCPU_STAT(io_exits) },
 125         { "mmio_exits", VCPU_STAT(mmio_exits) },
 126         { "signal_exits", VCPU_STAT(signal_exits) },
 127         { "irq_window", VCPU_STAT(irq_window_exits) },
 128         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 129         { "halt_exits", VCPU_STAT(halt_exits) },
 130         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 131         { "hypercalls", VCPU_STAT(hypercalls) },
 132         { "request_irq", VCPU_STAT(request_irq_exits) },
 133         { "irq_exits", VCPU_STAT(irq_exits) },
 134         { "host_state_reload", VCPU_STAT(host_state_reload) },
 135         { "efer_reload", VCPU_STAT(efer_reload) },
 136         { "fpu_reload", VCPU_STAT(fpu_reload) },
 137         { "insn_emulation", VCPU_STAT(insn_emulation) },
 138         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 139         { "irq_injections", VCPU_STAT(irq_injections) },
 140         { "nmi_injections", VCPU_STAT(nmi_injections) },
 141         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 142         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 143         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 144         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 145         { "mmu_flooded", VM_STAT(mmu_flooded) },
 146         { "mmu_recycled", VM_STAT(mmu_recycled) },
 147         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 148         { "mmu_unsync", VM_STAT(mmu_unsync) },
 149         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 150         { "largepages", VM_STAT(lpages) },
 151         { NULL }
 152 };
 153
 154 u64 __read_mostly host_xcr0;
 155
 156 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 157
 158 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 159 {
 160         int i;
 161         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 162                 vcpu->arch.apf.gfns[i] = ~0;
 163 }
 164
 165 static void kvm_on_user_return(struct user_return_notifier *urn)
 166 {
 167         unsigned slot;
 168         struct kvm_shared_msrs *locals
 169                 = container_of(urn, struct kvm_shared_msrs, urn);
 170         struct kvm_shared_msr_values *values;
 171
 172         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 173                 values = &locals->values[slot];
 174                 if (values->host != values->curr) {
 175                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 176                         values->curr = values->host;
 177                 }
 178         }
 179         locals->registered = false;
 180         user_return_notifier_unregister(urn);
 181 }
 182
 183 static void shared_msr_update(unsigned slot, u32 msr)
 184 {
 185         struct kvm_shared_msrs *smsr;
 186         u64 value;
 187
 188         smsr = &__get_cpu_var(shared_msrs);
 189         /* only read, and nobody should modify it at this time,
 190          * so don't need lock */
 191         if (slot >= shared_msrs_global.nr) {
 192                 printk(KERN_ERR "kvm: invalid MSR slot!");
 193                 return;
 194         }
 195         rdmsrl_safe(msr, &value);
 196         smsr->values[slot].host = value;
 197         smsr->values[slot].curr = value;
 198 }
 199
 200 void kvm_define_shared_msr(unsigned slot, u32 msr)
 201 {
 202         if (slot >= shared_msrs_global.nr)
 203                 shared_msrs_global.nr = slot + 1;
 204         shared_msrs_global.msrs[slot] = msr;
 205         /* we need ensured the shared_msr_global have been updated */
 206         smp_wmb();
 207 }
 208 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 209
 210 static void kvm_shared_msr_cpu_online(void)
 211 {
 212         unsigned i;
 213
 214         for (i = 0; i < shared_msrs_global.nr; ++i)
 215                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 216 }
 217
 218 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 219 {
 220         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 221
 222         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 223                 return;
 224         smsr->values[slot].curr = value;
 225         wrmsrl(shared_msrs_global.msrs[slot], value);
 226         if (!smsr->registered) {
 227                 smsr->urn.on_user_return = kvm_on_user_return;
 228                 user_return_notifier_register(&smsr->urn);
 229                 smsr->registered = true;
 230         }
 231 }
 232 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 233
 234 static void drop_user_return_notifiers(void *ignore)
 235 {
 236         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 237
 238         if (smsr->registered)
 239                 kvm_on_user_return(&smsr->urn);
 240 }
 241
 242 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 243 {
 244         if (irqchip_in_kernel(vcpu->kvm))
 245                 return vcpu->arch.apic_base;
 246         else
 247                 return vcpu->arch.apic_base;
 248 }
 249 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 250
 251 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 252 {
 253         /* TODO: reserve bits check */
 254         if (irqchip_in_kernel(vcpu->kvm))
 255                 kvm_lapic_set_base(vcpu, data);
 256         else
 257                 vcpu->arch.apic_base = data;
 258 }
 259 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 260
 261 #define EXCPT_BENIGN            0
 262 #define EXCPT_CONTRIBUTORY      1
 263 #define EXCPT_PF                2
 264
 265 static int exception_class(int vector)
 266 {
 267         switch (vector) {
 268         case PF_VECTOR:
 269                 return EXCPT_PF;
 270         case DE_VECTOR:
 271         case TS_VECTOR:
 272         case NP_VECTOR:
 273         case SS_VECTOR:
 274         case GP_VECTOR:
 275                 return EXCPT_CONTRIBUTORY;
 276         default:
 277                 break;
 278         }
 279         return EXCPT_BENIGN;
 280 }
 281
 282 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 283                 unsigned nr, bool has_error, u32 error_code,
 284                 bool reinject)
 285 {
 286         u32 prev_nr;
 287         int class1, class2;
 288
 289         kvm_make_request(KVM_REQ_EVENT, vcpu);
 290
 291         if (!vcpu->arch.exception.pending) {
 292         queue:
 293                 vcpu->arch.exception.pending = true;
 294                 vcpu->arch.exception.has_error_code = has_error;
 295                 vcpu->arch.exception.nr = nr;
 296                 vcpu->arch.exception.error_code = error_code;
 297                 vcpu->arch.exception.reinject = reinject;
 298                 return;
 299         }
 300
 301         /* to check exception */
 302         prev_nr = vcpu->arch.exception.nr;
 303         if (prev_nr == DF_VECTOR) {
 304                 /* triple fault -> shutdown */
 305                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 306                 return;
 307         }
 308         class1 = exception_class(prev_nr);
 309         class2 = exception_class(nr);
 310         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 311                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 312                 /* generate double fault per SDM Table 5-5 */
 313                 vcpu->arch.exception.pending = true;
 314                 vcpu->arch.exception.has_error_code = true;
 315                 vcpu->arch.exception.nr = DF_VECTOR;
 316                 vcpu->arch.exception.error_code = 0;
 317         } else
 318                 /* replace previous exception with a new one in a hope
 319                    that instruction re-execution will regenerate lost
 320                    exception */
 321                 goto queue;
 322 }
 323
 324 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 325 {
 326         kvm_multiple_exception(vcpu, nr, false, 0, false);
 327 }
 328 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 329
 330 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 331 {
 332         kvm_multiple_exception(vcpu, nr, false, 0, true);
 333 }
 334 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 335
 336 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 337 {
 338         if (err)
 339                 kvm_inject_gp(vcpu, 0);
 340         else
 341                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 342 }
 343 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 344
 345 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 346 {
 347         ++vcpu->stat.pf_guest;
 348         vcpu->arch.cr2 = fault->address;
 349         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 350 }
 351 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 352
 353 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 354 {
 355         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 356                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 357         else
 358                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 359 }
 360
 361 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 362 {
 363         atomic_inc(&vcpu->arch.nmi_queued);
 364         kvm_make_request(KVM_REQ_NMI, vcpu);
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 367
 368 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 369 {
 370         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 371 }
 372 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 373
 374 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 375 {
 376         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 377 }
 378 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 379
 380 /*
 381  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 382  * a #GP and return false.
 383  */
 384 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 385 {
 386         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 387                 return true;
 388         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 389         return false;
 390 }
 391 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 392
 393 /*
 394  * This function will be used to read from the physical memory of the currently
 395  * running guest. The difference to kvm_read_guest_page is that this function
 396  * can read from guest physical or from the guest's guest physical memory.
 397  */
 398 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 399                             gfn_t ngfn, void *data, int offset, int len,
 400                             u32 access)
 401 {
 402         gfn_t real_gfn;
 403         gpa_t ngpa;
 404
 405         ngpa     = gfn_to_gpa(ngfn);
 406         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 407         if (real_gfn == UNMAPPED_GVA)
 408                 return -EFAULT;
 409
 410         real_gfn = gpa_to_gfn(real_gfn);
 411
 412         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 413 }
 414 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 415
 416 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 417                                void *data, int offset, int len, u32 access)
 418 {
 419         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 420                                        data, offset, len, access);
 421 }
 422
 423 /*
 424  * Load the pae pdptrs.  Return true is they are all valid.
 425  */
 426 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 427 {
 428         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 429         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 430         int i;
 431         int ret;
 432         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 433
 434         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 435                                       offset * sizeof(u64), sizeof(pdpte),
 436                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 437         if (ret < 0) {
 438                 ret = 0;
 439                 goto out;
 440         }
 441         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 442                 if (is_present_gpte(pdpte[i]) &&
 443                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 444                         ret = 0;
 445                         goto out;
 446                 }
 447         }
 448         ret = 1;
 449
 450         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_avail);
 453         __set_bit(VCPU_EXREG_PDPTR,
 454                   (unsigned long *)&vcpu->arch.regs_dirty);
 455 out:
 456
 457         return ret;
 458 }
 459 EXPORT_SYMBOL_GPL(load_pdptrs);
 460
 461 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 462 {
 463         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 464         bool changed = true;
 465         int offset;
 466         gfn_t gfn;
 467         int r;
 468
 469         if (is_long_mode(vcpu) || !is_pae(vcpu))
 470                 return false;
 471
 472         if (!test_bit(VCPU_EXREG_PDPTR,
 473                       (unsigned long *)&vcpu->arch.regs_avail))
 474                 return true;
 475
 476         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 477         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 478         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 479                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 480         if (r < 0)
 481                 goto out;
 482         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 483 out:
 484
 485         return changed;
 486 }
 487
 488 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 489 {
 490         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 491         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 492                                     X86_CR0_CD | X86_CR0_NW;
 493
 494         cr0 |= X86_CR0_ET;
 495
 496 #ifdef CONFIG_X86_64
 497         if (cr0 & 0xffffffff00000000UL)
 498                 return 1;
 499 #endif
 500
 501         cr0 &= ~CR0_RESERVED_BITS;
 502
 503         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 504                 return 1;
 505
 506         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 507                 return 1;
 508
 509         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 510 #ifdef CONFIG_X86_64
 511                 if ((vcpu->arch.efer & EFER_LME)) {
 512                         int cs_db, cs_l;
 513
 514                         if (!is_pae(vcpu))
 515                                 return 1;
 516                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 517                         if (cs_l)
 518                                 return 1;
 519                 } else
 520 #endif
 521                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 522                                                  kvm_read_cr3(vcpu)))
 523                         return 1;
 524         }
 525
 526         kvm_x86_ops->set_cr0(vcpu, cr0);
 527
 528         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 529                 kvm_clear_async_pf_completion_queue(vcpu);
 530                 kvm_async_pf_hash_reset(vcpu);
 531         }
 532
 533         if ((cr0 ^ old_cr0) & update_bits)
 534                 kvm_mmu_reset_context(vcpu);
 535         return 0;
 536 }
 537 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 538
 539 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 540 {
 541         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 542 }
 543 EXPORT_SYMBOL_GPL(kvm_lmsw);
 544
 545 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 546 {
 547         u64 xcr0;
 548
 549         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 550         if (index != XCR_XFEATURE_ENABLED_MASK)
 551                 return 1;
 552         xcr0 = xcr;
 553         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 554                 return 1;
 555         if (!(xcr0 & XSTATE_FP))
 556                 return 1;
 557         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 558                 return 1;
 559         if (xcr0 & ~host_xcr0)
 560                 return 1;
 561         vcpu->arch.xcr0 = xcr0;
 562         vcpu->guest_xcr0_loaded = 0;
 563         return 0;
 564 }
 565
 566 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 567 {
 568         if (__kvm_set_xcr(vcpu, index, xcr)) {
 569                 kvm_inject_gp(vcpu, 0);
 570                 return 1;
 571         }
 572         return 0;
 573 }
 574 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 575
 576 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 577 {
 578         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 579         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 580                                    X86_CR4_PAE | X86_CR4_SMEP;
 581         if (cr4 & CR4_RESERVED_BITS)
 582                 return 1;
 583
 584         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 585                 return 1;
 586
 587         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 588                 return 1;
 589
 590         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 591                 return 1;
 592
 593         if (is_long_mode(vcpu)) {
 594                 if (!(cr4 & X86_CR4_PAE))
 595                         return 1;
 596         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 597                    && ((cr4 ^ old_cr4) & pdptr_bits)
 598                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 599                                    kvm_read_cr3(vcpu)))
 600                 return 1;
 601
 602         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 603                 return 1;
 604
 605         if ((cr4 ^ old_cr4) & pdptr_bits)
 606                 kvm_mmu_reset_context(vcpu);
 607
 608         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 609                 kvm_update_cpuid(vcpu);
 610
 611         return 0;
 612 }
 613 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 614
 615 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 616 {
 617         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 618                 kvm_mmu_sync_roots(vcpu);
 619                 kvm_mmu_flush_tlb(vcpu);
 620                 return 0;
 621         }
 622
 623         if (is_long_mode(vcpu)) {
 624                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 625                         return 1;
 626         } else {
 627                 if (is_pae(vcpu)) {
 628                         if (cr3 & CR3_PAE_RESERVED_BITS)
 629                                 return 1;
 630                         if (is_paging(vcpu) &&
 631                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 632                                 return 1;
 633                 }
 634                 /*
 635                  * We don't check reserved bits in nonpae mode, because
 636                  * this isn't enforced, and VMware depends on this.
 637                  */
 638         }
 639
 640         /*
 641          * Does the new cr3 value map to physical memory? (Note, we
 642          * catch an invalid cr3 even in real-mode, because it would
 643          * cause trouble later on when we turn on paging anyway.)
 644          *
 645          * A real CPU would silently accept an invalid cr3 and would
 646          * attempt to use it - with largely undefined (and often hard
 647          * to debug) behavior on the guest side.
 648          */
 649         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 650                 return 1;
 651         vcpu->arch.cr3 = cr3;
 652         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 653         vcpu->arch.mmu.new_cr3(vcpu);
 654         return 0;
 655 }
 656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 657
 658 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 659 {
 660         if (cr8 & CR8_RESERVED_BITS)
 661                 return 1;
 662         if (irqchip_in_kernel(vcpu->kvm))
 663                 kvm_lapic_set_tpr(vcpu, cr8);
 664         else
 665                 vcpu->arch.cr8 = cr8;
 666         return 0;
 667 }
 668 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 669
 670 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 671 {
 672         if (irqchip_in_kernel(vcpu->kvm))
 673                 return kvm_lapic_get_cr8(vcpu);
 674         else
 675                 return vcpu->arch.cr8;
 676 }
 677 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 678
 679 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 680 {
 681         switch (dr) {
 682         case 0 ... 3:
 683                 vcpu->arch.db[dr] = val;
 684                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 685                         vcpu->arch.eff_db[dr] = val;
 686                 break;
 687         case 4:
 688                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 689                         return 1; /* #UD */
 690                 /* fall through */
 691         case 6:
 692                 if (val & 0xffffffff00000000ULL)
 693                         return -1; /* #GP */
 694                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 695                 break;
 696         case 5:
 697                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 698                         return 1; /* #UD */
 699                 /* fall through */
 700         default: /* 7 */
 701                 if (val & 0xffffffff00000000ULL)
 702                         return -1; /* #GP */
 703                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 704                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 705                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 706                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 707                 }
 708                 break;
 709         }
 710
 711         return 0;
 712 }
 713
 714 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 715 {
 716         int res;
 717
 718         res = __kvm_set_dr(vcpu, dr, val);
 719         if (res > 0)
 720                 kvm_queue_exception(vcpu, UD_VECTOR);
 721         else if (res < 0)
 722                 kvm_inject_gp(vcpu, 0);
 723
 724         return res;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_set_dr);
 727
 728 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 729 {
 730         switch (dr) {
 731         case 0 ... 3:
 732                 *val = vcpu->arch.db[dr];
 733                 break;
 734         case 4:
 735                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 736                         return 1;
 737                 /* fall through */
 738         case 6:
 739                 *val = vcpu->arch.dr6;
 740                 break;
 741         case 5:
 742                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 743                         return 1;
 744                 /* fall through */
 745         default: /* 7 */
 746                 *val = vcpu->arch.dr7;
 747                 break;
 748         }
 749
 750         return 0;
 751 }
 752
 753 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 754 {
 755         if (_kvm_get_dr(vcpu, dr, val)) {
 756                 kvm_queue_exception(vcpu, UD_VECTOR);
 757                 return 1;
 758         }
 759         return 0;
 760 }
 761 EXPORT_SYMBOL_GPL(kvm_get_dr);
 762
 763 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 764 {
 765         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 766         u64 data;
 767         int err;
 768
 769         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 770         if (err)
 771                 return err;
 772         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 773         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 774         return err;
 775 }
 776 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 777
 778 /*
 779  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 780  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 781  *
 782  * This list is modified at module load time to reflect the
 783  * capabilities of the host cpu. This capabilities test skips MSRs that are
 784  * kvm-specific. Those are put in the beginning of the list.
 785  */
 786
 787 #define KVM_SAVE_MSRS_BEGIN     9
 788 static u32 msrs_to_save[] = {
 789         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 790         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 791         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 792         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 793         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 794         MSR_STAR,
 795 #ifdef CONFIG_X86_64
 796         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 797 #endif
 798         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 799 };
 800
 801 static unsigned num_msrs_to_save;
 802
 803 static u32 emulated_msrs[] = {
 804         MSR_IA32_TSCDEADLINE,
 805         MSR_IA32_MISC_ENABLE,
 806         MSR_IA32_MCG_STATUS,
 807         MSR_IA32_MCG_CTL,
 808 };
 809
 810 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 811 {
 812         u64 old_efer = vcpu->arch.efer;
 813
 814         if (efer & efer_reserved_bits)
 815                 return 1;
 816
 817         if (is_paging(vcpu)
 818             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 819                 return 1;
 820
 821         if (efer & EFER_FFXSR) {
 822                 struct kvm_cpuid_entry2 *feat;
 823
 824                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 825                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 826                         return 1;
 827         }
 828
 829         if (efer & EFER_SVME) {
 830                 struct kvm_cpuid_entry2 *feat;
 831
 832                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 833                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 834                         return 1;
 835         }
 836
 837         efer &= ~EFER_LMA;
 838         efer |= vcpu->arch.efer & EFER_LMA;
 839
 840         kvm_x86_ops->set_efer(vcpu, efer);
 841
 842         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 843
 844         /* Update reserved bits */
 845         if ((efer ^ old_efer) & EFER_NX)
 846                 kvm_mmu_reset_context(vcpu);
 847
 848         return 0;
 849 }
 850
 851 void kvm_enable_efer_bits(u64 mask)
 852 {
 853        efer_reserved_bits &= ~mask;
 854 }
 855 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 856
 857
 858 /*
 859  * Writes msr value into into the appropriate "register".
 860  * Returns 0 on success, non-0 otherwise.
 861  * Assumes vcpu_load() was already called.
 862  */
 863 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 864 {
 865         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 866 }
 867
 868 /*
 869  * Adapt set_msr() to msr_io()'s calling convention
 870  */
 871 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 872 {
 873         return kvm_set_msr(vcpu, index, *data);
 874 }
 875
 876 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 877 {
 878         int version;
 879         int r;
 880         struct pvclock_wall_clock wc;
 881         struct timespec boot;
 882
 883         if (!wall_clock)
 884                 return;
 885
 886         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 887         if (r)
 888                 return;
 889
 890         if (version & 1)
 891                 ++version;  /* first time write, random junk */
 892
 893         ++version;
 894
 895         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 896
 897         /*
 898          * The guest calculates current wall clock time by adding
 899          * system time (updated by kvm_guest_time_update below) to the
 900          * wall clock specified here.  guest system time equals host
 901          * system time for us, thus we must fill in host boot time here.
 902          */
 903         getboottime(&boot);
 904
 905         wc.sec = boot.tv_sec;
 906         wc.nsec = boot.tv_nsec;
 907         wc.version = version;
 908
 909         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 910
 911         version++;
 912         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 913 }
 914
 915 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 916 {
 917         uint32_t quotient, remainder;
 918
 919         /* Don't try to replace with do_div(), this one calculates
 920          * "(dividend << 32) / divisor" */
 921         __asm__ ( "divl %4"
 922                   : "=a" (quotient), "=d" (remainder)
 923                   : "0" (0), "1" (dividend), "r" (divisor) );
 924         return quotient;
 925 }
 926
 927 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 928                                s8 *pshift, u32 *pmultiplier)
 929 {
 930         uint64_t scaled64;
 931         int32_t  shift = 0;
 932         uint64_t tps64;
 933         uint32_t tps32;
 934
 935         tps64 = base_khz * 1000LL;
 936         scaled64 = scaled_khz * 1000LL;
 937         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 938                 tps64 >>= 1;
 939                 shift--;
 940         }
 941
 942         tps32 = (uint32_t)tps64;
 943         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 944                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 945                         scaled64 >>= 1;
 946                 else
 947                         tps32 <<= 1;
 948                 shift++;
 949         }
 950
 951         *pshift = shift;
 952         *pmultiplier = div_frac(scaled64, tps32);
 953
 954         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 955                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 956 }
 957
 958 static inline u64 get_kernel_ns(void)
 959 {
 960         struct timespec ts;
 961
 962         WARN_ON(preemptible());
 963         ktime_get_ts(&ts);
 964         monotonic_to_bootbased(&ts);
 965         return timespec_to_ns(&ts);
 966 }
 967
 968 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 969 unsigned long max_tsc_khz;
 970
 971 static inline int kvm_tsc_changes_freq(void)
 972 {
 973         int cpu = get_cpu();
 974         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 975                   cpufreq_quick_get(cpu) != 0;
 976         put_cpu();
 977         return ret;
 978 }
 979
 980 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 981 {
 982         if (vcpu->arch.virtual_tsc_khz)
 983                 return vcpu->arch.virtual_tsc_khz;
 984         else
 985                 return __this_cpu_read(cpu_tsc_khz);
 986 }
 987
 988 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 989 {
 990         u64 ret;
 991
 992         WARN_ON(preemptible());
 993         if (kvm_tsc_changes_freq())
 994                 printk_once(KERN_WARNING
 995                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 996         ret = nsec * vcpu_tsc_khz(vcpu);
 997         do_div(ret, USEC_PER_SEC);
 998         return ret;
 999 }
1000
1001 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1002 {
1003         /* Compute a scale to convert nanoseconds in TSC cycles */
1004         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1005                            &vcpu->arch.tsc_catchup_shift,
1006                            &vcpu->arch.tsc_catchup_mult);
1007 }
1008
1009 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1010 {
1011         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1012                                       vcpu->arch.tsc_catchup_mult,
1013                                       vcpu->arch.tsc_catchup_shift);
1014         tsc += vcpu->arch.last_tsc_write;
1015         return tsc;
1016 }
1017
1018 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1019 {
1020         struct kvm *kvm = vcpu->kvm;
1021         u64 offset, ns, elapsed;
1022         unsigned long flags;
1023         s64 sdiff;
1024
1025         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1026         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1027         ns = get_kernel_ns();
1028         elapsed = ns - kvm->arch.last_tsc_nsec;
1029         sdiff = data - kvm->arch.last_tsc_write;
1030         if (sdiff < 0)
1031                 sdiff = -sdiff;
1032
1033         /*
1034          * Special case: close write to TSC within 5 seconds of
1035          * another CPU is interpreted as an attempt to synchronize
1036          * The 5 seconds is to accommodate host load / swapping as
1037          * well as any reset of TSC during the boot process.
1038          *
1039          * In that case, for a reliable TSC, we can match TSC offsets,
1040          * or make a best guest using elapsed value.
1041          */
1042         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1043             elapsed < 5ULL * NSEC_PER_SEC) {
1044                 if (!check_tsc_unstable()) {
1045                         offset = kvm->arch.last_tsc_offset;
1046                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1047                 } else {
1048                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1049                         offset += delta;
1050                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1051                 }
1052                 ns = kvm->arch.last_tsc_nsec;
1053         }
1054         kvm->arch.last_tsc_nsec = ns;
1055         kvm->arch.last_tsc_write = data;
1056         kvm->arch.last_tsc_offset = offset;
1057         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1058         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1059
1060         /* Reset of TSC must disable overshoot protection below */
1061         vcpu->arch.hv_clock.tsc_timestamp = 0;
1062         vcpu->arch.last_tsc_write = data;
1063         vcpu->arch.last_tsc_nsec = ns;
1064 }
1065 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1066
1067 static int kvm_guest_time_update(struct kvm_vcpu *v)
1068 {
1069         unsigned long flags;
1070         struct kvm_vcpu_arch *vcpu = &v->arch;
1071         void *shared_kaddr;
1072         unsigned long this_tsc_khz;
1073         s64 kernel_ns, max_kernel_ns;
1074         u64 tsc_timestamp;
1075
1076         /* Keep irq disabled to prevent changes to the clock */
1077         local_irq_save(flags);
1078         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1079         kernel_ns = get_kernel_ns();
1080         this_tsc_khz = vcpu_tsc_khz(v);
1081         if (unlikely(this_tsc_khz == 0)) {
1082                 local_irq_restore(flags);
1083                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1084                 return 1;
1085         }
1086
1087         /*
1088          * We may have to catch up the TSC to match elapsed wall clock
1089          * time for two reasons, even if kvmclock is used.
1090          *   1) CPU could have been running below the maximum TSC rate
1091          *   2) Broken TSC compensation resets the base at each VCPU
1092          *      entry to avoid unknown leaps of TSC even when running
1093          *      again on the same CPU.  This may cause apparent elapsed
1094          *      time to disappear, and the guest to stand still or run
1095          *      very slowly.
1096          */
1097         if (vcpu->tsc_catchup) {
1098                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1099                 if (tsc > tsc_timestamp) {
1100                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1101                         tsc_timestamp = tsc;
1102                 }
1103         }
1104
1105         local_irq_restore(flags);
1106
1107         if (!vcpu->time_page)
1108                 return 0;
1109
1110         /*
1111          * Time as measured by the TSC may go backwards when resetting the base
1112          * tsc_timestamp.  The reason for this is that the TSC resolution is
1113          * higher than the resolution of the other clock scales.  Thus, many
1114          * possible measurments of the TSC correspond to one measurement of any
1115          * other clock, and so a spread of values is possible.  This is not a
1116          * problem for the computation of the nanosecond clock; with TSC rates
1117          * around 1GHZ, there can only be a few cycles which correspond to one
1118          * nanosecond value, and any path through this code will inevitably
1119          * take longer than that.  However, with the kernel_ns value itself,
1120          * the precision may be much lower, down to HZ granularity.  If the
1121          * first sampling of TSC against kernel_ns ends in the low part of the
1122          * range, and the second in the high end of the range, we can get:
1123          *
1124          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1125          *
1126          * As the sampling errors potentially range in the thousands of cycles,
1127          * it is possible such a time value has already been observed by the
1128          * guest.  To protect against this, we must compute the system time as
1129          * observed by the guest and ensure the new system time is greater.
1130          */
1131         max_kernel_ns = 0;
1132         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1133                 max_kernel_ns = vcpu->last_guest_tsc -
1134                                 vcpu->hv_clock.tsc_timestamp;
1135                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1136                                     vcpu->hv_clock.tsc_to_system_mul,
1137                                     vcpu->hv_clock.tsc_shift);
1138                 max_kernel_ns += vcpu->last_kernel_ns;
1139         }
1140
1141         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1142                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1143                                    &vcpu->hv_clock.tsc_shift,
1144                                    &vcpu->hv_clock.tsc_to_system_mul);
1145                 vcpu->hw_tsc_khz = this_tsc_khz;
1146         }
1147
1148         if (max_kernel_ns > kernel_ns)
1149                 kernel_ns = max_kernel_ns;
1150
1151         /* With all the info we got, fill in the values */
1152         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1153         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1154         vcpu->last_kernel_ns = kernel_ns;
1155         vcpu->last_guest_tsc = tsc_timestamp;
1156         vcpu->hv_clock.flags = 0;
1157
1158         /*
1159          * The interface expects us to write an even number signaling that the
1160          * update is finished. Since the guest won't see the intermediate
1161          * state, we just increase by 2 at the end.
1162          */
1163         vcpu->hv_clock.version += 2;
1164
1165         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1166
1167         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1168                sizeof(vcpu->hv_clock));
1169
1170         kunmap_atomic(shared_kaddr, KM_USER0);
1171
1172         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1173         return 0;
1174 }
1175
1176 static bool msr_mtrr_valid(unsigned msr)
1177 {
1178         switch (msr) {
1179         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1180         case MSR_MTRRfix64K_00000:
1181         case MSR_MTRRfix16K_80000:
1182         case MSR_MTRRfix16K_A0000:
1183         case MSR_MTRRfix4K_C0000:
1184         case MSR_MTRRfix4K_C8000:
1185         case MSR_MTRRfix4K_D0000:
1186         case MSR_MTRRfix4K_D8000:
1187         case MSR_MTRRfix4K_E0000:
1188         case MSR_MTRRfix4K_E8000:
1189         case MSR_MTRRfix4K_F0000:
1190         case MSR_MTRRfix4K_F8000:
1191         case MSR_MTRRdefType:
1192         case MSR_IA32_CR_PAT:
1193                 return true;
1194         case 0x2f8:
1195                 return true;
1196         }
1197         return false;
1198 }
1199
1200 static bool valid_pat_type(unsigned t)
1201 {
1202         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1203 }
1204
1205 static bool valid_mtrr_type(unsigned t)
1206 {
1207         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1208 }
1209
1210 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1211 {
1212         int i;
1213
1214         if (!msr_mtrr_valid(msr))
1215                 return false;
1216
1217         if (msr == MSR_IA32_CR_PAT) {
1218                 for (i = 0; i < 8; i++)
1219                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1220                                 return false;
1221                 return true;
1222         } else if (msr == MSR_MTRRdefType) {
1223                 if (data & ~0xcff)
1224                         return false;
1225                 return valid_mtrr_type(data & 0xff);
1226         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1227                 for (i = 0; i < 8 ; i++)
1228                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1229                                 return false;
1230                 return true;
1231         }
1232
1233         /* variable MTRRs */
1234         return valid_mtrr_type(data & 0xff);
1235 }
1236
1237 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1238 {
1239         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1240
1241         if (!mtrr_valid(vcpu, msr, data))
1242                 return 1;
1243
1244         if (msr == MSR_MTRRdefType) {
1245                 vcpu->arch.mtrr_state.def_type = data;
1246                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1247         } else if (msr == MSR_MTRRfix64K_00000)
1248                 p[0] = data;
1249         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1250                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1251         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1252                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1253         else if (msr == MSR_IA32_CR_PAT)
1254                 vcpu->arch.pat = data;
1255         else {  /* Variable MTRRs */
1256                 int idx, is_mtrr_mask;
1257                 u64 *pt;
1258
1259                 idx = (msr - 0x200) / 2;
1260                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1261                 if (!is_mtrr_mask)
1262                         pt =
1263                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1264                 else
1265                         pt =
1266                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1267                 *pt = data;
1268         }
1269
1270         kvm_mmu_reset_context(vcpu);
1271         return 0;
1272 }
1273
1274 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1275 {
1276         u64 mcg_cap = vcpu->arch.mcg_cap;
1277         unsigned bank_num = mcg_cap & 0xff;
1278
1279         switch (msr) {
1280         case MSR_IA32_MCG_STATUS:
1281                 vcpu->arch.mcg_status = data;
1282                 break;
1283         case MSR_IA32_MCG_CTL:
1284                 if (!(mcg_cap & MCG_CTL_P))
1285                         return 1;
1286                 if (data != 0 && data != ~(u64)0)
1287                         return -1;
1288                 vcpu->arch.mcg_ctl = data;
1289                 break;
1290         default:
1291                 if (msr >= MSR_IA32_MC0_CTL &&
1292                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1293                         u32 offset = msr - MSR_IA32_MC0_CTL;
1294                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1295                          * some Linux kernels though clear bit 10 in bank 4 to
1296                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1297                          * this to avoid an uncatched #GP in the guest
1298                          */
1299                         if ((offset & 0x3) == 0 &&
1300                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1301                                 return -1;
1302                         vcpu->arch.mce_banks[offset] = data;
1303                         break;
1304                 }
1305                 return 1;
1306         }
1307         return 0;
1308 }
1309
1310 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1311 {
1312         struct kvm *kvm = vcpu->kvm;
1313         int lm = is_long_mode(vcpu);
1314         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1315                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1316         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1317                 : kvm->arch.xen_hvm_config.blob_size_32;
1318         u32 page_num = data & ~PAGE_MASK;
1319         u64 page_addr = data & PAGE_MASK;
1320         u8 *page;
1321         int r;
1322
1323         r = -E2BIG;
1324         if (page_num >= blob_size)
1325                 goto out;
1326         r = -ENOMEM;
1327         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1328         if (IS_ERR(page)) {
1329                 r = PTR_ERR(page);
1330                 goto out;
1331         }
1332         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1333                 goto out_free;
1334         r = 0;
1335 out_free:
1336         kfree(page);
1337 out:
1338         return r;
1339 }
1340
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1342 {
1343         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 }
1345
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1347 {
1348         bool r = false;
1349         switch (msr) {
1350         case HV_X64_MSR_GUEST_OS_ID:
1351         case HV_X64_MSR_HYPERCALL:
1352                 r = true;
1353                 break;
1354         }
1355
1356         return r;
1357 }
1358
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1360 {
1361         struct kvm *kvm = vcpu->kvm;
1362
1363         switch (msr) {
1364         case HV_X64_MSR_GUEST_OS_ID:
1365                 kvm->arch.hv_guest_os_id = data;
1366                 /* setting guest os id to zero disables hypercall page */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1369                 break;
1370         case HV_X64_MSR_HYPERCALL: {
1371                 u64 gfn;
1372                 unsigned long addr;
1373                 u8 instructions[4];
1374
1375                 /* if guest os id is not set hypercall should remain disabled */
1376                 if (!kvm->arch.hv_guest_os_id)
1377                         break;
1378                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379                         kvm->arch.hv_hypercall = data;
1380                         break;
1381                 }
1382                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383                 addr = gfn_to_hva(kvm, gfn);
1384                 if (kvm_is_error_hva(addr))
1385                         return 1;
1386                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388                 if (__copy_to_user((void __user *)addr, instructions, 4))
1389                         return 1;
1390                 kvm->arch.hv_hypercall = data;
1391                 break;
1392         }
1393         default:
1394                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395                           "data 0x%llx\n", msr, data);
1396                 return 1;
1397         }
1398         return 0;
1399 }
1400
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 {
1403         switch (msr) {
1404         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405                 unsigned long addr;
1406
1407                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408                         vcpu->arch.hv_vapic = data;
1409                         break;
1410                 }
1411                 addr = gfn_to_hva(vcpu->kvm, data >>
1412                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413                 if (kvm_is_error_hva(addr))
1414                         return 1;
1415                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1416                         return 1;
1417                 vcpu->arch.hv_vapic = data;
1418                 break;
1419         }
1420         case HV_X64_MSR_EOI:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422         case HV_X64_MSR_ICR:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424         case HV_X64_MSR_TPR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1426         default:
1427                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428                           "data 0x%llx\n", msr, data);
1429                 return 1;
1430         }
1431
1432         return 0;
1433 }
1434
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1436 {
1437         gpa_t gpa = data & ~0x3f;
1438
1439         /* Bits 2:5 are resrved, Should be zero */
1440         if (data & 0x3c)
1441                 return 1;
1442
1443         vcpu->arch.apf.msr_val = data;
1444
1445         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446                 kvm_clear_async_pf_completion_queue(vcpu);
1447                 kvm_async_pf_hash_reset(vcpu);
1448                 return 0;
1449         }
1450
1451         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452                 return 1;
1453
1454         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455         kvm_async_pf_wakeup_all(vcpu);
1456         return 0;
1457 }
1458
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1460 {
1461         if (vcpu->arch.time_page) {
1462                 kvm_release_page_dirty(vcpu->arch.time_page);
1463                 vcpu->arch.time_page = NULL;
1464         }
1465 }
1466
1467 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1468 {
1469         u64 delta;
1470
1471         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1472                 return;
1473
1474         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1475         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1476         vcpu->arch.st.accum_steal = delta;
1477 }
1478
1479 static void record_steal_time(struct kvm_vcpu *vcpu)
1480 {
1481         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1482                 return;
1483
1484         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1485                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1486                 return;
1487
1488         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1489         vcpu->arch.st.steal.version += 2;
1490         vcpu->arch.st.accum_steal = 0;
1491
1492         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1493                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1494 }
1495
1496 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1497 {
1498         bool pr = false;
1499
1500         switch (msr) {
1501         case MSR_EFER:
1502                 return set_efer(vcpu, data);
1503         case MSR_K7_HWCR:
1504                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1505                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1506                 if (data != 0) {
1507                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1508                                 data);
1509                         return 1;
1510                 }
1511                 break;
1512         case MSR_FAM10H_MMIO_CONF_BASE:
1513                 if (data != 0) {
1514                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1515                                 "0x%llx\n", data);
1516                         return 1;
1517                 }
1518                 break;
1519         case MSR_AMD64_NB_CFG:
1520                 break;
1521         case MSR_IA32_DEBUGCTLMSR:
1522                 if (!data) {
1523                         /* We support the non-activated case already */
1524                         break;
1525                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1526                         /* Values other than LBR and BTF are vendor-specific,
1527                            thus reserved and should throw a #GP */
1528                         return 1;
1529                 }
1530                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1531                         __func__, data);
1532                 break;
1533         case MSR_IA32_UCODE_REV:
1534         case MSR_IA32_UCODE_WRITE:
1535         case MSR_VM_HSAVE_PA:
1536         case MSR_AMD64_PATCH_LOADER:
1537                 break;
1538         case MSR_NHM_SNB_PKG_CST_CFG_CTL: /* 0xe2 */
1539         case 0x200 ... 0x2ff:
1540                 return set_msr_mtrr(vcpu, msr, data);
1541         case MSR_IA32_APICBASE:
1542                 kvm_set_apic_base(vcpu, data);
1543                 break;
1544         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1545                 return kvm_x2apic_msr_write(vcpu, msr, data);
1546         case MSR_IA32_TSCDEADLINE:
1547                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1548                 break;
1549         case MSR_IA32_MISC_ENABLE:
1550                 vcpu->arch.ia32_misc_enable_msr = data;
1551                 break;
1552         case MSR_KVM_WALL_CLOCK_NEW:
1553         case MSR_KVM_WALL_CLOCK:
1554                 vcpu->kvm->arch.wall_clock = data;
1555                 kvm_write_wall_clock(vcpu->kvm, data);
1556                 break;
1557         case MSR_KVM_SYSTEM_TIME_NEW:
1558         case MSR_KVM_SYSTEM_TIME: {
1559                 kvmclock_reset(vcpu);
1560
1561                 vcpu->arch.time = data;
1562                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1563
1564                 /* we verify if the enable bit is set... */
1565                 if (!(data & 1))
1566                         break;
1567
1568                 /* ...but clean it before doing the actual write */
1569                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1570
1571                 vcpu->arch.time_page =
1572                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1573
1574                 if (is_error_page(vcpu->arch.time_page)) {
1575                         kvm_release_page_clean(vcpu->arch.time_page);
1576                         vcpu->arch.time_page = NULL;
1577                 }
1578                 break;
1579         }
1580         case MSR_KVM_ASYNC_PF_EN:
1581                 if (kvm_pv_enable_async_pf(vcpu, data))
1582                         return 1;
1583                 break;
1584         case MSR_KVM_STEAL_TIME:
1585
1586                 if (unlikely(!sched_info_on()))
1587                         return 1;
1588
1589                 if (data & KVM_STEAL_RESERVED_MASK)
1590                         return 1;
1591
1592                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1593                                                         data & KVM_STEAL_VALID_BITS))
1594                         return 1;
1595
1596                 vcpu->arch.st.msr_val = data;
1597
1598                 if (!(data & KVM_MSR_ENABLED))
1599                         break;
1600
1601                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1602
1603                 preempt_disable();
1604                 accumulate_steal_time(vcpu);
1605                 preempt_enable();
1606
1607                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1608
1609                 break;
1610
1611         case MSR_IA32_MCG_CTL:
1612         case MSR_IA32_MCG_STATUS:
1613         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1614                 return set_msr_mce(vcpu, msr, data);
1615
1616         /* Performance counters are not protected by a CPUID bit,
1617          * so we should check all of them in the generic path for the sake of
1618          * cross vendor migration.
1619          * Writing a zero into the event select MSRs disables them,
1620          * which we perfectly emulate ;-). Any other value should be at least
1621          * reported, some guests depend on them.
1622          */
1623         case MSR_K7_EVNTSEL0:
1624         case MSR_K7_EVNTSEL1:
1625         case MSR_K7_EVNTSEL2:
1626         case MSR_K7_EVNTSEL3:
1627                 if (data != 0)
1628                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1629                                 "0x%x data 0x%llx\n", msr, data);
1630                 break;
1631         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1632          * so we ignore writes to make it happy.
1633          */
1634         case MSR_K7_PERFCTR0:
1635         case MSR_K7_PERFCTR1:
1636         case MSR_K7_PERFCTR2:
1637         case MSR_K7_PERFCTR3:
1638                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1639                         "0x%x data 0x%llx\n", msr, data);
1640                 break;
1641         case MSR_P6_PERFCTR0:
1642         case MSR_P6_PERFCTR1:
1643                 pr = true;
1644         case MSR_P6_EVNTSEL0:
1645         case MSR_P6_EVNTSEL1:
1646                 if (kvm_pmu_msr(vcpu, msr))
1647                         return kvm_pmu_set_msr(vcpu, msr, data);
1648
1649                 if (pr || data != 0)
1650                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1651                                 "0x%x data 0x%llx\n", msr, data);
1652                 break;
1653         case MSR_K7_CLK_CTL:
1654                 /*
1655                  * Ignore all writes to this no longer documented MSR.
1656                  * Writes are only relevant for old K7 processors,
1657                  * all pre-dating SVM, but a recommended workaround from
1658                  * AMD for these chips. It is possible to speicify the
1659                  * affected processor models on the command line, hence
1660                  * the need to ignore the workaround.
1661                  */
1662                 break;
1663         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1664                 if (kvm_hv_msr_partition_wide(msr)) {
1665                         int r;
1666                         mutex_lock(&vcpu->kvm->lock);
1667                         r = set_msr_hyperv_pw(vcpu, msr, data);
1668                         mutex_unlock(&vcpu->kvm->lock);
1669                         return r;
1670                 } else
1671                         return set_msr_hyperv(vcpu, msr, data);
1672                 break;
1673         case MSR_IA32_BBL_CR_CTL3:
1674                 /* Drop writes to this legacy MSR -- see rdmsr
1675                  * counterpart for further detail.
1676                  */
1677                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1678                 break;
1679         default:
1680                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1681                         return xen_hvm_config(vcpu, data);
1682                 if (kvm_pmu_msr(vcpu, msr))
1683                         return kvm_pmu_set_msr(vcpu, msr, data);
1684                 if (!ignore_msrs) {
1685                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1686                                 msr, data);
1687                         return 1;
1688                 } else {
1689                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1690                                 msr, data);
1691                         break;
1692                 }
1693         }
1694         return 0;
1695 }
1696 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1697
1698
1699 /*
1700  * Reads an msr value (of 'msr_index') into 'pdata'.
1701  * Returns 0 on success, non-0 otherwise.
1702  * Assumes vcpu_load() was already called.
1703  */
1704 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1705 {
1706         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1707 }
1708
1709 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1710 {
1711         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1712
1713         if (!msr_mtrr_valid(msr))
1714                 return 1;
1715
1716         if (msr == MSR_MTRRdefType)
1717                 *pdata = vcpu->arch.mtrr_state.def_type +
1718                          (vcpu->arch.mtrr_state.enabled << 10);
1719         else if (msr == MSR_MTRRfix64K_00000)
1720                 *pdata = p[0];
1721         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1722                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1723         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1724                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1725         else if (msr == MSR_IA32_CR_PAT)
1726                 *pdata = vcpu->arch.pat;
1727         else {  /* Variable MTRRs */
1728                 int idx, is_mtrr_mask;
1729                 u64 *pt;
1730
1731                 idx = (msr - 0x200) / 2;
1732                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1733                 if (!is_mtrr_mask)
1734                         pt =
1735                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1736                 else
1737                         pt =
1738                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1739                 *pdata = *pt;
1740         }
1741
1742         return 0;
1743 }
1744
1745 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1746 {
1747         u64 data;
1748         u64 mcg_cap = vcpu->arch.mcg_cap;
1749         unsigned bank_num = mcg_cap & 0xff;
1750
1751         switch (msr) {
1752         case MSR_IA32_P5_MC_ADDR:
1753         case MSR_IA32_P5_MC_TYPE:
1754                 data = 0;
1755                 break;
1756         case MSR_IA32_MCG_CAP:
1757                 data = vcpu->arch.mcg_cap;
1758                 break;
1759         case MSR_IA32_MCG_CTL:
1760                 if (!(mcg_cap & MCG_CTL_P))
1761                         return 1;
1762                 data = vcpu->arch.mcg_ctl;
1763                 break;
1764         case MSR_IA32_MCG_STATUS:
1765                 data = vcpu->arch.mcg_status;
1766                 break;
1767         default:
1768                 if (msr >= MSR_IA32_MC0_CTL &&
1769                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1770                         u32 offset = msr - MSR_IA32_MC0_CTL;
1771                         data = vcpu->arch.mce_banks[offset];
1772                         break;
1773                 }
1774                 return 1;
1775         }
1776         *pdata = data;
1777         return 0;
1778 }
1779
1780 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1781 {
1782         u64 data = 0;
1783         struct kvm *kvm = vcpu->kvm;
1784
1785         switch (msr) {
1786         case HV_X64_MSR_GUEST_OS_ID:
1787                 data = kvm->arch.hv_guest_os_id;
1788                 break;
1789         case HV_X64_MSR_HYPERCALL:
1790                 data = kvm->arch.hv_hypercall;
1791                 break;
1792         default:
1793                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1794                 return 1;
1795         }
1796
1797         *pdata = data;
1798         return 0;
1799 }
1800
1801 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1802 {
1803         u64 data = 0;
1804
1805         switch (msr) {
1806         case HV_X64_MSR_VP_INDEX: {
1807                 int r;
1808                 struct kvm_vcpu *v;
1809                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1810                         if (v == vcpu)
1811                                 data = r;
1812                 break;
1813         }
1814         case HV_X64_MSR_EOI:
1815                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1816         case HV_X64_MSR_ICR:
1817                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1818         case HV_X64_MSR_TPR:
1819                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1820         case HV_X64_MSR_APIC_ASSIST_PAGE:
1821                 data = vcpu->arch.hv_vapic;
1822                 break;
1823         default:
1824                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1825                 return 1;
1826         }
1827         *pdata = data;
1828         return 0;
1829 }
1830
1831 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1832 {
1833         u64 data;
1834
1835         switch (msr) {
1836         case MSR_IA32_PLATFORM_ID:
1837         case MSR_IA32_EBL_CR_POWERON:
1838         case MSR_IA32_DEBUGCTLMSR:
1839         case MSR_IA32_LASTBRANCHFROMIP:
1840         case MSR_IA32_LASTBRANCHTOIP:
1841         case MSR_IA32_LASTINTFROMIP:
1842         case MSR_IA32_LASTINTTOIP:
1843         case MSR_K8_SYSCFG:
1844         case MSR_K7_HWCR:
1845         case MSR_VM_HSAVE_PA:
1846         case MSR_K7_EVNTSEL0:
1847         case MSR_K7_PERFCTR0:
1848         case MSR_K8_INT_PENDING_MSG:
1849         case MSR_AMD64_NB_CFG:
1850         case MSR_FAM10H_MMIO_CONF_BASE:
1851         case MSR_NHM_SNB_PKG_CST_CFG_CTL: /* 0xe2 */
1852                 data = 0;
1853                 break;
1854         case MSR_P6_PERFCTR0:
1855         case MSR_P6_PERFCTR1:
1856         case MSR_P6_EVNTSEL0:
1857         case MSR_P6_EVNTSEL1:
1858                 if (kvm_pmu_msr(vcpu, msr))
1859                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1860                 data = 0;
1861                 break;
1862         case MSR_IA32_UCODE_REV:
1863                 data = 0x100000000ULL;
1864                 break;
1865         case MSR_MTRRcap:
1866                 data = 0x500 | KVM_NR_VAR_MTRR;
1867                 break;
1868         case 0x200 ... 0x2ff:
1869                 return get_msr_mtrr(vcpu, msr, pdata);
1870         case 0xcd: /* fsb frequency */
1871                 data = 3;
1872                 break;
1873                 /*
1874                  * MSR_EBC_FREQUENCY_ID
1875                  * Conservative value valid for even the basic CPU models.
1876                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1877                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1878                  * and 266MHz for model 3, or 4. Set Core Clock
1879                  * Frequency to System Bus Frequency Ratio to 1 (bits
1880                  * 31:24) even though these are only valid for CPU
1881                  * models > 2, however guests may end up dividing or
1882                  * multiplying by zero otherwise.
1883                  */
1884         case MSR_EBC_FREQUENCY_ID:
1885                 data = 1 << 24;
1886                 break;
1887         case MSR_IA32_APICBASE:
1888                 data = kvm_get_apic_base(vcpu);
1889                 break;
1890         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1891                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1892                 break;
1893         case MSR_IA32_TSCDEADLINE:
1894                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1895                 break;
1896         case MSR_IA32_MISC_ENABLE:
1897                 data = vcpu->arch.ia32_misc_enable_msr;
1898                 break;
1899         case MSR_IA32_PERF_STATUS:
1900                 /* TSC increment by tick */
1901                 data = 1000ULL;
1902                 /* CPU multiplier */
1903                 data |= (((uint64_t)4ULL) << 40);
1904                 break;
1905         case MSR_EFER:
1906                 data = vcpu->arch.efer;
1907                 break;
1908         case MSR_KVM_WALL_CLOCK:
1909         case MSR_KVM_WALL_CLOCK_NEW:
1910                 data = vcpu->kvm->arch.wall_clock;
1911                 break;
1912         case MSR_KVM_SYSTEM_TIME:
1913         case MSR_KVM_SYSTEM_TIME_NEW:
1914                 data = vcpu->arch.time;
1915                 break;
1916         case MSR_KVM_ASYNC_PF_EN:
1917                 data = vcpu->arch.apf.msr_val;
1918                 break;
1919         case MSR_KVM_STEAL_TIME:
1920                 data = vcpu->arch.st.msr_val;
1921                 break;
1922         case MSR_IA32_P5_MC_ADDR:
1923         case MSR_IA32_P5_MC_TYPE:
1924         case MSR_IA32_MCG_CAP:
1925         case MSR_IA32_MCG_CTL:
1926         case MSR_IA32_MCG_STATUS:
1927         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1928                 return get_msr_mce(vcpu, msr, pdata);
1929         case MSR_K7_CLK_CTL:
1930                 /*
1931                  * Provide expected ramp-up count for K7. All other
1932                  * are set to zero, indicating minimum divisors for
1933                  * every field.
1934                  *
1935                  * This prevents guest kernels on AMD host with CPU
1936                  * type 6, model 8 and higher from exploding due to
1937                  * the rdmsr failing.
1938                  */
1939                 data = 0x20000000;
1940                 break;
1941         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1942                 if (kvm_hv_msr_partition_wide(msr)) {
1943                         int r;
1944                         mutex_lock(&vcpu->kvm->lock);
1945                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1946                         mutex_unlock(&vcpu->kvm->lock);
1947                         return r;
1948                 } else
1949                         return get_msr_hyperv(vcpu, msr, pdata);
1950                 break;
1951         case MSR_IA32_BBL_CR_CTL3:
1952                 /* This legacy MSR exists but isn't fully documented in current
1953                  * silicon.  It is however accessed by winxp in very narrow
1954                  * scenarios where it sets bit #19, itself documented as
1955                  * a "reserved" bit.  Best effort attempt to source coherent
1956                  * read data here should the balance of the register be
1957                  * interpreted by the guest:
1958                  *
1959                  * L2 cache control register 3: 64GB range, 256KB size,
1960                  * enabled, latency 0x1, configured
1961                  */
1962                 data = 0xbe702111;
1963                 break;
1964         default:
1965                 if (kvm_pmu_msr(vcpu, msr))
1966                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1967                 if (!ignore_msrs) {
1968                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1969                         return 1;
1970                 } else {
1971                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1972                         data = 0;
1973                 }
1974                 break;
1975         }
1976         *pdata = data;
1977         return 0;
1978 }
1979 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1980
1981 /*
1982  * Read or write a bunch of msrs. All parameters are kernel addresses.
1983  *
1984  * @return number of msrs set successfully.
1985  */
1986 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1987                     struct kvm_msr_entry *entries,
1988                     int (*do_msr)(struct kvm_vcpu *vcpu,
1989                                   unsigned index, u64 *data))
1990 {
1991         int i, idx;
1992
1993         idx = srcu_read_lock(&vcpu->kvm->srcu);
1994         for (i = 0; i < msrs->nmsrs; ++i)
1995                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1996                         break;
1997         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1998
1999         return i;
2000 }
2001
2002 /*
2003  * Read or write a bunch of msrs. Parameters are user addresses.
2004  *
2005  * @return number of msrs set successfully.
2006  */
2007 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2008                   int (*do_msr)(struct kvm_vcpu *vcpu,
2009                                 unsigned index, u64 *data),
2010                   int writeback)
2011 {
2012         struct kvm_msrs msrs;
2013         struct kvm_msr_entry *entries;
2014         int r, n;
2015         unsigned size;
2016
2017         r = -EFAULT;
2018         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2019                 goto out;
2020
2021         r = -E2BIG;
2022         if (msrs.nmsrs >= MAX_IO_MSRS)
2023                 goto out;
2024
2025         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2026         entries = memdup_user(user_msrs->entries, size);
2027         if (IS_ERR(entries)) {
2028                 r = PTR_ERR(entries);
2029                 goto out;
2030         }
2031
2032         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2033         if (r < 0)
2034                 goto out_free;
2035
2036         r = -EFAULT;
2037         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2038                 goto out_free;
2039
2040         r = n;
2041
2042 out_free:
2043         kfree(entries);
2044 out:
2045         return r;
2046 }
2047
2048 int kvm_dev_ioctl_check_extension(long ext)
2049 {
2050         int r;
2051
2052         switch (ext) {
2053         case KVM_CAP_IRQCHIP:
2054         case KVM_CAP_HLT:
2055         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2056         case KVM_CAP_SET_TSS_ADDR:
2057         case KVM_CAP_EXT_CPUID:
2058         case KVM_CAP_CLOCKSOURCE:
2059         case KVM_CAP_PIT:
2060         case KVM_CAP_NOP_IO_DELAY:
2061         case KVM_CAP_MP_STATE:
2062         case KVM_CAP_SYNC_MMU:
2063         case KVM_CAP_USER_NMI:
2064         case KVM_CAP_REINJECT_CONTROL:
2065         case KVM_CAP_IRQ_INJECT_STATUS:
2066         case KVM_CAP_ASSIGN_DEV_IRQ:
2067         case KVM_CAP_IRQFD:
2068         case KVM_CAP_IOEVENTFD:
2069         case KVM_CAP_PIT2:
2070         case KVM_CAP_PIT_STATE2:
2071         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2072         case KVM_CAP_XEN_HVM:
2073         case KVM_CAP_ADJUST_CLOCK:
2074         case KVM_CAP_VCPU_EVENTS:
2075         case KVM_CAP_HYPERV:
2076         case KVM_CAP_HYPERV_VAPIC:
2077         case KVM_CAP_HYPERV_SPIN:
2078         case KVM_CAP_PCI_SEGMENT:
2079         case KVM_CAP_DEBUGREGS:
2080         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2081         case KVM_CAP_XSAVE:
2082         case KVM_CAP_ASYNC_PF:
2083         case KVM_CAP_GET_TSC_KHZ:
2084                 r = 1;
2085                 break;
2086         case KVM_CAP_COALESCED_MMIO:
2087                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2088                 break;
2089         case KVM_CAP_VAPIC:
2090                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2091                 break;
2092         case KVM_CAP_NR_VCPUS:
2093                 r = KVM_SOFT_MAX_VCPUS;
2094                 break;
2095         case KVM_CAP_MAX_VCPUS:
2096                 r = KVM_MAX_VCPUS;
2097                 break;
2098         case KVM_CAP_NR_MEMSLOTS:
2099                 r = KVM_MEMORY_SLOTS;
2100                 break;
2101         case KVM_CAP_PV_MMU:    /* obsolete */
2102                 r = 0;
2103                 break;
2104         case KVM_CAP_IOMMU:
2105                 r = iommu_present(&pci_bus_type);
2106                 break;
2107         case KVM_CAP_MCE:
2108                 r = KVM_MAX_MCE_BANKS;
2109                 break;
2110         case KVM_CAP_XCRS:
2111                 r = cpu_has_xsave;
2112                 break;
2113         case KVM_CAP_TSC_CONTROL:
2114                 r = kvm_has_tsc_control;
2115                 break;
2116         case KVM_CAP_TSC_DEADLINE_TIMER:
2117                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2118                 break;
2119         default:
2120                 r = 0;
2121                 break;
2122         }
2123         return r;
2124
2125 }
2126
2127 long kvm_arch_dev_ioctl(struct file *filp,
2128                         unsigned int ioctl, unsigned long arg)
2129 {
2130         void __user *argp = (void __user *)arg;
2131         long r;
2132
2133         switch (ioctl) {
2134         case KVM_GET_MSR_INDEX_LIST: {
2135                 struct kvm_msr_list __user *user_msr_list = argp;
2136                 struct kvm_msr_list msr_list;
2137                 unsigned n;
2138
2139                 r = -EFAULT;
2140                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2141                         goto out;
2142                 n = msr_list.nmsrs;
2143                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2144                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2145                         goto out;
2146                 r = -E2BIG;
2147                 if (n < msr_list.nmsrs)
2148                         goto out;
2149                 r = -EFAULT;
2150                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2151                                  num_msrs_to_save * sizeof(u32)))
2152                         goto out;
2153                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2154                                  &emulated_msrs,
2155                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2156                         goto out;
2157                 r = 0;
2158                 break;
2159         }
2160         case KVM_GET_SUPPORTED_CPUID: {
2161                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2162                 struct kvm_cpuid2 cpuid;
2163
2164                 r = -EFAULT;
2165                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2166                         goto out;
2167                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2168                                                       cpuid_arg->entries);
2169                 if (r)
2170                         goto out;
2171
2172                 r = -EFAULT;
2173                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2174                         goto out;
2175                 r = 0;
2176                 break;
2177         }
2178         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2179                 u64 mce_cap;
2180
2181                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2182                 r = -EFAULT;
2183                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2184                         goto out;
2185                 r = 0;
2186                 break;
2187         }
2188         default:
2189                 r = -EINVAL;
2190         }
2191 out:
2192         return r;
2193 }
2194
2195 static void wbinvd_ipi(void *garbage)
2196 {
2197         wbinvd();
2198 }
2199
2200 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2201 {
2202         return vcpu->kvm->arch.iommu_domain &&
2203                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2204 }
2205
2206 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2207 {
2208         /* Address WBINVD may be executed by guest */
2209         if (need_emulate_wbinvd(vcpu)) {
2210                 if (kvm_x86_ops->has_wbinvd_exit())
2211                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2212                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2213                         smp_call_function_single(vcpu->cpu,
2214                                         wbinvd_ipi, NULL, 1);
2215         }
2216
2217         kvm_x86_ops->vcpu_load(vcpu, cpu);
2218         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2219                 /* Make sure TSC doesn't go backwards */
2220                 s64 tsc_delta;
2221                 u64 tsc;
2222
2223                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2224                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2225                              tsc - vcpu->arch.last_guest_tsc;
2226
2227                 if (tsc_delta < 0)
2228                         mark_tsc_unstable("KVM discovered backwards TSC");
2229                 if (check_tsc_unstable()) {
2230                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2231                         vcpu->arch.tsc_catchup = 1;
2232                 }
2233                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2234                 if (vcpu->cpu != cpu)
2235                         kvm_migrate_timers(vcpu);
2236                 vcpu->cpu = cpu;
2237         }
2238
2239         accumulate_steal_time(vcpu);
2240         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2241 }
2242
2243 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2244 {
2245         kvm_x86_ops->vcpu_put(vcpu);
2246         kvm_put_guest_fpu(vcpu);
2247         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2248 }
2249
2250 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2251                                     struct kvm_lapic_state *s)
2252 {
2253         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2254
2255         return 0;
2256 }
2257
2258 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2259                                     struct kvm_lapic_state *s)
2260 {
2261         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2262         kvm_apic_post_state_restore(vcpu);
2263         update_cr8_intercept(vcpu);
2264
2265         return 0;
2266 }
2267
2268 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2269                                     struct kvm_interrupt *irq)
2270 {
2271         if (irq->irq < 0 || irq->irq >= 256)
2272                 return -EINVAL;
2273         if (irqchip_in_kernel(vcpu->kvm))
2274                 return -ENXIO;
2275
2276         kvm_queue_interrupt(vcpu, irq->irq, false);
2277         kvm_make_request(KVM_REQ_EVENT, vcpu);
2278
2279         return 0;
2280 }
2281
2282 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2283 {
2284         kvm_inject_nmi(vcpu);
2285
2286         return 0;
2287 }
2288
2289 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2290                                            struct kvm_tpr_access_ctl *tac)
2291 {
2292         if (tac->flags)
2293                 return -EINVAL;
2294         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2295         return 0;
2296 }
2297
2298 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2299                                         u64 mcg_cap)
2300 {
2301         int r;
2302         unsigned bank_num = mcg_cap & 0xff, bank;
2303
2304         r = -EINVAL;
2305         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2306                 goto out;
2307         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2308                 goto out;
2309         r = 0;
2310         vcpu->arch.mcg_cap = mcg_cap;
2311         /* Init IA32_MCG_CTL to all 1s */
2312         if (mcg_cap & MCG_CTL_P)
2313                 vcpu->arch.mcg_ctl = ~(u64)0;
2314         /* Init IA32_MCi_CTL to all 1s */
2315         for (bank = 0; bank < bank_num; bank++)
2316                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2317 out:
2318         return r;
2319 }
2320
2321 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2322                                       struct kvm_x86_mce *mce)
2323 {
2324         u64 mcg_cap = vcpu->arch.mcg_cap;
2325         unsigned bank_num = mcg_cap & 0xff;
2326         u64 *banks = vcpu->arch.mce_banks;
2327
2328         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2329                 return -EINVAL;
2330         /*
2331          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2332          * reporting is disabled
2333          */
2334         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2335             vcpu->arch.mcg_ctl != ~(u64)0)
2336                 return 0;
2337         banks += 4 * mce->bank;
2338         /*
2339          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2340          * reporting is disabled for the bank
2341          */
2342         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2343                 return 0;
2344         if (mce->status & MCI_STATUS_UC) {
2345                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2346                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2347                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2348                         return 0;
2349                 }
2350                 if (banks[1] & MCI_STATUS_VAL)
2351                         mce->status |= MCI_STATUS_OVER;
2352                 banks[2] = mce->addr;
2353                 banks[3] = mce->misc;
2354                 vcpu->arch.mcg_status = mce->mcg_status;
2355                 banks[1] = mce->status;
2356                 kvm_queue_exception(vcpu, MC_VECTOR);
2357         } else if (!(banks[1] & MCI_STATUS_VAL)
2358                    || !(banks[1] & MCI_STATUS_UC)) {
2359                 if (banks[1] & MCI_STATUS_VAL)
2360                         mce->status |= MCI_STATUS_OVER;
2361                 banks[2] = mce->addr;
2362                 banks[3] = mce->misc;
2363                 banks[1] = mce->status;
2364         } else
2365                 banks[1] |= MCI_STATUS_OVER;
2366         return 0;
2367 }
2368
2369 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2370                                                struct kvm_vcpu_events *events)
2371 {
2372         process_nmi(vcpu);
2373         events->exception.injected =
2374                 vcpu->arch.exception.pending &&
2375                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2376         events->exception.nr = vcpu->arch.exception.nr;
2377         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2378         events->exception.pad = 0;
2379         events->exception.error_code = vcpu->arch.exception.error_code;
2380
2381         events->interrupt.injected =
2382                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2383         events->interrupt.nr = vcpu->arch.interrupt.nr;
2384         events->interrupt.soft = 0;
2385         events->interrupt.shadow =
2386                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2387                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2388
2389         events->nmi.injected = vcpu->arch.nmi_injected;
2390         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2391         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2392         events->nmi.pad = 0;
2393
2394         events->sipi_vector = vcpu->arch.sipi_vector;
2395
2396         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2397                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2398                          | KVM_VCPUEVENT_VALID_SHADOW);
2399         memset(&events->reserved, 0, sizeof(events->reserved));
2400 }
2401
2402 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2403                                               struct kvm_vcpu_events *events)
2404 {
2405         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2406                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2407                               | KVM_VCPUEVENT_VALID_SHADOW))
2408                 return -EINVAL;
2409
2410         process_nmi(vcpu);
2411         vcpu->arch.exception.pending = events->exception.injected;
2412         vcpu->arch.exception.nr = events->exception.nr;
2413         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2414         vcpu->arch.exception.error_code = events->exception.error_code;
2415
2416         vcpu->arch.interrupt.pending = events->interrupt.injected;
2417         vcpu->arch.interrupt.nr = events->interrupt.nr;
2418         vcpu->arch.interrupt.soft = events->interrupt.soft;
2419         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2420                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2421                                                   events->interrupt.shadow);
2422
2423         vcpu->arch.nmi_injected = events->nmi.injected;
2424         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2425                 vcpu->arch.nmi_pending = events->nmi.pending;
2426         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2427
2428         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2429                 vcpu->arch.sipi_vector = events->sipi_vector;
2430
2431         kvm_make_request(KVM_REQ_EVENT, vcpu);
2432
2433         return 0;
2434 }
2435
2436 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2437                                              struct kvm_debugregs *dbgregs)
2438 {
2439         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2440         dbgregs->dr6 = vcpu->arch.dr6;
2441         dbgregs->dr7 = vcpu->arch.dr7;
2442         dbgregs->flags = 0;
2443         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2444 }
2445
2446 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2447                                             struct kvm_debugregs *dbgregs)
2448 {
2449         if (dbgregs->flags)
2450                 return -EINVAL;
2451
2452         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2453         vcpu->arch.dr6 = dbgregs->dr6;
2454         vcpu->arch.dr7 = dbgregs->dr7;
2455
2456         return 0;
2457 }
2458
2459 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2460                                          struct kvm_xsave *guest_xsave)
2461 {
2462         if (cpu_has_xsave)
2463                 memcpy(guest_xsave->region,
2464                         &vcpu->arch.guest_fpu.state->xsave,
2465                         xstate_size);
2466         else {
2467                 memcpy(guest_xsave->region,
2468                         &vcpu->arch.guest_fpu.state->fxsave,
2469                         sizeof(struct i387_fxsave_struct));
2470                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2471                         XSTATE_FPSSE;
2472         }
2473 }
2474
2475 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2476                                         struct kvm_xsave *guest_xsave)
2477 {
2478         u64 xstate_bv =
2479                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2480
2481         if (cpu_has_xsave)
2482                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2483                         guest_xsave->region, xstate_size);
2484         else {
2485                 if (xstate_bv & ~XSTATE_FPSSE)
2486                         return -EINVAL;
2487                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2488                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2489         }
2490         return 0;
2491 }
2492
2493 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2494                                         struct kvm_xcrs *guest_xcrs)
2495 {
2496         if (!cpu_has_xsave) {
2497                 guest_xcrs->nr_xcrs = 0;
2498                 return;
2499         }
2500
2501         guest_xcrs->nr_xcrs = 1;
2502         guest_xcrs->flags = 0;
2503         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2504         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2505 }
2506
2507 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2508                                        struct kvm_xcrs *guest_xcrs)
2509 {
2510         int i, r = 0;
2511
2512         if (!cpu_has_xsave)
2513                 return -EINVAL;
2514
2515         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2516                 return -EINVAL;
2517
2518         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2519                 /* Only support XCR0 currently */
2520                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2521                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2522                                 guest_xcrs->xcrs[0].value);
2523                         break;
2524                 }
2525         if (r)
2526                 r = -EINVAL;
2527         return r;
2528 }
2529
2530 long kvm_arch_vcpu_ioctl(struct file *filp,
2531                          unsigned int ioctl, unsigned long arg)
2532 {
2533         struct kvm_vcpu *vcpu = filp->private_data;
2534         void __user *argp = (void __user *)arg;
2535         int r;
2536         union {
2537                 struct kvm_lapic_state *lapic;
2538                 struct kvm_xsave *xsave;
2539                 struct kvm_xcrs *xcrs;
2540                 void *buffer;
2541         } u;
2542
2543         u.buffer = NULL;
2544         switch (ioctl) {
2545         case KVM_GET_LAPIC: {
2546                 r = -EINVAL;
2547                 if (!vcpu->arch.apic)
2548                         goto out;
2549                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2550
2551                 r = -ENOMEM;
2552                 if (!u.lapic)
2553                         goto out;
2554                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2555                 if (r)
2556                         goto out;
2557                 r = -EFAULT;
2558                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2559                         goto out;
2560                 r = 0;
2561                 break;
2562         }
2563         case KVM_SET_LAPIC: {
2564                 r = -EINVAL;
2565                 if (!vcpu->arch.apic)
2566                         goto out;
2567                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2568                 if (IS_ERR(u.lapic)) {
2569                         r = PTR_ERR(u.lapic);
2570                         goto out;
2571                 }
2572
2573                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2574                 if (r)
2575                         goto out;
2576                 r = 0;
2577                 break;
2578         }
2579         case KVM_INTERRUPT: {
2580                 struct kvm_interrupt irq;
2581
2582                 r = -EFAULT;
2583                 if (copy_from_user(&irq, argp, sizeof irq))
2584                         goto out;
2585                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2586                 if (r)
2587                         goto out;
2588                 r = 0;
2589                 break;
2590         }
2591         case KVM_NMI: {
2592                 r = kvm_vcpu_ioctl_nmi(vcpu);
2593                 if (r)
2594                         goto out;
2595                 r = 0;
2596                 break;
2597         }
2598         case KVM_SET_CPUID: {
2599                 struct kvm_cpuid __user *cpuid_arg = argp;
2600                 struct kvm_cpuid cpuid;
2601
2602                 r = -EFAULT;
2603                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2604                         goto out;
2605                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2606                 if (r)
2607                         goto out;
2608                 break;
2609         }
2610         case KVM_SET_CPUID2: {
2611                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2612                 struct kvm_cpuid2 cpuid;
2613
2614                 r = -EFAULT;
2615                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2616                         goto out;
2617                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2618                                               cpuid_arg->entries);
2619                 if (r)
2620                         goto out;
2621                 break;
2622         }
2623         case KVM_GET_CPUID2: {
2624                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2625                 struct kvm_cpuid2 cpuid;
2626
2627                 r = -EFAULT;
2628                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2629                         goto out;
2630                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2631                                               cpuid_arg->entries);
2632                 if (r)
2633                         goto out;
2634                 r = -EFAULT;
2635                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2636                         goto out;
2637                 r = 0;
2638                 break;
2639         }
2640         case KVM_GET_MSRS:
2641                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2642                 break;
2643         case KVM_SET_MSRS:
2644                 r = msr_io(vcpu, argp, do_set_msr, 0);
2645                 break;
2646         case KVM_TPR_ACCESS_REPORTING: {
2647                 struct kvm_tpr_access_ctl tac;
2648
2649                 r = -EFAULT;
2650                 if (copy_from_user(&tac, argp, sizeof tac))
2651                         goto out;
2652                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2653                 if (r)
2654                         goto out;
2655                 r = -EFAULT;
2656                 if (copy_to_user(argp, &tac, sizeof tac))
2657                         goto out;
2658                 r = 0;
2659                 break;
2660         };
2661         case KVM_SET_VAPIC_ADDR: {
2662                 struct kvm_vapic_addr va;
2663
2664                 r = -EINVAL;
2665                 if (!irqchip_in_kernel(vcpu->kvm))
2666                         goto out;
2667                 r = -EFAULT;
2668                 if (copy_from_user(&va, argp, sizeof va))
2669                         goto out;
2670                 r = 0;
2671                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2672                 break;
2673         }
2674         case KVM_X86_SETUP_MCE: {
2675                 u64 mcg_cap;
2676
2677                 r = -EFAULT;
2678                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2679                         goto out;
2680                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2681                 break;
2682         }
2683         case KVM_X86_SET_MCE: {
2684                 struct kvm_x86_mce mce;
2685
2686                 r = -EFAULT;
2687                 if (copy_from_user(&mce, argp, sizeof mce))
2688                         goto out;
2689                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2690                 break;
2691         }
2692         case KVM_GET_VCPU_EVENTS: {
2693                 struct kvm_vcpu_events events;
2694
2695                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2696
2697                 r = -EFAULT;
2698                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2699                         break;
2700                 r = 0;
2701                 break;
2702         }
2703         case KVM_SET_VCPU_EVENTS: {
2704                 struct kvm_vcpu_events events;
2705
2706                 r = -EFAULT;
2707                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2708                         break;
2709
2710                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2711                 break;
2712         }
2713         case KVM_GET_DEBUGREGS: {
2714                 struct kvm_debugregs dbgregs;
2715
2716                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2717
2718                 r = -EFAULT;
2719                 if (copy_to_user(argp, &dbgregs,
2720                                  sizeof(struct kvm_debugregs)))
2721                         break;
2722                 r = 0;
2723                 break;
2724         }
2725         case KVM_SET_DEBUGREGS: {
2726                 struct kvm_debugregs dbgregs;
2727
2728                 r = -EFAULT;
2729                 if (copy_from_user(&dbgregs, argp,
2730                                    sizeof(struct kvm_debugregs)))
2731                         break;
2732
2733                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2734                 break;
2735         }
2736         case KVM_GET_XSAVE: {
2737                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2738                 r = -ENOMEM;
2739                 if (!u.xsave)
2740                         break;
2741
2742                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2743
2744                 r = -EFAULT;
2745                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2746                         break;
2747                 r = 0;
2748                 break;
2749         }
2750         case KVM_SET_XSAVE: {
2751                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2752                 if (IS_ERR(u.xsave)) {
2753                         r = PTR_ERR(u.xsave);
2754                         goto out;
2755                 }
2756
2757                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2758                 break;
2759         }
2760         case KVM_GET_XCRS: {
2761                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2762                 r = -ENOMEM;
2763                 if (!u.xcrs)
2764                         break;
2765
2766                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2767
2768                 r = -EFAULT;
2769                 if (copy_to_user(argp, u.xcrs,
2770                                  sizeof(struct kvm_xcrs)))
2771                         break;
2772                 r = 0;
2773                 break;
2774         }
2775         case KVM_SET_XCRS: {
2776                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2777                 if (IS_ERR(u.xcrs)) {
2778                         r = PTR_ERR(u.xcrs);
2779                         goto out;
2780                 }
2781
2782                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2783                 break;
2784         }
2785         case KVM_SET_TSC_KHZ: {
2786                 u32 user_tsc_khz;
2787
2788                 r = -EINVAL;
2789                 if (!kvm_has_tsc_control)
2790                         break;
2791
2792                 user_tsc_khz = (u32)arg;
2793
2794                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2795                         goto out;
2796
2797                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
2798
2799                 r = 0;
2800                 goto out;
2801         }
2802         case KVM_GET_TSC_KHZ: {
2803                 r = -EIO;
2804                 if (check_tsc_unstable())
2805                         goto out;
2806
2807                 r = vcpu_tsc_khz(vcpu);
2808
2809                 goto out;
2810         }
2811         default:
2812                 r = -EINVAL;
2813         }
2814 out:
2815         kfree(u.buffer);
2816         return r;
2817 }
2818
2819 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2820 {
2821         int ret;
2822
2823         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2824                 return -1;
2825         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2826         return ret;
2827 }
2828
2829 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2830                                               u64 ident_addr)
2831 {
2832         kvm->arch.ept_identity_map_addr = ident_addr;
2833         return 0;
2834 }
2835
2836 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2837                                           u32 kvm_nr_mmu_pages)
2838 {
2839         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2840                 return -EINVAL;
2841
2842         mutex_lock(&kvm->slots_lock);
2843         spin_lock(&kvm->mmu_lock);
2844
2845         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2846         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2847
2848         spin_unlock(&kvm->mmu_lock);
2849         mutex_unlock(&kvm->slots_lock);
2850         return 0;
2851 }
2852
2853 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2854 {
2855         return kvm->arch.n_max_mmu_pages;
2856 }
2857
2858 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2859 {
2860         int r;
2861
2862         r = 0;
2863         switch (chip->chip_id) {
2864         case KVM_IRQCHIP_PIC_MASTER:
2865                 memcpy(&chip->chip.pic,
2866                         &pic_irqchip(kvm)->pics[0],
2867                         sizeof(struct kvm_pic_state));
2868                 break;
2869         case KVM_IRQCHIP_PIC_SLAVE:
2870                 memcpy(&chip->chip.pic,
2871                         &pic_irqchip(kvm)->pics[1],
2872                         sizeof(struct kvm_pic_state));
2873                 break;
2874         case KVM_IRQCHIP_IOAPIC:
2875                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2876                 break;
2877         default:
2878                 r = -EINVAL;
2879                 break;
2880         }
2881         return r;
2882 }
2883
2884 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2885 {
2886         int r;
2887
2888         r = 0;
2889         switch (chip->chip_id) {
2890         case KVM_IRQCHIP_PIC_MASTER:
2891                 spin_lock(&pic_irqchip(kvm)->lock);
2892                 memcpy(&pic_irqchip(kvm)->pics[0],
2893                         &chip->chip.pic,
2894                         sizeof(struct kvm_pic_state));
2895                 spin_unlock(&pic_irqchip(kvm)->lock);
2896                 break;
2897         case KVM_IRQCHIP_PIC_SLAVE:
2898                 spin_lock(&pic_irqchip(kvm)->lock);
2899                 memcpy(&pic_irqchip(kvm)->pics[1],
2900                         &chip->chip.pic,
2901                         sizeof(struct kvm_pic_state));
2902                 spin_unlock(&pic_irqchip(kvm)->lock);
2903                 break;
2904         case KVM_IRQCHIP_IOAPIC:
2905                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2906                 break;
2907         default:
2908                 r = -EINVAL;
2909                 break;
2910         }
2911         kvm_pic_update_irq(pic_irqchip(kvm));
2912         return r;
2913 }
2914
2915 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2916 {
2917         int r = 0;
2918
2919         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2920         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2921         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2922         return r;
2923 }
2924
2925 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2926 {
2927         int r = 0;
2928
2929         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2930         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2931         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2932         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2933         return r;
2934 }
2935
2936 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2937 {
2938         int r = 0;
2939
2940         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2941         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2942                 sizeof(ps->channels));
2943         ps->flags = kvm->arch.vpit->pit_state.flags;
2944         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2945         memset(&ps->reserved, 0, sizeof(ps->reserved));
2946         return r;
2947 }
2948
2949 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2950 {
2951         int r = 0, start = 0;
2952         u32 prev_legacy, cur_legacy;
2953         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2954         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2955         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2956         if (!prev_legacy && cur_legacy)
2957                 start = 1;
2958         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2959                sizeof(kvm->arch.vpit->pit_state.channels));
2960         kvm->arch.vpit->pit_state.flags = ps->flags;
2961         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2962         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2963         return r;
2964 }
2965
2966 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
2967                                  struct kvm_reinject_control *control)
2968 {
2969         if (!kvm->arch.vpit)
2970                 return -ENXIO;
2971         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2972         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
2973         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2974         return 0;
2975 }
2976
2977 /**
2978  * write_protect_slot - write protect a slot for dirty logging
2979  * @kvm: the kvm instance
2980  * @memslot: the slot we protect
2981  * @dirty_bitmap: the bitmap indicating which pages are dirty
2982  * @nr_dirty_pages: the number of dirty pages
2983  *
2984  * We have two ways to find all sptes to protect:
2985  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
2986  *    checks ones that have a spte mapping a page in the slot.
2987  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
2988  *
2989  * Generally speaking, if there are not so many dirty pages compared to the
2990  * number of shadow pages, we should use the latter.
2991  *
2992  * Note that letting others write into a page marked dirty in the old bitmap
2993  * by using the remaining tlb entry is not a problem.  That page will become
2994  * write protected again when we flush the tlb and then be reported dirty to
2995  * the user space by copying the old bitmap.
2996  */
2997 static void write_protect_slot(struct kvm *kvm,
2998                                struct kvm_memory_slot *memslot,
2999                                unsigned long *dirty_bitmap,
3000                                unsigned long nr_dirty_pages)
3001 {
3002         /* Not many dirty pages compared to # of shadow pages. */
3003         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3004                 unsigned long gfn_offset;
3005
3006                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3007                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3008
3009                         spin_lock(&kvm->mmu_lock);
3010                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3011                         spin_unlock(&kvm->mmu_lock);
3012                 }
3013                 kvm_flush_remote_tlbs(kvm);
3014         } else {
3015                 spin_lock(&kvm->mmu_lock);
3016                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3017                 spin_unlock(&kvm->mmu_lock);
3018         }
3019 }
3020
3021 /*
3022  * Get (and clear) the dirty memory log for a memory slot.
3023  */
3024 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3025                                       struct kvm_dirty_log *log)
3026 {
3027         int r;
3028         struct kvm_memory_slot *memslot;
3029         unsigned long n, nr_dirty_pages;
3030
3031         mutex_lock(&kvm->slots_lock);
3032
3033         r = -EINVAL;
3034         if (log->slot >= KVM_MEMORY_SLOTS)
3035                 goto out;
3036
3037         memslot = id_to_memslot(kvm->memslots, log->slot);
3038         r = -ENOENT;
3039         if (!memslot->dirty_bitmap)
3040                 goto out;
3041
3042         n = kvm_dirty_bitmap_bytes(memslot);
3043         nr_dirty_pages = memslot->nr_dirty_pages;
3044
3045         /* If nothing is dirty, don't bother messing with page tables. */
3046         if (nr_dirty_pages) {
3047                 struct kvm_memslots *slots, *old_slots;
3048                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3049
3050                 dirty_bitmap = memslot->dirty_bitmap;
3051                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3052                 if (dirty_bitmap == dirty_bitmap_head)
3053                         dirty_bitmap_head += n / sizeof(long);
3054                 memset(dirty_bitmap_head, 0, n);
3055
3056                 r = -ENOMEM;
3057                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3058                 if (!slots)
3059                         goto out;
3060
3061                 memslot = id_to_memslot(slots, log->slot);
3062                 memslot->nr_dirty_pages = 0;
3063                 memslot->dirty_bitmap = dirty_bitmap_head;
3064                 update_memslots(slots, NULL);
3065
3066                 old_slots = kvm->memslots;
3067                 rcu_assign_pointer(kvm->memslots, slots);
3068                 synchronize_srcu_expedited(&kvm->srcu);
3069                 kfree(old_slots);
3070
3071                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3072
3073                 r = -EFAULT;
3074                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3075                         goto out;
3076         } else {
3077                 r = -EFAULT;
3078                 if (clear_user(log->dirty_bitmap, n))
3079                         goto out;
3080         }
3081
3082         r = 0;
3083 out:
3084         mutex_unlock(&kvm->slots_lock);
3085         return r;
3086 }
3087
3088 long kvm_arch_vm_ioctl(struct file *filp,
3089                        unsigned int ioctl, unsigned long arg)
3090 {
3091         struct kvm *kvm = filp->private_data;
3092         void __user *argp = (void __user *)arg;
3093         int r = -ENOTTY;
3094         /*
3095          * This union makes it completely explicit to gcc-3.x
3096          * that these two variables' stack usage should be
3097          * combined, not added together.
3098          */
3099         union {
3100                 struct kvm_pit_state ps;
3101                 struct kvm_pit_state2 ps2;
3102                 struct kvm_pit_config pit_config;
3103         } u;
3104
3105         switch (ioctl) {
3106         case KVM_SET_TSS_ADDR:
3107                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3108                 if (r < 0)
3109                         goto out;
3110                 break;
3111         case KVM_SET_IDENTITY_MAP_ADDR: {
3112                 u64 ident_addr;
3113
3114                 r = -EFAULT;
3115                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3116                         goto out;
3117                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3118                 if (r < 0)
3119                         goto out;
3120                 break;
3121         }
3122         case KVM_SET_NR_MMU_PAGES:
3123                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3124                 if (r)
3125                         goto out;
3126                 break;
3127         case KVM_GET_NR_MMU_PAGES:
3128                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3129                 break;
3130         case KVM_CREATE_IRQCHIP: {
3131                 struct kvm_pic *vpic;
3132
3133                 mutex_lock(&kvm->lock);
3134                 r = -EEXIST;
3135                 if (kvm->arch.vpic)
3136                         goto create_irqchip_unlock;
3137                 r = -ENOMEM;
3138                 vpic = kvm_create_pic(kvm);
3139                 if (vpic) {
3140                         r = kvm_ioapic_init(kvm);
3141                         if (r) {
3142                                 mutex_lock(&kvm->slots_lock);
3143                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3144                                                           &vpic->dev_master);
3145                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3146                                                           &vpic->dev_slave);
3147                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3148                                                           &vpic->dev_eclr);
3149                                 mutex_unlock(&kvm->slots_lock);
3150                                 kfree(vpic);
3151                                 goto create_irqchip_unlock;
3152                         }
3153                 } else
3154                         goto create_irqchip_unlock;
3155                 smp_wmb();
3156                 kvm->arch.vpic = vpic;
3157                 smp_wmb();
3158                 r = kvm_setup_default_irq_routing(kvm);
3159                 if (r) {
3160                         mutex_lock(&kvm->slots_lock);
3161                         mutex_lock(&kvm->irq_lock);
3162                         kvm_ioapic_destroy(kvm);
3163                         kvm_destroy_pic(kvm);
3164                         mutex_unlock(&kvm->irq_lock);
3165                         mutex_unlock(&kvm->slots_lock);
3166                 }
3167         create_irqchip_unlock:
3168                 mutex_unlock(&kvm->lock);
3169                 break;
3170         }
3171         case KVM_CREATE_PIT:
3172                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3173                 goto create_pit;
3174         case KVM_CREATE_PIT2:
3175                 r = -EFAULT;
3176                 if (copy_from_user(&u.pit_config, argp,
3177                                    sizeof(struct kvm_pit_config)))
3178                         goto out;
3179         create_pit:
3180                 mutex_lock(&kvm->slots_lock);
3181                 r = -EEXIST;
3182                 if (kvm->arch.vpit)
3183                         goto create_pit_unlock;
3184                 r = -ENOMEM;
3185                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3186                 if (kvm->arch.vpit)
3187                         r = 0;
3188         create_pit_unlock:
3189                 mutex_unlock(&kvm->slots_lock);
3190                 break;
3191         case KVM_IRQ_LINE_STATUS:
3192         case KVM_IRQ_LINE: {
3193                 struct kvm_irq_level irq_event;
3194
3195                 r = -EFAULT;
3196                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3197                         goto out;
3198                 r = -ENXIO;
3199                 if (irqchip_in_kernel(kvm)) {
3200                         __s32 status;
3201                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3202                                         irq_event.irq, irq_event.level);
3203                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3204                                 r = -EFAULT;
3205                                 irq_event.status = status;
3206                                 if (copy_to_user(argp, &irq_event,
3207                                                         sizeof irq_event))
3208                                         goto out;
3209                         }
3210                         r = 0;
3211                 }
3212                 break;
3213         }
3214         case KVM_GET_IRQCHIP: {
3215                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3216                 struct kvm_irqchip *chip;
3217
3218                 chip = memdup_user(argp, sizeof(*chip));
3219                 if (IS_ERR(chip)) {
3220                         r = PTR_ERR(chip);
3221                         goto out;
3222                 }
3223
3224                 r = -ENXIO;
3225                 if (!irqchip_in_kernel(kvm))
3226                         goto get_irqchip_out;
3227                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3228                 if (r)
3229                         goto get_irqchip_out;
3230                 r = -EFAULT;
3231                 if (copy_to_user(argp, chip, sizeof *chip))
3232                         goto get_irqchip_out;
3233                 r = 0;
3234         get_irqchip_out:
3235                 kfree(chip);
3236                 if (r)
3237                         goto out;
3238                 break;
3239         }
3240         case KVM_SET_IRQCHIP: {
3241                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3242                 struct kvm_irqchip *chip;
3243
3244                 chip = memdup_user(argp, sizeof(*chip));
3245                 if (IS_ERR(chip)) {
3246                         r = PTR_ERR(chip);
3247                         goto out;
3248                 }
3249
3250                 r = -ENXIO;
3251                 if (!irqchip_in_kernel(kvm))
3252                         goto set_irqchip_out;
3253                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3254                 if (r)
3255                         goto set_irqchip_out;
3256                 r = 0;
3257         set_irqchip_out:
3258                 kfree(chip);
3259                 if (r)
3260                         goto out;
3261                 break;
3262         }
3263         case KVM_GET_PIT: {
3264                 r = -EFAULT;
3265                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3266                         goto out;
3267                 r = -ENXIO;
3268                 if (!kvm->arch.vpit)
3269                         goto out;
3270                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3271                 if (r)
3272                         goto out;
3273                 r = -EFAULT;
3274                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3275                         goto out;
3276                 r = 0;
3277                 break;
3278         }
3279         case KVM_SET_PIT: {
3280                 r = -EFAULT;
3281                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3282                         goto out;
3283                 r = -ENXIO;
3284                 if (!kvm->arch.vpit)
3285                         goto out;
3286                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3287                 if (r)
3288                         goto out;
3289                 r = 0;
3290                 break;
3291         }
3292         case KVM_GET_PIT2: {
3293                 r = -ENXIO;
3294                 if (!kvm->arch.vpit)
3295                         goto out;
3296                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3297                 if (r)
3298                         goto out;
3299                 r = -EFAULT;
3300                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3301                         goto out;
3302                 r = 0;
3303                 break;
3304         }
3305         case KVM_SET_PIT2: {
3306                 r = -EFAULT;
3307                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3308                         goto out;
3309                 r = -ENXIO;
3310                 if (!kvm->arch.vpit)
3311                         goto out;
3312                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3313                 if (r)
3314                         goto out;
3315                 r = 0;
3316                 break;
3317         }
3318         case KVM_REINJECT_CONTROL: {
3319                 struct kvm_reinject_control control;
3320                 r =  -EFAULT;
3321                 if (copy_from_user(&control, argp, sizeof(control)))
3322                         goto out;
3323                 r = kvm_vm_ioctl_reinject(kvm, &control);
3324                 if (r)
3325                         goto out;
3326                 r = 0;
3327                 break;
3328         }
3329         case KVM_XEN_HVM_CONFIG: {
3330                 r = -EFAULT;
3331                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3332                                    sizeof(struct kvm_xen_hvm_config)))
3333                         goto out;
3334                 r = -EINVAL;
3335                 if (kvm->arch.xen_hvm_config.flags)
3336                         goto out;
3337                 r = 0;
3338                 break;
3339         }
3340         case KVM_SET_CLOCK: {
3341                 struct kvm_clock_data user_ns;
3342                 u64 now_ns;
3343                 s64 delta;
3344
3345                 r = -EFAULT;
3346                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3347                         goto out;
3348
3349                 r = -EINVAL;
3350                 if (user_ns.flags)
3351                         goto out;
3352
3353                 r = 0;
3354                 local_irq_disable();
3355                 now_ns = get_kernel_ns();
3356                 delta = user_ns.clock - now_ns;
3357                 local_irq_enable();
3358                 kvm->arch.kvmclock_offset = delta;
3359                 break;
3360         }
3361         case KVM_GET_CLOCK: {
3362                 struct kvm_clock_data user_ns;
3363                 u64 now_ns;
3364
3365                 local_irq_disable();
3366                 now_ns = get_kernel_ns();
3367                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3368                 local_irq_enable();
3369                 user_ns.flags = 0;
3370                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3371
3372                 r = -EFAULT;
3373                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3374                         goto out;
3375                 r = 0;
3376                 break;
3377         }
3378
3379         default:
3380                 ;
3381         }
3382 out:
3383         return r;
3384 }
3385
3386 static void kvm_init_msr_list(void)
3387 {
3388         u32 dummy[2];
3389         unsigned i, j;
3390
3391         /* skip the first msrs in the list. KVM-specific */
3392         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3393                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3394                         continue;
3395                 if (j < i)
3396                         msrs_to_save[j] = msrs_to_save[i];
3397                 j++;
3398         }
3399         num_msrs_to_save = j;
3400 }
3401
3402 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3403                            const void *v)
3404 {
3405         int handled = 0;
3406         int n;
3407
3408         do {
3409                 n = min(len, 8);
3410                 if (!(vcpu->arch.apic &&
3411                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3412                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3413                         break;
3414                 handled += n;
3415                 addr += n;
3416                 len -= n;
3417                 v += n;
3418         } while (len);
3419
3420         return handled;
3421 }
3422
3423 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3424 {
3425         int handled = 0;
3426         int n;
3427
3428         do {
3429                 n = min(len, 8);
3430                 if (!(vcpu->arch.apic &&
3431                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3432                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3433                         break;
3434                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3435                 handled += n;
3436                 addr += n;
3437                 len -= n;
3438                 v += n;
3439         } while (len);
3440
3441         return handled;
3442 }
3443
3444 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3445                         struct kvm_segment *var, int seg)
3446 {
3447         kvm_x86_ops->set_segment(vcpu, var, seg);
3448 }
3449
3450 void kvm_get_segment(struct kvm_vcpu *vcpu,
3451                      struct kvm_segment *var, int seg)
3452 {
3453         kvm_x86_ops->get_segment(vcpu, var, seg);
3454 }
3455
3456 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3457 {
3458         gpa_t t_gpa;
3459         struct x86_exception exception;
3460
3461         BUG_ON(!mmu_is_nested(vcpu));
3462
3463         /* NPT walks are always user-walks */
3464         access |= PFERR_USER_MASK;
3465         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3466
3467         return t_gpa;
3468 }
3469
3470 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3471                               struct x86_exception *exception)
3472 {
3473         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3474         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3475 }
3476
3477  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3478                                 struct x86_exception *exception)
3479 {
3480         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3481         access |= PFERR_FETCH_MASK;
3482         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3483 }
3484
3485 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3486                                struct x86_exception *exception)
3487 {
3488         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3489         access |= PFERR_WRITE_MASK;
3490         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3491 }
3492
3493 /* uses this to access any guest's mapped memory without checking CPL */
3494 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3495                                 struct x86_exception *exception)
3496 {
3497         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3498 }
3499
3500 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3501                                       struct kvm_vcpu *vcpu, u32 access,
3502                                       struct x86_exception *exception)
3503 {
3504         void *data = val;
3505         int r = X86EMUL_CONTINUE;
3506
3507         while (bytes) {
3508                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3509                                                             exception);
3510                 unsigned offset = addr & (PAGE_SIZE-1);
3511                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3512                 int ret;
3513
3514                 if (gpa == UNMAPPED_GVA)
3515                         return X86EMUL_PROPAGATE_FAULT;
3516                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3517                 if (ret < 0) {
3518                         r = X86EMUL_IO_NEEDED;
3519                         goto out;
3520                 }
3521
3522                 bytes -= toread;
3523                 data += toread;
3524                 addr += toread;
3525         }
3526 out:
3527         return r;
3528 }
3529
3530 /* used for instruction fetching */
3531 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3532                                 gva_t addr, void *val, unsigned int bytes,
3533                                 struct x86_exception *exception)
3534 {
3535         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3536         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3537
3538         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3539                                           access | PFERR_FETCH_MASK,
3540                                           exception);
3541 }
3542
3543 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3544                                gva_t addr, void *val, unsigned int bytes,
3545                                struct x86_exception *exception)
3546 {
3547         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3548         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3549
3550         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3551                                           exception);
3552 }
3553 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3554
3555 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3556                                       gva_t addr, void *val, unsigned int bytes,
3557                                       struct x86_exception *exception)
3558 {
3559         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3560         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3561 }
3562
3563 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3564                                        gva_t addr, void *val,
3565                                        unsigned int bytes,
3566                                        struct x86_exception *exception)
3567 {
3568         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3569         void *data = val;
3570         int r = X86EMUL_CONTINUE;
3571
3572         while (bytes) {
3573                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3574                                                              PFERR_WRITE_MASK,
3575                                                              exception);
3576                 unsigned offset = addr & (PAGE_SIZE-1);
3577                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3578                 int ret;
3579
3580                 if (gpa == UNMAPPED_GVA)
3581                         return X86EMUL_PROPAGATE_FAULT;
3582                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3583                 if (ret < 0) {
3584                         r = X86EMUL_IO_NEEDED;
3585                         goto out;
3586                 }
3587
3588                 bytes -= towrite;
3589                 data += towrite;
3590                 addr += towrite;
3591         }
3592 out:
3593         return r;
3594 }
3595 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3596
3597 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3598                                 gpa_t *gpa, struct x86_exception *exception,
3599                                 bool write)
3600 {
3601         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3602
3603         if (vcpu_match_mmio_gva(vcpu, gva) &&
3604                   check_write_user_access(vcpu, write, access,
3605                   vcpu->arch.access)) {
3606                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3607                                         (gva & (PAGE_SIZE - 1));
3608                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3609                 return 1;
3610         }
3611
3612         if (write)
3613                 access |= PFERR_WRITE_MASK;
3614
3615         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3616
3617         if (*gpa == UNMAPPED_GVA)
3618                 return -1;
3619
3620         /* For APIC access vmexit */
3621         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3622                 return 1;
3623
3624         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3625                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3626                 return 1;
3627         }
3628
3629         return 0;
3630 }
3631
3632 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3633                         const void *val, int bytes)
3634 {
3635         int ret;
3636
3637         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3638         if (ret < 0)
3639                 return 0;
3640         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3641         return 1;
3642 }
3643
3644 struct read_write_emulator_ops {
3645         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3646                                   int bytes);
3647         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3648                                   void *val, int bytes);
3649         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3650                                int bytes, void *val);
3651         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3652                                     void *val, int bytes);
3653         bool write;
3654 };
3655
3656 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3657 {
3658         if (vcpu->mmio_read_completed) {
3659                 memcpy(val, vcpu->mmio_data, bytes);
3660                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3661                                vcpu->mmio_phys_addr, *(u64 *)val);
3662                 vcpu->mmio_read_completed = 0;
3663                 return 1;
3664         }
3665
3666         return 0;
3667 }
3668
3669 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3670                         void *val, int bytes)
3671 {
3672         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3673 }
3674
3675 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3676                          void *val, int bytes)
3677 {
3678         return emulator_write_phys(vcpu, gpa, val, bytes);
3679 }
3680
3681 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3682 {
3683         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3684         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3685 }
3686
3687 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3688                           void *val, int bytes)
3689 {
3690         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3691         return X86EMUL_IO_NEEDED;
3692 }
3693
3694 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3695                            void *val, int bytes)
3696 {
3697         memcpy(vcpu->mmio_data, val, bytes);
3698         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3699         return X86EMUL_CONTINUE;
3700 }
3701
3702 static struct read_write_emulator_ops read_emultor = {
3703         .read_write_prepare = read_prepare,
3704         .read_write_emulate = read_emulate,
3705         .read_write_mmio = vcpu_mmio_read,
3706         .read_write_exit_mmio = read_exit_mmio,
3707 };
3708
3709 static struct read_write_emulator_ops write_emultor = {
3710         .read_write_emulate = write_emulate,
3711         .read_write_mmio = write_mmio,
3712         .read_write_exit_mmio = write_exit_mmio,
3713         .write = true,
3714 };
3715
3716 static int emulator_read_write_onepage(unsigned long addr, void *val,
3717                                        unsigned int bytes,
3718                                        struct x86_exception *exception,
3719                                        struct kvm_vcpu *vcpu,
3720                                        struct read_write_emulator_ops *ops)
3721 {
3722         gpa_t gpa;
3723         int handled, ret;
3724         bool write = ops->write;
3725
3726         if (ops->read_write_prepare &&
3727                   ops->read_write_prepare(vcpu, val, bytes))
3728                 return X86EMUL_CONTINUE;
3729
3730         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3731
3732         if (ret < 0)
3733                 return X86EMUL_PROPAGATE_FAULT;
3734
3735         /* For APIC access vmexit */
3736         if (ret)
3737                 goto mmio;
3738
3739         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3740                 return X86EMUL_CONTINUE;
3741
3742 mmio:
3743         /*
3744          * Is this MMIO handled locally?
3745          */
3746         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3747         if (handled == bytes)
3748                 return X86EMUL_CONTINUE;
3749
3750         gpa += handled;
3751         bytes -= handled;
3752         val += handled;
3753
3754         vcpu->mmio_needed = 1;
3755         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3756         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3757         vcpu->mmio_size = bytes;
3758         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3759         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3760         vcpu->mmio_index = 0;
3761
3762         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3763 }
3764
3765 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3766                         void *val, unsigned int bytes,
3767                         struct x86_exception *exception,
3768                         struct read_write_emulator_ops *ops)
3769 {
3770         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3771
3772         /* Crossing a page boundary? */
3773         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3774                 int rc, now;
3775
3776                 now = -addr & ~PAGE_MASK;
3777                 rc = emulator_read_write_onepage(addr, val, now, exception,
3778                                                  vcpu, ops);
3779
3780                 if (rc != X86EMUL_CONTINUE)
3781                         return rc;
3782                 addr += now;
3783                 val += now;
3784                 bytes -= now;
3785         }
3786
3787         return emulator_read_write_onepage(addr, val, bytes, exception,
3788                                            vcpu, ops);
3789 }
3790
3791 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3792                                   unsigned long addr,
3793                                   void *val,
3794                                   unsigned int bytes,
3795                                   struct x86_exception *exception)
3796 {
3797         return emulator_read_write(ctxt, addr, val, bytes,
3798                                    exception, &read_emultor);
3799 }
3800
3801 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3802                             unsigned long addr,
3803                             const void *val,
3804                             unsigned int bytes,
3805                             struct x86_exception *exception)
3806 {
3807         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3808                                    exception, &write_emultor);
3809 }
3810
3811 #define CMPXCHG_TYPE(t, ptr, old, new) \
3812         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3813
3814 #ifdef CONFIG_X86_64
3815 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3816 #else
3817 #  define CMPXCHG64(ptr, old, new) \
3818         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3819 #endif
3820
3821 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3822                                      unsigned long addr,
3823                                      const void *old,
3824                                      const void *new,
3825                                      unsigned int bytes,
3826                                      struct x86_exception *exception)
3827 {
3828         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3829         gpa_t gpa;
3830         struct page *page;
3831         char *kaddr;
3832         bool exchanged;
3833
3834         /* guests cmpxchg8b have to be emulated atomically */
3835         if (bytes > 8 || (bytes & (bytes - 1)))
3836                 goto emul_write;
3837
3838         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3839
3840         if (gpa == UNMAPPED_GVA ||
3841             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3842                 goto emul_write;
3843
3844         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3845                 goto emul_write;
3846
3847         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3848         if (is_error_page(page)) {
3849                 kvm_release_page_clean(page);
3850                 goto emul_write;
3851         }
3852
3853         kaddr = kmap_atomic(page, KM_USER0);
3854         kaddr += offset_in_page(gpa);
3855         switch (bytes) {
3856         case 1:
3857                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3858                 break;
3859         case 2:
3860                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3861                 break;
3862         case 4:
3863                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3864                 break;
3865         case 8:
3866                 exchanged = CMPXCHG64(kaddr, old, new);
3867                 break;
3868         default:
3869                 BUG();
3870         }
3871         kunmap_atomic(kaddr, KM_USER0);
3872         kvm_release_page_dirty(page);
3873
3874         if (!exchanged)
3875                 return X86EMUL_CMPXCHG_FAILED;
3876
3877         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3878
3879         return X86EMUL_CONTINUE;
3880
3881 emul_write:
3882         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3883
3884         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3885 }
3886
3887 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3888 {
3889         /* TODO: String I/O for in kernel device */
3890         int r;
3891
3892         if (vcpu->arch.pio.in)
3893                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3894                                     vcpu->arch.pio.size, pd);
3895         else
3896                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3897                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3898                                      pd);
3899         return r;
3900 }
3901
3902 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3903                                unsigned short port, void *val,
3904                                unsigned int count, bool in)
3905 {
3906         trace_kvm_pio(!in, port, size, count);
3907
3908         vcpu->arch.pio.port = port;
3909         vcpu->arch.pio.in = in;
3910         vcpu->arch.pio.count  = count;
3911         vcpu->arch.pio.size = size;
3912
3913         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3914                 vcpu->arch.pio.count = 0;
3915                 return 1;
3916         }
3917
3918         vcpu->run->exit_reason = KVM_EXIT_IO;
3919         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3920         vcpu->run->io.size = size;
3921         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3922         vcpu->run->io.count = count;
3923         vcpu->run->io.port = port;
3924
3925         return 0;
3926 }
3927
3928 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3929                                     int size, unsigned short port, void *val,
3930                                     unsigned int count)
3931 {
3932         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3933         int ret;
3934
3935         if (vcpu->arch.pio.count)
3936                 goto data_avail;
3937
3938         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3939         if (ret) {
3940 data_avail:
3941                 memcpy(val, vcpu->arch.pio_data, size * count);
3942                 vcpu->arch.pio.count = 0;
3943                 return 1;
3944         }
3945
3946         return 0;
3947 }
3948
3949 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3950                                      int size, unsigned short port,
3951                                      const void *val, unsigned int count)
3952 {
3953         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3954
3955         memcpy(vcpu->arch.pio_data, val, size * count);
3956         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3957 }
3958
3959 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3960 {
3961         return kvm_x86_ops->get_segment_base(vcpu, seg);
3962 }
3963
3964 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3965 {
3966         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
3967 }
3968
3969 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3970 {
3971         if (!need_emulate_wbinvd(vcpu))
3972                 return X86EMUL_CONTINUE;
3973
3974         if (kvm_x86_ops->has_wbinvd_exit()) {
3975                 int cpu = get_cpu();
3976
3977                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3978                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3979                                 wbinvd_ipi, NULL, 1);
3980                 put_cpu();
3981                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3982         } else
3983                 wbinvd();
3984         return X86EMUL_CONTINUE;
3985 }
3986 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3987
3988 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
3989 {
3990         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
3991 }
3992
3993 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
3994 {
3995         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
3996 }
3997
3998 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
3999 {
4000
4001         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4002 }
4003
4004 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4005 {
4006         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4007 }
4008
4009 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4010 {
4011         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4012         unsigned long value;
4013
4014         switch (cr) {
4015         case 0:
4016                 value = kvm_read_cr0(vcpu);
4017                 break;
4018         case 2:
4019                 value = vcpu->arch.cr2;
4020                 break;
4021         case 3:
4022                 value = kvm_read_cr3(vcpu);
4023                 break;
4024         case 4:
4025                 value = kvm_read_cr4(vcpu);
4026                 break;
4027         case 8:
4028                 value = kvm_get_cr8(vcpu);
4029                 break;
4030         default:
4031                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4032                 return 0;
4033         }
4034
4035         return value;
4036 }
4037
4038 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4039 {
4040         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4041         int res = 0;
4042
4043         switch (cr) {
4044         case 0:
4045                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4046                 break;
4047         case 2:
4048                 vcpu->arch.cr2 = val;
4049                 break;
4050         case 3:
4051                 res = kvm_set_cr3(vcpu, val);
4052                 break;
4053         case 4:
4054                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4055                 break;
4056         case 8:
4057                 res = kvm_set_cr8(vcpu, val);
4058                 break;
4059         default:
4060                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4061                 res = -1;
4062         }
4063
4064         return res;
4065 }
4066
4067 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4068 {
4069         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4070 }
4071
4072 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4073 {
4074         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4075 }
4076
4077 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4078 {
4079         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4080 }
4081
4082 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4083 {
4084         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4085 }
4086
4087 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4088 {
4089         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4090 }
4091
4092 static unsigned long emulator_get_cached_segment_base(
4093         struct x86_emulate_ctxt *ctxt, int seg)
4094 {
4095         return get_segment_base(emul_to_vcpu(ctxt), seg);
4096 }
4097
4098 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4099                                  struct desc_struct *desc, u32 *base3,
4100                                  int seg)
4101 {
4102         struct kvm_segment var;
4103
4104         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4105         *selector = var.selector;
4106
4107         if (var.unusable)
4108                 return false;
4109
4110         if (var.g)
4111                 var.limit >>= 12;
4112         set_desc_limit(desc, var.limit);
4113         set_desc_base(desc, (unsigned long)var.base);
4114 #ifdef CONFIG_X86_64
4115         if (base3)
4116                 *base3 = var.base >> 32;
4117 #endif
4118         desc->type = var.type;
4119         desc->s = var.s;
4120         desc->dpl = var.dpl;
4121         desc->p = var.present;
4122         desc->avl = var.avl;
4123         desc->l = var.l;
4124         desc->d = var.db;
4125         desc->g = var.g;
4126
4127         return true;
4128 }
4129
4130 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4131                                  struct desc_struct *desc, u32 base3,
4132                                  int seg)
4133 {
4134         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4135         struct kvm_segment var;
4136
4137         var.selector = selector;
4138         var.base = get_desc_base(desc);
4139 #ifdef CONFIG_X86_64
4140         var.base |= ((u64)base3) << 32;
4141 #endif
4142         var.limit = get_desc_limit(desc);
4143         if (desc->g)
4144                 var.limit = (var.limit << 12) | 0xfff;
4145         var.type = desc->type;
4146         var.present = desc->p;
4147         var.dpl = desc->dpl;
4148         var.db = desc->d;
4149         var.s = desc->s;
4150         var.l = desc->l;
4151         var.g = desc->g;
4152         var.avl = desc->avl;
4153         var.present = desc->p;
4154         var.unusable = !var.present;
4155         var.padding = 0;
4156
4157         kvm_set_segment(vcpu, &var, seg);
4158         return;
4159 }
4160
4161 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4162                             u32 msr_index, u64 *pdata)
4163 {
4164         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4165 }
4166
4167 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4168                             u32 msr_index, u64 data)
4169 {
4170         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4171 }
4172
4173 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4174                              u32 pmc, u64 *pdata)
4175 {
4176         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4177 }
4178
4179 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4180 {
4181         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4182 }
4183
4184 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4185 {
4186         preempt_disable();
4187         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4188         /*
4189          * CR0.TS may reference the host fpu state, not the guest fpu state,
4190          * so it may be clear at this point.
4191          */
4192         clts();
4193 }
4194
4195 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4196 {
4197         preempt_enable();
4198 }
4199
4200 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4201                               struct x86_instruction_info *info,
4202                               enum x86_intercept_stage stage)
4203 {
4204         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4205 }
4206
4207 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4208                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4209 {
4210         struct kvm_cpuid_entry2 *cpuid = NULL;
4211
4212         if (eax && ecx)
4213                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4214                                             *eax, *ecx);
4215
4216         if (cpuid) {
4217                 *eax = cpuid->eax;
4218                 *ecx = cpuid->ecx;
4219                 if (ebx)
4220                         *ebx = cpuid->ebx;
4221                 if (edx)
4222                         *edx = cpuid->edx;
4223                 return true;
4224         }
4225
4226         return false;
4227 }
4228
4229 static struct x86_emulate_ops emulate_ops = {
4230         .read_std            = kvm_read_guest_virt_system,
4231         .write_std           = kvm_write_guest_virt_system,
4232         .fetch               = kvm_fetch_guest_virt,
4233         .read_emulated       = emulator_read_emulated,
4234         .write_emulated      = emulator_write_emulated,
4235         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4236         .invlpg              = emulator_invlpg,
4237         .pio_in_emulated     = emulator_pio_in_emulated,
4238         .pio_out_emulated    = emulator_pio_out_emulated,
4239         .get_segment         = emulator_get_segment,
4240         .set_segment         = emulator_set_segment,
4241         .get_cached_segment_base = emulator_get_cached_segment_base,
4242         .get_gdt             = emulator_get_gdt,
4243         .get_idt             = emulator_get_idt,
4244         .set_gdt             = emulator_set_gdt,
4245         .set_idt             = emulator_set_idt,
4246         .get_cr              = emulator_get_cr,
4247         .set_cr              = emulator_set_cr,
4248         .cpl                 = emulator_get_cpl,
4249         .get_dr              = emulator_get_dr,
4250         .set_dr              = emulator_set_dr,
4251         .set_msr             = emulator_set_msr,
4252         .get_msr             = emulator_get_msr,
4253         .read_pmc            = emulator_read_pmc,
4254         .halt                = emulator_halt,
4255         .wbinvd              = emulator_wbinvd,
4256         .fix_hypercall       = emulator_fix_hypercall,
4257         .get_fpu             = emulator_get_fpu,
4258         .put_fpu             = emulator_put_fpu,
4259         .intercept           = emulator_intercept,
4260         .get_cpuid           = emulator_get_cpuid,
4261 };
4262
4263 static void cache_all_regs(struct kvm_vcpu *vcpu)
4264 {
4265         kvm_register_read(vcpu, VCPU_REGS_RAX);
4266         kvm_register_read(vcpu, VCPU_REGS_RSP);
4267         kvm_register_read(vcpu, VCPU_REGS_RIP);
4268         vcpu->arch.regs_dirty = ~0;
4269 }
4270
4271 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4272 {
4273         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4274         /*
4275          * an sti; sti; sequence only disable interrupts for the first
4276          * instruction. So, if the last instruction, be it emulated or
4277          * not, left the system with the INT_STI flag enabled, it
4278          * means that the last instruction is an sti. We should not
4279          * leave the flag on in this case. The same goes for mov ss
4280          */
4281         if (!(int_shadow & mask))
4282                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4283 }
4284
4285 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4286 {
4287         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4288         if (ctxt->exception.vector == PF_VECTOR)
4289                 kvm_propagate_fault(vcpu, &ctxt->exception);
4290         else if (ctxt->exception.error_code_valid)
4291                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4292                                       ctxt->exception.error_code);
4293         else
4294                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4295 }
4296
4297 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4298                               const unsigned long *regs)
4299 {
4300         memset(&ctxt->twobyte, 0,
4301                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4302         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4303
4304         ctxt->fetch.start = 0;
4305         ctxt->fetch.end = 0;
4306         ctxt->io_read.pos = 0;
4307         ctxt->io_read.end = 0;
4308         ctxt->mem_read.pos = 0;
4309         ctxt->mem_read.end = 0;
4310 }
4311
4312 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4313 {
4314         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4315         int cs_db, cs_l;
4316
4317         /*
4318          * TODO: fix emulate.c to use guest_read/write_register
4319          * instead of direct ->regs accesses, can save hundred cycles
4320          * on Intel for instructions that don't read/change RSP, for
4321          * for example.
4322          */
4323         cache_all_regs(vcpu);
4324
4325         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4326
4327         ctxt->eflags = kvm_get_rflags(vcpu);
4328         ctxt->eip = kvm_rip_read(vcpu);
4329         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4330                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4331                      cs_l                               ? X86EMUL_MODE_PROT64 :
4332                      cs_db                              ? X86EMUL_MODE_PROT32 :
4333                                                           X86EMUL_MODE_PROT16;
4334         ctxt->guest_mode = is_guest_mode(vcpu);
4335
4336         init_decode_cache(ctxt, vcpu->arch.regs);
4337         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4338 }
4339
4340 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4341 {
4342         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4343         int ret;
4344
4345         init_emulate_ctxt(vcpu);
4346
4347         ctxt->op_bytes = 2;
4348         ctxt->ad_bytes = 2;
4349         ctxt->_eip = ctxt->eip + inc_eip;
4350         ret = emulate_int_real(ctxt, irq);
4351
4352         if (ret != X86EMUL_CONTINUE)
4353                 return EMULATE_FAIL;
4354
4355         ctxt->eip = ctxt->_eip;
4356         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4357         kvm_rip_write(vcpu, ctxt->eip);
4358         kvm_set_rflags(vcpu, ctxt->eflags);
4359
4360         if (irq == NMI_VECTOR)
4361                 vcpu->arch.nmi_pending = 0;
4362         else
4363                 vcpu->arch.interrupt.pending = false;
4364
4365         return EMULATE_DONE;
4366 }
4367 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4368
4369 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4370 {
4371         int r = EMULATE_DONE;
4372
4373         ++vcpu->stat.insn_emulation_fail;
4374         trace_kvm_emulate_insn_failed(vcpu);
4375         if (!is_guest_mode(vcpu)) {
4376                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4377                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4378                 vcpu->run->internal.ndata = 0;
4379                 r = EMULATE_FAIL;
4380         }
4381         kvm_queue_exception(vcpu, UD_VECTOR);
4382
4383         return r;
4384 }
4385
4386 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4387 {
4388         gpa_t gpa;
4389
4390         if (tdp_enabled)
4391                 return false;
4392
4393         /*
4394          * if emulation was due to access to shadowed page table
4395          * and it failed try to unshadow page and re-entetr the
4396          * guest to let CPU execute the instruction.
4397          */
4398         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4399                 return true;
4400
4401         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4402
4403         if (gpa == UNMAPPED_GVA)
4404                 return true; /* let cpu generate fault */
4405
4406         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4407                 return true;
4408
4409         return false;
4410 }
4411
4412 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4413                               unsigned long cr2,  int emulation_type)
4414 {
4415         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4416         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4417
4418         last_retry_eip = vcpu->arch.last_retry_eip;
4419         last_retry_addr = vcpu->arch.last_retry_addr;
4420
4421         /*
4422          * If the emulation is caused by #PF and it is non-page_table
4423          * writing instruction, it means the VM-EXIT is caused by shadow
4424          * page protected, we can zap the shadow page and retry this
4425          * instruction directly.
4426          *
4427          * Note: if the guest uses a non-page-table modifying instruction
4428          * on the PDE that points to the instruction, then we will unmap
4429          * the instruction and go to an infinite loop. So, we cache the
4430          * last retried eip and the last fault address, if we meet the eip
4431          * and the address again, we can break out of the potential infinite
4432          * loop.
4433          */
4434         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4435
4436         if (!(emulation_type & EMULTYPE_RETRY))
4437                 return false;
4438
4439         if (x86_page_table_writing_insn(ctxt))
4440                 return false;
4441
4442         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4443                 return false;
4444
4445         vcpu->arch.last_retry_eip = ctxt->eip;
4446         vcpu->arch.last_retry_addr = cr2;
4447
4448         if (!vcpu->arch.mmu.direct_map)
4449                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4450
4451         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4452
4453         return true;
4454 }
4455
4456 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4457                             unsigned long cr2,
4458                             int emulation_type,
4459                             void *insn,
4460                             int insn_len)
4461 {
4462         int r;
4463         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4464         bool writeback = true;
4465
4466         kvm_clear_exception_queue(vcpu);
4467
4468         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4469                 init_emulate_ctxt(vcpu);
4470                 ctxt->interruptibility = 0;
4471                 ctxt->have_exception = false;
4472                 ctxt->perm_ok = false;
4473
4474                 ctxt->only_vendor_specific_insn
4475                         = emulation_type & EMULTYPE_TRAP_UD;
4476
4477                 r = x86_decode_insn(ctxt, insn, insn_len);
4478
4479                 trace_kvm_emulate_insn_start(vcpu);
4480                 ++vcpu->stat.insn_emulation;
4481                 if (r != EMULATION_OK)  {
4482                         if (emulation_type & EMULTYPE_TRAP_UD)
4483                                 return EMULATE_FAIL;
4484                         if (reexecute_instruction(vcpu, cr2))
4485                                 return EMULATE_DONE;
4486                         if (emulation_type & EMULTYPE_SKIP)
4487                                 return EMULATE_FAIL;
4488                         return handle_emulation_failure(vcpu);
4489                 }
4490         }
4491
4492         if (emulation_type & EMULTYPE_SKIP) {
4493                 kvm_rip_write(vcpu, ctxt->_eip);
4494                 return EMULATE_DONE;
4495         }
4496
4497         if (retry_instruction(ctxt, cr2, emulation_type))
4498                 return EMULATE_DONE;
4499
4500         /* this is needed for vmware backdoor interface to work since it
4501            changes registers values  during IO operation */
4502         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4503                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4504                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4505         }
4506
4507 restart:
4508         r = x86_emulate_insn(ctxt);
4509
4510         if (r == EMULATION_INTERCEPTED)
4511                 return EMULATE_DONE;
4512
4513         if (r == EMULATION_FAILED) {
4514                 if (reexecute_instruction(vcpu, cr2))
4515                         return EMULATE_DONE;
4516
4517                 return handle_emulation_failure(vcpu);
4518         }
4519
4520         if (ctxt->have_exception) {
4521                 inject_emulated_exception(vcpu);
4522                 r = EMULATE_DONE;
4523         } else if (vcpu->arch.pio.count) {
4524                 if (!vcpu->arch.pio.in)
4525                         vcpu->arch.pio.count = 0;
4526                 else
4527                         writeback = false;
4528                 r = EMULATE_DO_MMIO;
4529         } else if (vcpu->mmio_needed) {
4530                 if (!vcpu->mmio_is_write)
4531                         writeback = false;
4532                 r = EMULATE_DO_MMIO;
4533         } else if (r == EMULATION_RESTART)
4534                 goto restart;
4535         else
4536                 r = EMULATE_DONE;
4537
4538         if (writeback) {
4539                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4540                 kvm_set_rflags(vcpu, ctxt->eflags);
4541                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4542                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4543                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4544                 kvm_rip_write(vcpu, ctxt->eip);
4545         } else
4546                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4547
4548         return r;
4549 }
4550 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4551
4552 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4553 {
4554         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4555         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4556                                             size, port, &val, 1);
4557         /* do not return to emulator after return from userspace */
4558         vcpu->arch.pio.count = 0;
4559         return ret;
4560 }
4561 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4562
4563 static void tsc_bad(void *info)
4564 {
4565         __this_cpu_write(cpu_tsc_khz, 0);
4566 }
4567
4568 static void tsc_khz_changed(void *data)
4569 {
4570         struct cpufreq_freqs *freq = data;
4571         unsigned long khz = 0;
4572
4573         if (data)
4574                 khz = freq->new;
4575         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4576                 khz = cpufreq_quick_get(raw_smp_processor_id());
4577         if (!khz)
4578                 khz = tsc_khz;
4579         __this_cpu_write(cpu_tsc_khz, khz);
4580 }
4581
4582 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4583                                      void *data)
4584 {
4585         struct cpufreq_freqs *freq = data;
4586         struct kvm *kvm;
4587         struct kvm_vcpu *vcpu;
4588         int i, send_ipi = 0;
4589
4590         /*
4591          * We allow guests to temporarily run on slowing clocks,
4592          * provided we notify them after, or to run on accelerating
4593          * clocks, provided we notify them before.  Thus time never
4594          * goes backwards.
4595          *
4596          * However, we have a problem.  We can't atomically update
4597          * the frequency of a given CPU from this function; it is
4598          * merely a notifier, which can be called from any CPU.
4599          * Changing the TSC frequency at arbitrary points in time
4600          * requires a recomputation of local variables related to
4601          * the TSC for each VCPU.  We must flag these local variables
4602          * to be updated and be sure the update takes place with the
4603          * new frequency before any guests proceed.
4604          *
4605          * Unfortunately, the combination of hotplug CPU and frequency
4606          * change creates an intractable locking scenario; the order
4607          * of when these callouts happen is undefined with respect to
4608          * CPU hotplug, and they can race with each other.  As such,
4609          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4610          * undefined; you can actually have a CPU frequency change take
4611          * place in between the computation of X and the setting of the
4612          * variable.  To protect against this problem, all updates of
4613          * the per_cpu tsc_khz variable are done in an interrupt
4614          * protected IPI, and all callers wishing to update the value
4615          * must wait for a synchronous IPI to complete (which is trivial
4616          * if the caller is on the CPU already).  This establishes the
4617          * necessary total order on variable updates.
4618          *
4619          * Note that because a guest time update may take place
4620          * anytime after the setting of the VCPU's request bit, the
4621          * correct TSC value must be set before the request.  However,
4622          * to ensure the update actually makes it to any guest which
4623          * starts running in hardware virtualization between the set
4624          * and the acquisition of the spinlock, we must also ping the
4625          * CPU after setting the request bit.
4626          *
4627          */
4628
4629         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4630                 return 0;
4631         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4632                 return 0;
4633
4634         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4635
4636         raw_spin_lock(&kvm_lock);
4637         list_for_each_entry(kvm, &vm_list, vm_list) {
4638                 kvm_for_each_vcpu(i, vcpu, kvm) {
4639                         if (vcpu->cpu != freq->cpu)
4640                                 continue;
4641                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4642                         if (vcpu->cpu != smp_processor_id())
4643                                 send_ipi = 1;
4644                 }
4645         }
4646         raw_spin_unlock(&kvm_lock);
4647
4648         if (freq->old < freq->new && send_ipi) {
4649                 /*
4650                  * We upscale the frequency.  Must make the guest
4651                  * doesn't see old kvmclock values while running with
4652                  * the new frequency, otherwise we risk the guest sees
4653                  * time go backwards.
4654                  *
4655                  * In case we update the frequency for another cpu
4656                  * (which might be in guest context) send an interrupt
4657                  * to kick the cpu out of guest context.  Next time
4658                  * guest context is entered kvmclock will be updated,
4659                  * so the guest will not see stale values.
4660                  */
4661                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4662         }
4663         return 0;
4664 }
4665
4666 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4667         .notifier_call  = kvmclock_cpufreq_notifier
4668 };
4669
4670 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4671                                         unsigned long action, void *hcpu)
4672 {
4673         unsigned int cpu = (unsigned long)hcpu;
4674
4675         switch (action) {
4676                 case CPU_ONLINE:
4677                 case CPU_DOWN_FAILED:
4678                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4679                         break;
4680                 case CPU_DOWN_PREPARE:
4681                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4682                         break;
4683         }
4684         return NOTIFY_OK;
4685 }
4686
4687 static struct notifier_block kvmclock_cpu_notifier_block = {
4688         .notifier_call  = kvmclock_cpu_notifier,
4689         .priority = -INT_MAX
4690 };
4691
4692 static void kvm_timer_init(void)
4693 {
4694         int cpu;
4695
4696         max_tsc_khz = tsc_khz;
4697         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4698         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4699 #ifdef CONFIG_CPU_FREQ
4700                 struct cpufreq_policy policy;
4701                 memset(&policy, 0, sizeof(policy));
4702                 cpu = get_cpu();
4703                 cpufreq_get_policy(&policy, cpu);
4704                 if (policy.cpuinfo.max_freq)
4705                         max_tsc_khz = policy.cpuinfo.max_freq;
4706                 put_cpu();
4707 #endif
4708                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4709                                           CPUFREQ_TRANSITION_NOTIFIER);
4710         }
4711         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4712         for_each_online_cpu(cpu)
4713                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4714 }
4715
4716 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4717
4718 int kvm_is_in_guest(void)
4719 {
4720         return __this_cpu_read(current_vcpu) != NULL;
4721 }
4722
4723 static int kvm_is_user_mode(void)
4724 {
4725         int user_mode = 3;
4726
4727         if (__this_cpu_read(current_vcpu))
4728                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4729
4730         return user_mode != 0;
4731 }
4732
4733 static unsigned long kvm_get_guest_ip(void)
4734 {
4735         unsigned long ip = 0;
4736
4737         if (__this_cpu_read(current_vcpu))
4738                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4739
4740         return ip;
4741 }
4742
4743 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4744         .is_in_guest            = kvm_is_in_guest,
4745         .is_user_mode           = kvm_is_user_mode,
4746         .get_guest_ip           = kvm_get_guest_ip,
4747 };
4748
4749 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4750 {
4751         __this_cpu_write(current_vcpu, vcpu);
4752 }
4753 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4754
4755 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4756 {
4757         __this_cpu_write(current_vcpu, NULL);
4758 }
4759 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4760
4761 static void kvm_set_mmio_spte_mask(void)
4762 {
4763         u64 mask;
4764         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4765
4766         /*
4767          * Set the reserved bits and the present bit of an paging-structure
4768          * entry to generate page fault with PFER.RSV = 1.
4769          */
4770         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4771         mask |= 1ull;
4772
4773 #ifdef CONFIG_X86_64
4774         /*
4775          * If reserved bit is not supported, clear the present bit to disable
4776          * mmio page fault.
4777          */
4778         if (maxphyaddr == 52)
4779                 mask &= ~1ull;
4780 #endif
4781
4782         kvm_mmu_set_mmio_spte_mask(mask);
4783 }
4784
4785 int kvm_arch_init(void *opaque)
4786 {
4787         int r;
4788         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4789
4790         if (kvm_x86_ops) {
4791                 printk(KERN_ERR "kvm: already loaded the other module\n");
4792                 r = -EEXIST;
4793                 goto out;
4794         }
4795
4796         if (!ops->cpu_has_kvm_support()) {
4797                 printk(KERN_ERR "kvm: no hardware support\n");
4798                 r = -EOPNOTSUPP;
4799                 goto out;
4800         }
4801         if (ops->disabled_by_bios()) {
4802                 printk(KERN_ERR "kvm: disabled by bios\n");
4803                 r = -EOPNOTSUPP;
4804                 goto out;
4805         }
4806
4807         r = kvm_mmu_module_init();
4808         if (r)
4809                 goto out;
4810
4811         kvm_set_mmio_spte_mask();
4812         kvm_init_msr_list();
4813
4814         kvm_x86_ops = ops;
4815         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4816                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4817
4818         kvm_timer_init();
4819
4820         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4821
4822         if (cpu_has_xsave)
4823                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4824
4825         return 0;
4826
4827 out:
4828         return r;
4829 }
4830
4831 void kvm_arch_exit(void)
4832 {
4833         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4834
4835         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4836                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4837                                             CPUFREQ_TRANSITION_NOTIFIER);
4838         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4839         kvm_x86_ops = NULL;
4840         kvm_mmu_module_exit();
4841 }
4842
4843 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4844 {
4845         ++vcpu->stat.halt_exits;
4846         if (irqchip_in_kernel(vcpu->kvm)) {
4847                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4848                 return 1;
4849         } else {
4850                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4851                 return 0;
4852         }
4853 }
4854 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4855
4856 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4857 {
4858         u64 param, ingpa, outgpa, ret;
4859         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4860         bool fast, longmode;
4861         int cs_db, cs_l;
4862
4863         /*
4864          * hypercall generates UD from non zero cpl and real mode
4865          * per HYPER-V spec
4866          */
4867         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4868                 kvm_queue_exception(vcpu, UD_VECTOR);
4869                 return 0;
4870         }
4871
4872         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4873         longmode = is_long_mode(vcpu) && cs_l == 1;
4874
4875         if (!longmode) {
4876                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4877                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4878                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4879                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4880                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4881                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4882         }
4883 #ifdef CONFIG_X86_64
4884         else {
4885                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4886                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4887                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4888         }
4889 #endif
4890
4891         code = param & 0xffff;
4892         fast = (param >> 16) & 0x1;
4893         rep_cnt = (param >> 32) & 0xfff;
4894         rep_idx = (param >> 48) & 0xfff;
4895
4896         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4897
4898         switch (code) {
4899         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4900                 kvm_vcpu_on_spin(vcpu);
4901                 break;
4902         default:
4903                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4904                 break;
4905         }
4906
4907         ret = res | (((u64)rep_done & 0xfff) << 32);
4908         if (longmode) {
4909                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4910         } else {
4911                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4912                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4913         }
4914
4915         return 1;
4916 }
4917
4918 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4919 {
4920         unsigned long nr, a0, a1, a2, a3, ret;
4921         int r = 1;
4922
4923         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4924                 return kvm_hv_hypercall(vcpu);
4925
4926         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4927         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4928         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4929         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4930         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4931
4932         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4933
4934         if (!is_long_mode(vcpu)) {
4935                 nr &= 0xFFFFFFFF;
4936                 a0 &= 0xFFFFFFFF;
4937                 a1 &= 0xFFFFFFFF;
4938                 a2 &= 0xFFFFFFFF;
4939                 a3 &= 0xFFFFFFFF;
4940         }
4941
4942         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4943                 ret = -KVM_EPERM;
4944                 goto out;
4945         }
4946
4947         switch (nr) {
4948         case KVM_HC_VAPIC_POLL_IRQ:
4949                 ret = 0;
4950                 break;
4951         default:
4952                 ret = -KVM_ENOSYS;
4953                 break;
4954         }
4955 out:
4956         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4957         ++vcpu->stat.hypercalls;
4958         return r;
4959 }
4960 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4961
4962 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4963 {
4964         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4965         char instruction[3];
4966         unsigned long rip = kvm_rip_read(vcpu);
4967
4968         /*
4969          * Blow out the MMU to ensure that no other VCPU has an active mapping
4970          * to ensure that the updated hypercall appears atomically across all
4971          * VCPUs.
4972          */
4973         kvm_mmu_zap_all(vcpu->kvm);
4974
4975         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4976
4977         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
4978 }
4979
4980 /*
4981  * Check if userspace requested an interrupt window, and that the
4982  * interrupt window is open.
4983  *
4984  * No need to exit to userspace if we already have an interrupt queued.
4985  */
4986 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4987 {
4988         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4989                 vcpu->run->request_interrupt_window &&
4990                 kvm_arch_interrupt_allowed(vcpu));
4991 }
4992
4993 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4994 {
4995         struct kvm_run *kvm_run = vcpu->run;
4996
4997         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4998         kvm_run->cr8 = kvm_get_cr8(vcpu);
4999         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5000         if (irqchip_in_kernel(vcpu->kvm))
5001                 kvm_run->ready_for_interrupt_injection = 1;
5002         else
5003                 kvm_run->ready_for_interrupt_injection =
5004                         kvm_arch_interrupt_allowed(vcpu) &&
5005                         !kvm_cpu_has_interrupt(vcpu) &&
5006                         !kvm_event_needs_reinjection(vcpu);
5007 }
5008
5009 static void vapic_enter(struct kvm_vcpu *vcpu)
5010 {
5011         struct kvm_lapic *apic = vcpu->arch.apic;
5012         struct page *page;
5013
5014         if (!apic || !apic->vapic_addr)
5015                 return;
5016
5017         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5018
5019         vcpu->arch.apic->vapic_page = page;
5020 }
5021
5022 static void vapic_exit(struct kvm_vcpu *vcpu)
5023 {
5024         struct kvm_lapic *apic = vcpu->arch.apic;
5025         int idx;
5026
5027         if (!apic || !apic->vapic_addr)
5028                 return;
5029
5030         idx = srcu_read_lock(&vcpu->kvm->srcu);
5031         kvm_release_page_dirty(apic->vapic_page);
5032         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5033         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5034 }
5035
5036 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5037 {
5038         int max_irr, tpr;
5039
5040         if (!kvm_x86_ops->update_cr8_intercept)
5041                 return;
5042
5043         if (!vcpu->arch.apic)
5044                 return;
5045
5046         if (!vcpu->arch.apic->vapic_addr)
5047                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5048         else
5049                 max_irr = -1;
5050
5051         if (max_irr != -1)
5052                 max_irr >>= 4;
5053
5054         tpr = kvm_lapic_get_cr8(vcpu);
5055
5056         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5057 }
5058
5059 static void inject_pending_event(struct kvm_vcpu *vcpu)
5060 {
5061         /* try to reinject previous events if any */
5062         if (vcpu->arch.exception.pending) {
5063                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5064                                         vcpu->arch.exception.has_error_code,
5065                                         vcpu->arch.exception.error_code);
5066                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5067                                           vcpu->arch.exception.has_error_code,
5068                                           vcpu->arch.exception.error_code,
5069                                           vcpu->arch.exception.reinject);
5070                 return;
5071         }
5072
5073         if (vcpu->arch.nmi_injected) {
5074                 kvm_x86_ops->set_nmi(vcpu);
5075                 return;
5076         }
5077
5078         if (vcpu->arch.interrupt.pending) {
5079                 kvm_x86_ops->set_irq(vcpu);
5080                 return;
5081         }
5082
5083         /* try to inject new event if pending */
5084         if (vcpu->arch.nmi_pending) {
5085                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5086                         --vcpu->arch.nmi_pending;
5087                         vcpu->arch.nmi_injected = true;
5088                         kvm_x86_ops->set_nmi(vcpu);
5089                 }
5090         } else if (kvm_cpu_has_interrupt(vcpu)) {
5091                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5092                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5093                                             false);
5094                         kvm_x86_ops->set_irq(vcpu);
5095                 }
5096         }
5097 }
5098
5099 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5100 {
5101         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5102                         !vcpu->guest_xcr0_loaded) {
5103                 /* kvm_set_xcr() also depends on this */
5104                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5105                 vcpu->guest_xcr0_loaded = 1;
5106         }
5107 }
5108
5109 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5110 {
5111         if (vcpu->guest_xcr0_loaded) {
5112                 if (vcpu->arch.xcr0 != host_xcr0)
5113                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5114                 vcpu->guest_xcr0_loaded = 0;
5115         }
5116 }
5117
5118 static void process_nmi(struct kvm_vcpu *vcpu)
5119 {
5120         unsigned limit = 2;
5121
5122         /*
5123          * x86 is limited to one NMI running, and one NMI pending after it.
5124          * If an NMI is already in progress, limit further NMIs to just one.
5125          * Otherwise, allow two (and we'll inject the first one immediately).
5126          */
5127         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5128                 limit = 1;
5129
5130         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5131         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5132         kvm_make_request(KVM_REQ_EVENT, vcpu);
5133 }
5134
5135 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5136 {
5137         int r;
5138         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5139                 vcpu->run->request_interrupt_window;
5140         bool req_immediate_exit = 0;
5141
5142         if (vcpu->requests) {
5143                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5144                         kvm_mmu_unload(vcpu);
5145                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5146                         __kvm_migrate_timers(vcpu);
5147                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5148                         r = kvm_guest_time_update(vcpu);
5149                         if (unlikely(r))
5150                                 goto out;
5151                 }
5152                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5153                         kvm_mmu_sync_roots(vcpu);
5154                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5155                         kvm_x86_ops->tlb_flush(vcpu);
5156                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5157                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5158                         r = 0;
5159                         goto out;
5160                 }
5161                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5162                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5163                         r = 0;
5164                         goto out;
5165                 }
5166                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5167                         vcpu->fpu_active = 0;
5168                         kvm_x86_ops->fpu_deactivate(vcpu);
5169                 }
5170                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5171                         /* Page is swapped out. Do synthetic halt */
5172                         vcpu->arch.apf.halted = true;
5173                         r = 1;
5174                         goto out;
5175                 }
5176                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5177                         record_steal_time(vcpu);
5178                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5179                         process_nmi(vcpu);
5180                 req_immediate_exit =
5181                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5182                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5183                         kvm_handle_pmu_event(vcpu);
5184                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5185                         kvm_deliver_pmi(vcpu);
5186         }
5187
5188         r = kvm_mmu_reload(vcpu);
5189         if (unlikely(r))
5190                 goto out;
5191
5192         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5193                 inject_pending_event(vcpu);
5194
5195                 /* enable NMI/IRQ window open exits if needed */
5196                 if (vcpu->arch.nmi_pending)
5197                         kvm_x86_ops->enable_nmi_window(vcpu);
5198                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5199                         kvm_x86_ops->enable_irq_window(vcpu);
5200
5201                 if (kvm_lapic_enabled(vcpu)) {
5202                         update_cr8_intercept(vcpu);
5203                         kvm_lapic_sync_to_vapic(vcpu);
5204                 }
5205         }
5206
5207         preempt_disable();
5208
5209         kvm_x86_ops->prepare_guest_switch(vcpu);
5210         if (vcpu->fpu_active)
5211                 kvm_load_guest_fpu(vcpu);
5212         kvm_load_guest_xcr0(vcpu);
5213
5214         vcpu->mode = IN_GUEST_MODE;
5215
5216         /* We should set ->mode before check ->requests,
5217          * see the comment in make_all_cpus_request.
5218          */
5219         smp_mb();
5220
5221         local_irq_disable();
5222
5223         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5224             || need_resched() || signal_pending(current)) {
5225                 vcpu->mode = OUTSIDE_GUEST_MODE;
5226                 smp_wmb();
5227                 local_irq_enable();
5228                 preempt_enable();
5229                 kvm_x86_ops->cancel_injection(vcpu);
5230                 r = 1;
5231                 goto out;
5232         }
5233
5234         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5235
5236         if (req_immediate_exit)
5237                 smp_send_reschedule(vcpu->cpu);
5238
5239         kvm_guest_enter();
5240
5241         if (unlikely(vcpu->arch.switch_db_regs)) {
5242                 set_debugreg(0, 7);
5243                 set_debugreg(vcpu->arch.eff_db[0], 0);
5244                 set_debugreg(vcpu->arch.eff_db[1], 1);
5245                 set_debugreg(vcpu->arch.eff_db[2], 2);
5246                 set_debugreg(vcpu->arch.eff_db[3], 3);
5247         }
5248
5249         trace_kvm_entry(vcpu->vcpu_id);
5250         kvm_x86_ops->run(vcpu);
5251
5252         /*
5253          * If the guest has used debug registers, at least dr7
5254          * will be disabled while returning to the host.
5255          * If we don't have active breakpoints in the host, we don't
5256          * care about the messed up debug address registers. But if
5257          * we have some of them active, restore the old state.
5258          */
5259         if (hw_breakpoint_active())
5260                 hw_breakpoint_restore();
5261
5262         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5263
5264         vcpu->mode = OUTSIDE_GUEST_MODE;
5265         smp_wmb();
5266         local_irq_enable();
5267
5268         ++vcpu->stat.exits;
5269
5270         /*
5271          * We must have an instruction between local_irq_enable() and
5272          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5273          * the interrupt shadow.  The stat.exits increment will do nicely.
5274          * But we need to prevent reordering, hence this barrier():
5275          */
5276         barrier();
5277
5278         kvm_guest_exit();
5279
5280         preempt_enable();
5281
5282         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5283
5284         /*
5285          * Profile KVM exit RIPs:
5286          */
5287         if (unlikely(prof_on == KVM_PROFILING)) {
5288                 unsigned long rip = kvm_rip_read(vcpu);
5289                 profile_hit(KVM_PROFILING, (void *)rip);
5290         }
5291
5292
5293         kvm_lapic_sync_from_vapic(vcpu);
5294
5295         r = kvm_x86_ops->handle_exit(vcpu);
5296 out:
5297         return r;
5298 }
5299
5300
5301 static int __vcpu_run(struct kvm_vcpu *vcpu)
5302 {
5303         int r;
5304         struct kvm *kvm = vcpu->kvm;
5305
5306         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5307                 pr_debug("vcpu %d received sipi with vector # %x\n",
5308                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5309                 kvm_lapic_reset(vcpu);
5310                 r = kvm_arch_vcpu_reset(vcpu);
5311                 if (r)
5312                         return r;
5313                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5314         }
5315
5316         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5317         vapic_enter(vcpu);
5318
5319         r = 1;
5320         while (r > 0) {
5321                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5322                     !vcpu->arch.apf.halted)
5323                         r = vcpu_enter_guest(vcpu);
5324                 else {
5325                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5326                         kvm_vcpu_block(vcpu);
5327                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5328                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5329                         {
5330                                 switch(vcpu->arch.mp_state) {
5331                                 case KVM_MP_STATE_HALTED:
5332                                         vcpu->arch.mp_state =
5333                                                 KVM_MP_STATE_RUNNABLE;
5334                                 case KVM_MP_STATE_RUNNABLE:
5335                                         vcpu->arch.apf.halted = false;
5336                                         break;
5337                                 case KVM_MP_STATE_SIPI_RECEIVED:
5338                                 default:
5339                                         r = -EINTR;
5340                                         break;
5341                                 }
5342                         }
5343                 }
5344
5345                 if (r <= 0)
5346                         break;
5347
5348                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5349                 if (kvm_cpu_has_pending_timer(vcpu))
5350                         kvm_inject_pending_timer_irqs(vcpu);
5351
5352                 if (dm_request_for_irq_injection(vcpu)) {
5353                         r = -EINTR;
5354                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5355                         ++vcpu->stat.request_irq_exits;
5356                 }
5357
5358                 kvm_check_async_pf_completion(vcpu);
5359
5360                 if (signal_pending(current)) {
5361                         r = -EINTR;
5362                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5363                         ++vcpu->stat.signal_exits;
5364                 }
5365                 if (need_resched()) {
5366                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5367                         kvm_resched(vcpu);
5368                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5369                 }
5370         }
5371
5372         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5373
5374         vapic_exit(vcpu);
5375
5376         return r;
5377 }
5378
5379 static int complete_mmio(struct kvm_vcpu *vcpu)
5380 {
5381         struct kvm_run *run = vcpu->run;
5382         int r;
5383
5384         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5385                 return 1;
5386
5387         if (vcpu->mmio_needed) {
5388                 vcpu->mmio_needed = 0;
5389                 if (!vcpu->mmio_is_write)
5390                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5391                                run->mmio.data, 8);
5392                 vcpu->mmio_index += 8;
5393                 if (vcpu->mmio_index < vcpu->mmio_size) {
5394                         run->exit_reason = KVM_EXIT_MMIO;
5395                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5396                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5397                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5398                         run->mmio.is_write = vcpu->mmio_is_write;
5399                         vcpu->mmio_needed = 1;
5400                         return 0;
5401                 }
5402                 if (vcpu->mmio_is_write)
5403                         return 1;
5404                 vcpu->mmio_read_completed = 1;
5405         }
5406         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5407         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5408         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5409         if (r != EMULATE_DONE)
5410                 return 0;
5411         return 1;
5412 }
5413
5414 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5415 {
5416         int r;
5417         sigset_t sigsaved;
5418
5419         if (!tsk_used_math(current) && init_fpu(current))
5420                 return -ENOMEM;
5421
5422         if (vcpu->sigset_active)
5423                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5424
5425         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5426                 kvm_vcpu_block(vcpu);
5427                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5428                 r = -EAGAIN;
5429                 goto out;
5430         }
5431
5432         /* re-sync apic's tpr */
5433         if (!irqchip_in_kernel(vcpu->kvm)) {
5434                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5435                         r = -EINVAL;
5436                         goto out;
5437                 }
5438         }
5439
5440         r = complete_mmio(vcpu);
5441         if (r <= 0)
5442                 goto out;
5443
5444         r = __vcpu_run(vcpu);
5445
5446 out:
5447         post_kvm_run_save(vcpu);
5448         if (vcpu->sigset_active)
5449                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5450
5451         return r;
5452 }
5453
5454 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5455 {
5456         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5457                 /*
5458                  * We are here if userspace calls get_regs() in the middle of
5459                  * instruction emulation. Registers state needs to be copied
5460                  * back from emulation context to vcpu. Usrapace shouldn't do
5461                  * that usually, but some bad designed PV devices (vmware
5462                  * backdoor interface) need this to work
5463                  */
5464                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5465                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5466                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5467         }
5468         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5469         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5470         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5471         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5472         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5473         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5474         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5475         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5476 #ifdef CONFIG_X86_64
5477         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5478         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5479         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5480         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5481         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5482         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5483         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5484         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5485 #endif
5486
5487         regs->rip = kvm_rip_read(vcpu);
5488         regs->rflags = kvm_get_rflags(vcpu);
5489
5490         return 0;
5491 }
5492
5493 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5494 {
5495         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5496         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5497
5498         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5499         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5500         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5501         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5502         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5503         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5504         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5505         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5506 #ifdef CONFIG_X86_64
5507         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5508         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5509         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5510         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5511         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5512         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5513         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5514         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5515 #endif
5516
5517         kvm_rip_write(vcpu, regs->rip);
5518         kvm_set_rflags(vcpu, regs->rflags);
5519
5520         vcpu->arch.exception.pending = false;
5521
5522         kvm_make_request(KVM_REQ_EVENT, vcpu);
5523
5524         return 0;
5525 }
5526
5527 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5528 {
5529         struct kvm_segment cs;
5530
5531         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5532         *db = cs.db;
5533         *l = cs.l;
5534 }
5535 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5536
5537 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5538                                   struct kvm_sregs *sregs)
5539 {
5540         struct desc_ptr dt;
5541
5542         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5543         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5544         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5545         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5546         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5547         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5548
5549         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5550         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5551
5552         kvm_x86_ops->get_idt(vcpu, &dt);
5553         sregs->idt.limit = dt.size;
5554         sregs->idt.base = dt.address;
5555         kvm_x86_ops->get_gdt(vcpu, &dt);
5556         sregs->gdt.limit = dt.size;
5557         sregs->gdt.base = dt.address;
5558
5559         sregs->cr0 = kvm_read_cr0(vcpu);
5560         sregs->cr2 = vcpu->arch.cr2;
5561         sregs->cr3 = kvm_read_cr3(vcpu);
5562         sregs->cr4 = kvm_read_cr4(vcpu);
5563         sregs->cr8 = kvm_get_cr8(vcpu);
5564         sregs->efer = vcpu->arch.efer;
5565         sregs->apic_base = kvm_get_apic_base(vcpu);
5566
5567         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5568
5569         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5570                 set_bit(vcpu->arch.interrupt.nr,
5571                         (unsigned long *)sregs->interrupt_bitmap);
5572
5573         return 0;
5574 }
5575
5576 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5577                                     struct kvm_mp_state *mp_state)
5578 {
5579         mp_state->mp_state = vcpu->arch.mp_state;
5580         return 0;
5581 }
5582
5583 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5584                                     struct kvm_mp_state *mp_state)
5585 {
5586         vcpu->arch.mp_state = mp_state->mp_state;
5587         kvm_make_request(KVM_REQ_EVENT, vcpu);
5588         return 0;
5589 }
5590
5591 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5592                     bool has_error_code, u32 error_code)
5593 {
5594         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5595         int ret;
5596
5597         init_emulate_ctxt(vcpu);
5598
5599         ret = emulator_task_switch(ctxt, tss_selector, reason,
5600                                    has_error_code, error_code);
5601
5602         if (ret)
5603                 return EMULATE_FAIL;
5604
5605         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5606         kvm_rip_write(vcpu, ctxt->eip);
5607         kvm_set_rflags(vcpu, ctxt->eflags);
5608         kvm_make_request(KVM_REQ_EVENT, vcpu);
5609         return EMULATE_DONE;
5610 }
5611 EXPORT_SYMBOL_GPL(kvm_task_switch);
5612
5613 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5614                                   struct kvm_sregs *sregs)
5615 {
5616         int mmu_reset_needed = 0;
5617         int pending_vec, max_bits, idx;
5618         struct desc_ptr dt;
5619
5620         dt.size = sregs->idt.limit;
5621         dt.address = sregs->idt.base;
5622         kvm_x86_ops->set_idt(vcpu, &dt);
5623         dt.size = sregs->gdt.limit;
5624         dt.address = sregs->gdt.base;
5625         kvm_x86_ops->set_gdt(vcpu, &dt);
5626
5627         vcpu->arch.cr2 = sregs->cr2;
5628         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5629         vcpu->arch.cr3 = sregs->cr3;
5630         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5631
5632         kvm_set_cr8(vcpu, sregs->cr8);
5633
5634         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5635         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5636         kvm_set_apic_base(vcpu, sregs->apic_base);
5637
5638         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5639         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5640         vcpu->arch.cr0 = sregs->cr0;
5641
5642         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5643         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5644         if (sregs->cr4 & X86_CR4_OSXSAVE)
5645                 kvm_update_cpuid(vcpu);
5646
5647         idx = srcu_read_lock(&vcpu->kvm->srcu);
5648         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5649                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5650                 mmu_reset_needed = 1;
5651         }
5652         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5653
5654         if (mmu_reset_needed)
5655                 kvm_mmu_reset_context(vcpu);
5656
5657         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5658         pending_vec = find_first_bit(
5659                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5660         if (pending_vec < max_bits) {
5661                 kvm_queue_interrupt(vcpu, pending_vec, false);
5662                 pr_debug("Set back pending irq %d\n", pending_vec);
5663         }
5664
5665         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5666         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5667         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5668         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5669         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5670         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5671
5672         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5673         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5674
5675         update_cr8_intercept(vcpu);
5676
5677         /* Older userspace won't unhalt the vcpu on reset. */
5678         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5679             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5680             !is_protmode(vcpu))
5681                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5682
5683         kvm_make_request(KVM_REQ_EVENT, vcpu);
5684
5685         return 0;
5686 }
5687
5688 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5689                                         struct kvm_guest_debug *dbg)
5690 {
5691         unsigned long rflags;
5692         int i, r;
5693
5694         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5695                 r = -EBUSY;
5696                 if (vcpu->arch.exception.pending)
5697                         goto out;
5698                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5699                         kvm_queue_exception(vcpu, DB_VECTOR);
5700                 else
5701                         kvm_queue_exception(vcpu, BP_VECTOR);
5702         }
5703
5704         /*
5705          * Read rflags as long as potentially injected trace flags are still
5706          * filtered out.
5707          */
5708         rflags = kvm_get_rflags(vcpu);
5709
5710         vcpu->guest_debug = dbg->control;
5711         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5712                 vcpu->guest_debug = 0;
5713
5714         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5715                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5716                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5717                 vcpu->arch.switch_db_regs =
5718                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5719         } else {
5720                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5721                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5722                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5723         }
5724
5725         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5726                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5727                         get_segment_base(vcpu, VCPU_SREG_CS);
5728
5729         /*
5730          * Trigger an rflags update that will inject or remove the trace
5731          * flags.
5732          */
5733         kvm_set_rflags(vcpu, rflags);
5734
5735         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5736
5737         r = 0;
5738
5739 out:
5740
5741         return r;
5742 }
5743
5744 /*
5745  * Translate a guest virtual address to a guest physical address.
5746  */
5747 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5748                                     struct kvm_translation *tr)
5749 {
5750         unsigned long vaddr = tr->linear_address;
5751         gpa_t gpa;
5752         int idx;
5753
5754         idx = srcu_read_lock(&vcpu->kvm->srcu);
5755         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5756         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5757         tr->physical_address = gpa;
5758         tr->valid = gpa != UNMAPPED_GVA;
5759         tr->writeable = 1;
5760         tr->usermode = 0;
5761
5762         return 0;
5763 }
5764
5765 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5766 {
5767         struct i387_fxsave_struct *fxsave =
5768                         &vcpu->arch.guest_fpu.state->fxsave;
5769
5770         memcpy(fpu->fpr, fxsave->st_space, 128);
5771         fpu->fcw = fxsave->cwd;
5772         fpu->fsw = fxsave->swd;
5773         fpu->ftwx = fxsave->twd;
5774         fpu->last_opcode = fxsave->fop;
5775         fpu->last_ip = fxsave->rip;
5776         fpu->last_dp = fxsave->rdp;
5777         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5778
5779         return 0;
5780 }
5781
5782 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5783 {
5784         struct i387_fxsave_struct *fxsave =
5785                         &vcpu->arch.guest_fpu.state->fxsave;
5786
5787         memcpy(fxsave->st_space, fpu->fpr, 128);
5788         fxsave->cwd = fpu->fcw;
5789         fxsave->swd = fpu->fsw;
5790         fxsave->twd = fpu->ftwx;
5791         fxsave->fop = fpu->last_opcode;
5792         fxsave->rip = fpu->last_ip;
5793         fxsave->rdp = fpu->last_dp;
5794         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5795
5796         return 0;
5797 }
5798
5799 int fx_init(struct kvm_vcpu *vcpu)
5800 {
5801         int err;
5802
5803         err = fpu_alloc(&vcpu->arch.guest_fpu);
5804         if (err)
5805                 return err;
5806
5807         fpu_finit(&vcpu->arch.guest_fpu);
5808
5809         /*
5810          * Ensure guest xcr0 is valid for loading
5811          */
5812         vcpu->arch.xcr0 = XSTATE_FP;
5813
5814         vcpu->arch.cr0 |= X86_CR0_ET;
5815
5816         return 0;
5817 }
5818 EXPORT_SYMBOL_GPL(fx_init);
5819
5820 static void fx_free(struct kvm_vcpu *vcpu)
5821 {
5822         fpu_free(&vcpu->arch.guest_fpu);
5823 }
5824
5825 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5826 {
5827         if (vcpu->guest_fpu_loaded)
5828                 return;
5829
5830         /*
5831          * Restore all possible states in the guest,
5832          * and assume host would use all available bits.
5833          * Guest xcr0 would be loaded later.
5834          */
5835         kvm_put_guest_xcr0(vcpu);
5836         vcpu->guest_fpu_loaded = 1;
5837         unlazy_fpu(current);
5838         fpu_restore_checking(&vcpu->arch.guest_fpu);
5839         trace_kvm_fpu(1);
5840 }
5841
5842 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5843 {
5844         kvm_put_guest_xcr0(vcpu);
5845
5846         if (!vcpu->guest_fpu_loaded)
5847                 return;
5848
5849         vcpu->guest_fpu_loaded = 0;
5850         fpu_save_init(&vcpu->arch.guest_fpu);
5851         ++vcpu->stat.fpu_reload;
5852         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5853         trace_kvm_fpu(0);
5854 }
5855
5856 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5857 {
5858         kvmclock_reset(vcpu);
5859
5860         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5861         fx_free(vcpu);
5862         kvm_x86_ops->vcpu_free(vcpu);
5863 }
5864
5865 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5866                                                 unsigned int id)
5867 {
5868         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5869                 printk_once(KERN_WARNING
5870                 "kvm: SMP vm created on host with unstable TSC; "
5871                 "guest TSC will not be reliable\n");
5872         return kvm_x86_ops->vcpu_create(kvm, id);
5873 }
5874
5875 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5876 {
5877         int r;
5878
5879         vcpu->arch.mtrr_state.have_fixed = 1;
5880         vcpu_load(vcpu);
5881         r = kvm_arch_vcpu_reset(vcpu);
5882         if (r == 0)
5883                 r = kvm_mmu_setup(vcpu);
5884         vcpu_put(vcpu);
5885
5886         return r;
5887 }
5888
5889 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5890 {
5891         vcpu->arch.apf.msr_val = 0;
5892
5893         vcpu_load(vcpu);
5894         kvm_mmu_unload(vcpu);
5895         vcpu_put(vcpu);
5896
5897         fx_free(vcpu);
5898         kvm_x86_ops->vcpu_free(vcpu);
5899 }
5900
5901 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5902 {
5903         atomic_set(&vcpu->arch.nmi_queued, 0);
5904         vcpu->arch.nmi_pending = 0;
5905         vcpu->arch.nmi_injected = false;
5906
5907         vcpu->arch.switch_db_regs = 0;
5908         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5909         vcpu->arch.dr6 = DR6_FIXED_1;
5910         vcpu->arch.dr7 = DR7_FIXED_1;
5911
5912         kvm_make_request(KVM_REQ_EVENT, vcpu);
5913         vcpu->arch.apf.msr_val = 0;
5914         vcpu->arch.st.msr_val = 0;
5915
5916         kvmclock_reset(vcpu);
5917
5918         kvm_clear_async_pf_completion_queue(vcpu);
5919         kvm_async_pf_hash_reset(vcpu);
5920         vcpu->arch.apf.halted = false;
5921
5922         kvm_pmu_reset(vcpu);
5923
5924         return kvm_x86_ops->vcpu_reset(vcpu);
5925 }
5926
5927 int kvm_arch_hardware_enable(void *garbage)
5928 {
5929         struct kvm *kvm;
5930         struct kvm_vcpu *vcpu;
5931         int i;
5932
5933         kvm_shared_msr_cpu_online();
5934         list_for_each_entry(kvm, &vm_list, vm_list)
5935                 kvm_for_each_vcpu(i, vcpu, kvm)
5936                         if (vcpu->cpu == smp_processor_id())
5937                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5938         return kvm_x86_ops->hardware_enable(garbage);
5939 }
5940
5941 void kvm_arch_hardware_disable(void *garbage)
5942 {
5943         kvm_x86_ops->hardware_disable(garbage);
5944         drop_user_return_notifiers(garbage);
5945 }
5946
5947 int kvm_arch_hardware_setup(void)
5948 {
5949         return kvm_x86_ops->hardware_setup();
5950 }
5951
5952 void kvm_arch_hardware_unsetup(void)
5953 {
5954         kvm_x86_ops->hardware_unsetup();
5955 }
5956
5957 void kvm_arch_check_processor_compat(void *rtn)
5958 {
5959         kvm_x86_ops->check_processor_compatibility(rtn);
5960 }
5961
5962 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5963 {
5964         struct page *page;
5965         struct kvm *kvm;
5966         int r;
5967
5968         BUG_ON(vcpu->kvm == NULL);
5969         kvm = vcpu->kvm;
5970
5971         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5972         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5973                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5974         else
5975                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5976
5977         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5978         if (!page) {
5979                 r = -ENOMEM;
5980                 goto fail;
5981         }
5982         vcpu->arch.pio_data = page_address(page);
5983
5984         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
5985
5986         r = kvm_mmu_create(vcpu);
5987         if (r < 0)
5988                 goto fail_free_pio_data;
5989
5990         if (irqchip_in_kernel(kvm)) {
5991                 r = kvm_create_lapic(vcpu);
5992                 if (r < 0)
5993                         goto fail_mmu_destroy;
5994         }
5995
5996         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5997                                        GFP_KERNEL);
5998         if (!vcpu->arch.mce_banks) {
5999                 r = -ENOMEM;
6000                 goto fail_free_lapic;
6001         }
6002         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6003
6004         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6005                 goto fail_free_mce_banks;
6006
6007         kvm_async_pf_hash_reset(vcpu);
6008         kvm_pmu_init(vcpu);
6009
6010         return 0;
6011 fail_free_mce_banks:
6012         kfree(vcpu->arch.mce_banks);
6013 fail_free_lapic:
6014         kvm_free_lapic(vcpu);
6015 fail_mmu_destroy:
6016         kvm_mmu_destroy(vcpu);
6017 fail_free_pio_data:
6018         free_page((unsigned long)vcpu->arch.pio_data);
6019 fail:
6020         return r;
6021 }
6022
6023 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6024 {
6025         int idx;
6026
6027         kvm_pmu_destroy(vcpu);
6028         kfree(vcpu->arch.mce_banks);
6029         kvm_free_lapic(vcpu);
6030         idx = srcu_read_lock(&vcpu->kvm->srcu);
6031         kvm_mmu_destroy(vcpu);
6032         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6033         free_page((unsigned long)vcpu->arch.pio_data);
6034 }
6035
6036 int kvm_arch_init_vm(struct kvm *kvm)
6037 {
6038         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6039         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6040
6041         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6042         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6043
6044         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6045
6046         return 0;
6047 }
6048
6049 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6050 {
6051         vcpu_load(vcpu);
6052         kvm_mmu_unload(vcpu);
6053         vcpu_put(vcpu);
6054 }
6055
6056 static void kvm_free_vcpus(struct kvm *kvm)
6057 {
6058         unsigned int i;
6059         struct kvm_vcpu *vcpu;
6060
6061         /*
6062          * Unpin any mmu pages first.
6063          */
6064         kvm_for_each_vcpu(i, vcpu, kvm) {
6065                 kvm_clear_async_pf_completion_queue(vcpu);
6066                 kvm_unload_vcpu_mmu(vcpu);
6067         }
6068         kvm_for_each_vcpu(i, vcpu, kvm)
6069                 kvm_arch_vcpu_free(vcpu);
6070
6071         mutex_lock(&kvm->lock);
6072         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6073                 kvm->vcpus[i] = NULL;
6074
6075         atomic_set(&kvm->online_vcpus, 0);
6076         mutex_unlock(&kvm->lock);
6077 }
6078
6079 void kvm_arch_sync_events(struct kvm *kvm)
6080 {
6081         kvm_free_all_assigned_devices(kvm);
6082         kvm_free_pit(kvm);
6083 }
6084
6085 void kvm_arch_destroy_vm(struct kvm *kvm)
6086 {
6087         kvm_iommu_unmap_guest(kvm);
6088         kfree(kvm->arch.vpic);
6089         kfree(kvm->arch.vioapic);
6090         kvm_free_vcpus(kvm);
6091         if (kvm->arch.apic_access_page)
6092                 put_page(kvm->arch.apic_access_page);
6093         if (kvm->arch.ept_identity_pagetable)
6094                 put_page(kvm->arch.ept_identity_pagetable);
6095 }
6096
6097 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6098                                 struct kvm_memory_slot *memslot,
6099                                 struct kvm_memory_slot old,
6100                                 struct kvm_userspace_memory_region *mem,
6101                                 int user_alloc)
6102 {
6103         int npages = memslot->npages;
6104         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6105
6106         /* Prevent internal slot pages from being moved by fork()/COW. */
6107         if (memslot->id >= KVM_MEMORY_SLOTS)
6108                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6109
6110         /*To keep backward compatibility with older userspace,
6111          *x86 needs to hanlde !user_alloc case.
6112          */
6113         if (!user_alloc) {
6114                 if (npages && !old.rmap) {
6115                         unsigned long userspace_addr;
6116
6117                         down_write(&current->mm->mmap_sem);
6118                         userspace_addr = do_mmap(NULL, 0,
6119                                                  npages * PAGE_SIZE,
6120                                                  PROT_READ | PROT_WRITE,
6121                                                  map_flags,
6122                                                  0);
6123                         up_write(&current->mm->mmap_sem);
6124
6125                         if (IS_ERR((void *)userspace_addr))
6126                                 return PTR_ERR((void *)userspace_addr);
6127
6128                         memslot->userspace_addr = userspace_addr;
6129                 }
6130         }
6131
6132
6133         return 0;
6134 }
6135
6136 void kvm_arch_commit_memory_region(struct kvm *kvm,
6137                                 struct kvm_userspace_memory_region *mem,
6138                                 struct kvm_memory_slot old,
6139                                 int user_alloc)
6140 {
6141
6142         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6143
6144         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6145                 int ret;
6146
6147                 down_write(&current->mm->mmap_sem);
6148                 ret = do_munmap(current->mm, old.userspace_addr,
6149                                 old.npages * PAGE_SIZE);
6150                 up_write(&current->mm->mmap_sem);
6151                 if (ret < 0)
6152                         printk(KERN_WARNING
6153                                "kvm_vm_ioctl_set_memory_region: "
6154                                "failed to munmap memory\n");
6155         }
6156
6157         if (!kvm->arch.n_requested_mmu_pages)
6158                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6159
6160         spin_lock(&kvm->mmu_lock);
6161         if (nr_mmu_pages)
6162                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6163         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6164         spin_unlock(&kvm->mmu_lock);
6165 }
6166
6167 void kvm_arch_flush_shadow(struct kvm *kvm)
6168 {
6169         kvm_mmu_zap_all(kvm);
6170         kvm_reload_remote_mmus(kvm);
6171 }
6172
6173 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6174 {
6175         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6176                 !vcpu->arch.apf.halted)
6177                 || !list_empty_careful(&vcpu->async_pf.done)
6178                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6179                 || atomic_read(&vcpu->arch.nmi_queued) ||
6180                 (kvm_arch_interrupt_allowed(vcpu) &&
6181                  kvm_cpu_has_interrupt(vcpu));
6182 }
6183
6184 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6185 {
6186         int me;
6187         int cpu = vcpu->cpu;
6188
6189         if (waitqueue_active(&vcpu->wq)) {
6190                 wake_up_interruptible(&vcpu->wq);
6191                 ++vcpu->stat.halt_wakeup;
6192         }
6193
6194         me = get_cpu();
6195         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6196                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6197                         smp_send_reschedule(cpu);
6198         put_cpu();
6199 }
6200
6201 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6202 {
6203         return kvm_x86_ops->interrupt_allowed(vcpu);
6204 }
6205
6206 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6207 {
6208         unsigned long current_rip = kvm_rip_read(vcpu) +
6209                 get_segment_base(vcpu, VCPU_SREG_CS);
6210
6211         return current_rip == linear_rip;
6212 }
6213 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6214
6215 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6216 {
6217         unsigned long rflags;
6218
6219         rflags = kvm_x86_ops->get_rflags(vcpu);
6220         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6221                 rflags &= ~X86_EFLAGS_TF;
6222         return rflags;
6223 }
6224 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6225
6226 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6227 {
6228         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6229             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6230                 rflags |= X86_EFLAGS_TF;
6231         kvm_x86_ops->set_rflags(vcpu, rflags);
6232         kvm_make_request(KVM_REQ_EVENT, vcpu);
6233 }
6234 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6235
6236 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6237 {
6238         int r;
6239
6240         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6241               is_error_page(work->page))
6242                 return;
6243
6244         r = kvm_mmu_reload(vcpu);
6245         if (unlikely(r))
6246                 return;
6247
6248         if (!vcpu->arch.mmu.direct_map &&
6249               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6250                 return;
6251
6252         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6253 }
6254
6255 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6256 {
6257         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6258 }
6259
6260 static inline u32 kvm_async_pf_next_probe(u32 key)
6261 {
6262         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6263 }
6264
6265 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6266 {
6267         u32 key = kvm_async_pf_hash_fn(gfn);
6268
6269         while (vcpu->arch.apf.gfns[key] != ~0)
6270                 key = kvm_async_pf_next_probe(key);
6271
6272         vcpu->arch.apf.gfns[key] = gfn;
6273 }
6274
6275 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6276 {
6277         int i;
6278         u32 key = kvm_async_pf_hash_fn(gfn);
6279
6280         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6281                      (vcpu->arch.apf.gfns[key] != gfn &&
6282                       vcpu->arch.apf.gfns[key] != ~0); i++)
6283                 key = kvm_async_pf_next_probe(key);
6284
6285         return key;
6286 }
6287
6288 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6289 {
6290         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6291 }
6292
6293 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6294 {
6295         u32 i, j, k;
6296
6297         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6298         while (true) {
6299                 vcpu->arch.apf.gfns[i] = ~0;
6300                 do {
6301                         j = kvm_async_pf_next_probe(j);
6302                         if (vcpu->arch.apf.gfns[j] == ~0)
6303                                 return;
6304                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6305                         /*
6306                          * k lies cyclically in ]i,j]
6307                          * |    i.k.j |
6308                          * |....j i.k.| or  |.k..j i...|
6309                          */
6310                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6311                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6312                 i = j;
6313         }
6314 }
6315
6316 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6317 {
6318
6319         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6320                                       sizeof(val));
6321 }
6322
6323 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6324                                      struct kvm_async_pf *work)
6325 {
6326         struct x86_exception fault;
6327
6328         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6329         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6330
6331         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6332             (vcpu->arch.apf.send_user_only &&
6333              kvm_x86_ops->get_cpl(vcpu) == 0))
6334                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6335         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6336                 fault.vector = PF_VECTOR;
6337                 fault.error_code_valid = true;
6338                 fault.error_code = 0;
6339                 fault.nested_page_fault = false;
6340                 fault.address = work->arch.token;
6341                 kvm_inject_page_fault(vcpu, &fault);
6342         }
6343 }
6344
6345 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6346                                  struct kvm_async_pf *work)
6347 {
6348         struct x86_exception fault;
6349
6350         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6351         if (is_error_page(work->page))
6352                 work->arch.token = ~0; /* broadcast wakeup */
6353         else
6354                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6355
6356         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6357             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6358                 fault.vector = PF_VECTOR;
6359                 fault.error_code_valid = true;
6360                 fault.error_code = 0;
6361                 fault.nested_page_fault = false;
6362                 fault.address = work->arch.token;
6363                 kvm_inject_page_fault(vcpu, &fault);
6364         }
6365         vcpu->arch.apf.halted = false;
6366 }
6367
6368 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6369 {
6370         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6371                 return true;
6372         else
6373                 return !kvm_event_needs_reinjection(vcpu) &&
6374                         kvm_x86_ops->interrupt_allowed(vcpu);
6375 }
6376
6377 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6378 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6379 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6380 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6381 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6382 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6383 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6384 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6385 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6386 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6387 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6388 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);