1 /* EtherLinkXL.c: A 3Com EtherLink PCI III/XL ethernet driver for linux. */
3 Written 1996-1999 by Donald Becker.
5 This software may be used and distributed according to the terms
6 of the GNU General Public License, incorporated herein by reference.
8 This driver is for the 3Com "Vortex" and "Boomerang" series ethercards.
9 Members of the series include Fast EtherLink 3c590/3c592/3c595/3c597
10 and the EtherLink XL 3c900 and 3c905 cards.
12 Problem reports and questions should be directed to
15 The author may be reached as becker@scyld.com, or C/O
16 Scyld Computing Corporation
17 410 Severn Ave., Suite 210
20 Linux Kernel Additions:
22 0.99H+lk0.9 - David S. Miller - softnet, PCI DMA updates
23 0.99H+lk1.0 - Jeff Garzik <jgarzik@pobox.com>
24 Remove compatibility defines for kernel versions < 2.2.x.
25 Update for new 2.3.x module interface
26 LK1.1.2 (March 19, 2000)
27 * New PCI interface (jgarzik)
29 LK1.1.3 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
30 - Merged with 3c575_cb.c
31 - Don't set RxComplete in boomerang interrupt enable reg
32 - spinlock in vortex_timer to protect mdio functions
33 - disable local interrupts around call to vortex_interrupt in
34 vortex_tx_timeout() (So vortex_interrupt can use spin_lock())
35 - Select window 3 in vortex_timer()'s write to Wn3_MAC_Ctrl
36 - In vortex_start_xmit(), move the lock to _after_ we've altered
37 vp->cur_tx and vp->tx_full. This defeats the race between
38 vortex_start_xmit() and vortex_interrupt which was identified
40 - Merged back support for six new cards from various sources
41 - Set vortex_have_pci if pci_module_init returns zero (fixes cardbus
43 - Tell it that 3c905C has NWAY for 100bT autoneg
44 - Fix handling of SetStatusEnd in 'Too much work..' code, as
45 per 2.3.99's 3c575_cb (Dave Hinds).
46 - Split ISR into two for vortex & boomerang
47 - Fix MOD_INC/DEC races
48 - Handle resource allocation failures.
49 - Fix 3CCFE575CT LED polarity
50 - Make tx_interrupt_mitigation the default
52 LK1.1.4 25 April 2000, Andrew Morton <andrewm@uow.edu.au>
53 - Add extra TxReset to vortex_up() to fix 575_cb hotplug initialisation probs.
54 - Put vortex_info_tbl into __devinitdata
55 - In the vortex_error StatsFull HACK, disable stats in vp->intr_enable as well
57 - Increased the loop counter in issue_and_wait from 2,000 to 4,000.
59 LK1.1.5 28 April 2000, andrewm
60 - Added powerpc defines (John Daniel <jdaniel@etresoft.com> said these work...)
61 - Some extra diagnostics
62 - In vortex_error(), reset the Tx on maxCollisions. Otherwise most
63 chips usually get a Tx timeout.
64 - Added extra_reset module parm
65 - Replaced some inline timer manip with mod_timer
66 (Franois romieu <Francois.Romieu@nic.fr>)
67 - In vortex_up(), don't make Wn3_config initialisation dependent upon has_nway
68 (this came across from 3c575_cb).
70 LK1.1.6 06 Jun 2000, andrewm
71 - Backed out the PPC defines.
72 - Use del_timer_sync(), mod_timer().
73 - Fix wrapped ulong comparison in boomerang_rx()
74 - Add IS_TORNADO, use it to suppress 3c905C checksum error msg
75 (Donald Becker, I Lee Hetherington <ilh@sls.lcs.mit.edu>)
76 - Replace union wn3_config with BFINS/BFEXT manipulation for
77 sparc64 (Pete Zaitcev, Peter Jones)
78 - In vortex_error, do_tx_reset and vortex_tx_timeout(Vortex):
79 do a netif_wake_queue() to better recover from errors. (Anders Pedersen,
81 - Print a warning on out-of-memory (rate limited to 1 per 10 secs)
82 - Added two more Cardbus 575 NICs: 5b57 and 6564 (Paul Wagland)
84 LK1.1.7 2 Jul 2000 andrewm
85 - Better handling of shared IRQs
86 - Reset the transmitter on a Tx reclaim error
87 - Fixed crash under OOM during vortex_open() (Mark Hemment)
88 - Fix Rx cessation problem during OOM (help from Mark Hemment)
89 - The spinlocks around the mdio access were blocking interrupts for 300uS.
90 Fix all this to use spin_lock_bh() within mdio_read/write
91 - Only write to TxFreeThreshold if it's a boomerang - other NICs don't
93 - Added 802.3x MAC-layer flow control support
95 LK1.1.8 13 Aug 2000 andrewm
96 - Ignore request_region() return value - already reserved if Cardbus.
97 - Merged some additional Cardbus flags from Don's 0.99Qk
98 - Some fixes for 3c556 (Fred Maciel)
99 - Fix for EISA initialisation (Jan Rekorajski)
100 - Renamed MII_XCVR_PWR and EEPROM_230 to align with 3c575_cb and D. Becker's drivers
101 - Fixed MII_XCVR_PWR for 3CCFE575CT
102 - Added INVERT_LED_PWR, used it.
103 - Backed out the extra_reset stuff
105 LK1.1.9 12 Sep 2000 andrewm
106 - Backed out the tx_reset_resume flags. It was a no-op.
107 - In vortex_error, don't reset the Tx on txReclaim errors
108 - In vortex_error, don't reset the Tx on maxCollisions errors.
109 Hence backed out all the DownListPtr logic here.
110 - In vortex_error, give Tornado cards a partial TxReset on
111 maxCollisions (David Hinds). Defined MAX_COLLISION_RESET for this.
112 - Redid some driver flags and device names based on pcmcia_cs-3.1.20.
113 - Fixed a bug where, if vp->tx_full is set when the interface
114 is downed, it remains set when the interface is upped. Bad
117 LK1.1.10 17 Sep 2000 andrewm
118 - Added EEPROM_8BIT for 3c555 (Fred Maciel)
119 - Added experimental support for the 3c556B Laptop Hurricane (Louis Gerbarg)
120 - Add HAS_NWAY to "3c900 Cyclone 10Mbps TPO"
122 LK1.1.11 13 Nov 2000 andrewm
123 - Dump MOD_INC/DEC_USE_COUNT, use SET_MODULE_OWNER
125 LK1.1.12 1 Jan 2001 andrewm (2.4.0-pre1)
126 - Call pci_enable_device before we request our IRQ (Tobias Ringstrom)
127 - Add 3c590 PCI latency timer hack to vortex_probe1 (from 0.99Ra)
128 - Added extended issue_and_wait for the 3c905CX.
129 - Look for an MII on PHY index 24 first (3c905CX oddity).
130 - Add HAS_NWAY to 3cSOHO100-TX (Brett Frankenberger)
131 - Don't free skbs we don't own on oom path in vortex_open().
134 - Added explicit `medialock' flag so we can truly
135 lock the media type down with `options'.
136 - "check ioremap return and some tidbits" (Arnaldo Carvalho de Melo <acme@conectiva.com.br>)
137 - Added and used EEPROM_NORESET for 3c556B PM resumes.
138 - Fixed leakage of vp->rx_ring.
139 - Break out separate HAS_HWCKSM device capability flag.
140 - Kill vp->tx_full (ANK)
141 - Merge zerocopy fragment handling (ANK?)
144 - Enable WOL. Can be turned on with `enable_wol' module option.
145 - EISA and PCI initialisation fixes (jgarzik, Manfred Spraul)
146 - If a device's internalconfig register reports it has NWAY,
147 use it, even if autoselect is enabled.
149 LK1.1.15 6 June 2001 akpm
150 - Prevent double counting of received bytes (Lars Christensen)
151 - Add ethtool support (jgarzik)
152 - Add module parm descriptions (Andrzej M. Krzysztofowicz)
153 - Implemented alloc_etherdev() API
154 - Special-case the 'Tx error 82' message.
156 LK1.1.16 18 July 2001 akpm
157 - Make NETIF_F_SG dependent upon nr_free_highpages(), not on CONFIG_HIGHMEM
158 - Lessen verbosity of bootup messages
159 - Fix WOL - use new PM API functions.
160 - Use netif_running() instead of vp->open in suspend/resume.
161 - Don't reset the interface logic on open/close/rmmod. It upsets
162 autonegotiation, and hence DHCP (from 0.99T).
163 - Back out EEPROM_NORESET flag because of the above (we do it for all
165 - Correct 3c982 identification string
166 - Rename wait_for_completion() to issue_and_wait() to avoid completion.h
169 LK1.1.17 18Dec01 akpm
170 - PCI ID 9805 is a Python-T, not a dual-port Cyclone. Apparently.
172 - Mask our advertised modes (vp->advertising) with our capabilities
173 (MII reg5) when deciding which duplex mode to use.
174 - Add `global_options' as default for options[]. Ditto global_enable_wol,
177 LK1.1.18 01Jul02 akpm
178 - Fix for undocumented transceiver power-up bit on some 3c566B's
179 (Donald Becker, Rahul Karnik)
181 - See http://www.zip.com.au/~akpm/linux/#3c59x-2.3 for more details.
182 - Also see Documentation/networking/vortex.txt
184 LK1.1.19 10Nov02 Marc Zyngier <maz@wild-wind.fr.eu.org>
185 - EISA sysfs integration.
189 * FIXME: This driver _could_ support MTU changing, but doesn't. See Don's hamachi.c implementation
190 * as well as other drivers
192 * NOTE: If you make 'vortex_debug' a constant (#define vortex_debug 0) the driver shrinks by 2k
193 * due to dead code elimination. There will be some performance benefits from this due to
194 * elimination of all the tests and reduced cache footprint.
198 #define DRV_NAME "3c59x"
199 #define DRV_VERSION "LK1.1.19"
200 #define DRV_RELDATE "10 Nov 2002"
204 /* A few values that may be tweaked. */
205 /* Keep the ring sizes a power of two for efficiency. */
206 #define TX_RING_SIZE 16
207 #define RX_RING_SIZE 32
208 #define PKT_BUF_SZ 1536 /* Size of each temporary Rx buffer.*/
210 /* "Knobs" that adjust features and parameters. */
211 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
212 Setting to > 1512 effectively disables this feature. */
214 static int rx_copybreak = 200;
216 /* ARM systems perform better by disregarding the bus-master
217 transfer capability of these cards. -- rmk */
218 static int rx_copybreak = 1513;
220 /* Allow setting MTU to a larger size, bypassing the normal ethernet setup. */
221 static const int mtu = 1500;
222 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
223 static int max_interrupt_work = 32;
224 /* Tx timeout interval (millisecs) */
225 static int watchdog = 5000;
227 /* Allow aggregation of Tx interrupts. Saves CPU load at the cost
228 * of possible Tx stalls if the system is blocking interrupts
229 * somewhere else. Undefine this to disable.
231 #define tx_interrupt_mitigation 1
233 /* Put out somewhat more debugging messages. (0: no msg, 1 minimal .. 6). */
234 #define vortex_debug debug
236 static int vortex_debug = VORTEX_DEBUG;
238 static int vortex_debug = 1;
242 #error You must compile this file with the correct options!
243 #error See the last lines of the source file.
244 #error You must compile this driver with "-O".
247 #include <linux/config.h>
248 #include <linux/module.h>
249 #include <linux/kernel.h>
250 #include <linux/string.h>
251 #include <linux/timer.h>
252 #include <linux/errno.h>
253 #include <linux/in.h>
254 #include <linux/ioport.h>
255 #include <linux/slab.h>
256 #include <linux/interrupt.h>
257 #include <linux/pci.h>
258 #include <linux/mii.h>
259 #include <linux/init.h>
260 #include <linux/netdevice.h>
261 #include <linux/etherdevice.h>
262 #include <linux/skbuff.h>
263 #include <linux/ethtool.h>
264 #include <linux/highmem.h>
265 #include <linux/eisa.h>
266 #include <asm/irq.h> /* For NR_IRQS only. */
267 #include <asm/bitops.h>
269 #include <asm/uaccess.h>
271 /* Kernel compatibility defines, some common to David Hinds' PCMCIA package.
272 This is only in the support-all-kernels source code. */
274 #define RUN_AT(x) (jiffies + (x))
276 #include <linux/delay.h>
279 static char version[] __devinitdata =
280 DRV_NAME ": Donald Becker and others. www.scyld.com/network/vortex.html\n";
282 MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
283 MODULE_DESCRIPTION("3Com 3c59x/3c9xx ethernet driver "
284 DRV_VERSION " " DRV_RELDATE);
285 MODULE_LICENSE("GPL");
287 MODULE_PARM(debug, "i");
288 MODULE_PARM(global_options, "i");
289 MODULE_PARM(options, "1-" __MODULE_STRING(8) "i");
290 MODULE_PARM(global_full_duplex, "i");
291 MODULE_PARM(full_duplex, "1-" __MODULE_STRING(8) "i");
292 MODULE_PARM(hw_checksums, "1-" __MODULE_STRING(8) "i");
293 MODULE_PARM(flow_ctrl, "1-" __MODULE_STRING(8) "i");
294 MODULE_PARM(rx_copybreak, "i");
295 MODULE_PARM(max_interrupt_work, "i");
296 MODULE_PARM(compaq_ioaddr, "i");
297 MODULE_PARM(compaq_irq, "i");
298 MODULE_PARM(compaq_device_id, "i");
299 MODULE_PARM(watchdog, "i");
300 MODULE_PARM_DESC(debug, "3c59x debug level (0-6)");
301 MODULE_PARM_DESC(options, "3c59x: Bits 0-3: media type, bit 4: bus mastering, bit 9: full duplex");
302 MODULE_PARM_DESC(global_options, "3c59x: same as options, but applies to all NICs if options is unset");
303 MODULE_PARM_DESC(full_duplex, "3c59x full duplex setting(s) (1)");
304 MODULE_PARM_DESC(global_full_duplex, "3c59x: same as full_duplex, but applies to all NICs if options is unset");
305 MODULE_PARM_DESC(hw_checksums, "3c59x Hardware checksum checking by adapter(s) (0-1)");
306 MODULE_PARM_DESC(flow_ctrl, "3c59x 802.3x flow control usage (PAUSE only) (0-1)");
307 MODULE_PARM_DESC(rx_copybreak, "3c59x copy breakpoint for copy-only-tiny-frames");
308 MODULE_PARM_DESC(max_interrupt_work, "3c59x maximum events handled per interrupt");
309 MODULE_PARM_DESC(compaq_ioaddr, "3c59x PCI I/O base address (Compaq BIOS problem workaround)");
310 MODULE_PARM_DESC(compaq_irq, "3c59x PCI IRQ number (Compaq BIOS problem workaround)");
311 MODULE_PARM_DESC(compaq_device_id, "3c59x PCI device ID (Compaq BIOS problem workaround)");
312 MODULE_PARM_DESC(watchdog, "3c59x transmit timeout in milliseconds");
314 /* Operational parameter that usually are not changed. */
316 /* The Vortex size is twice that of the original EtherLinkIII series: the
317 runtime register window, window 1, is now always mapped in.
318 The Boomerang size is twice as large as the Vortex -- it has additional
319 bus master control registers. */
320 #define VORTEX_TOTAL_SIZE 0x20
321 #define BOOMERANG_TOTAL_SIZE 0x40
323 /* Set iff a MII transceiver on any interface requires mdio preamble.
324 This only set with the original DP83840 on older 3c905 boards, so the extra
325 code size of a per-interface flag is not worthwhile. */
326 static char mii_preamble_required;
328 #define PFX DRV_NAME ": "
335 I. Board Compatibility
337 This device driver is designed for the 3Com FastEtherLink and FastEtherLink
338 XL, 3Com's PCI to 10/100baseT adapters. It also works with the 10Mbs
339 versions of the FastEtherLink cards. The supported product IDs are
340 3c590, 3c592, 3c595, 3c597, 3c900, 3c905
342 The related ISA 3c515 is supported with a separate driver, 3c515.c, included
343 with the kernel source or available from
344 cesdis.gsfc.nasa.gov:/pub/linux/drivers/3c515.html
346 II. Board-specific settings
348 PCI bus devices are configured by the system at boot time, so no jumpers
349 need to be set on the board. The system BIOS should be set to assign the
350 PCI INTA signal to an otherwise unused system IRQ line.
352 The EEPROM settings for media type and forced-full-duplex are observed.
353 The EEPROM media type should be left at the default "autoselect" unless using
354 10base2 or AUI connections which cannot be reliably detected.
356 III. Driver operation
358 The 3c59x series use an interface that's very similar to the previous 3c5x9
359 series. The primary interface is two programmed-I/O FIFOs, with an
360 alternate single-contiguous-region bus-master transfer (see next).
362 The 3c900 "Boomerang" series uses a full-bus-master interface with separate
363 lists of transmit and receive descriptors, similar to the AMD LANCE/PCnet,
364 DEC Tulip and Intel Speedo3. The first chip version retains a compatible
365 programmed-I/O interface that has been removed in 'B' and subsequent board
368 One extension that is advertised in a very large font is that the adapters
369 are capable of being bus masters. On the Vortex chip this capability was
370 only for a single contiguous region making it far less useful than the full
371 bus master capability. There is a significant performance impact of taking
372 an extra interrupt or polling for the completion of each transfer, as well
373 as difficulty sharing the single transfer engine between the transmit and
374 receive threads. Using DMA transfers is a win only with large blocks or
375 with the flawed versions of the Intel Orion motherboard PCI controller.
377 The Boomerang chip's full-bus-master interface is useful, and has the
378 currently-unused advantages over other similar chips that queued transmit
379 packets may be reordered and receive buffer groups are associated with a
382 With full-bus-master support, this driver uses a "RX_COPYBREAK" scheme.
383 Rather than a fixed intermediate receive buffer, this scheme allocates
384 full-sized skbuffs as receive buffers. The value RX_COPYBREAK is used as
385 the copying breakpoint: it is chosen to trade-off the memory wasted by
386 passing the full-sized skbuff to the queue layer for all frames vs. the
387 copying cost of copying a frame to a correctly-sized skbuff.
389 IIIC. Synchronization
390 The driver runs as two independent, single-threaded flows of control. One
391 is the send-packet routine, which enforces single-threaded use by the
392 dev->tbusy flag. The other thread is the interrupt handler, which is single
393 threaded by the hardware and other software.
397 Thanks to Cameron Spitzer and Terry Murphy of 3Com for providing development
398 3c590, 3c595, and 3c900 boards.
399 The name "Vortex" is the internal 3Com project name for the PCI ASIC, and
400 the EISA version is called "Demon". According to Terry these names come
401 from rides at the local amusement park.
403 The new chips support both ethernet (1.5K) and FDDI (4.5K) packet sizes!
404 This driver only supports ethernet packets because of the skbuff allocation
408 /* This table drives the PCI probe routines. It's mostly boilerplate in all
409 of the drivers, and will likely be provided by some future kernel.
412 PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4,
413 PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3,
416 enum { IS_VORTEX=1, IS_BOOMERANG=2, IS_CYCLONE=4, IS_TORNADO=8,
417 EEPROM_8BIT=0x10, /* AKPM: Uses 0x230 as the base bitmaps for EEPROM reads */
418 HAS_PWR_CTRL=0x20, HAS_MII=0x40, HAS_NWAY=0x80, HAS_CB_FNS=0x100,
419 INVERT_MII_PWR=0x200, INVERT_LED_PWR=0x400, MAX_COLLISION_RESET=0x800,
420 EEPROM_OFFSET=0x1000, HAS_HWCKSM=0x2000, WNO_XCVR_PWR=0x4000,
421 EXTRA_PREAMBLE=0x8000, };
471 /* note: this array directly indexed by above enums, and MUST
472 * be kept in sync with both the enums above, and the PCI device
475 static struct vortex_chip_info {
480 } vortex_info_tbl[] __devinitdata = {
481 {"3c590 Vortex 10Mbps",
482 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
483 {"3c592 EISA 10Mbps Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
484 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
485 {"3c597 EISA Fast Demon/Vortex", /* AKPM: from Don's 3c59x_cb.c 0.49H */
486 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
487 {"3c595 Vortex 100baseTx",
488 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
489 {"3c595 Vortex 100baseT4",
490 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
492 {"3c595 Vortex 100base-MII",
493 PCI_USES_IO|PCI_USES_MASTER, IS_VORTEX, 32, },
494 {"3c900 Boomerang 10baseT",
495 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
496 {"3c900 Boomerang 10Mbps Combo",
497 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG, 64, },
498 {"3c900 Cyclone 10Mbps TPO", /* AKPM: from Don's 0.99M */
499 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
500 {"3c900 Cyclone 10Mbps Combo",
501 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
503 {"3c900 Cyclone 10Mbps TPC", /* AKPM: from Don's 0.99M */
504 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
505 {"3c900B-FL Cyclone 10base-FL",
506 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
507 {"3c905 Boomerang 100baseTx",
508 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
509 {"3c905 Boomerang 100baseT4",
510 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII, 64, },
511 {"3c905B Cyclone 100baseTx",
512 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
514 {"3c905B Cyclone 10/100/BNC",
515 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
516 {"3c905B-FX Cyclone 100baseFx",
517 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
519 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
521 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_HWCKSM, 128, },
523 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
525 {"3cSOHO100-TX Hurricane",
526 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM, 128, },
527 {"3c555 Laptop Hurricane",
528 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|EEPROM_8BIT|HAS_HWCKSM, 128, },
529 {"3c556 Laptop Tornado",
530 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_8BIT|HAS_CB_FNS|INVERT_MII_PWR|
532 {"3c556B Laptop Hurricane",
533 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|EEPROM_OFFSET|HAS_CB_FNS|INVERT_MII_PWR|
534 WNO_XCVR_PWR|HAS_HWCKSM, 128, },
535 {"3c575 [Megahertz] 10/100 LAN CardBus",
536 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
538 {"3c575 Boomerang CardBus",
539 PCI_USES_IO|PCI_USES_MASTER, IS_BOOMERANG|HAS_MII|EEPROM_8BIT, 128, },
540 {"3CCFE575BT Cyclone CardBus",
541 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|
542 INVERT_LED_PWR|HAS_HWCKSM, 128, },
543 {"3CCFE575CT Tornado CardBus",
544 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
545 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
546 {"3CCFE656 Cyclone CardBus",
547 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
548 INVERT_LED_PWR|HAS_HWCKSM, 128, },
549 {"3CCFEM656B Cyclone+Winmodem CardBus",
550 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
551 INVERT_LED_PWR|HAS_HWCKSM, 128, },
553 {"3CXFEM656C Tornado+Winmodem CardBus", /* From pcmcia-cs-3.1.5 */
554 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_CB_FNS|EEPROM_8BIT|INVERT_MII_PWR|
555 MAX_COLLISION_RESET|HAS_HWCKSM, 128, },
556 {"3c450 HomePNA Tornado", /* AKPM: from Don's 0.99Q */
557 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
559 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
560 {"3c982 Hydra Dual Port A",
561 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
562 {"3c982 Hydra Dual Port B",
563 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_HWCKSM|HAS_NWAY, 128, },
566 PCI_USES_IO|PCI_USES_MASTER, IS_CYCLONE|HAS_NWAY|HAS_HWCKSM|EXTRA_PREAMBLE, 128, },
567 {"3c920B-EMB-WNM Tornado",
568 PCI_USES_IO|PCI_USES_MASTER, IS_TORNADO|HAS_NWAY|HAS_HWCKSM, 128, },
570 {0,}, /* 0 terminated list. */
574 static struct pci_device_id vortex_pci_tbl[] = {
575 { 0x10B7, 0x5900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C590 },
576 { 0x10B7, 0x5920, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C592 },
577 { 0x10B7, 0x5970, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C597 },
578 { 0x10B7, 0x5950, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_1 },
579 { 0x10B7, 0x5951, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_2 },
581 { 0x10B7, 0x5952, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C595_3 },
582 { 0x10B7, 0x9000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_1 },
583 { 0x10B7, 0x9001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_2 },
584 { 0x10B7, 0x9004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_3 },
585 { 0x10B7, 0x9005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_4 },
587 { 0x10B7, 0x9006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900_5 },
588 { 0x10B7, 0x900A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C900B_FL },
589 { 0x10B7, 0x9050, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_1 },
590 { 0x10B7, 0x9051, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905_2 },
591 { 0x10B7, 0x9055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_1 },
593 { 0x10B7, 0x9058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_2 },
594 { 0x10B7, 0x905A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905B_FX },
595 { 0x10B7, 0x9200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C905C },
596 { 0x10B7, 0x9800, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C980 },
597 { 0x10B7, 0x9805, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C9805 },
599 { 0x10B7, 0x7646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CSOHO100_TX },
600 { 0x10B7, 0x5055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C555 },
601 { 0x10B7, 0x6055, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556 },
602 { 0x10B7, 0x6056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C556B },
603 { 0x10B7, 0x5b57, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575 },
605 { 0x10B7, 0x5057, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C575_1 },
606 { 0x10B7, 0x5157, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575 },
607 { 0x10B7, 0x5257, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE575CT },
608 { 0x10B7, 0x6560, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFE656 },
609 { 0x10B7, 0x6562, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656 },
611 { 0x10B7, 0x6564, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3CCFEM656_1 },
612 { 0x10B7, 0x4500, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C450 },
613 { 0x10B7, 0x9201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C920 },
614 { 0x10B7, 0x1201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982A },
615 { 0x10B7, 0x1202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_3C982B },
617 { 0x10B7, 0x9056, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_905BT4 },
618 { 0x10B7, 0x9210, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_920B_EMB_WNM },
620 {0,} /* 0 terminated list. */
622 MODULE_DEVICE_TABLE(pci, vortex_pci_tbl);
625 /* Operational definitions.
626 These are not used by other compilation units and thus are not
627 exported in a ".h" file.
629 First the windows. There are eight register windows, with the command
630 and status registers available in each.
632 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
634 #define EL3_STATUS 0x0e
636 /* The top five bits written to EL3_CMD are a command, the lower
637 11 bits are the parameter, if applicable.
638 Note that 11 parameters bits was fine for ethernet, but the new chip
639 can handle FDDI length frames (~4500 octets) and now parameters count
640 32-bit 'Dwords' rather than octets. */
643 TotalReset = 0<<11, SelectWindow = 1<<11, StartCoax = 2<<11,
644 RxDisable = 3<<11, RxEnable = 4<<11, RxReset = 5<<11,
645 UpStall = 6<<11, UpUnstall = (6<<11)+1,
646 DownStall = (6<<11)+2, DownUnstall = (6<<11)+3,
647 RxDiscard = 8<<11, TxEnable = 9<<11, TxDisable = 10<<11, TxReset = 11<<11,
648 FakeIntr = 12<<11, AckIntr = 13<<11, SetIntrEnb = 14<<11,
649 SetStatusEnb = 15<<11, SetRxFilter = 16<<11, SetRxThreshold = 17<<11,
650 SetTxThreshold = 18<<11, SetTxStart = 19<<11,
651 StartDMAUp = 20<<11, StartDMADown = (20<<11)+1, StatsEnable = 21<<11,
652 StatsDisable = 22<<11, StopCoax = 23<<11, SetFilterBit = 25<<11,};
654 /* The SetRxFilter command accepts the following classes: */
656 RxStation = 1, RxMulticast = 2, RxBroadcast = 4, RxProm = 8 };
658 /* Bits in the general status register. */
660 IntLatch = 0x0001, HostError = 0x0002, TxComplete = 0x0004,
661 TxAvailable = 0x0008, RxComplete = 0x0010, RxEarly = 0x0020,
662 IntReq = 0x0040, StatsFull = 0x0080,
663 DMADone = 1<<8, DownComplete = 1<<9, UpComplete = 1<<10,
664 DMAInProgress = 1<<11, /* DMA controller is still busy.*/
665 CmdInProgress = 1<<12, /* EL3_CMD is still busy.*/
668 /* Register window 1 offsets, the window used in normal operation.
669 On the Vortex this window is always mapped at offsets 0x10-0x1f. */
671 TX_FIFO = 0x10, RX_FIFO = 0x10, RxErrors = 0x14,
672 RxStatus = 0x18, Timer=0x1A, TxStatus = 0x1B,
673 TxFree = 0x1C, /* Remaining free bytes in Tx buffer. */
676 Wn0EepromCmd = 10, /* Window 0: EEPROM command register. */
677 Wn0EepromData = 12, /* Window 0: EEPROM results register. */
678 IntrStatus=0x0E, /* Valid in all windows. */
680 enum Win0_EEPROM_bits {
681 EEPROM_Read = 0x80, EEPROM_WRITE = 0x40, EEPROM_ERASE = 0xC0,
682 EEPROM_EWENB = 0x30, /* Enable erasing/writing for 10 msec. */
683 EEPROM_EWDIS = 0x00, /* Disable EWENB before 10 msec timeout. */
685 /* EEPROM locations. */
687 PhysAddr01=0, PhysAddr23=1, PhysAddr45=2, ModelID=3,
688 EtherLink3ID=7, IFXcvrIO=8, IRQLine=9,
689 NodeAddr01=10, NodeAddr23=11, NodeAddr45=12,
690 DriverTune=13, Checksum=15};
692 enum Window2 { /* Window 2. */
695 enum Window3 { /* Window 3: MAC/config bits. */
696 Wn3_Config=0, Wn3_MAC_Ctrl=6, Wn3_Options=8,
699 #define BFEXT(value, offset, bitcount) \
700 ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1))
702 #define BFINS(lhs, rhs, offset, bitcount) \
703 (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \
704 (((rhs) & ((1 << (bitcount)) - 1)) << (offset)))
706 #define RAM_SIZE(v) BFEXT(v, 0, 3)
707 #define RAM_WIDTH(v) BFEXT(v, 3, 1)
708 #define RAM_SPEED(v) BFEXT(v, 4, 2)
709 #define ROM_SIZE(v) BFEXT(v, 6, 2)
710 #define RAM_SPLIT(v) BFEXT(v, 16, 2)
711 #define XCVR(v) BFEXT(v, 20, 4)
712 #define AUTOSELECT(v) BFEXT(v, 24, 1)
714 enum Window4 { /* Window 4: Xcvr/media bits. */
715 Wn4_FIFODiag = 4, Wn4_NetDiag = 6, Wn4_PhysicalMgmt=8, Wn4_Media = 10,
717 enum Win4_Media_bits {
718 Media_SQE = 0x0008, /* Enable SQE error counting for AUI. */
719 Media_10TP = 0x00C0, /* Enable link beat and jabber for 10baseT. */
720 Media_Lnk = 0x0080, /* Enable just link beat for 100TX/100FX. */
721 Media_LnkBeat = 0x0800,
723 enum Window7 { /* Window 7: Bus Master control. */
724 Wn7_MasterAddr = 0, Wn7_MasterLen = 6, Wn7_MasterStatus = 12,
726 /* Boomerang bus master control registers. */
728 PktStatus = 0x20, DownListPtr = 0x24, FragAddr = 0x28, FragLen = 0x2c,
729 TxFreeThreshold = 0x2f, UpPktStatus = 0x30, UpListPtr = 0x38,
732 /* The Rx and Tx descriptor lists.
733 Caution Alpha hackers: these types are 32 bits! Note also the 8 byte
734 alignment contraint on tx_ring[] and rx_ring[]. */
735 #define LAST_FRAG 0x80000000 /* Last Addr/Len pair in descriptor. */
736 #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */
737 struct boom_rx_desc {
738 u32 next; /* Last entry points to 0. */
740 u32 addr; /* Up to 63 addr/len pairs possible. */
741 s32 length; /* Set LAST_FRAG to indicate last pair. */
743 /* Values for the Rx status entry. */
744 enum rx_desc_status {
745 RxDComplete=0x00008000, RxDError=0x4000,
746 /* See boomerang_rx() for actual error bits */
747 IPChksumErr=1<<25, TCPChksumErr=1<<26, UDPChksumErr=1<<27,
748 IPChksumValid=1<<29, TCPChksumValid=1<<30, UDPChksumValid=1<<31,
752 #define DO_ZEROCOPY 1
754 #define DO_ZEROCOPY 0
757 struct boom_tx_desc {
758 u32 next; /* Last entry points to 0. */
759 s32 status; /* bits 0:12 length, others see below. */
764 } frag[1+MAX_SKB_FRAGS];
771 /* Values for the Tx status entry. */
772 enum tx_desc_status {
773 CRCDisable=0x2000, TxDComplete=0x8000,
774 AddIPChksum=0x02000000, AddTCPChksum=0x04000000, AddUDPChksum=0x08000000,
775 TxIntrUploaded=0x80000000, /* IRQ when in FIFO, but maybe not sent. */
778 /* Chip features we care about in vp->capabilities, read from the EEPROM. */
779 enum ChipCaps { CapBusMaster=0x20, CapPwrMgmt=0x2000 };
781 struct vortex_private {
782 /* The Rx and Tx rings should be quad-word-aligned. */
783 struct boom_rx_desc* rx_ring;
784 struct boom_tx_desc* tx_ring;
785 dma_addr_t rx_ring_dma;
786 dma_addr_t tx_ring_dma;
787 /* The addresses of transmit- and receive-in-place skbuffs. */
788 struct sk_buff* rx_skbuff[RX_RING_SIZE];
789 struct sk_buff* tx_skbuff[TX_RING_SIZE];
790 unsigned int cur_rx, cur_tx; /* The next free ring entry */
791 unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */
792 struct net_device_stats stats;
793 struct sk_buff *tx_skb; /* Packet being eaten by bus master ctrl. */
794 dma_addr_t tx_skb_dma; /* Allocated DMA address for bus master ctrl DMA. */
796 /* PCI configuration space information. */
797 struct device *gendev;
798 char *cb_fn_base; /* CardBus function status addr space. */
800 /* Some values here only for performance evaluation and path-coverage */
801 int rx_nocopy, rx_copy, queued_packet, rx_csumhits;
804 /* The remainder are related to chip state, mostly media selection. */
805 struct timer_list timer; /* Media selection timer. */
806 struct timer_list rx_oom_timer; /* Rx skb allocation retry timer */
807 int options; /* User-settable misc. driver options. */
808 unsigned int media_override:4, /* Passed-in media type. */
809 default_media:4, /* Read from the EEPROM/Wn3_Config. */
810 full_duplex:1, force_fd:1, autoselect:1,
811 bus_master:1, /* Vortex can only do a fragment bus-m. */
812 full_bus_master_tx:1, full_bus_master_rx:2, /* Boomerang */
813 flow_ctrl:1, /* Use 802.3x flow control (PAUSE only) */
814 partner_flow_ctrl:1, /* Partner supports flow control */
816 pm_state_valid:1, /* power_state[] has sane contents */
819 must_free_region:1; /* Flag: if zero, Cardbus owns the I/O region */
823 u16 available_media; /* From Wn3_Options. */
824 u16 capabilities, info1, info2; /* Various, from EEPROM. */
825 u16 advertising; /* NWay media advertisement */
826 unsigned char phys[2]; /* MII device addresses. */
827 u16 deferred; /* Resend these interrupts when we
828 * bale from the ISR */
829 u16 io_size; /* Size of PCI region (for release_region) */
830 spinlock_t lock; /* Serialise access to device & its vortex_private */
831 spinlock_t mdio_lock; /* Serialise access to mdio hardware */
836 #define DEVICE_PCI(dev) (((dev)->bus == &pci_bus_type) ? to_pci_dev((dev)) : NULL)
838 #define DEVICE_PCI(dev) NULL
841 #define VORTEX_PCI(vp) (((vp)->gendev) ? DEVICE_PCI((vp)->gendev) : NULL)
844 #define DEVICE_EISA(dev) (((dev)->bus == &eisa_bus_type) ? to_eisa_device((dev)) : NULL)
846 #define DEVICE_EISA(dev) NULL
849 #define VORTEX_EISA(vp) (((vp)->gendev) ? DEVICE_EISA((vp)->gendev) : NULL)
851 /* The action to take with a media selection timer tick.
852 Note that we deviate from the 3Com order by checking 10base2 before AUI.
855 XCVR_10baseT=0, XCVR_AUI, XCVR_10baseTOnly, XCVR_10base2, XCVR_100baseTx,
856 XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
859 static struct media_table {
861 unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
862 mask:8, /* The transceiver-present bit in Wn3_Config.*/
863 next:8; /* The media type to try next. */
864 int wait; /* Time before we check media status. */
866 { "10baseT", Media_10TP,0x08, XCVR_10base2, (14*HZ)/10},
867 { "10Mbs AUI", Media_SQE, 0x20, XCVR_Default, (1*HZ)/10},
868 { "undefined", 0, 0x80, XCVR_10baseT, 10000},
869 { "10base2", 0, 0x10, XCVR_AUI, (1*HZ)/10},
870 { "100baseTX", Media_Lnk, 0x02, XCVR_100baseFx, (14*HZ)/10},
871 { "100baseFX", Media_Lnk, 0x04, XCVR_MII, (14*HZ)/10},
872 { "MII", 0, 0x41, XCVR_10baseT, 3*HZ },
873 { "undefined", 0, 0x01, XCVR_10baseT, 10000},
874 { "Autonegotiate", 0, 0x41, XCVR_10baseT, 3*HZ},
875 { "MII-External", 0, 0x41, XCVR_10baseT, 3*HZ },
876 { "Default", 0, 0xFF, XCVR_10baseT, 10000},
879 static int vortex_probe1(struct device *gendev, long ioaddr, int irq,
880 int chip_idx, int card_idx);
881 static void vortex_up(struct net_device *dev);
882 static void vortex_down(struct net_device *dev);
883 static int vortex_open(struct net_device *dev);
884 static void mdio_sync(long ioaddr, int bits);
885 static int mdio_read(struct net_device *dev, int phy_id, int location);
886 static void mdio_write(struct net_device *vp, int phy_id, int location, int value);
887 static void vortex_timer(unsigned long arg);
888 static void rx_oom_timer(unsigned long arg);
889 static int vortex_start_xmit(struct sk_buff *skb, struct net_device *dev);
890 static int boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev);
891 static int vortex_rx(struct net_device *dev);
892 static int boomerang_rx(struct net_device *dev);
893 static irqreturn_t vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs);
894 static irqreturn_t boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs);
895 static int vortex_close(struct net_device *dev);
896 static void dump_tx_ring(struct net_device *dev);
897 static void update_stats(long ioaddr, struct net_device *dev);
898 static struct net_device_stats *vortex_get_stats(struct net_device *dev);
899 static void set_rx_mode(struct net_device *dev);
900 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
901 static void vortex_tx_timeout(struct net_device *dev);
902 static void acpi_set_WOL(struct net_device *dev);
903 static struct ethtool_ops vortex_ethtool_ops;
905 /* This driver uses 'options' to pass the media type, full-duplex flag, etc. */
906 /* Option count limit only -- unlimited interfaces are supported. */
908 static int options[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1,};
909 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
910 static int hw_checksums[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
911 static int flow_ctrl[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
912 static int global_options = -1;
913 static int global_full_duplex = -1;
915 /* #define dev_alloc_skb dev_alloc_skb_debug */
917 /* Variables to work-around the Compaq PCI BIOS32 problem. */
918 static int compaq_ioaddr, compaq_irq, compaq_device_id = 0x5900;
919 static struct net_device *compaq_net_device;
921 static int vortex_cards_found;
925 static int vortex_suspend (struct pci_dev *pdev, u32 state)
927 struct net_device *dev = pci_get_drvdata(pdev);
929 if (dev && dev->priv) {
930 if (netif_running(dev)) {
931 netif_device_detach(dev);
938 static int vortex_resume (struct pci_dev *pdev)
940 struct net_device *dev = pci_get_drvdata(pdev);
942 if (dev && dev->priv) {
943 if (netif_running(dev)) {
945 netif_device_attach(dev);
951 #endif /* CONFIG_PM */
954 static struct eisa_device_id vortex_eisa_ids[] = {
955 { "TCM5920", CH_3C592 },
956 { "TCM5970", CH_3C597 },
960 static int vortex_eisa_probe (struct device *device);
961 static int vortex_eisa_remove (struct device *device);
963 static struct eisa_driver vortex_eisa_driver = {
964 .id_table = vortex_eisa_ids,
967 .probe = vortex_eisa_probe,
968 .remove = vortex_eisa_remove
972 static int vortex_eisa_probe (struct device *device)
975 struct eisa_device *edev;
977 edev = to_eisa_device (device);
978 ioaddr = edev->base_addr;
980 if (!request_region(ioaddr, VORTEX_TOTAL_SIZE, DRV_NAME))
983 if (vortex_probe1(device, ioaddr, inw(ioaddr + 0xC88) >> 12,
984 edev->id.driver_data, vortex_cards_found)) {
985 release_region (ioaddr, VORTEX_TOTAL_SIZE);
989 vortex_cards_found++;
994 static int vortex_eisa_remove (struct device *device)
996 struct eisa_device *edev;
997 struct net_device *dev;
998 struct vortex_private *vp;
1001 edev = to_eisa_device (device);
1002 dev = eisa_get_drvdata (edev);
1005 printk("vortex_eisa_remove called for Compaq device!\n");
1010 ioaddr = dev->base_addr;
1012 unregister_netdev (dev);
1013 outw (TotalReset|0x14, ioaddr + EL3_CMD);
1014 release_region (ioaddr, VORTEX_TOTAL_SIZE);
1021 /* returns count found (>= 0), or negative on error */
1022 static int __init vortex_eisa_init (void)
1025 int orig_cards_found = vortex_cards_found;
1028 if (eisa_driver_register (&vortex_eisa_driver) >= 0) {
1029 /* Because of the way EISA bus is probed, we cannot assume
1030 * any device have been found when we exit from
1031 * eisa_driver_register (the bus root driver may not be
1032 * initialized yet). So we blindly assume something was
1033 * found, and let the sysfs magic happend... */
1039 /* Special code to work-around the Compaq PCI BIOS32 problem. */
1040 if (compaq_ioaddr) {
1041 vortex_probe1(NULL, compaq_ioaddr, compaq_irq,
1042 compaq_device_id, vortex_cards_found++);
1045 return vortex_cards_found - orig_cards_found + eisa_found;
1048 /* returns count (>= 0), or negative on error */
1049 static int __devinit vortex_init_one (struct pci_dev *pdev,
1050 const struct pci_device_id *ent)
1054 /* wake up and enable device */
1055 if (pci_enable_device (pdev)) {
1058 rc = vortex_probe1 (&pdev->dev, pci_resource_start (pdev, 0),
1059 pdev->irq, ent->driver_data, vortex_cards_found);
1061 vortex_cards_found++;
1067 * Start up the PCI/EISA device which is described by *gendev.
1068 * Return 0 on success.
1070 * NOTE: pdev can be NULL, for the case of a Compaq device
1072 static int __devinit vortex_probe1(struct device *gendev,
1073 long ioaddr, int irq,
1074 int chip_idx, int card_idx)
1076 struct vortex_private *vp;
1078 unsigned int eeprom[0x40], checksum = 0; /* EEPROM contents */
1080 struct net_device *dev;
1081 static int printed_version;
1082 int retval, print_info;
1083 struct vortex_chip_info * const vci = &vortex_info_tbl[chip_idx];
1084 char *print_name = "3c59x";
1085 struct pci_dev *pdev = NULL;
1086 struct eisa_device *edev = NULL;
1088 if (!printed_version) {
1090 printed_version = 1;
1094 if ((pdev = DEVICE_PCI(gendev))) {
1095 print_name = pci_name(pdev);
1098 if ((edev = DEVICE_EISA(gendev))) {
1099 print_name = edev->dev.bus_id;
1103 dev = alloc_etherdev(sizeof(*vp));
1106 printk (KERN_ERR PFX "unable to allocate etherdev, aborting\n");
1109 SET_MODULE_OWNER(dev);
1110 SET_NETDEV_DEV(dev, gendev);
1113 option = global_options;
1115 /* The lower four bits are the media type. */
1116 if (dev->mem_start) {
1118 * The 'options' param is passed in as the third arg to the
1119 * LILO 'ether=' argument for non-modular use
1121 option = dev->mem_start;
1123 else if (card_idx < MAX_UNITS) {
1124 if (options[card_idx] >= 0)
1125 option = options[card_idx];
1129 if (option & 0x8000)
1131 if (option & 0x4000)
1135 print_info = (vortex_debug > 1);
1137 printk (KERN_INFO "See Documentation/networking/vortex.txt\n");
1139 printk(KERN_INFO "%s: 3Com %s %s at 0x%lx. Vers " DRV_VERSION "\n",
1141 pdev ? "PCI" : "EISA",
1145 dev->base_addr = ioaddr;
1148 vp->drv_flags = vci->drv_flags;
1149 vp->has_nway = (vci->drv_flags & HAS_NWAY) ? 1 : 0;
1150 vp->io_size = vci->io_size;
1151 vp->card_idx = card_idx;
1153 /* module list only for Compaq device */
1154 if (gendev == NULL) {
1155 compaq_net_device = dev;
1158 /* PCI-only startup logic */
1160 /* EISA resources already marked, so only PCI needs to do this here */
1161 /* Ignore return value, because Cardbus drivers already allocate for us */
1162 if (request_region(ioaddr, vci->io_size, print_name) != NULL)
1163 vp->must_free_region = 1;
1165 /* enable bus-mastering if necessary */
1166 if (vci->flags & PCI_USES_MASTER)
1167 pci_set_master (pdev);
1169 if (vci->drv_flags & IS_VORTEX) {
1171 u8 new_latency = 248;
1173 /* Check the PCI latency value. On the 3c590 series the latency timer
1174 must be set to the maximum value to avoid data corruption that occurs
1175 when the timer expires during a transfer. This bug exists the Vortex
1177 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
1178 if (pci_latency < new_latency) {
1179 printk(KERN_INFO "%s: Overriding PCI latency"
1180 " timer (CFLT) setting of %d, new value is %d.\n",
1181 print_name, pci_latency, new_latency);
1182 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, new_latency);
1187 spin_lock_init(&vp->lock);
1188 spin_lock_init(&vp->mdio_lock);
1189 vp->gendev = gendev;
1191 /* Makes sure rings are at least 16 byte aligned. */
1192 vp->rx_ring = pci_alloc_consistent(pdev, sizeof(struct boom_rx_desc) * RX_RING_SIZE
1193 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1196 if (vp->rx_ring == 0)
1199 vp->tx_ring = (struct boom_tx_desc *)(vp->rx_ring + RX_RING_SIZE);
1200 vp->tx_ring_dma = vp->rx_ring_dma + sizeof(struct boom_rx_desc) * RX_RING_SIZE;
1202 /* if we are a PCI driver, we store info in pdev->driver_data
1203 * instead of a module list */
1205 pci_set_drvdata(pdev, dev);
1207 eisa_set_drvdata (edev, dev);
1209 vp->media_override = 7;
1211 vp->media_override = ((option & 7) == 2) ? 0 : option & 15;
1212 if (vp->media_override != 7)
1214 vp->full_duplex = (option & 0x200) ? 1 : 0;
1215 vp->bus_master = (option & 16) ? 1 : 0;
1218 if (global_full_duplex > 0)
1219 vp->full_duplex = 1;
1221 if (card_idx < MAX_UNITS) {
1222 if (full_duplex[card_idx] > 0)
1223 vp->full_duplex = 1;
1224 if (flow_ctrl[card_idx] > 0)
1228 vp->force_fd = vp->full_duplex;
1229 vp->options = option;
1230 /* Read the station address from the EEPROM. */
1235 if (vci->drv_flags & EEPROM_8BIT)
1237 else if (vci->drv_flags & EEPROM_OFFSET)
1238 base = EEPROM_Read + 0x30;
1242 for (i = 0; i < 0x40; i++) {
1244 outw(base + i, ioaddr + Wn0EepromCmd);
1245 /* Pause for at least 162 us. for the read to take place. */
1246 for (timer = 10; timer >= 0; timer--) {
1248 if ((inw(ioaddr + Wn0EepromCmd) & 0x8000) == 0)
1251 eeprom[i] = inw(ioaddr + Wn0EepromData);
1254 for (i = 0; i < 0x18; i++)
1255 checksum ^= eeprom[i];
1256 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1257 if (checksum != 0x00) { /* Grrr, needless incompatible change 3Com. */
1259 checksum ^= eeprom[i++];
1260 checksum = (checksum ^ (checksum >> 8)) & 0xff;
1262 if ((checksum != 0x00) && !(vci->drv_flags & IS_TORNADO))
1263 printk(" ***INVALID CHECKSUM %4.4x*** ", checksum);
1264 for (i = 0; i < 3; i++)
1265 ((u16 *)dev->dev_addr)[i] = htons(eeprom[i + 10]);
1267 for (i = 0; i < 6; i++)
1268 printk("%c%2.2x", i ? ':' : ' ', dev->dev_addr[i]);
1271 for (i = 0; i < 6; i++)
1272 outb(dev->dev_addr[i], ioaddr + i);
1276 printk(", IRQ %s\n", __irq_itoa(dev->irq));
1279 printk(", IRQ %d\n", dev->irq);
1280 /* Tell them about an invalid IRQ. */
1281 if (dev->irq <= 0 || dev->irq >= NR_IRQS)
1282 printk(KERN_WARNING " *** Warning: IRQ %d is unlikely to work! ***\n",
1287 step = (inb(ioaddr + Wn4_NetDiag) & 0x1e) >> 1;
1289 printk(KERN_INFO " product code %02x%02x rev %02x.%d date %02d-"
1290 "%02d-%02d\n", eeprom[6]&0xff, eeprom[6]>>8, eeprom[0x14],
1291 step, (eeprom[4]>>5) & 15, eeprom[4] & 31, eeprom[4]>>9);
1295 if (pdev && vci->drv_flags & HAS_CB_FNS) {
1296 unsigned long fn_st_addr; /* Cardbus function status space */
1299 fn_st_addr = pci_resource_start (pdev, 2);
1301 vp->cb_fn_base = ioremap(fn_st_addr, 128);
1303 if (!vp->cb_fn_base)
1307 printk(KERN_INFO "%s: CardBus functions mapped %8.8lx->%p\n",
1308 print_name, fn_st_addr, vp->cb_fn_base);
1312 n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1313 if (vp->drv_flags & INVERT_LED_PWR)
1315 if (vp->drv_flags & INVERT_MII_PWR)
1317 outw(n, ioaddr + Wn2_ResetOptions);
1318 if (vp->drv_flags & WNO_XCVR_PWR) {
1320 outw(0x0800, ioaddr);
1324 /* Extract our information from the EEPROM data. */
1325 vp->info1 = eeprom[13];
1326 vp->info2 = eeprom[15];
1327 vp->capabilities = eeprom[16];
1329 if (vp->info1 & 0x8000) {
1330 vp->full_duplex = 1;
1332 printk(KERN_INFO "Full duplex capable\n");
1336 static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
1337 unsigned int config;
1339 vp->available_media = inw(ioaddr + Wn3_Options);
1340 if ((vp->available_media & 0xff) == 0) /* Broken 3c916 */
1341 vp->available_media = 0x40;
1342 config = inl(ioaddr + Wn3_Config);
1344 printk(KERN_DEBUG " Internal config register is %4.4x, "
1345 "transceivers %#x.\n", config, inw(ioaddr + Wn3_Options));
1346 printk(KERN_INFO " %dK %s-wide RAM %s Rx:Tx split, %s%s interface.\n",
1347 8 << RAM_SIZE(config),
1348 RAM_WIDTH(config) ? "word" : "byte",
1349 ram_split[RAM_SPLIT(config)],
1350 AUTOSELECT(config) ? "autoselect/" : "",
1351 XCVR(config) > XCVR_ExtMII ? "<invalid transceiver>" :
1352 media_tbl[XCVR(config)].name);
1354 vp->default_media = XCVR(config);
1355 if (vp->default_media == XCVR_NWAY)
1357 vp->autoselect = AUTOSELECT(config);
1360 if (vp->media_override != 7) {
1361 printk(KERN_INFO "%s: Media override to transceiver type %d (%s).\n",
1362 print_name, vp->media_override,
1363 media_tbl[vp->media_override].name);
1364 dev->if_port = vp->media_override;
1366 dev->if_port = vp->default_media;
1368 if ((vp->available_media & 0x40) || (vci->drv_flags & HAS_NWAY) ||
1369 dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1370 int phy, phy_idx = 0;
1372 mii_preamble_required++;
1373 if (vp->drv_flags & EXTRA_PREAMBLE)
1374 mii_preamble_required++;
1375 mdio_sync(ioaddr, 32);
1376 mdio_read(dev, 24, 1);
1377 for (phy = 0; phy < 32 && phy_idx < 1; phy++) {
1378 int mii_status, phyx;
1381 * For the 3c905CX we look at index 24 first, because it bogusly
1382 * reports an external PHY at all indices
1390 mii_status = mdio_read(dev, phyx, 1);
1391 if (mii_status && mii_status != 0xffff) {
1392 vp->phys[phy_idx++] = phyx;
1394 printk(KERN_INFO " MII transceiver found at address %d,"
1395 " status %4x.\n", phyx, mii_status);
1397 if ((mii_status & 0x0040) == 0)
1398 mii_preamble_required++;
1401 mii_preamble_required--;
1403 printk(KERN_WARNING" ***WARNING*** No MII transceivers found!\n");
1406 vp->advertising = mdio_read(dev, vp->phys[0], 4);
1407 if (vp->full_duplex) {
1408 /* Only advertise the FD media types. */
1409 vp->advertising &= ~0x02A0;
1410 mdio_write(dev, vp->phys[0], 4, vp->advertising);
1415 if (vp->capabilities & CapBusMaster) {
1416 vp->full_bus_master_tx = 1;
1418 printk(KERN_INFO " Enabling bus-master transmits and %s receives.\n",
1419 (vp->info2 & 1) ? "early" : "whole-frame" );
1421 vp->full_bus_master_rx = (vp->info2 & 1) ? 1 : 2;
1422 vp->bus_master = 0; /* AKPM: vortex only */
1425 /* The 3c59x-specific entries in the device structure. */
1426 dev->open = vortex_open;
1427 if (vp->full_bus_master_tx) {
1428 dev->hard_start_xmit = boomerang_start_xmit;
1429 /* Actually, it still should work with iommu. */
1430 dev->features |= NETIF_F_SG;
1431 if (((hw_checksums[card_idx] == -1) && (vp->drv_flags & HAS_HWCKSM)) ||
1432 (hw_checksums[card_idx] == 1)) {
1433 dev->features |= NETIF_F_IP_CSUM;
1436 dev->hard_start_xmit = vortex_start_xmit;
1440 printk(KERN_INFO "%s: scatter/gather %sabled. h/w checksums %sabled\n",
1442 (dev->features & NETIF_F_SG) ? "en":"dis",
1443 (dev->features & NETIF_F_IP_CSUM) ? "en":"dis");
1446 dev->stop = vortex_close;
1447 dev->get_stats = vortex_get_stats;
1448 dev->do_ioctl = vortex_ioctl;
1449 dev->ethtool_ops = &vortex_ethtool_ops;
1450 dev->set_multicast_list = set_rx_mode;
1451 dev->tx_timeout = vortex_tx_timeout;
1452 dev->watchdog_timeo = (watchdog * HZ) / 1000;
1454 vp->pm_state_valid = 1;
1455 pci_save_state(VORTEX_PCI(vp), vp->power_state);
1458 retval = register_netdev(dev);
1463 pci_free_consistent(pdev,
1464 sizeof(struct boom_rx_desc) * RX_RING_SIZE
1465 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
1469 if (vp->must_free_region)
1470 release_region(ioaddr, vci->io_size);
1472 printk(KERN_ERR PFX "vortex_probe1 fails. Returns %d\n", retval);
1478 issue_and_wait(struct net_device *dev, int cmd)
1482 outw(cmd, dev->base_addr + EL3_CMD);
1483 for (i = 0; i < 2000; i++) {
1484 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress))
1488 /* OK, that didn't work. Do it the slow way. One second */
1489 for (i = 0; i < 100000; i++) {
1490 if (!(inw(dev->base_addr + EL3_STATUS) & CmdInProgress)) {
1491 if (vortex_debug > 1)
1492 printk(KERN_INFO "%s: command 0x%04x took %d usecs\n",
1493 dev->name, cmd, i * 10);
1498 printk(KERN_ERR "%s: command 0x%04x did not complete! Status=0x%x\n",
1499 dev->name, cmd, inw(dev->base_addr + EL3_STATUS));
1503 vortex_up(struct net_device *dev)
1505 long ioaddr = dev->base_addr;
1506 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1507 unsigned int config;
1510 if (VORTEX_PCI(vp)) {
1511 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
1512 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
1515 /* Before initializing select the active media port. */
1517 config = inl(ioaddr + Wn3_Config);
1519 if (vp->media_override != 7) {
1520 printk(KERN_INFO "%s: Media override to transceiver %d (%s).\n",
1521 dev->name, vp->media_override,
1522 media_tbl[vp->media_override].name);
1523 dev->if_port = vp->media_override;
1524 } else if (vp->autoselect) {
1526 if (vortex_debug > 1)
1527 printk(KERN_INFO "%s: using NWAY device table, not %d\n",
1528 dev->name, dev->if_port);
1529 dev->if_port = XCVR_NWAY;
1531 /* Find first available media type, starting with 100baseTx. */
1532 dev->if_port = XCVR_100baseTx;
1533 while (! (vp->available_media & media_tbl[dev->if_port].mask))
1534 dev->if_port = media_tbl[dev->if_port].next;
1535 if (vortex_debug > 1)
1536 printk(KERN_INFO "%s: first available media type: %s\n",
1537 dev->name, media_tbl[dev->if_port].name);
1540 dev->if_port = vp->default_media;
1541 if (vortex_debug > 1)
1542 printk(KERN_INFO "%s: using default media %s\n",
1543 dev->name, media_tbl[dev->if_port].name);
1546 init_timer(&vp->timer);
1547 vp->timer.expires = RUN_AT(media_tbl[dev->if_port].wait);
1548 vp->timer.data = (unsigned long)dev;
1549 vp->timer.function = vortex_timer; /* timer handler */
1550 add_timer(&vp->timer);
1552 init_timer(&vp->rx_oom_timer);
1553 vp->rx_oom_timer.data = (unsigned long)dev;
1554 vp->rx_oom_timer.function = rx_oom_timer;
1556 if (vortex_debug > 1)
1557 printk(KERN_DEBUG "%s: Initial media type %s.\n",
1558 dev->name, media_tbl[dev->if_port].name);
1560 vp->full_duplex = vp->force_fd;
1561 config = BFINS(config, dev->if_port, 20, 4);
1562 if (vortex_debug > 6)
1563 printk(KERN_DEBUG "vortex_up(): writing 0x%x to InternalConfig\n", config);
1564 outl(config, ioaddr + Wn3_Config);
1566 if (dev->if_port == XCVR_MII || dev->if_port == XCVR_NWAY) {
1567 int mii_reg1, mii_reg5;
1569 /* Read BMSR (reg1) only to clear old status. */
1570 mii_reg1 = mdio_read(dev, vp->phys[0], 1);
1571 mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1572 if (mii_reg5 == 0xffff || mii_reg5 == 0x0000) {
1573 netif_carrier_off(dev); /* No MII device or no link partner report */
1575 mii_reg5 &= vp->advertising;
1576 if ((mii_reg5 & 0x0100) != 0 /* 100baseTx-FD */
1577 || (mii_reg5 & 0x00C0) == 0x0040) /* 10T-FD, but not 100-HD */
1578 vp->full_duplex = 1;
1579 netif_carrier_on(dev);
1581 vp->partner_flow_ctrl = ((mii_reg5 & 0x0400) != 0);
1582 if (vortex_debug > 1)
1583 printk(KERN_INFO "%s: MII #%d status %4.4x, link partner capability %4.4x,"
1584 " info1 %04x, setting %s-duplex.\n",
1585 dev->name, vp->phys[0],
1587 vp->info1, ((vp->info1 & 0x8000) || vp->full_duplex) ? "full" : "half");
1591 /* Set the full-duplex bit. */
1592 outw( ((vp->info1 & 0x8000) || vp->full_duplex ? 0x20 : 0) |
1593 (dev->mtu > 1500 ? 0x40 : 0) |
1594 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1595 ioaddr + Wn3_MAC_Ctrl);
1597 if (vortex_debug > 1) {
1598 printk(KERN_DEBUG "%s: vortex_up() InternalConfig %8.8x.\n",
1602 issue_and_wait(dev, TxReset);
1604 * Don't reset the PHY - that upsets autonegotiation during DHCP operations.
1606 issue_and_wait(dev, RxReset|0x04);
1608 outw(SetStatusEnb | 0x00, ioaddr + EL3_CMD);
1610 if (vortex_debug > 1) {
1612 printk(KERN_DEBUG "%s: vortex_up() irq %d media status %4.4x.\n",
1613 dev->name, dev->irq, inw(ioaddr + Wn4_Media));
1616 /* Set the station address and mask in window 2 each time opened. */
1618 for (i = 0; i < 6; i++)
1619 outb(dev->dev_addr[i], ioaddr + i);
1620 for (; i < 12; i+=2)
1621 outw(0, ioaddr + i);
1623 if (vp->cb_fn_base) {
1624 unsigned short n = inw(ioaddr + Wn2_ResetOptions) & ~0x4010;
1625 if (vp->drv_flags & INVERT_LED_PWR)
1627 if (vp->drv_flags & INVERT_MII_PWR)
1629 outw(n, ioaddr + Wn2_ResetOptions);
1632 if (dev->if_port == XCVR_10base2)
1633 /* Start the thinnet transceiver. We should really wait 50ms...*/
1634 outw(StartCoax, ioaddr + EL3_CMD);
1635 if (dev->if_port != XCVR_NWAY) {
1637 outw((inw(ioaddr + Wn4_Media) & ~(Media_10TP|Media_SQE)) |
1638 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1641 /* Switch to the stats window, and clear all stats by reading. */
1642 outw(StatsDisable, ioaddr + EL3_CMD);
1644 for (i = 0; i < 10; i++)
1648 /* New: On the Vortex we must also clear the BadSSD counter. */
1651 /* ..and on the Boomerang we enable the extra statistics bits. */
1652 outw(0x0040, ioaddr + Wn4_NetDiag);
1654 /* Switch to register set 7 for normal use. */
1657 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1658 vp->cur_rx = vp->dirty_rx = 0;
1659 /* Initialize the RxEarly register as recommended. */
1660 outw(SetRxThreshold + (1536>>2), ioaddr + EL3_CMD);
1661 outl(0x0020, ioaddr + PktStatus);
1662 outl(vp->rx_ring_dma, ioaddr + UpListPtr);
1664 if (vp->full_bus_master_tx) { /* Boomerang bus master Tx. */
1665 vp->cur_tx = vp->dirty_tx = 0;
1666 if (vp->drv_flags & IS_BOOMERANG)
1667 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold); /* Room for a packet. */
1668 /* Clear the Rx, Tx rings. */
1669 for (i = 0; i < RX_RING_SIZE; i++) /* AKPM: this is done in vortex_open, too */
1670 vp->rx_ring[i].status = 0;
1671 for (i = 0; i < TX_RING_SIZE; i++)
1672 vp->tx_skbuff[i] = 0;
1673 outl(0, ioaddr + DownListPtr);
1675 /* Set receiver mode: presumably accept b-case and phys addr only. */
1677 outw(StatsEnable, ioaddr + EL3_CMD); /* Turn on statistics. */
1679 // issue_and_wait(dev, SetTxStart|0x07ff);
1680 outw(RxEnable, ioaddr + EL3_CMD); /* Enable the receiver. */
1681 outw(TxEnable, ioaddr + EL3_CMD); /* Enable transmitter. */
1682 /* Allow status bits to be seen. */
1683 vp->status_enable = SetStatusEnb | HostError|IntReq|StatsFull|TxComplete|
1684 (vp->full_bus_master_tx ? DownComplete : TxAvailable) |
1685 (vp->full_bus_master_rx ? UpComplete : RxComplete) |
1686 (vp->bus_master ? DMADone : 0);
1687 vp->intr_enable = SetIntrEnb | IntLatch | TxAvailable |
1688 (vp->full_bus_master_rx ? 0 : RxComplete) |
1689 StatsFull | HostError | TxComplete | IntReq
1690 | (vp->bus_master ? DMADone : 0) | UpComplete | DownComplete;
1691 outw(vp->status_enable, ioaddr + EL3_CMD);
1692 /* Ack all pending events, and set active indicator mask. */
1693 outw(AckIntr | IntLatch | TxAvailable | RxEarly | IntReq,
1695 outw(vp->intr_enable, ioaddr + EL3_CMD);
1696 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
1697 writel(0x8000, vp->cb_fn_base + 4);
1698 netif_start_queue (dev);
1702 vortex_open(struct net_device *dev)
1704 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1708 /* Use the now-standard shared IRQ implementation. */
1709 if ((retval = request_irq(dev->irq, vp->full_bus_master_rx ?
1710 &boomerang_interrupt : &vortex_interrupt, SA_SHIRQ, dev->name, dev))) {
1711 printk(KERN_ERR "%s: Could not reserve IRQ %d\n", dev->name, dev->irq);
1715 if (vp->full_bus_master_rx) { /* Boomerang bus master. */
1716 if (vortex_debug > 2)
1717 printk(KERN_DEBUG "%s: Filling in the Rx ring.\n", dev->name);
1718 for (i = 0; i < RX_RING_SIZE; i++) {
1719 struct sk_buff *skb;
1720 vp->rx_ring[i].next = cpu_to_le32(vp->rx_ring_dma + sizeof(struct boom_rx_desc) * (i+1));
1721 vp->rx_ring[i].status = 0; /* Clear complete bit. */
1722 vp->rx_ring[i].length = cpu_to_le32(PKT_BUF_SZ | LAST_FRAG);
1723 skb = dev_alloc_skb(PKT_BUF_SZ);
1724 vp->rx_skbuff[i] = skb;
1726 break; /* Bad news! */
1727 skb->dev = dev; /* Mark as being used by this device. */
1728 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1729 vp->rx_ring[i].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
1731 if (i != RX_RING_SIZE) {
1733 printk(KERN_EMERG "%s: no memory for rx ring\n", dev->name);
1734 for (j = 0; j < i; j++) {
1735 if (vp->rx_skbuff[j]) {
1736 dev_kfree_skb(vp->rx_skbuff[j]);
1737 vp->rx_skbuff[j] = 0;
1743 /* Wrap the ring. */
1744 vp->rx_ring[i-1].next = cpu_to_le32(vp->rx_ring_dma);
1751 free_irq(dev->irq, dev);
1753 if (vortex_debug > 1)
1754 printk(KERN_ERR "%s: vortex_open() fails: returning %d\n", dev->name, retval);
1759 vortex_timer(unsigned long data)
1761 struct net_device *dev = (struct net_device *)data;
1762 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1763 long ioaddr = dev->base_addr;
1764 int next_tick = 60*HZ;
1766 int media_status, mii_status, old_window;
1768 if (vortex_debug > 2) {
1769 printk(KERN_DEBUG "%s: Media selection timer tick happened, %s.\n",
1770 dev->name, media_tbl[dev->if_port].name);
1771 printk(KERN_DEBUG "dev->watchdog_timeo=%d\n", dev->watchdog_timeo);
1775 goto leave_media_alone;
1776 disable_irq(dev->irq);
1777 old_window = inw(ioaddr + EL3_CMD) >> 13;
1779 media_status = inw(ioaddr + Wn4_Media);
1780 switch (dev->if_port) {
1781 case XCVR_10baseT: case XCVR_100baseTx: case XCVR_100baseFx:
1782 if (media_status & Media_LnkBeat) {
1783 netif_carrier_on(dev);
1785 if (vortex_debug > 1)
1786 printk(KERN_DEBUG "%s: Media %s has link beat, %x.\n",
1787 dev->name, media_tbl[dev->if_port].name, media_status);
1789 netif_carrier_off(dev);
1790 if (vortex_debug > 1) {
1791 printk(KERN_DEBUG "%s: Media %s has no link beat, %x.\n",
1792 dev->name, media_tbl[dev->if_port].name, media_status);
1796 case XCVR_MII: case XCVR_NWAY:
1798 mii_status = mdio_read(dev, vp->phys[0], 1);
1800 if (vortex_debug > 2)
1801 printk(KERN_DEBUG "%s: MII transceiver has status %4.4x.\n",
1802 dev->name, mii_status);
1803 if (mii_status & BMSR_LSTATUS) {
1804 int mii_reg5 = mdio_read(dev, vp->phys[0], 5);
1805 if (! vp->force_fd && mii_reg5 != 0xffff) {
1808 mii_reg5 &= vp->advertising;
1809 duplex = (mii_reg5&0x0100) || (mii_reg5 & 0x01C0) == 0x0040;
1810 if (vp->full_duplex != duplex) {
1811 vp->full_duplex = duplex;
1812 printk(KERN_INFO "%s: Setting %s-duplex based on MII "
1813 "#%d link partner capability of %4.4x.\n",
1814 dev->name, vp->full_duplex ? "full" : "half",
1815 vp->phys[0], mii_reg5);
1816 /* Set the full-duplex bit. */
1818 outw( (vp->full_duplex ? 0x20 : 0) |
1819 (dev->mtu > 1500 ? 0x40 : 0) |
1820 ((vp->full_duplex && vp->flow_ctrl && vp->partner_flow_ctrl) ? 0x100 : 0),
1821 ioaddr + Wn3_MAC_Ctrl);
1822 if (vortex_debug > 1)
1823 printk(KERN_DEBUG "Setting duplex in Wn3_MAC_Ctrl\n");
1824 /* AKPM: bug: should reset Tx and Rx after setting Duplex. Page 180 */
1827 netif_carrier_on(dev);
1829 netif_carrier_off(dev);
1833 default: /* Other media types handled by Tx timeouts. */
1834 if (vortex_debug > 1)
1835 printk(KERN_DEBUG "%s: Media %s has no indication, %x.\n",
1836 dev->name, media_tbl[dev->if_port].name, media_status);
1840 unsigned int config;
1843 dev->if_port = media_tbl[dev->if_port].next;
1844 } while ( ! (vp->available_media & media_tbl[dev->if_port].mask));
1845 if (dev->if_port == XCVR_Default) { /* Go back to default. */
1846 dev->if_port = vp->default_media;
1847 if (vortex_debug > 1)
1848 printk(KERN_DEBUG "%s: Media selection failing, using default "
1850 dev->name, media_tbl[dev->if_port].name);
1852 if (vortex_debug > 1)
1853 printk(KERN_DEBUG "%s: Media selection failed, now trying "
1855 dev->name, media_tbl[dev->if_port].name);
1856 next_tick = media_tbl[dev->if_port].wait;
1858 outw((media_status & ~(Media_10TP|Media_SQE)) |
1859 media_tbl[dev->if_port].media_bits, ioaddr + Wn4_Media);
1862 config = inl(ioaddr + Wn3_Config);
1863 config = BFINS(config, dev->if_port, 20, 4);
1864 outl(config, ioaddr + Wn3_Config);
1866 outw(dev->if_port == XCVR_10base2 ? StartCoax : StopCoax,
1868 if (vortex_debug > 1)
1869 printk(KERN_DEBUG "wrote 0x%08x to Wn3_Config\n", config);
1870 /* AKPM: FIXME: Should reset Rx & Tx here. P60 of 3c90xc.pdf */
1872 EL3WINDOW(old_window);
1873 enable_irq(dev->irq);
1876 if (vortex_debug > 2)
1877 printk(KERN_DEBUG "%s: Media selection timer finished, %s.\n",
1878 dev->name, media_tbl[dev->if_port].name);
1880 mod_timer(&vp->timer, RUN_AT(next_tick));
1882 outw(FakeIntr, ioaddr + EL3_CMD);
1886 static void vortex_tx_timeout(struct net_device *dev)
1888 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1889 long ioaddr = dev->base_addr;
1891 printk(KERN_ERR "%s: transmit timed out, tx_status %2.2x status %4.4x.\n",
1892 dev->name, inb(ioaddr + TxStatus),
1893 inw(ioaddr + EL3_STATUS));
1895 printk(KERN_ERR " diagnostics: net %04x media %04x dma %08x fifo %04x\n",
1896 inw(ioaddr + Wn4_NetDiag),
1897 inw(ioaddr + Wn4_Media),
1898 inl(ioaddr + PktStatus),
1899 inw(ioaddr + Wn4_FIFODiag));
1900 /* Slight code bloat to be user friendly. */
1901 if ((inb(ioaddr + TxStatus) & 0x88) == 0x88)
1902 printk(KERN_ERR "%s: Transmitter encountered 16 collisions --"
1903 " network cable problem?\n", dev->name);
1904 if (inw(ioaddr + EL3_STATUS) & IntLatch) {
1905 printk(KERN_ERR "%s: Interrupt posted but not delivered --"
1906 " IRQ blocked by another device?\n", dev->name);
1907 /* Bad idea here.. but we might as well handle a few events. */
1910 * Block interrupts because vortex_interrupt does a bare spin_lock()
1912 unsigned long flags;
1913 local_irq_save(flags);
1914 if (vp->full_bus_master_tx)
1915 boomerang_interrupt(dev->irq, dev, 0);
1917 vortex_interrupt(dev->irq, dev, 0);
1918 local_irq_restore(flags);
1922 if (vortex_debug > 0)
1925 issue_and_wait(dev, TxReset);
1927 vp->stats.tx_errors++;
1928 if (vp->full_bus_master_tx) {
1929 printk(KERN_DEBUG "%s: Resetting the Tx ring pointer.\n", dev->name);
1930 if (vp->cur_tx - vp->dirty_tx > 0 && inl(ioaddr + DownListPtr) == 0)
1931 outl(vp->tx_ring_dma + (vp->dirty_tx % TX_RING_SIZE) * sizeof(struct boom_tx_desc),
1932 ioaddr + DownListPtr);
1933 if (vp->cur_tx - vp->dirty_tx < TX_RING_SIZE)
1934 netif_wake_queue (dev);
1935 if (vp->drv_flags & IS_BOOMERANG)
1936 outb(PKT_BUF_SZ>>8, ioaddr + TxFreeThreshold);
1937 outw(DownUnstall, ioaddr + EL3_CMD);
1939 vp->stats.tx_dropped++;
1940 netif_wake_queue(dev);
1943 /* Issue Tx Enable */
1944 outw(TxEnable, ioaddr + EL3_CMD);
1945 dev->trans_start = jiffies;
1947 /* Switch to register set 7 for normal use. */
1952 * Handle uncommon interrupt sources. This is a separate routine to minimize
1956 vortex_error(struct net_device *dev, int status)
1958 struct vortex_private *vp = (struct vortex_private *)dev->priv;
1959 long ioaddr = dev->base_addr;
1960 int do_tx_reset = 0, reset_mask = 0;
1961 unsigned char tx_status = 0;
1963 if (vortex_debug > 2) {
1964 printk(KERN_ERR "%s: vortex_error(), status=0x%x\n", dev->name, status);
1967 if (status & TxComplete) { /* Really "TxError" for us. */
1968 tx_status = inb(ioaddr + TxStatus);
1969 /* Presumably a tx-timeout. We must merely re-enable. */
1970 if (vortex_debug > 2
1971 || (tx_status != 0x88 && vortex_debug > 0)) {
1972 printk(KERN_ERR "%s: Transmit error, Tx status register %2.2x.\n",
1973 dev->name, tx_status);
1974 if (tx_status == 0x82) {
1975 printk(KERN_ERR "Probably a duplex mismatch. See "
1976 "Documentation/networking/vortex.txt\n");
1980 if (tx_status & 0x14) vp->stats.tx_fifo_errors++;
1981 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
1982 outb(0, ioaddr + TxStatus);
1983 if (tx_status & 0x30) { /* txJabber or txUnderrun */
1985 } else if ((tx_status & 0x08) && (vp->drv_flags & MAX_COLLISION_RESET)) { /* maxCollisions */
1987 reset_mask = 0x0108; /* Reset interface logic, but not download logic */
1988 } else { /* Merely re-enable the transmitter. */
1989 outw(TxEnable, ioaddr + EL3_CMD);
1993 if (status & RxEarly) { /* Rx early is unused. */
1995 outw(AckIntr | RxEarly, ioaddr + EL3_CMD);
1997 if (status & StatsFull) { /* Empty statistics. */
1998 static int DoneDidThat;
1999 if (vortex_debug > 4)
2000 printk(KERN_DEBUG "%s: Updating stats.\n", dev->name);
2001 update_stats(ioaddr, dev);
2002 /* HACK: Disable statistics as an interrupt source. */
2003 /* This occurs when we have the wrong media type! */
2004 if (DoneDidThat == 0 &&
2005 inw(ioaddr + EL3_STATUS) & StatsFull) {
2006 printk(KERN_WARNING "%s: Updating statistics failed, disabling "
2007 "stats as an interrupt source.\n", dev->name);
2009 outw(SetIntrEnb | (inw(ioaddr + 10) & ~StatsFull), ioaddr + EL3_CMD);
2010 vp->intr_enable &= ~StatsFull;
2015 if (status & IntReq) { /* Restore all interrupt sources. */
2016 outw(vp->status_enable, ioaddr + EL3_CMD);
2017 outw(vp->intr_enable, ioaddr + EL3_CMD);
2019 if (status & HostError) {
2022 fifo_diag = inw(ioaddr + Wn4_FIFODiag);
2023 printk(KERN_ERR "%s: Host error, FIFO diagnostic register %4.4x.\n",
2024 dev->name, fifo_diag);
2025 /* Adapter failure requires Tx/Rx reset and reinit. */
2026 if (vp->full_bus_master_tx) {
2027 int bus_status = inl(ioaddr + PktStatus);
2028 /* 0x80000000 PCI master abort. */
2029 /* 0x40000000 PCI target abort. */
2031 printk(KERN_ERR "%s: PCI bus error, bus status %8.8x\n", dev->name, bus_status);
2033 /* In this case, blow the card away */
2035 issue_and_wait(dev, TotalReset | 0xff);
2036 vortex_up(dev); /* AKPM: bug. vortex_up() assumes that the rx ring is full. It may not be. */
2037 } else if (fifo_diag & 0x0400)
2039 if (fifo_diag & 0x3000) {
2040 /* Reset Rx fifo and upload logic */
2041 issue_and_wait(dev, RxReset|0x07);
2042 /* Set the Rx filter to the current state. */
2044 outw(RxEnable, ioaddr + EL3_CMD); /* Re-enable the receiver. */
2045 outw(AckIntr | HostError, ioaddr + EL3_CMD);
2050 issue_and_wait(dev, TxReset|reset_mask);
2051 outw(TxEnable, ioaddr + EL3_CMD);
2052 if (!vp->full_bus_master_tx)
2053 netif_wake_queue(dev);
2058 vortex_start_xmit(struct sk_buff *skb, struct net_device *dev)
2060 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2061 long ioaddr = dev->base_addr;
2063 /* Put out the doubleword header... */
2064 outl(skb->len, ioaddr + TX_FIFO);
2065 if (vp->bus_master) {
2066 /* Set the bus-master controller to transfer the packet. */
2067 int len = (skb->len + 3) & ~3;
2068 outl( vp->tx_skb_dma = pci_map_single(VORTEX_PCI(vp), skb->data, len, PCI_DMA_TODEVICE),
2069 ioaddr + Wn7_MasterAddr);
2070 outw(len, ioaddr + Wn7_MasterLen);
2072 outw(StartDMADown, ioaddr + EL3_CMD);
2073 /* netif_wake_queue() will be called at the DMADone interrupt. */
2075 /* ... and the packet rounded to a doubleword. */
2076 outsl(ioaddr + TX_FIFO, skb->data, (skb->len + 3) >> 2);
2077 dev_kfree_skb (skb);
2078 if (inw(ioaddr + TxFree) > 1536) {
2079 netif_start_queue (dev); /* AKPM: redundant? */
2081 /* Interrupt us when the FIFO has room for max-sized packet. */
2082 netif_stop_queue(dev);
2083 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2087 dev->trans_start = jiffies;
2089 /* Clear the Tx status stack. */
2094 while (--i > 0 && (tx_status = inb(ioaddr + TxStatus)) > 0) {
2095 if (tx_status & 0x3C) { /* A Tx-disabling error occurred. */
2096 if (vortex_debug > 2)
2097 printk(KERN_DEBUG "%s: Tx error, status %2.2x.\n",
2098 dev->name, tx_status);
2099 if (tx_status & 0x04) vp->stats.tx_fifo_errors++;
2100 if (tx_status & 0x38) vp->stats.tx_aborted_errors++;
2101 if (tx_status & 0x30) {
2102 issue_and_wait(dev, TxReset);
2104 outw(TxEnable, ioaddr + EL3_CMD);
2106 outb(0x00, ioaddr + TxStatus); /* Pop the status stack. */
2113 boomerang_start_xmit(struct sk_buff *skb, struct net_device *dev)
2115 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2116 long ioaddr = dev->base_addr;
2117 /* Calculate the next Tx descriptor entry. */
2118 int entry = vp->cur_tx % TX_RING_SIZE;
2119 struct boom_tx_desc *prev_entry = &vp->tx_ring[(vp->cur_tx-1) % TX_RING_SIZE];
2120 unsigned long flags;
2122 if (vortex_debug > 6) {
2123 printk(KERN_DEBUG "boomerang_start_xmit()\n");
2124 if (vortex_debug > 3)
2125 printk(KERN_DEBUG "%s: Trying to send a packet, Tx index %d.\n",
2126 dev->name, vp->cur_tx);
2129 if (vp->cur_tx - vp->dirty_tx >= TX_RING_SIZE) {
2130 if (vortex_debug > 0)
2131 printk(KERN_WARNING "%s: BUG! Tx Ring full, refusing to send buffer.\n",
2133 netif_stop_queue(dev);
2137 vp->tx_skbuff[entry] = skb;
2139 vp->tx_ring[entry].next = 0;
2141 if (skb->ip_summed != CHECKSUM_HW)
2142 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2144 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded | AddTCPChksum | AddUDPChksum);
2146 if (!skb_shinfo(skb)->nr_frags) {
2147 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2148 skb->len, PCI_DMA_TODEVICE));
2149 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len | LAST_FRAG);
2153 vp->tx_ring[entry].frag[0].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data,
2154 skb->len-skb->data_len, PCI_DMA_TODEVICE));
2155 vp->tx_ring[entry].frag[0].length = cpu_to_le32(skb->len-skb->data_len);
2157 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2158 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2160 vp->tx_ring[entry].frag[i+1].addr =
2161 cpu_to_le32(pci_map_single(VORTEX_PCI(vp),
2162 (void*)page_address(frag->page) + frag->page_offset,
2163 frag->size, PCI_DMA_TODEVICE));
2165 if (i == skb_shinfo(skb)->nr_frags-1)
2166 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size|LAST_FRAG);
2168 vp->tx_ring[entry].frag[i+1].length = cpu_to_le32(frag->size);
2172 vp->tx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->data, skb->len, PCI_DMA_TODEVICE));
2173 vp->tx_ring[entry].length = cpu_to_le32(skb->len | LAST_FRAG);
2174 vp->tx_ring[entry].status = cpu_to_le32(skb->len | TxIntrUploaded);
2177 spin_lock_irqsave(&vp->lock, flags);
2178 /* Wait for the stall to complete. */
2179 issue_and_wait(dev, DownStall);
2180 prev_entry->next = cpu_to_le32(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc));
2181 if (inl(ioaddr + DownListPtr) == 0) {
2182 outl(vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc), ioaddr + DownListPtr);
2183 vp->queued_packet++;
2187 if (vp->cur_tx - vp->dirty_tx > TX_RING_SIZE - 1) {
2188 netif_stop_queue (dev);
2189 } else { /* Clear previous interrupt enable. */
2190 #if defined(tx_interrupt_mitigation)
2191 /* Dubious. If in boomeang_interrupt "faster" cyclone ifdef
2192 * were selected, this would corrupt DN_COMPLETE. No?
2194 prev_entry->status &= cpu_to_le32(~TxIntrUploaded);
2197 outw(DownUnstall, ioaddr + EL3_CMD);
2198 spin_unlock_irqrestore(&vp->lock, flags);
2199 dev->trans_start = jiffies;
2203 /* The interrupt handler does all of the Rx thread work and cleans up
2204 after the Tx thread. */
2207 * This is the ISR for the vortex series chips.
2208 * full_bus_master_tx == 0 && full_bus_master_rx == 0
2212 vortex_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2214 struct net_device *dev = dev_id;
2215 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2218 int work_done = max_interrupt_work;
2221 ioaddr = dev->base_addr;
2222 spin_lock(&vp->lock);
2224 status = inw(ioaddr + EL3_STATUS);
2226 if (vortex_debug > 6)
2227 printk("vortex_interrupt(). status=0x%4x\n", status);
2229 if ((status & IntLatch) == 0)
2230 goto handler_exit; /* No interrupt: shared IRQs cause this */
2233 if (status & IntReq) {
2234 status |= vp->deferred;
2238 if (status == 0xffff) /* h/w no longer present (hotplug)? */
2241 if (vortex_debug > 4)
2242 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2243 dev->name, status, inb(ioaddr + Timer));
2246 if (vortex_debug > 5)
2247 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2249 if (status & RxComplete)
2252 if (status & TxAvailable) {
2253 if (vortex_debug > 5)
2254 printk(KERN_DEBUG " TX room bit was handled.\n");
2255 /* There's room in the FIFO for a full-sized packet. */
2256 outw(AckIntr | TxAvailable, ioaddr + EL3_CMD);
2257 netif_wake_queue (dev);
2260 if (status & DMADone) {
2261 if (inw(ioaddr + Wn7_MasterStatus) & 0x1000) {
2262 outw(0x1000, ioaddr + Wn7_MasterStatus); /* Ack the event. */
2263 pci_unmap_single(VORTEX_PCI(vp), vp->tx_skb_dma, (vp->tx_skb->len + 3) & ~3, PCI_DMA_TODEVICE);
2264 dev_kfree_skb_irq(vp->tx_skb); /* Release the transferred buffer */
2265 if (inw(ioaddr + TxFree) > 1536) {
2267 * AKPM: FIXME: I don't think we need this. If the queue was stopped due to
2268 * insufficient FIFO room, the TxAvailable test will succeed and call
2269 * netif_wake_queue()
2271 netif_wake_queue(dev);
2272 } else { /* Interrupt when FIFO has room for max-sized packet. */
2273 outw(SetTxThreshold + (1536>>2), ioaddr + EL3_CMD);
2274 netif_stop_queue(dev);
2278 /* Check for all uncommon interrupts at once. */
2279 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq)) {
2280 if (status == 0xffff)
2282 vortex_error(dev, status);
2285 if (--work_done < 0) {
2286 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2287 "%4.4x.\n", dev->name, status);
2288 /* Disable all pending interrupts. */
2290 vp->deferred |= status;
2291 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2293 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2294 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2295 /* The timer will reenable interrupts. */
2296 mod_timer(&vp->timer, jiffies + 1*HZ);
2299 /* Acknowledge the IRQ. */
2300 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2301 } while ((status = inw(ioaddr + EL3_STATUS)) & (IntLatch | RxComplete));
2303 if (vortex_debug > 4)
2304 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2307 spin_unlock(&vp->lock);
2308 return IRQ_RETVAL(handled);
2312 * This is the ISR for the boomerang series chips.
2313 * full_bus_master_tx == 1 && full_bus_master_rx == 1
2317 boomerang_interrupt(int irq, void *dev_id, struct pt_regs *regs)
2319 struct net_device *dev = dev_id;
2320 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2323 int work_done = max_interrupt_work;
2325 ioaddr = dev->base_addr;
2328 * It seems dopey to put the spinlock this early, but we could race against vortex_tx_timeout
2329 * and boomerang_start_xmit
2331 spin_lock(&vp->lock);
2333 status = inw(ioaddr + EL3_STATUS);
2335 if (vortex_debug > 6)
2336 printk(KERN_DEBUG "boomerang_interrupt. status=0x%4x\n", status);
2338 if ((status & IntLatch) == 0)
2339 goto handler_exit; /* No interrupt: shared IRQs can cause this */
2341 if (status == 0xffff) { /* h/w no longer present (hotplug)? */
2342 if (vortex_debug > 1)
2343 printk(KERN_DEBUG "boomerang_interrupt(1): status = 0xffff\n");
2347 if (status & IntReq) {
2348 status |= vp->deferred;
2352 if (vortex_debug > 4)
2353 printk(KERN_DEBUG "%s: interrupt, status %4.4x, latency %d ticks.\n",
2354 dev->name, status, inb(ioaddr + Timer));
2356 if (vortex_debug > 5)
2357 printk(KERN_DEBUG "%s: In interrupt loop, status %4.4x.\n",
2359 if (status & UpComplete) {
2360 outw(AckIntr | UpComplete, ioaddr + EL3_CMD);
2361 if (vortex_debug > 5)
2362 printk(KERN_DEBUG "boomerang_interrupt->boomerang_rx\n");
2366 if (status & DownComplete) {
2367 unsigned int dirty_tx = vp->dirty_tx;
2369 outw(AckIntr | DownComplete, ioaddr + EL3_CMD);
2370 while (vp->cur_tx - dirty_tx > 0) {
2371 int entry = dirty_tx % TX_RING_SIZE;
2372 #if 1 /* AKPM: the latter is faster, but cyclone-only */
2373 if (inl(ioaddr + DownListPtr) ==
2374 vp->tx_ring_dma + entry * sizeof(struct boom_tx_desc))
2375 break; /* It still hasn't been processed. */
2377 if ((vp->tx_ring[entry].status & DN_COMPLETE) == 0)
2378 break; /* It still hasn't been processed. */
2381 if (vp->tx_skbuff[entry]) {
2382 struct sk_buff *skb = vp->tx_skbuff[entry];
2385 for (i=0; i<=skb_shinfo(skb)->nr_frags; i++)
2386 pci_unmap_single(VORTEX_PCI(vp),
2387 le32_to_cpu(vp->tx_ring[entry].frag[i].addr),
2388 le32_to_cpu(vp->tx_ring[entry].frag[i].length)&0xFFF,
2391 pci_unmap_single(VORTEX_PCI(vp),
2392 le32_to_cpu(vp->tx_ring[entry].addr), skb->len, PCI_DMA_TODEVICE);
2394 dev_kfree_skb_irq(skb);
2395 vp->tx_skbuff[entry] = 0;
2397 printk(KERN_DEBUG "boomerang_interrupt: no skb!\n");
2399 /* vp->stats.tx_packets++; Counted below. */
2402 vp->dirty_tx = dirty_tx;
2403 if (vp->cur_tx - dirty_tx <= TX_RING_SIZE - 1) {
2404 if (vortex_debug > 6)
2405 printk(KERN_DEBUG "boomerang_interrupt: wake queue\n");
2406 netif_wake_queue (dev);
2410 /* Check for all uncommon interrupts at once. */
2411 if (status & (HostError | RxEarly | StatsFull | TxComplete | IntReq))
2412 vortex_error(dev, status);
2414 if (--work_done < 0) {
2415 printk(KERN_WARNING "%s: Too much work in interrupt, status "
2416 "%4.4x.\n", dev->name, status);
2417 /* Disable all pending interrupts. */
2419 vp->deferred |= status;
2420 outw(SetStatusEnb | (~vp->deferred & vp->status_enable),
2422 outw(AckIntr | (vp->deferred & 0x7ff), ioaddr + EL3_CMD);
2423 } while ((status = inw(ioaddr + EL3_CMD)) & IntLatch);
2424 /* The timer will reenable interrupts. */
2425 mod_timer(&vp->timer, jiffies + 1*HZ);
2428 /* Acknowledge the IRQ. */
2429 outw(AckIntr | IntReq | IntLatch, ioaddr + EL3_CMD);
2430 if (vp->cb_fn_base) /* The PCMCIA people are idiots. */
2431 writel(0x8000, vp->cb_fn_base + 4);
2433 } while ((status = inw(ioaddr + EL3_STATUS)) & IntLatch);
2435 if (vortex_debug > 4)
2436 printk(KERN_DEBUG "%s: exiting interrupt, status %4.4x.\n",
2439 spin_unlock(&vp->lock);
2443 static int vortex_rx(struct net_device *dev)
2445 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2446 long ioaddr = dev->base_addr;
2450 if (vortex_debug > 5)
2451 printk(KERN_DEBUG "vortex_rx(): status %4.4x, rx_status %4.4x.\n",
2452 inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
2453 while ((rx_status = inw(ioaddr + RxStatus)) > 0) {
2454 if (rx_status & 0x4000) { /* Error, update stats. */
2455 unsigned char rx_error = inb(ioaddr + RxErrors);
2456 if (vortex_debug > 2)
2457 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2458 vp->stats.rx_errors++;
2459 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2460 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2461 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2462 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2463 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2465 /* The packet length: up to 4.5K!. */
2466 int pkt_len = rx_status & 0x1fff;
2467 struct sk_buff *skb;
2469 skb = dev_alloc_skb(pkt_len + 5);
2470 if (vortex_debug > 4)
2471 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2472 pkt_len, rx_status);
2475 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2476 /* 'skb_put()' points to the start of sk_buff data area. */
2477 if (vp->bus_master &&
2478 ! (inw(ioaddr + Wn7_MasterStatus) & 0x8000)) {
2479 dma_addr_t dma = pci_map_single(VORTEX_PCI(vp), skb_put(skb, pkt_len),
2480 pkt_len, PCI_DMA_FROMDEVICE);
2481 outl(dma, ioaddr + Wn7_MasterAddr);
2482 outw((skb->len + 3) & ~3, ioaddr + Wn7_MasterLen);
2483 outw(StartDMAUp, ioaddr + EL3_CMD);
2484 while (inw(ioaddr + Wn7_MasterStatus) & 0x8000)
2486 pci_unmap_single(VORTEX_PCI(vp), dma, pkt_len, PCI_DMA_FROMDEVICE);
2488 insl(ioaddr + RX_FIFO, skb_put(skb, pkt_len),
2489 (pkt_len + 3) >> 2);
2491 outw(RxDiscard, ioaddr + EL3_CMD); /* Pop top Rx packet. */
2492 skb->protocol = eth_type_trans(skb, dev);
2494 dev->last_rx = jiffies;
2495 vp->stats.rx_packets++;
2496 /* Wait a limited time to go to next packet. */
2497 for (i = 200; i >= 0; i--)
2498 if ( ! (inw(ioaddr + EL3_STATUS) & CmdInProgress))
2501 } else if (vortex_debug > 0)
2502 printk(KERN_NOTICE "%s: No memory to allocate a sk_buff of "
2503 "size %d.\n", dev->name, pkt_len);
2505 vp->stats.rx_dropped++;
2506 issue_and_wait(dev, RxDiscard);
2513 boomerang_rx(struct net_device *dev)
2515 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2516 int entry = vp->cur_rx % RX_RING_SIZE;
2517 long ioaddr = dev->base_addr;
2519 int rx_work_limit = vp->dirty_rx + RX_RING_SIZE - vp->cur_rx;
2521 if (vortex_debug > 5)
2522 printk(KERN_DEBUG "boomerang_rx(): status %4.4x\n", inw(ioaddr+EL3_STATUS));
2524 while ((rx_status = le32_to_cpu(vp->rx_ring[entry].status)) & RxDComplete){
2525 if (--rx_work_limit < 0)
2527 if (rx_status & RxDError) { /* Error, update stats. */
2528 unsigned char rx_error = rx_status >> 16;
2529 if (vortex_debug > 2)
2530 printk(KERN_DEBUG " Rx error: status %2.2x.\n", rx_error);
2531 vp->stats.rx_errors++;
2532 if (rx_error & 0x01) vp->stats.rx_over_errors++;
2533 if (rx_error & 0x02) vp->stats.rx_length_errors++;
2534 if (rx_error & 0x04) vp->stats.rx_frame_errors++;
2535 if (rx_error & 0x08) vp->stats.rx_crc_errors++;
2536 if (rx_error & 0x10) vp->stats.rx_length_errors++;
2538 /* The packet length: up to 4.5K!. */
2539 int pkt_len = rx_status & 0x1fff;
2540 struct sk_buff *skb;
2541 dma_addr_t dma = le32_to_cpu(vp->rx_ring[entry].addr);
2543 if (vortex_debug > 4)
2544 printk(KERN_DEBUG "Receiving packet size %d status %4.4x.\n",
2545 pkt_len, rx_status);
2547 /* Check if the packet is long enough to just accept without
2548 copying to a properly sized skbuff. */
2549 if (pkt_len < rx_copybreak && (skb = dev_alloc_skb(pkt_len + 2)) != 0) {
2551 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2552 pci_dma_sync_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2553 /* 'skb_put()' points to the start of sk_buff data area. */
2554 memcpy(skb_put(skb, pkt_len),
2555 vp->rx_skbuff[entry]->tail,
2559 /* Pass up the skbuff already on the Rx ring. */
2560 skb = vp->rx_skbuff[entry];
2561 vp->rx_skbuff[entry] = NULL;
2562 skb_put(skb, pkt_len);
2563 pci_unmap_single(VORTEX_PCI(vp), dma, PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2566 skb->protocol = eth_type_trans(skb, dev);
2567 { /* Use hardware checksum info. */
2568 int csum_bits = rx_status & 0xee000000;
2570 (csum_bits == (IPChksumValid | TCPChksumValid) ||
2571 csum_bits == (IPChksumValid | UDPChksumValid))) {
2572 skb->ip_summed = CHECKSUM_UNNECESSARY;
2577 dev->last_rx = jiffies;
2578 vp->stats.rx_packets++;
2580 entry = (++vp->cur_rx) % RX_RING_SIZE;
2582 /* Refill the Rx ring buffers. */
2583 for (; vp->cur_rx - vp->dirty_rx > 0; vp->dirty_rx++) {
2584 struct sk_buff *skb;
2585 entry = vp->dirty_rx % RX_RING_SIZE;
2586 if (vp->rx_skbuff[entry] == NULL) {
2587 skb = dev_alloc_skb(PKT_BUF_SZ);
2589 static unsigned long last_jif;
2590 if ((jiffies - last_jif) > 10 * HZ) {
2591 printk(KERN_WARNING "%s: memory shortage\n", dev->name);
2594 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE)
2595 mod_timer(&vp->rx_oom_timer, RUN_AT(HZ * 1));
2596 break; /* Bad news! */
2598 skb->dev = dev; /* Mark as being used by this device. */
2599 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
2600 vp->rx_ring[entry].addr = cpu_to_le32(pci_map_single(VORTEX_PCI(vp), skb->tail, PKT_BUF_SZ, PCI_DMA_FROMDEVICE));
2601 vp->rx_skbuff[entry] = skb;
2603 vp->rx_ring[entry].status = 0; /* Clear complete bit. */
2604 outw(UpUnstall, ioaddr + EL3_CMD);
2610 * If we've hit a total OOM refilling the Rx ring we poll once a second
2611 * for some memory. Otherwise there is no way to restart the rx process.
2614 rx_oom_timer(unsigned long arg)
2616 struct net_device *dev = (struct net_device *)arg;
2617 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2619 spin_lock_irq(&vp->lock);
2620 if ((vp->cur_rx - vp->dirty_rx) == RX_RING_SIZE) /* This test is redundant, but makes me feel good */
2622 if (vortex_debug > 1) {
2623 printk(KERN_DEBUG "%s: rx_oom_timer %s\n", dev->name,
2624 ((vp->cur_rx - vp->dirty_rx) != RX_RING_SIZE) ? "succeeded" : "retrying");
2626 spin_unlock_irq(&vp->lock);
2630 vortex_down(struct net_device *dev)
2632 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2633 long ioaddr = dev->base_addr;
2635 netif_stop_queue (dev);
2637 del_timer_sync(&vp->rx_oom_timer);
2638 del_timer_sync(&vp->timer);
2640 /* Turn off statistics ASAP. We update vp->stats below. */
2641 outw(StatsDisable, ioaddr + EL3_CMD);
2643 /* Disable the receiver and transmitter. */
2644 outw(RxDisable, ioaddr + EL3_CMD);
2645 outw(TxDisable, ioaddr + EL3_CMD);
2647 if (dev->if_port == XCVR_10base2)
2648 /* Turn off thinnet power. Green! */
2649 outw(StopCoax, ioaddr + EL3_CMD);
2651 outw(SetIntrEnb | 0x0000, ioaddr + EL3_CMD);
2653 update_stats(ioaddr, dev);
2654 if (vp->full_bus_master_rx)
2655 outl(0, ioaddr + UpListPtr);
2656 if (vp->full_bus_master_tx)
2657 outl(0, ioaddr + DownListPtr);
2659 if (VORTEX_PCI(vp)) {
2660 pci_save_state(VORTEX_PCI(vp), vp->power_state);
2666 vortex_close(struct net_device *dev)
2668 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2669 long ioaddr = dev->base_addr;
2672 if (netif_device_present(dev))
2675 if (vortex_debug > 1) {
2676 printk(KERN_DEBUG"%s: vortex_close() status %4.4x, Tx status %2.2x.\n",
2677 dev->name, inw(ioaddr + EL3_STATUS), inb(ioaddr + TxStatus));
2678 printk(KERN_DEBUG "%s: vortex close stats: rx_nocopy %d rx_copy %d"
2679 " tx_queued %d Rx pre-checksummed %d.\n",
2680 dev->name, vp->rx_nocopy, vp->rx_copy, vp->queued_packet, vp->rx_csumhits);
2684 if ( vp->rx_csumhits &&
2685 ((vp->drv_flags & HAS_HWCKSM) == 0) &&
2686 (hw_checksums[vp->card_idx] == -1)) {
2687 printk(KERN_WARNING "%s supports hardware checksums, and we're not using them!\n", dev->name);
2691 free_irq(dev->irq, dev);
2693 if (vp->full_bus_master_rx) { /* Free Boomerang bus master Rx buffers. */
2694 for (i = 0; i < RX_RING_SIZE; i++)
2695 if (vp->rx_skbuff[i]) {
2696 pci_unmap_single( VORTEX_PCI(vp), le32_to_cpu(vp->rx_ring[i].addr),
2697 PKT_BUF_SZ, PCI_DMA_FROMDEVICE);
2698 dev_kfree_skb(vp->rx_skbuff[i]);
2699 vp->rx_skbuff[i] = 0;
2702 if (vp->full_bus_master_tx) { /* Free Boomerang bus master Tx buffers. */
2703 for (i = 0; i < TX_RING_SIZE; i++) {
2704 if (vp->tx_skbuff[i]) {
2705 struct sk_buff *skb = vp->tx_skbuff[i];
2709 for (k=0; k<=skb_shinfo(skb)->nr_frags; k++)
2710 pci_unmap_single(VORTEX_PCI(vp),
2711 le32_to_cpu(vp->tx_ring[i].frag[k].addr),
2712 le32_to_cpu(vp->tx_ring[i].frag[k].length)&0xFFF,
2715 pci_unmap_single(VORTEX_PCI(vp), le32_to_cpu(vp->tx_ring[i].addr), skb->len, PCI_DMA_TODEVICE);
2718 vp->tx_skbuff[i] = 0;
2727 dump_tx_ring(struct net_device *dev)
2729 if (vortex_debug > 0) {
2730 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2731 long ioaddr = dev->base_addr;
2733 if (vp->full_bus_master_tx) {
2735 int stalled = inl(ioaddr + PktStatus) & 0x04; /* Possible racy. But it's only debug stuff */
2737 printk(KERN_ERR " Flags; bus-master %d, dirty %d(%d) current %d(%d)\n",
2738 vp->full_bus_master_tx,
2739 vp->dirty_tx, vp->dirty_tx % TX_RING_SIZE,
2740 vp->cur_tx, vp->cur_tx % TX_RING_SIZE);
2741 printk(KERN_ERR " Transmit list %8.8x vs. %p.\n",
2742 inl(ioaddr + DownListPtr),
2743 &vp->tx_ring[vp->dirty_tx % TX_RING_SIZE]);
2744 issue_and_wait(dev, DownStall);
2745 for (i = 0; i < TX_RING_SIZE; i++) {
2746 printk(KERN_ERR " %d: @%p length %8.8x status %8.8x\n", i,
2749 le32_to_cpu(vp->tx_ring[i].frag[0].length),
2751 le32_to_cpu(vp->tx_ring[i].length),
2753 le32_to_cpu(vp->tx_ring[i].status));
2756 outw(DownUnstall, ioaddr + EL3_CMD);
2761 static struct net_device_stats *vortex_get_stats(struct net_device *dev)
2763 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2764 unsigned long flags;
2766 if (netif_device_present(dev)) { /* AKPM: Used to be netif_running */
2767 spin_lock_irqsave (&vp->lock, flags);
2768 update_stats(dev->base_addr, dev);
2769 spin_unlock_irqrestore (&vp->lock, flags);
2774 /* Update statistics.
2775 Unlike with the EL3 we need not worry about interrupts changing
2776 the window setting from underneath us, but we must still guard
2777 against a race condition with a StatsUpdate interrupt updating the
2778 table. This is done by checking that the ASM (!) code generated uses
2779 atomic updates with '+='.
2781 static void update_stats(long ioaddr, struct net_device *dev)
2783 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2784 int old_window = inw(ioaddr + EL3_CMD);
2786 if (old_window == 0xffff) /* Chip suspended or ejected. */
2788 /* Unlike the 3c5x9 we need not turn off stats updates while reading. */
2789 /* Switch to the stats window, and read everything. */
2791 vp->stats.tx_carrier_errors += inb(ioaddr + 0);
2792 vp->stats.tx_heartbeat_errors += inb(ioaddr + 1);
2793 /* Multiple collisions. */ inb(ioaddr + 2);
2794 vp->stats.collisions += inb(ioaddr + 3);
2795 vp->stats.tx_window_errors += inb(ioaddr + 4);
2796 vp->stats.rx_fifo_errors += inb(ioaddr + 5);
2797 vp->stats.tx_packets += inb(ioaddr + 6);
2798 vp->stats.tx_packets += (inb(ioaddr + 9)&0x30) << 4;
2799 /* Rx packets */ inb(ioaddr + 7); /* Must read to clear */
2800 /* Tx deferrals */ inb(ioaddr + 8);
2801 /* Don't bother with register 9, an extension of registers 6&7.
2802 If we do use the 6&7 values the atomic update assumption above
2804 vp->stats.rx_bytes += inw(ioaddr + 10);
2805 vp->stats.tx_bytes += inw(ioaddr + 12);
2806 /* New: On the Vortex we must also clear the BadSSD counter. */
2811 u8 up = inb(ioaddr + 13);
2812 vp->stats.rx_bytes += (up & 0x0f) << 16;
2813 vp->stats.tx_bytes += (up & 0xf0) << 12;
2816 EL3WINDOW(old_window >> 13);
2821 static void vortex_get_drvinfo(struct net_device *dev,
2822 struct ethtool_drvinfo *info)
2824 struct vortex_private *vp = dev->priv;
2826 strcpy(info->driver, DRV_NAME);
2827 strcpy(info->version, DRV_VERSION);
2828 if (VORTEX_PCI(vp)) {
2829 strcpy(info->bus_info, pci_name(VORTEX_PCI(vp)));
2831 if (VORTEX_EISA(vp))
2832 sprintf(info->bus_info, vp->gendev->bus_id);
2834 sprintf(info->bus_info, "EISA 0x%lx %d",
2835 dev->base_addr, dev->irq);
2839 static struct ethtool_ops vortex_ethtool_ops = {
2840 .get_drvinfo = vortex_get_drvinfo,
2843 static int vortex_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2845 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2846 long ioaddr = dev->base_addr;
2847 struct mii_ioctl_data *data = (struct mii_ioctl_data *)&rq->ifr_data;
2848 int phy = vp->phys[0] & 0x1f;
2852 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2855 case SIOCGMIIREG: /* Read MII PHY register. */
2857 data->val_out = mdio_read(dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2861 case SIOCSMIIREG: /* Write MII PHY register. */
2862 if (!capable(CAP_NET_ADMIN)) {
2866 mdio_write(dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2871 retval = -EOPNOTSUPP;
2878 /* Pre-Cyclone chips have no documented multicast filter, so the only
2879 multicast setting is to receive all multicast frames. At least
2880 the chip has a very clean way to set the mode, unlike many others. */
2881 static void set_rx_mode(struct net_device *dev)
2883 long ioaddr = dev->base_addr;
2886 if (dev->flags & IFF_PROMISC) {
2887 if (vortex_debug > 0)
2888 printk(KERN_NOTICE "%s: Setting promiscuous mode.\n", dev->name);
2889 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast|RxProm;
2890 } else if ((dev->mc_list) || (dev->flags & IFF_ALLMULTI)) {
2891 new_mode = SetRxFilter|RxStation|RxMulticast|RxBroadcast;
2893 new_mode = SetRxFilter | RxStation | RxBroadcast;
2895 outw(new_mode, ioaddr + EL3_CMD);
2898 /* MII transceiver control section.
2899 Read and write the MII registers using software-generated serial
2900 MDIO protocol. See the MII specifications or DP83840A data sheet
2903 /* The maximum data clock rate is 2.5 Mhz. The minimum timing is usually
2904 met by back-to-back PCI I/O cycles, but we insert a delay to avoid
2905 "overclocking" issues. */
2906 #define mdio_delay() inl(mdio_addr)
2908 #define MDIO_SHIFT_CLK 0x01
2909 #define MDIO_DIR_WRITE 0x04
2910 #define MDIO_DATA_WRITE0 (0x00 | MDIO_DIR_WRITE)
2911 #define MDIO_DATA_WRITE1 (0x02 | MDIO_DIR_WRITE)
2912 #define MDIO_DATA_READ 0x02
2913 #define MDIO_ENB_IN 0x00
2915 /* Generate the preamble required for initial synchronization and
2916 a few older transceivers. */
2917 static void mdio_sync(long ioaddr, int bits)
2919 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2921 /* Establish sync by sending at least 32 logic ones. */
2922 while (-- bits >= 0) {
2923 outw(MDIO_DATA_WRITE1, mdio_addr);
2925 outw(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, mdio_addr);
2930 static int mdio_read(struct net_device *dev, int phy_id, int location)
2932 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2934 long ioaddr = dev->base_addr;
2935 int read_cmd = (0xf6 << 10) | (phy_id << 5) | location;
2936 unsigned int retval = 0;
2937 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2939 spin_lock_bh(&vp->mdio_lock);
2941 if (mii_preamble_required)
2942 mdio_sync(ioaddr, 32);
2944 /* Shift the read command bits out. */
2945 for (i = 14; i >= 0; i--) {
2946 int dataval = (read_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2947 outw(dataval, mdio_addr);
2949 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2952 /* Read the two transition, 16 data, and wire-idle bits. */
2953 for (i = 19; i > 0; i--) {
2954 outw(MDIO_ENB_IN, mdio_addr);
2956 retval = (retval << 1) | ((inw(mdio_addr) & MDIO_DATA_READ) ? 1 : 0);
2957 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
2960 spin_unlock_bh(&vp->mdio_lock);
2961 return retval & 0x20000 ? 0xffff : retval>>1 & 0xffff;
2964 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
2966 struct vortex_private *vp = (struct vortex_private *)dev->priv;
2967 long ioaddr = dev->base_addr;
2968 int write_cmd = 0x50020000 | (phy_id << 23) | (location << 18) | value;
2969 long mdio_addr = ioaddr + Wn4_PhysicalMgmt;
2972 spin_lock_bh(&vp->mdio_lock);
2974 if (mii_preamble_required)
2975 mdio_sync(ioaddr, 32);
2977 /* Shift the command bits out. */
2978 for (i = 31; i >= 0; i--) {
2979 int dataval = (write_cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
2980 outw(dataval, mdio_addr);
2982 outw(dataval | MDIO_SHIFT_CLK, mdio_addr);
2985 /* Leave the interface idle. */
2986 for (i = 1; i >= 0; i--) {
2987 outw(MDIO_ENB_IN, mdio_addr);
2989 outw(MDIO_ENB_IN | MDIO_SHIFT_CLK, mdio_addr);
2992 spin_unlock_bh(&vp->mdio_lock);
2996 /* ACPI: Advanced Configuration and Power Interface. */
2997 /* Set Wake-On-LAN mode and put the board into D3 (power-down) state. */
2998 static void acpi_set_WOL(struct net_device *dev)
3000 struct vortex_private *vp = (struct vortex_private *)dev->priv;
3001 long ioaddr = dev->base_addr;
3003 /* Power up on: 1==Downloaded Filter, 2==Magic Packets, 4==Link Status. */
3005 outw(2, ioaddr + 0x0c);
3006 /* The RxFilter must accept the WOL frames. */
3007 outw(SetRxFilter|RxStation|RxMulticast|RxBroadcast, ioaddr + EL3_CMD);
3008 outw(RxEnable, ioaddr + EL3_CMD);
3010 /* Change the power state to D3; RxEnable doesn't take effect. */
3011 pci_enable_wake(VORTEX_PCI(vp), 0, 1);
3012 pci_set_power_state(VORTEX_PCI(vp), 3);
3016 static void __devexit vortex_remove_one (struct pci_dev *pdev)
3018 struct net_device *dev = pci_get_drvdata(pdev);
3019 struct vortex_private *vp;
3022 printk("vortex_remove_one called for Compaq device!\n");
3028 /* AKPM: FIXME: we should have
3029 * if (vp->cb_fn_base) iounmap(vp->cb_fn_base);
3032 unregister_netdev(dev);
3033 /* Should really use issue_and_wait() here */
3034 outw(TotalReset|0x14, dev->base_addr + EL3_CMD);
3036 if (VORTEX_PCI(vp)) {
3037 pci_set_power_state(VORTEX_PCI(vp), 0); /* Go active */
3038 if (vp->pm_state_valid)
3039 pci_restore_state(VORTEX_PCI(vp), vp->power_state);
3042 pci_free_consistent(pdev,
3043 sizeof(struct boom_rx_desc) * RX_RING_SIZE
3044 + sizeof(struct boom_tx_desc) * TX_RING_SIZE,
3047 if (vp->must_free_region)
3048 release_region(dev->base_addr, vp->io_size);
3053 static struct pci_driver vortex_driver = {
3055 .probe = vortex_init_one,
3056 .remove = __devexit_p(vortex_remove_one),
3057 .id_table = vortex_pci_tbl,
3059 .suspend = vortex_suspend,
3060 .resume = vortex_resume,
3065 static int vortex_have_pci;
3066 static int vortex_have_eisa;
3069 static int __init vortex_init (void)
3071 int pci_rc, eisa_rc;
3073 pci_rc = pci_module_init(&vortex_driver);
3074 eisa_rc = vortex_eisa_init();
3077 vortex_have_pci = 1;
3079 vortex_have_eisa = 1;
3081 return (vortex_have_pci + vortex_have_eisa) ? 0 : -ENODEV;
3085 static void __exit vortex_eisa_cleanup (void)
3087 struct vortex_private *vp;
3091 /* Take care of the EISA devices */
3092 eisa_driver_unregister (&vortex_eisa_driver);
3095 if (compaq_net_device) {
3096 vp = compaq_net_device->priv;
3097 ioaddr = compaq_net_device->base_addr;
3099 unregister_netdev (compaq_net_device);
3100 outw (TotalReset, ioaddr + EL3_CMD);
3101 release_region (ioaddr, VORTEX_TOTAL_SIZE);
3103 free_netdev (compaq_net_device);
3108 static void __exit vortex_cleanup (void)
3110 if (vortex_have_pci)
3111 pci_unregister_driver (&vortex_driver);
3112 if (vortex_have_eisa)
3113 vortex_eisa_cleanup ();
3117 module_init(vortex_init);
3118 module_exit(vortex_cleanup);