sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/firmware.h>
  29 #include <linux/module.h>
  30 #include <linux/math64.h>
  31
  32 #include <sound/core.h>
  33 #include <sound/control.h>
  34 #include <sound/pcm.h>
  35 #include <sound/info.h>
  36 #include <sound/asoundef.h>
  37 #include <sound/rawmidi.h>
  38 #include <sound/hwdep.h>
  39 #include <sound/initval.h>
  40 #include <sound/hdsp.h>
  41
  42 #include <asm/byteorder.h>
  43 #include <asm/current.h>
  44 #include <asm/io.h>
  45
  46 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  47 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  48 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  49
  50 module_param_array(index, int, NULL, 0444);
  51 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  52 module_param_array(id, charp, NULL, 0444);
  53 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  54 module_param_array(enable, bool, NULL, 0444);
  55 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  56 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  57 MODULE_DESCRIPTION("RME Hammerfall DSP");
  58 MODULE_LICENSE("GPL");
  59 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  60                 "{RME HDSP-9652},"
  61                 "{RME HDSP-9632}}");
  62 #ifdef HDSP_FW_LOADER
  63 MODULE_FIRMWARE("rpm_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware.bin");
  65 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  66 MODULE_FIRMWARE("digiface_firmware.bin");
  67 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  68 #endif
  69
  70 #define HDSP_MAX_CHANNELS        26
  71 #define HDSP_MAX_DS_CHANNELS     14
  72 #define HDSP_MAX_QS_CHANNELS     8
  73 #define DIGIFACE_SS_CHANNELS     26
  74 #define DIGIFACE_DS_CHANNELS     14
  75 #define MULTIFACE_SS_CHANNELS    18
  76 #define MULTIFACE_DS_CHANNELS    14
  77 #define H9652_SS_CHANNELS        26
  78 #define H9652_DS_CHANNELS        14
  79 /* This does not include possible Analog Extension Boards
  80    AEBs are detected at card initialization
  81 */
  82 #define H9632_SS_CHANNELS        12
  83 #define H9632_DS_CHANNELS        8
  84 #define H9632_QS_CHANNELS        4
  85 #define RPM_CHANNELS             6
  86
  87 /* Write registers. These are defined as byte-offsets from the iobase value.
  88  */
  89 #define HDSP_resetPointer               0
  90 #define HDSP_freqReg                    0
  91 #define HDSP_outputBufferAddress        32
  92 #define HDSP_inputBufferAddress         36
  93 #define HDSP_controlRegister            64
  94 #define HDSP_interruptConfirmation      96
  95 #define HDSP_outputEnable               128
  96 #define HDSP_control2Reg                256
  97 #define HDSP_midiDataOut0               352
  98 #define HDSP_midiDataOut1               356
  99 #define HDSP_fifoData                   368
 100 #define HDSP_inputEnable                384
 101
 102 /* Read registers. These are defined as byte-offsets from the iobase value
 103  */
 104
 105 #define HDSP_statusRegister    0
 106 #define HDSP_timecode        128
 107 #define HDSP_status2Register 192
 108 #define HDSP_midiDataIn0     360
 109 #define HDSP_midiDataIn1     364
 110 #define HDSP_midiStatusOut0  384
 111 #define HDSP_midiStatusOut1  388
 112 #define HDSP_midiStatusIn0   392
 113 #define HDSP_midiStatusIn1   396
 114 #define HDSP_fifoStatus      400
 115
 116 /* the meters are regular i/o-mapped registers, but offset
 117    considerably from the rest. the peak registers are reset
 118    when read; the least-significant 4 bits are full-scale counters;
 119    the actual peak value is in the most-significant 24 bits.
 120 */
 121
 122 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 123 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 124 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 125 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 126 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 127
 128
 129 /* This is for H9652 cards
 130    Peak values are read downward from the base
 131    Rms values are read upward
 132    There are rms values for the outputs too
 133    26*3 values are read in ss mode
 134    14*3 in ds mode, with no gap between values
 135 */
 136 #define HDSP_9652_peakBase      7164
 137 #define HDSP_9652_rmsBase       4096
 138
 139 /* c.f. the hdsp_9632_meters_t struct */
 140 #define HDSP_9632_metersBase    4096
 141
 142 #define HDSP_IO_EXTENT     7168
 143
 144 /* control2 register bits */
 145
 146 #define HDSP_TMS                0x01
 147 #define HDSP_TCK                0x02
 148 #define HDSP_TDI                0x04
 149 #define HDSP_JTAG               0x08
 150 #define HDSP_PWDN               0x10
 151 #define HDSP_PROGRAM            0x020
 152 #define HDSP_CONFIG_MODE_0      0x040
 153 #define HDSP_CONFIG_MODE_1      0x080
 154 #define HDSP_VERSION_BIT        (0x100 | HDSP_S_LOAD)
 155 #define HDSP_BIGENDIAN_MODE     0x200
 156 #define HDSP_RD_MULTIPLE        0x400
 157 #define HDSP_9652_ENABLE_MIXER  0x800
 158 #define HDSP_TDO                0x10000000
 159
 160 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 161 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 162
 163 /* Control Register bits */
 164
 165 #define HDSP_Start                (1<<0)  /* start engine */
 166 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 167 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 168 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 169 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 170 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 171 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 172 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 173 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 174 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 175 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 176 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 177 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 178 #define HDSP_SyncRef2             (1<<13)
 179 #define HDSP_SPDIFInputSelect0    (1<<14)
 180 #define HDSP_SPDIFInputSelect1    (1<<15)
 181 #define HDSP_SyncRef0             (1<<16)
 182 #define HDSP_SyncRef1             (1<<17)
 183 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 184 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 185 #define HDSP_Midi0InterruptEnable (1<<22)
 186 #define HDSP_Midi1InterruptEnable (1<<23)
 187 #define HDSP_LineOut              (1<<24)
 188 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 189 #define HDSP_ADGain1              (1<<26)
 190 #define HDSP_DAGain0              (1<<27)
 191 #define HDSP_DAGain1              (1<<28)
 192 #define HDSP_PhoneGain0           (1<<29)
 193 #define HDSP_PhoneGain1           (1<<30)
 194 #define HDSP_QuadSpeed            (1<<31)
 195
 196 /* RPM uses some of the registers for special purposes */
 197 #define HDSP_RPM_Inp12            0x04A00
 198 #define HDSP_RPM_Inp12_Phon_6dB   0x00800  /* Dolby */
 199 #define HDSP_RPM_Inp12_Phon_0dB   0x00000  /* .. */
 200 #define HDSP_RPM_Inp12_Phon_n6dB  0x04000  /* inp_0 */
 201 #define HDSP_RPM_Inp12_Line_0dB   0x04200  /* Dolby+PRO */
 202 #define HDSP_RPM_Inp12_Line_n6dB  0x00200  /* PRO */
 203
 204 #define HDSP_RPM_Inp34            0x32000
 205 #define HDSP_RPM_Inp34_Phon_6dB   0x20000  /* SyncRef1 */
 206 #define HDSP_RPM_Inp34_Phon_0dB   0x00000  /* .. */
 207 #define HDSP_RPM_Inp34_Phon_n6dB  0x02000  /* SyncRef2 */
 208 #define HDSP_RPM_Inp34_Line_0dB   0x30000  /* SyncRef1+SyncRef0 */
 209 #define HDSP_RPM_Inp34_Line_n6dB  0x10000  /* SyncRef0 */
 210
 211 #define HDSP_RPM_Bypass           0x01000
 212
 213 #define HDSP_RPM_Disconnect       0x00001
 214
 215 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 216 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 217 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 218 #define HDSP_ADGainLowGain     0
 219
 220 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 221 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 222 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 223 #define HDSP_DAGainMinus10dBV    0
 224
 225 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 226 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 227 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 228 #define HDSP_PhoneGainMinus12dB  0
 229
 230 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 231 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 232
 233 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 234 #define HDSP_SPDIFInputADAT1    0
 235 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 236 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 237 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 238
 239 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 240 #define HDSP_SyncRef_ADAT1       0
 241 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 242 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 243 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 244 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 245 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 246
 247 /* Sample Clock Sources */
 248
 249 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 250 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 251 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 252 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 253 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 254 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 255 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 256 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 257 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 258 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 259
 260 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 261
 262 #define HDSP_SYNC_FROM_WORD      0
 263 #define HDSP_SYNC_FROM_SPDIF     1
 264 #define HDSP_SYNC_FROM_ADAT1     2
 265 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 266 #define HDSP_SYNC_FROM_ADAT2     4
 267 #define HDSP_SYNC_FROM_ADAT3     5
 268
 269 /* SyncCheck status */
 270
 271 #define HDSP_SYNC_CHECK_NO_LOCK 0
 272 #define HDSP_SYNC_CHECK_LOCK    1
 273 #define HDSP_SYNC_CHECK_SYNC    2
 274
 275 /* AutoSync references - used by "autosync_ref" control switch */
 276
 277 #define HDSP_AUTOSYNC_FROM_WORD      0
 278 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 279 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 280 #define HDSP_AUTOSYNC_FROM_NONE      3
 281 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 282 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 283 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 284
 285 /* Possible sources of S/PDIF input */
 286
 287 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 288 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 289 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 290 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 291
 292 #define HDSP_Frequency32KHz    HDSP_Frequency0
 293 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 294 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 295 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 296 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 297 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 298 /* For H9632 cards */
 299 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 300 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 301 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 302 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 303         return 104857600000000 / rate; // 100 MHz
 304         return 110100480000000 / rate; // 105 MHz
 305 */
 306 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 307
 308 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 309 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 310
 311 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 312 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 313
 314 /* Status Register bits */
 315
 316 #define HDSP_audioIRQPending    (1<<0)
 317 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 318 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 319 #define HDSP_Lock1              (1<<2)
 320 #define HDSP_Lock0              (1<<3)
 321 #define HDSP_SPDIFSync          (1<<4)
 322 #define HDSP_TimecodeLock       (1<<5)
 323 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 324 #define HDSP_Sync2              (1<<16)
 325 #define HDSP_Sync1              (1<<17)
 326 #define HDSP_Sync0              (1<<18)
 327 #define HDSP_DoubleSpeedStatus  (1<<19)
 328 #define HDSP_ConfigError        (1<<20)
 329 #define HDSP_DllError           (1<<21)
 330 #define HDSP_spdifFrequency0    (1<<22)
 331 #define HDSP_spdifFrequency1    (1<<23)
 332 #define HDSP_spdifFrequency2    (1<<24)
 333 #define HDSP_SPDIFErrorFlag     (1<<25)
 334 #define HDSP_BufferID           (1<<26)
 335 #define HDSP_TimecodeSync       (1<<27)
 336 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 337 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 338 #define HDSP_midi0IRQPending    (1<<30)
 339 #define HDSP_midi1IRQPending    (1<<31)
 340
 341 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 342 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
 343                                       HDSP_spdifFrequency1|\
 344                                       HDSP_spdifFrequency2|\
 345                                       HDSP_spdifFrequency3)
 346
 347 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 348 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 349 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 350
 351 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 352 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 353 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 354
 355 /* This is for H9632 cards */
 356 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
 357                                      HDSP_spdifFrequency1|\
 358                                      HDSP_spdifFrequency2)
 359 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 360 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 361
 362 /* Status2 Register bits */
 363
 364 #define HDSP_version0     (1<<0)
 365 #define HDSP_version1     (1<<1)
 366 #define HDSP_version2     (1<<2)
 367 #define HDSP_wc_lock      (1<<3)
 368 #define HDSP_wc_sync      (1<<4)
 369 #define HDSP_inp_freq0    (1<<5)
 370 #define HDSP_inp_freq1    (1<<6)
 371 #define HDSP_inp_freq2    (1<<7)
 372 #define HDSP_SelSyncRef0  (1<<8)
 373 #define HDSP_SelSyncRef1  (1<<9)
 374 #define HDSP_SelSyncRef2  (1<<10)
 375
 376 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 377
 378 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 379 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 380 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 381 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 382 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 383 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 384 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 385 /* FIXME : more values for 9632 cards ? */
 386
 387 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 388 #define HDSP_SelSyncRef_ADAT1      0
 389 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 390 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 391 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 392 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 393 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 394
 395 /* Card state flags */
 396
 397 #define HDSP_InitializationComplete  (1<<0)
 398 #define HDSP_FirmwareLoaded          (1<<1)
 399 #define HDSP_FirmwareCached          (1<<2)
 400
 401 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 402
 403 #define HDSP_LONG_WAIT   5000
 404 #define HDSP_SHORT_WAIT  30
 405
 406 #define UNITY_GAIN                       32768
 407 #define MINUS_INFINITY_GAIN              0
 408
 409 /* the size of a substream (1 mono data stream) */
 410
 411 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 412 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 413
 414 /* the size of the area we need to allocate for DMA transfers. the
 415    size is the same regardless of the number of channels - the
 416    Multiface still uses the same memory area.
 417
 418    Note that we allocate 1 more channel than is apparently needed
 419    because the h/w seems to write 1 byte beyond the end of the last
 420    page. Sigh.
 421 */
 422
 423 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 424 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 425
 426 /* use hotplug firmware loader? */
 427 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
 428 #if !defined(HDSP_USE_HWDEP_LOADER)
 429 #define HDSP_FW_LOADER
 430 #endif
 431 #endif
 432
 433 struct hdsp_9632_meters {
 434     u32 input_peak[16];
 435     u32 playback_peak[16];
 436     u32 output_peak[16];
 437     u32 xxx_peak[16];
 438     u32 padding[64];
 439     u32 input_rms_low[16];
 440     u32 playback_rms_low[16];
 441     u32 output_rms_low[16];
 442     u32 xxx_rms_low[16];
 443     u32 input_rms_high[16];
 444     u32 playback_rms_high[16];
 445     u32 output_rms_high[16];
 446     u32 xxx_rms_high[16];
 447 };
 448
 449 struct hdsp_midi {
 450     struct hdsp             *hdsp;
 451     int                      id;
 452     struct snd_rawmidi           *rmidi;
 453     struct snd_rawmidi_substream *input;
 454     struct snd_rawmidi_substream *output;
 455     char                     istimer; /* timer in use */
 456     struct timer_list        timer;
 457     spinlock_t               lock;
 458     int                      pending;
 459 };
 460
 461 struct hdsp {
 462         spinlock_t            lock;
 463         struct snd_pcm_substream *capture_substream;
 464         struct snd_pcm_substream *playback_substream;
 465         struct hdsp_midi      midi[2];
 466         struct tasklet_struct midi_tasklet;
 467         int                   use_midi_tasklet;
 468         int                   precise_ptr;
 469         u32                   control_register;      /* cached value */
 470         u32                   control2_register;     /* cached value */
 471         u32                   creg_spdif;
 472         u32                   creg_spdif_stream;
 473         int                   clock_source_locked;
 474         char                 *card_name;         /* digiface/multiface/rpm */
 475         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 476         unsigned short        firmware_rev;
 477         unsigned short        state;                 /* stores state bits */
 478         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
 479         size_t                period_bytes;          /* guess what this is */
 480         unsigned char         max_channels;
 481         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 482         unsigned char         ds_in_channels;
 483         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 484         unsigned char         qs_out_channels;
 485         unsigned char         ds_out_channels;
 486         unsigned char         ss_out_channels;
 487
 488         struct snd_dma_buffer capture_dma_buf;
 489         struct snd_dma_buffer playback_dma_buf;
 490         unsigned char        *capture_buffer;       /* suitably aligned address */
 491         unsigned char        *playback_buffer;      /* suitably aligned address */
 492
 493         pid_t                 capture_pid;
 494         pid_t                 playback_pid;
 495         int                   running;
 496         int                   system_sample_rate;
 497         char                 *channel_map;
 498         int                   dev;
 499         int                   irq;
 500         unsigned long         port;
 501         void __iomem         *iobase;
 502         struct snd_card *card;
 503         struct snd_pcm *pcm;
 504         struct snd_hwdep          *hwdep;
 505         struct pci_dev       *pci;
 506         struct snd_kcontrol *spdif_ctl;
 507         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 508         unsigned int          dds_value; /* last value written to freq register */
 509 };
 510
 511 /* These tables map the ALSA channels 1..N to the channels that we
 512    need to use in order to find the relevant channel buffer. RME
 513    refer to this kind of mapping as between "the ADAT channel and
 514    the DMA channel." We index it using the logical audio channel,
 515    and the value is the DMA channel (i.e. channel buffer number)
 516    where the data for that channel can be read/written from/to.
 517 */
 518
 519 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 520         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 521         18, 19, 20, 21, 22, 23, 24, 25
 522 };
 523
 524 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 525         /* Analog */
 526         0, 1, 2, 3, 4, 5, 6, 7,
 527         /* ADAT 2 */
 528         16, 17, 18, 19, 20, 21, 22, 23,
 529         /* SPDIF */
 530         24, 25,
 531         -1, -1, -1, -1, -1, -1, -1, -1
 532 };
 533
 534 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 535         /* ADAT channels are remapped */
 536         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 537         /* channels 12 and 13 are S/PDIF */
 538         24, 25,
 539         /* others don't exist */
 540         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 541 };
 542
 543 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 544         /* ADAT channels */
 545         0, 1, 2, 3, 4, 5, 6, 7,
 546         /* SPDIF */
 547         8, 9,
 548         /* Analog */
 549         10, 11,
 550         /* AO4S-192 and AI4S-192 extension boards */
 551         12, 13, 14, 15,
 552         /* others don't exist */
 553         -1, -1, -1, -1, -1, -1, -1, -1,
 554         -1, -1
 555 };
 556
 557 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 558         /* ADAT */
 559         1, 3, 5, 7,
 560         /* SPDIF */
 561         8, 9,
 562         /* Analog */
 563         10, 11,
 564         /* AO4S-192 and AI4S-192 extension boards */
 565         12, 13, 14, 15,
 566         /* others don't exist */
 567         -1, -1, -1, -1, -1, -1, -1, -1,
 568         -1, -1, -1, -1, -1, -1
 569 };
 570
 571 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 572         /* ADAT is disabled in this mode */
 573         /* SPDIF */
 574         8, 9,
 575         /* Analog */
 576         10, 11,
 577         /* AO4S-192 and AI4S-192 extension boards */
 578         12, 13, 14, 15,
 579         /* others don't exist */
 580         -1, -1, -1, -1, -1, -1, -1, -1,
 581         -1, -1, -1, -1, -1, -1, -1, -1,
 582         -1, -1
 583 };
 584
 585 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 586 {
 587         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 588         dmab->dev.dev = snd_dma_pci_data(pci);
 589         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 590                 if (dmab->bytes >= size)
 591                         return 0;
 592         }
 593         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 594                                 size, dmab) < 0)
 595                 return -ENOMEM;
 596         return 0;
 597 }
 598
 599 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 600 {
 601         if (dmab->area) {
 602                 dmab->dev.dev = NULL; /* make it anonymous */
 603                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 604         }
 605 }
 606
 607
 608 static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = {
 609         {
 610                 .vendor = PCI_VENDOR_ID_XILINX,
 611                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 612                 .subvendor = PCI_ANY_ID,
 613                 .subdevice = PCI_ANY_ID,
 614         }, /* RME Hammerfall-DSP */
 615         { 0, },
 616 };
 617
 618 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 619
 620 /* prototypes */
 621 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 622 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 623 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 624 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 625 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 626 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 627 static int hdsp_autosync_ref(struct hdsp *hdsp);
 628 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 629 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 630
 631 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 632 {
 633         switch (hdsp->io_type) {
 634         case Multiface:
 635         case Digiface:
 636         case RPM:
 637         default:
 638                 if (hdsp->firmware_rev == 0xa)
 639                         return (64 * out) + (32 + (in));
 640                 else
 641                         return (52 * out) + (26 + (in));
 642         case H9632:
 643                 return (32 * out) + (16 + (in));
 644         case H9652:
 645                 return (52 * out) + (26 + (in));
 646         }
 647 }
 648
 649 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 650 {
 651         switch (hdsp->io_type) {
 652         case Multiface:
 653         case Digiface:
 654         case RPM:
 655         default:
 656                 if (hdsp->firmware_rev == 0xa)
 657                         return (64 * out) + in;
 658                 else
 659                         return (52 * out) + in;
 660         case H9632:
 661                 return (32 * out) + in;
 662         case H9652:
 663                 return (52 * out) + in;
 664         }
 665 }
 666
 667 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 668 {
 669         writel(val, hdsp->iobase + reg);
 670 }
 671
 672 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 673 {
 674         return readl (hdsp->iobase + reg);
 675 }
 676
 677 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 678 {
 679         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 680         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
 681                 snd_printk("Hammerfall-DSP: no IO box connected!\n");
 682                 hdsp->state &= ~HDSP_FirmwareLoaded;
 683                 return -EIO;
 684         }
 685         return 0;
 686 }
 687
 688 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
 689                                unsigned int delay)
 690 {
 691         unsigned int i;
 692
 693         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 694                 return 0;
 695
 696         for (i = 0; i != loops; ++i) {
 697                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
 698                         msleep(delay);
 699                 else {
 700                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
 701                                    i * delay);
 702                         return 0;
 703                 }
 704         }
 705
 706         snd_printk("Hammerfall-DSP: no IO box connected!\n");
 707         hdsp->state &= ~HDSP_FirmwareLoaded;
 708         return -EIO;
 709 }
 710
 711 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 712
 713         int i;
 714         unsigned long flags;
 715
 716         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 717
 718                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 719
 720                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 721                 hdsp_write (hdsp, HDSP_fifoData, 0);
 722
 723                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 724                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 725                         return -EIO;
 726                 }
 727
 728                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 729
 730                 for (i = 0; i < 24413; ++i) {
 731                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
 732                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 733                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 734                                 return -EIO;
 735                         }
 736                 }
 737
 738                 ssleep(3);
 739
 740                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 741                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
 742                         return -EIO;
 743                 }
 744
 745 #ifdef SNDRV_BIG_ENDIAN
 746                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 747 #else
 748                 hdsp->control2_register = 0;
 749 #endif
 750                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 751                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 752
 753         }
 754         if (hdsp->state & HDSP_InitializationComplete) {
 755                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 756                 spin_lock_irqsave(&hdsp->lock, flags);
 757                 snd_hdsp_set_defaults(hdsp);
 758                 spin_unlock_irqrestore(&hdsp->lock, flags);
 759         }
 760
 761         hdsp->state |= HDSP_FirmwareLoaded;
 762
 763         return 0;
 764 }
 765
 766 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 767 {
 768         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 769
 770                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
 771                 hdsp_write (hdsp, HDSP_fifoData, 0);
 772                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
 773                         return -EIO;
 774
 775                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 776                 hdsp_write (hdsp, HDSP_fifoData, 0);
 777
 778                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT)) {
 779                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
 780                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 781                         if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT))
 782                                 hdsp->io_type = RPM;
 783                         else
 784                                 hdsp->io_type = Multiface;
 785                 } else {
 786                         hdsp->io_type = Digiface;
 787                 }
 788         } else {
 789                 /* firmware was already loaded, get iobox type */
 790                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
 791                         hdsp->io_type = RPM;
 792                 else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 793                         hdsp->io_type = Multiface;
 794                 else
 795                         hdsp->io_type = Digiface;
 796         }
 797         return 0;
 798 }
 799
 800
 801 #ifdef HDSP_FW_LOADER
 802 static int hdsp_request_fw_loader(struct hdsp *hdsp);
 803 #endif
 804
 805 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 806 {
 807         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 808                 return 0;
 809         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 810                 hdsp->state &= ~HDSP_FirmwareLoaded;
 811                 if (! load_on_demand)
 812                         return -EIO;
 813                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 814                 /* try to load firmware */
 815                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 816 #ifdef HDSP_FW_LOADER
 817                         if (! hdsp_request_fw_loader(hdsp))
 818                                 return 0;
 819 #endif
 820                         snd_printk(KERN_ERR
 821                                    "Hammerfall-DSP: No firmware loaded nor "
 822                                    "cached, please upload firmware.\n");
 823                         return -EIO;
 824                 }
 825                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 826                         snd_printk(KERN_ERR
 827                                    "Hammerfall-DSP: Firmware loading from "
 828                                    "cache failed, please upload manually.\n");
 829                         return -EIO;
 830                 }
 831         }
 832         return 0;
 833 }
 834
 835
 836 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 837 {
 838         int i;
 839
 840         /* the fifoStatus registers reports on how many words
 841            are available in the command FIFO.
 842         */
 843
 844         for (i = 0; i < timeout; i++) {
 845
 846                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 847                         return 0;
 848
 849                 /* not very friendly, but we only do this during a firmware
 850                    load and changing the mixer, so we just put up with it.
 851                 */
 852
 853                 udelay (100);
 854         }
 855
 856         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 857                     count, timeout);
 858         return -1;
 859 }
 860
 861 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 862 {
 863         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 864                 return 0;
 865
 866         return hdsp->mixer_matrix[addr];
 867 }
 868
 869 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 870 {
 871         unsigned int ad;
 872
 873         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 874                 return -1;
 875
 876         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 877
 878                 /* from martin bjornsen:
 879
 880                    "You can only write dwords to the
 881                    mixer memory which contain two
 882                    mixer values in the low and high
 883                    word. So if you want to change
 884                    value 0 you have to read value 1
 885                    from the cache and write both to
 886                    the first dword in the mixer
 887                    memory."
 888                 */
 889
 890                 if (hdsp->io_type == H9632 && addr >= 512)
 891                         return 0;
 892
 893                 if (hdsp->io_type == H9652 && addr >= 1352)
 894                         return 0;
 895
 896                 hdsp->mixer_matrix[addr] = data;
 897
 898
 899                 /* `addr' addresses a 16-bit wide address, but
 900                    the address space accessed via hdsp_write
 901                    uses byte offsets. put another way, addr
 902                    varies from 0 to 1351, but to access the
 903                    corresponding memory location, we need
 904                    to access 0 to 2703 ...
 905                 */
 906                 ad = addr/2;
 907
 908                 hdsp_write (hdsp, 4096 + (ad*4),
 909                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 910                             hdsp->mixer_matrix[addr&0x7fe]);
 911
 912                 return 0;
 913
 914         } else {
 915
 916                 ad = (addr << 16) + data;
 917
 918                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 919                         return -1;
 920
 921                 hdsp_write (hdsp, HDSP_fifoData, ad);
 922                 hdsp->mixer_matrix[addr] = data;
 923
 924         }
 925
 926         return 0;
 927 }
 928
 929 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 930 {
 931         unsigned long flags;
 932         int ret = 1;
 933
 934         spin_lock_irqsave(&hdsp->lock, flags);
 935         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 936             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 937                 ret = 0;
 938         spin_unlock_irqrestore(&hdsp->lock, flags);
 939         return ret;
 940 }
 941
 942 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 943 {
 944         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 945         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 946
 947         /* For the 9632, the mask is different */
 948         if (hdsp->io_type == H9632)
 949                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
 950
 951         if (status & HDSP_SPDIFErrorFlag)
 952                 return 0;
 953
 954         switch (rate_bits) {
 955         case HDSP_spdifFrequency32KHz: return 32000;
 956         case HDSP_spdifFrequency44_1KHz: return 44100;
 957         case HDSP_spdifFrequency48KHz: return 48000;
 958         case HDSP_spdifFrequency64KHz: return 64000;
 959         case HDSP_spdifFrequency88_2KHz: return 88200;
 960         case HDSP_spdifFrequency96KHz: return 96000;
 961         case HDSP_spdifFrequency128KHz:
 962                 if (hdsp->io_type == H9632) return 128000;
 963                 break;
 964         case HDSP_spdifFrequency176_4KHz:
 965                 if (hdsp->io_type == H9632) return 176400;
 966                 break;
 967         case HDSP_spdifFrequency192KHz:
 968                 if (hdsp->io_type == H9632) return 192000;
 969                 break;
 970         default:
 971                 break;
 972         }
 973         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
 974         return 0;
 975 }
 976
 977 static int hdsp_external_sample_rate(struct hdsp *hdsp)
 978 {
 979         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
 980         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
 981
 982         /* For the 9632 card, there seems to be no bit for indicating external
 983          * sample rate greater than 96kHz. The card reports the corresponding
 984          * single speed. So the best means seems to get spdif rate when
 985          * autosync reference is spdif */
 986         if (hdsp->io_type == H9632 &&
 987             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
 988                  return hdsp_spdif_sample_rate(hdsp);
 989
 990         switch (rate_bits) {
 991         case HDSP_systemFrequency32:   return 32000;
 992         case HDSP_systemFrequency44_1: return 44100;
 993         case HDSP_systemFrequency48:   return 48000;
 994         case HDSP_systemFrequency64:   return 64000;
 995         case HDSP_systemFrequency88_2: return 88200;
 996         case HDSP_systemFrequency96:   return 96000;
 997         default:
 998                 return 0;
 999         }
1000 }
1001
1002 static void hdsp_compute_period_size(struct hdsp *hdsp)
1003 {
1004         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
1005 }
1006
1007 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
1008 {
1009         int position;
1010
1011         position = hdsp_read(hdsp, HDSP_statusRegister);
1012
1013         if (!hdsp->precise_ptr)
1014                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
1015
1016         position &= HDSP_BufferPositionMask;
1017         position /= 4;
1018         position &= (hdsp->period_bytes/2) - 1;
1019         return position;
1020 }
1021
1022 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
1023 {
1024         hdsp_write (hdsp, HDSP_resetPointer, 0);
1025         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1026                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1027                  * requires (?) to write again DDS value after a reset pointer
1028                  * (at least, it works like this) */
1029                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1030 }
1031
1032 static void hdsp_start_audio(struct hdsp *s)
1033 {
1034         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1035         hdsp_write(s, HDSP_controlRegister, s->control_register);
1036 }
1037
1038 static void hdsp_stop_audio(struct hdsp *s)
1039 {
1040         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1041         hdsp_write(s, HDSP_controlRegister, s->control_register);
1042 }
1043
1044 static void hdsp_silence_playback(struct hdsp *hdsp)
1045 {
1046         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1047 }
1048
1049 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1050 {
1051         int n;
1052
1053         spin_lock_irq(&s->lock);
1054
1055         frames >>= 7;
1056         n = 0;
1057         while (frames) {
1058                 n++;
1059                 frames >>= 1;
1060         }
1061
1062         s->control_register &= ~HDSP_LatencyMask;
1063         s->control_register |= hdsp_encode_latency(n);
1064
1065         hdsp_write(s, HDSP_controlRegister, s->control_register);
1066
1067         hdsp_compute_period_size(s);
1068
1069         spin_unlock_irq(&s->lock);
1070
1071         return 0;
1072 }
1073
1074 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1075 {
1076         u64 n;
1077
1078         if (rate >= 112000)
1079                 rate /= 4;
1080         else if (rate >= 56000)
1081                 rate /= 2;
1082
1083         n = DDS_NUMERATOR;
1084         n = div_u64(n, rate);
1085         /* n should be less than 2^32 for being written to FREQ register */
1086         snd_BUG_ON(n >> 32);
1087         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1088            value to write it after a reset */
1089         hdsp->dds_value = n;
1090         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1091 }
1092
1093 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1094 {
1095         int reject_if_open = 0;
1096         int current_rate;
1097         int rate_bits;
1098
1099         /* ASSUMPTION: hdsp->lock is either held, or
1100            there is no need for it (e.g. during module
1101            initialization).
1102         */
1103
1104         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1105                 if (called_internally) {
1106                         /* request from ctl or card initialization */
1107                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1108                         return -1;
1109                 } else {
1110                         /* hw_param request while in AutoSync mode */
1111                         int external_freq = hdsp_external_sample_rate(hdsp);
1112                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1113
1114                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1115                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1116                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1117                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1118                         else if (rate != external_freq) {
1119                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1120                                 return -1;
1121                         }
1122                 }
1123         }
1124
1125         current_rate = hdsp->system_sample_rate;
1126
1127         /* Changing from a "single speed" to a "double speed" rate is
1128            not allowed if any substreams are open. This is because
1129            such a change causes a shift in the location of
1130            the DMA buffers and a reduction in the number of available
1131            buffers.
1132
1133            Note that a similar but essentially insoluble problem
1134            exists for externally-driven rate changes. All we can do
1135            is to flag rate changes in the read/write routines.  */
1136
1137         if (rate > 96000 && hdsp->io_type != H9632)
1138                 return -EINVAL;
1139
1140         switch (rate) {
1141         case 32000:
1142                 if (current_rate > 48000)
1143                         reject_if_open = 1;
1144                 rate_bits = HDSP_Frequency32KHz;
1145                 break;
1146         case 44100:
1147                 if (current_rate > 48000)
1148                         reject_if_open = 1;
1149                 rate_bits = HDSP_Frequency44_1KHz;
1150                 break;
1151         case 48000:
1152                 if (current_rate > 48000)
1153                         reject_if_open = 1;
1154                 rate_bits = HDSP_Frequency48KHz;
1155                 break;
1156         case 64000:
1157                 if (current_rate <= 48000 || current_rate > 96000)
1158                         reject_if_open = 1;
1159                 rate_bits = HDSP_Frequency64KHz;
1160                 break;
1161         case 88200:
1162                 if (current_rate <= 48000 || current_rate > 96000)
1163                         reject_if_open = 1;
1164                 rate_bits = HDSP_Frequency88_2KHz;
1165                 break;
1166         case 96000:
1167                 if (current_rate <= 48000 || current_rate > 96000)
1168                         reject_if_open = 1;
1169                 rate_bits = HDSP_Frequency96KHz;
1170                 break;
1171         case 128000:
1172                 if (current_rate < 128000)
1173                         reject_if_open = 1;
1174                 rate_bits = HDSP_Frequency128KHz;
1175                 break;
1176         case 176400:
1177                 if (current_rate < 128000)
1178                         reject_if_open = 1;
1179                 rate_bits = HDSP_Frequency176_4KHz;
1180                 break;
1181         case 192000:
1182                 if (current_rate < 128000)
1183                         reject_if_open = 1;
1184                 rate_bits = HDSP_Frequency192KHz;
1185                 break;
1186         default:
1187                 return -EINVAL;
1188         }
1189
1190         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1191                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1192                             hdsp->capture_pid,
1193                             hdsp->playback_pid);
1194                 return -EBUSY;
1195         }
1196
1197         hdsp->control_register &= ~HDSP_FrequencyMask;
1198         hdsp->control_register |= rate_bits;
1199         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1200
1201         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1202         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1203                 hdsp_set_dds_value(hdsp, rate);
1204
1205         if (rate >= 128000) {
1206                 hdsp->channel_map = channel_map_H9632_qs;
1207         } else if (rate > 48000) {
1208                 if (hdsp->io_type == H9632)
1209                         hdsp->channel_map = channel_map_H9632_ds;
1210                 else
1211                         hdsp->channel_map = channel_map_ds;
1212         } else {
1213                 switch (hdsp->io_type) {
1214                 case RPM:
1215                 case Multiface:
1216                         hdsp->channel_map = channel_map_mf_ss;
1217                         break;
1218                 case Digiface:
1219                 case H9652:
1220                         hdsp->channel_map = channel_map_df_ss;
1221                         break;
1222                 case H9632:
1223                         hdsp->channel_map = channel_map_H9632_ss;
1224                         break;
1225                 default:
1226                         /* should never happen */
1227                         break;
1228                 }
1229         }
1230
1231         hdsp->system_sample_rate = rate;
1232
1233         return 0;
1234 }
1235
1236 /*----------------------------------------------------------------------------
1237    MIDI
1238   ----------------------------------------------------------------------------*/
1239
1240 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1241 {
1242         /* the hardware already does the relevant bit-mask with 0xff */
1243         if (id)
1244                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1245         else
1246                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1247 }
1248
1249 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1250 {
1251         /* the hardware already does the relevant bit-mask with 0xff */
1252         if (id)
1253                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1254         else
1255                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1256 }
1257
1258 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1259 {
1260         if (id)
1261                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1262         else
1263                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1264 }
1265
1266 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1267 {
1268         int fifo_bytes_used;
1269
1270         if (id)
1271                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1272         else
1273                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1274
1275         if (fifo_bytes_used < 128)
1276                 return  128 - fifo_bytes_used;
1277         else
1278                 return 0;
1279 }
1280
1281 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1282 {
1283         while (snd_hdsp_midi_input_available (hdsp, id))
1284                 snd_hdsp_midi_read_byte (hdsp, id);
1285 }
1286
1287 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1288 {
1289         unsigned long flags;
1290         int n_pending;
1291         int to_write;
1292         int i;
1293         unsigned char buf[128];
1294
1295         /* Output is not interrupt driven */
1296
1297         spin_lock_irqsave (&hmidi->lock, flags);
1298         if (hmidi->output) {
1299                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1300                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1301                                 if (n_pending > (int)sizeof (buf))
1302                                         n_pending = sizeof (buf);
1303
1304                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1305                                         for (i = 0; i < to_write; ++i)
1306                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1307                                 }
1308                         }
1309                 }
1310         }
1311         spin_unlock_irqrestore (&hmidi->lock, flags);
1312         return 0;
1313 }
1314
1315 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1316 {
1317         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1318         unsigned long flags;
1319         int n_pending;
1320         int i;
1321
1322         spin_lock_irqsave (&hmidi->lock, flags);
1323         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1324                 if (hmidi->input) {
1325                         if (n_pending > (int)sizeof (buf))
1326                                 n_pending = sizeof (buf);
1327                         for (i = 0; i < n_pending; ++i)
1328                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1329                         if (n_pending)
1330                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1331                 } else {
1332                         /* flush the MIDI input FIFO */
1333                         while (--n_pending)
1334                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1335                 }
1336         }
1337         hmidi->pending = 0;
1338         if (hmidi->id)
1339                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1340         else
1341                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1342         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1343         spin_unlock_irqrestore (&hmidi->lock, flags);
1344         return snd_hdsp_midi_output_write (hmidi);
1345 }
1346
1347 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1348 {
1349         struct hdsp *hdsp;
1350         struct hdsp_midi *hmidi;
1351         unsigned long flags;
1352         u32 ie;
1353
1354         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1355         hdsp = hmidi->hdsp;
1356         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1357         spin_lock_irqsave (&hdsp->lock, flags);
1358         if (up) {
1359                 if (!(hdsp->control_register & ie)) {
1360                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1361                         hdsp->control_register |= ie;
1362                 }
1363         } else {
1364                 hdsp->control_register &= ~ie;
1365                 tasklet_kill(&hdsp->midi_tasklet);
1366         }
1367
1368         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1369         spin_unlock_irqrestore (&hdsp->lock, flags);
1370 }
1371
1372 static void snd_hdsp_midi_output_timer(unsigned long data)
1373 {
1374         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1375         unsigned long flags;
1376
1377         snd_hdsp_midi_output_write(hmidi);
1378         spin_lock_irqsave (&hmidi->lock, flags);
1379
1380         /* this does not bump hmidi->istimer, because the
1381            kernel automatically removed the timer when it
1382            expired, and we are now adding it back, thus
1383            leaving istimer wherever it was set before.
1384         */
1385
1386         if (hmidi->istimer) {
1387                 hmidi->timer.expires = 1 + jiffies;
1388                 add_timer(&hmidi->timer);
1389         }
1390
1391         spin_unlock_irqrestore (&hmidi->lock, flags);
1392 }
1393
1394 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1395 {
1396         struct hdsp_midi *hmidi;
1397         unsigned long flags;
1398
1399         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1400         spin_lock_irqsave (&hmidi->lock, flags);
1401         if (up) {
1402                 if (!hmidi->istimer) {
1403                         init_timer(&hmidi->timer);
1404                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1405                         hmidi->timer.data = (unsigned long) hmidi;
1406                         hmidi->timer.expires = 1 + jiffies;
1407                         add_timer(&hmidi->timer);
1408                         hmidi->istimer++;
1409                 }
1410         } else {
1411                 if (hmidi->istimer && --hmidi->istimer <= 0)
1412                         del_timer (&hmidi->timer);
1413         }
1414         spin_unlock_irqrestore (&hmidi->lock, flags);
1415         if (up)
1416                 snd_hdsp_midi_output_write(hmidi);
1417 }
1418
1419 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1420 {
1421         struct hdsp_midi *hmidi;
1422
1423         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1424         spin_lock_irq (&hmidi->lock);
1425         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1426         hmidi->input = substream;
1427         spin_unlock_irq (&hmidi->lock);
1428
1429         return 0;
1430 }
1431
1432 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1433 {
1434         struct hdsp_midi *hmidi;
1435
1436         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1437         spin_lock_irq (&hmidi->lock);
1438         hmidi->output = substream;
1439         spin_unlock_irq (&hmidi->lock);
1440
1441         return 0;
1442 }
1443
1444 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1445 {
1446         struct hdsp_midi *hmidi;
1447
1448         snd_hdsp_midi_input_trigger (substream, 0);
1449
1450         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1451         spin_lock_irq (&hmidi->lock);
1452         hmidi->input = NULL;
1453         spin_unlock_irq (&hmidi->lock);
1454
1455         return 0;
1456 }
1457
1458 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1459 {
1460         struct hdsp_midi *hmidi;
1461
1462         snd_hdsp_midi_output_trigger (substream, 0);
1463
1464         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1465         spin_lock_irq (&hmidi->lock);
1466         hmidi->output = NULL;
1467         spin_unlock_irq (&hmidi->lock);
1468
1469         return 0;
1470 }
1471
1472 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1473 {
1474         .open =         snd_hdsp_midi_output_open,
1475         .close =        snd_hdsp_midi_output_close,
1476         .trigger =      snd_hdsp_midi_output_trigger,
1477 };
1478
1479 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1480 {
1481         .open =         snd_hdsp_midi_input_open,
1482         .close =        snd_hdsp_midi_input_close,
1483         .trigger =      snd_hdsp_midi_input_trigger,
1484 };
1485
1486 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1487 {
1488         char buf[32];
1489
1490         hdsp->midi[id].id = id;
1491         hdsp->midi[id].rmidi = NULL;
1492         hdsp->midi[id].input = NULL;
1493         hdsp->midi[id].output = NULL;
1494         hdsp->midi[id].hdsp = hdsp;
1495         hdsp->midi[id].istimer = 0;
1496         hdsp->midi[id].pending = 0;
1497         spin_lock_init (&hdsp->midi[id].lock);
1498
1499         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1500         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1501                 return -1;
1502
1503         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1504         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1505
1506         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1507         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1508
1509         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1510                 SNDRV_RAWMIDI_INFO_INPUT |
1511                 SNDRV_RAWMIDI_INFO_DUPLEX;
1512
1513         return 0;
1514 }
1515
1516 /*-----------------------------------------------------------------------------
1517   Control Interface
1518   ----------------------------------------------------------------------------*/
1519
1520 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1521 {
1522         u32 val = 0;
1523         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1524         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1525         if (val & HDSP_SPDIFProfessional)
1526                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1527         else
1528                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1529         return val;
1530 }
1531
1532 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1533 {
1534         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1535                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1536         if (val & HDSP_SPDIFProfessional)
1537                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1538         else
1539                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1540 }
1541
1542 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1543 {
1544         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1545         uinfo->count = 1;
1546         return 0;
1547 }
1548
1549 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1550 {
1551         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1552
1553         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1554         return 0;
1555 }
1556
1557 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1558 {
1559         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1560         int change;
1561         u32 val;
1562
1563         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1564         spin_lock_irq(&hdsp->lock);
1565         change = val != hdsp->creg_spdif;
1566         hdsp->creg_spdif = val;
1567         spin_unlock_irq(&hdsp->lock);
1568         return change;
1569 }
1570
1571 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1572 {
1573         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1574         uinfo->count = 1;
1575         return 0;
1576 }
1577
1578 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1579 {
1580         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1581
1582         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1583         return 0;
1584 }
1585
1586 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1587 {
1588         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1589         int change;
1590         u32 val;
1591
1592         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1593         spin_lock_irq(&hdsp->lock);
1594         change = val != hdsp->creg_spdif_stream;
1595         hdsp->creg_spdif_stream = val;
1596         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1597         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1598         spin_unlock_irq(&hdsp->lock);
1599         return change;
1600 }
1601
1602 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1603 {
1604         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1605         uinfo->count = 1;
1606         return 0;
1607 }
1608
1609 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1610 {
1611         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1612         return 0;
1613 }
1614
1615 #define HDSP_SPDIF_IN(xname, xindex) \
1616 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1617   .name = xname, \
1618   .index = xindex, \
1619   .info = snd_hdsp_info_spdif_in, \
1620   .get = snd_hdsp_get_spdif_in, \
1621   .put = snd_hdsp_put_spdif_in }
1622
1623 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1624 {
1625         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1626 }
1627
1628 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1629 {
1630         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1631         hdsp->control_register |= hdsp_encode_spdif_in(in);
1632         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1633         return 0;
1634 }
1635
1636 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1637 {
1638         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1639         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1640
1641         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1642         uinfo->count = 1;
1643         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1644         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1645                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1646         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1647         return 0;
1648 }
1649
1650 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1651 {
1652         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1653
1654         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1655         return 0;
1656 }
1657
1658 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1659 {
1660         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1661         int change;
1662         unsigned int val;
1663
1664         if (!snd_hdsp_use_is_exclusive(hdsp))
1665                 return -EBUSY;
1666         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1667         spin_lock_irq(&hdsp->lock);
1668         change = val != hdsp_spdif_in(hdsp);
1669         if (change)
1670                 hdsp_set_spdif_input(hdsp, val);
1671         spin_unlock_irq(&hdsp->lock);
1672         return change;
1673 }
1674
1675 #define HDSP_SPDIF_OUT(xname, xindex) \
1676 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1677   .info = snd_hdsp_info_spdif_bits, \
1678   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1679
1680 static int hdsp_spdif_out(struct hdsp *hdsp)
1681 {
1682         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1683 }
1684
1685 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1686 {
1687         if (out)
1688                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1689         else
1690                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1691         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1692         return 0;
1693 }
1694
1695 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1696
1697 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1698 {
1699         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1700
1701         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1702         return 0;
1703 }
1704
1705 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1706 {
1707         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1708         int change;
1709         unsigned int val;
1710
1711         if (!snd_hdsp_use_is_exclusive(hdsp))
1712                 return -EBUSY;
1713         val = ucontrol->value.integer.value[0] & 1;
1714         spin_lock_irq(&hdsp->lock);
1715         change = (int)val != hdsp_spdif_out(hdsp);
1716         hdsp_set_spdif_output(hdsp, val);
1717         spin_unlock_irq(&hdsp->lock);
1718         return change;
1719 }
1720
1721 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1722 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1723   .info = snd_hdsp_info_spdif_bits, \
1724   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1725
1726 static int hdsp_spdif_professional(struct hdsp *hdsp)
1727 {
1728         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1729 }
1730
1731 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1732 {
1733         if (val)
1734                 hdsp->control_register |= HDSP_SPDIFProfessional;
1735         else
1736                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1737         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1738         return 0;
1739 }
1740
1741 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1742 {
1743         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1744
1745         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1746         return 0;
1747 }
1748
1749 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1750 {
1751         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1752         int change;
1753         unsigned int val;
1754
1755         if (!snd_hdsp_use_is_exclusive(hdsp))
1756                 return -EBUSY;
1757         val = ucontrol->value.integer.value[0] & 1;
1758         spin_lock_irq(&hdsp->lock);
1759         change = (int)val != hdsp_spdif_professional(hdsp);
1760         hdsp_set_spdif_professional(hdsp, val);
1761         spin_unlock_irq(&hdsp->lock);
1762         return change;
1763 }
1764
1765 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1766 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1767   .info = snd_hdsp_info_spdif_bits, \
1768   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1769
1770 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1771 {
1772         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1773 }
1774
1775 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1776 {
1777         if (val)
1778                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1779         else
1780                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1781         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1782         return 0;
1783 }
1784
1785 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1786 {
1787         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1788
1789         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1790         return 0;
1791 }
1792
1793 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1794 {
1795         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1796         int change;
1797         unsigned int val;
1798
1799         if (!snd_hdsp_use_is_exclusive(hdsp))
1800                 return -EBUSY;
1801         val = ucontrol->value.integer.value[0] & 1;
1802         spin_lock_irq(&hdsp->lock);
1803         change = (int)val != hdsp_spdif_emphasis(hdsp);
1804         hdsp_set_spdif_emphasis(hdsp, val);
1805         spin_unlock_irq(&hdsp->lock);
1806         return change;
1807 }
1808
1809 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1810 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1811   .info = snd_hdsp_info_spdif_bits, \
1812   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1813
1814 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1815 {
1816         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1817 }
1818
1819 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1820 {
1821         if (val)
1822                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1823         else
1824                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1825         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1826         return 0;
1827 }
1828
1829 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1830 {
1831         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1832
1833         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1834         return 0;
1835 }
1836
1837 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1838 {
1839         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1840         int change;
1841         unsigned int val;
1842
1843         if (!snd_hdsp_use_is_exclusive(hdsp))
1844                 return -EBUSY;
1845         val = ucontrol->value.integer.value[0] & 1;
1846         spin_lock_irq(&hdsp->lock);
1847         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1848         hdsp_set_spdif_nonaudio(hdsp, val);
1849         spin_unlock_irq(&hdsp->lock);
1850         return change;
1851 }
1852
1853 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1854 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1855   .name = xname, \
1856   .index = xindex, \
1857   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1858   .info = snd_hdsp_info_spdif_sample_rate, \
1859   .get = snd_hdsp_get_spdif_sample_rate \
1860 }
1861
1862 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1863 {
1864         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1865         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1866
1867         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1868         uinfo->count = 1;
1869         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1870         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1871                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1872         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1873         return 0;
1874 }
1875
1876 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1877 {
1878         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1879
1880         switch (hdsp_spdif_sample_rate(hdsp)) {
1881         case 32000:
1882                 ucontrol->value.enumerated.item[0] = 0;
1883                 break;
1884         case 44100:
1885                 ucontrol->value.enumerated.item[0] = 1;
1886                 break;
1887         case 48000:
1888                 ucontrol->value.enumerated.item[0] = 2;
1889                 break;
1890         case 64000:
1891                 ucontrol->value.enumerated.item[0] = 3;
1892                 break;
1893         case 88200:
1894                 ucontrol->value.enumerated.item[0] = 4;
1895                 break;
1896         case 96000:
1897                 ucontrol->value.enumerated.item[0] = 5;
1898                 break;
1899         case 128000:
1900                 ucontrol->value.enumerated.item[0] = 7;
1901                 break;
1902         case 176400:
1903                 ucontrol->value.enumerated.item[0] = 8;
1904                 break;
1905         case 192000:
1906                 ucontrol->value.enumerated.item[0] = 9;
1907                 break;
1908         default:
1909                 ucontrol->value.enumerated.item[0] = 6;
1910         }
1911         return 0;
1912 }
1913
1914 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1915 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1916   .name = xname, \
1917   .index = xindex, \
1918   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1919   .info = snd_hdsp_info_system_sample_rate, \
1920   .get = snd_hdsp_get_system_sample_rate \
1921 }
1922
1923 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1924 {
1925         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1926         uinfo->count = 1;
1927         return 0;
1928 }
1929
1930 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1931 {
1932         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1933
1934         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1935         return 0;
1936 }
1937
1938 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1939 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1940   .name = xname, \
1941   .index = xindex, \
1942   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1943   .info = snd_hdsp_info_autosync_sample_rate, \
1944   .get = snd_hdsp_get_autosync_sample_rate \
1945 }
1946
1947 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1948 {
1949         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1950         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1951         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1952         uinfo->count = 1;
1953         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1954         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1955                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1956         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1957         return 0;
1958 }
1959
1960 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1961 {
1962         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1963
1964         switch (hdsp_external_sample_rate(hdsp)) {
1965         case 32000:
1966                 ucontrol->value.enumerated.item[0] = 0;
1967                 break;
1968         case 44100:
1969                 ucontrol->value.enumerated.item[0] = 1;
1970                 break;
1971         case 48000:
1972                 ucontrol->value.enumerated.item[0] = 2;
1973                 break;
1974         case 64000:
1975                 ucontrol->value.enumerated.item[0] = 3;
1976                 break;
1977         case 88200:
1978                 ucontrol->value.enumerated.item[0] = 4;
1979                 break;
1980         case 96000:
1981                 ucontrol->value.enumerated.item[0] = 5;
1982                 break;
1983         case 128000:
1984                 ucontrol->value.enumerated.item[0] = 7;
1985                 break;
1986         case 176400:
1987                 ucontrol->value.enumerated.item[0] = 8;
1988                 break;
1989         case 192000:
1990                 ucontrol->value.enumerated.item[0] = 9;
1991                 break;
1992         default:
1993                 ucontrol->value.enumerated.item[0] = 6;
1994         }
1995         return 0;
1996 }
1997
1998 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1999 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2000   .name = xname, \
2001   .index = xindex, \
2002   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2003   .info = snd_hdsp_info_system_clock_mode, \
2004   .get = snd_hdsp_get_system_clock_mode \
2005 }
2006
2007 static int hdsp_system_clock_mode(struct hdsp *hdsp)
2008 {
2009         if (hdsp->control_register & HDSP_ClockModeMaster)
2010                 return 0;
2011         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
2012                         return 0;
2013         return 1;
2014 }
2015
2016 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2017 {
2018         static char *texts[] = {"Master", "Slave" };
2019
2020         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2021         uinfo->count = 1;
2022         uinfo->value.enumerated.items = 2;
2023         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2024                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2025         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2026         return 0;
2027 }
2028
2029 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2030 {
2031         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2032
2033         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2034         return 0;
2035 }
2036
2037 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2038 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2039   .name = xname, \
2040   .index = xindex, \
2041   .info = snd_hdsp_info_clock_source, \
2042   .get = snd_hdsp_get_clock_source, \
2043   .put = snd_hdsp_put_clock_source \
2044 }
2045
2046 static int hdsp_clock_source(struct hdsp *hdsp)
2047 {
2048         if (hdsp->control_register & HDSP_ClockModeMaster) {
2049                 switch (hdsp->system_sample_rate) {
2050                 case 32000:
2051                         return 1;
2052                 case 44100:
2053                         return 2;
2054                 case 48000:
2055                         return 3;
2056                 case 64000:
2057                         return 4;
2058                 case 88200:
2059                         return 5;
2060                 case 96000:
2061                         return 6;
2062                 case 128000:
2063                         return 7;
2064                 case 176400:
2065                         return 8;
2066                 case 192000:
2067                         return 9;
2068                 default:
2069                         return 3;
2070                 }
2071         } else {
2072                 return 0;
2073         }
2074 }
2075
2076 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2077 {
2078         int rate;
2079         switch (mode) {
2080         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2081                 if (hdsp_external_sample_rate(hdsp) != 0) {
2082                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2083                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2084                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2085                         return 0;
2086                     }
2087                 }
2088                 return -1;
2089         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2090                 rate = 32000;
2091                 break;
2092         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2093                 rate = 44100;
2094                 break;
2095         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2096                 rate = 48000;
2097                 break;
2098         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2099                 rate = 64000;
2100                 break;
2101         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2102                 rate = 88200;
2103                 break;
2104         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2105                 rate = 96000;
2106                 break;
2107         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2108                 rate = 128000;
2109                 break;
2110         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2111                 rate = 176400;
2112                 break;
2113         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2114                 rate = 192000;
2115                 break;
2116         default:
2117                 rate = 48000;
2118         }
2119         hdsp->control_register |= HDSP_ClockModeMaster;
2120         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2121         hdsp_set_rate(hdsp, rate, 1);
2122         return 0;
2123 }
2124
2125 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2126 {
2127         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2128         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2129
2130         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2131         uinfo->count = 1;
2132         if (hdsp->io_type == H9632)
2133             uinfo->value.enumerated.items = 10;
2134         else
2135             uinfo->value.enumerated.items = 7;
2136         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2137                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2138         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2139         return 0;
2140 }
2141
2142 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2143 {
2144         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2145
2146         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2147         return 0;
2148 }
2149
2150 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2151 {
2152         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2153         int change;
2154         int val;
2155
2156         if (!snd_hdsp_use_is_exclusive(hdsp))
2157                 return -EBUSY;
2158         val = ucontrol->value.enumerated.item[0];
2159         if (val < 0) val = 0;
2160         if (hdsp->io_type == H9632) {
2161                 if (val > 9)
2162                         val = 9;
2163         } else {
2164                 if (val > 6)
2165                         val = 6;
2166         }
2167         spin_lock_irq(&hdsp->lock);
2168         if (val != hdsp_clock_source(hdsp))
2169                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2170         else
2171                 change = 0;
2172         spin_unlock_irq(&hdsp->lock);
2173         return change;
2174 }
2175
2176 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2177
2178 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2179 {
2180         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2181
2182         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2183         return 0;
2184 }
2185
2186 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2187 {
2188         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2189         int change;
2190
2191         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2192         if (change)
2193                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2194         return change;
2195 }
2196
2197 #define HDSP_DA_GAIN(xname, xindex) \
2198 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2199   .name = xname, \
2200   .index = xindex, \
2201   .info = snd_hdsp_info_da_gain, \
2202   .get = snd_hdsp_get_da_gain, \
2203   .put = snd_hdsp_put_da_gain \
2204 }
2205
2206 static int hdsp_da_gain(struct hdsp *hdsp)
2207 {
2208         switch (hdsp->control_register & HDSP_DAGainMask) {
2209         case HDSP_DAGainHighGain:
2210                 return 0;
2211         case HDSP_DAGainPlus4dBu:
2212                 return 1;
2213         case HDSP_DAGainMinus10dBV:
2214                 return 2;
2215         default:
2216                 return 1;
2217         }
2218 }
2219
2220 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2221 {
2222         hdsp->control_register &= ~HDSP_DAGainMask;
2223         switch (mode) {
2224         case 0:
2225                 hdsp->control_register |= HDSP_DAGainHighGain;
2226                 break;
2227         case 1:
2228                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2229                 break;
2230         case 2:
2231                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2232                 break;
2233         default:
2234                 return -1;
2235
2236         }
2237         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2238         return 0;
2239 }
2240
2241 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2242 {
2243         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2244
2245         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2246         uinfo->count = 1;
2247         uinfo->value.enumerated.items = 3;
2248         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2249                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2250         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2251         return 0;
2252 }
2253
2254 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2255 {
2256         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2257
2258         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2259         return 0;
2260 }
2261
2262 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2263 {
2264         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2265         int change;
2266         int val;
2267
2268         if (!snd_hdsp_use_is_exclusive(hdsp))
2269                 return -EBUSY;
2270         val = ucontrol->value.enumerated.item[0];
2271         if (val < 0) val = 0;
2272         if (val > 2) val = 2;
2273         spin_lock_irq(&hdsp->lock);
2274         if (val != hdsp_da_gain(hdsp))
2275                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2276         else
2277                 change = 0;
2278         spin_unlock_irq(&hdsp->lock);
2279         return change;
2280 }
2281
2282 #define HDSP_AD_GAIN(xname, xindex) \
2283 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2284   .name = xname, \
2285   .index = xindex, \
2286   .info = snd_hdsp_info_ad_gain, \
2287   .get = snd_hdsp_get_ad_gain, \
2288   .put = snd_hdsp_put_ad_gain \
2289 }
2290
2291 static int hdsp_ad_gain(struct hdsp *hdsp)
2292 {
2293         switch (hdsp->control_register & HDSP_ADGainMask) {
2294         case HDSP_ADGainMinus10dBV:
2295                 return 0;
2296         case HDSP_ADGainPlus4dBu:
2297                 return 1;
2298         case HDSP_ADGainLowGain:
2299                 return 2;
2300         default:
2301                 return 1;
2302         }
2303 }
2304
2305 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2306 {
2307         hdsp->control_register &= ~HDSP_ADGainMask;
2308         switch (mode) {
2309         case 0:
2310                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2311                 break;
2312         case 1:
2313                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2314                 break;
2315         case 2:
2316                 hdsp->control_register |= HDSP_ADGainLowGain;
2317                 break;
2318         default:
2319                 return -1;
2320
2321         }
2322         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2323         return 0;
2324 }
2325
2326 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2327 {
2328         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2329
2330         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2331         uinfo->count = 1;
2332         uinfo->value.enumerated.items = 3;
2333         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2334                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2335         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2336         return 0;
2337 }
2338
2339 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2340 {
2341         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2342
2343         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2344         return 0;
2345 }
2346
2347 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2348 {
2349         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2350         int change;
2351         int val;
2352
2353         if (!snd_hdsp_use_is_exclusive(hdsp))
2354                 return -EBUSY;
2355         val = ucontrol->value.enumerated.item[0];
2356         if (val < 0) val = 0;
2357         if (val > 2) val = 2;
2358         spin_lock_irq(&hdsp->lock);
2359         if (val != hdsp_ad_gain(hdsp))
2360                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2361         else
2362                 change = 0;
2363         spin_unlock_irq(&hdsp->lock);
2364         return change;
2365 }
2366
2367 #define HDSP_PHONE_GAIN(xname, xindex) \
2368 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2369   .name = xname, \
2370   .index = xindex, \
2371   .info = snd_hdsp_info_phone_gain, \
2372   .get = snd_hdsp_get_phone_gain, \
2373   .put = snd_hdsp_put_phone_gain \
2374 }
2375
2376 static int hdsp_phone_gain(struct hdsp *hdsp)
2377 {
2378         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2379         case HDSP_PhoneGain0dB:
2380                 return 0;
2381         case HDSP_PhoneGainMinus6dB:
2382                 return 1;
2383         case HDSP_PhoneGainMinus12dB:
2384                 return 2;
2385         default:
2386                 return 0;
2387         }
2388 }
2389
2390 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2391 {
2392         hdsp->control_register &= ~HDSP_PhoneGainMask;
2393         switch (mode) {
2394         case 0:
2395                 hdsp->control_register |= HDSP_PhoneGain0dB;
2396                 break;
2397         case 1:
2398                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2399                 break;
2400         case 2:
2401                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2402                 break;
2403         default:
2404                 return -1;
2405
2406         }
2407         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2408         return 0;
2409 }
2410
2411 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2412 {
2413         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2414
2415         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2416         uinfo->count = 1;
2417         uinfo->value.enumerated.items = 3;
2418         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2419                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2420         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2421         return 0;
2422 }
2423
2424 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2425 {
2426         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2427
2428         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2429         return 0;
2430 }
2431
2432 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2433 {
2434         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2435         int change;
2436         int val;
2437
2438         if (!snd_hdsp_use_is_exclusive(hdsp))
2439                 return -EBUSY;
2440         val = ucontrol->value.enumerated.item[0];
2441         if (val < 0) val = 0;
2442         if (val > 2) val = 2;
2443         spin_lock_irq(&hdsp->lock);
2444         if (val != hdsp_phone_gain(hdsp))
2445                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2446         else
2447                 change = 0;
2448         spin_unlock_irq(&hdsp->lock);
2449         return change;
2450 }
2451
2452 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2453 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2454   .name = xname, \
2455   .index = xindex, \
2456   .info = snd_hdsp_info_xlr_breakout_cable, \
2457   .get = snd_hdsp_get_xlr_breakout_cable, \
2458   .put = snd_hdsp_put_xlr_breakout_cable \
2459 }
2460
2461 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2462 {
2463         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2464                 return 1;
2465         return 0;
2466 }
2467
2468 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2469 {
2470         if (mode)
2471                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2472         else
2473                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2474         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2475         return 0;
2476 }
2477
2478 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2479
2480 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2481 {
2482         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2483
2484         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2485         return 0;
2486 }
2487
2488 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2489 {
2490         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2491         int change;
2492         int val;
2493
2494         if (!snd_hdsp_use_is_exclusive(hdsp))
2495                 return -EBUSY;
2496         val = ucontrol->value.integer.value[0] & 1;
2497         spin_lock_irq(&hdsp->lock);
2498         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2499         hdsp_set_xlr_breakout_cable(hdsp, val);
2500         spin_unlock_irq(&hdsp->lock);
2501         return change;
2502 }
2503
2504 /* (De)activates old RME Analog Extension Board
2505    These are connected to the internal ADAT connector
2506    Switching this on desactivates external ADAT
2507 */
2508 #define HDSP_AEB(xname, xindex) \
2509 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2510   .name = xname, \
2511   .index = xindex, \
2512   .info = snd_hdsp_info_aeb, \
2513   .get = snd_hdsp_get_aeb, \
2514   .put = snd_hdsp_put_aeb \
2515 }
2516
2517 static int hdsp_aeb(struct hdsp *hdsp)
2518 {
2519         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2520                 return 1;
2521         return 0;
2522 }
2523
2524 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2525 {
2526         if (mode)
2527                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2528         else
2529                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2530         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2531         return 0;
2532 }
2533
2534 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2535
2536 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2537 {
2538         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2539
2540         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2541         return 0;
2542 }
2543
2544 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2545 {
2546         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2547         int change;
2548         int val;
2549
2550         if (!snd_hdsp_use_is_exclusive(hdsp))
2551                 return -EBUSY;
2552         val = ucontrol->value.integer.value[0] & 1;
2553         spin_lock_irq(&hdsp->lock);
2554         change = (int)val != hdsp_aeb(hdsp);
2555         hdsp_set_aeb(hdsp, val);
2556         spin_unlock_irq(&hdsp->lock);
2557         return change;
2558 }
2559
2560 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2561 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2562   .name = xname, \
2563   .index = xindex, \
2564   .info = snd_hdsp_info_pref_sync_ref, \
2565   .get = snd_hdsp_get_pref_sync_ref, \
2566   .put = snd_hdsp_put_pref_sync_ref \
2567 }
2568
2569 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2570 {
2571         /* Notice that this looks at the requested sync source,
2572            not the one actually in use.
2573         */
2574
2575         switch (hdsp->control_register & HDSP_SyncRefMask) {
2576         case HDSP_SyncRef_ADAT1:
2577                 return HDSP_SYNC_FROM_ADAT1;
2578         case HDSP_SyncRef_ADAT2:
2579                 return HDSP_SYNC_FROM_ADAT2;
2580         case HDSP_SyncRef_ADAT3:
2581                 return HDSP_SYNC_FROM_ADAT3;
2582         case HDSP_SyncRef_SPDIF:
2583                 return HDSP_SYNC_FROM_SPDIF;
2584         case HDSP_SyncRef_WORD:
2585                 return HDSP_SYNC_FROM_WORD;
2586         case HDSP_SyncRef_ADAT_SYNC:
2587                 return HDSP_SYNC_FROM_ADAT_SYNC;
2588         default:
2589                 return HDSP_SYNC_FROM_WORD;
2590         }
2591         return 0;
2592 }
2593
2594 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2595 {
2596         hdsp->control_register &= ~HDSP_SyncRefMask;
2597         switch (pref) {
2598         case HDSP_SYNC_FROM_ADAT1:
2599                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2600                 break;
2601         case HDSP_SYNC_FROM_ADAT2:
2602                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2603                 break;
2604         case HDSP_SYNC_FROM_ADAT3:
2605                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2606                 break;
2607         case HDSP_SYNC_FROM_SPDIF:
2608                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2609                 break;
2610         case HDSP_SYNC_FROM_WORD:
2611                 hdsp->control_register |= HDSP_SyncRef_WORD;
2612                 break;
2613         case HDSP_SYNC_FROM_ADAT_SYNC:
2614                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2615                 break;
2616         default:
2617                 return -1;
2618         }
2619         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2620         return 0;
2621 }
2622
2623 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2624 {
2625         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2626         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2627
2628         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2629         uinfo->count = 1;
2630
2631         switch (hdsp->io_type) {
2632         case Digiface:
2633         case H9652:
2634                 uinfo->value.enumerated.items = 6;
2635                 break;
2636         case Multiface:
2637                 uinfo->value.enumerated.items = 4;
2638                 break;
2639         case H9632:
2640                 uinfo->value.enumerated.items = 3;
2641                 break;
2642         default:
2643                 return -EINVAL;
2644         }
2645
2646         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2647                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2648         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2649         return 0;
2650 }
2651
2652 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2653 {
2654         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2655
2656         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2657         return 0;
2658 }
2659
2660 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2661 {
2662         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2663         int change, max;
2664         unsigned int val;
2665
2666         if (!snd_hdsp_use_is_exclusive(hdsp))
2667                 return -EBUSY;
2668
2669         switch (hdsp->io_type) {
2670         case Digiface:
2671         case H9652:
2672                 max = 6;
2673                 break;
2674         case Multiface:
2675                 max = 4;
2676                 break;
2677         case H9632:
2678                 max = 3;
2679                 break;
2680         default:
2681                 return -EIO;
2682         }
2683
2684         val = ucontrol->value.enumerated.item[0] % max;
2685         spin_lock_irq(&hdsp->lock);
2686         change = (int)val != hdsp_pref_sync_ref(hdsp);
2687         hdsp_set_pref_sync_ref(hdsp, val);
2688         spin_unlock_irq(&hdsp->lock);
2689         return change;
2690 }
2691
2692 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2693 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2694   .name = xname, \
2695   .index = xindex, \
2696   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2697   .info = snd_hdsp_info_autosync_ref, \
2698   .get = snd_hdsp_get_autosync_ref, \
2699 }
2700
2701 static int hdsp_autosync_ref(struct hdsp *hdsp)
2702 {
2703         /* This looks at the autosync selected sync reference */
2704         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2705
2706         switch (status2 & HDSP_SelSyncRefMask) {
2707         case HDSP_SelSyncRef_WORD:
2708                 return HDSP_AUTOSYNC_FROM_WORD;
2709         case HDSP_SelSyncRef_ADAT_SYNC:
2710                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2711         case HDSP_SelSyncRef_SPDIF:
2712                 return HDSP_AUTOSYNC_FROM_SPDIF;
2713         case HDSP_SelSyncRefMask:
2714                 return HDSP_AUTOSYNC_FROM_NONE;
2715         case HDSP_SelSyncRef_ADAT1:
2716                 return HDSP_AUTOSYNC_FROM_ADAT1;
2717         case HDSP_SelSyncRef_ADAT2:
2718                 return HDSP_AUTOSYNC_FROM_ADAT2;
2719         case HDSP_SelSyncRef_ADAT3:
2720                 return HDSP_AUTOSYNC_FROM_ADAT3;
2721         default:
2722                 return HDSP_AUTOSYNC_FROM_WORD;
2723         }
2724         return 0;
2725 }
2726
2727 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2728 {
2729         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2730
2731         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2732         uinfo->count = 1;
2733         uinfo->value.enumerated.items = 7;
2734         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2735                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2736         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2737         return 0;
2738 }
2739
2740 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2741 {
2742         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2743
2744         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2745         return 0;
2746 }
2747
2748 #define HDSP_LINE_OUT(xname, xindex) \
2749 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2750   .name = xname, \
2751   .index = xindex, \
2752   .info = snd_hdsp_info_line_out, \
2753   .get = snd_hdsp_get_line_out, \
2754   .put = snd_hdsp_put_line_out \
2755 }
2756
2757 static int hdsp_line_out(struct hdsp *hdsp)
2758 {
2759         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2760 }
2761
2762 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2763 {
2764         if (out)
2765                 hdsp->control_register |= HDSP_LineOut;
2766         else
2767                 hdsp->control_register &= ~HDSP_LineOut;
2768         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2769         return 0;
2770 }
2771
2772 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2773
2774 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2775 {
2776         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2777
2778         spin_lock_irq(&hdsp->lock);
2779         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2780         spin_unlock_irq(&hdsp->lock);
2781         return 0;
2782 }
2783
2784 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2785 {
2786         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2787         int change;
2788         unsigned int val;
2789
2790         if (!snd_hdsp_use_is_exclusive(hdsp))
2791                 return -EBUSY;
2792         val = ucontrol->value.integer.value[0] & 1;
2793         spin_lock_irq(&hdsp->lock);
2794         change = (int)val != hdsp_line_out(hdsp);
2795         hdsp_set_line_output(hdsp, val);
2796         spin_unlock_irq(&hdsp->lock);
2797         return change;
2798 }
2799
2800 #define HDSP_PRECISE_POINTER(xname, xindex) \
2801 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2802   .name = xname, \
2803   .index = xindex, \
2804   .info = snd_hdsp_info_precise_pointer, \
2805   .get = snd_hdsp_get_precise_pointer, \
2806   .put = snd_hdsp_put_precise_pointer \
2807 }
2808
2809 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2810 {
2811         if (precise)
2812                 hdsp->precise_ptr = 1;
2813         else
2814                 hdsp->precise_ptr = 0;
2815         return 0;
2816 }
2817
2818 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2819
2820 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2821 {
2822         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2823
2824         spin_lock_irq(&hdsp->lock);
2825         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2826         spin_unlock_irq(&hdsp->lock);
2827         return 0;
2828 }
2829
2830 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2831 {
2832         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2833         int change;
2834         unsigned int val;
2835
2836         if (!snd_hdsp_use_is_exclusive(hdsp))
2837                 return -EBUSY;
2838         val = ucontrol->value.integer.value[0] & 1;
2839         spin_lock_irq(&hdsp->lock);
2840         change = (int)val != hdsp->precise_ptr;
2841         hdsp_set_precise_pointer(hdsp, val);
2842         spin_unlock_irq(&hdsp->lock);
2843         return change;
2844 }
2845
2846 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2847 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2848   .name = xname, \
2849   .index = xindex, \
2850   .info = snd_hdsp_info_use_midi_tasklet, \
2851   .get = snd_hdsp_get_use_midi_tasklet, \
2852   .put = snd_hdsp_put_use_midi_tasklet \
2853 }
2854
2855 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2856 {
2857         if (use_tasklet)
2858                 hdsp->use_midi_tasklet = 1;
2859         else
2860                 hdsp->use_midi_tasklet = 0;
2861         return 0;
2862 }
2863
2864 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2865
2866 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2867 {
2868         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2869
2870         spin_lock_irq(&hdsp->lock);
2871         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2872         spin_unlock_irq(&hdsp->lock);
2873         return 0;
2874 }
2875
2876 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2877 {
2878         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2879         int change;
2880         unsigned int val;
2881
2882         if (!snd_hdsp_use_is_exclusive(hdsp))
2883                 return -EBUSY;
2884         val = ucontrol->value.integer.value[0] & 1;
2885         spin_lock_irq(&hdsp->lock);
2886         change = (int)val != hdsp->use_midi_tasklet;
2887         hdsp_set_use_midi_tasklet(hdsp, val);
2888         spin_unlock_irq(&hdsp->lock);
2889         return change;
2890 }
2891
2892 #define HDSP_MIXER(xname, xindex) \
2893 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2894   .name = xname, \
2895   .index = xindex, \
2896   .device = 0, \
2897   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2898                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2899   .info = snd_hdsp_info_mixer, \
2900   .get = snd_hdsp_get_mixer, \
2901   .put = snd_hdsp_put_mixer \
2902 }
2903
2904 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2905 {
2906         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2907         uinfo->count = 3;
2908         uinfo->value.integer.min = 0;
2909         uinfo->value.integer.max = 65536;
2910         uinfo->value.integer.step = 1;
2911         return 0;
2912 }
2913
2914 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2915 {
2916         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2917         int source;
2918         int destination;
2919         int addr;
2920
2921         source = ucontrol->value.integer.value[0];
2922         destination = ucontrol->value.integer.value[1];
2923
2924         if (source >= hdsp->max_channels)
2925                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2926         else
2927                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2928
2929         spin_lock_irq(&hdsp->lock);
2930         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2931         spin_unlock_irq(&hdsp->lock);
2932         return 0;
2933 }
2934
2935 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2936 {
2937         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2938         int change;
2939         int source;
2940         int destination;
2941         int gain;
2942         int addr;
2943
2944         if (!snd_hdsp_use_is_exclusive(hdsp))
2945                 return -EBUSY;
2946
2947         source = ucontrol->value.integer.value[0];
2948         destination = ucontrol->value.integer.value[1];
2949
2950         if (source >= hdsp->max_channels)
2951                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2952         else
2953                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2954
2955         gain = ucontrol->value.integer.value[2];
2956
2957         spin_lock_irq(&hdsp->lock);
2958         change = gain != hdsp_read_gain(hdsp, addr);
2959         if (change)
2960                 hdsp_write_gain(hdsp, addr, gain);
2961         spin_unlock_irq(&hdsp->lock);
2962         return change;
2963 }
2964
2965 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2966 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2967   .name = xname, \
2968   .index = xindex, \
2969   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2970   .info = snd_hdsp_info_sync_check, \
2971   .get = snd_hdsp_get_wc_sync_check \
2972 }
2973
2974 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2975 {
2976         static char *texts[] = {"No Lock", "Lock", "Sync" };
2977         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2978         uinfo->count = 1;
2979         uinfo->value.enumerated.items = 3;
2980         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2981                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2982         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2983         return 0;
2984 }
2985
2986 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2987 {
2988         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2989         if (status2 & HDSP_wc_lock) {
2990                 if (status2 & HDSP_wc_sync)
2991                         return 2;
2992                 else
2993                          return 1;
2994         } else
2995                 return 0;
2996         return 0;
2997 }
2998
2999 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3000 {
3001         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3002
3003         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
3004         return 0;
3005 }
3006
3007 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
3008 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3009   .name = xname, \
3010   .index = xindex, \
3011   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3012   .info = snd_hdsp_info_sync_check, \
3013   .get = snd_hdsp_get_spdif_sync_check \
3014 }
3015
3016 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
3017 {
3018         int status = hdsp_read(hdsp, HDSP_statusRegister);
3019         if (status & HDSP_SPDIFErrorFlag)
3020                 return 0;
3021         else {
3022                 if (status & HDSP_SPDIFSync)
3023                         return 2;
3024                 else
3025                         return 1;
3026         }
3027         return 0;
3028 }
3029
3030 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3031 {
3032         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3033
3034         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3035         return 0;
3036 }
3037
3038 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3039 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3040   .name = xname, \
3041   .index = xindex, \
3042   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3043   .info = snd_hdsp_info_sync_check, \
3044   .get = snd_hdsp_get_adatsync_sync_check \
3045 }
3046
3047 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3048 {
3049         int status = hdsp_read(hdsp, HDSP_statusRegister);
3050         if (status & HDSP_TimecodeLock) {
3051                 if (status & HDSP_TimecodeSync)
3052                         return 2;
3053                 else
3054                         return 1;
3055         } else
3056                 return 0;
3057 }
3058
3059 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3060 {
3061         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3062
3063         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3064         return 0;
3065 }
3066
3067 #define HDSP_ADAT_SYNC_CHECK \
3068 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3069   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3070   .info = snd_hdsp_info_sync_check, \
3071   .get = snd_hdsp_get_adat_sync_check \
3072 }
3073
3074 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3075 {
3076         int status = hdsp_read(hdsp, HDSP_statusRegister);
3077
3078         if (status & (HDSP_Lock0>>idx)) {
3079                 if (status & (HDSP_Sync0>>idx))
3080                         return 2;
3081                 else
3082                         return 1;
3083         } else
3084                 return 0;
3085 }
3086
3087 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3088 {
3089         int offset;
3090         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3091
3092         offset = ucontrol->id.index - 1;
3093         snd_BUG_ON(offset < 0);
3094
3095         switch (hdsp->io_type) {
3096         case Digiface:
3097         case H9652:
3098                 if (offset >= 3)
3099                         return -EINVAL;
3100                 break;
3101         case Multiface:
3102         case H9632:
3103                 if (offset >= 1)
3104                         return -EINVAL;
3105                 break;
3106         default:
3107                 return -EIO;
3108         }
3109
3110         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3111         return 0;
3112 }
3113
3114 #define HDSP_DDS_OFFSET(xname, xindex) \
3115 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3116   .name = xname, \
3117   .index = xindex, \
3118   .info = snd_hdsp_info_dds_offset, \
3119   .get = snd_hdsp_get_dds_offset, \
3120   .put = snd_hdsp_put_dds_offset \
3121 }
3122
3123 static int hdsp_dds_offset(struct hdsp *hdsp)
3124 {
3125         u64 n;
3126         unsigned int dds_value = hdsp->dds_value;
3127         int system_sample_rate = hdsp->system_sample_rate;
3128
3129         if (!dds_value)
3130                 return 0;
3131
3132         n = DDS_NUMERATOR;
3133         /*
3134          * dds_value = n / rate
3135          * rate = n / dds_value
3136          */
3137         n = div_u64(n, dds_value);
3138         if (system_sample_rate >= 112000)
3139                 n *= 4;
3140         else if (system_sample_rate >= 56000)
3141                 n *= 2;
3142         return ((int)n) - system_sample_rate;
3143 }
3144
3145 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3146 {
3147         int rate = hdsp->system_sample_rate + offset_hz;
3148         hdsp_set_dds_value(hdsp, rate);
3149         return 0;
3150 }
3151
3152 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3153 {
3154         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3155         uinfo->count = 1;
3156         uinfo->value.integer.min = -5000;
3157         uinfo->value.integer.max = 5000;
3158         return 0;
3159 }
3160
3161 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3162 {
3163         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3164
3165         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3166         return 0;
3167 }
3168
3169 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3170 {
3171         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3172         int change;
3173         int val;
3174
3175         if (!snd_hdsp_use_is_exclusive(hdsp))
3176                 return -EBUSY;
3177         val = ucontrol->value.enumerated.item[0];
3178         spin_lock_irq(&hdsp->lock);
3179         if (val != hdsp_dds_offset(hdsp))
3180                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3181         else
3182                 change = 0;
3183         spin_unlock_irq(&hdsp->lock);
3184         return change;
3185 }
3186
3187 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3188 HDSP_DA_GAIN("DA Gain", 0),
3189 HDSP_AD_GAIN("AD Gain", 0),
3190 HDSP_PHONE_GAIN("Phones Gain", 0),
3191 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3192 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3193 };
3194
3195 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3196 {
3197         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3198         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3199         .info =         snd_hdsp_control_spdif_info,
3200         .get =          snd_hdsp_control_spdif_get,
3201         .put =          snd_hdsp_control_spdif_put,
3202 },
3203 {
3204         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3205         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3206         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3207         .info =         snd_hdsp_control_spdif_stream_info,
3208         .get =          snd_hdsp_control_spdif_stream_get,
3209         .put =          snd_hdsp_control_spdif_stream_put,
3210 },
3211 {
3212         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3213         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3214         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3215         .info =         snd_hdsp_control_spdif_mask_info,
3216         .get =          snd_hdsp_control_spdif_mask_get,
3217         .private_value = IEC958_AES0_NONAUDIO |
3218                          IEC958_AES0_PROFESSIONAL |
3219                          IEC958_AES0_CON_EMPHASIS,
3220 },
3221 {
3222         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3223         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3224         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3225         .info =         snd_hdsp_control_spdif_mask_info,
3226         .get =          snd_hdsp_control_spdif_mask_get,
3227         .private_value = IEC958_AES0_NONAUDIO |
3228                          IEC958_AES0_PROFESSIONAL |
3229                          IEC958_AES0_PRO_EMPHASIS,
3230 },
3231 HDSP_MIXER("Mixer", 0),
3232 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3233 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3234 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3235 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3236 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3237 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3238 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3239 {
3240         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3241         .name = "Sample Clock Source Locking",
3242         .info = snd_hdsp_info_clock_source_lock,
3243         .get = snd_hdsp_get_clock_source_lock,
3244         .put = snd_hdsp_put_clock_source_lock,
3245 },
3246 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3247 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3248 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3249 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3250 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3251 /* 'External Rate' complies with the alsa control naming scheme */
3252 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3253 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3254 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3255 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3256 HDSP_LINE_OUT("Line Out", 0),
3257 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3258 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3259 };
3260
3261
3262 static int hdsp_rpm_input12(struct hdsp *hdsp)
3263 {
3264         switch (hdsp->control_register & HDSP_RPM_Inp12) {
3265         case HDSP_RPM_Inp12_Phon_6dB:
3266                 return 0;
3267         case HDSP_RPM_Inp12_Phon_n6dB:
3268                 return 2;
3269         case HDSP_RPM_Inp12_Line_0dB:
3270                 return 3;
3271         case HDSP_RPM_Inp12_Line_n6dB:
3272                 return 4;
3273         }
3274         return 1;
3275 }
3276
3277
3278 static int snd_hdsp_get_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3279 {
3280         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3281
3282         ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp);
3283         return 0;
3284 }
3285
3286
3287 static int hdsp_set_rpm_input12(struct hdsp *hdsp, int mode)
3288 {
3289         hdsp->control_register &= ~HDSP_RPM_Inp12;
3290         switch (mode) {
3291         case 0:
3292                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_6dB;
3293                 break;
3294         case 1:
3295                 break;
3296         case 2:
3297                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_n6dB;
3298                 break;
3299         case 3:
3300                 hdsp->control_register |= HDSP_RPM_Inp12_Line_0dB;
3301                 break;
3302         case 4:
3303                 hdsp->control_register |= HDSP_RPM_Inp12_Line_n6dB;
3304                 break;
3305         default:
3306                 return -1;
3307         }
3308
3309         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3310         return 0;
3311 }
3312
3313
3314 static int snd_hdsp_put_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3315 {
3316         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3317         int change;
3318         int val;
3319
3320         if (!snd_hdsp_use_is_exclusive(hdsp))
3321                 return -EBUSY;
3322         val = ucontrol->value.enumerated.item[0];
3323         if (val < 0)
3324                 val = 0;
3325         if (val > 4)
3326                 val = 4;
3327         spin_lock_irq(&hdsp->lock);
3328         if (val != hdsp_rpm_input12(hdsp))
3329                 change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0;
3330         else
3331                 change = 0;
3332         spin_unlock_irq(&hdsp->lock);
3333         return change;
3334 }
3335
3336
3337 static int snd_hdsp_info_rpm_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3338 {
3339         static char *texts[] = {"Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"};
3340
3341         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3342         uinfo->count = 1;
3343         uinfo->value.enumerated.items = 5;
3344         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3345                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3346         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3347         return 0;
3348 }
3349
3350
3351 static int hdsp_rpm_input34(struct hdsp *hdsp)
3352 {
3353         switch (hdsp->control_register & HDSP_RPM_Inp34) {
3354         case HDSP_RPM_Inp34_Phon_6dB:
3355                 return 0;
3356         case HDSP_RPM_Inp34_Phon_n6dB:
3357                 return 2;
3358         case HDSP_RPM_Inp34_Line_0dB:
3359                 return 3;
3360         case HDSP_RPM_Inp34_Line_n6dB:
3361                 return 4;
3362         }
3363         return 1;
3364 }
3365
3366
3367 static int snd_hdsp_get_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3368 {
3369         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3370
3371         ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp);
3372         return 0;
3373 }
3374
3375
3376 static int hdsp_set_rpm_input34(struct hdsp *hdsp, int mode)
3377 {
3378         hdsp->control_register &= ~HDSP_RPM_Inp34;
3379         switch (mode) {
3380         case 0:
3381                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_6dB;
3382                 break;
3383         case 1:
3384                 break;
3385         case 2:
3386                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_n6dB;
3387                 break;
3388         case 3:
3389                 hdsp->control_register |= HDSP_RPM_Inp34_Line_0dB;
3390                 break;
3391         case 4:
3392                 hdsp->control_register |= HDSP_RPM_Inp34_Line_n6dB;
3393                 break;
3394         default:
3395                 return -1;
3396         }
3397
3398         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3399         return 0;
3400 }
3401
3402
3403 static int snd_hdsp_put_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3404 {
3405         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3406         int change;
3407         int val;
3408
3409         if (!snd_hdsp_use_is_exclusive(hdsp))
3410                 return -EBUSY;
3411         val = ucontrol->value.enumerated.item[0];
3412         if (val < 0)
3413                 val = 0;
3414         if (val > 4)
3415                 val = 4;
3416         spin_lock_irq(&hdsp->lock);
3417         if (val != hdsp_rpm_input34(hdsp))
3418                 change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0;
3419         else
3420                 change = 0;
3421         spin_unlock_irq(&hdsp->lock);
3422         return change;
3423 }
3424
3425
3426 /* RPM Bypass switch */
3427 static int hdsp_rpm_bypass(struct hdsp *hdsp)
3428 {
3429         return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0;
3430 }
3431
3432
3433 static int snd_hdsp_get_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3434 {
3435         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3436
3437         ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp);
3438         return 0;
3439 }
3440
3441
3442 static int hdsp_set_rpm_bypass(struct hdsp *hdsp, int on)
3443 {
3444         if (on)
3445                 hdsp->control_register |= HDSP_RPM_Bypass;
3446         else
3447                 hdsp->control_register &= ~HDSP_RPM_Bypass;
3448         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3449         return 0;
3450 }
3451
3452
3453 static int snd_hdsp_put_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3454 {
3455         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3456         int change;
3457         unsigned int val;
3458
3459         if (!snd_hdsp_use_is_exclusive(hdsp))
3460                 return -EBUSY;
3461         val = ucontrol->value.integer.value[0] & 1;
3462         spin_lock_irq(&hdsp->lock);
3463         change = (int)val != hdsp_rpm_bypass(hdsp);
3464         hdsp_set_rpm_bypass(hdsp, val);
3465         spin_unlock_irq(&hdsp->lock);
3466         return change;
3467 }
3468
3469
3470 static int snd_hdsp_info_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3471 {
3472         static char *texts[] = {"On", "Off"};
3473
3474         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3475         uinfo->count = 1;
3476         uinfo->value.enumerated.items = 2;
3477         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3478                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3479         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3480         return 0;
3481 }
3482
3483
3484 /* RPM Disconnect switch */
3485 static int hdsp_rpm_disconnect(struct hdsp *hdsp)
3486 {
3487         return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0;
3488 }
3489
3490
3491 static int snd_hdsp_get_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3492 {
3493         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3494
3495         ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp);
3496         return 0;
3497 }
3498
3499
3500 static int hdsp_set_rpm_disconnect(struct hdsp *hdsp, int on)
3501 {
3502         if (on)
3503                 hdsp->control_register |= HDSP_RPM_Disconnect;
3504         else
3505                 hdsp->control_register &= ~HDSP_RPM_Disconnect;
3506         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3507         return 0;
3508 }
3509
3510
3511 static int snd_hdsp_put_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3512 {
3513         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3514         int change;
3515         unsigned int val;
3516
3517         if (!snd_hdsp_use_is_exclusive(hdsp))
3518                 return -EBUSY;
3519         val = ucontrol->value.integer.value[0] & 1;
3520         spin_lock_irq(&hdsp->lock);
3521         change = (int)val != hdsp_rpm_disconnect(hdsp);
3522         hdsp_set_rpm_disconnect(hdsp, val);
3523         spin_unlock_irq(&hdsp->lock);
3524         return change;
3525 }
3526
3527 static int snd_hdsp_info_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3528 {
3529         static char *texts[] = {"On", "Off"};
3530
3531         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3532         uinfo->count = 1;
3533         uinfo->value.enumerated.items = 2;
3534         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3535                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3536         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3537         return 0;
3538 }
3539
3540 static struct snd_kcontrol_new snd_hdsp_rpm_controls[] = {
3541         {
3542                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3543                 .name = "RPM Bypass",
3544                 .get = snd_hdsp_get_rpm_bypass,
3545                 .put = snd_hdsp_put_rpm_bypass,
3546                 .info = snd_hdsp_info_rpm_bypass
3547         },
3548         {
3549                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3550                 .name = "RPM Disconnect",
3551                 .get = snd_hdsp_get_rpm_disconnect,
3552                 .put = snd_hdsp_put_rpm_disconnect,
3553                 .info = snd_hdsp_info_rpm_disconnect
3554         },
3555         {
3556                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3557                 .name = "Input 1/2",
3558                 .get = snd_hdsp_get_rpm_input12,
3559                 .put = snd_hdsp_put_rpm_input12,
3560                 .info = snd_hdsp_info_rpm_input
3561         },
3562         {
3563                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3564                 .name = "Input 3/4",
3565                 .get = snd_hdsp_get_rpm_input34,
3566                 .put = snd_hdsp_put_rpm_input34,
3567                 .info = snd_hdsp_info_rpm_input
3568         },
3569         HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3570         HDSP_MIXER("Mixer", 0)
3571 };
3572
3573 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3574 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3575
3576 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3577 {
3578         unsigned int idx;
3579         int err;
3580         struct snd_kcontrol *kctl;
3581
3582         if (hdsp->io_type == RPM) {
3583                 /* RPM Bypass, Disconnect and Input switches */
3584                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) {
3585                         err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_rpm_controls[idx], hdsp));
3586                         if (err < 0)
3587                                 return err;
3588                 }
3589                 return 0;
3590         }
3591
3592         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3593                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3594                         return err;
3595                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3596                         hdsp->spdif_ctl = kctl;
3597         }
3598
3599         /* ADAT SyncCheck status */
3600         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3601         snd_hdsp_adat_sync_check.index = 1;
3602         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3603                 return err;
3604         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3605                 for (idx = 1; idx < 3; ++idx) {
3606                         snd_hdsp_adat_sync_check.index = idx+1;
3607                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3608                                 return err;
3609                 }
3610         }
3611
3612         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3613         if (hdsp->io_type == H9632) {
3614                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3615                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3616                                 return err;
3617                 }
3618         }
3619
3620         /* AEB control for H96xx card */
3621         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3622                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3623                                 return err;
3624         }
3625
3626         return 0;
3627 }
3628
3629 /*------------------------------------------------------------
3630    /proc interface
3631  ------------------------------------------------------------*/
3632
3633 static void
3634 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3635 {
3636         struct hdsp *hdsp = entry->private_data;
3637         unsigned int status;
3638         unsigned int status2;
3639         char *pref_sync_ref;
3640         char *autosync_ref;
3641         char *system_clock_mode;
3642         char *clock_source;
3643         int x;
3644
3645         status = hdsp_read(hdsp, HDSP_statusRegister);
3646         status2 = hdsp_read(hdsp, HDSP_status2Register);
3647
3648         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3649                     hdsp->card->number + 1);
3650         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3651                     hdsp->capture_buffer, hdsp->playback_buffer);
3652         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3653                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3654         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3655         snd_iprintf(buffer, "Control2 register: 0x%x\n",
3656                     hdsp->control2_register);
3657         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3658         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3659
3660         if (hdsp_check_for_iobox(hdsp)) {
3661                 snd_iprintf(buffer, "No I/O box connected.\n"
3662                             "Please connect one and upload firmware.\n");
3663                 return;
3664         }
3665
3666         if (hdsp_check_for_firmware(hdsp, 0)) {
3667                 if (hdsp->state & HDSP_FirmwareCached) {
3668                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3669                                 snd_iprintf(buffer, "Firmware loading from "
3670                                             "cache failed, "
3671                                             "please upload manually.\n");
3672                                 return;
3673                         }
3674                 } else {
3675                         int err = -EINVAL;
3676 #ifdef HDSP_FW_LOADER
3677                         err = hdsp_request_fw_loader(hdsp);
3678 #endif
3679                         if (err < 0) {
3680                                 snd_iprintf(buffer,
3681                                             "No firmware loaded nor cached, "
3682                                             "please upload firmware.\n");
3683                                 return;
3684                         }
3685                 }
3686         }
3687
3688         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3689         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3690         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3691         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3692         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3693         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3694
3695         snd_iprintf(buffer, "\n");
3696
3697         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3698
3699         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3700         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3701         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3702         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3703
3704         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3705
3706         snd_iprintf(buffer, "\n");
3707
3708         switch (hdsp_clock_source(hdsp)) {
3709         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3710                 clock_source = "AutoSync";
3711                 break;
3712         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3713                 clock_source = "Internal 32 kHz";
3714                 break;
3715         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3716                 clock_source = "Internal 44.1 kHz";
3717                 break;
3718         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3719                 clock_source = "Internal 48 kHz";
3720                 break;
3721         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3722                 clock_source = "Internal 64 kHz";
3723                 break;
3724         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3725                 clock_source = "Internal 88.2 kHz";
3726                 break;
3727         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3728                 clock_source = "Internal 96 kHz";
3729                 break;
3730         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3731                 clock_source = "Internal 128 kHz";
3732                 break;
3733         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3734                 clock_source = "Internal 176.4 kHz";
3735                 break;
3736                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3737                 clock_source = "Internal 192 kHz";
3738                 break;
3739         default:
3740                 clock_source = "Error";
3741         }
3742         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3743
3744         if (hdsp_system_clock_mode(hdsp))
3745                 system_clock_mode = "Slave";
3746         else
3747                 system_clock_mode = "Master";
3748
3749         switch (hdsp_pref_sync_ref (hdsp)) {
3750         case HDSP_SYNC_FROM_WORD:
3751                 pref_sync_ref = "Word Clock";
3752                 break;
3753         case HDSP_SYNC_FROM_ADAT_SYNC:
3754                 pref_sync_ref = "ADAT Sync";
3755                 break;
3756         case HDSP_SYNC_FROM_SPDIF:
3757                 pref_sync_ref = "SPDIF";
3758                 break;
3759         case HDSP_SYNC_FROM_ADAT1:
3760                 pref_sync_ref = "ADAT1";
3761                 break;
3762         case HDSP_SYNC_FROM_ADAT2:
3763                 pref_sync_ref = "ADAT2";
3764                 break;
3765         case HDSP_SYNC_FROM_ADAT3:
3766                 pref_sync_ref = "ADAT3";
3767                 break;
3768         default:
3769                 pref_sync_ref = "Word Clock";
3770                 break;
3771         }
3772         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3773
3774         switch (hdsp_autosync_ref (hdsp)) {
3775         case HDSP_AUTOSYNC_FROM_WORD:
3776                 autosync_ref = "Word Clock";
3777                 break;
3778         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3779                 autosync_ref = "ADAT Sync";
3780                 break;
3781         case HDSP_AUTOSYNC_FROM_SPDIF:
3782                 autosync_ref = "SPDIF";
3783                 break;
3784         case HDSP_AUTOSYNC_FROM_NONE:
3785                 autosync_ref = "None";
3786                 break;
3787         case HDSP_AUTOSYNC_FROM_ADAT1:
3788                 autosync_ref = "ADAT1";
3789                 break;
3790         case HDSP_AUTOSYNC_FROM_ADAT2:
3791                 autosync_ref = "ADAT2";
3792                 break;
3793         case HDSP_AUTOSYNC_FROM_ADAT3:
3794                 autosync_ref = "ADAT3";
3795                 break;
3796         default:
3797                 autosync_ref = "---";
3798                 break;
3799         }
3800         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3801
3802         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3803
3804         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3805
3806         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3807         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3808
3809         snd_iprintf(buffer, "\n");
3810
3811         if (hdsp->io_type != RPM) {
3812                 switch (hdsp_spdif_in(hdsp)) {
3813                 case HDSP_SPDIFIN_OPTICAL:
3814                         snd_iprintf(buffer, "IEC958 input: Optical\n");
3815                         break;
3816                 case HDSP_SPDIFIN_COAXIAL:
3817                         snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3818                         break;
3819                 case HDSP_SPDIFIN_INTERNAL:
3820                         snd_iprintf(buffer, "IEC958 input: Internal\n");
3821                         break;
3822                 case HDSP_SPDIFIN_AES:
3823                         snd_iprintf(buffer, "IEC958 input: AES\n");
3824                         break;
3825                 default:
3826                         snd_iprintf(buffer, "IEC958 input: ???\n");
3827                         break;
3828                 }
3829         }
3830
3831         if (RPM == hdsp->io_type) {
3832                 if (hdsp->control_register & HDSP_RPM_Bypass)
3833                         snd_iprintf(buffer, "RPM Bypass: disabled\n");
3834                 else
3835                         snd_iprintf(buffer, "RPM Bypass: enabled\n");
3836                 if (hdsp->control_register & HDSP_RPM_Disconnect)
3837                         snd_iprintf(buffer, "RPM disconnected\n");
3838                 else
3839                         snd_iprintf(buffer, "RPM connected\n");
3840
3841                 switch (hdsp->control_register & HDSP_RPM_Inp12) {
3842                 case HDSP_RPM_Inp12_Phon_6dB:
3843                         snd_iprintf(buffer, "Input 1/2: Phono, 6dB\n");
3844                         break;
3845                 case HDSP_RPM_Inp12_Phon_0dB:
3846                         snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n");
3847                         break;
3848                 case HDSP_RPM_Inp12_Phon_n6dB:
3849                         snd_iprintf(buffer, "Input 1/2: Phono, -6dB\n");
3850                         break;
3851                 case HDSP_RPM_Inp12_Line_0dB:
3852                         snd_iprintf(buffer, "Input 1/2: Line, 0dB\n");
3853                         break;
3854                 case HDSP_RPM_Inp12_Line_n6dB:
3855                         snd_iprintf(buffer, "Input 1/2: Line, -6dB\n");
3856                         break;
3857                 default:
3858                         snd_iprintf(buffer, "Input 1/2: ???\n");
3859                 }
3860
3861                 switch (hdsp->control_register & HDSP_RPM_Inp34) {
3862                 case HDSP_RPM_Inp34_Phon_6dB:
3863                         snd_iprintf(buffer, "Input 3/4: Phono, 6dB\n");
3864                         break;
3865                 case HDSP_RPM_Inp34_Phon_0dB:
3866                         snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n");
3867                         break;
3868                 case HDSP_RPM_Inp34_Phon_n6dB:
3869                         snd_iprintf(buffer, "Input 3/4: Phono, -6dB\n");
3870                         break;
3871                 case HDSP_RPM_Inp34_Line_0dB:
3872                         snd_iprintf(buffer, "Input 3/4: Line, 0dB\n");
3873                         break;
3874                 case HDSP_RPM_Inp34_Line_n6dB:
3875                         snd_iprintf(buffer, "Input 3/4: Line, -6dB\n");
3876                         break;
3877                 default:
3878                         snd_iprintf(buffer, "Input 3/4: ???\n");
3879                 }
3880
3881         } else {
3882                 if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3883                         snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3884                 else
3885                         snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3886
3887                 if (hdsp->control_register & HDSP_SPDIFProfessional)
3888                         snd_iprintf(buffer, "IEC958 quality: Professional\n");
3889                 else
3890                         snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3891
3892                 if (hdsp->control_register & HDSP_SPDIFEmphasis)
3893                         snd_iprintf(buffer, "IEC958 emphasis: on\n");
3894                 else
3895                         snd_iprintf(buffer, "IEC958 emphasis: off\n");
3896
3897                 if (hdsp->control_register & HDSP_SPDIFNonAudio)
3898                         snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3899                 else
3900                         snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3901                 x = hdsp_spdif_sample_rate(hdsp);
3902                 if (x != 0)
3903                         snd_iprintf(buffer, "IEC958 sample rate: %d\n", x);
3904                 else
3905                         snd_iprintf(buffer, "IEC958 sample rate: Error flag set\n");
3906         }
3907         snd_iprintf(buffer, "\n");
3908
3909         /* Sync Check */
3910         x = status & HDSP_Sync0;
3911         if (status & HDSP_Lock0)
3912                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3913         else
3914                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3915
3916         switch (hdsp->io_type) {
3917         case Digiface:
3918         case H9652:
3919                 x = status & HDSP_Sync1;
3920                 if (status & HDSP_Lock1)
3921                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3922                 else
3923                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3924                 x = status & HDSP_Sync2;
3925                 if (status & HDSP_Lock2)
3926                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3927                 else
3928                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3929                 break;
3930         default:
3931                 /* relax */
3932                 break;
3933         }
3934
3935         x = status & HDSP_SPDIFSync;
3936         if (status & HDSP_SPDIFErrorFlag)
3937                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3938         else
3939                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3940
3941         x = status2 & HDSP_wc_sync;
3942         if (status2 & HDSP_wc_lock)
3943                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3944         else
3945                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3946
3947         x = status & HDSP_TimecodeSync;
3948         if (status & HDSP_TimecodeLock)
3949                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3950         else
3951                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3952
3953         snd_iprintf(buffer, "\n");
3954
3955         /* Informations about H9632 specific controls */
3956         if (hdsp->io_type == H9632) {
3957                 char *tmp;
3958
3959                 switch (hdsp_ad_gain(hdsp)) {
3960                 case 0:
3961                         tmp = "-10 dBV";
3962                         break;
3963                 case 1:
3964                         tmp = "+4 dBu";
3965                         break;
3966                 default:
3967                         tmp = "Lo Gain";
3968                         break;
3969                 }
3970                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3971
3972                 switch (hdsp_da_gain(hdsp)) {
3973                 case 0:
3974                         tmp = "Hi Gain";
3975                         break;
3976                 case 1:
3977                         tmp = "+4 dBu";
3978                         break;
3979                 default:
3980                         tmp = "-10 dBV";
3981                         break;
3982                 }
3983                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3984
3985                 switch (hdsp_phone_gain(hdsp)) {
3986                 case 0:
3987                         tmp = "0 dB";
3988                         break;
3989                 case 1:
3990                         tmp = "-6 dB";
3991                         break;
3992                 default:
3993                         tmp = "-12 dB";
3994                         break;
3995                 }
3996                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3997
3998                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3999
4000                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
4001                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
4002                 else
4003                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
4004                 snd_iprintf(buffer, "\n");
4005         }
4006
4007 }
4008
4009 static void snd_hdsp_proc_init(struct hdsp *hdsp)
4010 {
4011         struct snd_info_entry *entry;
4012
4013         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
4014                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
4015 }
4016
4017 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
4018 {
4019         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
4020         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
4021 }
4022
4023 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
4024 {
4025         unsigned long pb_bus, cb_bus;
4026
4027         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
4028             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
4029                 if (hdsp->capture_dma_buf.area)
4030                         snd_dma_free_pages(&hdsp->capture_dma_buf);
4031                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
4032                 return -ENOMEM;
4033         }
4034
4035         /* Align to bus-space 64K boundary */
4036
4037         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
4038         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
4039
4040         /* Tell the card where it is */
4041
4042         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
4043         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
4044
4045         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
4046         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
4047
4048         return 0;
4049 }
4050
4051 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
4052 {
4053         unsigned int i;
4054
4055         /* ASSUMPTION: hdsp->lock is either held, or
4056            there is no need to hold it (e.g. during module
4057            initialization).
4058          */
4059
4060         /* set defaults:
4061
4062            SPDIF Input via Coax
4063            Master clock mode
4064            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
4065                             which implies 2 4096 sample, 32Kbyte periods).
4066            Enable line out.
4067          */
4068
4069         hdsp->control_register = HDSP_ClockModeMaster |
4070                                  HDSP_SPDIFInputCoaxial |
4071                                  hdsp_encode_latency(7) |
4072                                  HDSP_LineOut;
4073
4074
4075         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4076
4077 #ifdef SNDRV_BIG_ENDIAN
4078         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
4079 #else
4080         hdsp->control2_register = 0;
4081 #endif
4082         if (hdsp->io_type == H9652)
4083                 snd_hdsp_9652_enable_mixer (hdsp);
4084         else
4085                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4086
4087         hdsp_reset_hw_pointer(hdsp);
4088         hdsp_compute_period_size(hdsp);
4089
4090         /* silence everything */
4091
4092         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
4093                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
4094
4095         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
4096                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
4097                         return -EIO;
4098         }
4099
4100         /* H9632 specific defaults */
4101         if (hdsp->io_type == H9632) {
4102                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
4103                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4104         }
4105
4106         /* set a default rate so that the channel map is set up.
4107          */
4108
4109         hdsp_set_rate(hdsp, 48000, 1);
4110
4111         return 0;
4112 }
4113
4114 static void hdsp_midi_tasklet(unsigned long arg)
4115 {
4116         struct hdsp *hdsp = (struct hdsp *)arg;
4117
4118         if (hdsp->midi[0].pending)
4119                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
4120         if (hdsp->midi[1].pending)
4121                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
4122 }
4123
4124 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
4125 {
4126         struct hdsp *hdsp = (struct hdsp *) dev_id;
4127         unsigned int status;
4128         int audio;
4129         int midi0;
4130         int midi1;
4131         unsigned int midi0status;
4132         unsigned int midi1status;
4133         int schedule = 0;
4134
4135         status = hdsp_read(hdsp, HDSP_statusRegister);
4136
4137         audio = status & HDSP_audioIRQPending;
4138         midi0 = status & HDSP_midi0IRQPending;
4139         midi1 = status & HDSP_midi1IRQPending;
4140
4141         if (!audio && !midi0 && !midi1)
4142                 return IRQ_NONE;
4143
4144         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
4145
4146         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
4147         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
4148
4149         if (!(hdsp->state & HDSP_InitializationComplete))
4150                 return IRQ_HANDLED;
4151
4152         if (audio) {
4153                 if (hdsp->capture_substream)
4154                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
4155
4156                 if (hdsp->playback_substream)
4157                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
4158         }
4159
4160         if (midi0 && midi0status) {
4161                 if (hdsp->use_midi_tasklet) {
4162                         /* we disable interrupts for this input until processing is done */
4163                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
4164                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4165                         hdsp->midi[0].pending = 1;
4166                         schedule = 1;
4167                 } else {
4168                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
4169                 }
4170         }
4171         if (hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632 && midi1 && midi1status) {
4172                 if (hdsp->use_midi_tasklet) {
4173                         /* we disable interrupts for this input until processing is done */
4174                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
4175                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
4176                         hdsp->midi[1].pending = 1;
4177                         schedule = 1;
4178                 } else {
4179                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
4180                 }
4181         }
4182         if (hdsp->use_midi_tasklet && schedule)
4183                 tasklet_schedule(&hdsp->midi_tasklet);
4184         return IRQ_HANDLED;
4185 }
4186
4187 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
4188 {
4189         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4190         return hdsp_hw_pointer(hdsp);
4191 }
4192
4193 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
4194                                              int stream,
4195                                              int channel)
4196
4197 {
4198         int mapped_channel;
4199
4200         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
4201                 return NULL;
4202
4203         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
4204                 return NULL;
4205
4206         if (stream == SNDRV_PCM_STREAM_CAPTURE)
4207                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4208         else
4209                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
4210 }
4211
4212 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
4213                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
4214 {
4215         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4216         char *channel_buf;
4217
4218         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4219                 return -EINVAL;
4220
4221         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4222         if (snd_BUG_ON(!channel_buf))
4223                 return -EIO;
4224         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
4225                 return -EFAULT;
4226         return count;
4227 }
4228
4229 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
4230                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
4231 {
4232         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4233         char *channel_buf;
4234
4235         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
4236                 return -EINVAL;
4237
4238         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4239         if (snd_BUG_ON(!channel_buf))
4240                 return -EIO;
4241         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
4242                 return -EFAULT;
4243         return count;
4244 }
4245
4246 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
4247                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
4248 {
4249         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4250         char *channel_buf;
4251
4252         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4253         if (snd_BUG_ON(!channel_buf))
4254                 return -EIO;
4255         memset(channel_buf + pos * 4, 0, count * 4);
4256         return count;
4257 }
4258
4259 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
4260 {
4261         struct snd_pcm_runtime *runtime = substream->runtime;
4262         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4263         struct snd_pcm_substream *other;
4264         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4265                 other = hdsp->capture_substream;
4266         else
4267                 other = hdsp->playback_substream;
4268         if (hdsp->running)
4269                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
4270         else
4271                 runtime->status->hw_ptr = 0;
4272         if (other) {
4273                 struct snd_pcm_substream *s;
4274                 struct snd_pcm_runtime *oruntime = other->runtime;
4275                 snd_pcm_group_for_each_entry(s, substream) {
4276                         if (s == other) {
4277                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
4278                                 break;
4279                         }
4280                 }
4281         }
4282         return 0;
4283 }
4284
4285 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
4286                                  struct snd_pcm_hw_params *params)
4287 {
4288         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4289         int err;
4290         pid_t this_pid;
4291         pid_t other_pid;
4292
4293         if (hdsp_check_for_iobox (hdsp))
4294                 return -EIO;
4295
4296         if (hdsp_check_for_firmware(hdsp, 1))
4297                 return -EIO;
4298
4299         spin_lock_irq(&hdsp->lock);
4300
4301         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4302                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
4303                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
4304                 this_pid = hdsp->playback_pid;
4305                 other_pid = hdsp->capture_pid;
4306         } else {
4307                 this_pid = hdsp->capture_pid;
4308                 other_pid = hdsp->playback_pid;
4309         }
4310
4311         if ((other_pid > 0) && (this_pid != other_pid)) {
4312
4313                 /* The other stream is open, and not by the same
4314                    task as this one. Make sure that the parameters
4315                    that matter are the same.
4316                  */
4317
4318                 if (params_rate(params) != hdsp->system_sample_rate) {
4319                         spin_unlock_irq(&hdsp->lock);
4320                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4321                         return -EBUSY;
4322                 }
4323
4324                 if (params_period_size(params) != hdsp->period_bytes / 4) {
4325                         spin_unlock_irq(&hdsp->lock);
4326                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4327                         return -EBUSY;
4328                 }
4329
4330                 /* We're fine. */
4331
4332                 spin_unlock_irq(&hdsp->lock);
4333                 return 0;
4334
4335         } else {
4336                 spin_unlock_irq(&hdsp->lock);
4337         }
4338
4339         /* how to make sure that the rate matches an externally-set one ?
4340          */
4341
4342         spin_lock_irq(&hdsp->lock);
4343         if (! hdsp->clock_source_locked) {
4344                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
4345                         spin_unlock_irq(&hdsp->lock);
4346                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4347                         return err;
4348                 }
4349         }
4350         spin_unlock_irq(&hdsp->lock);
4351
4352         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
4353                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4354                 return err;
4355         }
4356
4357         return 0;
4358 }
4359
4360 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
4361                                     struct snd_pcm_channel_info *info)
4362 {
4363         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4364         int mapped_channel;
4365
4366         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
4367                 return -EINVAL;
4368
4369         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
4370                 return -EINVAL;
4371
4372         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
4373         info->first = 0;
4374         info->step = 32;
4375         return 0;
4376 }
4377
4378 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
4379                              unsigned int cmd, void *arg)
4380 {
4381         switch (cmd) {
4382         case SNDRV_PCM_IOCTL1_RESET:
4383                 return snd_hdsp_reset(substream);
4384         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
4385                 return snd_hdsp_channel_info(substream, arg);
4386         default:
4387                 break;
4388         }
4389
4390         return snd_pcm_lib_ioctl(substream, cmd, arg);
4391 }
4392
4393 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
4394 {
4395         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4396         struct snd_pcm_substream *other;
4397         int running;
4398
4399         if (hdsp_check_for_iobox (hdsp))
4400                 return -EIO;
4401
4402         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4403                 return -EIO;
4404
4405         spin_lock(&hdsp->lock);
4406         running = hdsp->running;
4407         switch (cmd) {
4408         case SNDRV_PCM_TRIGGER_START:
4409                 running |= 1 << substream->stream;
4410                 break;
4411         case SNDRV_PCM_TRIGGER_STOP:
4412                 running &= ~(1 << substream->stream);
4413                 break;
4414         default:
4415                 snd_BUG();
4416                 spin_unlock(&hdsp->lock);
4417                 return -EINVAL;
4418         }
4419         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4420                 other = hdsp->capture_substream;
4421         else
4422                 other = hdsp->playback_substream;
4423
4424         if (other) {
4425                 struct snd_pcm_substream *s;
4426                 snd_pcm_group_for_each_entry(s, substream) {
4427                         if (s == other) {
4428                                 snd_pcm_trigger_done(s, substream);
4429                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4430                                         running |= 1 << s->stream;
4431                                 else
4432                                         running &= ~(1 << s->stream);
4433                                 goto _ok;
4434                         }
4435                 }
4436                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4437                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4438                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4439                                 hdsp_silence_playback(hdsp);
4440                 } else {
4441                         if (running &&
4442                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4443                                 hdsp_silence_playback(hdsp);
4444                 }
4445         } else {
4446                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4447                                 hdsp_silence_playback(hdsp);
4448         }
4449  _ok:
4450         snd_pcm_trigger_done(substream, substream);
4451         if (!hdsp->running && running)
4452                 hdsp_start_audio(hdsp);
4453         else if (hdsp->running && !running)
4454                 hdsp_stop_audio(hdsp);
4455         hdsp->running = running;
4456         spin_unlock(&hdsp->lock);
4457
4458         return 0;
4459 }
4460
4461 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4462 {
4463         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4464         int result = 0;
4465
4466         if (hdsp_check_for_iobox (hdsp))
4467                 return -EIO;
4468
4469         if (hdsp_check_for_firmware(hdsp, 1))
4470                 return -EIO;
4471
4472         spin_lock_irq(&hdsp->lock);
4473         if (!hdsp->running)
4474                 hdsp_reset_hw_pointer(hdsp);
4475         spin_unlock_irq(&hdsp->lock);
4476         return result;
4477 }
4478
4479 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4480 {
4481         .info =                 (SNDRV_PCM_INFO_MMAP |
4482                                  SNDRV_PCM_INFO_MMAP_VALID |
4483                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4484                                  SNDRV_PCM_INFO_SYNC_START |
4485                                  SNDRV_PCM_INFO_DOUBLE),
4486 #ifdef SNDRV_BIG_ENDIAN
4487         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4488 #else
4489         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4490 #endif
4491         .rates =                (SNDRV_PCM_RATE_32000 |
4492                                  SNDRV_PCM_RATE_44100 |
4493                                  SNDRV_PCM_RATE_48000 |
4494                                  SNDRV_PCM_RATE_64000 |
4495                                  SNDRV_PCM_RATE_88200 |
4496                                  SNDRV_PCM_RATE_96000),
4497         .rate_min =             32000,
4498         .rate_max =             96000,
4499         .channels_min =         6,
4500         .channels_max =         HDSP_MAX_CHANNELS,
4501         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4502         .period_bytes_min =     (64 * 4) * 10,
4503         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4504         .periods_min =          2,
4505         .periods_max =          2,
4506         .fifo_size =            0
4507 };
4508
4509 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4510 {
4511         .info =                 (SNDRV_PCM_INFO_MMAP |
4512                                  SNDRV_PCM_INFO_MMAP_VALID |
4513                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4514                                  SNDRV_PCM_INFO_SYNC_START),
4515 #ifdef SNDRV_BIG_ENDIAN
4516         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4517 #else
4518         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4519 #endif
4520         .rates =                (SNDRV_PCM_RATE_32000 |
4521                                  SNDRV_PCM_RATE_44100 |
4522                                  SNDRV_PCM_RATE_48000 |
4523                                  SNDRV_PCM_RATE_64000 |
4524                                  SNDRV_PCM_RATE_88200 |
4525                                  SNDRV_PCM_RATE_96000),
4526         .rate_min =             32000,
4527         .rate_max =             96000,
4528         .channels_min =         5,
4529         .channels_max =         HDSP_MAX_CHANNELS,
4530         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4531         .period_bytes_min =     (64 * 4) * 10,
4532         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4533         .periods_min =          2,
4534         .periods_max =          2,
4535         .fifo_size =            0
4536 };
4537
4538 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4539
4540 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4541         .count = ARRAY_SIZE(hdsp_period_sizes),
4542         .list = hdsp_period_sizes,
4543         .mask = 0
4544 };
4545
4546 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4547
4548 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4549         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4550         .list = hdsp_9632_sample_rates,
4551         .mask = 0
4552 };
4553
4554 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4555                                         struct snd_pcm_hw_rule *rule)
4556 {
4557         struct hdsp *hdsp = rule->private;
4558         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4559         if (hdsp->io_type == H9632) {
4560                 unsigned int list[3];
4561                 list[0] = hdsp->qs_in_channels;
4562                 list[1] = hdsp->ds_in_channels;
4563                 list[2] = hdsp->ss_in_channels;
4564                 return snd_interval_list(c, 3, list, 0);
4565         } else {
4566                 unsigned int list[2];
4567                 list[0] = hdsp->ds_in_channels;
4568                 list[1] = hdsp->ss_in_channels;
4569                 return snd_interval_list(c, 2, list, 0);
4570         }
4571 }
4572
4573 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4574                                         struct snd_pcm_hw_rule *rule)
4575 {
4576         unsigned int list[3];
4577         struct hdsp *hdsp = rule->private;
4578         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4579         if (hdsp->io_type == H9632) {
4580                 list[0] = hdsp->qs_out_channels;
4581                 list[1] = hdsp->ds_out_channels;
4582                 list[2] = hdsp->ss_out_channels;
4583                 return snd_interval_list(c, 3, list, 0);
4584         } else {
4585                 list[0] = hdsp->ds_out_channels;
4586                 list[1] = hdsp->ss_out_channels;
4587         }
4588         return snd_interval_list(c, 2, list, 0);
4589 }
4590
4591 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4592                                              struct snd_pcm_hw_rule *rule)
4593 {
4594         struct hdsp *hdsp = rule->private;
4595         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4596         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4597         if (r->min > 96000 && hdsp->io_type == H9632) {
4598                 struct snd_interval t = {
4599                         .min = hdsp->qs_in_channels,
4600                         .max = hdsp->qs_in_channels,
4601                         .integer = 1,
4602                 };
4603                 return snd_interval_refine(c, &t);
4604         } else if (r->min > 48000 && r->max <= 96000) {
4605                 struct snd_interval t = {
4606                         .min = hdsp->ds_in_channels,
4607                         .max = hdsp->ds_in_channels,
4608                         .integer = 1,
4609                 };
4610                 return snd_interval_refine(c, &t);
4611         } else if (r->max < 64000) {
4612                 struct snd_interval t = {
4613                         .min = hdsp->ss_in_channels,
4614                         .max = hdsp->ss_in_channels,
4615                         .integer = 1,
4616                 };
4617                 return snd_interval_refine(c, &t);
4618         }
4619         return 0;
4620 }
4621
4622 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4623                                              struct snd_pcm_hw_rule *rule)
4624 {
4625         struct hdsp *hdsp = rule->private;
4626         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4627         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4628         if (r->min > 96000 && hdsp->io_type == H9632) {
4629                 struct snd_interval t = {
4630                         .min = hdsp->qs_out_channels,
4631                         .max = hdsp->qs_out_channels,
4632                         .integer = 1,
4633                 };
4634                 return snd_interval_refine(c, &t);
4635         } else if (r->min > 48000 && r->max <= 96000) {
4636                 struct snd_interval t = {
4637                         .min = hdsp->ds_out_channels,
4638                         .max = hdsp->ds_out_channels,
4639                         .integer = 1,
4640                 };
4641                 return snd_interval_refine(c, &t);
4642         } else if (r->max < 64000) {
4643                 struct snd_interval t = {
4644                         .min = hdsp->ss_out_channels,
4645                         .max = hdsp->ss_out_channels,
4646                         .integer = 1,
4647                 };
4648                 return snd_interval_refine(c, &t);
4649         }
4650         return 0;
4651 }
4652
4653 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4654                                              struct snd_pcm_hw_rule *rule)
4655 {
4656         struct hdsp *hdsp = rule->private;
4657         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4658         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4659         if (c->min >= hdsp->ss_out_channels) {
4660                 struct snd_interval t = {
4661                         .min = 32000,
4662                         .max = 48000,
4663                         .integer = 1,
4664                 };
4665                 return snd_interval_refine(r, &t);
4666         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4667                 struct snd_interval t = {
4668                         .min = 128000,
4669                         .max = 192000,
4670                         .integer = 1,
4671                 };
4672                 return snd_interval_refine(r, &t);
4673         } else if (c->max <= hdsp->ds_out_channels) {
4674                 struct snd_interval t = {
4675                         .min = 64000,
4676                         .max = 96000,
4677                         .integer = 1,
4678                 };
4679                 return snd_interval_refine(r, &t);
4680         }
4681         return 0;
4682 }
4683
4684 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4685                                              struct snd_pcm_hw_rule *rule)
4686 {
4687         struct hdsp *hdsp = rule->private;
4688         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4689         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4690         if (c->min >= hdsp->ss_in_channels) {
4691                 struct snd_interval t = {
4692                         .min = 32000,
4693                         .max = 48000,
4694                         .integer = 1,
4695                 };
4696                 return snd_interval_refine(r, &t);
4697         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4698                 struct snd_interval t = {
4699                         .min = 128000,
4700                         .max = 192000,
4701                         .integer = 1,
4702                 };
4703                 return snd_interval_refine(r, &t);
4704         } else if (c->max <= hdsp->ds_in_channels) {
4705                 struct snd_interval t = {
4706                         .min = 64000,
4707                         .max = 96000,
4708                         .integer = 1,
4709                 };
4710                 return snd_interval_refine(r, &t);
4711         }
4712         return 0;
4713 }
4714
4715 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4716 {
4717         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4718         struct snd_pcm_runtime *runtime = substream->runtime;
4719
4720         if (hdsp_check_for_iobox (hdsp))
4721                 return -EIO;
4722
4723         if (hdsp_check_for_firmware(hdsp, 1))
4724                 return -EIO;
4725
4726         spin_lock_irq(&hdsp->lock);
4727
4728         snd_pcm_set_sync(substream);
4729
4730         runtime->hw = snd_hdsp_playback_subinfo;
4731         runtime->dma_area = hdsp->playback_buffer;
4732         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4733
4734         hdsp->playback_pid = current->pid;
4735         hdsp->playback_substream = substream;
4736
4737         spin_unlock_irq(&hdsp->lock);
4738
4739         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4740         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4741         if (hdsp->clock_source_locked) {
4742                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4743         } else if (hdsp->io_type == H9632) {
4744                 runtime->hw.rate_max = 192000;
4745                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4746                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4747         }
4748         if (hdsp->io_type == H9632) {
4749                 runtime->hw.channels_min = hdsp->qs_out_channels;
4750                 runtime->hw.channels_max = hdsp->ss_out_channels;
4751         }
4752
4753         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4754                              snd_hdsp_hw_rule_out_channels, hdsp,
4755                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4756         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4757                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4758                              SNDRV_PCM_HW_PARAM_RATE, -1);
4759         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4760                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4761                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4762
4763         if (RPM != hdsp->io_type) {
4764                 hdsp->creg_spdif_stream = hdsp->creg_spdif;
4765                 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4766                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4767                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4768         }
4769         return 0;
4770 }
4771
4772 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4773 {
4774         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4775
4776         spin_lock_irq(&hdsp->lock);
4777
4778         hdsp->playback_pid = -1;
4779         hdsp->playback_substream = NULL;
4780
4781         spin_unlock_irq(&hdsp->lock);
4782
4783         if (RPM != hdsp->io_type) {
4784                 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4785                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4786                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4787         }
4788         return 0;
4789 }
4790
4791
4792 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4793 {
4794         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4795         struct snd_pcm_runtime *runtime = substream->runtime;
4796
4797         if (hdsp_check_for_iobox (hdsp))
4798                 return -EIO;
4799
4800         if (hdsp_check_for_firmware(hdsp, 1))
4801                 return -EIO;
4802
4803         spin_lock_irq(&hdsp->lock);
4804
4805         snd_pcm_set_sync(substream);
4806
4807         runtime->hw = snd_hdsp_capture_subinfo;
4808         runtime->dma_area = hdsp->capture_buffer;
4809         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4810
4811         hdsp->capture_pid = current->pid;
4812         hdsp->capture_substream = substream;
4813
4814         spin_unlock_irq(&hdsp->lock);
4815
4816         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4817         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4818         if (hdsp->io_type == H9632) {
4819                 runtime->hw.channels_min = hdsp->qs_in_channels;
4820                 runtime->hw.channels_max = hdsp->ss_in_channels;
4821                 runtime->hw.rate_max = 192000;
4822                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4823                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4824         }
4825         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4826                              snd_hdsp_hw_rule_in_channels, hdsp,
4827                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4828         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4829                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4830                              SNDRV_PCM_HW_PARAM_RATE, -1);
4831         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4832                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4833                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4834         return 0;
4835 }
4836
4837 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4838 {
4839         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4840
4841         spin_lock_irq(&hdsp->lock);
4842
4843         hdsp->capture_pid = -1;
4844         hdsp->capture_substream = NULL;
4845
4846         spin_unlock_irq(&hdsp->lock);
4847         return 0;
4848 }
4849
4850 /* helper functions for copying meter values */
4851 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4852 {
4853         u32 val = readl(src);
4854         return copy_to_user(dest, &val, 4);
4855 }
4856
4857 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4858 {
4859         u32 rms_low, rms_high;
4860         u64 rms;
4861         rms_low = readl(src_low);
4862         rms_high = readl(src_high);
4863         rms = ((u64)rms_high << 32) | rms_low;
4864         return copy_to_user(dest, &rms, 8);
4865 }
4866
4867 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4868 {
4869         u32 rms_low, rms_high;
4870         u64 rms;
4871         rms_low = readl(src_low) & 0xffffff00;
4872         rms_high = readl(src_high) & 0xffffff00;
4873         rms = ((u64)rms_high << 32) | rms_low;
4874         return copy_to_user(dest, &rms, 8);
4875 }
4876
4877 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4878 {
4879         int doublespeed = 0;
4880         int i, j, channels, ofs;
4881
4882         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4883                 doublespeed = 1;
4884         channels = doublespeed ? 14 : 26;
4885         for (i = 0, j = 0; i < 26; ++i) {
4886                 if (doublespeed && (i & 4))
4887                         continue;
4888                 ofs = HDSP_9652_peakBase - j * 4;
4889                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4890                         return -EFAULT;
4891                 ofs -= channels * 4;
4892                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4893                         return -EFAULT;
4894                 ofs -= channels * 4;
4895                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4896                         return -EFAULT;
4897                 ofs = HDSP_9652_rmsBase + j * 8;
4898                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4899                                 hdsp->iobase + ofs + 4))
4900                         return -EFAULT;
4901                 ofs += channels * 8;
4902                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4903                                 hdsp->iobase + ofs + 4))
4904                         return -EFAULT;
4905                 ofs += channels * 8;
4906                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4907                                 hdsp->iobase + ofs + 4))
4908                         return -EFAULT;
4909                 j++;
4910         }
4911         return 0;
4912 }
4913
4914 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4915 {
4916         int i, j;
4917         struct hdsp_9632_meters __iomem *m;
4918         int doublespeed = 0;
4919
4920         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4921                 doublespeed = 1;
4922         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4923         for (i = 0, j = 0; i < 16; ++i, ++j) {
4924                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4925                         return -EFAULT;
4926                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4927                         return -EFAULT;
4928                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4929                         return -EFAULT;
4930                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4931                                 &m->input_rms_high[j]))
4932                         return -EFAULT;
4933                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4934                                 &m->playback_rms_high[j]))
4935                         return -EFAULT;
4936                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4937                                 &m->output_rms_high[j]))
4938                         return -EFAULT;
4939                 if (doublespeed && i == 3) i += 4;
4940         }
4941         return 0;
4942 }
4943
4944 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4945 {
4946         int i;
4947
4948         for (i = 0; i < 26; i++) {
4949                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4950                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4951                         return -EFAULT;
4952                 if (copy_u32_le(&peak_rms->input_peaks[i],
4953                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4954                         return -EFAULT;
4955         }
4956         for (i = 0; i < 28; i++) {
4957                 if (copy_u32_le(&peak_rms->output_peaks[i],
4958                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4959                         return -EFAULT;
4960         }
4961         for (i = 0; i < 26; ++i) {
4962                 if (copy_u64_le(&peak_rms->playback_rms[i],
4963                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4964                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4965                         return -EFAULT;
4966                 if (copy_u64_le(&peak_rms->input_rms[i],
4967                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4968                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4969                         return -EFAULT;
4970         }
4971         return 0;
4972 }
4973
4974 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4975 {
4976         struct hdsp *hdsp = hw->private_data;
4977         void __user *argp = (void __user *)arg;
4978         int err;
4979
4980         switch (cmd) {
4981         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4982                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4983
4984                 err = hdsp_check_for_iobox(hdsp);
4985                 if (err < 0)
4986                         return err;
4987
4988                 err = hdsp_check_for_firmware(hdsp, 1);
4989                 if (err < 0)
4990                         return err;
4991
4992                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4993                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4994                         return -EINVAL;
4995                 }
4996
4997                 switch (hdsp->io_type) {
4998                 case H9652:
4999                         return hdsp_9652_get_peak(hdsp, peak_rms);
5000                 case H9632:
5001                         return hdsp_9632_get_peak(hdsp, peak_rms);
5002                 default:
5003                         return hdsp_get_peak(hdsp, peak_rms);
5004                 }
5005         }
5006         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
5007                 struct hdsp_config_info info;
5008                 unsigned long flags;
5009                 int i;
5010
5011                 err = hdsp_check_for_iobox(hdsp);
5012                 if (err < 0)
5013                         return err;
5014
5015                 err = hdsp_check_for_firmware(hdsp, 1);
5016                 if (err < 0)
5017                         return err;
5018
5019                 memset(&info, 0, sizeof(info));
5020                 spin_lock_irqsave(&hdsp->lock, flags);
5021                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
5022                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
5023                 if (hdsp->io_type != H9632)
5024                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
5025                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
5026                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i)
5027                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
5028                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
5029                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
5030                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
5031                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
5032                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
5033                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
5034                 info.system_sample_rate = hdsp->system_sample_rate;
5035                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
5036                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
5037                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
5038                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
5039                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
5040                 if (hdsp->io_type == H9632) {
5041                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
5042                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
5043                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
5044                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
5045
5046                 } else if (hdsp->io_type == RPM) {
5047                         info.da_gain = (unsigned char) hdsp_rpm_input12(hdsp);
5048                         info.ad_gain = (unsigned char) hdsp_rpm_input34(hdsp);
5049                 }
5050                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
5051                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
5052                 spin_unlock_irqrestore(&hdsp->lock, flags);
5053                 if (copy_to_user(argp, &info, sizeof(info)))
5054                         return -EFAULT;
5055                 break;
5056         }
5057         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
5058                 struct hdsp_9632_aeb h9632_aeb;
5059
5060                 if (hdsp->io_type != H9632) return -EINVAL;
5061                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
5062                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
5063                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
5064                         return -EFAULT;
5065                 break;
5066         }
5067         case SNDRV_HDSP_IOCTL_GET_VERSION: {
5068                 struct hdsp_version hdsp_version;
5069                 int err;
5070
5071                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5072                 if (hdsp->io_type == Undefined) {
5073                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5074                                 return err;
5075                 }
5076                 hdsp_version.io_type = hdsp->io_type;
5077                 hdsp_version.firmware_rev = hdsp->firmware_rev;
5078                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
5079                         return -EFAULT;
5080                 break;
5081         }
5082         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
5083                 struct hdsp_firmware __user *firmware;
5084                 u32 __user *firmware_data;
5085                 int err;
5086
5087                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
5088                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
5089                 if (hdsp->io_type == Undefined) return -EINVAL;
5090
5091                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
5092                         return -EBUSY;
5093
5094                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
5095                 firmware = (struct hdsp_firmware __user *)argp;
5096
5097                 if (get_user(firmware_data, &firmware->firmware_data))
5098                         return -EFAULT;
5099
5100                 if (hdsp_check_for_iobox (hdsp))
5101                         return -EIO;
5102
5103                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
5104                         return -EFAULT;
5105
5106                 hdsp->state |= HDSP_FirmwareCached;
5107
5108                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5109                         return err;
5110
5111                 if (!(hdsp->state & HDSP_InitializationComplete)) {
5112                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5113                                 return err;
5114
5115                         snd_hdsp_initialize_channels(hdsp);
5116                         snd_hdsp_initialize_midi_flush(hdsp);
5117
5118                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5119                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5120                                 return err;
5121                         }
5122                 }
5123                 break;
5124         }
5125         case SNDRV_HDSP_IOCTL_GET_MIXER: {
5126                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
5127                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
5128                         return -EFAULT;
5129                 break;
5130         }
5131         default:
5132                 return -EINVAL;
5133         }
5134         return 0;
5135 }
5136
5137 static struct snd_pcm_ops snd_hdsp_playback_ops = {
5138         .open =         snd_hdsp_playback_open,
5139         .close =        snd_hdsp_playback_release,
5140         .ioctl =        snd_hdsp_ioctl,
5141         .hw_params =    snd_hdsp_hw_params,
5142         .prepare =      snd_hdsp_prepare,
5143         .trigger =      snd_hdsp_trigger,
5144         .pointer =      snd_hdsp_hw_pointer,
5145         .copy =         snd_hdsp_playback_copy,
5146         .silence =      snd_hdsp_hw_silence,
5147 };
5148
5149 static struct snd_pcm_ops snd_hdsp_capture_ops = {
5150         .open =         snd_hdsp_capture_open,
5151         .close =        snd_hdsp_capture_release,
5152         .ioctl =        snd_hdsp_ioctl,
5153         .hw_params =    snd_hdsp_hw_params,
5154         .prepare =      snd_hdsp_prepare,
5155         .trigger =      snd_hdsp_trigger,
5156         .pointer =      snd_hdsp_hw_pointer,
5157         .copy =         snd_hdsp_capture_copy,
5158 };
5159
5160 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
5161 {
5162         struct snd_hwdep *hw;
5163         int err;
5164
5165         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
5166                 return err;
5167
5168         hdsp->hwdep = hw;
5169         hw->private_data = hdsp;
5170         strcpy(hw->name, "HDSP hwdep interface");
5171
5172         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
5173
5174         return 0;
5175 }
5176
5177 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
5178 {
5179         struct snd_pcm *pcm;
5180         int err;
5181
5182         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
5183                 return err;
5184
5185         hdsp->pcm = pcm;
5186         pcm->private_data = hdsp;
5187         strcpy(pcm->name, hdsp->card_name);
5188
5189         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
5190         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
5191
5192         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
5193
5194         return 0;
5195 }
5196
5197 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
5198 {
5199         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
5200         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
5201 }
5202
5203 static int snd_hdsp_enable_io (struct hdsp *hdsp)
5204 {
5205         int i;
5206
5207         if (hdsp_fifo_wait (hdsp, 0, 100)) {
5208                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
5209                 return -EIO;
5210         }
5211
5212         for (i = 0; i < hdsp->max_channels; ++i) {
5213                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
5214                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
5215         }
5216
5217         return 0;
5218 }
5219
5220 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
5221 {
5222         int status, aebi_channels, aebo_channels;
5223
5224         switch (hdsp->io_type) {
5225         case Digiface:
5226                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
5227                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
5228                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
5229                 break;
5230
5231         case H9652:
5232                 hdsp->card_name = "RME Hammerfall HDSP 9652";
5233                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
5234                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
5235                 break;
5236
5237         case H9632:
5238                 status = hdsp_read(hdsp, HDSP_statusRegister);
5239                 /* HDSP_AEBx bits are low when AEB are connected */
5240                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
5241                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
5242                 hdsp->card_name = "RME Hammerfall HDSP 9632";
5243                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
5244                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
5245                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
5246                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
5247                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
5248                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
5249                 break;
5250
5251         case Multiface:
5252                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
5253                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
5254                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
5255                 break;
5256
5257         case RPM:
5258                 hdsp->card_name = "RME Hammerfall DSP + RPM";
5259                 hdsp->ss_in_channels = RPM_CHANNELS-1;
5260                 hdsp->ss_out_channels = RPM_CHANNELS;
5261                 hdsp->ds_in_channels = RPM_CHANNELS-1;
5262                 hdsp->ds_out_channels = RPM_CHANNELS;
5263                 break;
5264
5265         default:
5266                 /* should never get here */
5267                 break;
5268         }
5269 }
5270
5271 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
5272 {
5273         snd_hdsp_flush_midi_input (hdsp, 0);
5274         snd_hdsp_flush_midi_input (hdsp, 1);
5275 }
5276
5277 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
5278 {
5279         int err;
5280
5281         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
5282                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
5283                 return err;
5284         }
5285
5286
5287         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
5288                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
5289                 return err;
5290         }
5291
5292         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
5293                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
5294                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
5295                         return err;
5296                 }
5297         }
5298
5299         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
5300                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
5301                 return err;
5302         }
5303
5304         snd_hdsp_proc_init(hdsp);
5305
5306         hdsp->system_sample_rate = -1;
5307         hdsp->playback_pid = -1;
5308         hdsp->capture_pid = -1;
5309         hdsp->capture_substream = NULL;
5310         hdsp->playback_substream = NULL;
5311
5312         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
5313                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
5314                 return err;
5315         }
5316
5317         if (!(hdsp->state & HDSP_InitializationComplete)) {
5318                 strcpy(card->shortname, "Hammerfall DSP");
5319                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5320                         hdsp->port, hdsp->irq);
5321
5322                 if ((err = snd_card_register(card)) < 0) {
5323                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
5324                         return err;
5325                 }
5326                 hdsp->state |= HDSP_InitializationComplete;
5327         }
5328
5329         return 0;
5330 }
5331
5332 #ifdef HDSP_FW_LOADER
5333 /* load firmware via hotplug fw loader */
5334 static int hdsp_request_fw_loader(struct hdsp *hdsp)
5335 {
5336         const char *fwfile;
5337         const struct firmware *fw;
5338         int err;
5339
5340         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5341                 return 0;
5342         if (hdsp->io_type == Undefined) {
5343                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5344                         return err;
5345                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5346                         return 0;
5347         }
5348
5349         /* caution: max length of firmware filename is 30! */
5350         switch (hdsp->io_type) {
5351         case RPM:
5352                 fwfile = "rpm_firmware.bin";
5353                 break;
5354         case Multiface:
5355                 if (hdsp->firmware_rev == 0xa)
5356                         fwfile = "multiface_firmware.bin";
5357                 else
5358                         fwfile = "multiface_firmware_rev11.bin";
5359                 break;
5360         case Digiface:
5361                 if (hdsp->firmware_rev == 0xa)
5362                         fwfile = "digiface_firmware.bin";
5363                 else
5364                         fwfile = "digiface_firmware_rev11.bin";
5365                 break;
5366         default:
5367                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
5368                 return -EINVAL;
5369         }
5370
5371         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
5372                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
5373                 return -ENOENT;
5374         }
5375         if (fw->size < sizeof(hdsp->firmware_cache)) {
5376                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
5377                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
5378                 release_firmware(fw);
5379                 return -EINVAL;
5380         }
5381
5382         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
5383
5384         release_firmware(fw);
5385
5386         hdsp->state |= HDSP_FirmwareCached;
5387
5388         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5389                 return err;
5390
5391         if (!(hdsp->state & HDSP_InitializationComplete)) {
5392                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5393                         return err;
5394
5395                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
5396                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
5397                         return err;
5398                 }
5399                 snd_hdsp_initialize_channels(hdsp);
5400                 snd_hdsp_initialize_midi_flush(hdsp);
5401                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5402                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5403                         return err;
5404                 }
5405         }
5406         return 0;
5407 }
5408 #endif
5409
5410 static int __devinit snd_hdsp_create(struct snd_card *card,
5411                                      struct hdsp *hdsp)
5412 {
5413         struct pci_dev *pci = hdsp->pci;
5414         int err;
5415         int is_9652 = 0;
5416         int is_9632 = 0;
5417
5418         hdsp->irq = -1;
5419         hdsp->state = 0;
5420         hdsp->midi[0].rmidi = NULL;
5421         hdsp->midi[1].rmidi = NULL;
5422         hdsp->midi[0].input = NULL;
5423         hdsp->midi[1].input = NULL;
5424         hdsp->midi[0].output = NULL;
5425         hdsp->midi[1].output = NULL;
5426         hdsp->midi[0].pending = 0;
5427         hdsp->midi[1].pending = 0;
5428         spin_lock_init(&hdsp->midi[0].lock);
5429         spin_lock_init(&hdsp->midi[1].lock);
5430         hdsp->iobase = NULL;
5431         hdsp->control_register = 0;
5432         hdsp->control2_register = 0;
5433         hdsp->io_type = Undefined;
5434         hdsp->max_channels = 26;
5435
5436         hdsp->card = card;
5437
5438         spin_lock_init(&hdsp->lock);
5439
5440         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5441
5442         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5443         hdsp->firmware_rev &= 0xff;
5444
5445         /* From Martin Bjoernsen :
5446             "It is important that the card's latency timer register in
5447             the PCI configuration space is set to a value much larger
5448             than 0 by the computer's BIOS or the driver.
5449             The windows driver always sets this 8 bit register [...]
5450             to its maximum 255 to avoid problems with some computers."
5451         */
5452         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5453
5454         strcpy(card->driver, "H-DSP");
5455         strcpy(card->mixername, "Xilinx FPGA");
5456
5457         if (hdsp->firmware_rev < 0xa)
5458                 return -ENODEV;
5459         else if (hdsp->firmware_rev < 0x64)
5460                 hdsp->card_name = "RME Hammerfall DSP";
5461         else if (hdsp->firmware_rev < 0x96) {
5462                 hdsp->card_name = "RME HDSP 9652";
5463                 is_9652 = 1;
5464         } else {
5465                 hdsp->card_name = "RME HDSP 9632";
5466                 hdsp->max_channels = 16;
5467                 is_9632 = 1;
5468         }
5469
5470         if ((err = pci_enable_device(pci)) < 0)
5471                 return err;
5472
5473         pci_set_master(hdsp->pci);
5474
5475         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5476                 return err;
5477         hdsp->port = pci_resource_start(pci, 0);
5478         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5479                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5480                 return -EBUSY;
5481         }
5482
5483         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5484                         KBUILD_MODNAME, hdsp)) {
5485                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5486                 return -EBUSY;
5487         }
5488
5489         hdsp->irq = pci->irq;
5490         hdsp->precise_ptr = 0;
5491         hdsp->use_midi_tasklet = 1;
5492         hdsp->dds_value = 0;
5493
5494         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5495                 return err;
5496
5497         if (!is_9652 && !is_9632) {
5498                 /* we wait a maximum of 10 seconds to let freshly
5499                  * inserted cardbus cards do their hardware init */
5500                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5501
5502                 if (err < 0)
5503                         return err;
5504
5505                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5506 #ifdef HDSP_FW_LOADER
5507                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5508                                 /* we don't fail as this can happen
5509                                    if userspace is not ready for
5510                                    firmware upload
5511                                 */
5512                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5513                         else
5514                                 /* init is complete, we return */
5515                                 return 0;
5516 #endif
5517                         /* we defer initialization */
5518                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5519                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5520                                 return err;
5521                         return 0;
5522                 } else {
5523                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5524                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
5525                                 hdsp->io_type = RPM;
5526                         else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5527                                 hdsp->io_type = Multiface;
5528                         else
5529                                 hdsp->io_type = Digiface;
5530                 }
5531         }
5532
5533         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5534                 return err;
5535
5536         if (is_9652)
5537                 hdsp->io_type = H9652;
5538
5539         if (is_9632)
5540                 hdsp->io_type = H9632;
5541
5542         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5543                 return err;
5544
5545         snd_hdsp_initialize_channels(hdsp);
5546         snd_hdsp_initialize_midi_flush(hdsp);
5547
5548         hdsp->state |= HDSP_FirmwareLoaded;
5549
5550         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5551                 return err;
5552
5553         return 0;
5554 }
5555
5556 static int snd_hdsp_free(struct hdsp *hdsp)
5557 {
5558         if (hdsp->port) {
5559                 /* stop the audio, and cancel all interrupts */
5560                 tasklet_kill(&hdsp->midi_tasklet);
5561                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5562                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5563         }
5564
5565         if (hdsp->irq >= 0)
5566                 free_irq(hdsp->irq, (void *)hdsp);
5567
5568         snd_hdsp_free_buffers(hdsp);
5569
5570         if (hdsp->iobase)
5571                 iounmap(hdsp->iobase);
5572
5573         if (hdsp->port)
5574                 pci_release_regions(hdsp->pci);
5575
5576         pci_disable_device(hdsp->pci);
5577         return 0;
5578 }
5579
5580 static void snd_hdsp_card_free(struct snd_card *card)
5581 {
5582         struct hdsp *hdsp = card->private_data;
5583
5584         if (hdsp)
5585                 snd_hdsp_free(hdsp);
5586 }
5587
5588 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5589                                     const struct pci_device_id *pci_id)
5590 {
5591         static int dev;
5592         struct hdsp *hdsp;
5593         struct snd_card *card;
5594         int err;
5595
5596         if (dev >= SNDRV_CARDS)
5597                 return -ENODEV;
5598         if (!enable[dev]) {
5599                 dev++;
5600                 return -ENOENT;
5601         }
5602
5603         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5604                               sizeof(struct hdsp), &card);
5605         if (err < 0)
5606                 return err;
5607
5608         hdsp = card->private_data;
5609         card->private_free = snd_hdsp_card_free;
5610         hdsp->dev = dev;
5611         hdsp->pci = pci;
5612         snd_card_set_dev(card, &pci->dev);
5613
5614         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5615                 snd_card_free(card);
5616                 return err;
5617         }
5618
5619         strcpy(card->shortname, "Hammerfall DSP");
5620         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5621                 hdsp->port, hdsp->irq);
5622
5623         if ((err = snd_card_register(card)) < 0) {
5624                 snd_card_free(card);
5625                 return err;
5626         }
5627         pci_set_drvdata(pci, card);
5628         dev++;
5629         return 0;
5630 }
5631
5632 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5633 {
5634         snd_card_free(pci_get_drvdata(pci));
5635         pci_set_drvdata(pci, NULL);
5636 }
5637
5638 static struct pci_driver driver = {
5639         .name =     KBUILD_MODNAME,
5640         .id_table = snd_hdsp_ids,
5641         .probe =    snd_hdsp_probe,
5642         .remove = __devexit_p(snd_hdsp_remove),
5643 };
5644
5645 static int __init alsa_card_hdsp_init(void)
5646 {
5647         return pci_register_driver(&driver);
5648 }
5649
5650 static void __exit alsa_card_hdsp_exit(void)
5651 {
5652         pci_unregister_driver(&driver);
5653 }
5654
5655 module_init(alsa_card_hdsp_init)
5656 module_exit(alsa_card_hdsp_exit)