arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 351
 352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 353 {
 354         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 355                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 356         else
 357                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 358 }
 359
 360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 361 {
 362         kvm_make_request(KVM_REQ_EVENT, vcpu);
 363         vcpu->arch.nmi_pending = 1;
 364 }
 365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 366
 367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 368 {
 369         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 370 }
 371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 372
 373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 374 {
 375         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 376 }
 377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 378
 379 /*
 380  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 381  * a #GP and return false.
 382  */
 383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 384 {
 385         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 386                 return true;
 387         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 388         return false;
 389 }
 390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 391
 392 /*
 393  * This function will be used to read from the physical memory of the currently
 394  * running guest. The difference to kvm_read_guest_page is that this function
 395  * can read from guest physical or from the guest's guest physical memory.
 396  */
 397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 398                             gfn_t ngfn, void *data, int offset, int len,
 399                             u32 access)
 400 {
 401         gfn_t real_gfn;
 402         gpa_t ngpa;
 403
 404         ngpa     = gfn_to_gpa(ngfn);
 405         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 406         if (real_gfn == UNMAPPED_GVA)
 407                 return -EFAULT;
 408
 409         real_gfn = gpa_to_gfn(real_gfn);
 410
 411         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 412 }
 413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 414
 415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 416                                void *data, int offset, int len, u32 access)
 417 {
 418         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 419                                        data, offset, len, access);
 420 }
 421
 422 /*
 423  * Load the pae pdptrs.  Return true is they are all valid.
 424  */
 425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 426 {
 427         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 428         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 429         int i;
 430         int ret;
 431         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 432
 433         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 434                                       offset * sizeof(u64), sizeof(pdpte),
 435                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 436         if (ret < 0) {
 437                 ret = 0;
 438                 goto out;
 439         }
 440         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 441                 if (is_present_gpte(pdpte[i]) &&
 442                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 443                         ret = 0;
 444                         goto out;
 445                 }
 446         }
 447         ret = 1;
 448
 449         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 450         __set_bit(VCPU_EXREG_PDPTR,
 451                   (unsigned long *)&vcpu->arch.regs_avail);
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_dirty);
 454 out:
 455
 456         return ret;
 457 }
 458 EXPORT_SYMBOL_GPL(load_pdptrs);
 459
 460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 461 {
 462         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 463         bool changed = true;
 464         int offset;
 465         gfn_t gfn;
 466         int r;
 467
 468         if (is_long_mode(vcpu) || !is_pae(vcpu))
 469                 return false;
 470
 471         if (!test_bit(VCPU_EXREG_PDPTR,
 472                       (unsigned long *)&vcpu->arch.regs_avail))
 473                 return true;
 474
 475         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 476         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 477         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 478                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 479         if (r < 0)
 480                 goto out;
 481         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 482 out:
 483
 484         return changed;
 485 }
 486
 487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 488 {
 489         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 490         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 491                                     X86_CR0_CD | X86_CR0_NW;
 492
 493         cr0 |= X86_CR0_ET;
 494
 495 #ifdef CONFIG_X86_64
 496         if (cr0 & 0xffffffff00000000UL)
 497                 return 1;
 498 #endif
 499
 500         cr0 &= ~CR0_RESERVED_BITS;
 501
 502         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 503                 return 1;
 504
 505         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 506                 return 1;
 507
 508         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 509 #ifdef CONFIG_X86_64
 510                 if ((vcpu->arch.efer & EFER_LME)) {
 511                         int cs_db, cs_l;
 512
 513                         if (!is_pae(vcpu))
 514                                 return 1;
 515                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 516                         if (cs_l)
 517                                 return 1;
 518                 } else
 519 #endif
 520                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 521                                                  kvm_read_cr3(vcpu)))
 522                         return 1;
 523         }
 524
 525         kvm_x86_ops->set_cr0(vcpu, cr0);
 526
 527         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 528                 kvm_clear_async_pf_completion_queue(vcpu);
 529                 kvm_async_pf_hash_reset(vcpu);
 530         }
 531
 532         if ((cr0 ^ old_cr0) & update_bits)
 533                 kvm_mmu_reset_context(vcpu);
 534         return 0;
 535 }
 536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 537
 538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 539 {
 540         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 541 }
 542 EXPORT_SYMBOL_GPL(kvm_lmsw);
 543
 544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 545 {
 546         u64 xcr0;
 547
 548         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 549         if (index != XCR_XFEATURE_ENABLED_MASK)
 550                 return 1;
 551         xcr0 = xcr;
 552         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 553                 return 1;
 554         if (!(xcr0 & XSTATE_FP))
 555                 return 1;
 556         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 557                 return 1;
 558         if (xcr0 & ~host_xcr0)
 559                 return 1;
 560         vcpu->arch.xcr0 = xcr0;
 561         vcpu->guest_xcr0_loaded = 0;
 562         return 0;
 563 }
 564
 565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 566 {
 567         if (__kvm_set_xcr(vcpu, index, xcr)) {
 568                 kvm_inject_gp(vcpu, 0);
 569                 return 1;
 570         }
 571         return 0;
 572 }
 573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 574
 575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 576 {
 577         struct kvm_cpuid_entry2 *best;
 578
 579         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 580         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 581 }
 582
 583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 584 {
 585         struct kvm_cpuid_entry2 *best;
 586
 587         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 588         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 589 }
 590
 591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 592 {
 593         struct kvm_cpuid_entry2 *best;
 594
 595         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 596         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 597 }
 598
 599 static void update_cpuid(struct kvm_vcpu *vcpu)
 600 {
 601         struct kvm_cpuid_entry2 *best;
 602
 603         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 604         if (!best)
 605                 return;
 606
 607         /* Update OSXSAVE bit */
 608         if (cpu_has_xsave && best->function == 0x1) {
 609                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 610                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 611                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 612         }
 613 }
 614
 615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 616 {
 617         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 618         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 619                                    X86_CR4_PAE | X86_CR4_SMEP;
 620         if (cr4 & CR4_RESERVED_BITS)
 621                 return 1;
 622
 623         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 624                 return 1;
 625
 626         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 627                 return 1;
 628
 629         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 630                 return 1;
 631
 632         if (is_long_mode(vcpu)) {
 633                 if (!(cr4 & X86_CR4_PAE))
 634                         return 1;
 635         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 636                    && ((cr4 ^ old_cr4) & pdptr_bits)
 637                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 638                                    kvm_read_cr3(vcpu)))
 639                 return 1;
 640
 641         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 642                 return 1;
 643
 644         if ((cr4 ^ old_cr4) & pdptr_bits)
 645                 kvm_mmu_reset_context(vcpu);
 646
 647         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 648                 update_cpuid(vcpu);
 649
 650         return 0;
 651 }
 652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 653
 654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 655 {
 656         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 657                 kvm_mmu_sync_roots(vcpu);
 658                 kvm_mmu_flush_tlb(vcpu);
 659                 return 0;
 660         }
 661
 662         if (is_long_mode(vcpu)) {
 663                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 664                         return 1;
 665         } else {
 666                 if (is_pae(vcpu)) {
 667                         if (cr3 & CR3_PAE_RESERVED_BITS)
 668                                 return 1;
 669                         if (is_paging(vcpu) &&
 670                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 671                                 return 1;
 672                 }
 673                 /*
 674                  * We don't check reserved bits in nonpae mode, because
 675                  * this isn't enforced, and VMware depends on this.
 676                  */
 677         }
 678
 679         /*
 680          * Does the new cr3 value map to physical memory? (Note, we
 681          * catch an invalid cr3 even in real-mode, because it would
 682          * cause trouble later on when we turn on paging anyway.)
 683          *
 684          * A real CPU would silently accept an invalid cr3 and would
 685          * attempt to use it - with largely undefined (and often hard
 686          * to debug) behavior on the guest side.
 687          */
 688         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 689                 return 1;
 690         vcpu->arch.cr3 = cr3;
 691         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 692         vcpu->arch.mmu.new_cr3(vcpu);
 693         return 0;
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 696
 697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 698 {
 699         if (cr8 & CR8_RESERVED_BITS)
 700                 return 1;
 701         if (irqchip_in_kernel(vcpu->kvm))
 702                 kvm_lapic_set_tpr(vcpu, cr8);
 703         else
 704                 vcpu->arch.cr8 = cr8;
 705         return 0;
 706 }
 707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 708
 709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 710 {
 711         if (irqchip_in_kernel(vcpu->kvm))
 712                 return kvm_lapic_get_cr8(vcpu);
 713         else
 714                 return vcpu->arch.cr8;
 715 }
 716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 717
 718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         switch (dr) {
 721         case 0 ... 3:
 722                 vcpu->arch.db[dr] = val;
 723                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 724                         vcpu->arch.eff_db[dr] = val;
 725                 break;
 726         case 4:
 727                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 728                         return 1; /* #UD */
 729                 /* fall through */
 730         case 6:
 731                 if (val & 0xffffffff00000000ULL)
 732                         return -1; /* #GP */
 733                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 734                 break;
 735         case 5:
 736                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 737                         return 1; /* #UD */
 738                 /* fall through */
 739         default: /* 7 */
 740                 if (val & 0xffffffff00000000ULL)
 741                         return -1; /* #GP */
 742                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 743                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 744                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 745                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 746                 }
 747                 break;
 748         }
 749
 750         return 0;
 751 }
 752
 753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 754 {
 755         int res;
 756
 757         res = __kvm_set_dr(vcpu, dr, val);
 758         if (res > 0)
 759                 kvm_queue_exception(vcpu, UD_VECTOR);
 760         else if (res < 0)
 761                 kvm_inject_gp(vcpu, 0);
 762
 763         return res;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_set_dr);
 766
 767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 768 {
 769         switch (dr) {
 770         case 0 ... 3:
 771                 *val = vcpu->arch.db[dr];
 772                 break;
 773         case 4:
 774                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 775                         return 1;
 776                 /* fall through */
 777         case 6:
 778                 *val = vcpu->arch.dr6;
 779                 break;
 780         case 5:
 781                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 782                         return 1;
 783                 /* fall through */
 784         default: /* 7 */
 785                 *val = vcpu->arch.dr7;
 786                 break;
 787         }
 788
 789         return 0;
 790 }
 791
 792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 793 {
 794         if (_kvm_get_dr(vcpu, dr, val)) {
 795                 kvm_queue_exception(vcpu, UD_VECTOR);
 796                 return 1;
 797         }
 798         return 0;
 799 }
 800 EXPORT_SYMBOL_GPL(kvm_get_dr);
 801
 802 /*
 803  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 804  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 805  *
 806  * This list is modified at module load time to reflect the
 807  * capabilities of the host cpu. This capabilities test skips MSRs that are
 808  * kvm-specific. Those are put in the beginning of the list.
 809  */
 810
 811 #define KVM_SAVE_MSRS_BEGIN     9
 812 static u32 msrs_to_save[] = {
 813         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 814         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 815         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 816         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 817         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 818         MSR_STAR,
 819 #ifdef CONFIG_X86_64
 820         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 821 #endif
 822         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 823 };
 824
 825 static unsigned num_msrs_to_save;
 826
 827 static u32 emulated_msrs[] = {
 828         MSR_IA32_MISC_ENABLE,
 829         MSR_IA32_MCG_STATUS,
 830         MSR_IA32_MCG_CTL,
 831 };
 832
 833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 834 {
 835         u64 old_efer = vcpu->arch.efer;
 836
 837         if (efer & efer_reserved_bits)
 838                 return 1;
 839
 840         if (is_paging(vcpu)
 841             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 842                 return 1;
 843
 844         if (efer & EFER_FFXSR) {
 845                 struct kvm_cpuid_entry2 *feat;
 846
 847                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 848                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 849                         return 1;
 850         }
 851
 852         if (efer & EFER_SVME) {
 853                 struct kvm_cpuid_entry2 *feat;
 854
 855                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 856                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 857                         return 1;
 858         }
 859
 860         efer &= ~EFER_LMA;
 861         efer |= vcpu->arch.efer & EFER_LMA;
 862
 863         kvm_x86_ops->set_efer(vcpu, efer);
 864
 865         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 866
 867         /* Update reserved bits */
 868         if ((efer ^ old_efer) & EFER_NX)
 869                 kvm_mmu_reset_context(vcpu);
 870
 871         return 0;
 872 }
 873
 874 void kvm_enable_efer_bits(u64 mask)
 875 {
 876        efer_reserved_bits &= ~mask;
 877 }
 878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 879
 880
 881 /*
 882  * Writes msr value into into the appropriate "register".
 883  * Returns 0 on success, non-0 otherwise.
 884  * Assumes vcpu_load() was already called.
 885  */
 886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 887 {
 888         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 889 }
 890
 891 /*
 892  * Adapt set_msr() to msr_io()'s calling convention
 893  */
 894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 895 {
 896         return kvm_set_msr(vcpu, index, *data);
 897 }
 898
 899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 900 {
 901         int version;
 902         int r;
 903         struct pvclock_wall_clock wc;
 904         struct timespec boot;
 905
 906         if (!wall_clock)
 907                 return;
 908
 909         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 910         if (r)
 911                 return;
 912
 913         if (version & 1)
 914                 ++version;  /* first time write, random junk */
 915
 916         ++version;
 917
 918         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 919
 920         /*
 921          * The guest calculates current wall clock time by adding
 922          * system time (updated by kvm_guest_time_update below) to the
 923          * wall clock specified here.  guest system time equals host
 924          * system time for us, thus we must fill in host boot time here.
 925          */
 926         getboottime(&boot);
 927
 928         wc.sec = boot.tv_sec;
 929         wc.nsec = boot.tv_nsec;
 930         wc.version = version;
 931
 932         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 933
 934         version++;
 935         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 936 }
 937
 938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 939 {
 940         uint32_t quotient, remainder;
 941
 942         /* Don't try to replace with do_div(), this one calculates
 943          * "(dividend << 32) / divisor" */
 944         __asm__ ( "divl %4"
 945                   : "=a" (quotient), "=d" (remainder)
 946                   : "0" (0), "1" (dividend), "r" (divisor) );
 947         return quotient;
 948 }
 949
 950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 951                                s8 *pshift, u32 *pmultiplier)
 952 {
 953         uint64_t scaled64;
 954         int32_t  shift = 0;
 955         uint64_t tps64;
 956         uint32_t tps32;
 957
 958         tps64 = base_khz * 1000LL;
 959         scaled64 = scaled_khz * 1000LL;
 960         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 961                 tps64 >>= 1;
 962                 shift--;
 963         }
 964
 965         tps32 = (uint32_t)tps64;
 966         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 967                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 968                         scaled64 >>= 1;
 969                 else
 970                         tps32 <<= 1;
 971                 shift++;
 972         }
 973
 974         *pshift = shift;
 975         *pmultiplier = div_frac(scaled64, tps32);
 976
 977         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 978                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 979 }
 980
 981 static inline u64 get_kernel_ns(void)
 982 {
 983         struct timespec ts;
 984
 985         WARN_ON(preemptible());
 986         ktime_get_ts(&ts);
 987         monotonic_to_bootbased(&ts);
 988         return timespec_to_ns(&ts);
 989 }
 990
 991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 992 unsigned long max_tsc_khz;
 993
 994 static inline int kvm_tsc_changes_freq(void)
 995 {
 996         int cpu = get_cpu();
 997         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 998                   cpufreq_quick_get(cpu) != 0;
 999         put_cpu();
1000         return ret;
1001 }
1002
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1004 {
1005         if (vcpu->arch.virtual_tsc_khz)
1006                 return vcpu->arch.virtual_tsc_khz;
1007         else
1008                 return __this_cpu_read(cpu_tsc_khz);
1009 }
1010
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1012 {
1013         u64 ret;
1014
1015         WARN_ON(preemptible());
1016         if (kvm_tsc_changes_freq())
1017                 printk_once(KERN_WARNING
1018                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019         ret = nsec * vcpu_tsc_khz(vcpu);
1020         do_div(ret, USEC_PER_SEC);
1021         return ret;
1022 }
1023
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1025 {
1026         /* Compute a scale to convert nanoseconds in TSC cycles */
1027         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028                            &vcpu->arch.tsc_catchup_shift,
1029                            &vcpu->arch.tsc_catchup_mult);
1030 }
1031
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1033 {
1034         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035                                       vcpu->arch.tsc_catchup_mult,
1036                                       vcpu->arch.tsc_catchup_shift);
1037         tsc += vcpu->arch.last_tsc_write;
1038         return tsc;
1039 }
1040
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1042 {
1043         struct kvm *kvm = vcpu->kvm;
1044         u64 offset, ns, elapsed;
1045         unsigned long flags;
1046         s64 sdiff;
1047
1048         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050         ns = get_kernel_ns();
1051         elapsed = ns - kvm->arch.last_tsc_nsec;
1052         sdiff = data - kvm->arch.last_tsc_write;
1053         if (sdiff < 0)
1054                 sdiff = -sdiff;
1055
1056         /*
1057          * Special case: close write to TSC within 5 seconds of
1058          * another CPU is interpreted as an attempt to synchronize
1059          * The 5 seconds is to accommodate host load / swapping as
1060          * well as any reset of TSC during the boot process.
1061          *
1062          * In that case, for a reliable TSC, we can match TSC offsets,
1063          * or make a best guest using elapsed value.
1064          */
1065         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066             elapsed < 5ULL * NSEC_PER_SEC) {
1067                 if (!check_tsc_unstable()) {
1068                         offset = kvm->arch.last_tsc_offset;
1069                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1070                 } else {
1071                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1072                         offset += delta;
1073                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1074                 }
1075                 ns = kvm->arch.last_tsc_nsec;
1076         }
1077         kvm->arch.last_tsc_nsec = ns;
1078         kvm->arch.last_tsc_write = data;
1079         kvm->arch.last_tsc_offset = offset;
1080         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1082
1083         /* Reset of TSC must disable overshoot protection below */
1084         vcpu->arch.hv_clock.tsc_timestamp = 0;
1085         vcpu->arch.last_tsc_write = data;
1086         vcpu->arch.last_tsc_nsec = ns;
1087 }
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1089
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1091 {
1092         unsigned long flags;
1093         struct kvm_vcpu_arch *vcpu = &v->arch;
1094         void *shared_kaddr;
1095         unsigned long this_tsc_khz;
1096         s64 kernel_ns, max_kernel_ns;
1097         u64 tsc_timestamp;
1098
1099         /* Keep irq disabled to prevent changes to the clock */
1100         local_irq_save(flags);
1101         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102         kernel_ns = get_kernel_ns();
1103         this_tsc_khz = vcpu_tsc_khz(v);
1104         if (unlikely(this_tsc_khz == 0)) {
1105                 local_irq_restore(flags);
1106                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1107                 return 1;
1108         }
1109
1110         /*
1111          * We may have to catch up the TSC to match elapsed wall clock
1112          * time for two reasons, even if kvmclock is used.
1113          *   1) CPU could have been running below the maximum TSC rate
1114          *   2) Broken TSC compensation resets the base at each VCPU
1115          *      entry to avoid unknown leaps of TSC even when running
1116          *      again on the same CPU.  This may cause apparent elapsed
1117          *      time to disappear, and the guest to stand still or run
1118          *      very slowly.
1119          */
1120         if (vcpu->tsc_catchup) {
1121                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122                 if (tsc > tsc_timestamp) {
1123                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124                         tsc_timestamp = tsc;
1125                 }
1126         }
1127
1128         local_irq_restore(flags);
1129
1130         if (!vcpu->time_page)
1131                 return 0;
1132
1133         /*
1134          * Time as measured by the TSC may go backwards when resetting the base
1135          * tsc_timestamp.  The reason for this is that the TSC resolution is
1136          * higher than the resolution of the other clock scales.  Thus, many
1137          * possible measurments of the TSC correspond to one measurement of any
1138          * other clock, and so a spread of values is possible.  This is not a
1139          * problem for the computation of the nanosecond clock; with TSC rates
1140          * around 1GHZ, there can only be a few cycles which correspond to one
1141          * nanosecond value, and any path through this code will inevitably
1142          * take longer than that.  However, with the kernel_ns value itself,
1143          * the precision may be much lower, down to HZ granularity.  If the
1144          * first sampling of TSC against kernel_ns ends in the low part of the
1145          * range, and the second in the high end of the range, we can get:
1146          *
1147          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1148          *
1149          * As the sampling errors potentially range in the thousands of cycles,
1150          * it is possible such a time value has already been observed by the
1151          * guest.  To protect against this, we must compute the system time as
1152          * observed by the guest and ensure the new system time is greater.
1153          */
1154         max_kernel_ns = 0;
1155         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156                 max_kernel_ns = vcpu->last_guest_tsc -
1157                                 vcpu->hv_clock.tsc_timestamp;
1158                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159                                     vcpu->hv_clock.tsc_to_system_mul,
1160                                     vcpu->hv_clock.tsc_shift);
1161                 max_kernel_ns += vcpu->last_kernel_ns;
1162         }
1163
1164         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166                                    &vcpu->hv_clock.tsc_shift,
1167                                    &vcpu->hv_clock.tsc_to_system_mul);
1168                 vcpu->hw_tsc_khz = this_tsc_khz;
1169         }
1170
1171         if (max_kernel_ns > kernel_ns)
1172                 kernel_ns = max_kernel_ns;
1173
1174         /* With all the info we got, fill in the values */
1175         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177         vcpu->last_kernel_ns = kernel_ns;
1178         vcpu->last_guest_tsc = tsc_timestamp;
1179         vcpu->hv_clock.flags = 0;
1180
1181         /*
1182          * The interface expects us to write an even number signaling that the
1183          * update is finished. Since the guest won't see the intermediate
1184          * state, we just increase by 2 at the end.
1185          */
1186         vcpu->hv_clock.version += 2;
1187
1188         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1189
1190         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191                sizeof(vcpu->hv_clock));
1192
1193         kunmap_atomic(shared_kaddr, KM_USER0);
1194
1195         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1196         return 0;
1197 }
1198
1199 static bool msr_mtrr_valid(unsigned msr)
1200 {
1201         switch (msr) {
1202         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203         case MSR_MTRRfix64K_00000:
1204         case MSR_MTRRfix16K_80000:
1205         case MSR_MTRRfix16K_A0000:
1206         case MSR_MTRRfix4K_C0000:
1207         case MSR_MTRRfix4K_C8000:
1208         case MSR_MTRRfix4K_D0000:
1209         case MSR_MTRRfix4K_D8000:
1210         case MSR_MTRRfix4K_E0000:
1211         case MSR_MTRRfix4K_E8000:
1212         case MSR_MTRRfix4K_F0000:
1213         case MSR_MTRRfix4K_F8000:
1214         case MSR_MTRRdefType:
1215         case MSR_IA32_CR_PAT:
1216                 return true;
1217         case 0x2f8:
1218                 return true;
1219         }
1220         return false;
1221 }
1222
1223 static bool valid_pat_type(unsigned t)
1224 {
1225         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1226 }
1227
1228 static bool valid_mtrr_type(unsigned t)
1229 {
1230         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1231 }
1232
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1234 {
1235         int i;
1236
1237         if (!msr_mtrr_valid(msr))
1238                 return false;
1239
1240         if (msr == MSR_IA32_CR_PAT) {
1241                 for (i = 0; i < 8; i++)
1242                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1243                                 return false;
1244                 return true;
1245         } else if (msr == MSR_MTRRdefType) {
1246                 if (data & ~0xcff)
1247                         return false;
1248                 return valid_mtrr_type(data & 0xff);
1249         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250                 for (i = 0; i < 8 ; i++)
1251                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1252                                 return false;
1253                 return true;
1254         }
1255
1256         /* variable MTRRs */
1257         return valid_mtrr_type(data & 0xff);
1258 }
1259
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1261 {
1262         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1263
1264         if (!mtrr_valid(vcpu, msr, data))
1265                 return 1;
1266
1267         if (msr == MSR_MTRRdefType) {
1268                 vcpu->arch.mtrr_state.def_type = data;
1269                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270         } else if (msr == MSR_MTRRfix64K_00000)
1271                 p[0] = data;
1272         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276         else if (msr == MSR_IA32_CR_PAT)
1277                 vcpu->arch.pat = data;
1278         else {  /* Variable MTRRs */
1279                 int idx, is_mtrr_mask;
1280                 u64 *pt;
1281
1282                 idx = (msr - 0x200) / 2;
1283                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1284                 if (!is_mtrr_mask)
1285                         pt =
1286                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1287                 else
1288                         pt =
1289                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1290                 *pt = data;
1291         }
1292
1293         kvm_mmu_reset_context(vcpu);
1294         return 0;
1295 }
1296
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1298 {
1299         u64 mcg_cap = vcpu->arch.mcg_cap;
1300         unsigned bank_num = mcg_cap & 0xff;
1301
1302         switch (msr) {
1303         case MSR_IA32_MCG_STATUS:
1304                 vcpu->arch.mcg_status = data;
1305                 break;
1306         case MSR_IA32_MCG_CTL:
1307                 if (!(mcg_cap & MCG_CTL_P))
1308                         return 1;
1309                 if (data != 0 && data != ~(u64)0)
1310                         return -1;
1311                 vcpu->arch.mcg_ctl = data;
1312                 break;
1313         default:
1314                 if (msr >= MSR_IA32_MC0_CTL &&
1315                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316                         u32 offset = msr - MSR_IA32_MC0_CTL;
1317                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1318                          * some Linux kernels though clear bit 10 in bank 4 to
1319                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320                          * this to avoid an uncatched #GP in the guest
1321                          */
1322                         if ((offset & 0x3) == 0 &&
1323                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1324                                 return -1;
1325                         vcpu->arch.mce_banks[offset] = data;
1326                         break;
1327                 }
1328                 return 1;
1329         }
1330         return 0;
1331 }
1332
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1334 {
1335         struct kvm *kvm = vcpu->kvm;
1336         int lm = is_long_mode(vcpu);
1337         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340                 : kvm->arch.xen_hvm_config.blob_size_32;
1341         u32 page_num = data & ~PAGE_MASK;
1342         u64 page_addr = data & PAGE_MASK;
1343         u8 *page;
1344         int r;
1345
1346         r = -E2BIG;
1347         if (page_num >= blob_size)
1348                 goto out;
1349         r = -ENOMEM;
1350         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1351         if (!page)
1352                 goto out;
1353         r = -EFAULT;
1354         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1355                 goto out_free;
1356         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1357                 goto out_free;
1358         r = 0;
1359 out_free:
1360         kfree(page);
1361 out:
1362         return r;
1363 }
1364
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1366 {
1367         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1368 }
1369
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1371 {
1372         bool r = false;
1373         switch (msr) {
1374         case HV_X64_MSR_GUEST_OS_ID:
1375         case HV_X64_MSR_HYPERCALL:
1376                 r = true;
1377                 break;
1378         }
1379
1380         return r;
1381 }
1382
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1384 {
1385         struct kvm *kvm = vcpu->kvm;
1386
1387         switch (msr) {
1388         case HV_X64_MSR_GUEST_OS_ID:
1389                 kvm->arch.hv_guest_os_id = data;
1390                 /* setting guest os id to zero disables hypercall page */
1391                 if (!kvm->arch.hv_guest_os_id)
1392                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1393                 break;
1394         case HV_X64_MSR_HYPERCALL: {
1395                 u64 gfn;
1396                 unsigned long addr;
1397                 u8 instructions[4];
1398
1399                 /* if guest os id is not set hypercall should remain disabled */
1400                 if (!kvm->arch.hv_guest_os_id)
1401                         break;
1402                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403                         kvm->arch.hv_hypercall = data;
1404                         break;
1405                 }
1406                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407                 addr = gfn_to_hva(kvm, gfn);
1408                 if (kvm_is_error_hva(addr))
1409                         return 1;
1410                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412                 if (__copy_to_user((void __user *)addr, instructions, 4))
1413                         return 1;
1414                 kvm->arch.hv_hypercall = data;
1415                 break;
1416         }
1417         default:
1418                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419                           "data 0x%llx\n", msr, data);
1420                 return 1;
1421         }
1422         return 0;
1423 }
1424
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1426 {
1427         switch (msr) {
1428         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1429                 unsigned long addr;
1430
1431                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432                         vcpu->arch.hv_vapic = data;
1433                         break;
1434                 }
1435                 addr = gfn_to_hva(vcpu->kvm, data >>
1436                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437                 if (kvm_is_error_hva(addr))
1438                         return 1;
1439                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1440                         return 1;
1441                 vcpu->arch.hv_vapic = data;
1442                 break;
1443         }
1444         case HV_X64_MSR_EOI:
1445                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446         case HV_X64_MSR_ICR:
1447                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448         case HV_X64_MSR_TPR:
1449                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1450         default:
1451                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452                           "data 0x%llx\n", msr, data);
1453                 return 1;
1454         }
1455
1456         return 0;
1457 }
1458
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1460 {
1461         gpa_t gpa = data & ~0x3f;
1462
1463         /* Bits 2:5 are resrved, Should be zero */
1464         if (data & 0x3c)
1465                 return 1;
1466
1467         vcpu->arch.apf.msr_val = data;
1468
1469         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470                 kvm_clear_async_pf_completion_queue(vcpu);
1471                 kvm_async_pf_hash_reset(vcpu);
1472                 return 0;
1473         }
1474
1475         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1476                 return 1;
1477
1478         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479         kvm_async_pf_wakeup_all(vcpu);
1480         return 0;
1481 }
1482
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1484 {
1485         if (vcpu->arch.time_page) {
1486                 kvm_release_page_dirty(vcpu->arch.time_page);
1487                 vcpu->arch.time_page = NULL;
1488         }
1489 }
1490
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1492 {
1493         u64 delta;
1494
1495         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1496                 return;
1497
1498         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500         vcpu->arch.st.accum_steal = delta;
1501 }
1502
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1504 {
1505         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1506                 return;
1507
1508         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1510                 return;
1511
1512         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513         vcpu->arch.st.steal.version += 2;
1514         vcpu->arch.st.accum_steal = 0;
1515
1516         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1518 }
1519
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1521 {
1522         switch (msr) {
1523         case MSR_EFER:
1524                 return set_efer(vcpu, data);
1525         case MSR_K7_HWCR:
1526                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1527                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1528                 if (data != 0) {
1529                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1530                                 data);
1531                         return 1;
1532                 }
1533                 break;
1534         case MSR_FAM10H_MMIO_CONF_BASE:
1535                 if (data != 0) {
1536                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1537                                 "0x%llx\n", data);
1538                         return 1;
1539                 }
1540                 break;
1541         case MSR_AMD64_NB_CFG:
1542                 break;
1543         case MSR_IA32_DEBUGCTLMSR:
1544                 if (!data) {
1545                         /* We support the non-activated case already */
1546                         break;
1547                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548                         /* Values other than LBR and BTF are vendor-specific,
1549                            thus reserved and should throw a #GP */
1550                         return 1;
1551                 }
1552                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1553                         __func__, data);
1554                 break;
1555         case MSR_IA32_UCODE_REV:
1556         case MSR_IA32_UCODE_WRITE:
1557         case MSR_VM_HSAVE_PA:
1558         case MSR_AMD64_PATCH_LOADER:
1559                 break;
1560         case 0x200 ... 0x2ff:
1561                 return set_msr_mtrr(vcpu, msr, data);
1562         case MSR_IA32_APICBASE:
1563                 kvm_set_apic_base(vcpu, data);
1564                 break;
1565         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1566                 return kvm_x2apic_msr_write(vcpu, msr, data);
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_P6_EVNTSEL0:
1642         case MSR_P6_EVNTSEL1:
1643         case MSR_K7_EVNTSEL0:
1644         case MSR_K7_EVNTSEL1:
1645         case MSR_K7_EVNTSEL2:
1646         case MSR_K7_EVNTSEL3:
1647                 if (data != 0)
1648                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1649                                 "0x%x data 0x%llx\n", msr, data);
1650                 break;
1651         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1652          * so we ignore writes to make it happy.
1653          */
1654         case MSR_P6_PERFCTR0:
1655         case MSR_P6_PERFCTR1:
1656         case MSR_K7_PERFCTR0:
1657         case MSR_K7_PERFCTR1:
1658         case MSR_K7_PERFCTR2:
1659         case MSR_K7_PERFCTR3:
1660                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1661                         "0x%x data 0x%llx\n", msr, data);
1662                 break;
1663         case MSR_K7_CLK_CTL:
1664                 /*
1665                  * Ignore all writes to this no longer documented MSR.
1666                  * Writes are only relevant for old K7 processors,
1667                  * all pre-dating SVM, but a recommended workaround from
1668                  * AMD for these chips. It is possible to speicify the
1669                  * affected processor models on the command line, hence
1670                  * the need to ignore the workaround.
1671                  */
1672                 break;
1673         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1674                 if (kvm_hv_msr_partition_wide(msr)) {
1675                         int r;
1676                         mutex_lock(&vcpu->kvm->lock);
1677                         r = set_msr_hyperv_pw(vcpu, msr, data);
1678                         mutex_unlock(&vcpu->kvm->lock);
1679                         return r;
1680                 } else
1681                         return set_msr_hyperv(vcpu, msr, data);
1682                 break;
1683         case MSR_IA32_BBL_CR_CTL3:
1684                 /* Drop writes to this legacy MSR -- see rdmsr
1685                  * counterpart for further detail.
1686                  */
1687                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1688                 break;
1689         default:
1690                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1691                         return xen_hvm_config(vcpu, data);
1692                 if (!ignore_msrs) {
1693                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1694                                 msr, data);
1695                         return 1;
1696                 } else {
1697                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1698                                 msr, data);
1699                         break;
1700                 }
1701         }
1702         return 0;
1703 }
1704 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1705
1706
1707 /*
1708  * Reads an msr value (of 'msr_index') into 'pdata'.
1709  * Returns 0 on success, non-0 otherwise.
1710  * Assumes vcpu_load() was already called.
1711  */
1712 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1713 {
1714         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1715 }
1716
1717 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1718 {
1719         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1720
1721         if (!msr_mtrr_valid(msr))
1722                 return 1;
1723
1724         if (msr == MSR_MTRRdefType)
1725                 *pdata = vcpu->arch.mtrr_state.def_type +
1726                          (vcpu->arch.mtrr_state.enabled << 10);
1727         else if (msr == MSR_MTRRfix64K_00000)
1728                 *pdata = p[0];
1729         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1730                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1731         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1732                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1733         else if (msr == MSR_IA32_CR_PAT)
1734                 *pdata = vcpu->arch.pat;
1735         else {  /* Variable MTRRs */
1736                 int idx, is_mtrr_mask;
1737                 u64 *pt;
1738
1739                 idx = (msr - 0x200) / 2;
1740                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1741                 if (!is_mtrr_mask)
1742                         pt =
1743                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1744                 else
1745                         pt =
1746                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1747                 *pdata = *pt;
1748         }
1749
1750         return 0;
1751 }
1752
1753 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1754 {
1755         u64 data;
1756         u64 mcg_cap = vcpu->arch.mcg_cap;
1757         unsigned bank_num = mcg_cap & 0xff;
1758
1759         switch (msr) {
1760         case MSR_IA32_P5_MC_ADDR:
1761         case MSR_IA32_P5_MC_TYPE:
1762                 data = 0;
1763                 break;
1764         case MSR_IA32_MCG_CAP:
1765                 data = vcpu->arch.mcg_cap;
1766                 break;
1767         case MSR_IA32_MCG_CTL:
1768                 if (!(mcg_cap & MCG_CTL_P))
1769                         return 1;
1770                 data = vcpu->arch.mcg_ctl;
1771                 break;
1772         case MSR_IA32_MCG_STATUS:
1773                 data = vcpu->arch.mcg_status;
1774                 break;
1775         default:
1776                 if (msr >= MSR_IA32_MC0_CTL &&
1777                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1778                         u32 offset = msr - MSR_IA32_MC0_CTL;
1779                         data = vcpu->arch.mce_banks[offset];
1780                         break;
1781                 }
1782                 return 1;
1783         }
1784         *pdata = data;
1785         return 0;
1786 }
1787
1788 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1789 {
1790         u64 data = 0;
1791         struct kvm *kvm = vcpu->kvm;
1792
1793         switch (msr) {
1794         case HV_X64_MSR_GUEST_OS_ID:
1795                 data = kvm->arch.hv_guest_os_id;
1796                 break;
1797         case HV_X64_MSR_HYPERCALL:
1798                 data = kvm->arch.hv_hypercall;
1799                 break;
1800         default:
1801                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1802                 return 1;
1803         }
1804
1805         *pdata = data;
1806         return 0;
1807 }
1808
1809 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1810 {
1811         u64 data = 0;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_VP_INDEX: {
1815                 int r;
1816                 struct kvm_vcpu *v;
1817                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1818                         if (v == vcpu)
1819                                 data = r;
1820                 break;
1821         }
1822         case HV_X64_MSR_EOI:
1823                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1824         case HV_X64_MSR_ICR:
1825                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1826         case HV_X64_MSR_TPR:
1827                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1828         default:
1829                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1830                 return 1;
1831         }
1832         *pdata = data;
1833         return 0;
1834 }
1835
1836 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1837 {
1838         u64 data;
1839
1840         switch (msr) {
1841         case MSR_IA32_PLATFORM_ID:
1842         case MSR_IA32_UCODE_REV:
1843         case MSR_IA32_EBL_CR_POWERON:
1844         case MSR_IA32_DEBUGCTLMSR:
1845         case MSR_IA32_LASTBRANCHFROMIP:
1846         case MSR_IA32_LASTBRANCHTOIP:
1847         case MSR_IA32_LASTINTFROMIP:
1848         case MSR_IA32_LASTINTTOIP:
1849         case MSR_K8_SYSCFG:
1850         case MSR_K7_HWCR:
1851         case MSR_VM_HSAVE_PA:
1852         case MSR_P6_PERFCTR0:
1853         case MSR_P6_PERFCTR1:
1854         case MSR_P6_EVNTSEL0:
1855         case MSR_P6_EVNTSEL1:
1856         case MSR_K7_EVNTSEL0:
1857         case MSR_K7_PERFCTR0:
1858         case MSR_K8_INT_PENDING_MSG:
1859         case MSR_AMD64_NB_CFG:
1860         case MSR_FAM10H_MMIO_CONF_BASE:
1861                 data = 0;
1862                 break;
1863         case MSR_MTRRcap:
1864                 data = 0x500 | KVM_NR_VAR_MTRR;
1865                 break;
1866         case 0x200 ... 0x2ff:
1867                 return get_msr_mtrr(vcpu, msr, pdata);
1868         case 0xcd: /* fsb frequency */
1869                 data = 3;
1870                 break;
1871                 /*
1872                  * MSR_EBC_FREQUENCY_ID
1873                  * Conservative value valid for even the basic CPU models.
1874                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1875                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1876                  * and 266MHz for model 3, or 4. Set Core Clock
1877                  * Frequency to System Bus Frequency Ratio to 1 (bits
1878                  * 31:24) even though these are only valid for CPU
1879                  * models > 2, however guests may end up dividing or
1880                  * multiplying by zero otherwise.
1881                  */
1882         case MSR_EBC_FREQUENCY_ID:
1883                 data = 1 << 24;
1884                 break;
1885         case MSR_IA32_APICBASE:
1886                 data = kvm_get_apic_base(vcpu);
1887                 break;
1888         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1889                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1890                 break;
1891         case MSR_IA32_MISC_ENABLE:
1892                 data = vcpu->arch.ia32_misc_enable_msr;
1893                 break;
1894         case MSR_IA32_PERF_STATUS:
1895                 /* TSC increment by tick */
1896                 data = 1000ULL;
1897                 /* CPU multiplier */
1898                 data |= (((uint64_t)4ULL) << 40);
1899                 break;
1900         case MSR_EFER:
1901                 data = vcpu->arch.efer;
1902                 break;
1903         case MSR_KVM_WALL_CLOCK:
1904         case MSR_KVM_WALL_CLOCK_NEW:
1905                 data = vcpu->kvm->arch.wall_clock;
1906                 break;
1907         case MSR_KVM_SYSTEM_TIME:
1908         case MSR_KVM_SYSTEM_TIME_NEW:
1909                 data = vcpu->arch.time;
1910                 break;
1911         case MSR_KVM_ASYNC_PF_EN:
1912                 data = vcpu->arch.apf.msr_val;
1913                 break;
1914         case MSR_KVM_STEAL_TIME:
1915                 data = vcpu->arch.st.msr_val;
1916                 break;
1917         case MSR_IA32_P5_MC_ADDR:
1918         case MSR_IA32_P5_MC_TYPE:
1919         case MSR_IA32_MCG_CAP:
1920         case MSR_IA32_MCG_CTL:
1921         case MSR_IA32_MCG_STATUS:
1922         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1923                 return get_msr_mce(vcpu, msr, pdata);
1924         case MSR_K7_CLK_CTL:
1925                 /*
1926                  * Provide expected ramp-up count for K7. All other
1927                  * are set to zero, indicating minimum divisors for
1928                  * every field.
1929                  *
1930                  * This prevents guest kernels on AMD host with CPU
1931                  * type 6, model 8 and higher from exploding due to
1932                  * the rdmsr failing.
1933                  */
1934                 data = 0x20000000;
1935                 break;
1936         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1937                 if (kvm_hv_msr_partition_wide(msr)) {
1938                         int r;
1939                         mutex_lock(&vcpu->kvm->lock);
1940                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1941                         mutex_unlock(&vcpu->kvm->lock);
1942                         return r;
1943                 } else
1944                         return get_msr_hyperv(vcpu, msr, pdata);
1945                 break;
1946         case MSR_IA32_BBL_CR_CTL3:
1947                 /* This legacy MSR exists but isn't fully documented in current
1948                  * silicon.  It is however accessed by winxp in very narrow
1949                  * scenarios where it sets bit #19, itself documented as
1950                  * a "reserved" bit.  Best effort attempt to source coherent
1951                  * read data here should the balance of the register be
1952                  * interpreted by the guest:
1953                  *
1954                  * L2 cache control register 3: 64GB range, 256KB size,
1955                  * enabled, latency 0x1, configured
1956                  */
1957                 data = 0xbe702111;
1958                 break;
1959         default:
1960                 if (!ignore_msrs) {
1961                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1962                         return 1;
1963                 } else {
1964                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1965                         data = 0;
1966                 }
1967                 break;
1968         }
1969         *pdata = data;
1970         return 0;
1971 }
1972 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1973
1974 /*
1975  * Read or write a bunch of msrs. All parameters are kernel addresses.
1976  *
1977  * @return number of msrs set successfully.
1978  */
1979 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1980                     struct kvm_msr_entry *entries,
1981                     int (*do_msr)(struct kvm_vcpu *vcpu,
1982                                   unsigned index, u64 *data))
1983 {
1984         int i, idx;
1985
1986         idx = srcu_read_lock(&vcpu->kvm->srcu);
1987         for (i = 0; i < msrs->nmsrs; ++i)
1988                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1989                         break;
1990         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1991
1992         return i;
1993 }
1994
1995 /*
1996  * Read or write a bunch of msrs. Parameters are user addresses.
1997  *
1998  * @return number of msrs set successfully.
1999  */
2000 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2001                   int (*do_msr)(struct kvm_vcpu *vcpu,
2002                                 unsigned index, u64 *data),
2003                   int writeback)
2004 {
2005         struct kvm_msrs msrs;
2006         struct kvm_msr_entry *entries;
2007         int r, n;
2008         unsigned size;
2009
2010         r = -EFAULT;
2011         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2012                 goto out;
2013
2014         r = -E2BIG;
2015         if (msrs.nmsrs >= MAX_IO_MSRS)
2016                 goto out;
2017
2018         r = -ENOMEM;
2019         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2020         entries = kmalloc(size, GFP_KERNEL);
2021         if (!entries)
2022                 goto out;
2023
2024         r = -EFAULT;
2025         if (copy_from_user(entries, user_msrs->entries, size))
2026                 goto out_free;
2027
2028         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2029         if (r < 0)
2030                 goto out_free;
2031
2032         r = -EFAULT;
2033         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2034                 goto out_free;
2035
2036         r = n;
2037
2038 out_free:
2039         kfree(entries);
2040 out:
2041         return r;
2042 }
2043
2044 int kvm_dev_ioctl_check_extension(long ext)
2045 {
2046         int r;
2047
2048         switch (ext) {
2049         case KVM_CAP_IRQCHIP:
2050         case KVM_CAP_HLT:
2051         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2052         case KVM_CAP_SET_TSS_ADDR:
2053         case KVM_CAP_EXT_CPUID:
2054         case KVM_CAP_CLOCKSOURCE:
2055         case KVM_CAP_PIT:
2056         case KVM_CAP_NOP_IO_DELAY:
2057         case KVM_CAP_MP_STATE:
2058         case KVM_CAP_SYNC_MMU:
2059         case KVM_CAP_USER_NMI:
2060         case KVM_CAP_REINJECT_CONTROL:
2061         case KVM_CAP_IRQ_INJECT_STATUS:
2062         case KVM_CAP_ASSIGN_DEV_IRQ:
2063         case KVM_CAP_IRQFD:
2064         case KVM_CAP_IOEVENTFD:
2065         case KVM_CAP_PIT2:
2066         case KVM_CAP_PIT_STATE2:
2067         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2068         case KVM_CAP_XEN_HVM:
2069         case KVM_CAP_ADJUST_CLOCK:
2070         case KVM_CAP_VCPU_EVENTS:
2071         case KVM_CAP_HYPERV:
2072         case KVM_CAP_HYPERV_VAPIC:
2073         case KVM_CAP_HYPERV_SPIN:
2074         case KVM_CAP_PCI_SEGMENT:
2075         case KVM_CAP_DEBUGREGS:
2076         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2077         case KVM_CAP_XSAVE:
2078         case KVM_CAP_ASYNC_PF:
2079         case KVM_CAP_GET_TSC_KHZ:
2080                 r = 1;
2081                 break;
2082         case KVM_CAP_COALESCED_MMIO:
2083                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2084                 break;
2085         case KVM_CAP_VAPIC:
2086                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2087                 break;
2088         case KVM_CAP_NR_VCPUS:
2089                 r = KVM_MAX_VCPUS;
2090                 break;
2091         case KVM_CAP_NR_MEMSLOTS:
2092                 r = KVM_MEMORY_SLOTS;
2093                 break;
2094         case KVM_CAP_PV_MMU:    /* obsolete */
2095                 r = 0;
2096                 break;
2097         case KVM_CAP_IOMMU:
2098                 r = iommu_found();
2099                 break;
2100         case KVM_CAP_MCE:
2101                 r = KVM_MAX_MCE_BANKS;
2102                 break;
2103         case KVM_CAP_XCRS:
2104                 r = cpu_has_xsave;
2105                 break;
2106         case KVM_CAP_TSC_CONTROL:
2107                 r = kvm_has_tsc_control;
2108                 break;
2109         default:
2110                 r = 0;
2111                 break;
2112         }
2113         return r;
2114
2115 }
2116
2117 long kvm_arch_dev_ioctl(struct file *filp,
2118                         unsigned int ioctl, unsigned long arg)
2119 {
2120         void __user *argp = (void __user *)arg;
2121         long r;
2122
2123         switch (ioctl) {
2124         case KVM_GET_MSR_INDEX_LIST: {
2125                 struct kvm_msr_list __user *user_msr_list = argp;
2126                 struct kvm_msr_list msr_list;
2127                 unsigned n;
2128
2129                 r = -EFAULT;
2130                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2131                         goto out;
2132                 n = msr_list.nmsrs;
2133                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2134                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2135                         goto out;
2136                 r = -E2BIG;
2137                 if (n < msr_list.nmsrs)
2138                         goto out;
2139                 r = -EFAULT;
2140                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2141                                  num_msrs_to_save * sizeof(u32)))
2142                         goto out;
2143                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2144                                  &emulated_msrs,
2145                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2146                         goto out;
2147                 r = 0;
2148                 break;
2149         }
2150         case KVM_GET_SUPPORTED_CPUID: {
2151                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2152                 struct kvm_cpuid2 cpuid;
2153
2154                 r = -EFAULT;
2155                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2156                         goto out;
2157                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2158                                                       cpuid_arg->entries);
2159                 if (r)
2160                         goto out;
2161
2162                 r = -EFAULT;
2163                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2164                         goto out;
2165                 r = 0;
2166                 break;
2167         }
2168         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2169                 u64 mce_cap;
2170
2171                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2172                 r = -EFAULT;
2173                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2174                         goto out;
2175                 r = 0;
2176                 break;
2177         }
2178         default:
2179                 r = -EINVAL;
2180         }
2181 out:
2182         return r;
2183 }
2184
2185 static void wbinvd_ipi(void *garbage)
2186 {
2187         wbinvd();
2188 }
2189
2190 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2191 {
2192         return vcpu->kvm->arch.iommu_domain &&
2193                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2194 }
2195
2196 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2197 {
2198         /* Address WBINVD may be executed by guest */
2199         if (need_emulate_wbinvd(vcpu)) {
2200                 if (kvm_x86_ops->has_wbinvd_exit())
2201                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2202                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2203                         smp_call_function_single(vcpu->cpu,
2204                                         wbinvd_ipi, NULL, 1);
2205         }
2206
2207         kvm_x86_ops->vcpu_load(vcpu, cpu);
2208         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2209                 /* Make sure TSC doesn't go backwards */
2210                 s64 tsc_delta;
2211                 u64 tsc;
2212
2213                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2214                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2215                              tsc - vcpu->arch.last_guest_tsc;
2216
2217                 if (tsc_delta < 0)
2218                         mark_tsc_unstable("KVM discovered backwards TSC");
2219                 if (check_tsc_unstable()) {
2220                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2221                         vcpu->arch.tsc_catchup = 1;
2222                 }
2223                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2224                 if (vcpu->cpu != cpu)
2225                         kvm_migrate_timers(vcpu);
2226                 vcpu->cpu = cpu;
2227         }
2228
2229         accumulate_steal_time(vcpu);
2230         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2231 }
2232
2233 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2234 {
2235         kvm_x86_ops->vcpu_put(vcpu);
2236         kvm_put_guest_fpu(vcpu);
2237         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2238 }
2239
2240 static int is_efer_nx(void)
2241 {
2242         unsigned long long efer = 0;
2243
2244         rdmsrl_safe(MSR_EFER, &efer);
2245         return efer & EFER_NX;
2246 }
2247
2248 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2249 {
2250         int i;
2251         struct kvm_cpuid_entry2 *e, *entry;
2252
2253         entry = NULL;
2254         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2255                 e = &vcpu->arch.cpuid_entries[i];
2256                 if (e->function == 0x80000001) {
2257                         entry = e;
2258                         break;
2259                 }
2260         }
2261         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2262                 entry->edx &= ~(1 << 20);
2263                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2264         }
2265 }
2266
2267 /* when an old userspace process fills a new kernel module */
2268 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2269                                     struct kvm_cpuid *cpuid,
2270                                     struct kvm_cpuid_entry __user *entries)
2271 {
2272         int r, i;
2273         struct kvm_cpuid_entry *cpuid_entries;
2274
2275         r = -E2BIG;
2276         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2277                 goto out;
2278         r = -ENOMEM;
2279         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2280         if (!cpuid_entries)
2281                 goto out;
2282         r = -EFAULT;
2283         if (copy_from_user(cpuid_entries, entries,
2284                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2285                 goto out_free;
2286         for (i = 0; i < cpuid->nent; i++) {
2287                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2288                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2289                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2290                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2291                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2292                 vcpu->arch.cpuid_entries[i].index = 0;
2293                 vcpu->arch.cpuid_entries[i].flags = 0;
2294                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2295                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2296                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2297         }
2298         vcpu->arch.cpuid_nent = cpuid->nent;
2299         cpuid_fix_nx_cap(vcpu);
2300         r = 0;
2301         kvm_apic_set_version(vcpu);
2302         kvm_x86_ops->cpuid_update(vcpu);
2303         update_cpuid(vcpu);
2304
2305 out_free:
2306         vfree(cpuid_entries);
2307 out:
2308         return r;
2309 }
2310
2311 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2312                                      struct kvm_cpuid2 *cpuid,
2313                                      struct kvm_cpuid_entry2 __user *entries)
2314 {
2315         int r;
2316
2317         r = -E2BIG;
2318         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2319                 goto out;
2320         r = -EFAULT;
2321         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2322                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2323                 goto out;
2324         vcpu->arch.cpuid_nent = cpuid->nent;
2325         kvm_apic_set_version(vcpu);
2326         kvm_x86_ops->cpuid_update(vcpu);
2327         update_cpuid(vcpu);
2328         return 0;
2329
2330 out:
2331         return r;
2332 }
2333
2334 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2335                                      struct kvm_cpuid2 *cpuid,
2336                                      struct kvm_cpuid_entry2 __user *entries)
2337 {
2338         int r;
2339
2340         r = -E2BIG;
2341         if (cpuid->nent < vcpu->arch.cpuid_nent)
2342                 goto out;
2343         r = -EFAULT;
2344         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2345                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2346                 goto out;
2347         return 0;
2348
2349 out:
2350         cpuid->nent = vcpu->arch.cpuid_nent;
2351         return r;
2352 }
2353
2354 static void cpuid_mask(u32 *word, int wordnum)
2355 {
2356         *word &= boot_cpu_data.x86_capability[wordnum];
2357 }
2358
2359 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2360                            u32 index)
2361 {
2362         entry->function = function;
2363         entry->index = index;
2364         cpuid_count(entry->function, entry->index,
2365                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2366         entry->flags = 0;
2367 }
2368
2369 static bool supported_xcr0_bit(unsigned bit)
2370 {
2371         u64 mask = ((u64)1 << bit);
2372
2373         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2374 }
2375
2376 #define F(x) bit(X86_FEATURE_##x)
2377
2378 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2379                          u32 index, int *nent, int maxnent)
2380 {
2381         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2382 #ifdef CONFIG_X86_64
2383         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2384                                 ? F(GBPAGES) : 0;
2385         unsigned f_lm = F(LM);
2386 #else
2387         unsigned f_gbpages = 0;
2388         unsigned f_lm = 0;
2389 #endif
2390         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2391
2392         /* cpuid 1.edx */
2393         const u32 kvm_supported_word0_x86_features =
2394                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2395                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2396                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2397                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2398                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2399                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2400                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2401                 0 /* HTT, TM, Reserved, PBE */;
2402         /* cpuid 0x80000001.edx */
2403         const u32 kvm_supported_word1_x86_features =
2404                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2405                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2406                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2407                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2408                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2409                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2410                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2411                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2412         /* cpuid 1.ecx */
2413         const u32 kvm_supported_word4_x86_features =
2414                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2415                 0 /* DS-CPL, VMX, SMX, EST */ |
2416                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2417                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2418                 0 /* Reserved, DCA */ | F(XMM4_1) |
2419                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2420                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2421                 F(F16C) | F(RDRAND);
2422         /* cpuid 0x80000001.ecx */
2423         const u32 kvm_supported_word6_x86_features =
2424                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2425                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2426                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2427                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2428
2429         /* cpuid 0xC0000001.edx */
2430         const u32 kvm_supported_word5_x86_features =
2431                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2432                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2433                 F(PMM) | F(PMM_EN);
2434
2435         /* cpuid 7.0.ebx */
2436         const u32 kvm_supported_word9_x86_features =
2437                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2438
2439         /* all calls to cpuid_count() should be made on the same cpu */
2440         get_cpu();
2441         do_cpuid_1_ent(entry, function, index);
2442         ++*nent;
2443
2444         switch (function) {
2445         case 0:
2446                 entry->eax = min(entry->eax, (u32)0xd);
2447                 break;
2448         case 1:
2449                 entry->edx &= kvm_supported_word0_x86_features;
2450                 cpuid_mask(&entry->edx, 0);
2451                 entry->ecx &= kvm_supported_word4_x86_features;
2452                 cpuid_mask(&entry->ecx, 4);
2453                 /* we support x2apic emulation even if host does not support
2454                  * it since we emulate x2apic in software */
2455                 entry->ecx |= F(X2APIC);
2456                 break;
2457         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2458          * may return different values. This forces us to get_cpu() before
2459          * issuing the first command, and also to emulate this annoying behavior
2460          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2461         case 2: {
2462                 int t, times = entry->eax & 0xff;
2463
2464                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2465                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2466                 for (t = 1; t < times && *nent < maxnent; ++t) {
2467                         do_cpuid_1_ent(&entry[t], function, 0);
2468                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2469                         ++*nent;
2470                 }
2471                 break;
2472         }
2473         /* function 4 has additional index. */
2474         case 4: {
2475                 int i, cache_type;
2476
2477                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2478                 /* read more entries until cache_type is zero */
2479                 for (i = 1; *nent < maxnent; ++i) {
2480                         cache_type = entry[i - 1].eax & 0x1f;
2481                         if (!cache_type)
2482                                 break;
2483                         do_cpuid_1_ent(&entry[i], function, i);
2484                         entry[i].flags |=
2485                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2486                         ++*nent;
2487                 }
2488                 break;
2489         }
2490         case 7: {
2491                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2492                 /* Mask ebx against host capbability word 9 */
2493                 if (index == 0) {
2494                         entry->ebx &= kvm_supported_word9_x86_features;
2495                         cpuid_mask(&entry->ebx, 9);
2496                 } else
2497                         entry->ebx = 0;
2498                 entry->eax = 0;
2499                 entry->ecx = 0;
2500                 entry->edx = 0;
2501                 break;
2502         }
2503         case 9:
2504                 break;
2505         /* function 0xb has additional index. */
2506         case 0xb: {
2507                 int i, level_type;
2508
2509                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2510                 /* read more entries until level_type is zero */
2511                 for (i = 1; *nent < maxnent; ++i) {
2512                         level_type = entry[i - 1].ecx & 0xff00;
2513                         if (!level_type)
2514                                 break;
2515                         do_cpuid_1_ent(&entry[i], function, i);
2516                         entry[i].flags |=
2517                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2518                         ++*nent;
2519                 }
2520                 break;
2521         }
2522         case 0xd: {
2523                 int idx, i;
2524
2525                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2526                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2527                         do_cpuid_1_ent(&entry[i], function, idx);
2528                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2529                                 continue;
2530                         entry[i].flags |=
2531                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2532                         ++*nent;
2533                         ++i;
2534                 }
2535                 break;
2536         }
2537         case KVM_CPUID_SIGNATURE: {
2538                 char signature[12] = "KVMKVMKVM\0\0";
2539                 u32 *sigptr = (u32 *)signature;
2540                 entry->eax = 0;
2541                 entry->ebx = sigptr[0];
2542                 entry->ecx = sigptr[1];
2543                 entry->edx = sigptr[2];
2544                 break;
2545         }
2546         case KVM_CPUID_FEATURES:
2547                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2548                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2549                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2550                              (1 << KVM_FEATURE_ASYNC_PF) |
2551                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2552
2553                 if (sched_info_on())
2554                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2555
2556                 entry->ebx = 0;
2557                 entry->ecx = 0;
2558                 entry->edx = 0;
2559                 break;
2560         case 0x80000000:
2561                 entry->eax = min(entry->eax, 0x8000001a);
2562                 break;
2563         case 0x80000001:
2564                 entry->edx &= kvm_supported_word1_x86_features;
2565                 cpuid_mask(&entry->edx, 1);
2566                 entry->ecx &= kvm_supported_word6_x86_features;
2567                 cpuid_mask(&entry->ecx, 6);
2568                 break;
2569         case 0x80000008: {
2570                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2571                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2572                 unsigned phys_as = entry->eax & 0xff;
2573
2574                 if (!g_phys_as)
2575                         g_phys_as = phys_as;
2576                 entry->eax = g_phys_as | (virt_as << 8);
2577                 entry->ebx = entry->edx = 0;
2578                 break;
2579         }
2580         case 0x80000019:
2581                 entry->ecx = entry->edx = 0;
2582                 break;
2583         case 0x8000001a:
2584                 break;
2585         case 0x8000001d:
2586                 break;
2587         /*Add support for Centaur's CPUID instruction*/
2588         case 0xC0000000:
2589                 /*Just support up to 0xC0000004 now*/
2590                 entry->eax = min(entry->eax, 0xC0000004);
2591                 break;
2592         case 0xC0000001:
2593                 entry->edx &= kvm_supported_word5_x86_features;
2594                 cpuid_mask(&entry->edx, 5);
2595                 break;
2596         case 3: /* Processor serial number */
2597         case 5: /* MONITOR/MWAIT */
2598         case 6: /* Thermal management */
2599         case 0xA: /* Architectural Performance Monitoring */
2600         case 0x80000007: /* Advanced power management */
2601         case 0xC0000002:
2602         case 0xC0000003:
2603         case 0xC0000004:
2604         default:
2605                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2606                 break;
2607         }
2608
2609         kvm_x86_ops->set_supported_cpuid(function, entry);
2610
2611         put_cpu();
2612 }
2613
2614 #undef F
2615
2616 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2617                                      struct kvm_cpuid_entry2 __user *entries)
2618 {
2619         struct kvm_cpuid_entry2 *cpuid_entries;
2620         int limit, nent = 0, r = -E2BIG;
2621         u32 func;
2622
2623         if (cpuid->nent < 1)
2624                 goto out;
2625         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2626                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2627         r = -ENOMEM;
2628         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2629         if (!cpuid_entries)
2630                 goto out;
2631
2632         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2633         limit = cpuid_entries[0].eax;
2634         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2635                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2636                              &nent, cpuid->nent);
2637         r = -E2BIG;
2638         if (nent >= cpuid->nent)
2639                 goto out_free;
2640
2641         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2642         limit = cpuid_entries[nent - 1].eax;
2643         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2644                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2645                              &nent, cpuid->nent);
2646
2647
2648
2649         r = -E2BIG;
2650         if (nent >= cpuid->nent)
2651                 goto out_free;
2652
2653         /* Add support for Centaur's CPUID instruction. */
2654         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2655                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2656                                 &nent, cpuid->nent);
2657
2658                 r = -E2BIG;
2659                 if (nent >= cpuid->nent)
2660                         goto out_free;
2661
2662                 limit = cpuid_entries[nent - 1].eax;
2663                 for (func = 0xC0000001;
2664                         func <= limit && nent < cpuid->nent; ++func)
2665                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2666                                         &nent, cpuid->nent);
2667
2668                 r = -E2BIG;
2669                 if (nent >= cpuid->nent)
2670                         goto out_free;
2671         }
2672
2673         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2674                      cpuid->nent);
2675
2676         r = -E2BIG;
2677         if (nent >= cpuid->nent)
2678                 goto out_free;
2679
2680         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2681                      cpuid->nent);
2682
2683         r = -E2BIG;
2684         if (nent >= cpuid->nent)
2685                 goto out_free;
2686
2687         r = -EFAULT;
2688         if (copy_to_user(entries, cpuid_entries,
2689                          nent * sizeof(struct kvm_cpuid_entry2)))
2690                 goto out_free;
2691         cpuid->nent = nent;
2692         r = 0;
2693
2694 out_free:
2695         vfree(cpuid_entries);
2696 out:
2697         return r;
2698 }
2699
2700 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2701                                     struct kvm_lapic_state *s)
2702 {
2703         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2704
2705         return 0;
2706 }
2707
2708 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2709                                     struct kvm_lapic_state *s)
2710 {
2711         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2712         kvm_apic_post_state_restore(vcpu);
2713         update_cr8_intercept(vcpu);
2714
2715         return 0;
2716 }
2717
2718 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2719                                     struct kvm_interrupt *irq)
2720 {
2721         if (irq->irq < 0 || irq->irq >= 256)
2722                 return -EINVAL;
2723         if (irqchip_in_kernel(vcpu->kvm))
2724                 return -ENXIO;
2725
2726         kvm_queue_interrupt(vcpu, irq->irq, false);
2727         kvm_make_request(KVM_REQ_EVENT, vcpu);
2728
2729         return 0;
2730 }
2731
2732 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2733 {
2734         kvm_inject_nmi(vcpu);
2735
2736         return 0;
2737 }
2738
2739 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2740                                            struct kvm_tpr_access_ctl *tac)
2741 {
2742         if (tac->flags)
2743                 return -EINVAL;
2744         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2745         return 0;
2746 }
2747
2748 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2749                                         u64 mcg_cap)
2750 {
2751         int r;
2752         unsigned bank_num = mcg_cap & 0xff, bank;
2753
2754         r = -EINVAL;
2755         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2756                 goto out;
2757         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2758                 goto out;
2759         r = 0;
2760         vcpu->arch.mcg_cap = mcg_cap;
2761         /* Init IA32_MCG_CTL to all 1s */
2762         if (mcg_cap & MCG_CTL_P)
2763                 vcpu->arch.mcg_ctl = ~(u64)0;
2764         /* Init IA32_MCi_CTL to all 1s */
2765         for (bank = 0; bank < bank_num; bank++)
2766                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2767 out:
2768         return r;
2769 }
2770
2771 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2772                                       struct kvm_x86_mce *mce)
2773 {
2774         u64 mcg_cap = vcpu->arch.mcg_cap;
2775         unsigned bank_num = mcg_cap & 0xff;
2776         u64 *banks = vcpu->arch.mce_banks;
2777
2778         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2779                 return -EINVAL;
2780         /*
2781          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2782          * reporting is disabled
2783          */
2784         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2785             vcpu->arch.mcg_ctl != ~(u64)0)
2786                 return 0;
2787         banks += 4 * mce->bank;
2788         /*
2789          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2790          * reporting is disabled for the bank
2791          */
2792         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2793                 return 0;
2794         if (mce->status & MCI_STATUS_UC) {
2795                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2796                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2797                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2798                         return 0;
2799                 }
2800                 if (banks[1] & MCI_STATUS_VAL)
2801                         mce->status |= MCI_STATUS_OVER;
2802                 banks[2] = mce->addr;
2803                 banks[3] = mce->misc;
2804                 vcpu->arch.mcg_status = mce->mcg_status;
2805                 banks[1] = mce->status;
2806                 kvm_queue_exception(vcpu, MC_VECTOR);
2807         } else if (!(banks[1] & MCI_STATUS_VAL)
2808                    || !(banks[1] & MCI_STATUS_UC)) {
2809                 if (banks[1] & MCI_STATUS_VAL)
2810                         mce->status |= MCI_STATUS_OVER;
2811                 banks[2] = mce->addr;
2812                 banks[3] = mce->misc;
2813                 banks[1] = mce->status;
2814         } else
2815                 banks[1] |= MCI_STATUS_OVER;
2816         return 0;
2817 }
2818
2819 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2820                                                struct kvm_vcpu_events *events)
2821 {
2822         events->exception.injected =
2823                 vcpu->arch.exception.pending &&
2824                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2825         events->exception.nr = vcpu->arch.exception.nr;
2826         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2827         events->exception.pad = 0;
2828         events->exception.error_code = vcpu->arch.exception.error_code;
2829
2830         events->interrupt.injected =
2831                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2832         events->interrupt.nr = vcpu->arch.interrupt.nr;
2833         events->interrupt.soft = 0;
2834         events->interrupt.shadow =
2835                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2836                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2837
2838         events->nmi.injected = vcpu->arch.nmi_injected;
2839         events->nmi.pending = vcpu->arch.nmi_pending;
2840         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2841         events->nmi.pad = 0;
2842
2843         events->sipi_vector = vcpu->arch.sipi_vector;
2844
2845         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2846                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2847                          | KVM_VCPUEVENT_VALID_SHADOW);
2848         memset(&events->reserved, 0, sizeof(events->reserved));
2849 }
2850
2851 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2852                                               struct kvm_vcpu_events *events)
2853 {
2854         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2855                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2856                               | KVM_VCPUEVENT_VALID_SHADOW))
2857                 return -EINVAL;
2858
2859         vcpu->arch.exception.pending = events->exception.injected;
2860         vcpu->arch.exception.nr = events->exception.nr;
2861         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2862         vcpu->arch.exception.error_code = events->exception.error_code;
2863
2864         vcpu->arch.interrupt.pending = events->interrupt.injected;
2865         vcpu->arch.interrupt.nr = events->interrupt.nr;
2866         vcpu->arch.interrupt.soft = events->interrupt.soft;
2867         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2868                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2869                                                   events->interrupt.shadow);
2870
2871         vcpu->arch.nmi_injected = events->nmi.injected;
2872         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2873                 vcpu->arch.nmi_pending = events->nmi.pending;
2874         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2875
2876         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2877                 vcpu->arch.sipi_vector = events->sipi_vector;
2878
2879         kvm_make_request(KVM_REQ_EVENT, vcpu);
2880
2881         return 0;
2882 }
2883
2884 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2885                                              struct kvm_debugregs *dbgregs)
2886 {
2887         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2888         dbgregs->dr6 = vcpu->arch.dr6;
2889         dbgregs->dr7 = vcpu->arch.dr7;
2890         dbgregs->flags = 0;
2891         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2892 }
2893
2894 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2895                                             struct kvm_debugregs *dbgregs)
2896 {
2897         if (dbgregs->flags)
2898                 return -EINVAL;
2899
2900         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2901         vcpu->arch.dr6 = dbgregs->dr6;
2902         vcpu->arch.dr7 = dbgregs->dr7;
2903
2904         return 0;
2905 }
2906
2907 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2908                                          struct kvm_xsave *guest_xsave)
2909 {
2910         if (cpu_has_xsave)
2911                 memcpy(guest_xsave->region,
2912                         &vcpu->arch.guest_fpu.state->xsave,
2913                         xstate_size);
2914         else {
2915                 memcpy(guest_xsave->region,
2916                         &vcpu->arch.guest_fpu.state->fxsave,
2917                         sizeof(struct i387_fxsave_struct));
2918                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2919                         XSTATE_FPSSE;
2920         }
2921 }
2922
2923 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2924                                         struct kvm_xsave *guest_xsave)
2925 {
2926         u64 xstate_bv =
2927                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2928
2929         if (cpu_has_xsave)
2930                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2931                         guest_xsave->region, xstate_size);
2932         else {
2933                 if (xstate_bv & ~XSTATE_FPSSE)
2934                         return -EINVAL;
2935                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2936                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2937         }
2938         return 0;
2939 }
2940
2941 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2942                                         struct kvm_xcrs *guest_xcrs)
2943 {
2944         if (!cpu_has_xsave) {
2945                 guest_xcrs->nr_xcrs = 0;
2946                 return;
2947         }
2948
2949         guest_xcrs->nr_xcrs = 1;
2950         guest_xcrs->flags = 0;
2951         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2952         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2953 }
2954
2955 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2956                                        struct kvm_xcrs *guest_xcrs)
2957 {
2958         int i, r = 0;
2959
2960         if (!cpu_has_xsave)
2961                 return -EINVAL;
2962
2963         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2964                 return -EINVAL;
2965
2966         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2967                 /* Only support XCR0 currently */
2968                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2969                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2970                                 guest_xcrs->xcrs[0].value);
2971                         break;
2972                 }
2973         if (r)
2974                 r = -EINVAL;
2975         return r;
2976 }
2977
2978 long kvm_arch_vcpu_ioctl(struct file *filp,
2979                          unsigned int ioctl, unsigned long arg)
2980 {
2981         struct kvm_vcpu *vcpu = filp->private_data;
2982         void __user *argp = (void __user *)arg;
2983         int r;
2984         union {
2985                 struct kvm_lapic_state *lapic;
2986                 struct kvm_xsave *xsave;
2987                 struct kvm_xcrs *xcrs;
2988                 void *buffer;
2989         } u;
2990
2991         u.buffer = NULL;
2992         switch (ioctl) {
2993         case KVM_GET_LAPIC: {
2994                 r = -EINVAL;
2995                 if (!vcpu->arch.apic)
2996                         goto out;
2997                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2998
2999                 r = -ENOMEM;
3000                 if (!u.lapic)
3001                         goto out;
3002                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3003                 if (r)
3004                         goto out;
3005                 r = -EFAULT;
3006                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3007                         goto out;
3008                 r = 0;
3009                 break;
3010         }
3011         case KVM_SET_LAPIC: {
3012                 r = -EINVAL;
3013                 if (!vcpu->arch.apic)
3014                         goto out;
3015                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3016                 r = -ENOMEM;
3017                 if (!u.lapic)
3018                         goto out;
3019                 r = -EFAULT;
3020                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3021                         goto out;
3022                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3023                 if (r)
3024                         goto out;
3025                 r = 0;
3026                 break;
3027         }
3028         case KVM_INTERRUPT: {
3029                 struct kvm_interrupt irq;
3030
3031                 r = -EFAULT;
3032                 if (copy_from_user(&irq, argp, sizeof irq))
3033                         goto out;
3034                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3035                 if (r)
3036                         goto out;
3037                 r = 0;
3038                 break;
3039         }
3040         case KVM_NMI: {
3041                 r = kvm_vcpu_ioctl_nmi(vcpu);
3042                 if (r)
3043                         goto out;
3044                 r = 0;
3045                 break;
3046         }
3047         case KVM_SET_CPUID: {
3048                 struct kvm_cpuid __user *cpuid_arg = argp;
3049                 struct kvm_cpuid cpuid;
3050
3051                 r = -EFAULT;
3052                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3053                         goto out;
3054                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3055                 if (r)
3056                         goto out;
3057                 break;
3058         }
3059         case KVM_SET_CPUID2: {
3060                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3061                 struct kvm_cpuid2 cpuid;
3062
3063                 r = -EFAULT;
3064                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3065                         goto out;
3066                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3067                                               cpuid_arg->entries);
3068                 if (r)
3069                         goto out;
3070                 break;
3071         }
3072         case KVM_GET_CPUID2: {
3073                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3074                 struct kvm_cpuid2 cpuid;
3075
3076                 r = -EFAULT;
3077                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3078                         goto out;
3079                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3080                                               cpuid_arg->entries);
3081                 if (r)
3082                         goto out;
3083                 r = -EFAULT;
3084                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3085                         goto out;
3086                 r = 0;
3087                 break;
3088         }
3089         case KVM_GET_MSRS:
3090                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3091                 break;
3092         case KVM_SET_MSRS:
3093                 r = msr_io(vcpu, argp, do_set_msr, 0);
3094                 break;
3095         case KVM_TPR_ACCESS_REPORTING: {
3096                 struct kvm_tpr_access_ctl tac;
3097
3098                 r = -EFAULT;
3099                 if (copy_from_user(&tac, argp, sizeof tac))
3100                         goto out;
3101                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3102                 if (r)
3103                         goto out;
3104                 r = -EFAULT;
3105                 if (copy_to_user(argp, &tac, sizeof tac))
3106                         goto out;
3107                 r = 0;
3108                 break;
3109         };
3110         case KVM_SET_VAPIC_ADDR: {
3111                 struct kvm_vapic_addr va;
3112
3113                 r = -EINVAL;
3114                 if (!irqchip_in_kernel(vcpu->kvm))
3115                         goto out;
3116                 r = -EFAULT;
3117                 if (copy_from_user(&va, argp, sizeof va))
3118                         goto out;
3119                 r = 0;
3120                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3121                 break;
3122         }
3123         case KVM_X86_SETUP_MCE: {
3124                 u64 mcg_cap;
3125
3126                 r = -EFAULT;
3127                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3128                         goto out;
3129                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3130                 break;
3131         }
3132         case KVM_X86_SET_MCE: {
3133                 struct kvm_x86_mce mce;
3134
3135                 r = -EFAULT;
3136                 if (copy_from_user(&mce, argp, sizeof mce))
3137                         goto out;
3138                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3139                 break;
3140         }
3141         case KVM_GET_VCPU_EVENTS: {
3142                 struct kvm_vcpu_events events;
3143
3144                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3145
3146                 r = -EFAULT;
3147                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3148                         break;
3149                 r = 0;
3150                 break;
3151         }
3152         case KVM_SET_VCPU_EVENTS: {
3153                 struct kvm_vcpu_events events;
3154
3155                 r = -EFAULT;
3156                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3157                         break;
3158
3159                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3160                 break;
3161         }
3162         case KVM_GET_DEBUGREGS: {
3163                 struct kvm_debugregs dbgregs;
3164
3165                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3166
3167                 r = -EFAULT;
3168                 if (copy_to_user(argp, &dbgregs,
3169                                  sizeof(struct kvm_debugregs)))
3170                         break;
3171                 r = 0;
3172                 break;
3173         }
3174         case KVM_SET_DEBUGREGS: {
3175                 struct kvm_debugregs dbgregs;
3176
3177                 r = -EFAULT;
3178                 if (copy_from_user(&dbgregs, argp,
3179                                    sizeof(struct kvm_debugregs)))
3180                         break;
3181
3182                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3183                 break;
3184         }
3185         case KVM_GET_XSAVE: {
3186                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3187                 r = -ENOMEM;
3188                 if (!u.xsave)
3189                         break;
3190
3191                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3192
3193                 r = -EFAULT;
3194                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3195                         break;
3196                 r = 0;
3197                 break;
3198         }
3199         case KVM_SET_XSAVE: {
3200                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3201                 r = -ENOMEM;
3202                 if (!u.xsave)
3203                         break;
3204
3205                 r = -EFAULT;
3206                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3207                         break;
3208
3209                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3210                 break;
3211         }
3212         case KVM_GET_XCRS: {
3213                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3214                 r = -ENOMEM;
3215                 if (!u.xcrs)
3216                         break;
3217
3218                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3219
3220                 r = -EFAULT;
3221                 if (copy_to_user(argp, u.xcrs,
3222                                  sizeof(struct kvm_xcrs)))
3223                         break;
3224                 r = 0;
3225                 break;
3226         }
3227         case KVM_SET_XCRS: {
3228                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3229                 r = -ENOMEM;
3230                 if (!u.xcrs)
3231                         break;
3232
3233                 r = -EFAULT;
3234                 if (copy_from_user(u.xcrs, argp,
3235                                    sizeof(struct kvm_xcrs)))
3236                         break;
3237
3238                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3239                 break;
3240         }
3241         case KVM_SET_TSC_KHZ: {
3242                 u32 user_tsc_khz;
3243
3244                 r = -EINVAL;
3245                 if (!kvm_has_tsc_control)
3246                         break;
3247
3248                 user_tsc_khz = (u32)arg;
3249
3250                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3251                         goto out;
3252
3253                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3254
3255                 r = 0;
3256                 goto out;
3257         }
3258         case KVM_GET_TSC_KHZ: {
3259                 r = -EIO;
3260                 if (check_tsc_unstable())
3261                         goto out;
3262
3263                 r = vcpu_tsc_khz(vcpu);
3264
3265                 goto out;
3266         }
3267         default:
3268                 r = -EINVAL;
3269         }
3270 out:
3271         kfree(u.buffer);
3272         return r;
3273 }
3274
3275 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3276 {
3277         int ret;
3278
3279         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3280                 return -1;
3281         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3282         return ret;
3283 }
3284
3285 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3286                                               u64 ident_addr)
3287 {
3288         kvm->arch.ept_identity_map_addr = ident_addr;
3289         return 0;
3290 }
3291
3292 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3293                                           u32 kvm_nr_mmu_pages)
3294 {
3295         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3296                 return -EINVAL;
3297
3298         mutex_lock(&kvm->slots_lock);
3299         spin_lock(&kvm->mmu_lock);
3300
3301         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3302         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3303
3304         spin_unlock(&kvm->mmu_lock);
3305         mutex_unlock(&kvm->slots_lock);
3306         return 0;
3307 }
3308
3309 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3310 {
3311         return kvm->arch.n_max_mmu_pages;
3312 }
3313
3314 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3315 {
3316         int r;
3317
3318         r = 0;
3319         switch (chip->chip_id) {
3320         case KVM_IRQCHIP_PIC_MASTER:
3321                 memcpy(&chip->chip.pic,
3322                         &pic_irqchip(kvm)->pics[0],
3323                         sizeof(struct kvm_pic_state));
3324                 break;
3325         case KVM_IRQCHIP_PIC_SLAVE:
3326                 memcpy(&chip->chip.pic,
3327                         &pic_irqchip(kvm)->pics[1],
3328                         sizeof(struct kvm_pic_state));
3329                 break;
3330         case KVM_IRQCHIP_IOAPIC:
3331                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3332                 break;
3333         default:
3334                 r = -EINVAL;
3335                 break;
3336         }
3337         return r;
3338 }
3339
3340 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3341 {
3342         int r;
3343
3344         r = 0;
3345         switch (chip->chip_id) {
3346         case KVM_IRQCHIP_PIC_MASTER:
3347                 spin_lock(&pic_irqchip(kvm)->lock);
3348                 memcpy(&pic_irqchip(kvm)->pics[0],
3349                         &chip->chip.pic,
3350                         sizeof(struct kvm_pic_state));
3351                 spin_unlock(&pic_irqchip(kvm)->lock);
3352                 break;
3353         case KVM_IRQCHIP_PIC_SLAVE:
3354                 spin_lock(&pic_irqchip(kvm)->lock);
3355                 memcpy(&pic_irqchip(kvm)->pics[1],
3356                         &chip->chip.pic,
3357                         sizeof(struct kvm_pic_state));
3358                 spin_unlock(&pic_irqchip(kvm)->lock);
3359                 break;
3360         case KVM_IRQCHIP_IOAPIC:
3361                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3362                 break;
3363         default:
3364                 r = -EINVAL;
3365                 break;
3366         }
3367         kvm_pic_update_irq(pic_irqchip(kvm));
3368         return r;
3369 }
3370
3371 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3372 {
3373         int r = 0;
3374
3375         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3376         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3377         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3378         return r;
3379 }
3380
3381 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3382 {
3383         int r = 0;
3384
3385         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3386         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3387         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3388         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3389         return r;
3390 }
3391
3392 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3393 {
3394         int r = 0;
3395
3396         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3397         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3398                 sizeof(ps->channels));
3399         ps->flags = kvm->arch.vpit->pit_state.flags;
3400         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3401         memset(&ps->reserved, 0, sizeof(ps->reserved));
3402         return r;
3403 }
3404
3405 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3406 {
3407         int r = 0, start = 0;
3408         u32 prev_legacy, cur_legacy;
3409         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3410         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3411         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3412         if (!prev_legacy && cur_legacy)
3413                 start = 1;
3414         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3415                sizeof(kvm->arch.vpit->pit_state.channels));
3416         kvm->arch.vpit->pit_state.flags = ps->flags;
3417         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3418         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3419         return r;
3420 }
3421
3422 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3423                                  struct kvm_reinject_control *control)
3424 {
3425         if (!kvm->arch.vpit)
3426                 return -ENXIO;
3427         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3428         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3429         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3430         return 0;
3431 }
3432
3433 /*
3434  * Get (and clear) the dirty memory log for a memory slot.
3435  */
3436 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3437                                       struct kvm_dirty_log *log)
3438 {
3439         int r, i;
3440         struct kvm_memory_slot *memslot;
3441         unsigned long n;
3442         unsigned long is_dirty = 0;
3443
3444         mutex_lock(&kvm->slots_lock);
3445
3446         r = -EINVAL;
3447         if (log->slot >= KVM_MEMORY_SLOTS)
3448                 goto out;
3449
3450         memslot = &kvm->memslots->memslots[log->slot];
3451         r = -ENOENT;
3452         if (!memslot->dirty_bitmap)
3453                 goto out;
3454
3455         n = kvm_dirty_bitmap_bytes(memslot);
3456
3457         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3458                 is_dirty = memslot->dirty_bitmap[i];
3459
3460         /* If nothing is dirty, don't bother messing with page tables. */
3461         if (is_dirty) {
3462                 struct kvm_memslots *slots, *old_slots;
3463                 unsigned long *dirty_bitmap;
3464
3465                 dirty_bitmap = memslot->dirty_bitmap_head;
3466                 if (memslot->dirty_bitmap == dirty_bitmap)
3467                         dirty_bitmap += n / sizeof(long);
3468                 memset(dirty_bitmap, 0, n);
3469
3470                 r = -ENOMEM;
3471                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3472                 if (!slots)
3473                         goto out;
3474                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3475                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3476                 slots->generation++;
3477
3478                 old_slots = kvm->memslots;
3479                 rcu_assign_pointer(kvm->memslots, slots);
3480                 synchronize_srcu_expedited(&kvm->srcu);
3481                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3482                 kfree(old_slots);
3483
3484                 spin_lock(&kvm->mmu_lock);
3485                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3486                 spin_unlock(&kvm->mmu_lock);
3487
3488                 r = -EFAULT;
3489                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3490                         goto out;
3491         } else {
3492                 r = -EFAULT;
3493                 if (clear_user(log->dirty_bitmap, n))
3494                         goto out;
3495         }
3496
3497         r = 0;
3498 out:
3499         mutex_unlock(&kvm->slots_lock);
3500         return r;
3501 }
3502
3503 long kvm_arch_vm_ioctl(struct file *filp,
3504                        unsigned int ioctl, unsigned long arg)
3505 {
3506         struct kvm *kvm = filp->private_data;
3507         void __user *argp = (void __user *)arg;
3508         int r = -ENOTTY;
3509         /*
3510          * This union makes it completely explicit to gcc-3.x
3511          * that these two variables' stack usage should be
3512          * combined, not added together.
3513          */
3514         union {
3515                 struct kvm_pit_state ps;
3516                 struct kvm_pit_state2 ps2;
3517                 struct kvm_pit_config pit_config;
3518         } u;
3519
3520         switch (ioctl) {
3521         case KVM_SET_TSS_ADDR:
3522                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3523                 if (r < 0)
3524                         goto out;
3525                 break;
3526         case KVM_SET_IDENTITY_MAP_ADDR: {
3527                 u64 ident_addr;
3528
3529                 r = -EFAULT;
3530                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3531                         goto out;
3532                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3533                 if (r < 0)
3534                         goto out;
3535                 break;
3536         }
3537         case KVM_SET_NR_MMU_PAGES:
3538                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3539                 if (r)
3540                         goto out;
3541                 break;
3542         case KVM_GET_NR_MMU_PAGES:
3543                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3544                 break;
3545         case KVM_CREATE_IRQCHIP: {
3546                 struct kvm_pic *vpic;
3547
3548                 mutex_lock(&kvm->lock);
3549                 r = -EEXIST;
3550                 if (kvm->arch.vpic)
3551                         goto create_irqchip_unlock;
3552                 r = -ENOMEM;
3553                 vpic = kvm_create_pic(kvm);
3554                 if (vpic) {
3555                         r = kvm_ioapic_init(kvm);
3556                         if (r) {
3557                                 mutex_lock(&kvm->slots_lock);
3558                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3559                                                           &vpic->dev);
3560                                 mutex_unlock(&kvm->slots_lock);
3561                                 kfree(vpic);
3562                                 goto create_irqchip_unlock;
3563                         }
3564                 } else
3565                         goto create_irqchip_unlock;
3566                 smp_wmb();
3567                 kvm->arch.vpic = vpic;
3568                 smp_wmb();
3569                 r = kvm_setup_default_irq_routing(kvm);
3570                 if (r) {
3571                         mutex_lock(&kvm->slots_lock);
3572                         mutex_lock(&kvm->irq_lock);
3573                         kvm_ioapic_destroy(kvm);
3574                         kvm_destroy_pic(kvm);
3575                         mutex_unlock(&kvm->irq_lock);
3576                         mutex_unlock(&kvm->slots_lock);
3577                 }
3578         create_irqchip_unlock:
3579                 mutex_unlock(&kvm->lock);
3580                 break;
3581         }
3582         case KVM_CREATE_PIT:
3583                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3584                 goto create_pit;
3585         case KVM_CREATE_PIT2:
3586                 r = -EFAULT;
3587                 if (copy_from_user(&u.pit_config, argp,
3588                                    sizeof(struct kvm_pit_config)))
3589                         goto out;
3590         create_pit:
3591                 mutex_lock(&kvm->slots_lock);
3592                 r = -EEXIST;
3593                 if (kvm->arch.vpit)
3594                         goto create_pit_unlock;
3595                 r = -ENOMEM;
3596                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3597                 if (kvm->arch.vpit)
3598                         r = 0;
3599         create_pit_unlock:
3600                 mutex_unlock(&kvm->slots_lock);
3601                 break;
3602         case KVM_IRQ_LINE_STATUS:
3603         case KVM_IRQ_LINE: {
3604                 struct kvm_irq_level irq_event;
3605
3606                 r = -EFAULT;
3607                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3608                         goto out;
3609                 r = -ENXIO;
3610                 if (irqchip_in_kernel(kvm)) {
3611                         __s32 status;
3612                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3613                                         irq_event.irq, irq_event.level);
3614                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3615                                 r = -EFAULT;
3616                                 irq_event.status = status;
3617                                 if (copy_to_user(argp, &irq_event,
3618                                                         sizeof irq_event))
3619                                         goto out;
3620                         }
3621                         r = 0;
3622                 }
3623                 break;
3624         }
3625         case KVM_GET_IRQCHIP: {
3626                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3627                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3628
3629                 r = -ENOMEM;
3630                 if (!chip)
3631                         goto out;
3632                 r = -EFAULT;
3633                 if (copy_from_user(chip, argp, sizeof *chip))
3634                         goto get_irqchip_out;
3635                 r = -ENXIO;
3636                 if (!irqchip_in_kernel(kvm))
3637                         goto get_irqchip_out;
3638                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3639                 if (r)
3640                         goto get_irqchip_out;
3641                 r = -EFAULT;
3642                 if (copy_to_user(argp, chip, sizeof *chip))
3643                         goto get_irqchip_out;
3644                 r = 0;
3645         get_irqchip_out:
3646                 kfree(chip);
3647                 if (r)
3648                         goto out;
3649                 break;
3650         }
3651         case KVM_SET_IRQCHIP: {
3652                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3653                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3654
3655                 r = -ENOMEM;
3656                 if (!chip)
3657                         goto out;
3658                 r = -EFAULT;
3659                 if (copy_from_user(chip, argp, sizeof *chip))
3660                         goto set_irqchip_out;
3661                 r = -ENXIO;
3662                 if (!irqchip_in_kernel(kvm))
3663                         goto set_irqchip_out;
3664                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3665                 if (r)
3666                         goto set_irqchip_out;
3667                 r = 0;
3668         set_irqchip_out:
3669                 kfree(chip);
3670                 if (r)
3671                         goto out;
3672                 break;
3673         }
3674         case KVM_GET_PIT: {
3675                 r = -EFAULT;
3676                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3677                         goto out;
3678                 r = -ENXIO;
3679                 if (!kvm->arch.vpit)
3680                         goto out;
3681                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3682                 if (r)
3683                         goto out;
3684                 r = -EFAULT;
3685                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3686                         goto out;
3687                 r = 0;
3688                 break;
3689         }
3690         case KVM_SET_PIT: {
3691                 r = -EFAULT;
3692                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3693                         goto out;
3694                 r = -ENXIO;
3695                 if (!kvm->arch.vpit)
3696                         goto out;
3697                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3698                 if (r)
3699                         goto out;
3700                 r = 0;
3701                 break;
3702         }
3703         case KVM_GET_PIT2: {
3704                 r = -ENXIO;
3705                 if (!kvm->arch.vpit)
3706                         goto out;
3707                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3708                 if (r)
3709                         goto out;
3710                 r = -EFAULT;
3711                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3712                         goto out;
3713                 r = 0;
3714                 break;
3715         }
3716         case KVM_SET_PIT2: {
3717                 r = -EFAULT;
3718                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3719                         goto out;
3720                 r = -ENXIO;
3721                 if (!kvm->arch.vpit)
3722                         goto out;
3723                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3724                 if (r)
3725                         goto out;
3726                 r = 0;
3727                 break;
3728         }
3729         case KVM_REINJECT_CONTROL: {
3730                 struct kvm_reinject_control control;
3731                 r =  -EFAULT;
3732                 if (copy_from_user(&control, argp, sizeof(control)))
3733                         goto out;
3734                 r = kvm_vm_ioctl_reinject(kvm, &control);
3735                 if (r)
3736                         goto out;
3737                 r = 0;
3738                 break;
3739         }
3740         case KVM_XEN_HVM_CONFIG: {
3741                 r = -EFAULT;
3742                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3743                                    sizeof(struct kvm_xen_hvm_config)))
3744                         goto out;
3745                 r = -EINVAL;
3746                 if (kvm->arch.xen_hvm_config.flags)
3747                         goto out;
3748                 r = 0;
3749                 break;
3750         }
3751         case KVM_SET_CLOCK: {
3752                 struct kvm_clock_data user_ns;
3753                 u64 now_ns;
3754                 s64 delta;
3755
3756                 r = -EFAULT;
3757                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3758                         goto out;
3759
3760                 r = -EINVAL;
3761                 if (user_ns.flags)
3762                         goto out;
3763
3764                 r = 0;
3765                 local_irq_disable();
3766                 now_ns = get_kernel_ns();
3767                 delta = user_ns.clock - now_ns;
3768                 local_irq_enable();
3769                 kvm->arch.kvmclock_offset = delta;
3770                 break;
3771         }
3772         case KVM_GET_CLOCK: {
3773                 struct kvm_clock_data user_ns;
3774                 u64 now_ns;
3775
3776                 local_irq_disable();
3777                 now_ns = get_kernel_ns();
3778                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3779                 local_irq_enable();
3780                 user_ns.flags = 0;
3781                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3782
3783                 r = -EFAULT;
3784                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3785                         goto out;
3786                 r = 0;
3787                 break;
3788         }
3789
3790         default:
3791                 ;
3792         }
3793 out:
3794         return r;
3795 }
3796
3797 static void kvm_init_msr_list(void)
3798 {
3799         u32 dummy[2];
3800         unsigned i, j;
3801
3802         /* skip the first msrs in the list. KVM-specific */
3803         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3804                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3805                         continue;
3806                 if (j < i)
3807                         msrs_to_save[j] = msrs_to_save[i];
3808                 j++;
3809         }
3810         num_msrs_to_save = j;
3811 }
3812
3813 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3814                            const void *v)
3815 {
3816         int handled = 0;
3817         int n;
3818
3819         do {
3820                 n = min(len, 8);
3821                 if (!(vcpu->arch.apic &&
3822                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3823                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3824                         break;
3825                 handled += n;
3826                 addr += n;
3827                 len -= n;
3828                 v += n;
3829         } while (len);
3830
3831         return handled;
3832 }
3833
3834 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3835 {
3836         int handled = 0;
3837         int n;
3838
3839         do {
3840                 n = min(len, 8);
3841                 if (!(vcpu->arch.apic &&
3842                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3843                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3844                         break;
3845                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3846                 handled += n;
3847                 addr += n;
3848                 len -= n;
3849                 v += n;
3850         } while (len);
3851
3852         return handled;
3853 }
3854
3855 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3856                         struct kvm_segment *var, int seg)
3857 {
3858         kvm_x86_ops->set_segment(vcpu, var, seg);
3859 }
3860
3861 void kvm_get_segment(struct kvm_vcpu *vcpu,
3862                      struct kvm_segment *var, int seg)
3863 {
3864         kvm_x86_ops->get_segment(vcpu, var, seg);
3865 }
3866
3867 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3868 {
3869         return gpa;
3870 }
3871
3872 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3873 {
3874         gpa_t t_gpa;
3875         struct x86_exception exception;
3876
3877         BUG_ON(!mmu_is_nested(vcpu));
3878
3879         /* NPT walks are always user-walks */
3880         access |= PFERR_USER_MASK;
3881         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3882
3883         return t_gpa;
3884 }
3885
3886 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3887                               struct x86_exception *exception)
3888 {
3889         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3890         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3891 }
3892
3893  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3894                                 struct x86_exception *exception)
3895 {
3896         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3897         access |= PFERR_FETCH_MASK;
3898         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3899 }
3900
3901 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3902                                struct x86_exception *exception)
3903 {
3904         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3905         access |= PFERR_WRITE_MASK;
3906         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3907 }
3908
3909 /* uses this to access any guest's mapped memory without checking CPL */
3910 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3911                                 struct x86_exception *exception)
3912 {
3913         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3914 }
3915
3916 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3917                                       struct kvm_vcpu *vcpu, u32 access,
3918                                       struct x86_exception *exception)
3919 {
3920         void *data = val;
3921         int r = X86EMUL_CONTINUE;
3922
3923         while (bytes) {
3924                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3925                                                             exception);
3926                 unsigned offset = addr & (PAGE_SIZE-1);
3927                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3928                 int ret;
3929
3930                 if (gpa == UNMAPPED_GVA)
3931                         return X86EMUL_PROPAGATE_FAULT;
3932                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3933                 if (ret < 0) {
3934                         r = X86EMUL_IO_NEEDED;
3935                         goto out;
3936                 }
3937
3938                 bytes -= toread;
3939                 data += toread;
3940                 addr += toread;
3941         }
3942 out:
3943         return r;
3944 }
3945
3946 /* used for instruction fetching */
3947 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3948                                 gva_t addr, void *val, unsigned int bytes,
3949                                 struct x86_exception *exception)
3950 {
3951         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3952         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3953
3954         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3955                                           access | PFERR_FETCH_MASK,
3956                                           exception);
3957 }
3958
3959 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3960                                gva_t addr, void *val, unsigned int bytes,
3961                                struct x86_exception *exception)
3962 {
3963         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3964         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3965
3966         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3967                                           exception);
3968 }
3969 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3970
3971 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3972                                       gva_t addr, void *val, unsigned int bytes,
3973                                       struct x86_exception *exception)
3974 {
3975         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3976         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3977 }
3978
3979 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3980                                        gva_t addr, void *val,
3981                                        unsigned int bytes,
3982                                        struct x86_exception *exception)
3983 {
3984         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3985         void *data = val;
3986         int r = X86EMUL_CONTINUE;
3987
3988         while (bytes) {
3989                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3990                                                              PFERR_WRITE_MASK,
3991                                                              exception);
3992                 unsigned offset = addr & (PAGE_SIZE-1);
3993                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3994                 int ret;
3995
3996                 if (gpa == UNMAPPED_GVA)
3997                         return X86EMUL_PROPAGATE_FAULT;
3998                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3999                 if (ret < 0) {
4000                         r = X86EMUL_IO_NEEDED;
4001                         goto out;
4002                 }
4003
4004                 bytes -= towrite;
4005                 data += towrite;
4006                 addr += towrite;
4007         }
4008 out:
4009         return r;
4010 }
4011 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4012
4013 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4014                                 gpa_t *gpa, struct x86_exception *exception,
4015                                 bool write)
4016 {
4017         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4018
4019         if (write)
4020                 access |= PFERR_WRITE_MASK;
4021
4022         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4023
4024         if (*gpa == UNMAPPED_GVA)
4025                 return -1;
4026
4027         /* For APIC access vmexit */
4028         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4029                 return 1;
4030
4031         return 0;
4032 }
4033
4034 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4035                                   unsigned long addr,
4036                                   void *val,
4037                                   unsigned int bytes,
4038                                   struct x86_exception *exception)
4039 {
4040         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4041         gpa_t gpa;
4042         int handled, ret;
4043
4044         if (vcpu->mmio_read_completed) {
4045                 memcpy(val, vcpu->mmio_data, bytes);
4046                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4047                                vcpu->mmio_phys_addr, *(u64 *)val);
4048                 vcpu->mmio_read_completed = 0;
4049                 return X86EMUL_CONTINUE;
4050         }
4051
4052         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, false);
4053
4054         if (ret < 0)
4055                 return X86EMUL_PROPAGATE_FAULT;
4056
4057         if (ret)
4058                 goto mmio;
4059
4060         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
4061             == X86EMUL_CONTINUE)
4062                 return X86EMUL_CONTINUE;
4063
4064 mmio:
4065         /*
4066          * Is this MMIO handled locally?
4067          */
4068         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
4069
4070         if (handled == bytes)
4071                 return X86EMUL_CONTINUE;
4072
4073         gpa += handled;
4074         bytes -= handled;
4075         val += handled;
4076
4077         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4078
4079         vcpu->mmio_needed = 1;
4080         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4081         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4082         vcpu->mmio_size = bytes;
4083         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4084         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
4085         vcpu->mmio_index = 0;
4086
4087         return X86EMUL_IO_NEEDED;
4088 }
4089
4090 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4091                         const void *val, int bytes)
4092 {
4093         int ret;
4094
4095         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4096         if (ret < 0)
4097                 return 0;
4098         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4099         return 1;
4100 }
4101
4102 static int emulator_write_emulated_onepage(unsigned long addr,
4103                                            const void *val,
4104                                            unsigned int bytes,
4105                                            struct x86_exception *exception,
4106                                            struct kvm_vcpu *vcpu)
4107 {
4108         gpa_t gpa;
4109         int handled, ret;
4110
4111         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, true);
4112
4113         if (ret < 0)
4114                 return X86EMUL_PROPAGATE_FAULT;
4115
4116         /* For APIC access vmexit */
4117         if (ret)
4118                 goto mmio;
4119
4120         if (emulator_write_phys(vcpu, gpa, val, bytes))
4121                 return X86EMUL_CONTINUE;
4122
4123 mmio:
4124         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4125         /*
4126          * Is this MMIO handled locally?
4127          */
4128         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4129         if (handled == bytes)
4130                 return X86EMUL_CONTINUE;
4131
4132         gpa += handled;
4133         bytes -= handled;
4134         val += handled;
4135
4136         vcpu->mmio_needed = 1;
4137         memcpy(vcpu->mmio_data, val, bytes);
4138         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4139         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4140         vcpu->mmio_size = bytes;
4141         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4142         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4143         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4144         vcpu->mmio_index = 0;
4145
4146         return X86EMUL_CONTINUE;
4147 }
4148
4149 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4150                             unsigned long addr,
4151                             const void *val,
4152                             unsigned int bytes,
4153                             struct x86_exception *exception)
4154 {
4155         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4156
4157         /* Crossing a page boundary? */
4158         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4159                 int rc, now;
4160
4161                 now = -addr & ~PAGE_MASK;
4162                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4163                                                      vcpu);
4164                 if (rc != X86EMUL_CONTINUE)
4165                         return rc;
4166                 addr += now;
4167                 val += now;
4168                 bytes -= now;
4169         }
4170         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4171                                                vcpu);
4172 }
4173
4174 #define CMPXCHG_TYPE(t, ptr, old, new) \
4175         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4176
4177 #ifdef CONFIG_X86_64
4178 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4179 #else
4180 #  define CMPXCHG64(ptr, old, new) \
4181         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4182 #endif
4183
4184 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4185                                      unsigned long addr,
4186                                      const void *old,
4187                                      const void *new,
4188                                      unsigned int bytes,
4189                                      struct x86_exception *exception)
4190 {
4191         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4192         gpa_t gpa;
4193         struct page *page;
4194         char *kaddr;
4195         bool exchanged;
4196
4197         /* guests cmpxchg8b have to be emulated atomically */
4198         if (bytes > 8 || (bytes & (bytes - 1)))
4199                 goto emul_write;
4200
4201         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4202
4203         if (gpa == UNMAPPED_GVA ||
4204             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4205                 goto emul_write;
4206
4207         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4208                 goto emul_write;
4209
4210         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4211         if (is_error_page(page)) {
4212                 kvm_release_page_clean(page);
4213                 goto emul_write;
4214         }
4215
4216         kaddr = kmap_atomic(page, KM_USER0);
4217         kaddr += offset_in_page(gpa);
4218         switch (bytes) {
4219         case 1:
4220                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4221                 break;
4222         case 2:
4223                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4224                 break;
4225         case 4:
4226                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4227                 break;
4228         case 8:
4229                 exchanged = CMPXCHG64(kaddr, old, new);
4230                 break;
4231         default:
4232                 BUG();
4233         }
4234         kunmap_atomic(kaddr, KM_USER0);
4235         kvm_release_page_dirty(page);
4236
4237         if (!exchanged)
4238                 return X86EMUL_CMPXCHG_FAILED;
4239
4240         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4241
4242         return X86EMUL_CONTINUE;
4243
4244 emul_write:
4245         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4246
4247         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4248 }
4249
4250 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4251 {
4252         /* TODO: String I/O for in kernel device */
4253         int r;
4254
4255         if (vcpu->arch.pio.in)
4256                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4257                                     vcpu->arch.pio.size, pd);
4258         else
4259                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4260                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4261                                      pd);
4262         return r;
4263 }
4264
4265
4266 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4267                                     int size, unsigned short port, void *val,
4268                                     unsigned int count)
4269 {
4270         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4271
4272         if (vcpu->arch.pio.count)
4273                 goto data_avail;
4274
4275         trace_kvm_pio(0, port, size, count);
4276
4277         vcpu->arch.pio.port = port;
4278         vcpu->arch.pio.in = 1;
4279         vcpu->arch.pio.count  = count;
4280         vcpu->arch.pio.size = size;
4281
4282         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4283         data_avail:
4284                 memcpy(val, vcpu->arch.pio_data, size * count);
4285                 vcpu->arch.pio.count = 0;
4286                 return 1;
4287         }
4288
4289         vcpu->run->exit_reason = KVM_EXIT_IO;
4290         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4291         vcpu->run->io.size = size;
4292         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4293         vcpu->run->io.count = count;
4294         vcpu->run->io.port = port;
4295
4296         return 0;
4297 }
4298
4299 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4300                                      int size, unsigned short port,
4301                                      const void *val, unsigned int count)
4302 {
4303         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4304
4305         trace_kvm_pio(1, port, size, count);
4306
4307         vcpu->arch.pio.port = port;
4308         vcpu->arch.pio.in = 0;
4309         vcpu->arch.pio.count = count;
4310         vcpu->arch.pio.size = size;
4311
4312         memcpy(vcpu->arch.pio_data, val, size * count);
4313
4314         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4315                 vcpu->arch.pio.count = 0;
4316                 return 1;
4317         }
4318
4319         vcpu->run->exit_reason = KVM_EXIT_IO;
4320         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4321         vcpu->run->io.size = size;
4322         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4323         vcpu->run->io.count = count;
4324         vcpu->run->io.port = port;
4325
4326         return 0;
4327 }
4328
4329 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4330 {
4331         return kvm_x86_ops->get_segment_base(vcpu, seg);
4332 }
4333
4334 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4335 {
4336         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4337 }
4338
4339 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4340 {
4341         if (!need_emulate_wbinvd(vcpu))
4342                 return X86EMUL_CONTINUE;
4343
4344         if (kvm_x86_ops->has_wbinvd_exit()) {
4345                 int cpu = get_cpu();
4346
4347                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4348                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4349                                 wbinvd_ipi, NULL, 1);
4350                 put_cpu();
4351                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4352         } else
4353                 wbinvd();
4354         return X86EMUL_CONTINUE;
4355 }
4356 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4357
4358 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4359 {
4360         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4361 }
4362
4363 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4364 {
4365         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4366 }
4367
4368 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4369 {
4370
4371         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4372 }
4373
4374 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4375 {
4376         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4377 }
4378
4379 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4380 {
4381         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4382         unsigned long value;
4383
4384         switch (cr) {
4385         case 0:
4386                 value = kvm_read_cr0(vcpu);
4387                 break;
4388         case 2:
4389                 value = vcpu->arch.cr2;
4390                 break;
4391         case 3:
4392                 value = kvm_read_cr3(vcpu);
4393                 break;
4394         case 4:
4395                 value = kvm_read_cr4(vcpu);
4396                 break;
4397         case 8:
4398                 value = kvm_get_cr8(vcpu);
4399                 break;
4400         default:
4401                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4402                 return 0;
4403         }
4404
4405         return value;
4406 }
4407
4408 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4409 {
4410         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4411         int res = 0;
4412
4413         switch (cr) {
4414         case 0:
4415                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4416                 break;
4417         case 2:
4418                 vcpu->arch.cr2 = val;
4419                 break;
4420         case 3:
4421                 res = kvm_set_cr3(vcpu, val);
4422                 break;
4423         case 4:
4424                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4425                 break;
4426         case 8:
4427                 res = kvm_set_cr8(vcpu, val);
4428                 break;
4429         default:
4430                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4431                 res = -1;
4432         }
4433
4434         return res;
4435 }
4436
4437 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4438 {
4439         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4440 }
4441
4442 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4443 {
4444         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4445 }
4446
4447 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4448 {
4449         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4450 }
4451
4452 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4453 {
4454         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4455 }
4456
4457 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4458 {
4459         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4460 }
4461
4462 static unsigned long emulator_get_cached_segment_base(
4463         struct x86_emulate_ctxt *ctxt, int seg)
4464 {
4465         return get_segment_base(emul_to_vcpu(ctxt), seg);
4466 }
4467
4468 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4469                                  struct desc_struct *desc, u32 *base3,
4470                                  int seg)
4471 {
4472         struct kvm_segment var;
4473
4474         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4475         *selector = var.selector;
4476
4477         if (var.unusable)
4478                 return false;
4479
4480         if (var.g)
4481                 var.limit >>= 12;
4482         set_desc_limit(desc, var.limit);
4483         set_desc_base(desc, (unsigned long)var.base);
4484 #ifdef CONFIG_X86_64
4485         if (base3)
4486                 *base3 = var.base >> 32;
4487 #endif
4488         desc->type = var.type;
4489         desc->s = var.s;
4490         desc->dpl = var.dpl;
4491         desc->p = var.present;
4492         desc->avl = var.avl;
4493         desc->l = var.l;
4494         desc->d = var.db;
4495         desc->g = var.g;
4496
4497         return true;
4498 }
4499
4500 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4501                                  struct desc_struct *desc, u32 base3,
4502                                  int seg)
4503 {
4504         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4505         struct kvm_segment var;
4506
4507         var.selector = selector;
4508         var.base = get_desc_base(desc);
4509 #ifdef CONFIG_X86_64
4510         var.base |= ((u64)base3) << 32;
4511 #endif
4512         var.limit = get_desc_limit(desc);
4513         if (desc->g)
4514                 var.limit = (var.limit << 12) | 0xfff;
4515         var.type = desc->type;
4516         var.present = desc->p;
4517         var.dpl = desc->dpl;
4518         var.db = desc->d;
4519         var.s = desc->s;
4520         var.l = desc->l;
4521         var.g = desc->g;
4522         var.avl = desc->avl;
4523         var.present = desc->p;
4524         var.unusable = !var.present;
4525         var.padding = 0;
4526
4527         kvm_set_segment(vcpu, &var, seg);
4528         return;
4529 }
4530
4531 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4532                             u32 msr_index, u64 *pdata)
4533 {
4534         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4535 }
4536
4537 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4538                             u32 msr_index, u64 data)
4539 {
4540         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4541 }
4542
4543 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4544 {
4545         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4546 }
4547
4548 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4549 {
4550         preempt_disable();
4551         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4552         /*
4553          * CR0.TS may reference the host fpu state, not the guest fpu state,
4554          * so it may be clear at this point.
4555          */
4556         clts();
4557 }
4558
4559 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4560 {
4561         preempt_enable();
4562 }
4563
4564 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4565                               struct x86_instruction_info *info,
4566                               enum x86_intercept_stage stage)
4567 {
4568         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4569 }
4570
4571 static struct x86_emulate_ops emulate_ops = {
4572         .read_std            = kvm_read_guest_virt_system,
4573         .write_std           = kvm_write_guest_virt_system,
4574         .fetch               = kvm_fetch_guest_virt,
4575         .read_emulated       = emulator_read_emulated,
4576         .write_emulated      = emulator_write_emulated,
4577         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4578         .invlpg              = emulator_invlpg,
4579         .pio_in_emulated     = emulator_pio_in_emulated,
4580         .pio_out_emulated    = emulator_pio_out_emulated,
4581         .get_segment         = emulator_get_segment,
4582         .set_segment         = emulator_set_segment,
4583         .get_cached_segment_base = emulator_get_cached_segment_base,
4584         .get_gdt             = emulator_get_gdt,
4585         .get_idt             = emulator_get_idt,
4586         .set_gdt             = emulator_set_gdt,
4587         .set_idt             = emulator_set_idt,
4588         .get_cr              = emulator_get_cr,
4589         .set_cr              = emulator_set_cr,
4590         .cpl                 = emulator_get_cpl,
4591         .get_dr              = emulator_get_dr,
4592         .set_dr              = emulator_set_dr,
4593         .set_msr             = emulator_set_msr,
4594         .get_msr             = emulator_get_msr,
4595         .halt                = emulator_halt,
4596         .wbinvd              = emulator_wbinvd,
4597         .fix_hypercall       = emulator_fix_hypercall,
4598         .get_fpu             = emulator_get_fpu,
4599         .put_fpu             = emulator_put_fpu,
4600         .intercept           = emulator_intercept,
4601 };
4602
4603 static void cache_all_regs(struct kvm_vcpu *vcpu)
4604 {
4605         kvm_register_read(vcpu, VCPU_REGS_RAX);
4606         kvm_register_read(vcpu, VCPU_REGS_RSP);
4607         kvm_register_read(vcpu, VCPU_REGS_RIP);
4608         vcpu->arch.regs_dirty = ~0;
4609 }
4610
4611 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4612 {
4613         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4614         /*
4615          * an sti; sti; sequence only disable interrupts for the first
4616          * instruction. So, if the last instruction, be it emulated or
4617          * not, left the system with the INT_STI flag enabled, it
4618          * means that the last instruction is an sti. We should not
4619          * leave the flag on in this case. The same goes for mov ss
4620          */
4621         if (!(int_shadow & mask))
4622                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4623 }
4624
4625 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4626 {
4627         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4628         if (ctxt->exception.vector == PF_VECTOR)
4629                 kvm_propagate_fault(vcpu, &ctxt->exception);
4630         else if (ctxt->exception.error_code_valid)
4631                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4632                                       ctxt->exception.error_code);
4633         else
4634                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4635 }
4636
4637 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4638                               const unsigned long *regs)
4639 {
4640         memset(&ctxt->twobyte, 0,
4641                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4642         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4643
4644         ctxt->fetch.start = 0;
4645         ctxt->fetch.end = 0;
4646         ctxt->io_read.pos = 0;
4647         ctxt->io_read.end = 0;
4648         ctxt->mem_read.pos = 0;
4649         ctxt->mem_read.end = 0;
4650 }
4651
4652 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4653 {
4654         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4655         int cs_db, cs_l;
4656
4657         /*
4658          * TODO: fix emulate.c to use guest_read/write_register
4659          * instead of direct ->regs accesses, can save hundred cycles
4660          * on Intel for instructions that don't read/change RSP, for
4661          * for example.
4662          */
4663         cache_all_regs(vcpu);
4664
4665         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4666
4667         ctxt->eflags = kvm_get_rflags(vcpu);
4668         ctxt->eip = kvm_rip_read(vcpu);
4669         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4670                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4671                      cs_l                               ? X86EMUL_MODE_PROT64 :
4672                      cs_db                              ? X86EMUL_MODE_PROT32 :
4673                                                           X86EMUL_MODE_PROT16;
4674         ctxt->guest_mode = is_guest_mode(vcpu);
4675
4676         init_decode_cache(ctxt, vcpu->arch.regs);
4677         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4678 }
4679
4680 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4681 {
4682         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4683         int ret;
4684
4685         init_emulate_ctxt(vcpu);
4686
4687         ctxt->op_bytes = 2;
4688         ctxt->ad_bytes = 2;
4689         ctxt->_eip = ctxt->eip + inc_eip;
4690         ret = emulate_int_real(ctxt, irq);
4691
4692         if (ret != X86EMUL_CONTINUE)
4693                 return EMULATE_FAIL;
4694
4695         ctxt->eip = ctxt->_eip;
4696         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4697         kvm_rip_write(vcpu, ctxt->eip);
4698         kvm_set_rflags(vcpu, ctxt->eflags);
4699
4700         if (irq == NMI_VECTOR)
4701                 vcpu->arch.nmi_pending = false;
4702         else
4703                 vcpu->arch.interrupt.pending = false;
4704
4705         return EMULATE_DONE;
4706 }
4707 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4708
4709 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4710 {
4711         int r = EMULATE_DONE;
4712
4713         ++vcpu->stat.insn_emulation_fail;
4714         trace_kvm_emulate_insn_failed(vcpu);
4715         if (!is_guest_mode(vcpu)) {
4716                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4717                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4718                 vcpu->run->internal.ndata = 0;
4719                 r = EMULATE_FAIL;
4720         }
4721         kvm_queue_exception(vcpu, UD_VECTOR);
4722
4723         return r;
4724 }
4725
4726 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4727 {
4728         gpa_t gpa;
4729
4730         if (tdp_enabled)
4731                 return false;
4732
4733         /*
4734          * if emulation was due to access to shadowed page table
4735          * and it failed try to unshadow page and re-entetr the
4736          * guest to let CPU execute the instruction.
4737          */
4738         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4739                 return true;
4740
4741         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4742
4743         if (gpa == UNMAPPED_GVA)
4744                 return true; /* let cpu generate fault */
4745
4746         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4747                 return true;
4748
4749         return false;
4750 }
4751
4752 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4753                             unsigned long cr2,
4754                             int emulation_type,
4755                             void *insn,
4756                             int insn_len)
4757 {
4758         int r;
4759         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4760         bool writeback = true;
4761
4762         kvm_clear_exception_queue(vcpu);
4763
4764         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4765                 init_emulate_ctxt(vcpu);
4766                 ctxt->interruptibility = 0;
4767                 ctxt->have_exception = false;
4768                 ctxt->perm_ok = false;
4769
4770                 ctxt->only_vendor_specific_insn
4771                         = emulation_type & EMULTYPE_TRAP_UD;
4772
4773                 r = x86_decode_insn(ctxt, insn, insn_len);
4774
4775                 trace_kvm_emulate_insn_start(vcpu);
4776                 ++vcpu->stat.insn_emulation;
4777                 if (r)  {
4778                         if (emulation_type & EMULTYPE_TRAP_UD)
4779                                 return EMULATE_FAIL;
4780                         if (reexecute_instruction(vcpu, cr2))
4781                                 return EMULATE_DONE;
4782                         if (emulation_type & EMULTYPE_SKIP)
4783                                 return EMULATE_FAIL;
4784                         return handle_emulation_failure(vcpu);
4785                 }
4786         }
4787
4788         if (emulation_type & EMULTYPE_SKIP) {
4789                 kvm_rip_write(vcpu, ctxt->_eip);
4790                 return EMULATE_DONE;
4791         }
4792
4793         /* this is needed for vmware backdoor interface to work since it
4794            changes registers values  during IO operation */
4795         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4796                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4797                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4798         }
4799
4800 restart:
4801         r = x86_emulate_insn(ctxt);
4802
4803         if (r == EMULATION_INTERCEPTED)
4804                 return EMULATE_DONE;
4805
4806         if (r == EMULATION_FAILED) {
4807                 if (reexecute_instruction(vcpu, cr2))
4808                         return EMULATE_DONE;
4809
4810                 return handle_emulation_failure(vcpu);
4811         }
4812
4813         if (ctxt->have_exception) {
4814                 inject_emulated_exception(vcpu);
4815                 r = EMULATE_DONE;
4816         } else if (vcpu->arch.pio.count) {
4817                 if (!vcpu->arch.pio.in)
4818                         vcpu->arch.pio.count = 0;
4819                 else
4820                         writeback = false;
4821                 r = EMULATE_DO_MMIO;
4822         } else if (vcpu->mmio_needed) {
4823                 if (!vcpu->mmio_is_write)
4824                         writeback = false;
4825                 r = EMULATE_DO_MMIO;
4826         } else if (r == EMULATION_RESTART)
4827                 goto restart;
4828         else
4829                 r = EMULATE_DONE;
4830
4831         if (writeback) {
4832                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4833                 kvm_set_rflags(vcpu, ctxt->eflags);
4834                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4835                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4836                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4837                 kvm_rip_write(vcpu, ctxt->eip);
4838         } else
4839                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4840
4841         return r;
4842 }
4843 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4844
4845 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4846 {
4847         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4848         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4849                                             size, port, &val, 1);
4850         /* do not return to emulator after return from userspace */
4851         vcpu->arch.pio.count = 0;
4852         return ret;
4853 }
4854 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4855
4856 static void tsc_bad(void *info)
4857 {
4858         __this_cpu_write(cpu_tsc_khz, 0);
4859 }
4860
4861 static void tsc_khz_changed(void *data)
4862 {
4863         struct cpufreq_freqs *freq = data;
4864         unsigned long khz = 0;
4865
4866         if (data)
4867                 khz = freq->new;
4868         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4869                 khz = cpufreq_quick_get(raw_smp_processor_id());
4870         if (!khz)
4871                 khz = tsc_khz;
4872         __this_cpu_write(cpu_tsc_khz, khz);
4873 }
4874
4875 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4876                                      void *data)
4877 {
4878         struct cpufreq_freqs *freq = data;
4879         struct kvm *kvm;
4880         struct kvm_vcpu *vcpu;
4881         int i, send_ipi = 0;
4882
4883         /*
4884          * We allow guests to temporarily run on slowing clocks,
4885          * provided we notify them after, or to run on accelerating
4886          * clocks, provided we notify them before.  Thus time never
4887          * goes backwards.
4888          *
4889          * However, we have a problem.  We can't atomically update
4890          * the frequency of a given CPU from this function; it is
4891          * merely a notifier, which can be called from any CPU.
4892          * Changing the TSC frequency at arbitrary points in time
4893          * requires a recomputation of local variables related to
4894          * the TSC for each VCPU.  We must flag these local variables
4895          * to be updated and be sure the update takes place with the
4896          * new frequency before any guests proceed.
4897          *
4898          * Unfortunately, the combination of hotplug CPU and frequency
4899          * change creates an intractable locking scenario; the order
4900          * of when these callouts happen is undefined with respect to
4901          * CPU hotplug, and they can race with each other.  As such,
4902          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4903          * undefined; you can actually have a CPU frequency change take
4904          * place in between the computation of X and the setting of the
4905          * variable.  To protect against this problem, all updates of
4906          * the per_cpu tsc_khz variable are done in an interrupt
4907          * protected IPI, and all callers wishing to update the value
4908          * must wait for a synchronous IPI to complete (which is trivial
4909          * if the caller is on the CPU already).  This establishes the
4910          * necessary total order on variable updates.
4911          *
4912          * Note that because a guest time update may take place
4913          * anytime after the setting of the VCPU's request bit, the
4914          * correct TSC value must be set before the request.  However,
4915          * to ensure the update actually makes it to any guest which
4916          * starts running in hardware virtualization between the set
4917          * and the acquisition of the spinlock, we must also ping the
4918          * CPU after setting the request bit.
4919          *
4920          */
4921
4922         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4923                 return 0;
4924         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4925                 return 0;
4926
4927         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4928
4929         raw_spin_lock(&kvm_lock);
4930         list_for_each_entry(kvm, &vm_list, vm_list) {
4931                 kvm_for_each_vcpu(i, vcpu, kvm) {
4932                         if (vcpu->cpu != freq->cpu)
4933                                 continue;
4934                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4935                         if (vcpu->cpu != smp_processor_id())
4936                                 send_ipi = 1;
4937                 }
4938         }
4939         raw_spin_unlock(&kvm_lock);
4940
4941         if (freq->old < freq->new && send_ipi) {
4942                 /*
4943                  * We upscale the frequency.  Must make the guest
4944                  * doesn't see old kvmclock values while running with
4945                  * the new frequency, otherwise we risk the guest sees
4946                  * time go backwards.
4947                  *
4948                  * In case we update the frequency for another cpu
4949                  * (which might be in guest context) send an interrupt
4950                  * to kick the cpu out of guest context.  Next time
4951                  * guest context is entered kvmclock will be updated,
4952                  * so the guest will not see stale values.
4953                  */
4954                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4955         }
4956         return 0;
4957 }
4958
4959 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4960         .notifier_call  = kvmclock_cpufreq_notifier
4961 };
4962
4963 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4964                                         unsigned long action, void *hcpu)
4965 {
4966         unsigned int cpu = (unsigned long)hcpu;
4967
4968         switch (action) {
4969                 case CPU_ONLINE:
4970                 case CPU_DOWN_FAILED:
4971                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4972                         break;
4973                 case CPU_DOWN_PREPARE:
4974                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4975                         break;
4976         }
4977         return NOTIFY_OK;
4978 }
4979
4980 static struct notifier_block kvmclock_cpu_notifier_block = {
4981         .notifier_call  = kvmclock_cpu_notifier,
4982         .priority = -INT_MAX
4983 };
4984
4985 static void kvm_timer_init(void)
4986 {
4987         int cpu;
4988
4989         max_tsc_khz = tsc_khz;
4990         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4991         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4992 #ifdef CONFIG_CPU_FREQ
4993                 struct cpufreq_policy policy;
4994                 memset(&policy, 0, sizeof(policy));
4995                 cpu = get_cpu();
4996                 cpufreq_get_policy(&policy, cpu);
4997                 if (policy.cpuinfo.max_freq)
4998                         max_tsc_khz = policy.cpuinfo.max_freq;
4999                 put_cpu();
5000 #endif
5001                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5002                                           CPUFREQ_TRANSITION_NOTIFIER);
5003         }
5004         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5005         for_each_online_cpu(cpu)
5006                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5007 }
5008
5009 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5010
5011 static int kvm_is_in_guest(void)
5012 {
5013         return percpu_read(current_vcpu) != NULL;
5014 }
5015
5016 static int kvm_is_user_mode(void)
5017 {
5018         int user_mode = 3;
5019
5020         if (percpu_read(current_vcpu))
5021                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5022
5023         return user_mode != 0;
5024 }
5025
5026 static unsigned long kvm_get_guest_ip(void)
5027 {
5028         unsigned long ip = 0;
5029
5030         if (percpu_read(current_vcpu))
5031                 ip = kvm_rip_read(percpu_read(current_vcpu));
5032
5033         return ip;
5034 }
5035
5036 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5037         .is_in_guest            = kvm_is_in_guest,
5038         .is_user_mode           = kvm_is_user_mode,
5039         .get_guest_ip           = kvm_get_guest_ip,
5040 };
5041
5042 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5043 {
5044         percpu_write(current_vcpu, vcpu);
5045 }
5046 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5047
5048 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5049 {
5050         percpu_write(current_vcpu, NULL);
5051 }
5052 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5053
5054 int kvm_arch_init(void *opaque)
5055 {
5056         int r;
5057         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5058
5059         if (kvm_x86_ops) {
5060                 printk(KERN_ERR "kvm: already loaded the other module\n");
5061                 r = -EEXIST;
5062                 goto out;
5063         }
5064
5065         if (!ops->cpu_has_kvm_support()) {
5066                 printk(KERN_ERR "kvm: no hardware support\n");
5067                 r = -EOPNOTSUPP;
5068                 goto out;
5069         }
5070         if (ops->disabled_by_bios()) {
5071                 printk(KERN_ERR "kvm: disabled by bios\n");
5072                 r = -EOPNOTSUPP;
5073                 goto out;
5074         }
5075
5076         r = kvm_mmu_module_init();
5077         if (r)
5078                 goto out;
5079
5080         kvm_init_msr_list();
5081
5082         kvm_x86_ops = ops;
5083         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
5084         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5085                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5086
5087         kvm_timer_init();
5088
5089         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5090
5091         if (cpu_has_xsave)
5092                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5093
5094         return 0;
5095
5096 out:
5097         return r;
5098 }
5099
5100 void kvm_arch_exit(void)
5101 {
5102         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5103
5104         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5105                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5106                                             CPUFREQ_TRANSITION_NOTIFIER);
5107         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5108         kvm_x86_ops = NULL;
5109         kvm_mmu_module_exit();
5110 }
5111
5112 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5113 {
5114         ++vcpu->stat.halt_exits;
5115         if (irqchip_in_kernel(vcpu->kvm)) {
5116                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5117                 return 1;
5118         } else {
5119                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5120                 return 0;
5121         }
5122 }
5123 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5124
5125 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5126                            unsigned long a1)
5127 {
5128         if (is_long_mode(vcpu))
5129                 return a0;
5130         else
5131                 return a0 | ((gpa_t)a1 << 32);
5132 }
5133
5134 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5135 {
5136         u64 param, ingpa, outgpa, ret;
5137         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5138         bool fast, longmode;
5139         int cs_db, cs_l;
5140
5141         /*
5142          * hypercall generates UD from non zero cpl and real mode
5143          * per HYPER-V spec
5144          */
5145         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5146                 kvm_queue_exception(vcpu, UD_VECTOR);
5147                 return 0;
5148         }
5149
5150         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5151         longmode = is_long_mode(vcpu) && cs_l == 1;
5152
5153         if (!longmode) {
5154                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5155                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5156                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5157                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5158                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5159                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5160         }
5161 #ifdef CONFIG_X86_64
5162         else {
5163                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5164                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5165                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5166         }
5167 #endif
5168
5169         code = param & 0xffff;
5170         fast = (param >> 16) & 0x1;
5171         rep_cnt = (param >> 32) & 0xfff;
5172         rep_idx = (param >> 48) & 0xfff;
5173
5174         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5175
5176         switch (code) {
5177         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5178                 kvm_vcpu_on_spin(vcpu);
5179                 break;
5180         default:
5181                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5182                 break;
5183         }
5184
5185         ret = res | (((u64)rep_done & 0xfff) << 32);
5186         if (longmode) {
5187                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5188         } else {
5189                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5190                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5191         }
5192
5193         return 1;
5194 }
5195
5196 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5197 {
5198         unsigned long nr, a0, a1, a2, a3, ret;
5199         int r = 1;
5200
5201         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5202                 return kvm_hv_hypercall(vcpu);
5203
5204         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5205         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5206         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5207         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5208         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5209
5210         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5211
5212         if (!is_long_mode(vcpu)) {
5213                 nr &= 0xFFFFFFFF;
5214                 a0 &= 0xFFFFFFFF;
5215                 a1 &= 0xFFFFFFFF;
5216                 a2 &= 0xFFFFFFFF;
5217                 a3 &= 0xFFFFFFFF;
5218         }
5219
5220         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5221                 ret = -KVM_EPERM;
5222                 goto out;
5223         }
5224
5225         switch (nr) {
5226         case KVM_HC_VAPIC_POLL_IRQ:
5227                 ret = 0;
5228                 break;
5229         case KVM_HC_MMU_OP:
5230                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5231                 break;
5232         default:
5233                 ret = -KVM_ENOSYS;
5234                 break;
5235         }
5236 out:
5237         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5238         ++vcpu->stat.hypercalls;
5239         return r;
5240 }
5241 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5242
5243 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5244 {
5245         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5246         char instruction[3];
5247         unsigned long rip = kvm_rip_read(vcpu);
5248
5249         /*
5250          * Blow out the MMU to ensure that no other VCPU has an active mapping
5251          * to ensure that the updated hypercall appears atomically across all
5252          * VCPUs.
5253          */
5254         kvm_mmu_zap_all(vcpu->kvm);
5255
5256         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5257
5258         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5259 }
5260
5261 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5262 {
5263         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5264         int j, nent = vcpu->arch.cpuid_nent;
5265
5266         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5267         /* when no next entry is found, the current entry[i] is reselected */
5268         for (j = i + 1; ; j = (j + 1) % nent) {
5269                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5270                 if (ej->function == e->function) {
5271                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5272                         return j;
5273                 }
5274         }
5275         return 0; /* silence gcc, even though control never reaches here */
5276 }
5277
5278 /* find an entry with matching function, matching index (if needed), and that
5279  * should be read next (if it's stateful) */
5280 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5281         u32 function, u32 index)
5282 {
5283         if (e->function != function)
5284                 return 0;
5285         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5286                 return 0;
5287         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5288             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5289                 return 0;
5290         return 1;
5291 }
5292
5293 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5294                                               u32 function, u32 index)
5295 {
5296         int i;
5297         struct kvm_cpuid_entry2 *best = NULL;
5298
5299         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5300                 struct kvm_cpuid_entry2 *e;
5301
5302                 e = &vcpu->arch.cpuid_entries[i];
5303                 if (is_matching_cpuid_entry(e, function, index)) {
5304                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5305                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5306                         best = e;
5307                         break;
5308                 }
5309         }
5310         return best;
5311 }
5312 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5313
5314 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5315 {
5316         struct kvm_cpuid_entry2 *best;
5317
5318         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5319         if (!best || best->eax < 0x80000008)
5320                 goto not_found;
5321         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5322         if (best)
5323                 return best->eax & 0xff;
5324 not_found:
5325         return 36;
5326 }
5327
5328 /*
5329  * If no match is found, check whether we exceed the vCPU's limit
5330  * and return the content of the highest valid _standard_ leaf instead.
5331  * This is to satisfy the CPUID specification.
5332  */
5333 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5334                                                   u32 function, u32 index)
5335 {
5336         struct kvm_cpuid_entry2 *maxlevel;
5337
5338         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5339         if (!maxlevel || maxlevel->eax >= function)
5340                 return NULL;
5341         if (function & 0x80000000) {
5342                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5343                 if (!maxlevel)
5344                         return NULL;
5345         }
5346         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5347 }
5348
5349 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5350 {
5351         u32 function, index;
5352         struct kvm_cpuid_entry2 *best;
5353
5354         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5355         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5356         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5357         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5358         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5359         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5360         best = kvm_find_cpuid_entry(vcpu, function, index);
5361
5362         if (!best)
5363                 best = check_cpuid_limit(vcpu, function, index);
5364
5365         if (best) {
5366                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5367                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5368                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5369                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5370         }
5371         kvm_x86_ops->skip_emulated_instruction(vcpu);
5372         trace_kvm_cpuid(function,
5373                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5374                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5375                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5376                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5377 }
5378 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5379
5380 /*
5381  * Check if userspace requested an interrupt window, and that the
5382  * interrupt window is open.
5383  *
5384  * No need to exit to userspace if we already have an interrupt queued.
5385  */
5386 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5387 {
5388         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5389                 vcpu->run->request_interrupt_window &&
5390                 kvm_arch_interrupt_allowed(vcpu));
5391 }
5392
5393 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5394 {
5395         struct kvm_run *kvm_run = vcpu->run;
5396
5397         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5398         kvm_run->cr8 = kvm_get_cr8(vcpu);
5399         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5400         if (irqchip_in_kernel(vcpu->kvm))
5401                 kvm_run->ready_for_interrupt_injection = 1;
5402         else
5403                 kvm_run->ready_for_interrupt_injection =
5404                         kvm_arch_interrupt_allowed(vcpu) &&
5405                         !kvm_cpu_has_interrupt(vcpu) &&
5406                         !kvm_event_needs_reinjection(vcpu);
5407 }
5408
5409 static void vapic_enter(struct kvm_vcpu *vcpu)
5410 {
5411         struct kvm_lapic *apic = vcpu->arch.apic;
5412         struct page *page;
5413
5414         if (!apic || !apic->vapic_addr)
5415                 return;
5416
5417         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5418
5419         vcpu->arch.apic->vapic_page = page;
5420 }
5421
5422 static void vapic_exit(struct kvm_vcpu *vcpu)
5423 {
5424         struct kvm_lapic *apic = vcpu->arch.apic;
5425         int idx;
5426
5427         if (!apic || !apic->vapic_addr)
5428                 return;
5429
5430         idx = srcu_read_lock(&vcpu->kvm->srcu);
5431         kvm_release_page_dirty(apic->vapic_page);
5432         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5433         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5434 }
5435
5436 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5437 {
5438         int max_irr, tpr;
5439
5440         if (!kvm_x86_ops->update_cr8_intercept)
5441                 return;
5442
5443         if (!vcpu->arch.apic)
5444                 return;
5445
5446         if (!vcpu->arch.apic->vapic_addr)
5447                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5448         else
5449                 max_irr = -1;
5450
5451         if (max_irr != -1)
5452                 max_irr >>= 4;
5453
5454         tpr = kvm_lapic_get_cr8(vcpu);
5455
5456         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5457 }
5458
5459 static void inject_pending_event(struct kvm_vcpu *vcpu)
5460 {
5461         /* try to reinject previous events if any */
5462         if (vcpu->arch.exception.pending) {
5463                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5464                                         vcpu->arch.exception.has_error_code,
5465                                         vcpu->arch.exception.error_code);
5466                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5467                                           vcpu->arch.exception.has_error_code,
5468                                           vcpu->arch.exception.error_code,
5469                                           vcpu->arch.exception.reinject);
5470                 return;
5471         }
5472
5473         if (vcpu->arch.nmi_injected) {
5474                 kvm_x86_ops->set_nmi(vcpu);
5475                 return;
5476         }
5477
5478         if (vcpu->arch.interrupt.pending) {
5479                 kvm_x86_ops->set_irq(vcpu);
5480                 return;
5481         }
5482
5483         /* try to inject new event if pending */
5484         if (vcpu->arch.nmi_pending) {
5485                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5486                         vcpu->arch.nmi_pending = false;
5487                         vcpu->arch.nmi_injected = true;
5488                         kvm_x86_ops->set_nmi(vcpu);
5489                 }
5490         } else if (kvm_cpu_has_interrupt(vcpu)) {
5491                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5492                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5493                                             false);
5494                         kvm_x86_ops->set_irq(vcpu);
5495                 }
5496         }
5497 }
5498
5499 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5500 {
5501         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5502                         !vcpu->guest_xcr0_loaded) {
5503                 /* kvm_set_xcr() also depends on this */
5504                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5505                 vcpu->guest_xcr0_loaded = 1;
5506         }
5507 }
5508
5509 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5510 {
5511         if (vcpu->guest_xcr0_loaded) {
5512                 if (vcpu->arch.xcr0 != host_xcr0)
5513                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5514                 vcpu->guest_xcr0_loaded = 0;
5515         }
5516 }
5517
5518 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5519 {
5520         int r;
5521         bool nmi_pending;
5522         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5523                 vcpu->run->request_interrupt_window;
5524
5525         if (vcpu->requests) {
5526                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5527                         kvm_mmu_unload(vcpu);
5528                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5529                         __kvm_migrate_timers(vcpu);
5530                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5531                         r = kvm_guest_time_update(vcpu);
5532                         if (unlikely(r))
5533                                 goto out;
5534                 }
5535                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5536                         kvm_mmu_sync_roots(vcpu);
5537                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5538                         kvm_x86_ops->tlb_flush(vcpu);
5539                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5540                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5541                         r = 0;
5542                         goto out;
5543                 }
5544                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5545                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5546                         r = 0;
5547                         goto out;
5548                 }
5549                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5550                         vcpu->fpu_active = 0;
5551                         kvm_x86_ops->fpu_deactivate(vcpu);
5552                 }
5553                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5554                         /* Page is swapped out. Do synthetic halt */
5555                         vcpu->arch.apf.halted = true;
5556                         r = 1;
5557                         goto out;
5558                 }
5559                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5560                         record_steal_time(vcpu);
5561
5562         }
5563
5564         r = kvm_mmu_reload(vcpu);
5565         if (unlikely(r))
5566                 goto out;
5567
5568         /*
5569          * An NMI can be injected between local nmi_pending read and
5570          * vcpu->arch.nmi_pending read inside inject_pending_event().
5571          * But in that case, KVM_REQ_EVENT will be set, which makes
5572          * the race described above benign.
5573          */
5574         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5575
5576         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5577                 inject_pending_event(vcpu);
5578
5579                 /* enable NMI/IRQ window open exits if needed */
5580                 if (nmi_pending)
5581                         kvm_x86_ops->enable_nmi_window(vcpu);
5582                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5583                         kvm_x86_ops->enable_irq_window(vcpu);
5584
5585                 if (kvm_lapic_enabled(vcpu)) {
5586                         update_cr8_intercept(vcpu);
5587                         kvm_lapic_sync_to_vapic(vcpu);
5588                 }
5589         }
5590
5591         preempt_disable();
5592
5593         kvm_x86_ops->prepare_guest_switch(vcpu);
5594         if (vcpu->fpu_active)
5595                 kvm_load_guest_fpu(vcpu);
5596         kvm_load_guest_xcr0(vcpu);
5597
5598         vcpu->mode = IN_GUEST_MODE;
5599
5600         /* We should set ->mode before check ->requests,
5601          * see the comment in make_all_cpus_request.
5602          */
5603         smp_mb();
5604
5605         local_irq_disable();
5606
5607         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5608             || need_resched() || signal_pending(current)) {
5609                 vcpu->mode = OUTSIDE_GUEST_MODE;
5610                 smp_wmb();
5611                 local_irq_enable();
5612                 preempt_enable();
5613                 kvm_x86_ops->cancel_injection(vcpu);
5614                 r = 1;
5615                 goto out;
5616         }
5617
5618         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5619
5620         kvm_guest_enter();
5621
5622         if (unlikely(vcpu->arch.switch_db_regs)) {
5623                 set_debugreg(0, 7);
5624                 set_debugreg(vcpu->arch.eff_db[0], 0);
5625                 set_debugreg(vcpu->arch.eff_db[1], 1);
5626                 set_debugreg(vcpu->arch.eff_db[2], 2);
5627                 set_debugreg(vcpu->arch.eff_db[3], 3);
5628         }
5629
5630         trace_kvm_entry(vcpu->vcpu_id);
5631         kvm_x86_ops->run(vcpu);
5632
5633         /*
5634          * If the guest has used debug registers, at least dr7
5635          * will be disabled while returning to the host.
5636          * If we don't have active breakpoints in the host, we don't
5637          * care about the messed up debug address registers. But if
5638          * we have some of them active, restore the old state.
5639          */
5640         if (hw_breakpoint_active())
5641                 hw_breakpoint_restore();
5642
5643         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5644
5645         vcpu->mode = OUTSIDE_GUEST_MODE;
5646         smp_wmb();
5647         local_irq_enable();
5648
5649         ++vcpu->stat.exits;
5650
5651         /*
5652          * We must have an instruction between local_irq_enable() and
5653          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5654          * the interrupt shadow.  The stat.exits increment will do nicely.
5655          * But we need to prevent reordering, hence this barrier():
5656          */
5657         barrier();
5658
5659         kvm_guest_exit();
5660
5661         preempt_enable();
5662
5663         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5664
5665         /*
5666          * Profile KVM exit RIPs:
5667          */
5668         if (unlikely(prof_on == KVM_PROFILING)) {
5669                 unsigned long rip = kvm_rip_read(vcpu);
5670                 profile_hit(KVM_PROFILING, (void *)rip);
5671         }
5672
5673
5674         kvm_lapic_sync_from_vapic(vcpu);
5675
5676         r = kvm_x86_ops->handle_exit(vcpu);
5677 out:
5678         return r;
5679 }
5680
5681
5682 static int __vcpu_run(struct kvm_vcpu *vcpu)
5683 {
5684         int r;
5685         struct kvm *kvm = vcpu->kvm;
5686
5687         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5688                 pr_debug("vcpu %d received sipi with vector # %x\n",
5689                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5690                 kvm_lapic_reset(vcpu);
5691                 r = kvm_arch_vcpu_reset(vcpu);
5692                 if (r)
5693                         return r;
5694                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5695         }
5696
5697         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5698         vapic_enter(vcpu);
5699
5700         r = 1;
5701         while (r > 0) {
5702                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5703                     !vcpu->arch.apf.halted)
5704                         r = vcpu_enter_guest(vcpu);
5705                 else {
5706                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5707                         kvm_vcpu_block(vcpu);
5708                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5709                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5710                         {
5711                                 switch(vcpu->arch.mp_state) {
5712                                 case KVM_MP_STATE_HALTED:
5713                                         vcpu->arch.mp_state =
5714                                                 KVM_MP_STATE_RUNNABLE;
5715                                 case KVM_MP_STATE_RUNNABLE:
5716                                         vcpu->arch.apf.halted = false;
5717                                         break;
5718                                 case KVM_MP_STATE_SIPI_RECEIVED:
5719                                 default:
5720                                         r = -EINTR;
5721                                         break;
5722                                 }
5723                         }
5724                 }
5725
5726                 if (r <= 0)
5727                         break;
5728
5729                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5730                 if (kvm_cpu_has_pending_timer(vcpu))
5731                         kvm_inject_pending_timer_irqs(vcpu);
5732
5733                 if (dm_request_for_irq_injection(vcpu)) {
5734                         r = -EINTR;
5735                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5736                         ++vcpu->stat.request_irq_exits;
5737                 }
5738
5739                 kvm_check_async_pf_completion(vcpu);
5740
5741                 if (signal_pending(current)) {
5742                         r = -EINTR;
5743                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5744                         ++vcpu->stat.signal_exits;
5745                 }
5746                 if (need_resched()) {
5747                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5748                         kvm_resched(vcpu);
5749                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5750                 }
5751         }
5752
5753         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5754
5755         vapic_exit(vcpu);
5756
5757         return r;
5758 }
5759
5760 static int complete_mmio(struct kvm_vcpu *vcpu)
5761 {
5762         struct kvm_run *run = vcpu->run;
5763         int r;
5764
5765         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5766                 return 1;
5767
5768         if (vcpu->mmio_needed) {
5769                 vcpu->mmio_needed = 0;
5770                 if (!vcpu->mmio_is_write)
5771                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5772                                run->mmio.data, 8);
5773                 vcpu->mmio_index += 8;
5774                 if (vcpu->mmio_index < vcpu->mmio_size) {
5775                         run->exit_reason = KVM_EXIT_MMIO;
5776                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5777                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5778                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5779                         run->mmio.is_write = vcpu->mmio_is_write;
5780                         vcpu->mmio_needed = 1;
5781                         return 0;
5782                 }
5783                 if (vcpu->mmio_is_write)
5784                         return 1;
5785                 vcpu->mmio_read_completed = 1;
5786         }
5787         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5788         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5789         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5790         if (r != EMULATE_DONE)
5791                 return 0;
5792         return 1;
5793 }
5794
5795 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5796 {
5797         int r;
5798         sigset_t sigsaved;
5799
5800         if (!tsk_used_math(current) && init_fpu(current))
5801                 return -ENOMEM;
5802
5803         if (vcpu->sigset_active)
5804                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5805
5806         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5807                 kvm_vcpu_block(vcpu);
5808                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5809                 r = -EAGAIN;
5810                 goto out;
5811         }
5812
5813         /* re-sync apic's tpr */
5814         if (!irqchip_in_kernel(vcpu->kvm)) {
5815                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5816                         r = -EINVAL;
5817                         goto out;
5818                 }
5819         }
5820
5821         r = complete_mmio(vcpu);
5822         if (r <= 0)
5823                 goto out;
5824
5825         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5826                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5827                                      kvm_run->hypercall.ret);
5828
5829         r = __vcpu_run(vcpu);
5830
5831 out:
5832         post_kvm_run_save(vcpu);
5833         if (vcpu->sigset_active)
5834                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5835
5836         return r;
5837 }
5838
5839 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5840 {
5841         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5842                 /*
5843                  * We are here if userspace calls get_regs() in the middle of
5844                  * instruction emulation. Registers state needs to be copied
5845                  * back from emulation context to vcpu. Usrapace shouldn't do
5846                  * that usually, but some bad designed PV devices (vmware
5847                  * backdoor interface) need this to work
5848                  */
5849                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5850                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5851                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5852         }
5853         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5854         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5855         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5856         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5857         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5858         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5859         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5860         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5861 #ifdef CONFIG_X86_64
5862         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5863         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5864         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5865         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5866         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5867         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5868         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5869         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5870 #endif
5871
5872         regs->rip = kvm_rip_read(vcpu);
5873         regs->rflags = kvm_get_rflags(vcpu);
5874
5875         return 0;
5876 }
5877
5878 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5879 {
5880         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5881         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5882
5883         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5884         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5885         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5886         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5887         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5888         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5889         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5890         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5891 #ifdef CONFIG_X86_64
5892         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5893         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5894         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5895         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5896         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5897         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5898         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5899         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5900 #endif
5901
5902         kvm_rip_write(vcpu, regs->rip);
5903         kvm_set_rflags(vcpu, regs->rflags);
5904
5905         vcpu->arch.exception.pending = false;
5906
5907         kvm_make_request(KVM_REQ_EVENT, vcpu);
5908
5909         return 0;
5910 }
5911
5912 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5913 {
5914         struct kvm_segment cs;
5915
5916         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5917         *db = cs.db;
5918         *l = cs.l;
5919 }
5920 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5921
5922 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5923                                   struct kvm_sregs *sregs)
5924 {
5925         struct desc_ptr dt;
5926
5927         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5928         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5929         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5930         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5931         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5932         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5933
5934         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5935         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5936
5937         kvm_x86_ops->get_idt(vcpu, &dt);
5938         sregs->idt.limit = dt.size;
5939         sregs->idt.base = dt.address;
5940         kvm_x86_ops->get_gdt(vcpu, &dt);
5941         sregs->gdt.limit = dt.size;
5942         sregs->gdt.base = dt.address;
5943
5944         sregs->cr0 = kvm_read_cr0(vcpu);
5945         sregs->cr2 = vcpu->arch.cr2;
5946         sregs->cr3 = kvm_read_cr3(vcpu);
5947         sregs->cr4 = kvm_read_cr4(vcpu);
5948         sregs->cr8 = kvm_get_cr8(vcpu);
5949         sregs->efer = vcpu->arch.efer;
5950         sregs->apic_base = kvm_get_apic_base(vcpu);
5951
5952         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5953
5954         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5955                 set_bit(vcpu->arch.interrupt.nr,
5956                         (unsigned long *)sregs->interrupt_bitmap);
5957
5958         return 0;
5959 }
5960
5961 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5962                                     struct kvm_mp_state *mp_state)
5963 {
5964         mp_state->mp_state = vcpu->arch.mp_state;
5965         return 0;
5966 }
5967
5968 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5969                                     struct kvm_mp_state *mp_state)
5970 {
5971         vcpu->arch.mp_state = mp_state->mp_state;
5972         kvm_make_request(KVM_REQ_EVENT, vcpu);
5973         return 0;
5974 }
5975
5976 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5977                     bool has_error_code, u32 error_code)
5978 {
5979         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5980         int ret;
5981
5982         init_emulate_ctxt(vcpu);
5983
5984         ret = emulator_task_switch(ctxt, tss_selector, reason,
5985                                    has_error_code, error_code);
5986
5987         if (ret)
5988                 return EMULATE_FAIL;
5989
5990         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5991         kvm_rip_write(vcpu, ctxt->eip);
5992         kvm_set_rflags(vcpu, ctxt->eflags);
5993         kvm_make_request(KVM_REQ_EVENT, vcpu);
5994         return EMULATE_DONE;
5995 }
5996 EXPORT_SYMBOL_GPL(kvm_task_switch);
5997
5998 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5999                                   struct kvm_sregs *sregs)
6000 {
6001         int mmu_reset_needed = 0;
6002         int pending_vec, max_bits, idx;
6003         struct desc_ptr dt;
6004
6005         dt.size = sregs->idt.limit;
6006         dt.address = sregs->idt.base;
6007         kvm_x86_ops->set_idt(vcpu, &dt);
6008         dt.size = sregs->gdt.limit;
6009         dt.address = sregs->gdt.base;
6010         kvm_x86_ops->set_gdt(vcpu, &dt);
6011
6012         vcpu->arch.cr2 = sregs->cr2;
6013         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6014         vcpu->arch.cr3 = sregs->cr3;
6015         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6016
6017         kvm_set_cr8(vcpu, sregs->cr8);
6018
6019         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6020         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6021         kvm_set_apic_base(vcpu, sregs->apic_base);
6022
6023         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6024         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6025         vcpu->arch.cr0 = sregs->cr0;
6026
6027         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6028         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6029         if (sregs->cr4 & X86_CR4_OSXSAVE)
6030                 update_cpuid(vcpu);
6031
6032         idx = srcu_read_lock(&vcpu->kvm->srcu);
6033         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6034                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6035                 mmu_reset_needed = 1;
6036         }
6037         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6038
6039         if (mmu_reset_needed)
6040                 kvm_mmu_reset_context(vcpu);
6041
6042         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6043         pending_vec = find_first_bit(
6044                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6045         if (pending_vec < max_bits) {
6046                 kvm_queue_interrupt(vcpu, pending_vec, false);
6047                 pr_debug("Set back pending irq %d\n", pending_vec);
6048         }
6049
6050         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6051         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6052         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6053         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6054         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6055         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6056
6057         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6058         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6059
6060         update_cr8_intercept(vcpu);
6061
6062         /* Older userspace won't unhalt the vcpu on reset. */
6063         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6064             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6065             !is_protmode(vcpu))
6066                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6067
6068         kvm_make_request(KVM_REQ_EVENT, vcpu);
6069
6070         return 0;
6071 }
6072
6073 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6074                                         struct kvm_guest_debug *dbg)
6075 {
6076         unsigned long rflags;
6077         int i, r;
6078
6079         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6080                 r = -EBUSY;
6081                 if (vcpu->arch.exception.pending)
6082                         goto out;
6083                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6084                         kvm_queue_exception(vcpu, DB_VECTOR);
6085                 else
6086                         kvm_queue_exception(vcpu, BP_VECTOR);
6087         }
6088
6089         /*
6090          * Read rflags as long as potentially injected trace flags are still
6091          * filtered out.
6092          */
6093         rflags = kvm_get_rflags(vcpu);
6094
6095         vcpu->guest_debug = dbg->control;
6096         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6097                 vcpu->guest_debug = 0;
6098
6099         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6100                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6101                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6102                 vcpu->arch.switch_db_regs =
6103                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6104         } else {
6105                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6106                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6107                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6108         }
6109
6110         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6111                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6112                         get_segment_base(vcpu, VCPU_SREG_CS);
6113
6114         /*
6115          * Trigger an rflags update that will inject or remove the trace
6116          * flags.
6117          */
6118         kvm_set_rflags(vcpu, rflags);
6119
6120         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6121
6122         r = 0;
6123
6124 out:
6125
6126         return r;
6127 }
6128
6129 /*
6130  * Translate a guest virtual address to a guest physical address.
6131  */
6132 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6133                                     struct kvm_translation *tr)
6134 {
6135         unsigned long vaddr = tr->linear_address;
6136         gpa_t gpa;
6137         int idx;
6138
6139         idx = srcu_read_lock(&vcpu->kvm->srcu);
6140         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6141         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6142         tr->physical_address = gpa;
6143         tr->valid = gpa != UNMAPPED_GVA;
6144         tr->writeable = 1;
6145         tr->usermode = 0;
6146
6147         return 0;
6148 }
6149
6150 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6151 {
6152         struct i387_fxsave_struct *fxsave =
6153                         &vcpu->arch.guest_fpu.state->fxsave;
6154
6155         memcpy(fpu->fpr, fxsave->st_space, 128);
6156         fpu->fcw = fxsave->cwd;
6157         fpu->fsw = fxsave->swd;
6158         fpu->ftwx = fxsave->twd;
6159         fpu->last_opcode = fxsave->fop;
6160         fpu->last_ip = fxsave->rip;
6161         fpu->last_dp = fxsave->rdp;
6162         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6163
6164         return 0;
6165 }
6166
6167 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6168 {
6169         struct i387_fxsave_struct *fxsave =
6170                         &vcpu->arch.guest_fpu.state->fxsave;
6171
6172         memcpy(fxsave->st_space, fpu->fpr, 128);
6173         fxsave->cwd = fpu->fcw;
6174         fxsave->swd = fpu->fsw;
6175         fxsave->twd = fpu->ftwx;
6176         fxsave->fop = fpu->last_opcode;
6177         fxsave->rip = fpu->last_ip;
6178         fxsave->rdp = fpu->last_dp;
6179         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6180
6181         return 0;
6182 }
6183
6184 int fx_init(struct kvm_vcpu *vcpu)
6185 {
6186         int err;
6187
6188         err = fpu_alloc(&vcpu->arch.guest_fpu);
6189         if (err)
6190                 return err;
6191
6192         fpu_finit(&vcpu->arch.guest_fpu);
6193
6194         /*
6195          * Ensure guest xcr0 is valid for loading
6196          */
6197         vcpu->arch.xcr0 = XSTATE_FP;
6198
6199         vcpu->arch.cr0 |= X86_CR0_ET;
6200
6201         return 0;
6202 }
6203 EXPORT_SYMBOL_GPL(fx_init);
6204
6205 static void fx_free(struct kvm_vcpu *vcpu)
6206 {
6207         fpu_free(&vcpu->arch.guest_fpu);
6208 }
6209
6210 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6211 {
6212         if (vcpu->guest_fpu_loaded)
6213                 return;
6214
6215         /*
6216          * Restore all possible states in the guest,
6217          * and assume host would use all available bits.
6218          * Guest xcr0 would be loaded later.
6219          */
6220         kvm_put_guest_xcr0(vcpu);
6221         vcpu->guest_fpu_loaded = 1;
6222         unlazy_fpu(current);
6223         fpu_restore_checking(&vcpu->arch.guest_fpu);
6224         trace_kvm_fpu(1);
6225 }
6226
6227 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6228 {
6229         kvm_put_guest_xcr0(vcpu);
6230
6231         if (!vcpu->guest_fpu_loaded)
6232                 return;
6233
6234         vcpu->guest_fpu_loaded = 0;
6235         fpu_save_init(&vcpu->arch.guest_fpu);
6236         ++vcpu->stat.fpu_reload;
6237         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6238         trace_kvm_fpu(0);
6239 }
6240
6241 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6242 {
6243         kvmclock_reset(vcpu);
6244
6245         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6246         fx_free(vcpu);
6247         kvm_x86_ops->vcpu_free(vcpu);
6248 }
6249
6250 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6251                                                 unsigned int id)
6252 {
6253         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6254                 printk_once(KERN_WARNING
6255                 "kvm: SMP vm created on host with unstable TSC; "
6256                 "guest TSC will not be reliable\n");
6257         return kvm_x86_ops->vcpu_create(kvm, id);
6258 }
6259
6260 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6261 {
6262         int r;
6263
6264         vcpu->arch.mtrr_state.have_fixed = 1;
6265         vcpu_load(vcpu);
6266         r = kvm_arch_vcpu_reset(vcpu);
6267         if (r == 0)
6268                 r = kvm_mmu_setup(vcpu);
6269         vcpu_put(vcpu);
6270
6271         return r;
6272 }
6273
6274 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6275 {
6276         vcpu->arch.apf.msr_val = 0;
6277
6278         vcpu_load(vcpu);
6279         kvm_mmu_unload(vcpu);
6280         vcpu_put(vcpu);
6281
6282         fx_free(vcpu);
6283         kvm_x86_ops->vcpu_free(vcpu);
6284 }
6285
6286 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6287 {
6288         vcpu->arch.nmi_pending = false;
6289         vcpu->arch.nmi_injected = false;
6290
6291         vcpu->arch.switch_db_regs = 0;
6292         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6293         vcpu->arch.dr6 = DR6_FIXED_1;
6294         vcpu->arch.dr7 = DR7_FIXED_1;
6295
6296         kvm_make_request(KVM_REQ_EVENT, vcpu);
6297         vcpu->arch.apf.msr_val = 0;
6298         vcpu->arch.st.msr_val = 0;
6299
6300         kvmclock_reset(vcpu);
6301
6302         kvm_clear_async_pf_completion_queue(vcpu);
6303         kvm_async_pf_hash_reset(vcpu);
6304         vcpu->arch.apf.halted = false;
6305
6306         return kvm_x86_ops->vcpu_reset(vcpu);
6307 }
6308
6309 int kvm_arch_hardware_enable(void *garbage)
6310 {
6311         struct kvm *kvm;
6312         struct kvm_vcpu *vcpu;
6313         int i;
6314
6315         kvm_shared_msr_cpu_online();
6316         list_for_each_entry(kvm, &vm_list, vm_list)
6317                 kvm_for_each_vcpu(i, vcpu, kvm)
6318                         if (vcpu->cpu == smp_processor_id())
6319                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6320         return kvm_x86_ops->hardware_enable(garbage);
6321 }
6322
6323 void kvm_arch_hardware_disable(void *garbage)
6324 {
6325         kvm_x86_ops->hardware_disable(garbage);
6326         drop_user_return_notifiers(garbage);
6327 }
6328
6329 int kvm_arch_hardware_setup(void)
6330 {
6331         return kvm_x86_ops->hardware_setup();
6332 }
6333
6334 void kvm_arch_hardware_unsetup(void)
6335 {
6336         kvm_x86_ops->hardware_unsetup();
6337 }
6338
6339 void kvm_arch_check_processor_compat(void *rtn)
6340 {
6341         kvm_x86_ops->check_processor_compatibility(rtn);
6342 }
6343
6344 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6345 {
6346         struct page *page;
6347         struct kvm *kvm;
6348         int r;
6349
6350         BUG_ON(vcpu->kvm == NULL);
6351         kvm = vcpu->kvm;
6352
6353         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6354         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6355         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6356         vcpu->arch.mmu.translate_gpa = translate_gpa;
6357         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6358         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6359                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6360         else
6361                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6362
6363         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6364         if (!page) {
6365                 r = -ENOMEM;
6366                 goto fail;
6367         }
6368         vcpu->arch.pio_data = page_address(page);
6369
6370         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6371
6372         r = kvm_mmu_create(vcpu);
6373         if (r < 0)
6374                 goto fail_free_pio_data;
6375
6376         if (irqchip_in_kernel(kvm)) {
6377                 r = kvm_create_lapic(vcpu);
6378                 if (r < 0)
6379                         goto fail_mmu_destroy;
6380         }
6381
6382         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6383                                        GFP_KERNEL);
6384         if (!vcpu->arch.mce_banks) {
6385                 r = -ENOMEM;
6386                 goto fail_free_lapic;
6387         }
6388         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6389
6390         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6391                 goto fail_free_mce_banks;
6392
6393         kvm_async_pf_hash_reset(vcpu);
6394
6395         return 0;
6396 fail_free_mce_banks:
6397         kfree(vcpu->arch.mce_banks);
6398 fail_free_lapic:
6399         kvm_free_lapic(vcpu);
6400 fail_mmu_destroy:
6401         kvm_mmu_destroy(vcpu);
6402 fail_free_pio_data:
6403         free_page((unsigned long)vcpu->arch.pio_data);
6404 fail:
6405         return r;
6406 }
6407
6408 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6409 {
6410         int idx;
6411
6412         kfree(vcpu->arch.mce_banks);
6413         kvm_free_lapic(vcpu);
6414         idx = srcu_read_lock(&vcpu->kvm->srcu);
6415         kvm_mmu_destroy(vcpu);
6416         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6417         free_page((unsigned long)vcpu->arch.pio_data);
6418 }
6419
6420 int kvm_arch_init_vm(struct kvm *kvm)
6421 {
6422         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6423         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6424
6425         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6426         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6427
6428         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6429
6430         return 0;
6431 }
6432
6433 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6434 {
6435         vcpu_load(vcpu);
6436         kvm_mmu_unload(vcpu);
6437         vcpu_put(vcpu);
6438 }
6439
6440 static void kvm_free_vcpus(struct kvm *kvm)
6441 {
6442         unsigned int i;
6443         struct kvm_vcpu *vcpu;
6444
6445         /*
6446          * Unpin any mmu pages first.
6447          */
6448         kvm_for_each_vcpu(i, vcpu, kvm) {
6449                 kvm_clear_async_pf_completion_queue(vcpu);
6450                 kvm_unload_vcpu_mmu(vcpu);
6451         }
6452         kvm_for_each_vcpu(i, vcpu, kvm)
6453                 kvm_arch_vcpu_free(vcpu);
6454
6455         mutex_lock(&kvm->lock);
6456         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6457                 kvm->vcpus[i] = NULL;
6458
6459         atomic_set(&kvm->online_vcpus, 0);
6460         mutex_unlock(&kvm->lock);
6461 }
6462
6463 void kvm_arch_sync_events(struct kvm *kvm)
6464 {
6465         kvm_free_all_assigned_devices(kvm);
6466         kvm_free_pit(kvm);
6467 }
6468
6469 void kvm_arch_destroy_vm(struct kvm *kvm)
6470 {
6471         kvm_iommu_unmap_guest(kvm);
6472         kfree(kvm->arch.vpic);
6473         kfree(kvm->arch.vioapic);
6474         kvm_free_vcpus(kvm);
6475         if (kvm->arch.apic_access_page)
6476                 put_page(kvm->arch.apic_access_page);
6477         if (kvm->arch.ept_identity_pagetable)
6478                 put_page(kvm->arch.ept_identity_pagetable);
6479 }
6480
6481 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6482                                 struct kvm_memory_slot *memslot,
6483                                 struct kvm_memory_slot old,
6484                                 struct kvm_userspace_memory_region *mem,
6485                                 int user_alloc)
6486 {
6487         int npages = memslot->npages;
6488         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6489
6490         /* Prevent internal slot pages from being moved by fork()/COW. */
6491         if (memslot->id >= KVM_MEMORY_SLOTS)
6492                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6493
6494         /*To keep backward compatibility with older userspace,
6495          *x86 needs to hanlde !user_alloc case.
6496          */
6497         if (!user_alloc) {
6498                 if (npages && !old.rmap) {
6499                         unsigned long userspace_addr;
6500
6501                         down_write(&current->mm->mmap_sem);
6502                         userspace_addr = do_mmap(NULL, 0,
6503                                                  npages * PAGE_SIZE,
6504                                                  PROT_READ | PROT_WRITE,
6505                                                  map_flags,
6506                                                  0);
6507                         up_write(&current->mm->mmap_sem);
6508
6509                         if (IS_ERR((void *)userspace_addr))
6510                                 return PTR_ERR((void *)userspace_addr);
6511
6512                         memslot->userspace_addr = userspace_addr;
6513                 }
6514         }
6515
6516
6517         return 0;
6518 }
6519
6520 void kvm_arch_commit_memory_region(struct kvm *kvm,
6521                                 struct kvm_userspace_memory_region *mem,
6522                                 struct kvm_memory_slot old,
6523                                 int user_alloc)
6524 {
6525
6526         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6527
6528         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6529                 int ret;
6530
6531                 down_write(&current->mm->mmap_sem);
6532                 ret = do_munmap(current->mm, old.userspace_addr,
6533                                 old.npages * PAGE_SIZE);
6534                 up_write(&current->mm->mmap_sem);
6535                 if (ret < 0)
6536                         printk(KERN_WARNING
6537                                "kvm_vm_ioctl_set_memory_region: "
6538                                "failed to munmap memory\n");
6539         }
6540
6541         if (!kvm->arch.n_requested_mmu_pages)
6542                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6543
6544         spin_lock(&kvm->mmu_lock);
6545         if (nr_mmu_pages)
6546                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6547         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6548         spin_unlock(&kvm->mmu_lock);
6549 }
6550
6551 void kvm_arch_flush_shadow(struct kvm *kvm)
6552 {
6553         kvm_mmu_zap_all(kvm);
6554         kvm_reload_remote_mmus(kvm);
6555 }
6556
6557 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6558 {
6559         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6560                 !vcpu->arch.apf.halted)
6561                 || !list_empty_careful(&vcpu->async_pf.done)
6562                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6563                 || vcpu->arch.nmi_pending ||
6564                 (kvm_arch_interrupt_allowed(vcpu) &&
6565                  kvm_cpu_has_interrupt(vcpu));
6566 }
6567
6568 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6569 {
6570         int me;
6571         int cpu = vcpu->cpu;
6572
6573         if (waitqueue_active(&vcpu->wq)) {
6574                 wake_up_interruptible(&vcpu->wq);
6575                 ++vcpu->stat.halt_wakeup;
6576         }
6577
6578         me = get_cpu();
6579         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6580                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6581                         smp_send_reschedule(cpu);
6582         put_cpu();
6583 }
6584
6585 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6586 {
6587         return kvm_x86_ops->interrupt_allowed(vcpu);
6588 }
6589
6590 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6591 {
6592         unsigned long current_rip = kvm_rip_read(vcpu) +
6593                 get_segment_base(vcpu, VCPU_SREG_CS);
6594
6595         return current_rip == linear_rip;
6596 }
6597 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6598
6599 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6600 {
6601         unsigned long rflags;
6602
6603         rflags = kvm_x86_ops->get_rflags(vcpu);
6604         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6605                 rflags &= ~X86_EFLAGS_TF;
6606         return rflags;
6607 }
6608 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6609
6610 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6611 {
6612         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6613             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6614                 rflags |= X86_EFLAGS_TF;
6615         kvm_x86_ops->set_rflags(vcpu, rflags);
6616         kvm_make_request(KVM_REQ_EVENT, vcpu);
6617 }
6618 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6619
6620 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6621 {
6622         int r;
6623
6624         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6625               is_error_page(work->page))
6626                 return;
6627
6628         r = kvm_mmu_reload(vcpu);
6629         if (unlikely(r))
6630                 return;
6631
6632         if (!vcpu->arch.mmu.direct_map &&
6633               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6634                 return;
6635
6636         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6637 }
6638
6639 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6640 {
6641         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6642 }
6643
6644 static inline u32 kvm_async_pf_next_probe(u32 key)
6645 {
6646         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6647 }
6648
6649 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6650 {
6651         u32 key = kvm_async_pf_hash_fn(gfn);
6652
6653         while (vcpu->arch.apf.gfns[key] != ~0)
6654                 key = kvm_async_pf_next_probe(key);
6655
6656         vcpu->arch.apf.gfns[key] = gfn;
6657 }
6658
6659 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6660 {
6661         int i;
6662         u32 key = kvm_async_pf_hash_fn(gfn);
6663
6664         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6665                      (vcpu->arch.apf.gfns[key] != gfn &&
6666                       vcpu->arch.apf.gfns[key] != ~0); i++)
6667                 key = kvm_async_pf_next_probe(key);
6668
6669         return key;
6670 }
6671
6672 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6673 {
6674         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6675 }
6676
6677 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6678 {
6679         u32 i, j, k;
6680
6681         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6682         while (true) {
6683                 vcpu->arch.apf.gfns[i] = ~0;
6684                 do {
6685                         j = kvm_async_pf_next_probe(j);
6686                         if (vcpu->arch.apf.gfns[j] == ~0)
6687                                 return;
6688                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6689                         /*
6690                          * k lies cyclically in ]i,j]
6691                          * |    i.k.j |
6692                          * |....j i.k.| or  |.k..j i...|
6693                          */
6694                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6695                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6696                 i = j;
6697         }
6698 }
6699
6700 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6701 {
6702
6703         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6704                                       sizeof(val));
6705 }
6706
6707 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6708                                      struct kvm_async_pf *work)
6709 {
6710         struct x86_exception fault;
6711
6712         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6713         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6714
6715         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6716             (vcpu->arch.apf.send_user_only &&
6717              kvm_x86_ops->get_cpl(vcpu) == 0))
6718                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6719         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6720                 fault.vector = PF_VECTOR;
6721                 fault.error_code_valid = true;
6722                 fault.error_code = 0;
6723                 fault.nested_page_fault = false;
6724                 fault.address = work->arch.token;
6725                 kvm_inject_page_fault(vcpu, &fault);
6726         }
6727 }
6728
6729 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6730                                  struct kvm_async_pf *work)
6731 {
6732         struct x86_exception fault;
6733
6734         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6735         if (is_error_page(work->page))
6736                 work->arch.token = ~0; /* broadcast wakeup */
6737         else
6738                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6739
6740         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6741             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6742                 fault.vector = PF_VECTOR;
6743                 fault.error_code_valid = true;
6744                 fault.error_code = 0;
6745                 fault.nested_page_fault = false;
6746                 fault.address = work->arch.token;
6747                 kvm_inject_page_fault(vcpu, &fault);
6748         }
6749         vcpu->arch.apf.halted = false;
6750 }
6751
6752 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6753 {
6754         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6755                 return true;
6756         else
6757                 return !kvm_event_needs_reinjection(vcpu) &&
6758                         kvm_x86_ops->interrupt_allowed(vcpu);
6759 }
6760
6761 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6762 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6763 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6764 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6765 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6766 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6767 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6768 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6769 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6770 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6771 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6772 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);