arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350
 351 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 352 {
 353         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 354                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 355         else
 356                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 357 }
 358
 359 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 360 {
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362         vcpu->arch.nmi_pending = 1;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 365
 366 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 367 {
 368         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 371
 372 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 377
 378 /*
 379  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 380  * a #GP and return false.
 381  */
 382 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 383 {
 384         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 385                 return true;
 386         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 387         return false;
 388 }
 389 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 390
 391 /*
 392  * This function will be used to read from the physical memory of the currently
 393  * running guest. The difference to kvm_read_guest_page is that this function
 394  * can read from guest physical or from the guest's guest physical memory.
 395  */
 396 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 397                             gfn_t ngfn, void *data, int offset, int len,
 398                             u32 access)
 399 {
 400         gfn_t real_gfn;
 401         gpa_t ngpa;
 402
 403         ngpa     = gfn_to_gpa(ngfn);
 404         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 405         if (real_gfn == UNMAPPED_GVA)
 406                 return -EFAULT;
 407
 408         real_gfn = gpa_to_gfn(real_gfn);
 409
 410         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 413
 414 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 415                                void *data, int offset, int len, u32 access)
 416 {
 417         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 418                                        data, offset, len, access);
 419 }
 420
 421 /*
 422  * Load the pae pdptrs.  Return true is they are all valid.
 423  */
 424 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 425 {
 426         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 427         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 428         int i;
 429         int ret;
 430         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 431
 432         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 433                                       offset * sizeof(u64), sizeof(pdpte),
 434                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 435         if (ret < 0) {
 436                 ret = 0;
 437                 goto out;
 438         }
 439         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 440                 if (is_present_gpte(pdpte[i]) &&
 441                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 442                         ret = 0;
 443                         goto out;
 444                 }
 445         }
 446         ret = 1;
 447
 448         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 449         __set_bit(VCPU_EXREG_PDPTR,
 450                   (unsigned long *)&vcpu->arch.regs_avail);
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_dirty);
 453 out:
 454
 455         return ret;
 456 }
 457 EXPORT_SYMBOL_GPL(load_pdptrs);
 458
 459 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 460 {
 461         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 462         bool changed = true;
 463         int offset;
 464         gfn_t gfn;
 465         int r;
 466
 467         if (is_long_mode(vcpu) || !is_pae(vcpu))
 468                 return false;
 469
 470         if (!test_bit(VCPU_EXREG_PDPTR,
 471                       (unsigned long *)&vcpu->arch.regs_avail))
 472                 return true;
 473
 474         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 475         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 476         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 477                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 478         if (r < 0)
 479                 goto out;
 480         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 481 out:
 482
 483         return changed;
 484 }
 485
 486 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 487 {
 488         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 489         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 490                                     X86_CR0_CD | X86_CR0_NW;
 491
 492         cr0 |= X86_CR0_ET;
 493
 494 #ifdef CONFIG_X86_64
 495         if (cr0 & 0xffffffff00000000UL)
 496                 return 1;
 497 #endif
 498
 499         cr0 &= ~CR0_RESERVED_BITS;
 500
 501         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 502                 return 1;
 503
 504         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 505                 return 1;
 506
 507         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 508 #ifdef CONFIG_X86_64
 509                 if ((vcpu->arch.efer & EFER_LME)) {
 510                         int cs_db, cs_l;
 511
 512                         if (!is_pae(vcpu))
 513                                 return 1;
 514                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 515                         if (cs_l)
 516                                 return 1;
 517                 } else
 518 #endif
 519                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 520                                                  kvm_read_cr3(vcpu)))
 521                         return 1;
 522         }
 523
 524         kvm_x86_ops->set_cr0(vcpu, cr0);
 525
 526         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 527                 kvm_clear_async_pf_completion_queue(vcpu);
 528                 kvm_async_pf_hash_reset(vcpu);
 529         }
 530
 531         if ((cr0 ^ old_cr0) & update_bits)
 532                 kvm_mmu_reset_context(vcpu);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 536
 537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 538 {
 539         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_lmsw);
 542
 543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 544 {
 545         u64 xcr0;
 546
 547         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 548         if (index != XCR_XFEATURE_ENABLED_MASK)
 549                 return 1;
 550         xcr0 = xcr;
 551         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 552                 return 1;
 553         if (!(xcr0 & XSTATE_FP))
 554                 return 1;
 555         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 556                 return 1;
 557         if (xcr0 & ~host_xcr0)
 558                 return 1;
 559         vcpu->arch.xcr0 = xcr0;
 560         vcpu->guest_xcr0_loaded = 0;
 561         return 0;
 562 }
 563
 564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 565 {
 566         if (__kvm_set_xcr(vcpu, index, xcr)) {
 567                 kvm_inject_gp(vcpu, 0);
 568                 return 1;
 569         }
 570         return 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 573
 574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 580 }
 581
 582 static void update_cpuid(struct kvm_vcpu *vcpu)
 583 {
 584         struct kvm_cpuid_entry2 *best;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         if (!best)
 588                 return;
 589
 590         /* Update OSXSAVE bit */
 591         if (cpu_has_xsave && best->function == 0x1) {
 592                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 593                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 594                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 595         }
 596 }
 597
 598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 599 {
 600         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 601         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 602
 603         if (cr4 & CR4_RESERVED_BITS)
 604                 return 1;
 605
 606         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 607                 return 1;
 608
 609         if (is_long_mode(vcpu)) {
 610                 if (!(cr4 & X86_CR4_PAE))
 611                         return 1;
 612         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 613                    && ((cr4 ^ old_cr4) & pdptr_bits)
 614                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 615                                    kvm_read_cr3(vcpu)))
 616                 return 1;
 617
 618         if (cr4 & X86_CR4_VMXE)
 619                 return 1;
 620
 621         kvm_x86_ops->set_cr4(vcpu, cr4);
 622
 623         if ((cr4 ^ old_cr4) & pdptr_bits)
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 643                         return 1;
 644         } else {
 645                 if (is_pae(vcpu)) {
 646                         if (cr3 & CR3_PAE_RESERVED_BITS)
 647                                 return 1;
 648                         if (is_paging(vcpu) &&
 649                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 650                                 return 1;
 651                 }
 652                 /*
 653                  * We don't check reserved bits in nonpae mode, because
 654                  * this isn't enforced, and VMware depends on this.
 655                  */
 656         }
 657
 658         /*
 659          * Does the new cr3 value map to physical memory? (Note, we
 660          * catch an invalid cr3 even in real-mode, because it would
 661          * cause trouble later on when we turn on paging anyway.)
 662          *
 663          * A real CPU would silently accept an invalid cr3 and would
 664          * attempt to use it - with largely undefined (and often hard
 665          * to debug) behavior on the guest side.
 666          */
 667         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 668                 return 1;
 669         vcpu->arch.cr3 = cr3;
 670         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 671         vcpu->arch.mmu.new_cr3(vcpu);
 672         return 0;
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 675
 676 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 677 {
 678         if (cr8 & CR8_RESERVED_BITS)
 679                 return 1;
 680         if (irqchip_in_kernel(vcpu->kvm))
 681                 kvm_lapic_set_tpr(vcpu, cr8);
 682         else
 683                 vcpu->arch.cr8 = cr8;
 684         return 0;
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 687
 688 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 689 {
 690         if (irqchip_in_kernel(vcpu->kvm))
 691                 return kvm_lapic_get_cr8(vcpu);
 692         else
 693                 return vcpu->arch.cr8;
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 696
 697 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 698 {
 699         switch (dr) {
 700         case 0 ... 3:
 701                 vcpu->arch.db[dr] = val;
 702                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 703                         vcpu->arch.eff_db[dr] = val;
 704                 break;
 705         case 4:
 706                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 707                         return 1; /* #UD */
 708                 /* fall through */
 709         case 6:
 710                 if (val & 0xffffffff00000000ULL)
 711                         return -1; /* #GP */
 712                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 713                 break;
 714         case 5:
 715                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 716                         return 1; /* #UD */
 717                 /* fall through */
 718         default: /* 7 */
 719                 if (val & 0xffffffff00000000ULL)
 720                         return -1; /* #GP */
 721                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 722                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 723                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 724                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 725                 }
 726                 break;
 727         }
 728
 729         return 0;
 730 }
 731
 732 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 733 {
 734         int res;
 735
 736         res = __kvm_set_dr(vcpu, dr, val);
 737         if (res > 0)
 738                 kvm_queue_exception(vcpu, UD_VECTOR);
 739         else if (res < 0)
 740                 kvm_inject_gp(vcpu, 0);
 741
 742         return res;
 743 }
 744 EXPORT_SYMBOL_GPL(kvm_set_dr);
 745
 746 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 747 {
 748         switch (dr) {
 749         case 0 ... 3:
 750                 *val = vcpu->arch.db[dr];
 751                 break;
 752         case 4:
 753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                         return 1;
 755                 /* fall through */
 756         case 6:
 757                 *val = vcpu->arch.dr6;
 758                 break;
 759         case 5:
 760                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 761                         return 1;
 762                 /* fall through */
 763         default: /* 7 */
 764                 *val = vcpu->arch.dr7;
 765                 break;
 766         }
 767
 768         return 0;
 769 }
 770
 771 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 772 {
 773         if (_kvm_get_dr(vcpu, dr, val)) {
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775                 return 1;
 776         }
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_get_dr);
 780
 781 /*
 782  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 783  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 784  *
 785  * This list is modified at module load time to reflect the
 786  * capabilities of the host cpu. This capabilities test skips MSRs that are
 787  * kvm-specific. Those are put in the beginning of the list.
 788  */
 789
 790 #define KVM_SAVE_MSRS_BEGIN     8
 791 static u32 msrs_to_save[] = {
 792         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 793         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 794         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 795         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 796         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 797         MSR_STAR,
 798 #ifdef CONFIG_X86_64
 799         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 800 #endif
 801         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 802 };
 803
 804 static unsigned num_msrs_to_save;
 805
 806 static u32 emulated_msrs[] = {
 807         MSR_IA32_MISC_ENABLE,
 808         MSR_IA32_MCG_STATUS,
 809         MSR_IA32_MCG_CTL,
 810 };
 811
 812 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 813 {
 814         u64 old_efer = vcpu->arch.efer;
 815
 816         if (efer & efer_reserved_bits)
 817                 return 1;
 818
 819         if (is_paging(vcpu)
 820             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 821                 return 1;
 822
 823         if (efer & EFER_FFXSR) {
 824                 struct kvm_cpuid_entry2 *feat;
 825
 826                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 827                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 828                         return 1;
 829         }
 830
 831         if (efer & EFER_SVME) {
 832                 struct kvm_cpuid_entry2 *feat;
 833
 834                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 835                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 836                         return 1;
 837         }
 838
 839         efer &= ~EFER_LMA;
 840         efer |= vcpu->arch.efer & EFER_LMA;
 841
 842         kvm_x86_ops->set_efer(vcpu, efer);
 843
 844         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 845
 846         /* Update reserved bits */
 847         if ((efer ^ old_efer) & EFER_NX)
 848                 kvm_mmu_reset_context(vcpu);
 849
 850         return 0;
 851 }
 852
 853 void kvm_enable_efer_bits(u64 mask)
 854 {
 855        efer_reserved_bits &= ~mask;
 856 }
 857 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 858
 859
 860 /*
 861  * Writes msr value into into the appropriate "register".
 862  * Returns 0 on success, non-0 otherwise.
 863  * Assumes vcpu_load() was already called.
 864  */
 865 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 866 {
 867         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 868 }
 869
 870 /*
 871  * Adapt set_msr() to msr_io()'s calling convention
 872  */
 873 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 874 {
 875         return kvm_set_msr(vcpu, index, *data);
 876 }
 877
 878 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 879 {
 880         int version;
 881         int r;
 882         struct pvclock_wall_clock wc;
 883         struct timespec boot;
 884
 885         if (!wall_clock)
 886                 return;
 887
 888         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 889         if (r)
 890                 return;
 891
 892         if (version & 1)
 893                 ++version;  /* first time write, random junk */
 894
 895         ++version;
 896
 897         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 898
 899         /*
 900          * The guest calculates current wall clock time by adding
 901          * system time (updated by kvm_guest_time_update below) to the
 902          * wall clock specified here.  guest system time equals host
 903          * system time for us, thus we must fill in host boot time here.
 904          */
 905         getboottime(&boot);
 906
 907         wc.sec = boot.tv_sec;
 908         wc.nsec = boot.tv_nsec;
 909         wc.version = version;
 910
 911         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 912
 913         version++;
 914         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 915 }
 916
 917 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 918 {
 919         uint32_t quotient, remainder;
 920
 921         /* Don't try to replace with do_div(), this one calculates
 922          * "(dividend << 32) / divisor" */
 923         __asm__ ( "divl %4"
 924                   : "=a" (quotient), "=d" (remainder)
 925                   : "0" (0), "1" (dividend), "r" (divisor) );
 926         return quotient;
 927 }
 928
 929 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 930                                s8 *pshift, u32 *pmultiplier)
 931 {
 932         uint64_t scaled64;
 933         int32_t  shift = 0;
 934         uint64_t tps64;
 935         uint32_t tps32;
 936
 937         tps64 = base_khz * 1000LL;
 938         scaled64 = scaled_khz * 1000LL;
 939         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 940                 tps64 >>= 1;
 941                 shift--;
 942         }
 943
 944         tps32 = (uint32_t)tps64;
 945         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 946                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 947                         scaled64 >>= 1;
 948                 else
 949                         tps32 <<= 1;
 950                 shift++;
 951         }
 952
 953         *pshift = shift;
 954         *pmultiplier = div_frac(scaled64, tps32);
 955
 956         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 957                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 958 }
 959
 960 static inline u64 get_kernel_ns(void)
 961 {
 962         struct timespec ts;
 963
 964         WARN_ON(preemptible());
 965         ktime_get_ts(&ts);
 966         monotonic_to_bootbased(&ts);
 967         return timespec_to_ns(&ts);
 968 }
 969
 970 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 971 unsigned long max_tsc_khz;
 972
 973 static inline int kvm_tsc_changes_freq(void)
 974 {
 975         int cpu = get_cpu();
 976         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 977                   cpufreq_quick_get(cpu) != 0;
 978         put_cpu();
 979         return ret;
 980 }
 981
 982 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 983 {
 984         if (vcpu->arch.virtual_tsc_khz)
 985                 return vcpu->arch.virtual_tsc_khz;
 986         else
 987                 return __this_cpu_read(cpu_tsc_khz);
 988 }
 989
 990 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 991 {
 992         u64 ret;
 993
 994         WARN_ON(preemptible());
 995         if (kvm_tsc_changes_freq())
 996                 printk_once(KERN_WARNING
 997                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 998         ret = nsec * vcpu_tsc_khz(vcpu);
 999         do_div(ret, USEC_PER_SEC);
1000         return ret;
1001 }
1002
1003 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1004 {
1005         /* Compute a scale to convert nanoseconds in TSC cycles */
1006         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1007                            &vcpu->arch.tsc_catchup_shift,
1008                            &vcpu->arch.tsc_catchup_mult);
1009 }
1010
1011 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1012 {
1013         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1014                                       vcpu->arch.tsc_catchup_mult,
1015                                       vcpu->arch.tsc_catchup_shift);
1016         tsc += vcpu->arch.last_tsc_write;
1017         return tsc;
1018 }
1019
1020 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1021 {
1022         struct kvm *kvm = vcpu->kvm;
1023         u64 offset, ns, elapsed;
1024         unsigned long flags;
1025         s64 sdiff;
1026
1027         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1028         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1029         ns = get_kernel_ns();
1030         elapsed = ns - kvm->arch.last_tsc_nsec;
1031         sdiff = data - kvm->arch.last_tsc_write;
1032         if (sdiff < 0)
1033                 sdiff = -sdiff;
1034
1035         /*
1036          * Special case: close write to TSC within 5 seconds of
1037          * another CPU is interpreted as an attempt to synchronize
1038          * The 5 seconds is to accommodate host load / swapping as
1039          * well as any reset of TSC during the boot process.
1040          *
1041          * In that case, for a reliable TSC, we can match TSC offsets,
1042          * or make a best guest using elapsed value.
1043          */
1044         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1045             elapsed < 5ULL * NSEC_PER_SEC) {
1046                 if (!check_tsc_unstable()) {
1047                         offset = kvm->arch.last_tsc_offset;
1048                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1049                 } else {
1050                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1051                         offset += delta;
1052                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1053                 }
1054                 ns = kvm->arch.last_tsc_nsec;
1055         }
1056         kvm->arch.last_tsc_nsec = ns;
1057         kvm->arch.last_tsc_write = data;
1058         kvm->arch.last_tsc_offset = offset;
1059         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1060         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1061
1062         /* Reset of TSC must disable overshoot protection below */
1063         vcpu->arch.hv_clock.tsc_timestamp = 0;
1064         vcpu->arch.last_tsc_write = data;
1065         vcpu->arch.last_tsc_nsec = ns;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1068
1069 static int kvm_guest_time_update(struct kvm_vcpu *v)
1070 {
1071         unsigned long flags;
1072         struct kvm_vcpu_arch *vcpu = &v->arch;
1073         void *shared_kaddr;
1074         unsigned long this_tsc_khz;
1075         s64 kernel_ns, max_kernel_ns;
1076         u64 tsc_timestamp;
1077
1078         /* Keep irq disabled to prevent changes to the clock */
1079         local_irq_save(flags);
1080         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1081         kernel_ns = get_kernel_ns();
1082         this_tsc_khz = vcpu_tsc_khz(v);
1083         if (unlikely(this_tsc_khz == 0)) {
1084                 local_irq_restore(flags);
1085                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1086                 return 1;
1087         }
1088
1089         /*
1090          * We may have to catch up the TSC to match elapsed wall clock
1091          * time for two reasons, even if kvmclock is used.
1092          *   1) CPU could have been running below the maximum TSC rate
1093          *   2) Broken TSC compensation resets the base at each VCPU
1094          *      entry to avoid unknown leaps of TSC even when running
1095          *      again on the same CPU.  This may cause apparent elapsed
1096          *      time to disappear, and the guest to stand still or run
1097          *      very slowly.
1098          */
1099         if (vcpu->tsc_catchup) {
1100                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1101                 if (tsc > tsc_timestamp) {
1102                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1103                         tsc_timestamp = tsc;
1104                 }
1105         }
1106
1107         local_irq_restore(flags);
1108
1109         if (!vcpu->time_page)
1110                 return 0;
1111
1112         /*
1113          * Time as measured by the TSC may go backwards when resetting the base
1114          * tsc_timestamp.  The reason for this is that the TSC resolution is
1115          * higher than the resolution of the other clock scales.  Thus, many
1116          * possible measurments of the TSC correspond to one measurement of any
1117          * other clock, and so a spread of values is possible.  This is not a
1118          * problem for the computation of the nanosecond clock; with TSC rates
1119          * around 1GHZ, there can only be a few cycles which correspond to one
1120          * nanosecond value, and any path through this code will inevitably
1121          * take longer than that.  However, with the kernel_ns value itself,
1122          * the precision may be much lower, down to HZ granularity.  If the
1123          * first sampling of TSC against kernel_ns ends in the low part of the
1124          * range, and the second in the high end of the range, we can get:
1125          *
1126          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1127          *
1128          * As the sampling errors potentially range in the thousands of cycles,
1129          * it is possible such a time value has already been observed by the
1130          * guest.  To protect against this, we must compute the system time as
1131          * observed by the guest and ensure the new system time is greater.
1132          */
1133         max_kernel_ns = 0;
1134         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1135                 max_kernel_ns = vcpu->last_guest_tsc -
1136                                 vcpu->hv_clock.tsc_timestamp;
1137                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1138                                     vcpu->hv_clock.tsc_to_system_mul,
1139                                     vcpu->hv_clock.tsc_shift);
1140                 max_kernel_ns += vcpu->last_kernel_ns;
1141         }
1142
1143         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1144                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1145                                    &vcpu->hv_clock.tsc_shift,
1146                                    &vcpu->hv_clock.tsc_to_system_mul);
1147                 vcpu->hw_tsc_khz = this_tsc_khz;
1148         }
1149
1150         if (max_kernel_ns > kernel_ns)
1151                 kernel_ns = max_kernel_ns;
1152
1153         /* With all the info we got, fill in the values */
1154         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1155         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1156         vcpu->last_kernel_ns = kernel_ns;
1157         vcpu->last_guest_tsc = tsc_timestamp;
1158         vcpu->hv_clock.flags = 0;
1159
1160         /*
1161          * The interface expects us to write an even number signaling that the
1162          * update is finished. Since the guest won't see the intermediate
1163          * state, we just increase by 2 at the end.
1164          */
1165         vcpu->hv_clock.version += 2;
1166
1167         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1168
1169         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1170                sizeof(vcpu->hv_clock));
1171
1172         kunmap_atomic(shared_kaddr, KM_USER0);
1173
1174         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1175         return 0;
1176 }
1177
1178 static bool msr_mtrr_valid(unsigned msr)
1179 {
1180         switch (msr) {
1181         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1182         case MSR_MTRRfix64K_00000:
1183         case MSR_MTRRfix16K_80000:
1184         case MSR_MTRRfix16K_A0000:
1185         case MSR_MTRRfix4K_C0000:
1186         case MSR_MTRRfix4K_C8000:
1187         case MSR_MTRRfix4K_D0000:
1188         case MSR_MTRRfix4K_D8000:
1189         case MSR_MTRRfix4K_E0000:
1190         case MSR_MTRRfix4K_E8000:
1191         case MSR_MTRRfix4K_F0000:
1192         case MSR_MTRRfix4K_F8000:
1193         case MSR_MTRRdefType:
1194         case MSR_IA32_CR_PAT:
1195                 return true;
1196         case 0x2f8:
1197                 return true;
1198         }
1199         return false;
1200 }
1201
1202 static bool valid_pat_type(unsigned t)
1203 {
1204         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1205 }
1206
1207 static bool valid_mtrr_type(unsigned t)
1208 {
1209         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1210 }
1211
1212 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1213 {
1214         int i;
1215
1216         if (!msr_mtrr_valid(msr))
1217                 return false;
1218
1219         if (msr == MSR_IA32_CR_PAT) {
1220                 for (i = 0; i < 8; i++)
1221                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1222                                 return false;
1223                 return true;
1224         } else if (msr == MSR_MTRRdefType) {
1225                 if (data & ~0xcff)
1226                         return false;
1227                 return valid_mtrr_type(data & 0xff);
1228         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1229                 for (i = 0; i < 8 ; i++)
1230                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1231                                 return false;
1232                 return true;
1233         }
1234
1235         /* variable MTRRs */
1236         return valid_mtrr_type(data & 0xff);
1237 }
1238
1239 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1240 {
1241         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1242
1243         if (!mtrr_valid(vcpu, msr, data))
1244                 return 1;
1245
1246         if (msr == MSR_MTRRdefType) {
1247                 vcpu->arch.mtrr_state.def_type = data;
1248                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1249         } else if (msr == MSR_MTRRfix64K_00000)
1250                 p[0] = data;
1251         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1252                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1253         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1254                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1255         else if (msr == MSR_IA32_CR_PAT)
1256                 vcpu->arch.pat = data;
1257         else {  /* Variable MTRRs */
1258                 int idx, is_mtrr_mask;
1259                 u64 *pt;
1260
1261                 idx = (msr - 0x200) / 2;
1262                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1263                 if (!is_mtrr_mask)
1264                         pt =
1265                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1266                 else
1267                         pt =
1268                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1269                 *pt = data;
1270         }
1271
1272         kvm_mmu_reset_context(vcpu);
1273         return 0;
1274 }
1275
1276 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1277 {
1278         u64 mcg_cap = vcpu->arch.mcg_cap;
1279         unsigned bank_num = mcg_cap & 0xff;
1280
1281         switch (msr) {
1282         case MSR_IA32_MCG_STATUS:
1283                 vcpu->arch.mcg_status = data;
1284                 break;
1285         case MSR_IA32_MCG_CTL:
1286                 if (!(mcg_cap & MCG_CTL_P))
1287                         return 1;
1288                 if (data != 0 && data != ~(u64)0)
1289                         return -1;
1290                 vcpu->arch.mcg_ctl = data;
1291                 break;
1292         default:
1293                 if (msr >= MSR_IA32_MC0_CTL &&
1294                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1295                         u32 offset = msr - MSR_IA32_MC0_CTL;
1296                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1297                          * some Linux kernels though clear bit 10 in bank 4 to
1298                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1299                          * this to avoid an uncatched #GP in the guest
1300                          */
1301                         if ((offset & 0x3) == 0 &&
1302                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1303                                 return -1;
1304                         vcpu->arch.mce_banks[offset] = data;
1305                         break;
1306                 }
1307                 return 1;
1308         }
1309         return 0;
1310 }
1311
1312 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1313 {
1314         struct kvm *kvm = vcpu->kvm;
1315         int lm = is_long_mode(vcpu);
1316         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1317                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1318         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1319                 : kvm->arch.xen_hvm_config.blob_size_32;
1320         u32 page_num = data & ~PAGE_MASK;
1321         u64 page_addr = data & PAGE_MASK;
1322         u8 *page;
1323         int r;
1324
1325         r = -E2BIG;
1326         if (page_num >= blob_size)
1327                 goto out;
1328         r = -ENOMEM;
1329         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1330         if (!page)
1331                 goto out;
1332         r = -EFAULT;
1333         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1334                 goto out_free;
1335         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1336                 goto out_free;
1337         r = 0;
1338 out_free:
1339         kfree(page);
1340 out:
1341         return r;
1342 }
1343
1344 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1345 {
1346         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1347 }
1348
1349 static bool kvm_hv_msr_partition_wide(u32 msr)
1350 {
1351         bool r = false;
1352         switch (msr) {
1353         case HV_X64_MSR_GUEST_OS_ID:
1354         case HV_X64_MSR_HYPERCALL:
1355                 r = true;
1356                 break;
1357         }
1358
1359         return r;
1360 }
1361
1362 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1363 {
1364         struct kvm *kvm = vcpu->kvm;
1365
1366         switch (msr) {
1367         case HV_X64_MSR_GUEST_OS_ID:
1368                 kvm->arch.hv_guest_os_id = data;
1369                 /* setting guest os id to zero disables hypercall page */
1370                 if (!kvm->arch.hv_guest_os_id)
1371                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1372                 break;
1373         case HV_X64_MSR_HYPERCALL: {
1374                 u64 gfn;
1375                 unsigned long addr;
1376                 u8 instructions[4];
1377
1378                 /* if guest os id is not set hypercall should remain disabled */
1379                 if (!kvm->arch.hv_guest_os_id)
1380                         break;
1381                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1382                         kvm->arch.hv_hypercall = data;
1383                         break;
1384                 }
1385                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1386                 addr = gfn_to_hva(kvm, gfn);
1387                 if (kvm_is_error_hva(addr))
1388                         return 1;
1389                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1390                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1391                 if (__copy_to_user((void __user *)addr, instructions, 4))
1392                         return 1;
1393                 kvm->arch.hv_hypercall = data;
1394                 break;
1395         }
1396         default:
1397                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1398                           "data 0x%llx\n", msr, data);
1399                 return 1;
1400         }
1401         return 0;
1402 }
1403
1404 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1405 {
1406         switch (msr) {
1407         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1408                 unsigned long addr;
1409
1410                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1411                         vcpu->arch.hv_vapic = data;
1412                         break;
1413                 }
1414                 addr = gfn_to_hva(vcpu->kvm, data >>
1415                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1416                 if (kvm_is_error_hva(addr))
1417                         return 1;
1418                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1419                         return 1;
1420                 vcpu->arch.hv_vapic = data;
1421                 break;
1422         }
1423         case HV_X64_MSR_EOI:
1424                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1425         case HV_X64_MSR_ICR:
1426                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1427         case HV_X64_MSR_TPR:
1428                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1429         default:
1430                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1431                           "data 0x%llx\n", msr, data);
1432                 return 1;
1433         }
1434
1435         return 0;
1436 }
1437
1438 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1439 {
1440         gpa_t gpa = data & ~0x3f;
1441
1442         /* Bits 2:5 are resrved, Should be zero */
1443         if (data & 0x3c)
1444                 return 1;
1445
1446         vcpu->arch.apf.msr_val = data;
1447
1448         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1449                 kvm_clear_async_pf_completion_queue(vcpu);
1450                 kvm_async_pf_hash_reset(vcpu);
1451                 return 0;
1452         }
1453
1454         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1455                 return 1;
1456
1457         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1458         kvm_async_pf_wakeup_all(vcpu);
1459         return 0;
1460 }
1461
1462 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1463 {
1464         if (vcpu->arch.time_page) {
1465                 kvm_release_page_dirty(vcpu->arch.time_page);
1466                 vcpu->arch.time_page = NULL;
1467         }
1468 }
1469
1470 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1471 {
1472         switch (msr) {
1473         case MSR_EFER:
1474                 return set_efer(vcpu, data);
1475         case MSR_K7_HWCR:
1476                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1477                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1478                 if (data != 0) {
1479                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1480                                 data);
1481                         return 1;
1482                 }
1483                 break;
1484         case MSR_FAM10H_MMIO_CONF_BASE:
1485                 if (data != 0) {
1486                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1487                                 "0x%llx\n", data);
1488                         return 1;
1489                 }
1490                 break;
1491         case MSR_AMD64_NB_CFG:
1492                 break;
1493         case MSR_IA32_DEBUGCTLMSR:
1494                 if (!data) {
1495                         /* We support the non-activated case already */
1496                         break;
1497                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1498                         /* Values other than LBR and BTF are vendor-specific,
1499                            thus reserved and should throw a #GP */
1500                         return 1;
1501                 }
1502                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1503                         __func__, data);
1504                 break;
1505         case MSR_IA32_UCODE_REV:
1506         case MSR_IA32_UCODE_WRITE:
1507         case MSR_VM_HSAVE_PA:
1508         case MSR_AMD64_PATCH_LOADER:
1509                 break;
1510         case 0x200 ... 0x2ff:
1511                 return set_msr_mtrr(vcpu, msr, data);
1512         case MSR_IA32_APICBASE:
1513                 kvm_set_apic_base(vcpu, data);
1514                 break;
1515         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1516                 return kvm_x2apic_msr_write(vcpu, msr, data);
1517         case MSR_IA32_MISC_ENABLE:
1518                 vcpu->arch.ia32_misc_enable_msr = data;
1519                 break;
1520         case MSR_KVM_WALL_CLOCK_NEW:
1521         case MSR_KVM_WALL_CLOCK:
1522                 vcpu->kvm->arch.wall_clock = data;
1523                 kvm_write_wall_clock(vcpu->kvm, data);
1524                 break;
1525         case MSR_KVM_SYSTEM_TIME_NEW:
1526         case MSR_KVM_SYSTEM_TIME: {
1527                 kvmclock_reset(vcpu);
1528
1529                 vcpu->arch.time = data;
1530                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1531
1532                 /* we verify if the enable bit is set... */
1533                 if (!(data & 1))
1534                         break;
1535
1536                 /* ...but clean it before doing the actual write */
1537                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1538
1539                 vcpu->arch.time_page =
1540                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1541
1542                 if (is_error_page(vcpu->arch.time_page)) {
1543                         kvm_release_page_clean(vcpu->arch.time_page);
1544                         vcpu->arch.time_page = NULL;
1545                 }
1546                 break;
1547         }
1548         case MSR_KVM_ASYNC_PF_EN:
1549                 if (kvm_pv_enable_async_pf(vcpu, data))
1550                         return 1;
1551                 break;
1552         case MSR_IA32_MCG_CTL:
1553         case MSR_IA32_MCG_STATUS:
1554         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1555                 return set_msr_mce(vcpu, msr, data);
1556
1557         /* Performance counters are not protected by a CPUID bit,
1558          * so we should check all of them in the generic path for the sake of
1559          * cross vendor migration.
1560          * Writing a zero into the event select MSRs disables them,
1561          * which we perfectly emulate ;-). Any other value should be at least
1562          * reported, some guests depend on them.
1563          */
1564         case MSR_P6_EVNTSEL0:
1565         case MSR_P6_EVNTSEL1:
1566         case MSR_K7_EVNTSEL0:
1567         case MSR_K7_EVNTSEL1:
1568         case MSR_K7_EVNTSEL2:
1569         case MSR_K7_EVNTSEL3:
1570                 if (data != 0)
1571                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1572                                 "0x%x data 0x%llx\n", msr, data);
1573                 break;
1574         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1575          * so we ignore writes to make it happy.
1576          */
1577         case MSR_P6_PERFCTR0:
1578         case MSR_P6_PERFCTR1:
1579         case MSR_K7_PERFCTR0:
1580         case MSR_K7_PERFCTR1:
1581         case MSR_K7_PERFCTR2:
1582         case MSR_K7_PERFCTR3:
1583                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1584                         "0x%x data 0x%llx\n", msr, data);
1585                 break;
1586         case MSR_K7_CLK_CTL:
1587                 /*
1588                  * Ignore all writes to this no longer documented MSR.
1589                  * Writes are only relevant for old K7 processors,
1590                  * all pre-dating SVM, but a recommended workaround from
1591                  * AMD for these chips. It is possible to speicify the
1592                  * affected processor models on the command line, hence
1593                  * the need to ignore the workaround.
1594                  */
1595                 break;
1596         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1597                 if (kvm_hv_msr_partition_wide(msr)) {
1598                         int r;
1599                         mutex_lock(&vcpu->kvm->lock);
1600                         r = set_msr_hyperv_pw(vcpu, msr, data);
1601                         mutex_unlock(&vcpu->kvm->lock);
1602                         return r;
1603                 } else
1604                         return set_msr_hyperv(vcpu, msr, data);
1605                 break;
1606         case MSR_IA32_BBL_CR_CTL3:
1607                 /* Drop writes to this legacy MSR -- see rdmsr
1608                  * counterpart for further detail.
1609                  */
1610                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1611                 break;
1612         default:
1613                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1614                         return xen_hvm_config(vcpu, data);
1615                 if (!ignore_msrs) {
1616                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1617                                 msr, data);
1618                         return 1;
1619                 } else {
1620                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1621                                 msr, data);
1622                         break;
1623                 }
1624         }
1625         return 0;
1626 }
1627 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1628
1629
1630 /*
1631  * Reads an msr value (of 'msr_index') into 'pdata'.
1632  * Returns 0 on success, non-0 otherwise.
1633  * Assumes vcpu_load() was already called.
1634  */
1635 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1636 {
1637         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1638 }
1639
1640 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1641 {
1642         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1643
1644         if (!msr_mtrr_valid(msr))
1645                 return 1;
1646
1647         if (msr == MSR_MTRRdefType)
1648                 *pdata = vcpu->arch.mtrr_state.def_type +
1649                          (vcpu->arch.mtrr_state.enabled << 10);
1650         else if (msr == MSR_MTRRfix64K_00000)
1651                 *pdata = p[0];
1652         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1653                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1654         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1655                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1656         else if (msr == MSR_IA32_CR_PAT)
1657                 *pdata = vcpu->arch.pat;
1658         else {  /* Variable MTRRs */
1659                 int idx, is_mtrr_mask;
1660                 u64 *pt;
1661
1662                 idx = (msr - 0x200) / 2;
1663                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1664                 if (!is_mtrr_mask)
1665                         pt =
1666                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1667                 else
1668                         pt =
1669                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1670                 *pdata = *pt;
1671         }
1672
1673         return 0;
1674 }
1675
1676 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1677 {
1678         u64 data;
1679         u64 mcg_cap = vcpu->arch.mcg_cap;
1680         unsigned bank_num = mcg_cap & 0xff;
1681
1682         switch (msr) {
1683         case MSR_IA32_P5_MC_ADDR:
1684         case MSR_IA32_P5_MC_TYPE:
1685                 data = 0;
1686                 break;
1687         case MSR_IA32_MCG_CAP:
1688                 data = vcpu->arch.mcg_cap;
1689                 break;
1690         case MSR_IA32_MCG_CTL:
1691                 if (!(mcg_cap & MCG_CTL_P))
1692                         return 1;
1693                 data = vcpu->arch.mcg_ctl;
1694                 break;
1695         case MSR_IA32_MCG_STATUS:
1696                 data = vcpu->arch.mcg_status;
1697                 break;
1698         default:
1699                 if (msr >= MSR_IA32_MC0_CTL &&
1700                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1701                         u32 offset = msr - MSR_IA32_MC0_CTL;
1702                         data = vcpu->arch.mce_banks[offset];
1703                         break;
1704                 }
1705                 return 1;
1706         }
1707         *pdata = data;
1708         return 0;
1709 }
1710
1711 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1712 {
1713         u64 data = 0;
1714         struct kvm *kvm = vcpu->kvm;
1715
1716         switch (msr) {
1717         case HV_X64_MSR_GUEST_OS_ID:
1718                 data = kvm->arch.hv_guest_os_id;
1719                 break;
1720         case HV_X64_MSR_HYPERCALL:
1721                 data = kvm->arch.hv_hypercall;
1722                 break;
1723         default:
1724                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1725                 return 1;
1726         }
1727
1728         *pdata = data;
1729         return 0;
1730 }
1731
1732 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1733 {
1734         u64 data = 0;
1735
1736         switch (msr) {
1737         case HV_X64_MSR_VP_INDEX: {
1738                 int r;
1739                 struct kvm_vcpu *v;
1740                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1741                         if (v == vcpu)
1742                                 data = r;
1743                 break;
1744         }
1745         case HV_X64_MSR_EOI:
1746                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1747         case HV_X64_MSR_ICR:
1748                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1749         case HV_X64_MSR_TPR:
1750                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1751         default:
1752                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1753                 return 1;
1754         }
1755         *pdata = data;
1756         return 0;
1757 }
1758
1759 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1760 {
1761         u64 data;
1762
1763         switch (msr) {
1764         case MSR_IA32_PLATFORM_ID:
1765         case MSR_IA32_UCODE_REV:
1766         case MSR_IA32_EBL_CR_POWERON:
1767         case MSR_IA32_DEBUGCTLMSR:
1768         case MSR_IA32_LASTBRANCHFROMIP:
1769         case MSR_IA32_LASTBRANCHTOIP:
1770         case MSR_IA32_LASTINTFROMIP:
1771         case MSR_IA32_LASTINTTOIP:
1772         case MSR_K8_SYSCFG:
1773         case MSR_K7_HWCR:
1774         case MSR_VM_HSAVE_PA:
1775         case MSR_P6_PERFCTR0:
1776         case MSR_P6_PERFCTR1:
1777         case MSR_P6_EVNTSEL0:
1778         case MSR_P6_EVNTSEL1:
1779         case MSR_K7_EVNTSEL0:
1780         case MSR_K7_PERFCTR0:
1781         case MSR_K8_INT_PENDING_MSG:
1782         case MSR_AMD64_NB_CFG:
1783         case MSR_FAM10H_MMIO_CONF_BASE:
1784                 data = 0;
1785                 break;
1786         case MSR_MTRRcap:
1787                 data = 0x500 | KVM_NR_VAR_MTRR;
1788                 break;
1789         case 0x200 ... 0x2ff:
1790                 return get_msr_mtrr(vcpu, msr, pdata);
1791         case 0xcd: /* fsb frequency */
1792                 data = 3;
1793                 break;
1794                 /*
1795                  * MSR_EBC_FREQUENCY_ID
1796                  * Conservative value valid for even the basic CPU models.
1797                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1798                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1799                  * and 266MHz for model 3, or 4. Set Core Clock
1800                  * Frequency to System Bus Frequency Ratio to 1 (bits
1801                  * 31:24) even though these are only valid for CPU
1802                  * models > 2, however guests may end up dividing or
1803                  * multiplying by zero otherwise.
1804                  */
1805         case MSR_EBC_FREQUENCY_ID:
1806                 data = 1 << 24;
1807                 break;
1808         case MSR_IA32_APICBASE:
1809                 data = kvm_get_apic_base(vcpu);
1810                 break;
1811         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1812                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1813                 break;
1814         case MSR_IA32_MISC_ENABLE:
1815                 data = vcpu->arch.ia32_misc_enable_msr;
1816                 break;
1817         case MSR_IA32_PERF_STATUS:
1818                 /* TSC increment by tick */
1819                 data = 1000ULL;
1820                 /* CPU multiplier */
1821                 data |= (((uint64_t)4ULL) << 40);
1822                 break;
1823         case MSR_EFER:
1824                 data = vcpu->arch.efer;
1825                 break;
1826         case MSR_KVM_WALL_CLOCK:
1827         case MSR_KVM_WALL_CLOCK_NEW:
1828                 data = vcpu->kvm->arch.wall_clock;
1829                 break;
1830         case MSR_KVM_SYSTEM_TIME:
1831         case MSR_KVM_SYSTEM_TIME_NEW:
1832                 data = vcpu->arch.time;
1833                 break;
1834         case MSR_KVM_ASYNC_PF_EN:
1835                 data = vcpu->arch.apf.msr_val;
1836                 break;
1837         case MSR_IA32_P5_MC_ADDR:
1838         case MSR_IA32_P5_MC_TYPE:
1839         case MSR_IA32_MCG_CAP:
1840         case MSR_IA32_MCG_CTL:
1841         case MSR_IA32_MCG_STATUS:
1842         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1843                 return get_msr_mce(vcpu, msr, pdata);
1844         case MSR_K7_CLK_CTL:
1845                 /*
1846                  * Provide expected ramp-up count for K7. All other
1847                  * are set to zero, indicating minimum divisors for
1848                  * every field.
1849                  *
1850                  * This prevents guest kernels on AMD host with CPU
1851                  * type 6, model 8 and higher from exploding due to
1852                  * the rdmsr failing.
1853                  */
1854                 data = 0x20000000;
1855                 break;
1856         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1857                 if (kvm_hv_msr_partition_wide(msr)) {
1858                         int r;
1859                         mutex_lock(&vcpu->kvm->lock);
1860                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1861                         mutex_unlock(&vcpu->kvm->lock);
1862                         return r;
1863                 } else
1864                         return get_msr_hyperv(vcpu, msr, pdata);
1865                 break;
1866         case MSR_IA32_BBL_CR_CTL3:
1867                 /* This legacy MSR exists but isn't fully documented in current
1868                  * silicon.  It is however accessed by winxp in very narrow
1869                  * scenarios where it sets bit #19, itself documented as
1870                  * a "reserved" bit.  Best effort attempt to source coherent
1871                  * read data here should the balance of the register be
1872                  * interpreted by the guest:
1873                  *
1874                  * L2 cache control register 3: 64GB range, 256KB size,
1875                  * enabled, latency 0x1, configured
1876                  */
1877                 data = 0xbe702111;
1878                 break;
1879         default:
1880                 if (!ignore_msrs) {
1881                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1882                         return 1;
1883                 } else {
1884                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1885                         data = 0;
1886                 }
1887                 break;
1888         }
1889         *pdata = data;
1890         return 0;
1891 }
1892 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1893
1894 /*
1895  * Read or write a bunch of msrs. All parameters are kernel addresses.
1896  *
1897  * @return number of msrs set successfully.
1898  */
1899 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1900                     struct kvm_msr_entry *entries,
1901                     int (*do_msr)(struct kvm_vcpu *vcpu,
1902                                   unsigned index, u64 *data))
1903 {
1904         int i, idx;
1905
1906         idx = srcu_read_lock(&vcpu->kvm->srcu);
1907         for (i = 0; i < msrs->nmsrs; ++i)
1908                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1909                         break;
1910         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1911
1912         return i;
1913 }
1914
1915 /*
1916  * Read or write a bunch of msrs. Parameters are user addresses.
1917  *
1918  * @return number of msrs set successfully.
1919  */
1920 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1921                   int (*do_msr)(struct kvm_vcpu *vcpu,
1922                                 unsigned index, u64 *data),
1923                   int writeback)
1924 {
1925         struct kvm_msrs msrs;
1926         struct kvm_msr_entry *entries;
1927         int r, n;
1928         unsigned size;
1929
1930         r = -EFAULT;
1931         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1932                 goto out;
1933
1934         r = -E2BIG;
1935         if (msrs.nmsrs >= MAX_IO_MSRS)
1936                 goto out;
1937
1938         r = -ENOMEM;
1939         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1940         entries = kmalloc(size, GFP_KERNEL);
1941         if (!entries)
1942                 goto out;
1943
1944         r = -EFAULT;
1945         if (copy_from_user(entries, user_msrs->entries, size))
1946                 goto out_free;
1947
1948         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1949         if (r < 0)
1950                 goto out_free;
1951
1952         r = -EFAULT;
1953         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1954                 goto out_free;
1955
1956         r = n;
1957
1958 out_free:
1959         kfree(entries);
1960 out:
1961         return r;
1962 }
1963
1964 int kvm_dev_ioctl_check_extension(long ext)
1965 {
1966         int r;
1967
1968         switch (ext) {
1969         case KVM_CAP_IRQCHIP:
1970         case KVM_CAP_HLT:
1971         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1972         case KVM_CAP_SET_TSS_ADDR:
1973         case KVM_CAP_EXT_CPUID:
1974         case KVM_CAP_CLOCKSOURCE:
1975         case KVM_CAP_PIT:
1976         case KVM_CAP_NOP_IO_DELAY:
1977         case KVM_CAP_MP_STATE:
1978         case KVM_CAP_SYNC_MMU:
1979         case KVM_CAP_USER_NMI:
1980         case KVM_CAP_REINJECT_CONTROL:
1981         case KVM_CAP_IRQ_INJECT_STATUS:
1982         case KVM_CAP_ASSIGN_DEV_IRQ:
1983         case KVM_CAP_IRQFD:
1984         case KVM_CAP_IOEVENTFD:
1985         case KVM_CAP_PIT2:
1986         case KVM_CAP_PIT_STATE2:
1987         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1988         case KVM_CAP_XEN_HVM:
1989         case KVM_CAP_ADJUST_CLOCK:
1990         case KVM_CAP_VCPU_EVENTS:
1991         case KVM_CAP_HYPERV:
1992         case KVM_CAP_HYPERV_VAPIC:
1993         case KVM_CAP_HYPERV_SPIN:
1994         case KVM_CAP_PCI_SEGMENT:
1995         case KVM_CAP_DEBUGREGS:
1996         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1997         case KVM_CAP_XSAVE:
1998         case KVM_CAP_ASYNC_PF:
1999         case KVM_CAP_GET_TSC_KHZ:
2000                 r = 1;
2001                 break;
2002         case KVM_CAP_COALESCED_MMIO:
2003                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2004                 break;
2005         case KVM_CAP_VAPIC:
2006                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2007                 break;
2008         case KVM_CAP_NR_VCPUS:
2009                 r = KVM_MAX_VCPUS;
2010                 break;
2011         case KVM_CAP_NR_MEMSLOTS:
2012                 r = KVM_MEMORY_SLOTS;
2013                 break;
2014         case KVM_CAP_PV_MMU:    /* obsolete */
2015                 r = 0;
2016                 break;
2017         case KVM_CAP_IOMMU:
2018                 r = iommu_found();
2019                 break;
2020         case KVM_CAP_MCE:
2021                 r = KVM_MAX_MCE_BANKS;
2022                 break;
2023         case KVM_CAP_XCRS:
2024                 r = cpu_has_xsave;
2025                 break;
2026         case KVM_CAP_TSC_CONTROL:
2027                 r = kvm_has_tsc_control;
2028                 break;
2029         default:
2030                 r = 0;
2031                 break;
2032         }
2033         return r;
2034
2035 }
2036
2037 long kvm_arch_dev_ioctl(struct file *filp,
2038                         unsigned int ioctl, unsigned long arg)
2039 {
2040         void __user *argp = (void __user *)arg;
2041         long r;
2042
2043         switch (ioctl) {
2044         case KVM_GET_MSR_INDEX_LIST: {
2045                 struct kvm_msr_list __user *user_msr_list = argp;
2046                 struct kvm_msr_list msr_list;
2047                 unsigned n;
2048
2049                 r = -EFAULT;
2050                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2051                         goto out;
2052                 n = msr_list.nmsrs;
2053                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2054                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2055                         goto out;
2056                 r = -E2BIG;
2057                 if (n < msr_list.nmsrs)
2058                         goto out;
2059                 r = -EFAULT;
2060                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2061                                  num_msrs_to_save * sizeof(u32)))
2062                         goto out;
2063                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2064                                  &emulated_msrs,
2065                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2066                         goto out;
2067                 r = 0;
2068                 break;
2069         }
2070         case KVM_GET_SUPPORTED_CPUID: {
2071                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2072                 struct kvm_cpuid2 cpuid;
2073
2074                 r = -EFAULT;
2075                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2076                         goto out;
2077                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2078                                                       cpuid_arg->entries);
2079                 if (r)
2080                         goto out;
2081
2082                 r = -EFAULT;
2083                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2084                         goto out;
2085                 r = 0;
2086                 break;
2087         }
2088         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2089                 u64 mce_cap;
2090
2091                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2092                 r = -EFAULT;
2093                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2094                         goto out;
2095                 r = 0;
2096                 break;
2097         }
2098         default:
2099                 r = -EINVAL;
2100         }
2101 out:
2102         return r;
2103 }
2104
2105 static void wbinvd_ipi(void *garbage)
2106 {
2107         wbinvd();
2108 }
2109
2110 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2111 {
2112         return vcpu->kvm->arch.iommu_domain &&
2113                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2114 }
2115
2116 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2117 {
2118         /* Address WBINVD may be executed by guest */
2119         if (need_emulate_wbinvd(vcpu)) {
2120                 if (kvm_x86_ops->has_wbinvd_exit())
2121                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2122                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2123                         smp_call_function_single(vcpu->cpu,
2124                                         wbinvd_ipi, NULL, 1);
2125         }
2126
2127         kvm_x86_ops->vcpu_load(vcpu, cpu);
2128         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2129                 /* Make sure TSC doesn't go backwards */
2130                 s64 tsc_delta;
2131                 u64 tsc;
2132
2133                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2134                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2135                              tsc - vcpu->arch.last_guest_tsc;
2136
2137                 if (tsc_delta < 0)
2138                         mark_tsc_unstable("KVM discovered backwards TSC");
2139                 if (check_tsc_unstable()) {
2140                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2141                         vcpu->arch.tsc_catchup = 1;
2142                 }
2143                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2144                 if (vcpu->cpu != cpu)
2145                         kvm_migrate_timers(vcpu);
2146                 vcpu->cpu = cpu;
2147         }
2148 }
2149
2150 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2151 {
2152         kvm_x86_ops->vcpu_put(vcpu);
2153         kvm_put_guest_fpu(vcpu);
2154         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2155 }
2156
2157 static int is_efer_nx(void)
2158 {
2159         unsigned long long efer = 0;
2160
2161         rdmsrl_safe(MSR_EFER, &efer);
2162         return efer & EFER_NX;
2163 }
2164
2165 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2166 {
2167         int i;
2168         struct kvm_cpuid_entry2 *e, *entry;
2169
2170         entry = NULL;
2171         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2172                 e = &vcpu->arch.cpuid_entries[i];
2173                 if (e->function == 0x80000001) {
2174                         entry = e;
2175                         break;
2176                 }
2177         }
2178         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2179                 entry->edx &= ~(1 << 20);
2180                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2181         }
2182 }
2183
2184 /* when an old userspace process fills a new kernel module */
2185 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2186                                     struct kvm_cpuid *cpuid,
2187                                     struct kvm_cpuid_entry __user *entries)
2188 {
2189         int r, i;
2190         struct kvm_cpuid_entry *cpuid_entries;
2191
2192         r = -E2BIG;
2193         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2194                 goto out;
2195         r = -ENOMEM;
2196         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2197         if (!cpuid_entries)
2198                 goto out;
2199         r = -EFAULT;
2200         if (copy_from_user(cpuid_entries, entries,
2201                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2202                 goto out_free;
2203         for (i = 0; i < cpuid->nent; i++) {
2204                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2205                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2206                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2207                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2208                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2209                 vcpu->arch.cpuid_entries[i].index = 0;
2210                 vcpu->arch.cpuid_entries[i].flags = 0;
2211                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2212                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2213                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2214         }
2215         vcpu->arch.cpuid_nent = cpuid->nent;
2216         cpuid_fix_nx_cap(vcpu);
2217         r = 0;
2218         kvm_apic_set_version(vcpu);
2219         kvm_x86_ops->cpuid_update(vcpu);
2220         update_cpuid(vcpu);
2221
2222 out_free:
2223         vfree(cpuid_entries);
2224 out:
2225         return r;
2226 }
2227
2228 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2229                                      struct kvm_cpuid2 *cpuid,
2230                                      struct kvm_cpuid_entry2 __user *entries)
2231 {
2232         int r;
2233
2234         r = -E2BIG;
2235         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2236                 goto out;
2237         r = -EFAULT;
2238         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2239                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2240                 goto out;
2241         vcpu->arch.cpuid_nent = cpuid->nent;
2242         kvm_apic_set_version(vcpu);
2243         kvm_x86_ops->cpuid_update(vcpu);
2244         update_cpuid(vcpu);
2245         return 0;
2246
2247 out:
2248         return r;
2249 }
2250
2251 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2252                                      struct kvm_cpuid2 *cpuid,
2253                                      struct kvm_cpuid_entry2 __user *entries)
2254 {
2255         int r;
2256
2257         r = -E2BIG;
2258         if (cpuid->nent < vcpu->arch.cpuid_nent)
2259                 goto out;
2260         r = -EFAULT;
2261         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2262                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2263                 goto out;
2264         return 0;
2265
2266 out:
2267         cpuid->nent = vcpu->arch.cpuid_nent;
2268         return r;
2269 }
2270
2271 static void cpuid_mask(u32 *word, int wordnum)
2272 {
2273         *word &= boot_cpu_data.x86_capability[wordnum];
2274 }
2275
2276 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2277                            u32 index)
2278 {
2279         entry->function = function;
2280         entry->index = index;
2281         cpuid_count(entry->function, entry->index,
2282                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2283         entry->flags = 0;
2284 }
2285
2286 static bool supported_xcr0_bit(unsigned bit)
2287 {
2288         u64 mask = ((u64)1 << bit);
2289
2290         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2291 }
2292
2293 #define F(x) bit(X86_FEATURE_##x)
2294
2295 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2296                          u32 index, int *nent, int maxnent)
2297 {
2298         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2299 #ifdef CONFIG_X86_64
2300         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2301                                 ? F(GBPAGES) : 0;
2302         unsigned f_lm = F(LM);
2303 #else
2304         unsigned f_gbpages = 0;
2305         unsigned f_lm = 0;
2306 #endif
2307         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2308
2309         /* cpuid 1.edx */
2310         const u32 kvm_supported_word0_x86_features =
2311                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2312                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2313                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2314                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2315                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2316                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2317                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2318                 0 /* HTT, TM, Reserved, PBE */;
2319         /* cpuid 0x80000001.edx */
2320         const u32 kvm_supported_word1_x86_features =
2321                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2322                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2323                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2324                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2325                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2326                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2327                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2328                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2329         /* cpuid 1.ecx */
2330         const u32 kvm_supported_word4_x86_features =
2331                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2332                 0 /* DS-CPL, VMX, SMX, EST */ |
2333                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2334                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2335                 0 /* Reserved, DCA */ | F(XMM4_1) |
2336                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2337                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2338                 F(F16C);
2339         /* cpuid 0x80000001.ecx */
2340         const u32 kvm_supported_word6_x86_features =
2341                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2342                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2343                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2344                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2345
2346         /* cpuid 0xC0000001.edx */
2347         const u32 kvm_supported_word5_x86_features =
2348                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2349                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2350                 F(PMM) | F(PMM_EN);
2351
2352         /* all calls to cpuid_count() should be made on the same cpu */
2353         get_cpu();
2354         do_cpuid_1_ent(entry, function, index);
2355         ++*nent;
2356
2357         switch (function) {
2358         case 0:
2359                 entry->eax = min(entry->eax, (u32)0xd);
2360                 break;
2361         case 1:
2362                 entry->edx &= kvm_supported_word0_x86_features;
2363                 cpuid_mask(&entry->edx, 0);
2364                 entry->ecx &= kvm_supported_word4_x86_features;
2365                 cpuid_mask(&entry->ecx, 4);
2366                 /* we support x2apic emulation even if host does not support
2367                  * it since we emulate x2apic in software */
2368                 entry->ecx |= F(X2APIC);
2369                 break;
2370         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2371          * may return different values. This forces us to get_cpu() before
2372          * issuing the first command, and also to emulate this annoying behavior
2373          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2374         case 2: {
2375                 int t, times = entry->eax & 0xff;
2376
2377                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2378                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2379                 for (t = 1; t < times && *nent < maxnent; ++t) {
2380                         do_cpuid_1_ent(&entry[t], function, 0);
2381                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2382                         ++*nent;
2383                 }
2384                 break;
2385         }
2386         /* function 4 and 0xb have additional index. */
2387         case 4: {
2388                 int i, cache_type;
2389
2390                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2391                 /* read more entries until cache_type is zero */
2392                 for (i = 1; *nent < maxnent; ++i) {
2393                         cache_type = entry[i - 1].eax & 0x1f;
2394                         if (!cache_type)
2395                                 break;
2396                         do_cpuid_1_ent(&entry[i], function, i);
2397                         entry[i].flags |=
2398                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2399                         ++*nent;
2400                 }
2401                 break;
2402         }
2403         case 9:
2404                 break;
2405         case 0xb: {
2406                 int i, level_type;
2407
2408                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2409                 /* read more entries until level_type is zero */
2410                 for (i = 1; *nent < maxnent; ++i) {
2411                         level_type = entry[i - 1].ecx & 0xff00;
2412                         if (!level_type)
2413                                 break;
2414                         do_cpuid_1_ent(&entry[i], function, i);
2415                         entry[i].flags |=
2416                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2417                         ++*nent;
2418                 }
2419                 break;
2420         }
2421         case 0xd: {
2422                 int i;
2423
2424                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2425                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2426                         if (entry[i].eax == 0 || !supported_xcr0_bit(i))
2427                                 continue;
2428                         do_cpuid_1_ent(&entry[i], function, i);
2429                         entry[i].flags |=
2430                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2431                         ++*nent;
2432                 }
2433                 break;
2434         }
2435         case KVM_CPUID_SIGNATURE: {
2436                 char signature[12] = "KVMKVMKVM\0\0";
2437                 u32 *sigptr = (u32 *)signature;
2438                 entry->eax = 0;
2439                 entry->ebx = sigptr[0];
2440                 entry->ecx = sigptr[1];
2441                 entry->edx = sigptr[2];
2442                 break;
2443         }
2444         case KVM_CPUID_FEATURES:
2445                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2446                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2447                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2448                              (1 << KVM_FEATURE_ASYNC_PF) |
2449                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2450                 entry->ebx = 0;
2451                 entry->ecx = 0;
2452                 entry->edx = 0;
2453                 break;
2454         case 0x80000000:
2455                 entry->eax = min(entry->eax, 0x8000001a);
2456                 break;
2457         case 0x80000001:
2458                 entry->edx &= kvm_supported_word1_x86_features;
2459                 cpuid_mask(&entry->edx, 1);
2460                 entry->ecx &= kvm_supported_word6_x86_features;
2461                 cpuid_mask(&entry->ecx, 6);
2462                 break;
2463         case 0x80000008: {
2464                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2465                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2466                 unsigned phys_as = entry->eax & 0xff;
2467
2468                 if (!g_phys_as)
2469                         g_phys_as = phys_as;
2470                 entry->eax = g_phys_as | (virt_as << 8);
2471                 entry->ebx = entry->edx = 0;
2472                 break;
2473         }
2474         case 0x80000019:
2475                 entry->ecx = entry->edx = 0;
2476                 break;
2477         case 0x8000001a:
2478                 break;
2479         case 0x8000001d:
2480                 break;
2481         /*Add support for Centaur's CPUID instruction*/
2482         case 0xC0000000:
2483                 /*Just support up to 0xC0000004 now*/
2484                 entry->eax = min(entry->eax, 0xC0000004);
2485                 break;
2486         case 0xC0000001:
2487                 entry->edx &= kvm_supported_word5_x86_features;
2488                 cpuid_mask(&entry->edx, 5);
2489                 break;
2490         case 3: /* Processor serial number */
2491         case 5: /* MONITOR/MWAIT */
2492         case 6: /* Thermal management */
2493         case 0xA: /* Architectural Performance Monitoring */
2494         case 0x80000007: /* Advanced power management */
2495         case 0xC0000002:
2496         case 0xC0000003:
2497         case 0xC0000004:
2498         default:
2499                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2500                 break;
2501         }
2502
2503         kvm_x86_ops->set_supported_cpuid(function, entry);
2504
2505         put_cpu();
2506 }
2507
2508 #undef F
2509
2510 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2511                                      struct kvm_cpuid_entry2 __user *entries)
2512 {
2513         struct kvm_cpuid_entry2 *cpuid_entries;
2514         int limit, nent = 0, r = -E2BIG;
2515         u32 func;
2516
2517         if (cpuid->nent < 1)
2518                 goto out;
2519         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2520                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2521         r = -ENOMEM;
2522         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2523         if (!cpuid_entries)
2524                 goto out;
2525
2526         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2527         limit = cpuid_entries[0].eax;
2528         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2529                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2530                              &nent, cpuid->nent);
2531         r = -E2BIG;
2532         if (nent >= cpuid->nent)
2533                 goto out_free;
2534
2535         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2536         limit = cpuid_entries[nent - 1].eax;
2537         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2538                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2539                              &nent, cpuid->nent);
2540
2541
2542
2543         r = -E2BIG;
2544         if (nent >= cpuid->nent)
2545                 goto out_free;
2546
2547         /* Add support for Centaur's CPUID instruction. */
2548         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2549                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2550                                 &nent, cpuid->nent);
2551
2552                 r = -E2BIG;
2553                 if (nent >= cpuid->nent)
2554                         goto out_free;
2555
2556                 limit = cpuid_entries[nent - 1].eax;
2557                 for (func = 0xC0000001;
2558                         func <= limit && nent < cpuid->nent; ++func)
2559                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2560                                         &nent, cpuid->nent);
2561
2562                 r = -E2BIG;
2563                 if (nent >= cpuid->nent)
2564                         goto out_free;
2565         }
2566
2567         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2568                      cpuid->nent);
2569
2570         r = -E2BIG;
2571         if (nent >= cpuid->nent)
2572                 goto out_free;
2573
2574         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2575                      cpuid->nent);
2576
2577         r = -E2BIG;
2578         if (nent >= cpuid->nent)
2579                 goto out_free;
2580
2581         r = -EFAULT;
2582         if (copy_to_user(entries, cpuid_entries,
2583                          nent * sizeof(struct kvm_cpuid_entry2)))
2584                 goto out_free;
2585         cpuid->nent = nent;
2586         r = 0;
2587
2588 out_free:
2589         vfree(cpuid_entries);
2590 out:
2591         return r;
2592 }
2593
2594 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2595                                     struct kvm_lapic_state *s)
2596 {
2597         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2598
2599         return 0;
2600 }
2601
2602 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2603                                     struct kvm_lapic_state *s)
2604 {
2605         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2606         kvm_apic_post_state_restore(vcpu);
2607         update_cr8_intercept(vcpu);
2608
2609         return 0;
2610 }
2611
2612 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2613                                     struct kvm_interrupt *irq)
2614 {
2615         if (irq->irq < 0 || irq->irq >= 256)
2616                 return -EINVAL;
2617         if (irqchip_in_kernel(vcpu->kvm))
2618                 return -ENXIO;
2619
2620         kvm_queue_interrupt(vcpu, irq->irq, false);
2621         kvm_make_request(KVM_REQ_EVENT, vcpu);
2622
2623         return 0;
2624 }
2625
2626 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2627 {
2628         kvm_inject_nmi(vcpu);
2629
2630         return 0;
2631 }
2632
2633 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2634                                            struct kvm_tpr_access_ctl *tac)
2635 {
2636         if (tac->flags)
2637                 return -EINVAL;
2638         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2639         return 0;
2640 }
2641
2642 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2643                                         u64 mcg_cap)
2644 {
2645         int r;
2646         unsigned bank_num = mcg_cap & 0xff, bank;
2647
2648         r = -EINVAL;
2649         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2650                 goto out;
2651         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2652                 goto out;
2653         r = 0;
2654         vcpu->arch.mcg_cap = mcg_cap;
2655         /* Init IA32_MCG_CTL to all 1s */
2656         if (mcg_cap & MCG_CTL_P)
2657                 vcpu->arch.mcg_ctl = ~(u64)0;
2658         /* Init IA32_MCi_CTL to all 1s */
2659         for (bank = 0; bank < bank_num; bank++)
2660                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2661 out:
2662         return r;
2663 }
2664
2665 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2666                                       struct kvm_x86_mce *mce)
2667 {
2668         u64 mcg_cap = vcpu->arch.mcg_cap;
2669         unsigned bank_num = mcg_cap & 0xff;
2670         u64 *banks = vcpu->arch.mce_banks;
2671
2672         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2673                 return -EINVAL;
2674         /*
2675          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2676          * reporting is disabled
2677          */
2678         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2679             vcpu->arch.mcg_ctl != ~(u64)0)
2680                 return 0;
2681         banks += 4 * mce->bank;
2682         /*
2683          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2684          * reporting is disabled for the bank
2685          */
2686         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2687                 return 0;
2688         if (mce->status & MCI_STATUS_UC) {
2689                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2690                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2691                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2692                         return 0;
2693                 }
2694                 if (banks[1] & MCI_STATUS_VAL)
2695                         mce->status |= MCI_STATUS_OVER;
2696                 banks[2] = mce->addr;
2697                 banks[3] = mce->misc;
2698                 vcpu->arch.mcg_status = mce->mcg_status;
2699                 banks[1] = mce->status;
2700                 kvm_queue_exception(vcpu, MC_VECTOR);
2701         } else if (!(banks[1] & MCI_STATUS_VAL)
2702                    || !(banks[1] & MCI_STATUS_UC)) {
2703                 if (banks[1] & MCI_STATUS_VAL)
2704                         mce->status |= MCI_STATUS_OVER;
2705                 banks[2] = mce->addr;
2706                 banks[3] = mce->misc;
2707                 banks[1] = mce->status;
2708         } else
2709                 banks[1] |= MCI_STATUS_OVER;
2710         return 0;
2711 }
2712
2713 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2714                                                struct kvm_vcpu_events *events)
2715 {
2716         events->exception.injected =
2717                 vcpu->arch.exception.pending &&
2718                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2719         events->exception.nr = vcpu->arch.exception.nr;
2720         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2721         events->exception.pad = 0;
2722         events->exception.error_code = vcpu->arch.exception.error_code;
2723
2724         events->interrupt.injected =
2725                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2726         events->interrupt.nr = vcpu->arch.interrupt.nr;
2727         events->interrupt.soft = 0;
2728         events->interrupt.shadow =
2729                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2730                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2731
2732         events->nmi.injected = vcpu->arch.nmi_injected;
2733         events->nmi.pending = vcpu->arch.nmi_pending;
2734         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2735         events->nmi.pad = 0;
2736
2737         events->sipi_vector = vcpu->arch.sipi_vector;
2738
2739         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2740                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2741                          | KVM_VCPUEVENT_VALID_SHADOW);
2742         memset(&events->reserved, 0, sizeof(events->reserved));
2743 }
2744
2745 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2746                                               struct kvm_vcpu_events *events)
2747 {
2748         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2749                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2750                               | KVM_VCPUEVENT_VALID_SHADOW))
2751                 return -EINVAL;
2752
2753         vcpu->arch.exception.pending = events->exception.injected;
2754         vcpu->arch.exception.nr = events->exception.nr;
2755         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2756         vcpu->arch.exception.error_code = events->exception.error_code;
2757
2758         vcpu->arch.interrupt.pending = events->interrupt.injected;
2759         vcpu->arch.interrupt.nr = events->interrupt.nr;
2760         vcpu->arch.interrupt.soft = events->interrupt.soft;
2761         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2762                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2763                                                   events->interrupt.shadow);
2764
2765         vcpu->arch.nmi_injected = events->nmi.injected;
2766         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2767                 vcpu->arch.nmi_pending = events->nmi.pending;
2768         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2769
2770         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2771                 vcpu->arch.sipi_vector = events->sipi_vector;
2772
2773         kvm_make_request(KVM_REQ_EVENT, vcpu);
2774
2775         return 0;
2776 }
2777
2778 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2779                                              struct kvm_debugregs *dbgregs)
2780 {
2781         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2782         dbgregs->dr6 = vcpu->arch.dr6;
2783         dbgregs->dr7 = vcpu->arch.dr7;
2784         dbgregs->flags = 0;
2785         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2786 }
2787
2788 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2789                                             struct kvm_debugregs *dbgregs)
2790 {
2791         if (dbgregs->flags)
2792                 return -EINVAL;
2793
2794         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2795         vcpu->arch.dr6 = dbgregs->dr6;
2796         vcpu->arch.dr7 = dbgregs->dr7;
2797
2798         return 0;
2799 }
2800
2801 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2802                                          struct kvm_xsave *guest_xsave)
2803 {
2804         if (cpu_has_xsave)
2805                 memcpy(guest_xsave->region,
2806                         &vcpu->arch.guest_fpu.state->xsave,
2807                         xstate_size);
2808         else {
2809                 memcpy(guest_xsave->region,
2810                         &vcpu->arch.guest_fpu.state->fxsave,
2811                         sizeof(struct i387_fxsave_struct));
2812                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2813                         XSTATE_FPSSE;
2814         }
2815 }
2816
2817 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2818                                         struct kvm_xsave *guest_xsave)
2819 {
2820         u64 xstate_bv =
2821                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2822
2823         if (cpu_has_xsave)
2824                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2825                         guest_xsave->region, xstate_size);
2826         else {
2827                 if (xstate_bv & ~XSTATE_FPSSE)
2828                         return -EINVAL;
2829                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2830                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2831         }
2832         return 0;
2833 }
2834
2835 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2836                                         struct kvm_xcrs *guest_xcrs)
2837 {
2838         if (!cpu_has_xsave) {
2839                 guest_xcrs->nr_xcrs = 0;
2840                 return;
2841         }
2842
2843         guest_xcrs->nr_xcrs = 1;
2844         guest_xcrs->flags = 0;
2845         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2846         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2847 }
2848
2849 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2850                                        struct kvm_xcrs *guest_xcrs)
2851 {
2852         int i, r = 0;
2853
2854         if (!cpu_has_xsave)
2855                 return -EINVAL;
2856
2857         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2858                 return -EINVAL;
2859
2860         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2861                 /* Only support XCR0 currently */
2862                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2863                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2864                                 guest_xcrs->xcrs[0].value);
2865                         break;
2866                 }
2867         if (r)
2868                 r = -EINVAL;
2869         return r;
2870 }
2871
2872 long kvm_arch_vcpu_ioctl(struct file *filp,
2873                          unsigned int ioctl, unsigned long arg)
2874 {
2875         struct kvm_vcpu *vcpu = filp->private_data;
2876         void __user *argp = (void __user *)arg;
2877         int r;
2878         union {
2879                 struct kvm_lapic_state *lapic;
2880                 struct kvm_xsave *xsave;
2881                 struct kvm_xcrs *xcrs;
2882                 void *buffer;
2883         } u;
2884
2885         u.buffer = NULL;
2886         switch (ioctl) {
2887         case KVM_GET_LAPIC: {
2888                 r = -EINVAL;
2889                 if (!vcpu->arch.apic)
2890                         goto out;
2891                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2892
2893                 r = -ENOMEM;
2894                 if (!u.lapic)
2895                         goto out;
2896                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2897                 if (r)
2898                         goto out;
2899                 r = -EFAULT;
2900                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2901                         goto out;
2902                 r = 0;
2903                 break;
2904         }
2905         case KVM_SET_LAPIC: {
2906                 r = -EINVAL;
2907                 if (!vcpu->arch.apic)
2908                         goto out;
2909                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2910                 r = -ENOMEM;
2911                 if (!u.lapic)
2912                         goto out;
2913                 r = -EFAULT;
2914                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2915                         goto out;
2916                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2917                 if (r)
2918                         goto out;
2919                 r = 0;
2920                 break;
2921         }
2922         case KVM_INTERRUPT: {
2923                 struct kvm_interrupt irq;
2924
2925                 r = -EFAULT;
2926                 if (copy_from_user(&irq, argp, sizeof irq))
2927                         goto out;
2928                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2929                 if (r)
2930                         goto out;
2931                 r = 0;
2932                 break;
2933         }
2934         case KVM_NMI: {
2935                 r = kvm_vcpu_ioctl_nmi(vcpu);
2936                 if (r)
2937                         goto out;
2938                 r = 0;
2939                 break;
2940         }
2941         case KVM_SET_CPUID: {
2942                 struct kvm_cpuid __user *cpuid_arg = argp;
2943                 struct kvm_cpuid cpuid;
2944
2945                 r = -EFAULT;
2946                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2947                         goto out;
2948                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2949                 if (r)
2950                         goto out;
2951                 break;
2952         }
2953         case KVM_SET_CPUID2: {
2954                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2955                 struct kvm_cpuid2 cpuid;
2956
2957                 r = -EFAULT;
2958                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2959                         goto out;
2960                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2961                                               cpuid_arg->entries);
2962                 if (r)
2963                         goto out;
2964                 break;
2965         }
2966         case KVM_GET_CPUID2: {
2967                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2968                 struct kvm_cpuid2 cpuid;
2969
2970                 r = -EFAULT;
2971                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2972                         goto out;
2973                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2974                                               cpuid_arg->entries);
2975                 if (r)
2976                         goto out;
2977                 r = -EFAULT;
2978                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2979                         goto out;
2980                 r = 0;
2981                 break;
2982         }
2983         case KVM_GET_MSRS:
2984                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2985                 break;
2986         case KVM_SET_MSRS:
2987                 r = msr_io(vcpu, argp, do_set_msr, 0);
2988                 break;
2989         case KVM_TPR_ACCESS_REPORTING: {
2990                 struct kvm_tpr_access_ctl tac;
2991
2992                 r = -EFAULT;
2993                 if (copy_from_user(&tac, argp, sizeof tac))
2994                         goto out;
2995                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2996                 if (r)
2997                         goto out;
2998                 r = -EFAULT;
2999                 if (copy_to_user(argp, &tac, sizeof tac))
3000                         goto out;
3001                 r = 0;
3002                 break;
3003         };
3004         case KVM_SET_VAPIC_ADDR: {
3005                 struct kvm_vapic_addr va;
3006
3007                 r = -EINVAL;
3008                 if (!irqchip_in_kernel(vcpu->kvm))
3009                         goto out;
3010                 r = -EFAULT;
3011                 if (copy_from_user(&va, argp, sizeof va))
3012                         goto out;
3013                 r = 0;
3014                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3015                 break;
3016         }
3017         case KVM_X86_SETUP_MCE: {
3018                 u64 mcg_cap;
3019
3020                 r = -EFAULT;
3021                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3022                         goto out;
3023                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3024                 break;
3025         }
3026         case KVM_X86_SET_MCE: {
3027                 struct kvm_x86_mce mce;
3028
3029                 r = -EFAULT;
3030                 if (copy_from_user(&mce, argp, sizeof mce))
3031                         goto out;
3032                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3033                 break;
3034         }
3035         case KVM_GET_VCPU_EVENTS: {
3036                 struct kvm_vcpu_events events;
3037
3038                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3039
3040                 r = -EFAULT;
3041                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3042                         break;
3043                 r = 0;
3044                 break;
3045         }
3046         case KVM_SET_VCPU_EVENTS: {
3047                 struct kvm_vcpu_events events;
3048
3049                 r = -EFAULT;
3050                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3051                         break;
3052
3053                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3054                 break;
3055         }
3056         case KVM_GET_DEBUGREGS: {
3057                 struct kvm_debugregs dbgregs;
3058
3059                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3060
3061                 r = -EFAULT;
3062                 if (copy_to_user(argp, &dbgregs,
3063                                  sizeof(struct kvm_debugregs)))
3064                         break;
3065                 r = 0;
3066                 break;
3067         }
3068         case KVM_SET_DEBUGREGS: {
3069                 struct kvm_debugregs dbgregs;
3070
3071                 r = -EFAULT;
3072                 if (copy_from_user(&dbgregs, argp,
3073                                    sizeof(struct kvm_debugregs)))
3074                         break;
3075
3076                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3077                 break;
3078         }
3079         case KVM_GET_XSAVE: {
3080                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3081                 r = -ENOMEM;
3082                 if (!u.xsave)
3083                         break;
3084
3085                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3086
3087                 r = -EFAULT;
3088                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3089                         break;
3090                 r = 0;
3091                 break;
3092         }
3093         case KVM_SET_XSAVE: {
3094                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3095                 r = -ENOMEM;
3096                 if (!u.xsave)
3097                         break;
3098
3099                 r = -EFAULT;
3100                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3101                         break;
3102
3103                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3104                 break;
3105         }
3106         case KVM_GET_XCRS: {
3107                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3108                 r = -ENOMEM;
3109                 if (!u.xcrs)
3110                         break;
3111
3112                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3113
3114                 r = -EFAULT;
3115                 if (copy_to_user(argp, u.xcrs,
3116                                  sizeof(struct kvm_xcrs)))
3117                         break;
3118                 r = 0;
3119                 break;
3120         }
3121         case KVM_SET_XCRS: {
3122                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3123                 r = -ENOMEM;
3124                 if (!u.xcrs)
3125                         break;
3126
3127                 r = -EFAULT;
3128                 if (copy_from_user(u.xcrs, argp,
3129                                    sizeof(struct kvm_xcrs)))
3130                         break;
3131
3132                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3133                 break;
3134         }
3135         case KVM_SET_TSC_KHZ: {
3136                 u32 user_tsc_khz;
3137
3138                 r = -EINVAL;
3139                 if (!kvm_has_tsc_control)
3140                         break;
3141
3142                 user_tsc_khz = (u32)arg;
3143
3144                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3145                         goto out;
3146
3147                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3148
3149                 r = 0;
3150                 goto out;
3151         }
3152         case KVM_GET_TSC_KHZ: {
3153                 r = -EIO;
3154                 if (check_tsc_unstable())
3155                         goto out;
3156
3157                 r = vcpu_tsc_khz(vcpu);
3158
3159                 goto out;
3160         }
3161         default:
3162                 r = -EINVAL;
3163         }
3164 out:
3165         kfree(u.buffer);
3166         return r;
3167 }
3168
3169 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3170 {
3171         int ret;
3172
3173         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3174                 return -1;
3175         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3176         return ret;
3177 }
3178
3179 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3180                                               u64 ident_addr)
3181 {
3182         kvm->arch.ept_identity_map_addr = ident_addr;
3183         return 0;
3184 }
3185
3186 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3187                                           u32 kvm_nr_mmu_pages)
3188 {
3189         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3190                 return -EINVAL;
3191
3192         mutex_lock(&kvm->slots_lock);
3193         spin_lock(&kvm->mmu_lock);
3194
3195         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3196         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3197
3198         spin_unlock(&kvm->mmu_lock);
3199         mutex_unlock(&kvm->slots_lock);
3200         return 0;
3201 }
3202
3203 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3204 {
3205         return kvm->arch.n_max_mmu_pages;
3206 }
3207
3208 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3209 {
3210         int r;
3211
3212         r = 0;
3213         switch (chip->chip_id) {
3214         case KVM_IRQCHIP_PIC_MASTER:
3215                 memcpy(&chip->chip.pic,
3216                         &pic_irqchip(kvm)->pics[0],
3217                         sizeof(struct kvm_pic_state));
3218                 break;
3219         case KVM_IRQCHIP_PIC_SLAVE:
3220                 memcpy(&chip->chip.pic,
3221                         &pic_irqchip(kvm)->pics[1],
3222                         sizeof(struct kvm_pic_state));
3223                 break;
3224         case KVM_IRQCHIP_IOAPIC:
3225                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3226                 break;
3227         default:
3228                 r = -EINVAL;
3229                 break;
3230         }
3231         return r;
3232 }
3233
3234 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3235 {
3236         int r;
3237
3238         r = 0;
3239         switch (chip->chip_id) {
3240         case KVM_IRQCHIP_PIC_MASTER:
3241                 spin_lock(&pic_irqchip(kvm)->lock);
3242                 memcpy(&pic_irqchip(kvm)->pics[0],
3243                         &chip->chip.pic,
3244                         sizeof(struct kvm_pic_state));
3245                 spin_unlock(&pic_irqchip(kvm)->lock);
3246                 break;
3247         case KVM_IRQCHIP_PIC_SLAVE:
3248                 spin_lock(&pic_irqchip(kvm)->lock);
3249                 memcpy(&pic_irqchip(kvm)->pics[1],
3250                         &chip->chip.pic,
3251                         sizeof(struct kvm_pic_state));
3252                 spin_unlock(&pic_irqchip(kvm)->lock);
3253                 break;
3254         case KVM_IRQCHIP_IOAPIC:
3255                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3256                 break;
3257         default:
3258                 r = -EINVAL;
3259                 break;
3260         }
3261         kvm_pic_update_irq(pic_irqchip(kvm));
3262         return r;
3263 }
3264
3265 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3266 {
3267         int r = 0;
3268
3269         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3270         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3271         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3272         return r;
3273 }
3274
3275 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3276 {
3277         int r = 0;
3278
3279         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3280         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3281         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3282         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3283         return r;
3284 }
3285
3286 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3287 {
3288         int r = 0;
3289
3290         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3291         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3292                 sizeof(ps->channels));
3293         ps->flags = kvm->arch.vpit->pit_state.flags;
3294         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3295         memset(&ps->reserved, 0, sizeof(ps->reserved));
3296         return r;
3297 }
3298
3299 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3300 {
3301         int r = 0, start = 0;
3302         u32 prev_legacy, cur_legacy;
3303         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3304         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3305         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3306         if (!prev_legacy && cur_legacy)
3307                 start = 1;
3308         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3309                sizeof(kvm->arch.vpit->pit_state.channels));
3310         kvm->arch.vpit->pit_state.flags = ps->flags;
3311         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3312         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3313         return r;
3314 }
3315
3316 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3317                                  struct kvm_reinject_control *control)
3318 {
3319         if (!kvm->arch.vpit)
3320                 return -ENXIO;
3321         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3322         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3323         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3324         return 0;
3325 }
3326
3327 /*
3328  * Get (and clear) the dirty memory log for a memory slot.
3329  */
3330 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3331                                       struct kvm_dirty_log *log)
3332 {
3333         int r, i;
3334         struct kvm_memory_slot *memslot;
3335         unsigned long n;
3336         unsigned long is_dirty = 0;
3337
3338         mutex_lock(&kvm->slots_lock);
3339
3340         r = -EINVAL;
3341         if (log->slot >= KVM_MEMORY_SLOTS)
3342                 goto out;
3343
3344         memslot = &kvm->memslots->memslots[log->slot];
3345         r = -ENOENT;
3346         if (!memslot->dirty_bitmap)
3347                 goto out;
3348
3349         n = kvm_dirty_bitmap_bytes(memslot);
3350
3351         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3352                 is_dirty = memslot->dirty_bitmap[i];
3353
3354         /* If nothing is dirty, don't bother messing with page tables. */
3355         if (is_dirty) {
3356                 struct kvm_memslots *slots, *old_slots;
3357                 unsigned long *dirty_bitmap;
3358
3359                 dirty_bitmap = memslot->dirty_bitmap_head;
3360                 if (memslot->dirty_bitmap == dirty_bitmap)
3361                         dirty_bitmap += n / sizeof(long);
3362                 memset(dirty_bitmap, 0, n);
3363
3364                 r = -ENOMEM;
3365                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3366                 if (!slots)
3367                         goto out;
3368                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3369                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3370                 slots->generation++;
3371
3372                 old_slots = kvm->memslots;
3373                 rcu_assign_pointer(kvm->memslots, slots);
3374                 synchronize_srcu_expedited(&kvm->srcu);
3375                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3376                 kfree(old_slots);
3377
3378                 spin_lock(&kvm->mmu_lock);
3379                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3380                 spin_unlock(&kvm->mmu_lock);
3381
3382                 r = -EFAULT;
3383                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3384                         goto out;
3385         } else {
3386                 r = -EFAULT;
3387                 if (clear_user(log->dirty_bitmap, n))
3388                         goto out;
3389         }
3390
3391         r = 0;
3392 out:
3393         mutex_unlock(&kvm->slots_lock);
3394         return r;
3395 }
3396
3397 long kvm_arch_vm_ioctl(struct file *filp,
3398                        unsigned int ioctl, unsigned long arg)
3399 {
3400         struct kvm *kvm = filp->private_data;
3401         void __user *argp = (void __user *)arg;
3402         int r = -ENOTTY;
3403         /*
3404          * This union makes it completely explicit to gcc-3.x
3405          * that these two variables' stack usage should be
3406          * combined, not added together.
3407          */
3408         union {
3409                 struct kvm_pit_state ps;
3410                 struct kvm_pit_state2 ps2;
3411                 struct kvm_pit_config pit_config;
3412         } u;
3413
3414         switch (ioctl) {
3415         case KVM_SET_TSS_ADDR:
3416                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3417                 if (r < 0)
3418                         goto out;
3419                 break;
3420         case KVM_SET_IDENTITY_MAP_ADDR: {
3421                 u64 ident_addr;
3422
3423                 r = -EFAULT;
3424                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3425                         goto out;
3426                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3427                 if (r < 0)
3428                         goto out;
3429                 break;
3430         }
3431         case KVM_SET_NR_MMU_PAGES:
3432                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3433                 if (r)
3434                         goto out;
3435                 break;
3436         case KVM_GET_NR_MMU_PAGES:
3437                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3438                 break;
3439         case KVM_CREATE_IRQCHIP: {
3440                 struct kvm_pic *vpic;
3441
3442                 mutex_lock(&kvm->lock);
3443                 r = -EEXIST;
3444                 if (kvm->arch.vpic)
3445                         goto create_irqchip_unlock;
3446                 r = -ENOMEM;
3447                 vpic = kvm_create_pic(kvm);
3448                 if (vpic) {
3449                         r = kvm_ioapic_init(kvm);
3450                         if (r) {
3451                                 mutex_lock(&kvm->slots_lock);
3452                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3453                                                           &vpic->dev);
3454                                 mutex_unlock(&kvm->slots_lock);
3455                                 kfree(vpic);
3456                                 goto create_irqchip_unlock;
3457                         }
3458                 } else
3459                         goto create_irqchip_unlock;
3460                 smp_wmb();
3461                 kvm->arch.vpic = vpic;
3462                 smp_wmb();
3463                 r = kvm_setup_default_irq_routing(kvm);
3464                 if (r) {
3465                         mutex_lock(&kvm->slots_lock);
3466                         mutex_lock(&kvm->irq_lock);
3467                         kvm_ioapic_destroy(kvm);
3468                         kvm_destroy_pic(kvm);
3469                         mutex_unlock(&kvm->irq_lock);
3470                         mutex_unlock(&kvm->slots_lock);
3471                 }
3472         create_irqchip_unlock:
3473                 mutex_unlock(&kvm->lock);
3474                 break;
3475         }
3476         case KVM_CREATE_PIT:
3477                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3478                 goto create_pit;
3479         case KVM_CREATE_PIT2:
3480                 r = -EFAULT;
3481                 if (copy_from_user(&u.pit_config, argp,
3482                                    sizeof(struct kvm_pit_config)))
3483                         goto out;
3484         create_pit:
3485                 mutex_lock(&kvm->slots_lock);
3486                 r = -EEXIST;
3487                 if (kvm->arch.vpit)
3488                         goto create_pit_unlock;
3489                 r = -ENOMEM;
3490                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3491                 if (kvm->arch.vpit)
3492                         r = 0;
3493         create_pit_unlock:
3494                 mutex_unlock(&kvm->slots_lock);
3495                 break;
3496         case KVM_IRQ_LINE_STATUS:
3497         case KVM_IRQ_LINE: {
3498                 struct kvm_irq_level irq_event;
3499
3500                 r = -EFAULT;
3501                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3502                         goto out;
3503                 r = -ENXIO;
3504                 if (irqchip_in_kernel(kvm)) {
3505                         __s32 status;
3506                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3507                                         irq_event.irq, irq_event.level);
3508                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3509                                 r = -EFAULT;
3510                                 irq_event.status = status;
3511                                 if (copy_to_user(argp, &irq_event,
3512                                                         sizeof irq_event))
3513                                         goto out;
3514                         }
3515                         r = 0;
3516                 }
3517                 break;
3518         }
3519         case KVM_GET_IRQCHIP: {
3520                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3521                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3522
3523                 r = -ENOMEM;
3524                 if (!chip)
3525                         goto out;
3526                 r = -EFAULT;
3527                 if (copy_from_user(chip, argp, sizeof *chip))
3528                         goto get_irqchip_out;
3529                 r = -ENXIO;
3530                 if (!irqchip_in_kernel(kvm))
3531                         goto get_irqchip_out;
3532                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3533                 if (r)
3534                         goto get_irqchip_out;
3535                 r = -EFAULT;
3536                 if (copy_to_user(argp, chip, sizeof *chip))
3537                         goto get_irqchip_out;
3538                 r = 0;
3539         get_irqchip_out:
3540                 kfree(chip);
3541                 if (r)
3542                         goto out;
3543                 break;
3544         }
3545         case KVM_SET_IRQCHIP: {
3546                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3547                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3548
3549                 r = -ENOMEM;
3550                 if (!chip)
3551                         goto out;
3552                 r = -EFAULT;
3553                 if (copy_from_user(chip, argp, sizeof *chip))
3554                         goto set_irqchip_out;
3555                 r = -ENXIO;
3556                 if (!irqchip_in_kernel(kvm))
3557                         goto set_irqchip_out;
3558                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3559                 if (r)
3560                         goto set_irqchip_out;
3561                 r = 0;
3562         set_irqchip_out:
3563                 kfree(chip);
3564                 if (r)
3565                         goto out;
3566                 break;
3567         }
3568         case KVM_GET_PIT: {
3569                 r = -EFAULT;
3570                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3571                         goto out;
3572                 r = -ENXIO;
3573                 if (!kvm->arch.vpit)
3574                         goto out;
3575                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3576                 if (r)
3577                         goto out;
3578                 r = -EFAULT;
3579                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3580                         goto out;
3581                 r = 0;
3582                 break;
3583         }
3584         case KVM_SET_PIT: {
3585                 r = -EFAULT;
3586                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3587                         goto out;
3588                 r = -ENXIO;
3589                 if (!kvm->arch.vpit)
3590                         goto out;
3591                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3592                 if (r)
3593                         goto out;
3594                 r = 0;
3595                 break;
3596         }
3597         case KVM_GET_PIT2: {
3598                 r = -ENXIO;
3599                 if (!kvm->arch.vpit)
3600                         goto out;
3601                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3602                 if (r)
3603                         goto out;
3604                 r = -EFAULT;
3605                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3606                         goto out;
3607                 r = 0;
3608                 break;
3609         }
3610         case KVM_SET_PIT2: {
3611                 r = -EFAULT;
3612                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3613                         goto out;
3614                 r = -ENXIO;
3615                 if (!kvm->arch.vpit)
3616                         goto out;
3617                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3618                 if (r)
3619                         goto out;
3620                 r = 0;
3621                 break;
3622         }
3623         case KVM_REINJECT_CONTROL: {
3624                 struct kvm_reinject_control control;
3625                 r =  -EFAULT;
3626                 if (copy_from_user(&control, argp, sizeof(control)))
3627                         goto out;
3628                 r = kvm_vm_ioctl_reinject(kvm, &control);
3629                 if (r)
3630                         goto out;
3631                 r = 0;
3632                 break;
3633         }
3634         case KVM_XEN_HVM_CONFIG: {
3635                 r = -EFAULT;
3636                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3637                                    sizeof(struct kvm_xen_hvm_config)))
3638                         goto out;
3639                 r = -EINVAL;
3640                 if (kvm->arch.xen_hvm_config.flags)
3641                         goto out;
3642                 r = 0;
3643                 break;
3644         }
3645         case KVM_SET_CLOCK: {
3646                 struct kvm_clock_data user_ns;
3647                 u64 now_ns;
3648                 s64 delta;
3649
3650                 r = -EFAULT;
3651                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3652                         goto out;
3653
3654                 r = -EINVAL;
3655                 if (user_ns.flags)
3656                         goto out;
3657
3658                 r = 0;
3659                 local_irq_disable();
3660                 now_ns = get_kernel_ns();
3661                 delta = user_ns.clock - now_ns;
3662                 local_irq_enable();
3663                 kvm->arch.kvmclock_offset = delta;
3664                 break;
3665         }
3666         case KVM_GET_CLOCK: {
3667                 struct kvm_clock_data user_ns;
3668                 u64 now_ns;
3669
3670                 local_irq_disable();
3671                 now_ns = get_kernel_ns();
3672                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3673                 local_irq_enable();
3674                 user_ns.flags = 0;
3675                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3676
3677                 r = -EFAULT;
3678                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3679                         goto out;
3680                 r = 0;
3681                 break;
3682         }
3683
3684         default:
3685                 ;
3686         }
3687 out:
3688         return r;
3689 }
3690
3691 static void kvm_init_msr_list(void)
3692 {
3693         u32 dummy[2];
3694         unsigned i, j;
3695
3696         /* skip the first msrs in the list. KVM-specific */
3697         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3698                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3699                         continue;
3700                 if (j < i)
3701                         msrs_to_save[j] = msrs_to_save[i];
3702                 j++;
3703         }
3704         num_msrs_to_save = j;
3705 }
3706
3707 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3708                            const void *v)
3709 {
3710         int handled = 0;
3711         int n;
3712
3713         do {
3714                 n = min(len, 8);
3715                 if (!(vcpu->arch.apic &&
3716                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3717                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3718                         break;
3719                 handled += n;
3720                 addr += n;
3721                 len -= n;
3722                 v += n;
3723         } while (len);
3724
3725         return handled;
3726 }
3727
3728 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3729 {
3730         int handled = 0;
3731         int n;
3732
3733         do {
3734                 n = min(len, 8);
3735                 if (!(vcpu->arch.apic &&
3736                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3737                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3738                         break;
3739                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3740                 handled += n;
3741                 addr += n;
3742                 len -= n;
3743                 v += n;
3744         } while (len);
3745
3746         return handled;
3747 }
3748
3749 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3750                         struct kvm_segment *var, int seg)
3751 {
3752         kvm_x86_ops->set_segment(vcpu, var, seg);
3753 }
3754
3755 void kvm_get_segment(struct kvm_vcpu *vcpu,
3756                      struct kvm_segment *var, int seg)
3757 {
3758         kvm_x86_ops->get_segment(vcpu, var, seg);
3759 }
3760
3761 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3762 {
3763         return gpa;
3764 }
3765
3766 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3767 {
3768         gpa_t t_gpa;
3769         struct x86_exception exception;
3770
3771         BUG_ON(!mmu_is_nested(vcpu));
3772
3773         /* NPT walks are always user-walks */
3774         access |= PFERR_USER_MASK;
3775         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3776
3777         return t_gpa;
3778 }
3779
3780 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3781                               struct x86_exception *exception)
3782 {
3783         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3784         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3785 }
3786
3787  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3788                                 struct x86_exception *exception)
3789 {
3790         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3791         access |= PFERR_FETCH_MASK;
3792         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3793 }
3794
3795 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3796                                struct x86_exception *exception)
3797 {
3798         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3799         access |= PFERR_WRITE_MASK;
3800         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3801 }
3802
3803 /* uses this to access any guest's mapped memory without checking CPL */
3804 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3805                                 struct x86_exception *exception)
3806 {
3807         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3808 }
3809
3810 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3811                                       struct kvm_vcpu *vcpu, u32 access,
3812                                       struct x86_exception *exception)
3813 {
3814         void *data = val;
3815         int r = X86EMUL_CONTINUE;
3816
3817         while (bytes) {
3818                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3819                                                             exception);
3820                 unsigned offset = addr & (PAGE_SIZE-1);
3821                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3822                 int ret;
3823
3824                 if (gpa == UNMAPPED_GVA)
3825                         return X86EMUL_PROPAGATE_FAULT;
3826                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3827                 if (ret < 0) {
3828                         r = X86EMUL_IO_NEEDED;
3829                         goto out;
3830                 }
3831
3832                 bytes -= toread;
3833                 data += toread;
3834                 addr += toread;
3835         }
3836 out:
3837         return r;
3838 }
3839
3840 /* used for instruction fetching */
3841 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3842                                 gva_t addr, void *val, unsigned int bytes,
3843                                 struct x86_exception *exception)
3844 {
3845         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3846         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3847
3848         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3849                                           access | PFERR_FETCH_MASK,
3850                                           exception);
3851 }
3852
3853 static int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3854                                gva_t addr, void *val, unsigned int bytes,
3855                                struct x86_exception *exception)
3856 {
3857         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3858         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3859
3860         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3861                                           exception);
3862 }
3863
3864 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3865                                       gva_t addr, void *val, unsigned int bytes,
3866                                       struct x86_exception *exception)
3867 {
3868         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3869         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3870 }
3871
3872 static int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3873                                        gva_t addr, void *val,
3874                                        unsigned int bytes,
3875                                        struct x86_exception *exception)
3876 {
3877         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3878         void *data = val;
3879         int r = X86EMUL_CONTINUE;
3880
3881         while (bytes) {
3882                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3883                                                              PFERR_WRITE_MASK,
3884                                                              exception);
3885                 unsigned offset = addr & (PAGE_SIZE-1);
3886                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3887                 int ret;
3888
3889                 if (gpa == UNMAPPED_GVA)
3890                         return X86EMUL_PROPAGATE_FAULT;
3891                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3892                 if (ret < 0) {
3893                         r = X86EMUL_IO_NEEDED;
3894                         goto out;
3895                 }
3896
3897                 bytes -= towrite;
3898                 data += towrite;
3899                 addr += towrite;
3900         }
3901 out:
3902         return r;
3903 }
3904
3905 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3906                                   unsigned long addr,
3907                                   void *val,
3908                                   unsigned int bytes,
3909                                   struct x86_exception *exception)
3910 {
3911         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3912         gpa_t                 gpa;
3913         int handled;
3914
3915         if (vcpu->mmio_read_completed) {
3916                 memcpy(val, vcpu->mmio_data, bytes);
3917                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3918                                vcpu->mmio_phys_addr, *(u64 *)val);
3919                 vcpu->mmio_read_completed = 0;
3920                 return X86EMUL_CONTINUE;
3921         }
3922
3923         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3924
3925         if (gpa == UNMAPPED_GVA)
3926                 return X86EMUL_PROPAGATE_FAULT;
3927
3928         /* For APIC access vmexit */
3929         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3930                 goto mmio;
3931
3932         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3933             == X86EMUL_CONTINUE)
3934                 return X86EMUL_CONTINUE;
3935
3936 mmio:
3937         /*
3938          * Is this MMIO handled locally?
3939          */
3940         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3941
3942         if (handled == bytes)
3943                 return X86EMUL_CONTINUE;
3944
3945         gpa += handled;
3946         bytes -= handled;
3947         val += handled;
3948
3949         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3950
3951         vcpu->mmio_needed = 1;
3952         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3953         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3954         vcpu->mmio_size = bytes;
3955         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3956         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3957         vcpu->mmio_index = 0;
3958
3959         return X86EMUL_IO_NEEDED;
3960 }
3961
3962 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3963                         const void *val, int bytes)
3964 {
3965         int ret;
3966
3967         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3968         if (ret < 0)
3969                 return 0;
3970         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3971         return 1;
3972 }
3973
3974 static int emulator_write_emulated_onepage(unsigned long addr,
3975                                            const void *val,
3976                                            unsigned int bytes,
3977                                            struct x86_exception *exception,
3978                                            struct kvm_vcpu *vcpu)
3979 {
3980         gpa_t                 gpa;
3981         int handled;
3982
3983         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3984
3985         if (gpa == UNMAPPED_GVA)
3986                 return X86EMUL_PROPAGATE_FAULT;
3987
3988         /* For APIC access vmexit */
3989         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3990                 goto mmio;
3991
3992         if (emulator_write_phys(vcpu, gpa, val, bytes))
3993                 return X86EMUL_CONTINUE;
3994
3995 mmio:
3996         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3997         /*
3998          * Is this MMIO handled locally?
3999          */
4000         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
4001         if (handled == bytes)
4002                 return X86EMUL_CONTINUE;
4003
4004         gpa += handled;
4005         bytes -= handled;
4006         val += handled;
4007
4008         vcpu->mmio_needed = 1;
4009         memcpy(vcpu->mmio_data, val, bytes);
4010         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4011         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4012         vcpu->mmio_size = bytes;
4013         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4014         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
4015         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4016         vcpu->mmio_index = 0;
4017
4018         return X86EMUL_CONTINUE;
4019 }
4020
4021 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4022                             unsigned long addr,
4023                             const void *val,
4024                             unsigned int bytes,
4025                             struct x86_exception *exception)
4026 {
4027         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4028
4029         /* Crossing a page boundary? */
4030         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4031                 int rc, now;
4032
4033                 now = -addr & ~PAGE_MASK;
4034                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4035                                                      vcpu);
4036                 if (rc != X86EMUL_CONTINUE)
4037                         return rc;
4038                 addr += now;
4039                 val += now;
4040                 bytes -= now;
4041         }
4042         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4043                                                vcpu);
4044 }
4045
4046 #define CMPXCHG_TYPE(t, ptr, old, new) \
4047         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4048
4049 #ifdef CONFIG_X86_64
4050 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4051 #else
4052 #  define CMPXCHG64(ptr, old, new) \
4053         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4054 #endif
4055
4056 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4057                                      unsigned long addr,
4058                                      const void *old,
4059                                      const void *new,
4060                                      unsigned int bytes,
4061                                      struct x86_exception *exception)
4062 {
4063         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4064         gpa_t gpa;
4065         struct page *page;
4066         char *kaddr;
4067         bool exchanged;
4068
4069         /* guests cmpxchg8b have to be emulated atomically */
4070         if (bytes > 8 || (bytes & (bytes - 1)))
4071                 goto emul_write;
4072
4073         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4074
4075         if (gpa == UNMAPPED_GVA ||
4076             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4077                 goto emul_write;
4078
4079         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4080                 goto emul_write;
4081
4082         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4083         if (is_error_page(page)) {
4084                 kvm_release_page_clean(page);
4085                 goto emul_write;
4086         }
4087
4088         kaddr = kmap_atomic(page, KM_USER0);
4089         kaddr += offset_in_page(gpa);
4090         switch (bytes) {
4091         case 1:
4092                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4093                 break;
4094         case 2:
4095                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4096                 break;
4097         case 4:
4098                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4099                 break;
4100         case 8:
4101                 exchanged = CMPXCHG64(kaddr, old, new);
4102                 break;
4103         default:
4104                 BUG();
4105         }
4106         kunmap_atomic(kaddr, KM_USER0);
4107         kvm_release_page_dirty(page);
4108
4109         if (!exchanged)
4110                 return X86EMUL_CMPXCHG_FAILED;
4111
4112         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4113
4114         return X86EMUL_CONTINUE;
4115
4116 emul_write:
4117         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4118
4119         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4120 }
4121
4122 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4123 {
4124         /* TODO: String I/O for in kernel device */
4125         int r;
4126
4127         if (vcpu->arch.pio.in)
4128                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4129                                     vcpu->arch.pio.size, pd);
4130         else
4131                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4132                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4133                                      pd);
4134         return r;
4135 }
4136
4137
4138 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4139                                     int size, unsigned short port, void *val,
4140                                     unsigned int count)
4141 {
4142         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4143
4144         if (vcpu->arch.pio.count)
4145                 goto data_avail;
4146
4147         trace_kvm_pio(0, port, size, count);
4148
4149         vcpu->arch.pio.port = port;
4150         vcpu->arch.pio.in = 1;
4151         vcpu->arch.pio.count  = count;
4152         vcpu->arch.pio.size = size;
4153
4154         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4155         data_avail:
4156                 memcpy(val, vcpu->arch.pio_data, size * count);
4157                 vcpu->arch.pio.count = 0;
4158                 return 1;
4159         }
4160
4161         vcpu->run->exit_reason = KVM_EXIT_IO;
4162         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4163         vcpu->run->io.size = size;
4164         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4165         vcpu->run->io.count = count;
4166         vcpu->run->io.port = port;
4167
4168         return 0;
4169 }
4170
4171 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4172                                      int size, unsigned short port,
4173                                      const void *val, unsigned int count)
4174 {
4175         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4176
4177         trace_kvm_pio(1, port, size, count);
4178
4179         vcpu->arch.pio.port = port;
4180         vcpu->arch.pio.in = 0;
4181         vcpu->arch.pio.count = count;
4182         vcpu->arch.pio.size = size;
4183
4184         memcpy(vcpu->arch.pio_data, val, size * count);
4185
4186         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4187                 vcpu->arch.pio.count = 0;
4188                 return 1;
4189         }
4190
4191         vcpu->run->exit_reason = KVM_EXIT_IO;
4192         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4193         vcpu->run->io.size = size;
4194         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4195         vcpu->run->io.count = count;
4196         vcpu->run->io.port = port;
4197
4198         return 0;
4199 }
4200
4201 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4202 {
4203         return kvm_x86_ops->get_segment_base(vcpu, seg);
4204 }
4205
4206 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4207 {
4208         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4209 }
4210
4211 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4212 {
4213         if (!need_emulate_wbinvd(vcpu))
4214                 return X86EMUL_CONTINUE;
4215
4216         if (kvm_x86_ops->has_wbinvd_exit()) {
4217                 int cpu = get_cpu();
4218
4219                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4220                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4221                                 wbinvd_ipi, NULL, 1);
4222                 put_cpu();
4223                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4224         } else
4225                 wbinvd();
4226         return X86EMUL_CONTINUE;
4227 }
4228 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4229
4230 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4231 {
4232         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4233 }
4234
4235 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4236 {
4237         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4238 }
4239
4240 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4241 {
4242
4243         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4244 }
4245
4246 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4247 {
4248         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4249 }
4250
4251 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4252 {
4253         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4254         unsigned long value;
4255
4256         switch (cr) {
4257         case 0:
4258                 value = kvm_read_cr0(vcpu);
4259                 break;
4260         case 2:
4261                 value = vcpu->arch.cr2;
4262                 break;
4263         case 3:
4264                 value = kvm_read_cr3(vcpu);
4265                 break;
4266         case 4:
4267                 value = kvm_read_cr4(vcpu);
4268                 break;
4269         case 8:
4270                 value = kvm_get_cr8(vcpu);
4271                 break;
4272         default:
4273                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4274                 return 0;
4275         }
4276
4277         return value;
4278 }
4279
4280 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4281 {
4282         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4283         int res = 0;
4284
4285         switch (cr) {
4286         case 0:
4287                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4288                 break;
4289         case 2:
4290                 vcpu->arch.cr2 = val;
4291                 break;
4292         case 3:
4293                 res = kvm_set_cr3(vcpu, val);
4294                 break;
4295         case 4:
4296                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4297                 break;
4298         case 8:
4299                 res = kvm_set_cr8(vcpu, val);
4300                 break;
4301         default:
4302                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4303                 res = -1;
4304         }
4305
4306         return res;
4307 }
4308
4309 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4310 {
4311         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4312 }
4313
4314 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4315 {
4316         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4317 }
4318
4319 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4320 {
4321         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4322 }
4323
4324 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4325 {
4326         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4327 }
4328
4329 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4330 {
4331         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4332 }
4333
4334 static unsigned long emulator_get_cached_segment_base(
4335         struct x86_emulate_ctxt *ctxt, int seg)
4336 {
4337         return get_segment_base(emul_to_vcpu(ctxt), seg);
4338 }
4339
4340 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4341                                  struct desc_struct *desc, u32 *base3,
4342                                  int seg)
4343 {
4344         struct kvm_segment var;
4345
4346         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4347         *selector = var.selector;
4348
4349         if (var.unusable)
4350                 return false;
4351
4352         if (var.g)
4353                 var.limit >>= 12;
4354         set_desc_limit(desc, var.limit);
4355         set_desc_base(desc, (unsigned long)var.base);
4356 #ifdef CONFIG_X86_64
4357         if (base3)
4358                 *base3 = var.base >> 32;
4359 #endif
4360         desc->type = var.type;
4361         desc->s = var.s;
4362         desc->dpl = var.dpl;
4363         desc->p = var.present;
4364         desc->avl = var.avl;
4365         desc->l = var.l;
4366         desc->d = var.db;
4367         desc->g = var.g;
4368
4369         return true;
4370 }
4371
4372 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4373                                  struct desc_struct *desc, u32 base3,
4374                                  int seg)
4375 {
4376         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4377         struct kvm_segment var;
4378
4379         var.selector = selector;
4380         var.base = get_desc_base(desc);
4381 #ifdef CONFIG_X86_64
4382         var.base |= ((u64)base3) << 32;
4383 #endif
4384         var.limit = get_desc_limit(desc);
4385         if (desc->g)
4386                 var.limit = (var.limit << 12) | 0xfff;
4387         var.type = desc->type;
4388         var.present = desc->p;
4389         var.dpl = desc->dpl;
4390         var.db = desc->d;
4391         var.s = desc->s;
4392         var.l = desc->l;
4393         var.g = desc->g;
4394         var.avl = desc->avl;
4395         var.present = desc->p;
4396         var.unusable = !var.present;
4397         var.padding = 0;
4398
4399         kvm_set_segment(vcpu, &var, seg);
4400         return;
4401 }
4402
4403 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4404                             u32 msr_index, u64 *pdata)
4405 {
4406         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4407 }
4408
4409 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4410                             u32 msr_index, u64 data)
4411 {
4412         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4413 }
4414
4415 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4416 {
4417         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4418 }
4419
4420 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4421 {
4422         preempt_disable();
4423         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4424         /*
4425          * CR0.TS may reference the host fpu state, not the guest fpu state,
4426          * so it may be clear at this point.
4427          */
4428         clts();
4429 }
4430
4431 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4432 {
4433         preempt_enable();
4434 }
4435
4436 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4437                               struct x86_instruction_info *info,
4438                               enum x86_intercept_stage stage)
4439 {
4440         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4441 }
4442
4443 static struct x86_emulate_ops emulate_ops = {
4444         .read_std            = kvm_read_guest_virt_system,
4445         .write_std           = kvm_write_guest_virt_system,
4446         .fetch               = kvm_fetch_guest_virt,
4447         .read_emulated       = emulator_read_emulated,
4448         .write_emulated      = emulator_write_emulated,
4449         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4450         .invlpg              = emulator_invlpg,
4451         .pio_in_emulated     = emulator_pio_in_emulated,
4452         .pio_out_emulated    = emulator_pio_out_emulated,
4453         .get_segment         = emulator_get_segment,
4454         .set_segment         = emulator_set_segment,
4455         .get_cached_segment_base = emulator_get_cached_segment_base,
4456         .get_gdt             = emulator_get_gdt,
4457         .get_idt             = emulator_get_idt,
4458         .set_gdt             = emulator_set_gdt,
4459         .set_idt             = emulator_set_idt,
4460         .get_cr              = emulator_get_cr,
4461         .set_cr              = emulator_set_cr,
4462         .cpl                 = emulator_get_cpl,
4463         .get_dr              = emulator_get_dr,
4464         .set_dr              = emulator_set_dr,
4465         .set_msr             = emulator_set_msr,
4466         .get_msr             = emulator_get_msr,
4467         .halt                = emulator_halt,
4468         .wbinvd              = emulator_wbinvd,
4469         .fix_hypercall       = emulator_fix_hypercall,
4470         .get_fpu             = emulator_get_fpu,
4471         .put_fpu             = emulator_put_fpu,
4472         .intercept           = emulator_intercept,
4473 };
4474
4475 static void cache_all_regs(struct kvm_vcpu *vcpu)
4476 {
4477         kvm_register_read(vcpu, VCPU_REGS_RAX);
4478         kvm_register_read(vcpu, VCPU_REGS_RSP);
4479         kvm_register_read(vcpu, VCPU_REGS_RIP);
4480         vcpu->arch.regs_dirty = ~0;
4481 }
4482
4483 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4484 {
4485         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4486         /*
4487          * an sti; sti; sequence only disable interrupts for the first
4488          * instruction. So, if the last instruction, be it emulated or
4489          * not, left the system with the INT_STI flag enabled, it
4490          * means that the last instruction is an sti. We should not
4491          * leave the flag on in this case. The same goes for mov ss
4492          */
4493         if (!(int_shadow & mask))
4494                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4495 }
4496
4497 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4498 {
4499         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4500         if (ctxt->exception.vector == PF_VECTOR)
4501                 kvm_propagate_fault(vcpu, &ctxt->exception);
4502         else if (ctxt->exception.error_code_valid)
4503                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4504                                       ctxt->exception.error_code);
4505         else
4506                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4507 }
4508
4509 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4510 {
4511         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4512         struct decode_cache *c = &ctxt->decode;
4513         int cs_db, cs_l;
4514
4515         /*
4516          * TODO: fix emulate.c to use guest_read/write_register
4517          * instead of direct ->regs accesses, can save hundred cycles
4518          * on Intel for instructions that don't read/change RSP, for
4519          * for example.
4520          */
4521         cache_all_regs(vcpu);
4522
4523         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4524
4525         ctxt->eflags = kvm_get_rflags(vcpu);
4526         ctxt->eip = kvm_rip_read(vcpu);
4527         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4528                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4529                      cs_l                               ? X86EMUL_MODE_PROT64 :
4530                      cs_db                              ? X86EMUL_MODE_PROT32 :
4531                                                           X86EMUL_MODE_PROT16;
4532         ctxt->guest_mode = is_guest_mode(vcpu);
4533
4534         memset(c, 0, sizeof(struct decode_cache));
4535         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4536         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4537 }
4538
4539 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4540 {
4541         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4542         int ret;
4543
4544         init_emulate_ctxt(vcpu);
4545
4546         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4547         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4548         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4549                                                                  inc_eip;
4550         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, irq);
4551
4552         if (ret != X86EMUL_CONTINUE)
4553                 return EMULATE_FAIL;
4554
4555         vcpu->arch.emulate_ctxt.eip = c->eip;
4556         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4557         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4558         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4559
4560         if (irq == NMI_VECTOR)
4561                 vcpu->arch.nmi_pending = false;
4562         else
4563                 vcpu->arch.interrupt.pending = false;
4564
4565         return EMULATE_DONE;
4566 }
4567 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4568
4569 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4570 {
4571         int r = EMULATE_DONE;
4572
4573         ++vcpu->stat.insn_emulation_fail;
4574         trace_kvm_emulate_insn_failed(vcpu);
4575         if (!is_guest_mode(vcpu)) {
4576                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4577                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4578                 vcpu->run->internal.ndata = 0;
4579                 r = EMULATE_FAIL;
4580         }
4581         kvm_queue_exception(vcpu, UD_VECTOR);
4582
4583         return r;
4584 }
4585
4586 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4587 {
4588         gpa_t gpa;
4589
4590         if (tdp_enabled)
4591                 return false;
4592
4593         /*
4594          * if emulation was due to access to shadowed page table
4595          * and it failed try to unshadow page and re-entetr the
4596          * guest to let CPU execute the instruction.
4597          */
4598         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4599                 return true;
4600
4601         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4602
4603         if (gpa == UNMAPPED_GVA)
4604                 return true; /* let cpu generate fault */
4605
4606         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4607                 return true;
4608
4609         return false;
4610 }
4611
4612 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4613                             unsigned long cr2,
4614                             int emulation_type,
4615                             void *insn,
4616                             int insn_len)
4617 {
4618         int r;
4619         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4620         bool writeback = true;
4621
4622         kvm_clear_exception_queue(vcpu);
4623
4624         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4625                 init_emulate_ctxt(vcpu);
4626                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4627                 vcpu->arch.emulate_ctxt.have_exception = false;
4628                 vcpu->arch.emulate_ctxt.perm_ok = false;
4629
4630                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4631                         = emulation_type & EMULTYPE_TRAP_UD;
4632
4633                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4634
4635                 trace_kvm_emulate_insn_start(vcpu);
4636                 ++vcpu->stat.insn_emulation;
4637                 if (r)  {
4638                         if (emulation_type & EMULTYPE_TRAP_UD)
4639                                 return EMULATE_FAIL;
4640                         if (reexecute_instruction(vcpu, cr2))
4641                                 return EMULATE_DONE;
4642                         if (emulation_type & EMULTYPE_SKIP)
4643                                 return EMULATE_FAIL;
4644                         return handle_emulation_failure(vcpu);
4645                 }
4646         }
4647
4648         if (emulation_type & EMULTYPE_SKIP) {
4649                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4650                 return EMULATE_DONE;
4651         }
4652
4653         /* this is needed for vmware backdoor interface to work since it
4654            changes registers values  during IO operation */
4655         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4656                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4657                 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4658         }
4659
4660 restart:
4661         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4662
4663         if (r == EMULATION_INTERCEPTED)
4664                 return EMULATE_DONE;
4665
4666         if (r == EMULATION_FAILED) {
4667                 if (reexecute_instruction(vcpu, cr2))
4668                         return EMULATE_DONE;
4669
4670                 return handle_emulation_failure(vcpu);
4671         }
4672
4673         if (vcpu->arch.emulate_ctxt.have_exception) {
4674                 inject_emulated_exception(vcpu);
4675                 r = EMULATE_DONE;
4676         } else if (vcpu->arch.pio.count) {
4677                 if (!vcpu->arch.pio.in)
4678                         vcpu->arch.pio.count = 0;
4679                 else
4680                         writeback = false;
4681                 r = EMULATE_DO_MMIO;
4682         } else if (vcpu->mmio_needed) {
4683                 if (!vcpu->mmio_is_write)
4684                         writeback = false;
4685                 r = EMULATE_DO_MMIO;
4686         } else if (r == EMULATION_RESTART)
4687                 goto restart;
4688         else
4689                 r = EMULATE_DONE;
4690
4691         if (writeback) {
4692                 toggle_interruptibility(vcpu,
4693                                 vcpu->arch.emulate_ctxt.interruptibility);
4694                 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4695                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4696                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4697                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4698                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4699         } else
4700                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4701
4702         return r;
4703 }
4704 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4705
4706 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4707 {
4708         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4709         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4710                                             size, port, &val, 1);
4711         /* do not return to emulator after return from userspace */
4712         vcpu->arch.pio.count = 0;
4713         return ret;
4714 }
4715 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4716
4717 static void tsc_bad(void *info)
4718 {
4719         __this_cpu_write(cpu_tsc_khz, 0);
4720 }
4721
4722 static void tsc_khz_changed(void *data)
4723 {
4724         struct cpufreq_freqs *freq = data;
4725         unsigned long khz = 0;
4726
4727         if (data)
4728                 khz = freq->new;
4729         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4730                 khz = cpufreq_quick_get(raw_smp_processor_id());
4731         if (!khz)
4732                 khz = tsc_khz;
4733         __this_cpu_write(cpu_tsc_khz, khz);
4734 }
4735
4736 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4737                                      void *data)
4738 {
4739         struct cpufreq_freqs *freq = data;
4740         struct kvm *kvm;
4741         struct kvm_vcpu *vcpu;
4742         int i, send_ipi = 0;
4743
4744         /*
4745          * We allow guests to temporarily run on slowing clocks,
4746          * provided we notify them after, or to run on accelerating
4747          * clocks, provided we notify them before.  Thus time never
4748          * goes backwards.
4749          *
4750          * However, we have a problem.  We can't atomically update
4751          * the frequency of a given CPU from this function; it is
4752          * merely a notifier, which can be called from any CPU.
4753          * Changing the TSC frequency at arbitrary points in time
4754          * requires a recomputation of local variables related to
4755          * the TSC for each VCPU.  We must flag these local variables
4756          * to be updated and be sure the update takes place with the
4757          * new frequency before any guests proceed.
4758          *
4759          * Unfortunately, the combination of hotplug CPU and frequency
4760          * change creates an intractable locking scenario; the order
4761          * of when these callouts happen is undefined with respect to
4762          * CPU hotplug, and they can race with each other.  As such,
4763          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4764          * undefined; you can actually have a CPU frequency change take
4765          * place in between the computation of X and the setting of the
4766          * variable.  To protect against this problem, all updates of
4767          * the per_cpu tsc_khz variable are done in an interrupt
4768          * protected IPI, and all callers wishing to update the value
4769          * must wait for a synchronous IPI to complete (which is trivial
4770          * if the caller is on the CPU already).  This establishes the
4771          * necessary total order on variable updates.
4772          *
4773          * Note that because a guest time update may take place
4774          * anytime after the setting of the VCPU's request bit, the
4775          * correct TSC value must be set before the request.  However,
4776          * to ensure the update actually makes it to any guest which
4777          * starts running in hardware virtualization between the set
4778          * and the acquisition of the spinlock, we must also ping the
4779          * CPU after setting the request bit.
4780          *
4781          */
4782
4783         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4784                 return 0;
4785         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4786                 return 0;
4787
4788         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4789
4790         raw_spin_lock(&kvm_lock);
4791         list_for_each_entry(kvm, &vm_list, vm_list) {
4792                 kvm_for_each_vcpu(i, vcpu, kvm) {
4793                         if (vcpu->cpu != freq->cpu)
4794                                 continue;
4795                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4796                         if (vcpu->cpu != smp_processor_id())
4797                                 send_ipi = 1;
4798                 }
4799         }
4800         raw_spin_unlock(&kvm_lock);
4801
4802         if (freq->old < freq->new && send_ipi) {
4803                 /*
4804                  * We upscale the frequency.  Must make the guest
4805                  * doesn't see old kvmclock values while running with
4806                  * the new frequency, otherwise we risk the guest sees
4807                  * time go backwards.
4808                  *
4809                  * In case we update the frequency for another cpu
4810                  * (which might be in guest context) send an interrupt
4811                  * to kick the cpu out of guest context.  Next time
4812                  * guest context is entered kvmclock will be updated,
4813                  * so the guest will not see stale values.
4814                  */
4815                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4816         }
4817         return 0;
4818 }
4819
4820 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4821         .notifier_call  = kvmclock_cpufreq_notifier
4822 };
4823
4824 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4825                                         unsigned long action, void *hcpu)
4826 {
4827         unsigned int cpu = (unsigned long)hcpu;
4828
4829         switch (action) {
4830                 case CPU_ONLINE:
4831                 case CPU_DOWN_FAILED:
4832                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4833                         break;
4834                 case CPU_DOWN_PREPARE:
4835                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4836                         break;
4837         }
4838         return NOTIFY_OK;
4839 }
4840
4841 static struct notifier_block kvmclock_cpu_notifier_block = {
4842         .notifier_call  = kvmclock_cpu_notifier,
4843         .priority = -INT_MAX
4844 };
4845
4846 static void kvm_timer_init(void)
4847 {
4848         int cpu;
4849
4850         max_tsc_khz = tsc_khz;
4851         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4852         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4853 #ifdef CONFIG_CPU_FREQ
4854                 struct cpufreq_policy policy;
4855                 memset(&policy, 0, sizeof(policy));
4856                 cpu = get_cpu();
4857                 cpufreq_get_policy(&policy, cpu);
4858                 if (policy.cpuinfo.max_freq)
4859                         max_tsc_khz = policy.cpuinfo.max_freq;
4860                 put_cpu();
4861 #endif
4862                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4863                                           CPUFREQ_TRANSITION_NOTIFIER);
4864         }
4865         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4866         for_each_online_cpu(cpu)
4867                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4868 }
4869
4870 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4871
4872 static int kvm_is_in_guest(void)
4873 {
4874         return percpu_read(current_vcpu) != NULL;
4875 }
4876
4877 static int kvm_is_user_mode(void)
4878 {
4879         int user_mode = 3;
4880
4881         if (percpu_read(current_vcpu))
4882                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4883
4884         return user_mode != 0;
4885 }
4886
4887 static unsigned long kvm_get_guest_ip(void)
4888 {
4889         unsigned long ip = 0;
4890
4891         if (percpu_read(current_vcpu))
4892                 ip = kvm_rip_read(percpu_read(current_vcpu));
4893
4894         return ip;
4895 }
4896
4897 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4898         .is_in_guest            = kvm_is_in_guest,
4899         .is_user_mode           = kvm_is_user_mode,
4900         .get_guest_ip           = kvm_get_guest_ip,
4901 };
4902
4903 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4904 {
4905         percpu_write(current_vcpu, vcpu);
4906 }
4907 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4908
4909 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4910 {
4911         percpu_write(current_vcpu, NULL);
4912 }
4913 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4914
4915 int kvm_arch_init(void *opaque)
4916 {
4917         int r;
4918         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4919
4920         if (kvm_x86_ops) {
4921                 printk(KERN_ERR "kvm: already loaded the other module\n");
4922                 r = -EEXIST;
4923                 goto out;
4924         }
4925
4926         if (!ops->cpu_has_kvm_support()) {
4927                 printk(KERN_ERR "kvm: no hardware support\n");
4928                 r = -EOPNOTSUPP;
4929                 goto out;
4930         }
4931         if (ops->disabled_by_bios()) {
4932                 printk(KERN_ERR "kvm: disabled by bios\n");
4933                 r = -EOPNOTSUPP;
4934                 goto out;
4935         }
4936
4937         r = kvm_mmu_module_init();
4938         if (r)
4939                 goto out;
4940
4941         kvm_init_msr_list();
4942
4943         kvm_x86_ops = ops;
4944         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4945         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4946                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4947
4948         kvm_timer_init();
4949
4950         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4951
4952         if (cpu_has_xsave)
4953                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4954
4955         return 0;
4956
4957 out:
4958         return r;
4959 }
4960
4961 void kvm_arch_exit(void)
4962 {
4963         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4964
4965         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4966                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4967                                             CPUFREQ_TRANSITION_NOTIFIER);
4968         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4969         kvm_x86_ops = NULL;
4970         kvm_mmu_module_exit();
4971 }
4972
4973 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4974 {
4975         ++vcpu->stat.halt_exits;
4976         if (irqchip_in_kernel(vcpu->kvm)) {
4977                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4978                 return 1;
4979         } else {
4980                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4981                 return 0;
4982         }
4983 }
4984 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4985
4986 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4987                            unsigned long a1)
4988 {
4989         if (is_long_mode(vcpu))
4990                 return a0;
4991         else
4992                 return a0 | ((gpa_t)a1 << 32);
4993 }
4994
4995 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4996 {
4997         u64 param, ingpa, outgpa, ret;
4998         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4999         bool fast, longmode;
5000         int cs_db, cs_l;
5001
5002         /*
5003          * hypercall generates UD from non zero cpl and real mode
5004          * per HYPER-V spec
5005          */
5006         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5007                 kvm_queue_exception(vcpu, UD_VECTOR);
5008                 return 0;
5009         }
5010
5011         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5012         longmode = is_long_mode(vcpu) && cs_l == 1;
5013
5014         if (!longmode) {
5015                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5016                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5017                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5018                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5019                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5020                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5021         }
5022 #ifdef CONFIG_X86_64
5023         else {
5024                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5025                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5026                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5027         }
5028 #endif
5029
5030         code = param & 0xffff;
5031         fast = (param >> 16) & 0x1;
5032         rep_cnt = (param >> 32) & 0xfff;
5033         rep_idx = (param >> 48) & 0xfff;
5034
5035         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5036
5037         switch (code) {
5038         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5039                 kvm_vcpu_on_spin(vcpu);
5040                 break;
5041         default:
5042                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5043                 break;
5044         }
5045
5046         ret = res | (((u64)rep_done & 0xfff) << 32);
5047         if (longmode) {
5048                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5049         } else {
5050                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5051                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5052         }
5053
5054         return 1;
5055 }
5056
5057 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5058 {
5059         unsigned long nr, a0, a1, a2, a3, ret;
5060         int r = 1;
5061
5062         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5063                 return kvm_hv_hypercall(vcpu);
5064
5065         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5066         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5067         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5068         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5069         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5070
5071         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5072
5073         if (!is_long_mode(vcpu)) {
5074                 nr &= 0xFFFFFFFF;
5075                 a0 &= 0xFFFFFFFF;
5076                 a1 &= 0xFFFFFFFF;
5077                 a2 &= 0xFFFFFFFF;
5078                 a3 &= 0xFFFFFFFF;
5079         }
5080
5081         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5082                 ret = -KVM_EPERM;
5083                 goto out;
5084         }
5085
5086         switch (nr) {
5087         case KVM_HC_VAPIC_POLL_IRQ:
5088                 ret = 0;
5089                 break;
5090         case KVM_HC_MMU_OP:
5091                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5092                 break;
5093         default:
5094                 ret = -KVM_ENOSYS;
5095                 break;
5096         }
5097 out:
5098         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5099         ++vcpu->stat.hypercalls;
5100         return r;
5101 }
5102 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5103
5104 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5105 {
5106         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5107         char instruction[3];
5108         unsigned long rip = kvm_rip_read(vcpu);
5109
5110         /*
5111          * Blow out the MMU to ensure that no other VCPU has an active mapping
5112          * to ensure that the updated hypercall appears atomically across all
5113          * VCPUs.
5114          */
5115         kvm_mmu_zap_all(vcpu->kvm);
5116
5117         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5118
5119         return emulator_write_emulated(&vcpu->arch.emulate_ctxt,
5120                                        rip, instruction, 3, NULL);
5121 }
5122
5123 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5124 {
5125         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5126         int j, nent = vcpu->arch.cpuid_nent;
5127
5128         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5129         /* when no next entry is found, the current entry[i] is reselected */
5130         for (j = i + 1; ; j = (j + 1) % nent) {
5131                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5132                 if (ej->function == e->function) {
5133                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5134                         return j;
5135                 }
5136         }
5137         return 0; /* silence gcc, even though control never reaches here */
5138 }
5139
5140 /* find an entry with matching function, matching index (if needed), and that
5141  * should be read next (if it's stateful) */
5142 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5143         u32 function, u32 index)
5144 {
5145         if (e->function != function)
5146                 return 0;
5147         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5148                 return 0;
5149         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5150             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5151                 return 0;
5152         return 1;
5153 }
5154
5155 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5156                                               u32 function, u32 index)
5157 {
5158         int i;
5159         struct kvm_cpuid_entry2 *best = NULL;
5160
5161         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5162                 struct kvm_cpuid_entry2 *e;
5163
5164                 e = &vcpu->arch.cpuid_entries[i];
5165                 if (is_matching_cpuid_entry(e, function, index)) {
5166                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5167                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5168                         best = e;
5169                         break;
5170                 }
5171         }
5172         return best;
5173 }
5174 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5175
5176 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5177 {
5178         struct kvm_cpuid_entry2 *best;
5179
5180         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5181         if (!best || best->eax < 0x80000008)
5182                 goto not_found;
5183         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5184         if (best)
5185                 return best->eax & 0xff;
5186 not_found:
5187         return 36;
5188 }
5189
5190 /*
5191  * If no match is found, check whether we exceed the vCPU's limit
5192  * and return the content of the highest valid _standard_ leaf instead.
5193  * This is to satisfy the CPUID specification.
5194  */
5195 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5196                                                   u32 function, u32 index)
5197 {
5198         struct kvm_cpuid_entry2 *maxlevel;
5199
5200         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5201         if (!maxlevel || maxlevel->eax >= function)
5202                 return NULL;
5203         if (function & 0x80000000) {
5204                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5205                 if (!maxlevel)
5206                         return NULL;
5207         }
5208         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5209 }
5210
5211 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5212 {
5213         u32 function, index;
5214         struct kvm_cpuid_entry2 *best;
5215
5216         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5217         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5218         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5219         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5220         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5221         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5222         best = kvm_find_cpuid_entry(vcpu, function, index);
5223
5224         if (!best)
5225                 best = check_cpuid_limit(vcpu, function, index);
5226
5227         if (best) {
5228                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5229                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5230                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5231                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5232         }
5233         kvm_x86_ops->skip_emulated_instruction(vcpu);
5234         trace_kvm_cpuid(function,
5235                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5236                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5237                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5238                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5239 }
5240 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5241
5242 /*
5243  * Check if userspace requested an interrupt window, and that the
5244  * interrupt window is open.
5245  *
5246  * No need to exit to userspace if we already have an interrupt queued.
5247  */
5248 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5249 {
5250         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5251                 vcpu->run->request_interrupt_window &&
5252                 kvm_arch_interrupt_allowed(vcpu));
5253 }
5254
5255 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5256 {
5257         struct kvm_run *kvm_run = vcpu->run;
5258
5259         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5260         kvm_run->cr8 = kvm_get_cr8(vcpu);
5261         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5262         if (irqchip_in_kernel(vcpu->kvm))
5263                 kvm_run->ready_for_interrupt_injection = 1;
5264         else
5265                 kvm_run->ready_for_interrupt_injection =
5266                         kvm_arch_interrupt_allowed(vcpu) &&
5267                         !kvm_cpu_has_interrupt(vcpu) &&
5268                         !kvm_event_needs_reinjection(vcpu);
5269 }
5270
5271 static void vapic_enter(struct kvm_vcpu *vcpu)
5272 {
5273         struct kvm_lapic *apic = vcpu->arch.apic;
5274         struct page *page;
5275
5276         if (!apic || !apic->vapic_addr)
5277                 return;
5278
5279         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5280
5281         vcpu->arch.apic->vapic_page = page;
5282 }
5283
5284 static void vapic_exit(struct kvm_vcpu *vcpu)
5285 {
5286         struct kvm_lapic *apic = vcpu->arch.apic;
5287         int idx;
5288
5289         if (!apic || !apic->vapic_addr)
5290                 return;
5291
5292         idx = srcu_read_lock(&vcpu->kvm->srcu);
5293         kvm_release_page_dirty(apic->vapic_page);
5294         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5295         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5296 }
5297
5298 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5299 {
5300         int max_irr, tpr;
5301
5302         if (!kvm_x86_ops->update_cr8_intercept)
5303                 return;
5304
5305         if (!vcpu->arch.apic)
5306                 return;
5307
5308         if (!vcpu->arch.apic->vapic_addr)
5309                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5310         else
5311                 max_irr = -1;
5312
5313         if (max_irr != -1)
5314                 max_irr >>= 4;
5315
5316         tpr = kvm_lapic_get_cr8(vcpu);
5317
5318         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5319 }
5320
5321 static void inject_pending_event(struct kvm_vcpu *vcpu)
5322 {
5323         /* try to reinject previous events if any */
5324         if (vcpu->arch.exception.pending) {
5325                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5326                                         vcpu->arch.exception.has_error_code,
5327                                         vcpu->arch.exception.error_code);
5328                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5329                                           vcpu->arch.exception.has_error_code,
5330                                           vcpu->arch.exception.error_code,
5331                                           vcpu->arch.exception.reinject);
5332                 return;
5333         }
5334
5335         if (vcpu->arch.nmi_injected) {
5336                 kvm_x86_ops->set_nmi(vcpu);
5337                 return;
5338         }
5339
5340         if (vcpu->arch.interrupt.pending) {
5341                 kvm_x86_ops->set_irq(vcpu);
5342                 return;
5343         }
5344
5345         /* try to inject new event if pending */
5346         if (vcpu->arch.nmi_pending) {
5347                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5348                         vcpu->arch.nmi_pending = false;
5349                         vcpu->arch.nmi_injected = true;
5350                         kvm_x86_ops->set_nmi(vcpu);
5351                 }
5352         } else if (kvm_cpu_has_interrupt(vcpu)) {
5353                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5354                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5355                                             false);
5356                         kvm_x86_ops->set_irq(vcpu);
5357                 }
5358         }
5359 }
5360
5361 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5362 {
5363         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5364                         !vcpu->guest_xcr0_loaded) {
5365                 /* kvm_set_xcr() also depends on this */
5366                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5367                 vcpu->guest_xcr0_loaded = 1;
5368         }
5369 }
5370
5371 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5372 {
5373         if (vcpu->guest_xcr0_loaded) {
5374                 if (vcpu->arch.xcr0 != host_xcr0)
5375                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5376                 vcpu->guest_xcr0_loaded = 0;
5377         }
5378 }
5379
5380 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5381 {
5382         int r;
5383         bool nmi_pending;
5384         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5385                 vcpu->run->request_interrupt_window;
5386
5387         if (vcpu->requests) {
5388                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5389                         kvm_mmu_unload(vcpu);
5390                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5391                         __kvm_migrate_timers(vcpu);
5392                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5393                         r = kvm_guest_time_update(vcpu);
5394                         if (unlikely(r))
5395                                 goto out;
5396                 }
5397                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5398                         kvm_mmu_sync_roots(vcpu);
5399                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5400                         kvm_x86_ops->tlb_flush(vcpu);
5401                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5402                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5403                         r = 0;
5404                         goto out;
5405                 }
5406                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5407                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5408                         r = 0;
5409                         goto out;
5410                 }
5411                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5412                         vcpu->fpu_active = 0;
5413                         kvm_x86_ops->fpu_deactivate(vcpu);
5414                 }
5415                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5416                         /* Page is swapped out. Do synthetic halt */
5417                         vcpu->arch.apf.halted = true;
5418                         r = 1;
5419                         goto out;
5420                 }
5421         }
5422
5423         r = kvm_mmu_reload(vcpu);
5424         if (unlikely(r))
5425                 goto out;
5426
5427         /*
5428          * An NMI can be injected between local nmi_pending read and
5429          * vcpu->arch.nmi_pending read inside inject_pending_event().
5430          * But in that case, KVM_REQ_EVENT will be set, which makes
5431          * the race described above benign.
5432          */
5433         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5434
5435         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5436                 inject_pending_event(vcpu);
5437
5438                 /* enable NMI/IRQ window open exits if needed */
5439                 if (nmi_pending)
5440                         kvm_x86_ops->enable_nmi_window(vcpu);
5441                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5442                         kvm_x86_ops->enable_irq_window(vcpu);
5443
5444                 if (kvm_lapic_enabled(vcpu)) {
5445                         update_cr8_intercept(vcpu);
5446                         kvm_lapic_sync_to_vapic(vcpu);
5447                 }
5448         }
5449
5450         preempt_disable();
5451
5452         kvm_x86_ops->prepare_guest_switch(vcpu);
5453         if (vcpu->fpu_active)
5454                 kvm_load_guest_fpu(vcpu);
5455         kvm_load_guest_xcr0(vcpu);
5456
5457         vcpu->mode = IN_GUEST_MODE;
5458
5459         /* We should set ->mode before check ->requests,
5460          * see the comment in make_all_cpus_request.
5461          */
5462         smp_mb();
5463
5464         local_irq_disable();
5465
5466         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5467             || need_resched() || signal_pending(current)) {
5468                 vcpu->mode = OUTSIDE_GUEST_MODE;
5469                 smp_wmb();
5470                 local_irq_enable();
5471                 preempt_enable();
5472                 kvm_x86_ops->cancel_injection(vcpu);
5473                 r = 1;
5474                 goto out;
5475         }
5476
5477         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5478
5479         kvm_guest_enter();
5480
5481         if (unlikely(vcpu->arch.switch_db_regs)) {
5482                 set_debugreg(0, 7);
5483                 set_debugreg(vcpu->arch.eff_db[0], 0);
5484                 set_debugreg(vcpu->arch.eff_db[1], 1);
5485                 set_debugreg(vcpu->arch.eff_db[2], 2);
5486                 set_debugreg(vcpu->arch.eff_db[3], 3);
5487         }
5488
5489         trace_kvm_entry(vcpu->vcpu_id);
5490         kvm_x86_ops->run(vcpu);
5491
5492         /*
5493          * If the guest has used debug registers, at least dr7
5494          * will be disabled while returning to the host.
5495          * If we don't have active breakpoints in the host, we don't
5496          * care about the messed up debug address registers. But if
5497          * we have some of them active, restore the old state.
5498          */
5499         if (hw_breakpoint_active())
5500                 hw_breakpoint_restore();
5501
5502         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5503
5504         vcpu->mode = OUTSIDE_GUEST_MODE;
5505         smp_wmb();
5506         local_irq_enable();
5507
5508         ++vcpu->stat.exits;
5509
5510         /*
5511          * We must have an instruction between local_irq_enable() and
5512          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5513          * the interrupt shadow.  The stat.exits increment will do nicely.
5514          * But we need to prevent reordering, hence this barrier():
5515          */
5516         barrier();
5517
5518         kvm_guest_exit();
5519
5520         preempt_enable();
5521
5522         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5523
5524         /*
5525          * Profile KVM exit RIPs:
5526          */
5527         if (unlikely(prof_on == KVM_PROFILING)) {
5528                 unsigned long rip = kvm_rip_read(vcpu);
5529                 profile_hit(KVM_PROFILING, (void *)rip);
5530         }
5531
5532
5533         kvm_lapic_sync_from_vapic(vcpu);
5534
5535         r = kvm_x86_ops->handle_exit(vcpu);
5536 out:
5537         return r;
5538 }
5539
5540
5541 static int __vcpu_run(struct kvm_vcpu *vcpu)
5542 {
5543         int r;
5544         struct kvm *kvm = vcpu->kvm;
5545
5546         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5547                 pr_debug("vcpu %d received sipi with vector # %x\n",
5548                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5549                 kvm_lapic_reset(vcpu);
5550                 r = kvm_arch_vcpu_reset(vcpu);
5551                 if (r)
5552                         return r;
5553                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5554         }
5555
5556         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5557         vapic_enter(vcpu);
5558
5559         r = 1;
5560         while (r > 0) {
5561                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5562                     !vcpu->arch.apf.halted)
5563                         r = vcpu_enter_guest(vcpu);
5564                 else {
5565                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5566                         kvm_vcpu_block(vcpu);
5567                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5568                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5569                         {
5570                                 switch(vcpu->arch.mp_state) {
5571                                 case KVM_MP_STATE_HALTED:
5572                                         vcpu->arch.mp_state =
5573                                                 KVM_MP_STATE_RUNNABLE;
5574                                 case KVM_MP_STATE_RUNNABLE:
5575                                         vcpu->arch.apf.halted = false;
5576                                         break;
5577                                 case KVM_MP_STATE_SIPI_RECEIVED:
5578                                 default:
5579                                         r = -EINTR;
5580                                         break;
5581                                 }
5582                         }
5583                 }
5584
5585                 if (r <= 0)
5586                         break;
5587
5588                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5589                 if (kvm_cpu_has_pending_timer(vcpu))
5590                         kvm_inject_pending_timer_irqs(vcpu);
5591
5592                 if (dm_request_for_irq_injection(vcpu)) {
5593                         r = -EINTR;
5594                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5595                         ++vcpu->stat.request_irq_exits;
5596                 }
5597
5598                 kvm_check_async_pf_completion(vcpu);
5599
5600                 if (signal_pending(current)) {
5601                         r = -EINTR;
5602                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5603                         ++vcpu->stat.signal_exits;
5604                 }
5605                 if (need_resched()) {
5606                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5607                         kvm_resched(vcpu);
5608                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5609                 }
5610         }
5611
5612         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5613
5614         vapic_exit(vcpu);
5615
5616         return r;
5617 }
5618
5619 static int complete_mmio(struct kvm_vcpu *vcpu)
5620 {
5621         struct kvm_run *run = vcpu->run;
5622         int r;
5623
5624         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5625                 return 1;
5626
5627         if (vcpu->mmio_needed) {
5628                 vcpu->mmio_needed = 0;
5629                 if (!vcpu->mmio_is_write)
5630                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5631                                run->mmio.data, 8);
5632                 vcpu->mmio_index += 8;
5633                 if (vcpu->mmio_index < vcpu->mmio_size) {
5634                         run->exit_reason = KVM_EXIT_MMIO;
5635                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5636                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5637                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5638                         run->mmio.is_write = vcpu->mmio_is_write;
5639                         vcpu->mmio_needed = 1;
5640                         return 0;
5641                 }
5642                 if (vcpu->mmio_is_write)
5643                         return 1;
5644                 vcpu->mmio_read_completed = 1;
5645         }
5646         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5647         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5648         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5649         if (r != EMULATE_DONE)
5650                 return 0;
5651         return 1;
5652 }
5653
5654 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5655 {
5656         int r;
5657         sigset_t sigsaved;
5658
5659         if (!tsk_used_math(current) && init_fpu(current))
5660                 return -ENOMEM;
5661
5662         if (vcpu->sigset_active)
5663                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5664
5665         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5666                 kvm_vcpu_block(vcpu);
5667                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5668                 r = -EAGAIN;
5669                 goto out;
5670         }
5671
5672         /* re-sync apic's tpr */
5673         if (!irqchip_in_kernel(vcpu->kvm)) {
5674                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5675                         r = -EINVAL;
5676                         goto out;
5677                 }
5678         }
5679
5680         r = complete_mmio(vcpu);
5681         if (r <= 0)
5682                 goto out;
5683
5684         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5685                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5686                                      kvm_run->hypercall.ret);
5687
5688         r = __vcpu_run(vcpu);
5689
5690 out:
5691         post_kvm_run_save(vcpu);
5692         if (vcpu->sigset_active)
5693                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5694
5695         return r;
5696 }
5697
5698 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5699 {
5700         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5701                 /*
5702                  * We are here if userspace calls get_regs() in the middle of
5703                  * instruction emulation. Registers state needs to be copied
5704                  * back from emulation context to vcpu. Usrapace shouldn't do
5705                  * that usually, but some bad designed PV devices (vmware
5706                  * backdoor interface) need this to work
5707                  */
5708                 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5709                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5710                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5711         }
5712         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5713         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5714         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5715         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5716         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5717         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5718         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5719         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5720 #ifdef CONFIG_X86_64
5721         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5722         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5723         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5724         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5725         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5726         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5727         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5728         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5729 #endif
5730
5731         regs->rip = kvm_rip_read(vcpu);
5732         regs->rflags = kvm_get_rflags(vcpu);
5733
5734         return 0;
5735 }
5736
5737 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5738 {
5739         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5740         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5741
5742         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5743         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5744         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5745         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5746         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5747         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5748         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5749         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5750 #ifdef CONFIG_X86_64
5751         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5752         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5753         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5754         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5755         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5756         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5757         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5758         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5759 #endif
5760
5761         kvm_rip_write(vcpu, regs->rip);
5762         kvm_set_rflags(vcpu, regs->rflags);
5763
5764         vcpu->arch.exception.pending = false;
5765
5766         kvm_make_request(KVM_REQ_EVENT, vcpu);
5767
5768         return 0;
5769 }
5770
5771 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5772 {
5773         struct kvm_segment cs;
5774
5775         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5776         *db = cs.db;
5777         *l = cs.l;
5778 }
5779 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5780
5781 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5782                                   struct kvm_sregs *sregs)
5783 {
5784         struct desc_ptr dt;
5785
5786         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5787         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5788         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5789         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5790         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5791         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5792
5793         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5794         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5795
5796         kvm_x86_ops->get_idt(vcpu, &dt);
5797         sregs->idt.limit = dt.size;
5798         sregs->idt.base = dt.address;
5799         kvm_x86_ops->get_gdt(vcpu, &dt);
5800         sregs->gdt.limit = dt.size;
5801         sregs->gdt.base = dt.address;
5802
5803         sregs->cr0 = kvm_read_cr0(vcpu);
5804         sregs->cr2 = vcpu->arch.cr2;
5805         sregs->cr3 = kvm_read_cr3(vcpu);
5806         sregs->cr4 = kvm_read_cr4(vcpu);
5807         sregs->cr8 = kvm_get_cr8(vcpu);
5808         sregs->efer = vcpu->arch.efer;
5809         sregs->apic_base = kvm_get_apic_base(vcpu);
5810
5811         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5812
5813         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5814                 set_bit(vcpu->arch.interrupt.nr,
5815                         (unsigned long *)sregs->interrupt_bitmap);
5816
5817         return 0;
5818 }
5819
5820 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5821                                     struct kvm_mp_state *mp_state)
5822 {
5823         mp_state->mp_state = vcpu->arch.mp_state;
5824         return 0;
5825 }
5826
5827 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5828                                     struct kvm_mp_state *mp_state)
5829 {
5830         vcpu->arch.mp_state = mp_state->mp_state;
5831         kvm_make_request(KVM_REQ_EVENT, vcpu);
5832         return 0;
5833 }
5834
5835 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5836                     bool has_error_code, u32 error_code)
5837 {
5838         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5839         int ret;
5840
5841         init_emulate_ctxt(vcpu);
5842
5843         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5844                                    tss_selector, reason, has_error_code,
5845                                    error_code);
5846
5847         if (ret)
5848                 return EMULATE_FAIL;
5849
5850         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5851         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5852         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5853         kvm_make_request(KVM_REQ_EVENT, vcpu);
5854         return EMULATE_DONE;
5855 }
5856 EXPORT_SYMBOL_GPL(kvm_task_switch);
5857
5858 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5859                                   struct kvm_sregs *sregs)
5860 {
5861         int mmu_reset_needed = 0;
5862         int pending_vec, max_bits, idx;
5863         struct desc_ptr dt;
5864
5865         dt.size = sregs->idt.limit;
5866         dt.address = sregs->idt.base;
5867         kvm_x86_ops->set_idt(vcpu, &dt);
5868         dt.size = sregs->gdt.limit;
5869         dt.address = sregs->gdt.base;
5870         kvm_x86_ops->set_gdt(vcpu, &dt);
5871
5872         vcpu->arch.cr2 = sregs->cr2;
5873         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5874         vcpu->arch.cr3 = sregs->cr3;
5875         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5876
5877         kvm_set_cr8(vcpu, sregs->cr8);
5878
5879         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5880         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5881         kvm_set_apic_base(vcpu, sregs->apic_base);
5882
5883         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5884         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5885         vcpu->arch.cr0 = sregs->cr0;
5886
5887         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5888         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5889         if (sregs->cr4 & X86_CR4_OSXSAVE)
5890                 update_cpuid(vcpu);
5891
5892         idx = srcu_read_lock(&vcpu->kvm->srcu);
5893         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5894                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5895                 mmu_reset_needed = 1;
5896         }
5897         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5898
5899         if (mmu_reset_needed)
5900                 kvm_mmu_reset_context(vcpu);
5901
5902         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5903         pending_vec = find_first_bit(
5904                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5905         if (pending_vec < max_bits) {
5906                 kvm_queue_interrupt(vcpu, pending_vec, false);
5907                 pr_debug("Set back pending irq %d\n", pending_vec);
5908         }
5909
5910         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5911         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5912         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5913         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5914         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5915         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5916
5917         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5918         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5919
5920         update_cr8_intercept(vcpu);
5921
5922         /* Older userspace won't unhalt the vcpu on reset. */
5923         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5924             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5925             !is_protmode(vcpu))
5926                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5927
5928         kvm_make_request(KVM_REQ_EVENT, vcpu);
5929
5930         return 0;
5931 }
5932
5933 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5934                                         struct kvm_guest_debug *dbg)
5935 {
5936         unsigned long rflags;
5937         int i, r;
5938
5939         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5940                 r = -EBUSY;
5941                 if (vcpu->arch.exception.pending)
5942                         goto out;
5943                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5944                         kvm_queue_exception(vcpu, DB_VECTOR);
5945                 else
5946                         kvm_queue_exception(vcpu, BP_VECTOR);
5947         }
5948
5949         /*
5950          * Read rflags as long as potentially injected trace flags are still
5951          * filtered out.
5952          */
5953         rflags = kvm_get_rflags(vcpu);
5954
5955         vcpu->guest_debug = dbg->control;
5956         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5957                 vcpu->guest_debug = 0;
5958
5959         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5960                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5961                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5962                 vcpu->arch.switch_db_regs =
5963                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5964         } else {
5965                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5966                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5967                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5968         }
5969
5970         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5971                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5972                         get_segment_base(vcpu, VCPU_SREG_CS);
5973
5974         /*
5975          * Trigger an rflags update that will inject or remove the trace
5976          * flags.
5977          */
5978         kvm_set_rflags(vcpu, rflags);
5979
5980         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5981
5982         r = 0;
5983
5984 out:
5985
5986         return r;
5987 }
5988
5989 /*
5990  * Translate a guest virtual address to a guest physical address.
5991  */
5992 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5993                                     struct kvm_translation *tr)
5994 {
5995         unsigned long vaddr = tr->linear_address;
5996         gpa_t gpa;
5997         int idx;
5998
5999         idx = srcu_read_lock(&vcpu->kvm->srcu);
6000         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6001         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6002         tr->physical_address = gpa;
6003         tr->valid = gpa != UNMAPPED_GVA;
6004         tr->writeable = 1;
6005         tr->usermode = 0;
6006
6007         return 0;
6008 }
6009
6010 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6011 {
6012         struct i387_fxsave_struct *fxsave =
6013                         &vcpu->arch.guest_fpu.state->fxsave;
6014
6015         memcpy(fpu->fpr, fxsave->st_space, 128);
6016         fpu->fcw = fxsave->cwd;
6017         fpu->fsw = fxsave->swd;
6018         fpu->ftwx = fxsave->twd;
6019         fpu->last_opcode = fxsave->fop;
6020         fpu->last_ip = fxsave->rip;
6021         fpu->last_dp = fxsave->rdp;
6022         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6023
6024         return 0;
6025 }
6026
6027 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6028 {
6029         struct i387_fxsave_struct *fxsave =
6030                         &vcpu->arch.guest_fpu.state->fxsave;
6031
6032         memcpy(fxsave->st_space, fpu->fpr, 128);
6033         fxsave->cwd = fpu->fcw;
6034         fxsave->swd = fpu->fsw;
6035         fxsave->twd = fpu->ftwx;
6036         fxsave->fop = fpu->last_opcode;
6037         fxsave->rip = fpu->last_ip;
6038         fxsave->rdp = fpu->last_dp;
6039         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6040
6041         return 0;
6042 }
6043
6044 int fx_init(struct kvm_vcpu *vcpu)
6045 {
6046         int err;
6047
6048         err = fpu_alloc(&vcpu->arch.guest_fpu);
6049         if (err)
6050                 return err;
6051
6052         fpu_finit(&vcpu->arch.guest_fpu);
6053
6054         /*
6055          * Ensure guest xcr0 is valid for loading
6056          */
6057         vcpu->arch.xcr0 = XSTATE_FP;
6058
6059         vcpu->arch.cr0 |= X86_CR0_ET;
6060
6061         return 0;
6062 }
6063 EXPORT_SYMBOL_GPL(fx_init);
6064
6065 static void fx_free(struct kvm_vcpu *vcpu)
6066 {
6067         fpu_free(&vcpu->arch.guest_fpu);
6068 }
6069
6070 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6071 {
6072         if (vcpu->guest_fpu_loaded)
6073                 return;
6074
6075         /*
6076          * Restore all possible states in the guest,
6077          * and assume host would use all available bits.
6078          * Guest xcr0 would be loaded later.
6079          */
6080         kvm_put_guest_xcr0(vcpu);
6081         vcpu->guest_fpu_loaded = 1;
6082         unlazy_fpu(current);
6083         fpu_restore_checking(&vcpu->arch.guest_fpu);
6084         trace_kvm_fpu(1);
6085 }
6086
6087 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6088 {
6089         kvm_put_guest_xcr0(vcpu);
6090
6091         if (!vcpu->guest_fpu_loaded)
6092                 return;
6093
6094         vcpu->guest_fpu_loaded = 0;
6095         fpu_save_init(&vcpu->arch.guest_fpu);
6096         ++vcpu->stat.fpu_reload;
6097         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6098         trace_kvm_fpu(0);
6099 }
6100
6101 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6102 {
6103         kvmclock_reset(vcpu);
6104
6105         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6106         fx_free(vcpu);
6107         kvm_x86_ops->vcpu_free(vcpu);
6108 }
6109
6110 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6111                                                 unsigned int id)
6112 {
6113         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6114                 printk_once(KERN_WARNING
6115                 "kvm: SMP vm created on host with unstable TSC; "
6116                 "guest TSC will not be reliable\n");
6117         return kvm_x86_ops->vcpu_create(kvm, id);
6118 }
6119
6120 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6121 {
6122         int r;
6123
6124         vcpu->arch.mtrr_state.have_fixed = 1;
6125         vcpu_load(vcpu);
6126         r = kvm_arch_vcpu_reset(vcpu);
6127         if (r == 0)
6128                 r = kvm_mmu_setup(vcpu);
6129         vcpu_put(vcpu);
6130
6131         return r;
6132 }
6133
6134 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6135 {
6136         vcpu->arch.apf.msr_val = 0;
6137
6138         vcpu_load(vcpu);
6139         kvm_mmu_unload(vcpu);
6140         vcpu_put(vcpu);
6141
6142         fx_free(vcpu);
6143         kvm_x86_ops->vcpu_free(vcpu);
6144 }
6145
6146 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6147 {
6148         vcpu->arch.nmi_pending = false;
6149         vcpu->arch.nmi_injected = false;
6150
6151         vcpu->arch.switch_db_regs = 0;
6152         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6153         vcpu->arch.dr6 = DR6_FIXED_1;
6154         vcpu->arch.dr7 = DR7_FIXED_1;
6155
6156         kvm_make_request(KVM_REQ_EVENT, vcpu);
6157         vcpu->arch.apf.msr_val = 0;
6158
6159         kvmclock_reset(vcpu);
6160
6161         kvm_clear_async_pf_completion_queue(vcpu);
6162         kvm_async_pf_hash_reset(vcpu);
6163         vcpu->arch.apf.halted = false;
6164
6165         return kvm_x86_ops->vcpu_reset(vcpu);
6166 }
6167
6168 int kvm_arch_hardware_enable(void *garbage)
6169 {
6170         struct kvm *kvm;
6171         struct kvm_vcpu *vcpu;
6172         int i;
6173
6174         kvm_shared_msr_cpu_online();
6175         list_for_each_entry(kvm, &vm_list, vm_list)
6176                 kvm_for_each_vcpu(i, vcpu, kvm)
6177                         if (vcpu->cpu == smp_processor_id())
6178                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6179         return kvm_x86_ops->hardware_enable(garbage);
6180 }
6181
6182 void kvm_arch_hardware_disable(void *garbage)
6183 {
6184         kvm_x86_ops->hardware_disable(garbage);
6185         drop_user_return_notifiers(garbage);
6186 }
6187
6188 int kvm_arch_hardware_setup(void)
6189 {
6190         return kvm_x86_ops->hardware_setup();
6191 }
6192
6193 void kvm_arch_hardware_unsetup(void)
6194 {
6195         kvm_x86_ops->hardware_unsetup();
6196 }
6197
6198 void kvm_arch_check_processor_compat(void *rtn)
6199 {
6200         kvm_x86_ops->check_processor_compatibility(rtn);
6201 }
6202
6203 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6204 {
6205         struct page *page;
6206         struct kvm *kvm;
6207         int r;
6208
6209         BUG_ON(vcpu->kvm == NULL);
6210         kvm = vcpu->kvm;
6211
6212         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6213         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6214         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6215         vcpu->arch.mmu.translate_gpa = translate_gpa;
6216         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6217         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6218                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6219         else
6220                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6221
6222         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6223         if (!page) {
6224                 r = -ENOMEM;
6225                 goto fail;
6226         }
6227         vcpu->arch.pio_data = page_address(page);
6228
6229         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6230
6231         r = kvm_mmu_create(vcpu);
6232         if (r < 0)
6233                 goto fail_free_pio_data;
6234
6235         if (irqchip_in_kernel(kvm)) {
6236                 r = kvm_create_lapic(vcpu);
6237                 if (r < 0)
6238                         goto fail_mmu_destroy;
6239         }
6240
6241         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6242                                        GFP_KERNEL);
6243         if (!vcpu->arch.mce_banks) {
6244                 r = -ENOMEM;
6245                 goto fail_free_lapic;
6246         }
6247         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6248
6249         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6250                 goto fail_free_mce_banks;
6251
6252         kvm_async_pf_hash_reset(vcpu);
6253
6254         return 0;
6255 fail_free_mce_banks:
6256         kfree(vcpu->arch.mce_banks);
6257 fail_free_lapic:
6258         kvm_free_lapic(vcpu);
6259 fail_mmu_destroy:
6260         kvm_mmu_destroy(vcpu);
6261 fail_free_pio_data:
6262         free_page((unsigned long)vcpu->arch.pio_data);
6263 fail:
6264         return r;
6265 }
6266
6267 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6268 {
6269         int idx;
6270
6271         kfree(vcpu->arch.mce_banks);
6272         kvm_free_lapic(vcpu);
6273         idx = srcu_read_lock(&vcpu->kvm->srcu);
6274         kvm_mmu_destroy(vcpu);
6275         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6276         free_page((unsigned long)vcpu->arch.pio_data);
6277 }
6278
6279 int kvm_arch_init_vm(struct kvm *kvm)
6280 {
6281         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6282         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6283
6284         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6285         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6286
6287         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6288
6289         return 0;
6290 }
6291
6292 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6293 {
6294         vcpu_load(vcpu);
6295         kvm_mmu_unload(vcpu);
6296         vcpu_put(vcpu);
6297 }
6298
6299 static void kvm_free_vcpus(struct kvm *kvm)
6300 {
6301         unsigned int i;
6302         struct kvm_vcpu *vcpu;
6303
6304         /*
6305          * Unpin any mmu pages first.
6306          */
6307         kvm_for_each_vcpu(i, vcpu, kvm) {
6308                 kvm_clear_async_pf_completion_queue(vcpu);
6309                 kvm_unload_vcpu_mmu(vcpu);
6310         }
6311         kvm_for_each_vcpu(i, vcpu, kvm)
6312                 kvm_arch_vcpu_free(vcpu);
6313
6314         mutex_lock(&kvm->lock);
6315         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6316                 kvm->vcpus[i] = NULL;
6317
6318         atomic_set(&kvm->online_vcpus, 0);
6319         mutex_unlock(&kvm->lock);
6320 }
6321
6322 void kvm_arch_sync_events(struct kvm *kvm)
6323 {
6324         kvm_free_all_assigned_devices(kvm);
6325         kvm_free_pit(kvm);
6326 }
6327
6328 void kvm_arch_destroy_vm(struct kvm *kvm)
6329 {
6330         kvm_iommu_unmap_guest(kvm);
6331         kfree(kvm->arch.vpic);
6332         kfree(kvm->arch.vioapic);
6333         kvm_free_vcpus(kvm);
6334         if (kvm->arch.apic_access_page)
6335                 put_page(kvm->arch.apic_access_page);
6336         if (kvm->arch.ept_identity_pagetable)
6337                 put_page(kvm->arch.ept_identity_pagetable);
6338 }
6339
6340 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6341                                 struct kvm_memory_slot *memslot,
6342                                 struct kvm_memory_slot old,
6343                                 struct kvm_userspace_memory_region *mem,
6344                                 int user_alloc)
6345 {
6346         int npages = memslot->npages;
6347         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6348
6349         /* Prevent internal slot pages from being moved by fork()/COW. */
6350         if (memslot->id >= KVM_MEMORY_SLOTS)
6351                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6352
6353         /*To keep backward compatibility with older userspace,
6354          *x86 needs to hanlde !user_alloc case.
6355          */
6356         if (!user_alloc) {
6357                 if (npages && !old.rmap) {
6358                         unsigned long userspace_addr;
6359
6360                         down_write(&current->mm->mmap_sem);
6361                         userspace_addr = do_mmap(NULL, 0,
6362                                                  npages * PAGE_SIZE,
6363                                                  PROT_READ | PROT_WRITE,
6364                                                  map_flags,
6365                                                  0);
6366                         up_write(&current->mm->mmap_sem);
6367
6368                         if (IS_ERR((void *)userspace_addr))
6369                                 return PTR_ERR((void *)userspace_addr);
6370
6371                         memslot->userspace_addr = userspace_addr;
6372                 }
6373         }
6374
6375
6376         return 0;
6377 }
6378
6379 void kvm_arch_commit_memory_region(struct kvm *kvm,
6380                                 struct kvm_userspace_memory_region *mem,
6381                                 struct kvm_memory_slot old,
6382                                 int user_alloc)
6383 {
6384
6385         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6386
6387         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6388                 int ret;
6389
6390                 down_write(&current->mm->mmap_sem);
6391                 ret = do_munmap(current->mm, old.userspace_addr,
6392                                 old.npages * PAGE_SIZE);
6393                 up_write(&current->mm->mmap_sem);
6394                 if (ret < 0)
6395                         printk(KERN_WARNING
6396                                "kvm_vm_ioctl_set_memory_region: "
6397                                "failed to munmap memory\n");
6398         }
6399
6400         if (!kvm->arch.n_requested_mmu_pages)
6401                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6402
6403         spin_lock(&kvm->mmu_lock);
6404         if (nr_mmu_pages)
6405                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6406         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6407         spin_unlock(&kvm->mmu_lock);
6408 }
6409
6410 void kvm_arch_flush_shadow(struct kvm *kvm)
6411 {
6412         kvm_mmu_zap_all(kvm);
6413         kvm_reload_remote_mmus(kvm);
6414 }
6415
6416 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6417 {
6418         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6419                 !vcpu->arch.apf.halted)
6420                 || !list_empty_careful(&vcpu->async_pf.done)
6421                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6422                 || vcpu->arch.nmi_pending ||
6423                 (kvm_arch_interrupt_allowed(vcpu) &&
6424                  kvm_cpu_has_interrupt(vcpu));
6425 }
6426
6427 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6428 {
6429         int me;
6430         int cpu = vcpu->cpu;
6431
6432         if (waitqueue_active(&vcpu->wq)) {
6433                 wake_up_interruptible(&vcpu->wq);
6434                 ++vcpu->stat.halt_wakeup;
6435         }
6436
6437         me = get_cpu();
6438         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6439                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6440                         smp_send_reschedule(cpu);
6441         put_cpu();
6442 }
6443
6444 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6445 {
6446         return kvm_x86_ops->interrupt_allowed(vcpu);
6447 }
6448
6449 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6450 {
6451         unsigned long current_rip = kvm_rip_read(vcpu) +
6452                 get_segment_base(vcpu, VCPU_SREG_CS);
6453
6454         return current_rip == linear_rip;
6455 }
6456 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6457
6458 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6459 {
6460         unsigned long rflags;
6461
6462         rflags = kvm_x86_ops->get_rflags(vcpu);
6463         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6464                 rflags &= ~X86_EFLAGS_TF;
6465         return rflags;
6466 }
6467 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6468
6469 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6470 {
6471         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6472             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6473                 rflags |= X86_EFLAGS_TF;
6474         kvm_x86_ops->set_rflags(vcpu, rflags);
6475         kvm_make_request(KVM_REQ_EVENT, vcpu);
6476 }
6477 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6478
6479 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6480 {
6481         int r;
6482
6483         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6484               is_error_page(work->page))
6485                 return;
6486
6487         r = kvm_mmu_reload(vcpu);
6488         if (unlikely(r))
6489                 return;
6490
6491         if (!vcpu->arch.mmu.direct_map &&
6492               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6493                 return;
6494
6495         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6496 }
6497
6498 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6499 {
6500         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6501 }
6502
6503 static inline u32 kvm_async_pf_next_probe(u32 key)
6504 {
6505         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6506 }
6507
6508 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6509 {
6510         u32 key = kvm_async_pf_hash_fn(gfn);
6511
6512         while (vcpu->arch.apf.gfns[key] != ~0)
6513                 key = kvm_async_pf_next_probe(key);
6514
6515         vcpu->arch.apf.gfns[key] = gfn;
6516 }
6517
6518 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6519 {
6520         int i;
6521         u32 key = kvm_async_pf_hash_fn(gfn);
6522
6523         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6524                      (vcpu->arch.apf.gfns[key] != gfn &&
6525                       vcpu->arch.apf.gfns[key] != ~0); i++)
6526                 key = kvm_async_pf_next_probe(key);
6527
6528         return key;
6529 }
6530
6531 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6532 {
6533         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6534 }
6535
6536 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6537 {
6538         u32 i, j, k;
6539
6540         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6541         while (true) {
6542                 vcpu->arch.apf.gfns[i] = ~0;
6543                 do {
6544                         j = kvm_async_pf_next_probe(j);
6545                         if (vcpu->arch.apf.gfns[j] == ~0)
6546                                 return;
6547                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6548                         /*
6549                          * k lies cyclically in ]i,j]
6550                          * |    i.k.j |
6551                          * |....j i.k.| or  |.k..j i...|
6552                          */
6553                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6554                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6555                 i = j;
6556         }
6557 }
6558
6559 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6560 {
6561
6562         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6563                                       sizeof(val));
6564 }
6565
6566 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6567                                      struct kvm_async_pf *work)
6568 {
6569         struct x86_exception fault;
6570
6571         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6572         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6573
6574         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6575             (vcpu->arch.apf.send_user_only &&
6576              kvm_x86_ops->get_cpl(vcpu) == 0))
6577                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6578         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6579                 fault.vector = PF_VECTOR;
6580                 fault.error_code_valid = true;
6581                 fault.error_code = 0;
6582                 fault.nested_page_fault = false;
6583                 fault.address = work->arch.token;
6584                 kvm_inject_page_fault(vcpu, &fault);
6585         }
6586 }
6587
6588 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6589                                  struct kvm_async_pf *work)
6590 {
6591         struct x86_exception fault;
6592
6593         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6594         if (is_error_page(work->page))
6595                 work->arch.token = ~0; /* broadcast wakeup */
6596         else
6597                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6598
6599         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6600             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6601                 fault.vector = PF_VECTOR;
6602                 fault.error_code_valid = true;
6603                 fault.error_code = 0;
6604                 fault.nested_page_fault = false;
6605                 fault.address = work->arch.token;
6606                 kvm_inject_page_fault(vcpu, &fault);
6607         }
6608         vcpu->arch.apf.halted = false;
6609 }
6610
6611 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6612 {
6613         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6614                 return true;
6615         else
6616                 return !kvm_event_needs_reinjection(vcpu) &&
6617                         kvm_x86_ops->interrupt_allowed(vcpu);
6618 }
6619
6620 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6621 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6622 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6623 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6624 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6625 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6626 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6627 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6628 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6629 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6630 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6631 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);