2 * Copyright (c) 2001-2002 by David Brownell
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
11 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software Foundation,
16 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 /* this file is part of ehci-hcd.c */
21 /*-------------------------------------------------------------------------*/
24 * EHCI hardware queue manipulation ... the core. QH/QTD manipulation.
26 * Control, bulk, and interrupt traffic all use "qh" lists. They list "qtd"
27 * entries describing USB transactions, max 16-20kB/entry (with 4kB-aligned
28 * buffers needed for the larger number). We use one QH per endpoint, queue
29 * multiple urbs (all three types) per endpoint. URBs may need several qtds.
31 * ISO traffic uses "ISO TD" (itd, and sitd) records, and (along with
32 * interrupts) needs careful scheduling. Performance improvements can be
33 * an ongoing challenge. That's in "ehci-sched.c".
35 * USB 1.1 devices are handled (a) by "companion" OHCI or UHCI root hubs,
36 * or otherwise through transaction translators (TTs) in USB 2.0 hubs using
37 * (b) special fields in qh entries or (c) split iso entries. TTs will
38 * buffer low/full speed data so the host collects it at high speed.
41 /*-------------------------------------------------------------------------*/
43 /* fill a qtd, returning how much of the buffer we were able to queue up */
46 qtd_fill (struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
47 int token, int maxpacket)
52 /* one buffer entry per 4K ... first might be short or unaligned */
53 qtd->hw_buf [0] = cpu_to_le32 ((u32)addr);
54 qtd->hw_buf_hi [0] = cpu_to_le32 ((u32)(addr >> 32));
55 count = 0x1000 - (buf & 0x0fff); /* rest of that page */
56 if (likely (len < count)) /* ... iff needed */
62 /* per-qtd limit: from 16K to 20K (best alignment) */
63 for (i = 1; count < len && i < 5; i++) {
65 qtd->hw_buf [i] = cpu_to_le32 ((u32)addr);
66 qtd->hw_buf_hi [i] = cpu_to_le32 ((u32)(addr >> 32));
68 if ((count + 0x1000) < len)
74 /* short packets may only terminate transfers */
76 count -= (count % maxpacket);
78 qtd->hw_token = cpu_to_le32 ((count << 16) | token);
84 /*-------------------------------------------------------------------------*/
86 /* update halted (but potentially linked) qh */
89 qh_update (struct ehci_hcd *ehci, struct ehci_qh *qh, struct ehci_qtd *qtd)
91 qh->hw_qtd_next = QTD_NEXT (qtd->qtd_dma);
92 qh->hw_alt_next = EHCI_LIST_END;
94 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
96 qh->hw_token &= __constant_cpu_to_le32 (QTD_TOGGLE | QTD_STS_PING);
99 /*-------------------------------------------------------------------------*/
101 static void qtd_copy_status (
102 struct ehci_hcd *ehci,
108 /* count IN/OUT bytes, not SETUP (even short packets) */
109 if (likely (QTD_PID (token) != 2))
110 urb->actual_length += length - QTD_LENGTH (token);
112 /* don't modify error codes */
113 if (unlikely (urb->status != -EINPROGRESS))
116 /* force cleanup after short read; not always an error */
117 if (unlikely (IS_SHORT_READ (token)))
118 urb->status = -EREMOTEIO;
120 /* serious "can't proceed" faults reported by the hardware */
121 if (token & QTD_STS_HALT) {
122 if (token & QTD_STS_BABBLE) {
123 /* FIXME "must" disable babbling device's port too */
124 urb->status = -EOVERFLOW;
125 } else if (token & QTD_STS_MMF) {
126 /* fs/ls interrupt xfer missed the complete-split */
127 urb->status = -EPROTO;
128 } else if (token & QTD_STS_DBE) {
129 urb->status = (QTD_PID (token) == 1) /* IN ? */
130 ? -ENOSR /* hc couldn't read data */
131 : -ECOMM; /* hc couldn't write data */
132 } else if (token & QTD_STS_XACT) {
133 /* timeout, bad crc, wrong PID, etc; retried */
134 if (QTD_CERR (token))
135 urb->status = -EPIPE;
137 ehci_dbg (ehci, "devpath %s ep%d%s 3strikes\n",
139 usb_pipeendpoint (urb->pipe),
140 usb_pipein (urb->pipe) ? "in" : "out");
141 urb->status = -EPROTO;
143 /* CERR nonzero + no errors + halt --> stall */
144 } else if (QTD_CERR (token))
145 urb->status = -EPIPE;
147 urb->status = -EPROTO;
150 "dev%d ep%d%s qtd token %08x --> status %d\n",
151 usb_pipedevice (urb->pipe),
152 usb_pipeendpoint (urb->pipe),
153 usb_pipein (urb->pipe) ? "in" : "out",
156 /* stall indicates some recovery action is needed */
157 if (urb->status == -EPIPE) {
158 int pipe = urb->pipe;
160 if (!usb_pipecontrol (pipe))
161 usb_endpoint_halt (urb->dev,
162 usb_pipeendpoint (pipe),
164 if (urb->dev->tt && !usb_pipeint (pipe)) {
166 struct usb_device *tt = urb->dev->tt->hub;
167 dbg ("clear tt %s-%s p%d buffer, a%d ep%d",
168 tt->bus->bus_name, tt->devpath,
169 urb->dev->ttport, urb->dev->devnum,
170 usb_pipeendpoint (pipe));
172 usb_hub_tt_clear_buffer (urb->dev, pipe);
179 ehci_urb_done (struct ehci_hcd *ehci, struct urb *urb, struct pt_regs *regs)
181 if (likely (urb->hcpriv != 0)) {
182 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv;
184 /* S-mask in a QH means it's an interrupt urb */
185 if ((qh->hw_info2 & cpu_to_le32 (0x00ff)) != 0) {
187 /* ... update hc-wide periodic stats (for usbfs) */
188 hcd_to_bus (&ehci->hcd)->bandwidth_int_reqs--;
193 spin_lock (&urb->lock);
195 switch (urb->status) {
196 case -EINPROGRESS: /* success */
199 COUNT (ehci->stats.complete);
201 case -EREMOTEIO: /* fault or normal */
202 if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
204 COUNT (ehci->stats.complete);
206 case -ECONNRESET: /* canceled */
208 COUNT (ehci->stats.unlink);
211 spin_unlock (&urb->lock);
213 /* complete() can reenter this HCD */
214 spin_unlock (&ehci->lock);
215 usb_hcd_giveback_urb (&ehci->hcd, urb, regs);
216 spin_lock (&ehci->lock);
221 * Process and free completed qtds for a qh, returning URBs to drivers.
222 * Chases up to qh->hw_current. Returns number of completions called,
223 * indicating how much "real" work we did.
225 #define HALT_BIT cpu_to_le32(QTD_STS_HALT)
227 qh_completions (struct ehci_hcd *ehci, struct ehci_qh *qh, struct pt_regs *regs)
229 struct ehci_qtd *last = 0, *end = qh->dummy;
230 struct list_head *entry, *tmp;
236 if (unlikely (list_empty (&qh->qtd_list)))
239 /* completions (or tasks on other cpus) must never clobber HALT
240 * till we've gone through and cleaned everything up, even when
241 * they add urbs to this qh's queue or mark them for unlinking.
243 * NOTE: unlinking expects to be done in queue order.
245 state = qh->qh_state;
246 qh->qh_state = QH_STATE_COMPLETING;
247 stopped = (state == QH_STATE_IDLE);
249 /* remove de-activated QTDs from front of queue.
250 * after faults (including short reads), cleanup this urb
251 * then let the queue advance.
252 * if queue is stopped, handles unlinks.
254 list_for_each_safe (entry, tmp, &qh->qtd_list) {
255 struct ehci_qtd *qtd;
259 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
262 /* clean up any state from previous QTD ...*/
264 if (likely (last->urb != urb)) {
265 ehci_urb_done (ehci, last->urb, regs);
268 ehci_qtd_free (ehci, last);
272 /* ignore urbs submitted during completions we reported */
276 /* hardware copies qtd out of qh overlay */
278 token = le32_to_cpu (qtd->hw_token);
280 /* always clean up qtds the hc de-activated */
281 if ((token & QTD_STS_ACTIVE) == 0) {
283 if ((token & QTD_STS_HALT) != 0) {
286 /* magic dummy for some short reads; qh won't advance */
287 } else if (IS_SHORT_READ (token)
288 && (qh->hw_alt_next & QTD_MASK)
289 == ehci->async->hw_alt_next) {
294 /* stop scanning when we reach qtds the hc is using */
295 } else if (likely (!stopped
296 && HCD_IS_RUNNING (ehci->hcd.state))) {
302 /* ignore active urbs unless some previous qtd
303 * for the urb faulted (including short read) or
304 * its urb was canceled. we may patch qh or qtds.
306 if (likely (urb->status == -EINPROGRESS))
309 /* issue status after short control reads */
310 if (unlikely (do_status != 0)
311 && QTD_PID (token) == 0 /* OUT */) {
316 /* token in overlay may be most current */
317 if (state == QH_STATE_IDLE
318 && cpu_to_le32 (qtd->qtd_dma)
320 token = le32_to_cpu (qh->hw_token);
322 /* force halt for unlinked or blocked qh, so we'll
323 * patch the qh later and so that completions can't
324 * activate it while we "know" it's stopped.
326 if ((HALT_BIT & qh->hw_token) == 0) {
328 qh->hw_token |= HALT_BIT;
333 /* remove it from the queue */
334 spin_lock (&urb->lock);
335 qtd_copy_status (ehci, urb, qtd->length, token);
336 do_status = (urb->status == -EREMOTEIO)
337 && usb_pipecontrol (urb->pipe);
338 spin_unlock (&urb->lock);
340 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
341 last = list_entry (qtd->qtd_list.prev,
342 struct ehci_qtd, qtd_list);
343 last->hw_next = qtd->hw_next;
345 list_del (&qtd->qtd_list);
349 /* last urb's completion might still need calling */
350 if (likely (last != 0)) {
351 ehci_urb_done (ehci, last->urb, regs);
353 ehci_qtd_free (ehci, last);
356 /* restore original state; caller must unlink or relink */
357 qh->qh_state = state;
359 /* update qh after fault cleanup */
360 if (unlikely (stopped != 0)
361 /* some EHCI 0.95 impls will overlay dummy qtds */
362 || qh->hw_qtd_next == EHCI_LIST_END) {
363 if (list_empty (&qh->qtd_list))
366 end = list_entry (qh->qtd_list.next,
367 struct ehci_qtd, qtd_list);
368 /* first qtd may already be partially processed */
369 if (cpu_to_le32 (end->qtd_dma) == qh->hw_current)
373 qh_update (ehci, qh, end);
380 /*-------------------------------------------------------------------------*/
383 * reverse of qh_urb_transaction: free a list of TDs.
384 * used for cleanup after errors, before HC sees an URB's TDs.
386 static void qtd_list_free (
387 struct ehci_hcd *ehci,
389 struct list_head *qtd_list
391 struct list_head *entry, *temp;
393 list_for_each_safe (entry, temp, qtd_list) {
394 struct ehci_qtd *qtd;
396 qtd = list_entry (entry, struct ehci_qtd, qtd_list);
397 list_del (&qtd->qtd_list);
398 ehci_qtd_free (ehci, qtd);
403 * create a list of filled qtds for this URB; won't link into qh.
405 static struct list_head *
407 struct ehci_hcd *ehci,
409 struct list_head *head,
412 struct ehci_qtd *qtd, *qtd_prev;
419 * URBs map to sequences of QTDs: one logical transaction
421 qtd = ehci_qtd_alloc (ehci, flags);
424 list_add_tail (&qtd->qtd_list, head);
427 token = QTD_STS_ACTIVE;
428 token |= (EHCI_TUNE_CERR << 10);
429 /* for split transactions, SplitXState initialized to zero */
431 len = urb->transfer_buffer_length;
432 is_input = usb_pipein (urb->pipe);
433 if (usb_pipecontrol (urb->pipe)) {
435 qtd_fill (qtd, urb->setup_dma, sizeof (struct usb_ctrlrequest),
436 token | (2 /* "setup" */ << 8), 8);
438 /* ... and always at least one more pid */
441 qtd = ehci_qtd_alloc (ehci, flags);
445 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
446 list_add_tail (&qtd->qtd_list, head);
450 * data transfer stage: buffer setup
452 if (likely (len > 0))
453 buf = urb->transfer_dma;
457 // FIXME this 'buf' check break some zlps...
458 if (!buf || is_input)
459 token |= (1 /* "in" */ << 8);
460 /* else it's already initted to "out" pid (0 << 8) */
462 maxpacket = usb_maxpacket (urb->dev, urb->pipe, !is_input) & 0x03ff;
465 * buffer gets wrapped in one or more qtds;
466 * last one may be "short" (including zero len)
467 * and may serve as a control status ack
472 this_qtd_len = qtd_fill (qtd, buf, len, token, maxpacket);
476 qtd->hw_alt_next = ehci->async->hw_alt_next;
478 /* qh makes control packets use qtd toggle; maybe switch it */
479 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
482 if (likely (len <= 0))
486 qtd = ehci_qtd_alloc (ehci, flags);
490 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
491 list_add_tail (&qtd->qtd_list, head);
494 /* unless the bulk/interrupt caller wants a chance to clean
495 * up after short reads, hc should advance qh past this urb
497 if (likely ((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
498 || usb_pipecontrol (urb->pipe)))
499 qtd->hw_alt_next = EHCI_LIST_END;
502 * control requests may need a terminating data "status" ack;
503 * bulk ones may need a terminating short packet (zero length).
505 if (likely (buf != 0)) {
508 if (usb_pipecontrol (urb->pipe)) {
510 token ^= 0x0100; /* "in" <--> "out" */
511 token |= QTD_TOGGLE; /* force DATA1 */
512 } else if (usb_pipebulk (urb->pipe)
513 && (urb->transfer_flags & URB_ZERO_PACKET)
514 && !(urb->transfer_buffer_length % maxpacket)) {
519 qtd = ehci_qtd_alloc (ehci, flags);
523 qtd_prev->hw_next = QTD_NEXT (qtd->qtd_dma);
524 list_add_tail (&qtd->qtd_list, head);
526 /* never any data in such packets */
527 qtd_fill (qtd, 0, 0, token, 0);
531 /* by default, enable interrupt on urb completion */
532 if (likely (!(urb->transfer_flags & URB_NO_INTERRUPT)))
533 qtd->hw_token |= __constant_cpu_to_le32 (QTD_IOC);
537 qtd_list_free (ehci, urb, head);
541 /*-------------------------------------------------------------------------*/
544 * Hardware maintains data toggle (like OHCI) ... here we (re)initialize
545 * the hardware data toggle in the QH, and set the pseudo-toggle in udev
546 * so we can see if usb_clear_halt() was called. NOP for control, since
547 * we set up qh->hw_info1 to always use the QTD toggle bits.
550 clear_toggle (struct usb_device *udev, int ep, int is_out, struct ehci_qh *qh)
552 vdbg ("clear toggle, dev %d ep 0x%x-%s",
553 udev->devnum, ep, is_out ? "out" : "in");
554 qh->hw_token &= ~__constant_cpu_to_le32 (QTD_TOGGLE);
555 usb_settoggle (udev, ep, is_out, 1);
558 // Would be best to create all qh's from config descriptors,
559 // when each interface/altsetting is established. Unlink
560 // any previous qh and cancel its urbs first; endpoints are
561 // implicitly reset then (data toggle too).
562 // That'd mean updating how usbcore talks to HCDs. (2.5?)
565 // high bandwidth multiplier, as encoded in highspeed endpoint descriptors
566 #define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03))
567 // ... and packet size, for any kind of endpoint descriptor
568 #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x03ff)
571 * Each QH holds a qtd list; a QH is used for everything except iso.
573 * For interrupt urbs, the scheduler must set the microframe scheduling
574 * mask(s) each time the QH gets scheduled. For highspeed, that's
575 * just one microframe in the s-mask. For split interrupt transactions
576 * there are additional complications: c-mask, maybe FSTNs.
578 static struct ehci_qh *
580 struct ehci_hcd *ehci,
584 struct ehci_qh *qh = ehci_qh_alloc (ehci, flags);
585 u32 info1 = 0, info2 = 0;
593 * init endpoint/device data for this QH
595 info1 |= usb_pipeendpoint (urb->pipe) << 8;
596 info1 |= usb_pipedevice (urb->pipe) << 0;
598 is_input = usb_pipein (urb->pipe);
599 type = usb_pipetype (urb->pipe);
600 maxp = usb_maxpacket (urb->dev, urb->pipe, !is_input);
602 /* Compute interrupt scheduling parameters just once, and save.
603 * - allowing for high bandwidth, how many nsec/uframe are used?
604 * - split transactions need a second CSPLIT uframe; same question
605 * - splits also need a schedule gap (for full/low speed I/O)
606 * - qh has a polling interval
608 * For control/bulk requests, the HC or TT handles these.
610 if (type == PIPE_INTERRUPT) {
611 qh->usecs = usb_calc_bus_time (USB_SPEED_HIGH, is_input, 0,
612 hb_mult (maxp) * max_packet (maxp));
613 qh->start = NO_FRAME;
615 if (urb->dev->speed == USB_SPEED_HIGH) {
619 /* FIXME handle HS periods of less than 1 frame. */
620 qh->period = urb->interval >> 3;
621 if (qh->period < 1) {
622 dbg ("intr period %d uframes, NYET!",
627 /* gap is f(FS/LS transfer times) */
628 qh->gap_uf = 1 + usb_calc_bus_time (urb->dev->speed,
629 is_input, 0, maxp) / (125 * 1000);
631 /* FIXME this just approximates SPLIT/CSPLIT times */
632 if (is_input) { // SPLIT, gap, CSPLIT+DATA
633 qh->c_usecs = qh->usecs + HS_USECS (0);
634 qh->usecs = HS_USECS (1);
635 } else { // SPLIT+DATA, gap, CSPLIT
636 qh->usecs += HS_USECS (1);
637 qh->c_usecs = HS_USECS (0);
640 qh->period = urb->interval;
645 switch (urb->dev->speed) {
647 info1 |= (1 << 12); /* EPS "low" */
651 /* EPS 0 means "full" */
652 if (type != PIPE_INTERRUPT)
653 info1 |= (EHCI_TUNE_RL_TT << 28);
654 if (type == PIPE_CONTROL) {
655 info1 |= (1 << 27); /* for TT */
656 info1 |= 1 << 14; /* toggle from qtd */
660 info2 |= (EHCI_TUNE_MULT_TT << 30);
661 info2 |= urb->dev->ttport << 23;
662 info2 |= urb->dev->tt->hub->devnum << 16;
664 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */
668 case USB_SPEED_HIGH: /* no TT involved */
669 info1 |= (2 << 12); /* EPS "high" */
670 if (type == PIPE_CONTROL) {
671 info1 |= (EHCI_TUNE_RL_HS << 28);
672 info1 |= 64 << 16; /* usb2 fixed maxpacket */
673 info1 |= 1 << 14; /* toggle from qtd */
674 info2 |= (EHCI_TUNE_MULT_HS << 30);
675 } else if (type == PIPE_BULK) {
676 info1 |= (EHCI_TUNE_RL_HS << 28);
677 info1 |= 512 << 16; /* usb2 fixed maxpacket */
678 info2 |= (EHCI_TUNE_MULT_HS << 30);
679 } else { /* PIPE_INTERRUPT */
680 info1 |= max_packet (maxp) << 16;
681 info2 |= hb_mult (maxp) << 30;
685 dbg ("bogus dev %p speed %d", urb->dev, urb->dev->speed);
691 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */
693 /* init as live, toggle clear, advance to dummy */
694 qh->qh_state = QH_STATE_IDLE;
695 qh->hw_info1 = cpu_to_le32 (info1);
696 qh->hw_info2 = cpu_to_le32 (info2);
697 qh_update (ehci, qh, qh->dummy);
698 usb_settoggle (urb->dev, usb_pipeendpoint (urb->pipe), !is_input, 1);
704 /*-------------------------------------------------------------------------*/
706 /* move qh (and its qtds) onto async queue; maybe enable queue. */
708 static void qh_link_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
710 u32 dma = QH_NEXT (qh->qh_dma);
711 struct ehci_qh *head;
713 /* (re)start the async schedule? */
715 timer_action_done (ehci, TIMER_ASYNC_OFF);
716 if (!head->qh_next.qh) {
717 u32 cmd = readl (&ehci->regs->command);
719 if (!(cmd & CMD_ASE)) {
720 /* in case a clear of CMD_ASE didn't take yet */
721 (void) handshake (&ehci->regs->status, STS_ASS, 0, 150);
722 cmd |= CMD_ASE | CMD_RUN;
723 writel (cmd, &ehci->regs->command);
724 ehci->hcd.state = USB_STATE_RUNNING;
725 /* posted write need not be known to HC yet ... */
729 qh->hw_token &= ~__constant_cpu_to_le32 (QTD_STS_HALT);
731 /* splice right after start */
732 qh->qh_next = head->qh_next;
733 qh->hw_next = head->hw_next;
736 head->qh_next.qh = qh;
739 qh->qh_state = QH_STATE_LINKED;
740 /* qtd completions reported later by interrupt */
743 /*-------------------------------------------------------------------------*/
746 * For control/bulk/interrupt, return QH with these TDs appended.
747 * Allocates and initializes the QH if necessary.
748 * Returns null if it can't allocate a QH it needs to.
749 * If the QH has TDs (urbs) already, that's great.
751 static struct ehci_qh *qh_append_tds (
752 struct ehci_hcd *ehci,
754 struct list_head *qtd_list,
759 struct ehci_qh *qh = 0;
761 qh = (struct ehci_qh *) *ptr;
762 if (unlikely (qh == 0)) {
763 /* can't sleep here, we have ehci->lock... */
764 qh = qh_make (ehci, urb, SLAB_ATOMIC);
767 if (likely (qh != 0)) {
768 struct ehci_qtd *qtd;
770 if (unlikely (list_empty (qtd_list)))
773 qtd = list_entry (qtd_list->next, struct ehci_qtd,
776 /* control qh may need patching after enumeration */
777 if (unlikely (epnum == 0)) {
778 /* set_address changes the address */
779 if (le32_to_cpu (qh->hw_info1 & 0x7f) == 0)
780 qh->hw_info1 |= cpu_to_le32 (
781 usb_pipedevice (urb->pipe));
783 /* for full speed, ep0 maxpacket can grow */
784 else if (!(qh->hw_info1 & cpu_to_le32 (0x3 << 12))) {
787 info = le32_to_cpu (qh->hw_info1);
788 max = urb->dev->descriptor.bMaxPacketSize0;
789 if (max > (0x07ff & (info >> 16))) {
790 info &= ~(0x07ff << 16);
792 qh->hw_info1 = cpu_to_le32 (info);
797 /* usb_clear_halt() means qh data toggle gets reset */
798 if (unlikely (!usb_gettoggle (urb->dev,
799 (epnum & 0x0f), !(epnum & 0x10)))
800 && !usb_pipecontrol (urb->pipe)) {
801 /* "never happens": drivers do stall cleanup right */
802 if (qh->qh_state != QH_STATE_IDLE
803 && !list_empty (&qh->qtd_list)
804 && qh->qh_state != QH_STATE_COMPLETING)
805 ehci_warn (ehci, "clear toggle dev%d "
806 "ep%d%s: not idle\n",
807 usb_pipedevice (urb->pipe),
809 usb_pipein (urb->pipe)
811 /* else we know this overlay write is safe */
812 clear_toggle (urb->dev,
813 epnum & 0x0f, !(epnum & 0x10), qh);
816 /* just one way to queue requests: swap with the dummy qtd.
817 * only hc or qh_completions() usually modify the overlay.
819 if (likely (qtd != 0)) {
820 struct ehci_qtd *dummy;
824 /* to avoid racing the HC, use the dummy td instead of
825 * the first td of our list (becomes new dummy). both
826 * tds stay deactivated until we're done, when the
827 * HC is allowed to fetch the old dummy (4.10.2).
829 token = qtd->hw_token;
830 qtd->hw_token = cpu_to_le32 (QTD_STS_HALT);
834 dma = dummy->qtd_dma;
836 dummy->qtd_dma = dma;
838 list_del (&qtd->qtd_list);
839 list_add (&dummy->qtd_list, qtd_list);
840 __list_splice (qtd_list, qh->qtd_list.prev);
842 ehci_qtd_init (qtd, qtd->qtd_dma);
845 /* hc must see the new dummy at list end */
847 qtd = list_entry (qh->qtd_list.prev,
848 struct ehci_qtd, qtd_list);
849 qtd->hw_next = QTD_NEXT (dma);
851 /* let the hc process these next qtds */
853 dummy->hw_token = token;
855 urb->hcpriv = qh_get (qh);
861 /*-------------------------------------------------------------------------*/
865 struct ehci_hcd *ehci,
867 struct list_head *qtd_list,
870 struct ehci_qtd *qtd;
874 struct ehci_qh *qh = 0;
876 qtd = list_entry (qtd_list->next, struct ehci_qtd, qtd_list);
877 dev = (struct hcd_dev *)urb->dev->hcpriv;
878 epnum = usb_pipeendpoint (urb->pipe);
879 if (usb_pipein (urb->pipe) && !usb_pipecontrol (urb->pipe))
882 ehci_vdbg (ehci, "submit_async urb %p len %d ep%d%s qtd %p [qh %p]\n",
883 urb, urb->transfer_buffer_length,
884 epnum & 0x0f, (epnum & 0x10) ? "in" : "out",
885 qtd, dev ? dev->ep [epnum] : (void *)~0);
887 spin_lock_irqsave (&ehci->lock, flags);
888 qh = qh_append_tds (ehci, urb, qtd_list, epnum, &dev->ep [epnum]);
890 /* Control/bulk operations through TTs don't need scheduling,
891 * the HC and TT handle it when the TT has a buffer ready.
893 if (likely (qh != 0)) {
894 if (likely (qh->qh_state == QH_STATE_IDLE))
895 qh_link_async (ehci, qh_get (qh));
897 spin_unlock_irqrestore (&ehci->lock, flags);
898 if (unlikely (qh == 0)) {
899 qtd_list_free (ehci, urb, qtd_list);
905 /*-------------------------------------------------------------------------*/
907 /* the async qh for the qtds being reclaimed are now unlinked from the HC */
909 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh);
911 static void end_unlink_async (struct ehci_hcd *ehci, struct pt_regs *regs)
913 struct ehci_qh *qh = ehci->reclaim;
914 struct ehci_qh *next;
916 timer_action_done (ehci, TIMER_IAA_WATCHDOG);
918 // qh->hw_next = cpu_to_le32 (qh->qh_dma);
919 qh->qh_state = QH_STATE_IDLE;
921 qh_put (ehci, qh); // refcount from reclaim
923 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
925 ehci->reclaim = next;
926 ehci->reclaim_ready = 0;
929 qh_completions (ehci, qh, regs);
931 if (!list_empty (&qh->qtd_list)
932 && HCD_IS_RUNNING (ehci->hcd.state))
933 qh_link_async (ehci, qh);
935 qh_put (ehci, qh); // refcount from async list
937 /* it's not free to turn the async schedule on/off; leave it
938 * active but idle for a while once it empties.
940 if (HCD_IS_RUNNING (ehci->hcd.state)
941 && ehci->async->qh_next.qh == 0)
942 timer_action (ehci, TIMER_ASYNC_OFF);
947 start_unlink_async (ehci, next);
951 /* makes sure the async qh will become idle */
952 /* caller must own ehci->lock */
954 static void start_unlink_async (struct ehci_hcd *ehci, struct ehci_qh *qh)
956 int cmd = readl (&ehci->regs->command);
957 struct ehci_qh *prev;
961 || (qh->qh_state != QH_STATE_LINKED
962 && qh->qh_state != QH_STATE_UNLINK_WAIT)
964 // this macro lies except on SMP compiles
965 || !spin_is_locked (&ehci->lock)
971 /* stop async schedule right now? */
972 if (unlikely (qh == ehci->async)) {
973 /* can't get here without STS_ASS set */
974 if (ehci->hcd.state != USB_STATE_HALT) {
975 writel (cmd & ~CMD_ASE, &ehci->regs->command);
977 // handshake later, if we need to
979 timer_action_done (ehci, TIMER_ASYNC_OFF);
983 qh->qh_state = QH_STATE_UNLINK;
984 ehci->reclaim = qh = qh_get (qh);
987 while (prev->qh_next.qh != qh)
988 prev = prev->qh_next.qh;
990 prev->hw_next = qh->hw_next;
991 prev->qh_next = qh->qh_next;
994 if (unlikely (ehci->hcd.state == USB_STATE_HALT)) {
995 /* if (unlikely (qh->reclaim != 0))
996 * this will recurse, probably not much
998 end_unlink_async (ehci, NULL);
1002 ehci->reclaim_ready = 0;
1004 writel (cmd, &ehci->regs->command);
1005 (void) readl (&ehci->regs->command);
1006 timer_action (ehci, TIMER_IAA_WATCHDOG);
1009 /*-------------------------------------------------------------------------*/
1012 scan_async (struct ehci_hcd *ehci, struct pt_regs *regs)
1015 enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1017 if (!++(ehci->stamp))
1019 timer_action_done (ehci, TIMER_ASYNC_SHRINK);
1021 qh = ehci->async->qh_next.qh;
1022 if (likely (qh != 0)) {
1024 /* clean any finished work for this qh */
1025 if (!list_empty (&qh->qtd_list)
1026 && qh->stamp != ehci->stamp) {
1029 /* unlinks could happen here; completion
1030 * reporting drops the lock. rescan using
1031 * the latest schedule, but don't rescan
1032 * qhs we already finished (no looping).
1035 qh->stamp = ehci->stamp;
1036 temp = qh_completions (ehci, qh, regs);
1043 /* unlink idle entries, reducing HC PCI usage as well
1044 * as HCD schedule-scanning costs. delay for any qh
1045 * we just scanned, there's a not-unusual case that it
1046 * doesn't stay idle for long.
1047 * (plus, avoids some kind of re-activation race.)
1049 if (list_empty (&qh->qtd_list)) {
1050 if (qh->stamp == ehci->stamp)
1051 action = TIMER_ASYNC_SHRINK;
1052 else if (!ehci->reclaim
1053 && qh->qh_state == QH_STATE_LINKED)
1054 start_unlink_async (ehci, qh);
1057 qh = qh->qh_next.qh;
1060 if (action == TIMER_ASYNC_SHRINK)
1061 timer_action (ehci, TIMER_ASYNC_SHRINK);