2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * Copyright 2010-2011 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
9 #include <linux/types.h>
10 #include <linux/string.h>
11 #include <linux/kvm.h>
12 #include <linux/kvm_host.h>
13 #include <linux/hugetlb.h>
14 #include <linux/module.h>
16 #include <asm/tlbflush.h>
17 #include <asm/kvm_ppc.h>
18 #include <asm/kvm_book3s.h>
19 #include <asm/mmu-hash64.h>
20 #include <asm/hvcall.h>
21 #include <asm/synch.h>
22 #include <asm/ppc-opcode.h>
25 * Since this file is built in even if KVM is a module, we need
26 * a local copy of this function for the case where kvm_main.c is
29 static struct kvm_memory_slot *builtin_gfn_to_memslot(struct kvm *kvm,
32 struct kvm_memslots *slots;
33 struct kvm_memory_slot *memslot;
35 slots = kvm_memslots(kvm);
36 kvm_for_each_memslot(memslot, slots)
37 if (gfn >= memslot->base_gfn &&
38 gfn < memslot->base_gfn + memslot->npages)
43 /* Translate address of a vmalloc'd thing to a linear map address */
44 static void *real_vmalloc_addr(void *x)
46 unsigned long addr = (unsigned long) x;
49 p = find_linux_pte(swapper_pg_dir, addr);
50 if (!p || !pte_present(*p))
52 /* assume we don't have huge pages in vmalloc space... */
53 addr = (pte_pfn(*p) << PAGE_SHIFT) | (addr & ~PAGE_MASK);
58 * Add this HPTE into the chain for the real page.
59 * Must be called with the chain locked; it unlocks the chain.
61 void kvmppc_add_revmap_chain(struct kvm *kvm, struct revmap_entry *rev,
62 unsigned long *rmap, long pte_index, int realmode)
64 struct revmap_entry *head, *tail;
67 if (*rmap & KVMPPC_RMAP_PRESENT) {
68 i = *rmap & KVMPPC_RMAP_INDEX;
69 head = &kvm->arch.revmap[i];
71 head = real_vmalloc_addr(head);
72 tail = &kvm->arch.revmap[head->back];
74 tail = real_vmalloc_addr(tail);
76 rev->back = head->back;
77 tail->forw = pte_index;
78 head->back = pte_index;
80 rev->forw = rev->back = pte_index;
84 *rmap = i | KVMPPC_RMAP_REFERENCED | KVMPPC_RMAP_PRESENT; /* unlock */
86 EXPORT_SYMBOL_GPL(kvmppc_add_revmap_chain);
88 /* Remove this HPTE from the chain for a real page */
89 static void remove_revmap_chain(struct kvm *kvm, long pte_index,
92 struct revmap_entry *rev, *next, *prev;
93 unsigned long gfn, ptel, head;
94 struct kvm_memory_slot *memslot;
97 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
98 ptel = rev->guest_rpte;
99 gfn = hpte_rpn(ptel, hpte_page_size(hpte_v, ptel));
100 memslot = builtin_gfn_to_memslot(kvm, gfn);
101 if (!memslot || (memslot->flags & KVM_MEMSLOT_INVALID))
104 rmap = real_vmalloc_addr(&memslot->rmap[gfn - memslot->base_gfn]);
107 head = *rmap & KVMPPC_RMAP_INDEX;
108 next = real_vmalloc_addr(&kvm->arch.revmap[rev->forw]);
109 prev = real_vmalloc_addr(&kvm->arch.revmap[rev->back]);
110 next->back = rev->back;
111 prev->forw = rev->forw;
112 if (head == pte_index) {
114 if (head == pte_index)
115 *rmap &= ~(KVMPPC_RMAP_PRESENT | KVMPPC_RMAP_INDEX);
117 *rmap = (*rmap & ~KVMPPC_RMAP_INDEX) | head;
122 static pte_t lookup_linux_pte(struct kvm_vcpu *vcpu, unsigned long hva,
123 int writing, unsigned long *pte_sizep)
126 unsigned long ps = *pte_sizep;
129 ptep = find_linux_pte_or_hugepte(vcpu->arch.pgdir, hva, &shift);
133 *pte_sizep = 1ul << shift;
135 *pte_sizep = PAGE_SIZE;
138 if (!pte_present(*ptep))
140 return kvmppc_read_update_linux_pte(ptep, writing);
143 static inline void unlock_hpte(unsigned long *hpte, unsigned long hpte_v)
145 asm volatile(PPC_RELEASE_BARRIER "" : : : "memory");
149 long kvmppc_h_enter(struct kvm_vcpu *vcpu, unsigned long flags,
150 long pte_index, unsigned long pteh, unsigned long ptel)
152 struct kvm *kvm = vcpu->kvm;
153 unsigned long i, pa, gpa, gfn, psize;
154 unsigned long slot_fn, hva;
156 struct revmap_entry *rev;
157 unsigned long g_ptel = ptel;
158 struct kvm_memory_slot *memslot;
159 unsigned long *physp, pte_size;
163 unsigned int writing;
164 unsigned long mmu_seq;
165 bool realmode = vcpu->arch.vcore->vcore_state == VCORE_RUNNING;
167 psize = hpte_page_size(pteh, ptel);
170 writing = hpte_is_writable(ptel);
171 pteh &= ~(HPTE_V_HVLOCK | HPTE_V_ABSENT | HPTE_V_VALID);
173 /* used later to detect if we might have been invalidated */
174 mmu_seq = kvm->mmu_notifier_seq;
177 /* Find the memslot (if any) for this address */
178 gpa = (ptel & HPTE_R_RPN) & ~(psize - 1);
179 gfn = gpa >> PAGE_SHIFT;
180 memslot = builtin_gfn_to_memslot(kvm, gfn);
184 if (!(memslot && !(memslot->flags & KVM_MEMSLOT_INVALID))) {
185 /* PPC970 can't do emulated MMIO */
186 if (!cpu_has_feature(CPU_FTR_ARCH_206))
188 /* Emulated MMIO - mark this with key=31 */
189 pteh |= HPTE_V_ABSENT;
190 ptel |= HPTE_R_KEY_HI | HPTE_R_KEY_LO;
194 /* Check if the requested page fits entirely in the memslot. */
195 if (!slot_is_aligned(memslot, psize))
197 slot_fn = gfn - memslot->base_gfn;
198 rmap = &memslot->rmap[slot_fn];
200 if (!kvm->arch.using_mmu_notifiers) {
201 physp = kvm->arch.slot_phys[memslot->id];
206 physp = real_vmalloc_addr(physp);
210 is_io = pa & (HPTE_R_I | HPTE_R_W);
211 pte_size = PAGE_SIZE << (pa & KVMPPC_PAGE_ORDER_MASK);
214 /* Translate to host virtual address */
215 hva = gfn_to_hva_memslot(memslot, gfn);
217 /* Look up the Linux PTE for the backing page */
219 pte = lookup_linux_pte(vcpu, hva, writing, &pte_size);
220 if (pte_present(pte)) {
221 if (writing && !pte_write(pte))
222 /* make the actual HPTE be read-only */
223 ptel = hpte_make_readonly(ptel);
224 is_io = hpte_cache_bits(pte_val(pte));
225 pa = pte_pfn(pte) << PAGE_SHIFT;
228 if (pte_size < psize)
230 if (pa && pte_size > psize)
231 pa |= gpa & (pte_size - 1);
233 ptel &= ~(HPTE_R_PP0 - psize);
237 pteh |= HPTE_V_VALID;
239 pteh |= HPTE_V_ABSENT;
242 if (is_io != ~0ul && !hpte_cache_flags_ok(ptel, is_io)) {
246 * Allow guest to map emulated device memory as
247 * uncacheable, but actually make it cacheable.
249 ptel &= ~(HPTE_R_W|HPTE_R_I|HPTE_R_G);
253 /* Find and lock the HPTEG slot to use */
255 if (pte_index >= HPT_NPTE)
257 if (likely((flags & H_EXACT) == 0)) {
259 hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
260 for (i = 0; i < 8; ++i) {
261 if ((*hpte & HPTE_V_VALID) == 0 &&
262 try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID |
269 * Since try_lock_hpte doesn't retry (not even stdcx.
270 * failures), it could be that there is a free slot
271 * but we transiently failed to lock it. Try again,
272 * actually locking each slot and checking it.
275 for (i = 0; i < 8; ++i) {
276 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
278 if (!(*hpte & (HPTE_V_VALID | HPTE_V_ABSENT)))
280 *hpte &= ~HPTE_V_HVLOCK;
288 hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
289 if (!try_lock_hpte(hpte, HPTE_V_HVLOCK | HPTE_V_VALID |
291 /* Lock the slot and check again */
292 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
294 if (*hpte & (HPTE_V_VALID | HPTE_V_ABSENT)) {
295 *hpte &= ~HPTE_V_HVLOCK;
301 /* Save away the guest's idea of the second HPTE dword */
302 rev = &kvm->arch.revmap[pte_index];
304 rev = real_vmalloc_addr(rev);
306 rev->guest_rpte = g_ptel;
308 /* Link HPTE into reverse-map chain */
309 if (pteh & HPTE_V_VALID) {
311 rmap = real_vmalloc_addr(rmap);
313 /* Check for pending invalidations under the rmap chain lock */
314 if (kvm->arch.using_mmu_notifiers &&
315 mmu_notifier_retry(vcpu, mmu_seq)) {
316 /* inval in progress, write a non-present HPTE */
317 pteh |= HPTE_V_ABSENT;
318 pteh &= ~HPTE_V_VALID;
321 kvmppc_add_revmap_chain(kvm, rev, rmap, pte_index,
328 /* Write the first HPTE dword, unlocking the HPTE and making it valid */
331 asm volatile("ptesync" : : : "memory");
333 vcpu->arch.gpr[4] = pte_index;
336 EXPORT_SYMBOL_GPL(kvmppc_h_enter);
338 #define LOCK_TOKEN (*(u32 *)(&get_paca()->lock_token))
340 static inline int try_lock_tlbie(unsigned int *lock)
342 unsigned int tmp, old;
343 unsigned int token = LOCK_TOKEN;
345 asm volatile("1:lwarx %1,0,%2\n"
352 : "=&r" (tmp), "=&r" (old)
353 : "r" (lock), "r" (token)
358 long kvmppc_h_remove(struct kvm_vcpu *vcpu, unsigned long flags,
359 unsigned long pte_index, unsigned long avpn,
362 struct kvm *kvm = vcpu->kvm;
364 unsigned long v, r, rb;
365 struct revmap_entry *rev;
367 if (pte_index >= HPT_NPTE)
369 hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
370 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
372 if ((hpte[0] & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||
373 ((flags & H_AVPN) && (hpte[0] & ~0x7fUL) != avpn) ||
374 ((flags & H_ANDCOND) && (hpte[0] & avpn) != 0)) {
375 hpte[0] &= ~HPTE_V_HVLOCK;
379 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
380 v = hpte[0] & ~HPTE_V_HVLOCK;
381 if (v & HPTE_V_VALID) {
382 hpte[0] &= ~HPTE_V_VALID;
383 rb = compute_tlbie_rb(v, hpte[1], pte_index);
384 if (!(flags & H_LOCAL) && atomic_read(&kvm->online_vcpus) > 1) {
385 while (!try_lock_tlbie(&kvm->arch.tlbie_lock))
387 asm volatile("ptesync" : : : "memory");
388 asm volatile(PPC_TLBIE(%1,%0)"; eieio; tlbsync"
389 : : "r" (rb), "r" (kvm->arch.lpid));
390 asm volatile("ptesync" : : : "memory");
391 kvm->arch.tlbie_lock = 0;
393 asm volatile("ptesync" : : : "memory");
394 asm volatile("tlbiel %0" : : "r" (rb));
395 asm volatile("ptesync" : : : "memory");
397 remove_revmap_chain(kvm, pte_index, v);
400 unlock_hpte(hpte, 0);
402 vcpu->arch.gpr[4] = v;
403 vcpu->arch.gpr[5] = r;
407 long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
409 struct kvm *kvm = vcpu->kvm;
410 unsigned long *args = &vcpu->arch.gpr[4];
411 unsigned long *hp, *hptes[4], tlbrb[4];
412 long int i, j, k, n, found, indexes[4];
413 unsigned long flags, req, pte_index, rcbits;
415 long int ret = H_SUCCESS;
416 struct revmap_entry *rev, *revs[4];
418 if (atomic_read(&kvm->online_vcpus) == 1)
420 for (i = 0; i < 4 && ret == H_SUCCESS; ) {
425 flags = pte_index >> 56;
426 pte_index &= ((1ul << 56) - 1);
429 if (req == 3) { /* no more requests */
433 if (req != 1 || flags == 3 || pte_index >= HPT_NPTE) {
434 /* parameter error */
435 args[j] = ((0xa0 | flags) << 56) + pte_index;
439 hp = (unsigned long *)
440 (kvm->arch.hpt_virt + (pte_index << 4));
441 /* to avoid deadlock, don't spin except for first */
442 if (!try_lock_hpte(hp, HPTE_V_HVLOCK)) {
445 while (!try_lock_hpte(hp, HPTE_V_HVLOCK))
449 if (hp[0] & (HPTE_V_ABSENT | HPTE_V_VALID)) {
451 case 0: /* absolute */
454 case 1: /* andcond */
455 if (!(hp[0] & args[j + 1]))
459 if ((hp[0] & ~0x7fUL) == args[j + 1])
465 hp[0] &= ~HPTE_V_HVLOCK;
466 args[j] = ((0x90 | flags) << 56) + pte_index;
470 args[j] = ((0x80 | flags) << 56) + pte_index;
471 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
472 /* insert R and C bits from guest PTE */
473 rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
474 args[j] |= rcbits << (56 - 5);
476 if (!(hp[0] & HPTE_V_VALID))
479 hp[0] &= ~HPTE_V_VALID; /* leave it locked */
480 tlbrb[n] = compute_tlbie_rb(hp[0], hp[1], pte_index);
490 /* Now that we've collected a batch, do the tlbies */
492 while(!try_lock_tlbie(&kvm->arch.tlbie_lock))
494 asm volatile("ptesync" : : : "memory");
495 for (k = 0; k < n; ++k)
496 asm volatile(PPC_TLBIE(%1,%0) : :
498 "r" (kvm->arch.lpid));
499 asm volatile("eieio; tlbsync; ptesync" : : : "memory");
500 kvm->arch.tlbie_lock = 0;
502 asm volatile("ptesync" : : : "memory");
503 for (k = 0; k < n; ++k)
504 asm volatile("tlbiel %0" : : "r" (tlbrb[k]));
505 asm volatile("ptesync" : : : "memory");
508 for (k = 0; k < n; ++k) {
510 pte_index = args[j] & ((1ul << 56) - 1);
513 remove_revmap_chain(kvm, pte_index, hp[0]);
521 long kvmppc_h_protect(struct kvm_vcpu *vcpu, unsigned long flags,
522 unsigned long pte_index, unsigned long avpn,
525 struct kvm *kvm = vcpu->kvm;
527 struct revmap_entry *rev;
528 unsigned long v, r, rb, mask, bits;
530 if (pte_index >= HPT_NPTE)
533 hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
534 while (!try_lock_hpte(hpte, HPTE_V_HVLOCK))
536 if ((hpte[0] & (HPTE_V_ABSENT | HPTE_V_VALID)) == 0 ||
537 ((flags & H_AVPN) && (hpte[0] & ~0x7fUL) != avpn)) {
538 hpte[0] &= ~HPTE_V_HVLOCK;
542 if (atomic_read(&kvm->online_vcpus) == 1)
545 bits = (flags << 55) & HPTE_R_PP0;
546 bits |= (flags << 48) & HPTE_R_KEY_HI;
547 bits |= flags & (HPTE_R_PP | HPTE_R_N | HPTE_R_KEY_LO);
549 /* Update guest view of 2nd HPTE dword */
550 mask = HPTE_R_PP0 | HPTE_R_PP | HPTE_R_N |
551 HPTE_R_KEY_HI | HPTE_R_KEY_LO;
552 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
554 r = (rev->guest_rpte & ~mask) | bits;
557 r = (hpte[1] & ~mask) | bits;
560 if (v & HPTE_V_VALID) {
561 rb = compute_tlbie_rb(v, r, pte_index);
562 hpte[0] = v & ~HPTE_V_VALID;
563 if (!(flags & H_LOCAL)) {
564 while(!try_lock_tlbie(&kvm->arch.tlbie_lock))
566 asm volatile("ptesync" : : : "memory");
567 asm volatile(PPC_TLBIE(%1,%0)"; eieio; tlbsync"
568 : : "r" (rb), "r" (kvm->arch.lpid));
569 asm volatile("ptesync" : : : "memory");
570 kvm->arch.tlbie_lock = 0;
572 asm volatile("ptesync" : : : "memory");
573 asm volatile("tlbiel %0" : : "r" (rb));
574 asm volatile("ptesync" : : : "memory");
579 hpte[0] = v & ~HPTE_V_HVLOCK;
580 asm volatile("ptesync" : : : "memory");
584 long kvmppc_h_read(struct kvm_vcpu *vcpu, unsigned long flags,
585 unsigned long pte_index)
587 struct kvm *kvm = vcpu->kvm;
588 unsigned long *hpte, v, r;
590 struct revmap_entry *rev = NULL;
592 if (pte_index >= HPT_NPTE)
594 if (flags & H_READ_4) {
598 if (flags & H_R_XLATE)
599 rev = real_vmalloc_addr(&kvm->arch.revmap[pte_index]);
600 for (i = 0; i < n; ++i, ++pte_index) {
601 hpte = (unsigned long *)(kvm->arch.hpt_virt + (pte_index << 4));
602 v = hpte[0] & ~HPTE_V_HVLOCK;
604 if (v & HPTE_V_ABSENT) {
608 if (v & HPTE_V_VALID) {
610 r = rev[i].guest_rpte;
612 r = hpte[1] | HPTE_R_RPN;
614 vcpu->arch.gpr[4 + i * 2] = v;
615 vcpu->arch.gpr[5 + i * 2] = r;
620 void kvmppc_invalidate_hpte(struct kvm *kvm, unsigned long *hptep,
621 unsigned long pte_index)
625 hptep[0] &= ~HPTE_V_VALID;
626 rb = compute_tlbie_rb(hptep[0], hptep[1], pte_index);
627 while (!try_lock_tlbie(&kvm->arch.tlbie_lock))
629 asm volatile("ptesync" : : : "memory");
630 asm volatile(PPC_TLBIE(%1,%0)"; eieio; tlbsync"
631 : : "r" (rb), "r" (kvm->arch.lpid));
632 asm volatile("ptesync" : : : "memory");
633 kvm->arch.tlbie_lock = 0;
635 EXPORT_SYMBOL_GPL(kvmppc_invalidate_hpte);
637 static int slb_base_page_shift[4] = {
641 20, /* 1M, unsupported */
644 long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t eaddr, unsigned long slb_v,
649 unsigned long somask;
650 unsigned long vsid, hash;
653 unsigned long mask, val;
656 /* Get page shift, work out hash and AVPN etc. */
657 mask = SLB_VSID_B | HPTE_V_AVPN | HPTE_V_SECONDARY;
660 if (slb_v & SLB_VSID_L) {
661 mask |= HPTE_V_LARGE;
663 pshift = slb_base_page_shift[(slb_v & SLB_VSID_LP) >> 4];
665 if (slb_v & SLB_VSID_B_1T) {
666 somask = (1UL << 40) - 1;
667 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT_1T;
670 somask = (1UL << 28) - 1;
671 vsid = (slb_v & ~SLB_VSID_B) >> SLB_VSID_SHIFT;
673 hash = (vsid ^ ((eaddr & somask) >> pshift)) & HPT_HASH_MASK;
674 avpn = slb_v & ~(somask >> 16); /* also includes B */
675 avpn |= (eaddr & somask) >> 16;
678 avpn &= ~((1UL << (pshift - 16)) - 1);
684 hpte = (unsigned long *)(kvm->arch.hpt_virt + (hash << 7));
686 for (i = 0; i < 16; i += 2) {
687 /* Read the PTE racily */
688 v = hpte[i] & ~HPTE_V_HVLOCK;
690 /* Check valid/absent, hash, segment size and AVPN */
691 if (!(v & valid) || (v & mask) != val)
694 /* Lock the PTE and read it under the lock */
695 while (!try_lock_hpte(&hpte[i], HPTE_V_HVLOCK))
697 v = hpte[i] & ~HPTE_V_HVLOCK;
701 * Check the HPTE again, including large page size
702 * Since we don't currently allow any MPSS (mixed
703 * page-size segment) page sizes, it is sufficient
704 * to check against the actual page size.
706 if ((v & valid) && (v & mask) == val &&
707 hpte_page_size(v, r) == (1ul << pshift))
708 /* Return with the HPTE still locked */
709 return (hash << 3) + (i >> 1);
711 /* Unlock and move on */
715 if (val & HPTE_V_SECONDARY)
717 val |= HPTE_V_SECONDARY;
718 hash = hash ^ HPT_HASH_MASK;
722 EXPORT_SYMBOL(kvmppc_hv_find_lock_hpte);
725 * Called in real mode to check whether an HPTE not found fault
726 * is due to accessing a paged-out page or an emulated MMIO page,
727 * or if a protection fault is due to accessing a page that the
728 * guest wanted read/write access to but which we made read-only.
729 * Returns a possibly modified status (DSISR) value if not
730 * (i.e. pass the interrupt to the guest),
731 * -1 to pass the fault up to host kernel mode code, -2 to do that
732 * and also load the instruction word (for MMIO emulation),
733 * or 0 if we should make the guest retry the access.
735 long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, unsigned long addr,
736 unsigned long slb_v, unsigned int status, bool data)
738 struct kvm *kvm = vcpu->kvm;
740 unsigned long v, r, gr;
743 struct revmap_entry *rev;
744 unsigned long pp, key;
746 /* For protection fault, expect to find a valid HPTE */
747 valid = HPTE_V_VALID;
748 if (status & DSISR_NOHPTE)
749 valid |= HPTE_V_ABSENT;
751 index = kvmppc_hv_find_lock_hpte(kvm, addr, slb_v, valid);
753 if (status & DSISR_NOHPTE)
754 return status; /* there really was no HPTE */
755 return 0; /* for prot fault, HPTE disappeared */
757 hpte = (unsigned long *)(kvm->arch.hpt_virt + (index << 4));
758 v = hpte[0] & ~HPTE_V_HVLOCK;
760 rev = real_vmalloc_addr(&kvm->arch.revmap[index]);
761 gr = rev->guest_rpte;
763 unlock_hpte(hpte, v);
765 /* For not found, if the HPTE is valid by now, retry the instruction */
766 if ((status & DSISR_NOHPTE) && (v & HPTE_V_VALID))
769 /* Check access permissions to the page */
770 pp = gr & (HPTE_R_PP0 | HPTE_R_PP);
771 key = (vcpu->arch.shregs.msr & MSR_PR) ? SLB_VSID_KP : SLB_VSID_KS;
772 status &= ~DSISR_NOHPTE; /* DSISR_NOHPTE == SRR1_ISI_NOPT */
774 if (gr & (HPTE_R_N | HPTE_R_G))
775 return status | SRR1_ISI_N_OR_G;
776 if (!hpte_read_permission(pp, slb_v & key))
777 return status | SRR1_ISI_PROT;
778 } else if (status & DSISR_ISSTORE) {
779 /* check write permission */
780 if (!hpte_write_permission(pp, slb_v & key))
781 return status | DSISR_PROTFAULT;
783 if (!hpte_read_permission(pp, slb_v & key))
784 return status | DSISR_PROTFAULT;
787 /* Check storage key, if applicable */
788 if (data && (vcpu->arch.shregs.msr & MSR_DR)) {
789 unsigned int perm = hpte_get_skey_perm(gr, vcpu->arch.amr);
790 if (status & DSISR_ISSTORE)
793 return status | DSISR_KEYFAULT;
796 /* Save HPTE info for virtual-mode handler */
797 vcpu->arch.pgfault_addr = addr;
798 vcpu->arch.pgfault_index = index;
799 vcpu->arch.pgfault_hpte[0] = v;
800 vcpu->arch.pgfault_hpte[1] = r;
802 /* Check the storage key to see if it is possibly emulated MMIO */
803 if (data && (vcpu->arch.shregs.msr & MSR_IR) &&
804 (r & (HPTE_R_KEY_HI | HPTE_R_KEY_LO)) ==
805 (HPTE_R_KEY_HI | HPTE_R_KEY_LO))
806 return -2; /* MMIO emulation - load instr word */
808 return -1; /* send fault up to host kernel mode */