1 /******************************************************************************
4 * Guest OS interface to Xen.
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
24 * Copyright (c) 2004, K A Fraser
27 #ifndef __XEN_PUBLIC_XEN_H__
28 #define __XEN_PUBLIC_XEN_H__
30 #include "xen-compat.h"
31 #ifdef CONFIG_PARAVIRT_XEN
32 #include <asm/pvclock-abi.h>
35 #if defined(CONFIG_PARAVIRT_XEN) && !defined(HAVE_XEN_PLATFORM_COMPAT_H)
36 #include <asm/xen/interface.h>
37 #elif defined(__i386__) || defined(__x86_64__)
38 #include "arch-x86/xen.h"
39 #elif defined(__ia64__)
40 #include "arch-ia64.h"
41 #elif defined(__arm__)
44 #error "Unsupported architecture"
48 /* Guest handles for primitive C types. */
49 DEFINE_XEN_GUEST_HANDLE(char);
50 __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char);
51 DEFINE_XEN_GUEST_HANDLE(int);
52 __DEFINE_XEN_GUEST_HANDLE(uint, unsigned int);
53 DEFINE_XEN_GUEST_HANDLE(long);
54 __DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long);
55 DEFINE_XEN_GUEST_HANDLE(void);
57 DEFINE_XEN_GUEST_HANDLE(uint64_t);
58 DEFINE_XEN_GUEST_HANDLE(xen_pfn_t);
65 /* `incontents 100 hcalls List of hypercalls
66 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*()
69 #define __HYPERVISOR_set_trap_table 0
70 #define __HYPERVISOR_mmu_update 1
71 #define __HYPERVISOR_set_gdt 2
72 #define __HYPERVISOR_stack_switch 3
73 #define __HYPERVISOR_set_callbacks 4
74 #define __HYPERVISOR_fpu_taskswitch 5
75 #define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */
76 #define __HYPERVISOR_platform_op 7
77 #define __HYPERVISOR_set_debugreg 8
78 #define __HYPERVISOR_get_debugreg 9
79 #define __HYPERVISOR_update_descriptor 10
80 #define __HYPERVISOR_memory_op 12
81 #define __HYPERVISOR_multicall 13
82 #define __HYPERVISOR_update_va_mapping 14
83 #define __HYPERVISOR_set_timer_op 15
84 #define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */
85 #define __HYPERVISOR_xen_version 17
86 #define __HYPERVISOR_console_io 18
87 #define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */
88 #define __HYPERVISOR_grant_table_op 20
89 #define __HYPERVISOR_vm_assist 21
90 #define __HYPERVISOR_update_va_mapping_otherdomain 22
91 #define __HYPERVISOR_iret 23 /* x86 only */
92 #define __HYPERVISOR_vcpu_op 24
93 #define __HYPERVISOR_set_segment_base 25 /* x86/64 only */
94 #define __HYPERVISOR_mmuext_op 26
95 #define __HYPERVISOR_xsm_op 27
96 #define __HYPERVISOR_nmi_op 28
97 #define __HYPERVISOR_sched_op_new 29
98 #define __HYPERVISOR_callback_op 30
99 #define __HYPERVISOR_xenoprof_op 31
100 #define __HYPERVISOR_event_channel_op 32
101 #define __HYPERVISOR_physdev_op 33
102 #define __HYPERVISOR_hvm_op 34
103 #define __HYPERVISOR_sysctl 35
104 #define __HYPERVISOR_domctl 36
105 #define __HYPERVISOR_kexec_op 37
106 #define __HYPERVISOR_tmem_op 38
107 #define __HYPERVISOR_xc_reserved_op 39 /* reserved for XenClient */
109 /* Architecture-specific hypercall definitions. */
110 #define __HYPERVISOR_arch_0 48
111 #define __HYPERVISOR_arch_1 49
112 #define __HYPERVISOR_arch_2 50
113 #define __HYPERVISOR_arch_3 51
114 #define __HYPERVISOR_arch_4 52
115 #define __HYPERVISOR_arch_5 53
116 #define __HYPERVISOR_arch_6 54
117 #define __HYPERVISOR_arch_7 55
122 * HYPERCALL COMPATIBILITY.
125 /* New sched_op hypercall introduced in 0x00030101. */
126 #if __XEN_INTERFACE_VERSION__ < 0x00030101 || (defined(CONFIG_PARAVIRT_XEN) && !defined(HAVE_XEN_PLATFORM_COMPAT_H))
127 #define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat
129 #define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_new
132 /* New event-channel and physdev hypercalls introduced in 0x00030202. */
133 #if __XEN_INTERFACE_VERSION__ < 0x00030202
134 #undef __HYPERVISOR_event_channel_op
135 #define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat
136 #undef __HYPERVISOR_physdev_op
137 #define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat
140 /* New platform_op hypercall introduced in 0x00030204. */
141 #if __XEN_INTERFACE_VERSION__ < 0x00030204 || (defined(CONFIG_PARAVIRT_XEN) && !defined(HAVE_XEN_PLATFORM_COMPAT_H))
142 #define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op
148 * Virtual interrupts that a guest OS may receive from Xen.
150 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a
151 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound.
152 * The latter can be allocated only once per guest: they must initially be
153 * allocated to VCPU0 but can subsequently be re-bound.
156 #define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */
157 #define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */
158 #define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */
159 #define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */
160 #define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */
161 #define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */
162 #define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */
163 #define VIRQ_CON_RING 8 /* G. (DOM0) Bytes received on console */
164 #define VIRQ_PCPU_STATE 9 /* G. (DOM0) PCPU state changed */
165 #define VIRQ_MEM_EVENT 10 /* G. (DOM0) A memory event has occured */
166 #define VIRQ_XC_RESERVED 11 /* G. Reserved for XenClient */
167 #define VIRQ_ENOMEM 12 /* G. (DOM0) Low on heap memory */
169 /* Architecture-specific VIRQ definitions. */
170 #define VIRQ_ARCH_0 16
171 #define VIRQ_ARCH_1 17
172 #define VIRQ_ARCH_2 18
173 #define VIRQ_ARCH_3 19
174 #define VIRQ_ARCH_4 20
175 #define VIRQ_ARCH_5 21
176 #define VIRQ_ARCH_6 22
177 #define VIRQ_ARCH_7 23
183 * ` enum neg_errnoval
184 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[],
185 * ` unsigned count, unsigned *done_out,
186 * ` unsigned foreigndom)
188 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs).
189 * @count is the length of the above array.
190 * @pdone is an output parameter indicating number of completed operations
191 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this
192 * hypercall invocation. Can be DOMID_SELF.
193 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced
194 * in this hypercall invocation. The value of this field
195 * (x) encodes the PFD as follows:
196 * x == 0 => PFD == DOMID_SELF
197 * x != 0 => PFD == x - 1
199 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command.
201 * ptr[1:0] == MMU_NORMAL_PT_UPDATE:
202 * Updates an entry in a page table belonging to PFD. If updating an L1 table,
203 * and the new table entry is valid/present, the mapped frame must belong to
204 * FD. If attempting to map an I/O page then the caller assumes the privilege
206 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller.
207 * FD == DOMID_XEN: Map restricted areas of Xen's heap space.
208 * ptr[:2] -- Machine address of the page-table entry to modify.
209 * val -- Value to write.
211 * There also certain implicit requirements when using this hypercall. The
212 * pages that make up a pagetable must be mapped read-only in the guest.
213 * This prevents uncontrolled guest updates to the pagetable. Xen strictly
214 * enforces this, and will disallow any pagetable update which will end up
215 * mapping pagetable page RW, and will disallow using any writable page as a
216 * pagetable. In practice it means that when constructing a page table for a
217 * process, thread, etc, we MUST be very dilligient in following these rules:
218 * 1). Start with top-level page (PGD or in Xen language: L4). Fill out
220 * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD
222 * 3). Start filling out the PTE table (L1) with the PTE entries. Once
223 * done, make sure to set each of those entries to RO (so writeable bit
224 * is unset). Once that has been completed, set the PMD (L2) for this
226 * 4). When completed with all of the PMD (L2) entries, and all of them have
227 * been set to RO, make sure to set RO the PUD (L3). Do the same
228 * operation on PGD (L4) pagetable entries that have a PUD (L3) entry.
229 * 5). Now before you can use those pages (so setting the cr3), you MUST also
230 * pin them so that the hypervisor can verify the entries. This is done
231 * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame
232 * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op(
233 * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be
235 * For 32-bit guests, the L4 is not used (as there is less pagetables), so
237 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE
238 * hypercall. Also if so desired the OS can also try to write to the PTE
239 * and be trapped by the hypervisor (as the PTE entry is RO).
241 * To deallocate the pages, the operations are the reverse of the steps
242 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the
243 * pagetable MUST not be in use (meaning that the cr3 is not set to it).
245 * ptr[1:0] == MMU_MACHPHYS_UPDATE:
246 * Updates an entry in the machine->pseudo-physical mapping table.
247 * ptr[:2] -- Machine address within the frame whose mapping to modify.
248 * The frame must belong to the FD, if one is specified.
249 * val -- Value to write into the mapping entry.
251 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD:
252 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed
253 * with those in @val.
255 * @val is usually the machine frame number along with some attributes.
256 * The attributes by default follow the architecture defined bits. Meaning that
257 * if this is a X86_64 machine and four page table layout is used, the layout
259 * - 63 if set means No execute (NX)
260 * - 46-13 the machine frame number
261 * - 12 available for guest
262 * - 11 available for guest
263 * - 10 available for guest
264 * - 9 available for guest
266 * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages)
269 * - 4 page cached disabled
270 * - 3 page write through
271 * - 2 userspace accessible
275 * The one bits that does not fit with the default layout is the PAGE_PSE
276 * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the
277 * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB
278 * (or 2MB) instead of using the PAGE_PSE bit.
280 * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen
281 * using it as the Page Attribute Table (PAT) bit - for details on it please
282 * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of
283 * pages instead of using MTRRs.
285 * The PAT MSR is as follow (it is a 64-bit value, each entry is 8 bits):
287 * +---+----+----+----+-----+----+----+
288 * WC | WC | WB | UC | UC- | WC | WB | <= Linux
289 * +---+----+----+----+-----+----+----+
290 * WC | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots)
291 * +---+----+----+----+-----+----+----+
292 * WC | WP | WC | UC | UC- | WT | WB | <= Xen
293 * +---+----+----+----+-----+----+----+
295 * The lookup of this index table translates to looking up
296 * Bit 7, Bit 4, and Bit 3 of val entry:
298 * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3).
300 * If all bits are off, then we are using PAT0. If bit 3 turned on,
301 * then we are using PAT1, if bit 3 and bit 4, then PAT2..
303 * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means
304 * that if a guest that follows Linux's PAT setup and would like to set Write
305 * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is
306 * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the
309 * WB = none (so PAT0)
310 * WC = PWT (bit 3 on)
311 * UC = PWT | PCD (bit 3 and 4 are on).
313 * To make it work with Xen, it needs to translate the WC bit as so:
315 * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3
317 * And to translate back it would:
319 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7.
321 #define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */
322 #define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */
323 #define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */
326 * MMU EXTENDED OPERATIONS
328 * HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures.
329 * A foreigndom (FD) can be specified (or DOMID_SELF for none).
330 * Where the FD has some effect, it is described below.
332 * cmd: MMUEXT_(UN)PIN_*_TABLE
333 * mfn: Machine frame number to be (un)pinned as a p.t. page.
334 * The frame must belong to the FD, if one is specified.
336 * cmd: MMUEXT_NEW_BASEPTR
337 * mfn: Machine frame number of new page-table base to install in MMU.
339 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only]
340 * mfn: Machine frame number of new page-table base to install in MMU
341 * when in user space.
343 * cmd: MMUEXT_TLB_FLUSH_LOCAL
344 * No additional arguments. Flushes local TLB.
346 * cmd: MMUEXT_INVLPG_LOCAL
347 * linear_addr: Linear address to be flushed from the local TLB.
349 * cmd: MMUEXT_TLB_FLUSH_MULTI
350 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
352 * cmd: MMUEXT_INVLPG_MULTI
353 * linear_addr: Linear address to be flushed.
354 * vcpumask: Pointer to bitmap of VCPUs to be flushed.
356 * cmd: MMUEXT_TLB_FLUSH_ALL
357 * No additional arguments. Flushes all VCPUs' TLBs.
359 * cmd: MMUEXT_INVLPG_ALL
360 * linear_addr: Linear address to be flushed from all VCPUs' TLBs.
362 * cmd: MMUEXT_FLUSH_CACHE
363 * No additional arguments. Writes back and flushes cache contents.
365 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL
366 * No additional arguments. Writes back and flushes cache contents
367 * on all CPUs in the system.
369 * cmd: MMUEXT_SET_LDT
370 * linear_addr: Linear address of LDT base (NB. must be page-aligned).
371 * nr_ents: Number of entries in LDT.
373 * cmd: MMUEXT_CLEAR_PAGE
374 * mfn: Machine frame number to be cleared.
376 * cmd: MMUEXT_COPY_PAGE
377 * mfn: Machine frame number of the destination page.
378 * src_mfn: Machine frame number of the source page.
380 * cmd: MMUEXT_[UN]MARK_SUPER
381 * mfn: Machine frame number of head of superpage to be [un]marked.
383 #define MMUEXT_PIN_L1_TABLE 0
384 #define MMUEXT_PIN_L2_TABLE 1
385 #define MMUEXT_PIN_L3_TABLE 2
386 #define MMUEXT_PIN_L4_TABLE 3
387 #define MMUEXT_UNPIN_TABLE 4
388 #define MMUEXT_NEW_BASEPTR 5
389 #define MMUEXT_TLB_FLUSH_LOCAL 6
390 #define MMUEXT_INVLPG_LOCAL 7
391 #define MMUEXT_TLB_FLUSH_MULTI 8
392 #define MMUEXT_INVLPG_MULTI 9
393 #define MMUEXT_TLB_FLUSH_ALL 10
394 #define MMUEXT_INVLPG_ALL 11
395 #define MMUEXT_FLUSH_CACHE 12
396 #define MMUEXT_SET_LDT 13
397 #define MMUEXT_NEW_USER_BASEPTR 15
398 #define MMUEXT_CLEAR_PAGE 16
399 #define MMUEXT_COPY_PAGE 17
400 #define MMUEXT_FLUSH_CACHE_GLOBAL 18
401 #define MMUEXT_MARK_SUPER 19
402 #define MMUEXT_UNMARK_SUPER 20
408 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR
409 * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */
411 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */
412 unsigned long linear_addr;
416 unsigned int nr_ents;
417 /* TLB_FLUSH_MULTI, INVLPG_MULTI */
418 #if __XEN_INTERFACE_VERSION__ >= 0x00030205
419 XEN_GUEST_HANDLE(const_void) vcpumask;
421 const void *vcpumask;
427 DEFINE_GUEST_HANDLE_STRUCT(mmuext_op);
428 typedef struct mmuext_op mmuext_op_t;
429 DEFINE_XEN_GUEST_HANDLE(mmuext_op_t);
432 /* These are passed as 'flags' to update_va_mapping. They can be ORed. */
433 /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */
434 /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */
435 #define UVMF_NONE (0UL<<0) /* No flushing at all. */
436 #define UVMF_TLB_FLUSH (1UL<<0) /* Flush entire TLB(s). */
437 #define UVMF_INVLPG (2UL<<0) /* Flush only one entry. */
438 #define UVMF_FLUSHTYPE_MASK (3UL<<0)
439 #define UVMF_MULTI (0UL<<2) /* Flush subset of TLBs. */
440 #define UVMF_LOCAL (0UL<<2) /* Flush local TLB. */
441 #define UVMF_ALL (1UL<<2) /* Flush all TLBs. */
444 * Commands to HYPERVISOR_console_io().
446 #define CONSOLEIO_write 0
447 #define CONSOLEIO_read 1
450 * Commands to HYPERVISOR_vm_assist().
452 #define VMASST_CMD_enable 0
453 #define VMASST_CMD_disable 1
455 /* x86/32 guests: simulate full 4GB segment limits. */
456 #define VMASST_TYPE_4gb_segments 0
458 /* x86/32 guests: trap (vector 15) whenever above vmassist is used. */
459 #define VMASST_TYPE_4gb_segments_notify 1
462 * x86 guests: support writes to bottom-level PTEs.
463 * NB1. Page-directory entries cannot be written.
464 * NB2. Guest must continue to remove all writable mappings of PTEs.
466 #define VMASST_TYPE_writable_pagetables 2
468 /* x86/PAE guests: support PDPTs above 4GB. */
469 #define VMASST_TYPE_pae_extended_cr3 3
471 #define MAX_VMASST_TYPE 3
475 typedef uint16_t domid_t;
477 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */
478 #define DOMID_FIRST_RESERVED (0x7FF0U)
480 /* DOMID_SELF is used in certain contexts to refer to oneself. */
481 #define DOMID_SELF (0x7FF0U)
484 * DOMID_IO is used to restrict page-table updates to mapping I/O memory.
485 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO
486 * is useful to ensure that no mappings to the OS's own heap are accidentally
487 * installed. (e.g., in Linux this could cause havoc as reference counts
488 * aren't adjusted on the I/O-mapping code path).
489 * This only makes sense in MMUEXT_SET_FOREIGNDOM, but in that context can
490 * be specified by any calling domain.
492 #define DOMID_IO (0x7FF1U)
495 * DOMID_XEN is used to allow privileged domains to map restricted parts of
496 * Xen's heap space (e.g., the machine_to_phys table).
497 * This only makes sense in MMUEXT_SET_FOREIGNDOM, and is only permitted if
498 * the caller is privileged.
500 #define DOMID_XEN (0x7FF2U)
503 * DOMID_COW is used as the owner of sharable pages */
504 #define DOMID_COW (0x7FF3U)
506 /* DOMID_INVALID is used to identify pages with unknown owner. */
507 #define DOMID_INVALID (0x7FF4U)
510 #define DOMID_IDLE (0x7FFFU)
513 * Send an array of these to HYPERVISOR_mmu_update().
514 * NB. The fields are natural pointer/address size for this architecture.
517 uint64_t ptr; /* Machine address of PTE. */
518 uint64_t val; /* New contents of PTE. */
520 DEFINE_GUEST_HANDLE_STRUCT(mmu_update);
521 typedef struct mmu_update mmu_update_t;
522 DEFINE_XEN_GUEST_HANDLE(mmu_update_t);
525 * Send an array of these to HYPERVISOR_multicall().
526 * NB. The fields are natural register size for this architecture.
528 struct multicall_entry {
530 #if !defined(CONFIG_PARAVIRT_XEN) || defined(HAVE_XEN_PLATFORM_COMPAT_H)
531 unsigned long result;
535 unsigned long args[6];
537 DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
538 typedef struct multicall_entry multicall_entry_t;
539 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t);
542 * Event channel endpoints per domain:
543 * 1024 if a long is 32 bits; 4096 if a long is 64 bits.
545 #define NR_EVENT_CHANNELS (sizeof(unsigned long) * sizeof(unsigned long) * 64)
547 struct vcpu_time_info {
549 * Updates to the following values are preceded and followed
550 * by an increment of 'version'. The guest can therefore
551 * detect updates by looking for changes to 'version'. If the
552 * least-significant bit of the version number is set then an
553 * update is in progress and the guest must wait to read a
554 * consistent set of values. The correct way to interact with
555 * the version number is similar to Linux's seqlock: see the
556 * implementations of read_seqbegin/read_seqretry.
560 uint64_t tsc_timestamp; /* TSC at last update of time vals. */
561 uint64_t system_time; /* Time, in nanosecs, since boot. */
563 * Current system time:
564 * system_time + ((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul
565 * CPU frequency (Hz):
566 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift
568 uint32_t tsc_to_system_mul;
572 typedef struct vcpu_time_info vcpu_time_info_t;
576 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate
577 * a pending notification for a particular VCPU. It is then cleared
578 * by the guest OS /before/ checking for pending work, thus avoiding
579 * a set-and-check race. Note that the mask is only accessed by Xen
580 * on the CPU that is currently hosting the VCPU. This means that the
581 * pending and mask flags can be updated by the guest without special
582 * synchronisation (i.e., no need for the x86 LOCK prefix).
583 * This may seem suboptimal because if the pending flag is set by
584 * a different CPU then an IPI may be scheduled even when the mask
585 * is set. However, note:
586 * 1. The task of 'interrupt holdoff' is covered by the per-event-
587 * channel mask bits. A 'noisy' event that is continually being
588 * triggered can be masked at source at this very precise
590 * 2. The main purpose of the per-VCPU mask is therefore to restrict
591 * reentrant execution: whether for concurrency control, or to
592 * prevent unbounded stack usage. Whatever the purpose, we expect
593 * that the mask will be asserted only for short periods at a time,
594 * and so the likelihood of a 'spurious' IPI is suitably small.
595 * The mask is read before making an event upcall to the guest: a
596 * non-zero mask therefore guarantees that the VCPU will not receive
597 * an upcall activation. The mask is cleared when the VCPU requests
598 * to block: this avoids wakeup-waiting races.
600 uint8_t evtchn_upcall_pending;
601 uint8_t evtchn_upcall_mask;
602 unsigned long evtchn_pending_sel;
603 struct arch_vcpu_info arch;
604 #ifdef CONFIG_PARAVIRT_XEN
605 struct pvclock_vcpu_time_info time;
607 struct vcpu_time_info time;
609 }; /* 64 bytes (x86) */
611 typedef struct vcpu_info vcpu_info_t;
615 * Xen/kernel shared data -- pointer provided in start_info.
617 * This structure is defined to be both smaller than a page, and the
618 * only data on the shared page, but may vary in actual size even within
619 * compatible Xen versions; guests should not rely on the size
620 * of this structure remaining constant.
623 struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS];
626 * A domain can create "event channels" on which it can send and receive
627 * asynchronous event notifications. There are three classes of event that
628 * are delivered by this mechanism:
629 * 1. Bi-directional inter- and intra-domain connections. Domains must
630 * arrange out-of-band to set up a connection (usually by allocating
631 * an unbound 'listener' port and avertising that via a storage service
633 * 2. Physical interrupts. A domain with suitable hardware-access
634 * privileges can bind an event-channel port to a physical interrupt
636 * 3. Virtual interrupts ('events'). A domain can bind an event-channel
637 * port to a virtual interrupt source, such as the virtual-timer
638 * device or the emergency console.
640 * Event channels are addressed by a "port index". Each channel is
641 * associated with two bits of information:
642 * 1. PENDING -- notifies the domain that there is a pending notification
643 * to be processed. This bit is cleared by the guest.
644 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING
645 * will cause an asynchronous upcall to be scheduled. This bit is only
646 * updated by the guest. It is read-only within Xen. If a channel
647 * becomes pending while the channel is masked then the 'edge' is lost
648 * (i.e., when the channel is unmasked, the guest must manually handle
649 * pending notifications as no upcall will be scheduled by Xen).
651 * To expedite scanning of pending notifications, any 0->1 pending
652 * transition on an unmasked channel causes a corresponding bit in a
653 * per-vcpu selector word to be set. Each bit in the selector covers a
654 * 'C long' in the PENDING bitfield array.
656 unsigned long evtchn_pending[sizeof(unsigned long) * 8];
657 unsigned long evtchn_mask[sizeof(unsigned long) * 8];
660 * Wallclock time: updated only by control software. Guests should base
661 * their gettimeofday() syscall on this wallclock-base value.
663 #ifdef CONFIG_PARAVIRT_XEN
664 struct pvclock_wall_clock wc;
666 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */
667 uint32_t wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */
668 uint32_t wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */
671 struct arch_shared_info arch;
675 typedef struct shared_info shared_info_t;
679 * Start-of-day memory layout:
680 * 1. The domain is started within contiguous virtual-memory region.
681 * 2. The contiguous region ends on an aligned 4MB boundary.
682 * 3. This the order of bootstrap elements in the initial virtual region:
683 * a. relocated kernel image
684 * b. initial ram disk [mod_start, mod_len]
685 * c. list of allocated page frames [mfn_list, nr_pages]
686 * (unless relocated due to XEN_ELFNOTE_INIT_P2M)
687 * d. start_info_t structure [register ESI (x86)]
688 * e. bootstrap page tables [pt_base, CR3 (x86)]
689 * f. bootstrap stack [register ESP (x86)]
690 * 4. Bootstrap elements are packed together, but each is 4kB-aligned.
691 * 5. The initial ram disk may be omitted.
692 * 6. The list of page frames forms a contiguous 'pseudo-physical' memory
693 * layout for the domain. In particular, the bootstrap virtual-memory
694 * region is a 1:1 mapping to the first section of the pseudo-physical map.
695 * 7. All bootstrap elements are mapped read-writable for the guest OS. The
696 * only exception is the bootstrap page table, which is mapped read-only.
697 * 8. There is guaranteed to be at least 512kB padding after the final
698 * bootstrap element. If necessary, the bootstrap virtual region is
699 * extended by an extra 4MB to ensure this.
702 #define MAX_GUEST_CMDLINE 1024
704 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */
705 char magic[32]; /* "xen-<version>-<platform>". */
706 unsigned long nr_pages; /* Total pages allocated to this domain. */
707 unsigned long shared_info; /* MACHINE address of shared info struct. */
708 uint32_t flags; /* SIF_xxx flags. */
709 xen_pfn_t store_mfn; /* MACHINE page number of shared page. */
710 uint32_t store_evtchn; /* Event channel for store communication. */
713 xen_pfn_t mfn; /* MACHINE page number of console page. */
714 uint32_t evtchn; /* Event channel for console page. */
717 uint32_t info_off; /* Offset of console_info struct. */
718 uint32_t info_size; /* Size of console_info struct from start.*/
721 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */
722 unsigned long pt_base; /* VIRTUAL address of page directory. */
723 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */
724 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */
725 unsigned long mod_start; /* VIRTUAL address of pre-loaded module. */
726 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */
727 int8_t cmd_line[MAX_GUEST_CMDLINE];
728 /* The pfn range here covers both page table and p->m table frames. */
729 unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table. */
730 unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table. */
732 typedef struct start_info start_info_t;
734 /* New console union for dom0 introduced in 0x00030203. */
735 #if __XEN_INTERFACE_VERSION__ < 0x00030203
736 #define console_mfn console.domU.mfn
737 #define console_evtchn console.domU.evtchn
740 /* These flags are passed in the 'flags' field of start_info_t. */
741 #define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */
742 #define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */
743 #define SIF_MULTIBOOT_MOD (1<<2) /* Is mod_start a multiboot module? */
744 #define SIF_MOD_START_PFN (1<<3) /* Is mod_start a PFN? */
745 #define SIF_PM_MASK (0xFF<<8) /* reserve 1 byte for xen-pm options */
748 * A multiboot module is a package containing modules very similar to a
749 * multiboot module array. The only differences are:
750 * - the array of module descriptors is by convention simply at the beginning
751 * of the multiboot module,
752 * - addresses in the module descriptors are based on the beginning of the
754 * - the number of modules is determined by a termination descriptor that has
757 * This permits to both build it statically and reference it in a configuration
758 * file, and let the PV guest easily rebase the addresses to virtual addresses
759 * and at the same time count the number of modules.
761 struct xen_multiboot_mod_list
763 /* Address of first byte of the module */
765 /* Address of last byte of the module (inclusive) */
767 /* Address of zero-terminated command line */
769 /* Unused, must be zero */
773 typedef struct dom0_vga_console_info {
774 uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */
775 #define XEN_VGATYPE_TEXT_MODE_3 0x03
776 #define XEN_VGATYPE_VESA_LFB 0x23
777 #define XEN_VGATYPE_EFI_LFB 0x70
781 /* Font height, in pixels. */
782 uint16_t font_height;
783 /* Cursor location (column, row). */
784 uint16_t cursor_x, cursor_y;
785 /* Number of rows and columns (dimensions in characters). */
786 uint16_t rows, columns;
790 /* Width and height, in pixels. */
791 uint16_t width, height;
792 /* Bytes per scan line. */
793 uint16_t bytes_per_line;
794 /* Bits per pixel. */
795 uint16_t bits_per_pixel;
796 /* LFB physical address, and size (in units of 64kB). */
799 /* RGB mask offsets and sizes, as defined by VBE 1.2+ */
800 uint8_t red_pos, red_size;
801 uint8_t green_pos, green_size;
802 uint8_t blue_pos, blue_size;
803 uint8_t rsvd_pos, rsvd_size;
804 #if __XEN_INTERFACE_VERSION__ >= 0x00030206 || (defined(CONFIG_PARAVIRT_XEN) && !defined(HAVE_XEN_PLATFORM_COMPAT_H))
805 /* VESA capabilities (offset 0xa, VESA command 0x4f00). */
807 /* Mode attributes (offset 0x0, VESA command 0x4f01). */
812 } dom0_vga_console_info_t;
813 #define xen_vga_console_info dom0_vga_console_info
814 #define xen_vga_console_info_t dom0_vga_console_info_t
816 typedef uint8_t xen_domain_handle_t[16];
818 /* Turn a plain number into a C unsigned long constant. */
819 #define __mk_unsigned_long(x) x ## UL
820 #define mk_unsigned_long(x) __mk_unsigned_long(x)
822 __DEFINE_XEN_GUEST_HANDLE(uint8, uint8_t);
823 __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t);
824 __DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t);
825 __DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t);
827 #else /* __ASSEMBLY__ */
829 /* In assembly code we cannot use C numeric constant suffixes. */
830 #define mk_unsigned_long(x) x
832 #endif /* !__ASSEMBLY__ */
834 /* Default definitions for macros used by domctl/sysctl. */
835 #if defined(__XEN__) || defined(__XEN_TOOLS__)
837 #ifndef uint64_aligned_t
838 #define uint64_aligned_t uint64_t
840 #ifndef XEN_GUEST_HANDLE_64
841 #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name)
845 struct xenctl_cpumap {
846 XEN_GUEST_HANDLE_64(uint8) bitmap;
851 #endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */
853 #endif /* __XEN_PUBLIC_XEN_H__ */