2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/slab.h>
36 #include <linux/acpi.h>
37 #include <linux/dmi.h>
38 #include <linux/moduleparam.h>
39 #include <linux/sched.h> /* need_resched() */
40 #include <linux/pm_qos.h>
41 #include <linux/clockchips.h>
42 #include <linux/cpuidle.h>
43 #include <linux/irqflags.h>
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
56 #include <asm/uaccess.h>
58 #include <acpi/acpi_bus.h>
59 #include <acpi/processor.h>
60 #include <asm/processor.h>
62 #define PREFIX "ACPI: "
64 #define ACPI_PROCESSOR_CLASS "processor"
65 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
66 ACPI_MODULE_NAME("processor_idle");
67 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68 #define C2_OVERHEAD 1 /* 1us */
69 #define C3_OVERHEAD 1 /* 1us */
70 #define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
72 static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73 module_param(max_cstate, uint, 0000);
74 static unsigned int nocst __read_mostly;
75 module_param(nocst, uint, 0000);
76 static int bm_check_disable __read_mostly;
77 module_param(bm_check_disable, uint, 0000);
79 static unsigned int latency_factor __read_mostly = 2;
80 module_param(latency_factor, uint, 0644);
82 static int disabled_by_idle_boot_param(void)
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(const struct dmi_system_id *id)
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
104 max_cstate = (long)id->driver_data;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
128 #ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
130 * Callers should disable interrupts before the call and enable
131 * interrupts after return.
133 static void acpi_safe_halt(void)
135 current_thread_info()->status &= ~TS_POLLING;
137 * TS_POLLING-cleared state must be visible before we
141 if (!need_resched()) {
145 current_thread_info()->status |= TS_POLLING;
149 #ifdef ARCH_APICTIMER_STOPS_ON_C3
152 * Some BIOS implementations switch to C3 in the published C2 state.
153 * This seems to be a common problem on AMD boxen, but other vendors
154 * are affected too. We pick the most conservative approach: we assume
155 * that the local APIC stops in both C2 and C3.
157 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
158 struct acpi_processor_cx *cx)
160 struct acpi_processor_power *pwr = &pr->power;
161 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
163 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
166 if (amd_e400_c1e_detected)
167 type = ACPI_STATE_C1;
170 * Check, if one of the previous states already marked the lapic
173 if (pwr->timer_broadcast_on_state < state)
176 if (cx->type >= type)
177 pr->power.timer_broadcast_on_state = state;
180 static void __lapic_timer_propagate_broadcast(void *arg)
182 struct acpi_processor *pr = (struct acpi_processor *) arg;
183 unsigned long reason;
185 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
186 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
188 clockevents_notify(reason, &pr->id);
191 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
193 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
197 /* Power(C) State timer broadcast control */
198 static void lapic_timer_state_broadcast(struct acpi_processor *pr,
199 struct acpi_processor_cx *cx,
202 int state = cx - pr->power.states;
204 if (state >= pr->power.timer_broadcast_on_state) {
205 unsigned long reason;
207 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
208 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
209 clockevents_notify(reason, &pr->id);
215 static void lapic_timer_check_state(int state, struct acpi_processor *pr,
216 struct acpi_processor_cx *cstate) { }
217 static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
218 static inline void lapic_timer_state_broadcast(struct acpi_processor *pr,
219 struct acpi_processor_cx *cx,
227 * Suspend / resume control
229 static u32 saved_bm_rld;
231 static void acpi_idle_bm_rld_save(void)
233 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
235 static void acpi_idle_bm_rld_restore(void)
239 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
241 if (resumed_bm_rld != saved_bm_rld)
242 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
245 int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
247 acpi_idle_bm_rld_save();
251 int acpi_processor_resume(struct acpi_device * device)
253 acpi_idle_bm_rld_restore();
257 #if defined(CONFIG_X86) && !defined(CONFIG_PROCESSOR_EXTERNAL_CONTROL)
258 static void tsc_check_state(int state)
260 switch (boot_cpu_data.x86_vendor) {
262 case X86_VENDOR_INTEL:
264 * AMD Fam10h TSC will tick in all
265 * C/P/S0/S1 states when this bit is set.
267 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
272 /* TSC could halt in idle, so notify users */
273 if (state > ACPI_STATE_C1)
274 mark_tsc_unstable("TSC halts in idle");
278 static void tsc_check_state(int state) { return; }
281 static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
290 /* if info is obtained from pblk/fadt, type equals state */
291 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
292 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
294 #ifndef CONFIG_HOTPLUG_CPU
296 * Check for P_LVL2_UP flag before entering C2 and above on
299 if ((num_online_cpus() > 1) &&
300 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
304 /* determine C2 and C3 address from pblk */
305 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
306 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
308 /* determine latencies from FADT */
309 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
310 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
313 * FADT specified C2 latency must be less than or equal to
316 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
317 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
318 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
320 pr->power.states[ACPI_STATE_C2].address = 0;
324 * FADT supplied C3 latency must be less than or equal to
327 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
328 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
329 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
331 pr->power.states[ACPI_STATE_C3].address = 0;
334 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
335 "lvl2[0x%08x] lvl3[0x%08x]\n",
336 pr->power.states[ACPI_STATE_C2].address,
337 pr->power.states[ACPI_STATE_C3].address));
342 static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
344 if (!pr->power.states[ACPI_STATE_C1].valid) {
345 /* set the first C-State to C1 */
346 /* all processors need to support C1 */
347 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
348 pr->power.states[ACPI_STATE_C1].valid = 1;
349 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
351 /* the C0 state only exists as a filler in our array */
352 pr->power.states[ACPI_STATE_C0].valid = 1;
356 static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
358 acpi_status status = 0;
362 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
363 union acpi_object *cst;
371 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
372 if (ACPI_FAILURE(status)) {
373 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
377 cst = buffer.pointer;
379 /* There must be at least 2 elements */
380 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
381 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
386 count = cst->package.elements[0].integer.value;
388 /* Validate number of power states. */
389 if (count < 1 || count != cst->package.count - 1) {
390 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
395 /* Tell driver that at least _CST is supported. */
396 pr->flags.has_cst = 1;
398 for (i = 1; i <= count; i++) {
399 union acpi_object *element;
400 union acpi_object *obj;
401 struct acpi_power_register *reg;
402 struct acpi_processor_cx cx;
404 memset(&cx, 0, sizeof(cx));
406 element = &(cst->package.elements[i]);
407 if (element->type != ACPI_TYPE_PACKAGE)
410 if (element->package.count != 4)
413 obj = &(element->package.elements[0]);
415 if (obj->type != ACPI_TYPE_BUFFER)
418 reg = (struct acpi_power_register *)obj->buffer.pointer;
420 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
421 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
424 /* There should be an easy way to extract an integer... */
425 obj = &(element->package.elements[1]);
426 if (obj->type != ACPI_TYPE_INTEGER)
429 cx.type = obj->integer.value;
431 * Some buggy BIOSes won't list C1 in _CST -
432 * Let acpi_processor_get_power_info_default() handle them later
434 if (i == 1 && cx.type != ACPI_STATE_C1)
437 cx.address = reg->address;
438 cx.index = current_count + 1;
440 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
441 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
442 if (acpi_processor_ffh_cstate_probe
443 (pr->id, &cx, reg) == 0) {
444 cx.entry_method = ACPI_CSTATE_FFH;
445 } else if (cx.type == ACPI_STATE_C1) {
447 * C1 is a special case where FIXED_HARDWARE
448 * can be handled in non-MWAIT way as well.
449 * In that case, save this _CST entry info.
450 * Otherwise, ignore this info and continue.
452 cx.entry_method = ACPI_CSTATE_HALT;
453 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
454 /* This doesn't apply to external control case */
455 } else if (!processor_pm_external()) {
458 if (cx.type == ACPI_STATE_C1 &&
459 (boot_option_idle_override == IDLE_NOMWAIT)) {
461 * In most cases the C1 space_id obtained from
462 * _CST object is FIXED_HARDWARE access mode.
463 * But when the option of idle=halt is added,
464 * the entry_method type should be changed from
465 * CSTATE_FFH to CSTATE_HALT.
466 * When the option of idle=nomwait is added,
467 * the C1 entry_method type should be
470 cx.entry_method = ACPI_CSTATE_HALT;
471 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
474 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
478 if (cx.type == ACPI_STATE_C1) {
482 obj = &(element->package.elements[2]);
483 if (obj->type != ACPI_TYPE_INTEGER)
486 cx.latency = obj->integer.value;
488 obj = &(element->package.elements[3]);
489 if (obj->type != ACPI_TYPE_INTEGER)
492 cx.power = obj->integer.value;
494 #ifdef CONFIG_PROCESSOR_EXTERNAL_CONTROL
495 /* cache control methods to notify external logic */
496 if (processor_pm_external())
497 memcpy(&cx.reg, reg, sizeof(*reg));
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
520 /* Validate number of power states discovered */
521 if (current_count < (processor_pm_external() ? 1 : 2))
525 kfree(buffer.pointer);
530 static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
598 cx->latency_ticks = cx->latency;
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
612 static int acpi_processor_power_verify(struct acpi_processor *pr)
615 unsigned int working = 0;
617 #ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
618 pr->power.timer_broadcast_on_state = INT_MAX;
621 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
622 struct acpi_processor_cx *cx = &pr->power.states[i];
633 cx->latency_ticks = cx->latency; /* Normalize latency */
637 acpi_processor_power_verify_c3(pr, cx);
643 lapic_timer_check_state(i, pr, cx);
644 tsc_check_state(cx->type);
648 lapic_timer_propagate_broadcast(pr);
653 static int acpi_processor_get_power_info(struct acpi_processor *pr)
659 /* NOTE: the idle thread may not be running while calling
662 /* Zero initialize all the C-states info. */
663 memset(pr->power.states, 0, sizeof(pr->power.states));
665 result = acpi_processor_get_power_info_cst(pr);
666 if (result == -ENODEV)
667 result = acpi_processor_get_power_info_fadt(pr);
672 acpi_processor_get_power_info_default(pr);
674 pr->power.count = acpi_processor_power_verify(pr);
677 * if one state of type C2 or C3 is available, mark this
678 * CPU as being "idle manageable"
680 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
681 if (pr->power.states[i].valid) {
683 if (pr->power.states[i].type >= ACPI_STATE_C2)
691 #ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
693 * acpi_idle_bm_check - checks if bus master activity was detected
695 static int acpi_idle_bm_check(void)
699 if (bm_check_disable)
702 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
704 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
706 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
707 * the true state of bus mastering activity; forcing us to
708 * manually check the BMIDEA bit of each IDE channel.
710 else if (errata.piix4.bmisx) {
711 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
712 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
719 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
722 * Caller disables interrupt before call and enables interrupt after return.
724 static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
726 /* Don't trace irqs off for idle */
727 stop_critical_timings();
728 if (cx->entry_method == ACPI_CSTATE_FFH) {
729 /* Call into architectural FFH based C-state */
730 acpi_processor_ffh_cstate_enter(cx);
731 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
734 /* IO port based C-state */
736 /* Dummy wait op - must do something useless after P_LVL2 read
737 because chipsets cannot guarantee that STPCLK# signal
738 gets asserted in time to freeze execution properly. */
739 inl(acpi_gbl_FADT.xpm_timer_block.address);
741 start_critical_timings();
745 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
746 * @dev: the target CPU
747 * @drv: cpuidle driver containing cpuidle state info
748 * @index: index of target state
750 * This is equivalent to the HALT instruction.
752 static int acpi_idle_enter_c1(struct cpuidle_device *dev,
753 struct cpuidle_driver *drv, int index)
757 struct acpi_processor *pr;
758 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
759 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
761 pr = __this_cpu_read(processors);
762 dev->last_residency = 0;
769 lapic_timer_state_broadcast(pr, cx, 1);
770 kt1 = ktime_get_real();
771 acpi_idle_do_entry(cx);
772 kt2 = ktime_get_real();
773 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
775 /* Update device last_residency*/
776 dev->last_residency = (int)idle_time;
780 lapic_timer_state_broadcast(pr, cx, 0);
787 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
788 * @dev: the target CPU
789 * @index: the index of suggested state
791 static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
793 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
794 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
796 ACPI_FLUSH_CPU_CACHE();
800 if (cx->entry_method == ACPI_CSTATE_HALT)
802 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
804 /* See comment in acpi_idle_do_entry() */
805 inl(acpi_gbl_FADT.xpm_timer_block.address);
815 * acpi_idle_enter_simple - enters an ACPI state without BM handling
816 * @dev: the target CPU
817 * @drv: cpuidle driver with cpuidle state information
818 * @index: the index of suggested state
820 static int acpi_idle_enter_simple(struct cpuidle_device *dev,
821 struct cpuidle_driver *drv, int index)
823 struct acpi_processor *pr;
824 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
825 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
830 pr = __this_cpu_read(processors);
831 dev->last_residency = 0;
838 if (cx->entry_method != ACPI_CSTATE_FFH) {
839 current_thread_info()->status &= ~TS_POLLING;
841 * TS_POLLING-cleared state must be visible before we test
846 if (unlikely(need_resched())) {
847 current_thread_info()->status |= TS_POLLING;
854 * Must be done before busmaster disable as we might need to
857 lapic_timer_state_broadcast(pr, cx, 1);
859 if (cx->type == ACPI_STATE_C3)
860 ACPI_FLUSH_CPU_CACHE();
862 kt1 = ktime_get_real();
863 /* Tell the scheduler that we are going deep-idle: */
864 sched_clock_idle_sleep_event();
865 acpi_idle_do_entry(cx);
866 kt2 = ktime_get_real();
867 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
868 idle_time = idle_time_ns;
869 do_div(idle_time, NSEC_PER_USEC);
871 /* Update device last_residency*/
872 dev->last_residency = (int)idle_time;
874 /* Tell the scheduler how much we idled: */
875 sched_clock_idle_wakeup_event(idle_time_ns);
878 if (cx->entry_method != ACPI_CSTATE_FFH)
879 current_thread_info()->status |= TS_POLLING;
883 lapic_timer_state_broadcast(pr, cx, 0);
884 cx->time += idle_time;
888 static int c3_cpu_count;
889 static DEFINE_RAW_SPINLOCK(c3_lock);
892 * acpi_idle_enter_bm - enters C3 with proper BM handling
893 * @dev: the target CPU
894 * @drv: cpuidle driver containing state data
895 * @index: the index of suggested state
897 * If BM is detected, the deepest non-C3 idle state is entered instead.
899 static int acpi_idle_enter_bm(struct cpuidle_device *dev,
900 struct cpuidle_driver *drv, int index)
902 struct acpi_processor *pr;
903 struct cpuidle_state_usage *state_usage = &dev->states_usage[index];
904 struct acpi_processor_cx *cx = cpuidle_get_statedata(state_usage);
910 pr = __this_cpu_read(processors);
911 dev->last_residency = 0;
916 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
917 if (drv->safe_state_index >= 0) {
918 return drv->states[drv->safe_state_index].enter(dev,
919 drv, drv->safe_state_index);
930 if (cx->entry_method != ACPI_CSTATE_FFH) {
931 current_thread_info()->status &= ~TS_POLLING;
933 * TS_POLLING-cleared state must be visible before we test
938 if (unlikely(need_resched())) {
939 current_thread_info()->status |= TS_POLLING;
945 acpi_unlazy_tlb(smp_processor_id());
947 /* Tell the scheduler that we are going deep-idle: */
948 sched_clock_idle_sleep_event();
950 * Must be done before busmaster disable as we might need to
953 lapic_timer_state_broadcast(pr, cx, 1);
955 kt1 = ktime_get_real();
958 * bm_check implies we need ARB_DIS
959 * !bm_check implies we need cache flush
960 * bm_control implies whether we can do ARB_DIS
962 * That leaves a case where bm_check is set and bm_control is
963 * not set. In that case we cannot do much, we enter C3
964 * without doing anything.
966 if (pr->flags.bm_check && pr->flags.bm_control) {
967 raw_spin_lock(&c3_lock);
969 /* Disable bus master arbitration when all CPUs are in C3 */
970 if (c3_cpu_count == num_online_cpus())
971 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
972 raw_spin_unlock(&c3_lock);
973 } else if (!pr->flags.bm_check) {
974 ACPI_FLUSH_CPU_CACHE();
977 acpi_idle_do_entry(cx);
979 /* Re-enable bus master arbitration */
980 if (pr->flags.bm_check && pr->flags.bm_control) {
981 raw_spin_lock(&c3_lock);
982 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
984 raw_spin_unlock(&c3_lock);
986 kt2 = ktime_get_real();
987 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
988 idle_time = idle_time_ns;
989 do_div(idle_time, NSEC_PER_USEC);
991 /* Update device last_residency*/
992 dev->last_residency = (int)idle_time;
994 /* Tell the scheduler how much we idled: */
995 sched_clock_idle_wakeup_event(idle_time_ns);
998 if (cx->entry_method != ACPI_CSTATE_FFH)
999 current_thread_info()->status |= TS_POLLING;
1003 lapic_timer_state_broadcast(pr, cx, 0);
1004 cx->time += idle_time;
1008 struct cpuidle_driver acpi_idle_driver = {
1009 .name = "acpi_idle",
1010 .owner = THIS_MODULE,
1014 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
1015 * device i.e. per-cpu data
1017 * @pr: the ACPI processor
1019 static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr)
1021 int i, count = CPUIDLE_DRIVER_STATE_START;
1022 struct acpi_processor_cx *cx;
1023 struct cpuidle_state_usage *state_usage;
1024 struct cpuidle_device *dev = &pr->power.dev;
1026 if (!pr->flags.power_setup_done)
1029 if (pr->flags.power == 0) {
1035 if (max_cstate == 0)
1038 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1039 cx = &pr->power.states[i];
1040 state_usage = &dev->states_usage[count];
1045 #ifdef CONFIG_HOTPLUG_CPU
1046 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1047 !pr->flags.has_cst &&
1048 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1052 cpuidle_set_statedata(state_usage, cx);
1055 if (count == CPUIDLE_STATE_MAX)
1059 dev->state_count = count;
1068 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
1069 * global state data i.e. idle routines
1071 * @pr: the ACPI processor
1073 static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1075 int i, count = CPUIDLE_DRIVER_STATE_START;
1076 struct acpi_processor_cx *cx;
1077 struct cpuidle_state *state;
1078 struct cpuidle_driver *drv = &acpi_idle_driver;
1080 if (!pr->flags.power_setup_done)
1083 if (pr->flags.power == 0)
1086 drv->safe_state_index = -1;
1087 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
1088 drv->states[i].name[0] = '\0';
1089 drv->states[i].desc[0] = '\0';
1092 if (max_cstate == 0)
1095 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1096 cx = &pr->power.states[i];
1101 #ifdef CONFIG_HOTPLUG_CPU
1102 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1103 !pr->flags.has_cst &&
1104 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1108 state = &drv->states[count];
1109 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1110 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1111 state->exit_latency = cx->latency;
1112 state->target_residency = cx->latency * latency_factor;
1117 if (cx->entry_method == ACPI_CSTATE_FFH)
1118 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1120 state->enter = acpi_idle_enter_c1;
1121 state->enter_dead = acpi_idle_play_dead;
1122 drv->safe_state_index = count;
1126 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1127 state->enter = acpi_idle_enter_simple;
1128 state->enter_dead = acpi_idle_play_dead;
1129 drv->safe_state_index = count;
1133 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1134 state->enter = pr->flags.bm_check ?
1135 acpi_idle_enter_bm :
1136 acpi_idle_enter_simple;
1141 if (count == CPUIDLE_STATE_MAX)
1145 drv->state_count = count;
1153 static void acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr) {}
1154 static void acpi_processor_setup_cpuidle_states(struct acpi_processor *pr) {}
1155 #endif /* CONFIG_PROCESSOR_EXTERNAL_CONTROL */
1157 int acpi_processor_hotplug(struct acpi_processor *pr)
1161 if (disabled_by_idle_boot_param())
1171 if (!pr->flags.power_setup_done)
1174 if (processor_pm_external()) {
1175 pr->flags.power = 0;
1176 ret = acpi_processor_get_power_info(pr);
1177 processor_notify_external(pr,
1178 PROCESSOR_PM_CHANGE, PM_TYPE_IDLE);
1182 cpuidle_pause_and_lock();
1183 cpuidle_disable_device(&pr->power.dev);
1184 acpi_processor_get_power_info(pr);
1185 if (pr->flags.power) {
1186 acpi_processor_setup_cpuidle_cx(pr);
1187 ret = cpuidle_enable_device(&pr->power.dev);
1189 cpuidle_resume_and_unlock();
1194 int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1197 struct acpi_processor *_pr;
1199 if (disabled_by_idle_boot_param())
1208 if (!pr->flags.power_setup_done)
1212 * FIXME: Design the ACPI notification to make it once per
1213 * system instead of once per-cpu. This condition is a hack
1214 * to make the code that updates C-States be called once.
1217 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1219 cpuidle_pause_and_lock();
1220 /* Protect against cpu-hotplug */
1223 /* Disable all cpuidle devices */
1224 for_each_online_cpu(cpu) {
1225 _pr = per_cpu(processors, cpu);
1226 if (!_pr || !_pr->flags.power_setup_done)
1228 cpuidle_disable_device(&_pr->power.dev);
1231 /* Populate Updated C-state information */
1232 acpi_processor_setup_cpuidle_states(pr);
1234 /* Enable all cpuidle devices */
1235 for_each_online_cpu(cpu) {
1236 _pr = per_cpu(processors, cpu);
1237 if (!_pr || !_pr->flags.power_setup_done)
1239 acpi_processor_get_power_info(_pr);
1240 if (_pr->flags.power) {
1241 acpi_processor_setup_cpuidle_cx(_pr);
1242 cpuidle_enable_device(&_pr->power.dev);
1246 cpuidle_resume_and_unlock();
1252 static int acpi_processor_registered;
1254 int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1255 struct acpi_device *device)
1257 acpi_status status = 0;
1258 static int first_run;
1260 if (disabled_by_idle_boot_param())
1264 dmi_check_system(processor_power_dmi_table);
1265 max_cstate = acpi_processor_cstate_check(max_cstate);
1266 if (max_cstate < ACPI_C_STATES_MAX)
1268 "ACPI: processor limited to max C-state %d\n",
1276 if (acpi_gbl_FADT.cst_control && !nocst) {
1278 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1279 if (ACPI_FAILURE(status)) {
1280 ACPI_EXCEPTION((AE_INFO, status,
1281 "Notifying BIOS of _CST ability failed"));
1285 acpi_processor_get_power_info(pr);
1286 pr->flags.power_setup_done = 1;
1288 #ifndef CONFIG_PROCESSOR_EXTERNAL_CONTROL
1290 * Install the idle handler if processor power management is supported.
1291 * Note that we use previously set idle handler will be used on
1292 * platforms that only support C1.
1294 if (pr->flags.power) {
1297 /* Register acpi_idle_driver if not already registered */
1298 if (!acpi_processor_registered) {
1299 acpi_processor_setup_cpuidle_states(pr);
1300 retval = cpuidle_register_driver(&acpi_idle_driver);
1303 printk(KERN_DEBUG "ACPI: %s registered with cpuidle\n",
1304 acpi_idle_driver.name);
1306 /* Register per-cpu cpuidle_device. Cpuidle driver
1307 * must already be registered before registering device
1309 acpi_processor_setup_cpuidle_cx(pr);
1310 retval = cpuidle_register_device(&pr->power.dev);
1312 if (acpi_processor_registered == 0)
1313 cpuidle_unregister_driver(&acpi_idle_driver);
1316 acpi_processor_registered++;
1320 if (processor_pm_external())
1321 processor_notify_external(pr,
1322 PROCESSOR_PM_INIT, PM_TYPE_IDLE);
1327 int acpi_processor_power_exit(struct acpi_processor *pr,
1328 struct acpi_device *device)
1330 if (disabled_by_idle_boot_param())
1333 if (pr->flags.power) {
1334 cpuidle_unregister_device(&pr->power.dev);
1335 acpi_processor_registered--;
1336 if (acpi_processor_registered == 0)
1337 cpuidle_unregister_driver(&acpi_idle_driver);
1340 pr->flags.power_setup_done = 0;