2 * Common interrupt code for 32 and 64 bit
5 #include <linux/interrupt.h>
6 #include <linux/kernel_stat.h>
8 #include <linux/seq_file.h>
10 #include <linux/ftrace.h>
11 #include <linux/delay.h>
12 #include <linux/export.h>
15 #include <asm/io_apic.h>
19 #include <asm/hw_irq.h>
22 atomic_t irq_err_count;
24 /* Function pointer for generic interrupt vector handling */
25 void (*x86_platform_ipi_callback)(void) = NULL;
29 * 'what should we do if we get a hw irq event on an illegal vector'.
30 * each architecture has to answer this themselves.
32 void ack_bad_irq(unsigned int irq)
34 if (printk_ratelimit())
35 pr_err("unexpected IRQ trap at vector %02x\n", irq);
39 * Currently unexpected vectors happen only on SMP and APIC.
40 * We _must_ ack these because every local APIC has only N
41 * irq slots per priority level, and a 'hanging, unacked' IRQ
42 * holds up an irq slot - in excessive cases (when multiple
43 * unexpected vectors occur) that might lock up the APIC
45 * But only ack when the APIC is enabled -AK
51 #define irq_stats(x) (&per_cpu(irq_stat, x))
53 * /proc/interrupts printing for arch specific interrupts
55 int arch_show_interrupts(struct seq_file *p, int prec)
59 seq_printf(p, "%*s: ", prec, "NMI");
60 for_each_online_cpu(j)
61 seq_printf(p, "%10u ", irq_stats(j)->__nmi_count);
62 seq_printf(p, " Non-maskable interrupts\n");
63 #ifdef CONFIG_X86_LOCAL_APIC
65 seq_printf(p, "%*s: ", prec, "LOC");
66 for_each_online_cpu(j)
67 seq_printf(p, "%10u ", irq_stats(j)->apic_timer_irqs);
68 seq_printf(p, " Local timer interrupts\n");
70 seq_printf(p, "%*s: ", prec, "SPU");
71 for_each_online_cpu(j)
72 seq_printf(p, "%10u ", irq_stats(j)->irq_spurious_count);
73 seq_printf(p, " Spurious interrupts\n");
74 seq_printf(p, "%*s: ", prec, "PMI");
75 for_each_online_cpu(j)
76 seq_printf(p, "%10u ", irq_stats(j)->apic_perf_irqs);
77 seq_printf(p, " Performance monitoring interrupts\n");
79 seq_printf(p, "%*s: ", prec, "IWI");
80 for_each_online_cpu(j)
81 seq_printf(p, "%10u ", irq_stats(j)->apic_irq_work_irqs);
82 seq_printf(p, " IRQ work interrupts\n");
84 seq_printf(p, "%*s: ", prec, "RTR");
85 for_each_online_cpu(j)
86 seq_printf(p, "%10u ", irq_stats(j)->icr_read_retry_count);
87 seq_printf(p, " APIC ICR read retries\n");
91 if (x86_platform_ipi_callback) {
92 seq_printf(p, "%*s: ", prec, "PLT");
93 for_each_online_cpu(j)
94 seq_printf(p, "%10u ", irq_stats(j)->x86_platform_ipis);
95 seq_printf(p, " Platform interrupts\n");
99 seq_printf(p, "%*s: ", prec, "RES");
100 for_each_online_cpu(j)
101 seq_printf(p, "%10u ", irq_stats(j)->irq_resched_count);
102 seq_printf(p, " Rescheduling interrupts\n");
103 seq_printf(p, "%*s: ", prec, "CAL");
104 for_each_online_cpu(j)
105 seq_printf(p, "%10u ", irq_stats(j)->irq_call_count);
106 seq_printf(p, " Function call interrupts\n");
108 seq_printf(p, "%*s: ", prec, "TLB");
109 for_each_online_cpu(j)
110 seq_printf(p, "%10u ", irq_stats(j)->irq_tlb_count);
111 seq_printf(p, " TLB shootdowns\n");
113 seq_printf(p, "%*s: ", prec, "LCK");
114 for_each_online_cpu(j)
115 seq_printf(p, "%10u ", irq_stats(j)->irq_lock_count);
116 seq_printf(p, " Spinlock wakeups\n");
119 #ifdef CONFIG_X86_THERMAL_VECTOR
120 seq_printf(p, "%*s: ", prec, "TRM");
121 for_each_online_cpu(j)
122 seq_printf(p, "%10u ", irq_stats(j)->irq_thermal_count);
123 seq_printf(p, " Thermal event interrupts\n");
125 #ifdef CONFIG_X86_MCE_THRESHOLD
126 seq_printf(p, "%*s: ", prec, "THR");
127 for_each_online_cpu(j)
128 seq_printf(p, "%10u ", irq_stats(j)->irq_threshold_count);
129 seq_printf(p, " Threshold APIC interrupts\n");
131 #ifdef CONFIG_X86_MCE
132 seq_printf(p, "%*s: ", prec, "MCE");
133 for_each_online_cpu(j)
134 seq_printf(p, "%10u ", per_cpu(mce_exception_count, j));
135 seq_printf(p, " Machine check exceptions\n");
136 seq_printf(p, "%*s: ", prec, "MCP");
137 for_each_online_cpu(j)
138 seq_printf(p, "%10u ", per_cpu(mce_poll_count, j));
139 seq_printf(p, " Machine check polls\n");
142 seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
143 #if defined(CONFIG_X86_IO_APIC)
144 seq_printf(p, "%*s: %10u\n", prec, "MIS", atomic_read(&irq_mis_count));
153 u64 arch_irq_stat_cpu(unsigned int cpu)
155 u64 sum = irq_stats(cpu)->__nmi_count;
157 #ifdef CONFIG_X86_LOCAL_APIC
158 sum += irq_stats(cpu)->apic_timer_irqs;
159 sum += irq_stats(cpu)->irq_spurious_count;
160 sum += irq_stats(cpu)->apic_perf_irqs;
161 sum += irq_stats(cpu)->apic_irq_work_irqs;
162 sum += irq_stats(cpu)->icr_read_retry_count;
165 if (x86_platform_ipi_callback)
166 sum += irq_stats(cpu)->x86_platform_ipis;
169 sum += irq_stats(cpu)->irq_resched_count;
170 sum += irq_stats(cpu)->irq_call_count;
172 sum += irq_stats(cpu)->irq_tlb_count;
174 sum += irq_stats(cpu)->irq_lock_count;
177 #ifdef CONFIG_X86_THERMAL_VECTOR
178 sum += irq_stats(cpu)->irq_thermal_count;
180 #ifdef CONFIG_X86_MCE_THRESHOLD
181 sum += irq_stats(cpu)->irq_threshold_count;
183 #ifdef CONFIG_X86_MCE
184 sum += per_cpu(mce_exception_count, cpu);
185 sum += per_cpu(mce_poll_count, cpu);
190 u64 arch_irq_stat(void)
193 u64 sum = atomic_read(&irq_err_count);
195 #ifdef CONFIG_X86_IO_APIC
196 sum += atomic_read(&irq_mis_count);
207 * do_IRQ handles all normal device IRQ's (the special
208 * SMP cross-CPU interrupts have their own specific
211 unsigned int __irq_entry do_IRQ(struct pt_regs *regs)
213 struct pt_regs *old_regs = set_irq_regs(regs);
215 /* high bit used in ret_from_ code */
216 unsigned vector = ~regs->orig_ax;
222 irq = __this_cpu_read(vector_irq[vector]);
224 if (!handle_irq(irq, regs)) {
227 if (printk_ratelimit())
228 pr_emerg("%s: %d.%d No irq handler for vector (irq %d)\n",
229 __func__, smp_processor_id(), vector, irq);
234 set_irq_regs(old_regs);
239 * Handler for X86_PLATFORM_IPI_VECTOR.
241 void smp_x86_platform_ipi(struct pt_regs *regs)
243 struct pt_regs *old_regs = set_irq_regs(regs);
251 inc_irq_stat(x86_platform_ipis);
253 if (x86_platform_ipi_callback)
254 x86_platform_ipi_callback();
258 set_irq_regs(old_regs);
262 #ifdef CONFIG_HOTPLUG_CPU
263 #include <xen/evtchn.h>
264 /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
265 void fixup_irqs(void)
269 struct irq_desc *desc;
270 struct irq_data *data;
271 struct irq_chip *chip;
272 static DECLARE_BITMAP(irqs_used, NR_IRQS);
274 for_each_irq_desc(irq, desc) {
275 int break_affinity = 0;
276 int set_affinity = 1;
277 const struct cpumask *affinity;
284 /* interrupt's are disabled at this point */
285 raw_spin_lock(&desc->lock);
287 data = irq_desc_get_irq_data(desc);
288 affinity = data->affinity;
289 if (!irq_has_action(irq) || irqd_is_per_cpu(data) ||
290 cpumask_subset(affinity, cpu_online_mask)) {
291 raw_spin_unlock(&desc->lock);
295 if (cpumask_test_cpu(smp_processor_id(), affinity))
296 __set_bit(irq, irqs_used);
298 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) {
300 affinity = cpu_all_mask;
303 chip = irq_data_get_irq_chip(data);
304 if (!irqd_can_move_in_process_context(data) && chip->irq_mask)
305 chip->irq_mask(data);
307 if (chip->irq_set_affinity)
308 chip->irq_set_affinity(data, affinity, true);
309 else if (data->chip != &no_irq_chip && !(warned++))
313 * We unmask if the irq was not marked masked by the
314 * core code. That respects the lazy irq disable
317 if (!irqd_can_move_in_process_context(data) &&
318 !irqd_irq_masked(data) && chip->irq_unmask)
319 chip->irq_unmask(data);
321 raw_spin_unlock(&desc->lock);
323 if (break_affinity && set_affinity)
324 /*printk("Broke affinity for irq %i\n", irq)*/;
325 else if (!set_affinity)
326 printk("Cannot set affinity for irq %i\n", irq);
330 * We can remove mdelay() and then send spuriuous interrupts to
331 * new cpu targets for all the irqs that were handled previously by
332 * this cpu. While it works, I have seen spurious interrupt messages
333 * (nothing wrong but still...).
335 * So for now, retain mdelay(1) and check the IRR and then send those
336 * interrupts to new targets as this cpu is already offlined...
340 for_each_irq_desc(irq, desc) {
341 if (!__test_and_clear_bit(irq, irqs_used))
344 if (xen_test_irq_pending(irq)) {
345 desc = irq_to_desc(irq);
346 data = irq_desc_get_irq_data(desc);
347 chip = irq_data_get_irq_chip(data);
348 raw_spin_lock(&desc->lock);
349 if (chip->irq_retrigger)
350 chip->irq_retrigger(data);
351 raw_spin_unlock(&desc->lock);