include/asm-ia64/sn/iograph.h

   1 /* $Id$
   2  *
   3  * This file is subject to the terms and conditions of the GNU General Public
   4  * License.  See the file "COPYING" in the main directory of this archive
   5  * for more details.
   6  *
   7  * Copyright (C) 1992-1997,2000-2003 Silicon Graphics, Inc. All rights reserved.
   8  */
   9 #ifndef _ASM_IA64_SN_IOGRAPH_H
  10 #define _ASM_IA64_SN_IOGRAPH_H
  11
  12 /*
  13  * During initialization, platform-dependent kernel code establishes some
  14  * basic elements of the hardware graph.  This file contains edge and
  15  * info labels that are used across various platforms -- it serves as an
  16  * ad-hoc registry.
  17  */
  18
  19 /* edges names */
  20 #define EDGE_LBL_BUS                    "bus"
  21 #define EDGE_LBL_CONN                   ".connection"
  22 #define EDGE_LBL_ECP                    "ecp"           /* EPP/ECP plp */
  23 #define EDGE_LBL_ECPP                   "ecpp"
  24 #define EDGE_LBL_GUEST                  ".guest"        /* For IOC3 */
  25 #define EDGE_LBL_HOST                   ".host"         /* For IOC3 */
  26 #define EDGE_LBL_PERFMON                "mon"
  27 #define EDGE_LBL_USRPCI                 "usrpci"
  28 #define EDGE_LBL_VME                    "vmebus"
  29 #define EDGE_LBL_BLOCK                  "block"
  30 #define EDGE_LBL_BOARD                  "board"
  31 #define EDGE_LBL_CHAR                   "char"
  32 #define EDGE_LBL_CONTROLLER             "controller"
  33 #define EDGE_LBL_CPU                    "cpu"
  34 #define EDGE_LBL_CPUNUM                 "cpunum"
  35 #define EDGE_LBL_DIRECT                 "direct"
  36 #define EDGE_LBL_DISABLED               "disabled"
  37 #define EDGE_LBL_DISK                   "disk"
  38 #define EDGE_LBL_DMA_ENGINE             "dma_engine"    /* Only available on
  39                                                            VMEbus now        */
  40 #define EDGE_LBL_NET                    "net"           /* all nw. devs */
  41 #define EDGE_LBL_EF                     "ef"            /* For if_ef ethernet */
  42 #define EDGE_LBL_ET                     "et"            /* For if_ee ethernet */
  43 #define EDGE_LBL_EC                     "ec"            /* For if_ec2 ether */
  44 #define EDGE_LBL_ECF                    "ec"            /* For if_ecf enet */
  45 #define EDGE_LBL_EM                     "ec"            /* For O2 ether */
  46 #define EDGE_LBL_IPG                    "ipg"           /* For IPG FDDI */
  47 #define EDGE_LBL_XPI                    "xpi"           /* For IPG FDDI */
  48 #define EDGE_LBL_HIP                    "hip"           /* For HIPPI */
  49 #define EDGE_LBL_GSN                    "gsn"           /* For GSN */
  50 #define EDGE_LBL_ATM                    "atm"           /* For ATM */
  51 #define EDGE_LBL_FXP                    "fxp"           /* For FXP ether */
  52 #define EDGE_LBL_EP                     "ep"            /* For eplex ether */
  53 #define EDGE_LBL_VFE                    "vfe"           /* For VFE ether */
  54 #define EDGE_LBL_GFE                    "gfe"           /* For GFE ether */
  55 #define EDGE_LBL_RNS                    "rns"           /* RNS PCI FDDI card */
  56 #define EDGE_LBL_MTR                    "mtr"           /* MTR PCI 802.5 card */
  57 #define EDGE_LBL_FV                     "fv"            /* FV VME 802.5 card */
  58 #define EDGE_LBL_GTR                    "gtr"           /* GTR GIO 802.5 card */
  59 #define EDGE_LBL_ISDN                   "isdn"          /* Digi PCI ISDN-BRI card */
  60
  61 #define EDGE_LBL_EISA                   "eisa"
  62 #define EDGE_LBL_ENET                   "ethernet"
  63 #define EDGE_LBL_FLOPPY                 "floppy"
  64 #define EDGE_LBL_PFD                    "pfd"           /* For O2 pfd floppy */
  65 #define EDGE_LBL_FOP                    "fop"           /* Fetchop pseudo device */
  66 #define EDGE_LBL_GIO                    "gio"
  67 #define EDGE_LBL_HEART                  "heart"         /* For RACER */
  68 #define EDGE_LBL_HPC                    "hpc"
  69 #define EDGE_LBL_GFX                    "gfx"
  70 #define EDGE_LBL_HUB                    "hub"           /* For SN0 */
  71 #define EDGE_LBL_HW                     "hw"
  72 #define EDGE_LBL_SYNERGY                "synergy"       /* For SNIA only */
  73 #define EDGE_LBL_IBUS                   "ibus"          /* For EVEREST */
  74 #define EDGE_LBL_INTERCONNECT           "link"
  75 #define EDGE_LBL_IO                     "io"
  76 #define EDGE_LBL_IO4                    "io4"           /* For EVEREST */
  77 #define EDGE_LBL_IOC3                   "ioc3"
  78 #define EDGE_LBL_LUN                    "lun"
  79 #define EDGE_LBL_LINUX                  "linux"
  80 #define EDGE_LBL_LINUX_BUS              EDGE_LBL_LINUX "/bus/pci-x"
  81 #define EDGE_LBL_MACE                   "mace"          /* O2 mace */
  82 #define EDGE_LBL_MACHDEP                "machdep"       /* Platform depedent devices */
  83 #define EDGE_LBL_MASTER                 ".master"
  84 #define EDGE_LBL_MEMORY                 "memory"
  85 #define EDGE_LBL_META_ROUTER            "metarouter"
  86 #define EDGE_LBL_MIDPLANE               "midplane"
  87 #define EDGE_LBL_MODULE                 "module"
  88 #define EDGE_LBL_NODE                   "node"
  89 #define EDGE_LBL_NODENUM                "nodenum"
  90 #define EDGE_LBL_NVRAM                  "nvram"
  91 #define EDGE_LBL_PARTITION              "partition"
  92 #define EDGE_LBL_PCI                    "pci"
  93 #define EDGE_LBL_PCIX                   "pci-x"
  94 #define EDGE_LBL_PCIX_0                 EDGE_LBL_PCIX "/0"
  95 #define EDGE_LBL_PCIX_1                 EDGE_LBL_PCIX "/1"
  96 #define EDGE_LBL_PORT                   "port"
  97 #define EDGE_LBL_PROM                   "prom"
  98 #define EDGE_LBL_RACK                   "rack"
  99 #define EDGE_LBL_RDISK                  "rdisk"
 100 #define EDGE_LBL_REPEATER_ROUTER        "repeaterrouter"
 101 #define EDGE_LBL_ROUTER                 "router"
 102 #define EDGE_LBL_RPOS                   "bay"           /* Position in rack */
 103 #define EDGE_LBL_SCSI                   "scsi"
 104 #define EDGE_LBL_SCSI_CTLR              "scsi_ctlr"
 105 #define EDGE_LBL_SLOT                   "slot"
 106 #define EDGE_LBL_TAPE                   "tape"
 107 #define EDGE_LBL_TARGET                 "target"
 108 #define EDGE_LBL_UNKNOWN                "unknown"
 109 #define EDGE_LBL_VOLUME                 "volume"
 110 #define EDGE_LBL_VOLUME_HEADER          "volume_header"
 111 #define EDGE_LBL_XBOW                   "xbow"
 112 #define EDGE_LBL_XIO                    "xio"
 113 #define EDGE_LBL_XSWITCH                ".xswitch"
 114 #define EDGE_LBL_XTALK                  "xtalk"
 115 #define EDGE_LBL_XWIDGET                "xwidget"
 116 #define EDGE_LBL_ELSC                   "elsc"
 117 #define EDGE_LBL_L1                     "L1"
 118 #define EDGE_LBL_MADGE_TR               "Madge-tokenring"
 119 #define EDGE_LBL_XPLINK                 "xplink"        /* Cross partition */
 120 #define EDGE_LBL_XPLINK_NET             "net"           /* XP network devs */
 121 #define EDGE_LBL_XPLINK_RAW             "raw"           /* XP Raw devs */
 122 #define EDGE_LBL_SLAB                   "slab"          /* Slab of a module */
 123 #define EDGE_LBL_XPLINK_KERNEL          "kernel"        /* XP kernel devs */
 124 #define EDGE_LBL_XPLINK_ADMIN           "admin"         /* Partition admin */
 125 #define EDGE_LBL_KAIO                   "kaio"          /* Kernel async i/o poll */
 126 #define EDGE_LBL_RPS                    "rps"           /* redundant power supply */
 127 #define EDGE_LBL_XBOX_RPS               "xbox_rps"      /* redundant power supply for xbox unit */
 128 #define EDGE_LBL_IOBRICK                "iobrick"
 129 #define EDGE_LBL_PBRICK                 "Pbrick"
 130 #define EDGE_LBL_PEBRICK                "PEbrick"
 131 #define EDGE_LBL_PXBRICK                "PXbrick"
 132 #define EDGE_LBL_IXBRICK                "IXbrick"
 133 #define EDGE_LBL_IBRICK                 "Ibrick"
 134 #define EDGE_LBL_XBRICK                 "Xbrick"
 135 #define EDGE_LBL_CGBRICK                "CGbrick"
 136 #define EDGE_LBL_CPUBUS                 "cpubus"        /* CPU Interfaces (SysAd) */
 137
 138 /* vertex info labels in hwgraph */
 139 #define INFO_LBL_CNODEID                "_cnodeid"
 140 #define INFO_LBL_CONTROLLER_NAME        "_controller_name"
 141 #define INFO_LBL_CPUBUS                 "_cpubus"
 142 #define INFO_LBL_CPUID                  "_cpuid"
 143 #define INFO_LBL_CPU_INFO               "_cpu"
 144 #define INFO_LBL_DETAIL_INVENT          "_detail_invent" /* inventory data*/
 145 #define INFO_LBL_DEVICE_DESC            "_device_desc"
 146 #define INFO_LBL_DIAGVAL                "_diag_reason"   /* Reason disabled */
 147 #define INFO_LBL_DKIOTIME               "_dkiotime"
 148 #define INFO_LBL_DRIVER                 "_driver"       /* points to attached device_driver_t */
 149 #define INFO_LBL_ELSC                   "_elsc"
 150 #define INFO_LBL_SUBCH                  "_subch"        /* system controller subchannel */
 151 #define INFO_LBL_L1SCP                  "_l1scp"        /* points to l1sc_t */
 152 #define INFO_LBL_FC_PORTNAME            "_fc_portname"
 153 #define INFO_LBL_GIOIO                  "_gioio"
 154 #define INFO_LBL_GFUNCS                 "_gioio_ops"    /* ops vector for gio providers */
 155 #define INFO_LBL_HUB_INFO               "_hubinfo"
 156 #define INFO_LBL_HWGFSLIST              "_hwgfs_list"
 157 #define INFO_LBL_TRAVERSE               "_hwg_traverse" /* hwgraph traverse function */
 158 #define INFO_LBL_INVENT                 "_invent"       /* inventory data */
 159 #define INFO_LBL_MLRESET                "_mlreset"      /* present if device preinitialized */
 160 #define INFO_LBL_MODULE_INFO            "_module"       /* module data ptr */
 161 #define INFO_LBL_MONDATA                "_mon"          /* monitor data ptr */
 162 #define INFO_LBL_MDPERF_DATA            "_mdperf"       /* mdperf monitoring*/
 163 #define INFO_LBL_NIC                    "_nic"
 164 #define INFO_LBL_NODE_INFO              "_node"
 165 #define INFO_LBL_PCIBR_HINTS            "_pcibr_hints"
 166 #define INFO_LBL_PCIIO                  "_pciio"
 167 #define INFO_LBL_PFUNCS                 "_pciio_ops"    /* ops vector for gio providers */
 168 #define INFO_LBL_PERMISSIONS            "_permissions"  /* owner, uid, gid */
 169 #define INFO_LBL_ROUTER_INFO            "_router"
 170 #define INFO_LBL_SUBDEVS                "_subdevs"      /* subdevice enable bits */
 171 #define INFO_LBL_VME_FUNCS              "_vmeio_ops"    /* ops vector for VME providers */
 172 #define INFO_LBL_XSWITCH                "_xswitch"
 173 #define INFO_LBL_XSWITCH_ID             "_xswitch_id"
 174 #define INFO_LBL_XSWITCH_VOL            "_xswitch_volunteer"
 175 #define INFO_LBL_XFUNCS                 "_xtalk_ops"    /* ops vector for gio providers */
 176 #define INFO_LBL_XWIDGET                "_xwidget"
 177 #define INFO_LBL_GRIO_DSK               "_grio_disk"    /* guaranteed rate I/O */
 178 #define INFO_LBL_ASYNC_ATTACH           "_async_attach" /* parallel attachment */
 179 #define INFO_LBL_GFXID                  "_gfxid"        /* gfx pipe ID #s */
 180 /* Device/Driver  Admin directive labels  */
 181 #define ADMIN_LBL_INTR_TARGET           "INTR_TARGET"   /* Target cpu for device interrupts*/
 182 #define ADMIN_LBL_INTR_SWLEVEL          "INTR_SWLEVEL"  /* Priority level of the ithread */
 183
 184 #define ADMIN_LBL_DMATRANS_NODE         "PCIBUS_DMATRANS_NODE" /* Node used for
 185                                                                 * 32-bit Direct
 186                                                                 * Mapping I/O
 187                                                                 */
 188 #define ADMIN_LBL_DISABLED              "DISABLE"       /* Device has been disabled */
 189 #define ADMIN_LBL_DETACH                "DETACH"        /* Device has been detached */
 190
 191 #define ADMIN_LBL_THREAD_PRI            "thread_priority"
 192                                                         /* Driver adminstrator
 193                                                          * hint parameter for
 194                                                          * thread priority
 195                                                          */
 196 #define ADMIN_LBL_THREAD_CLASS          "thread_class"
 197                                                         /* Driver adminstrator
 198                                                          * hint parameter for
 199                                                          * thread priority
 200                                                          * default class
 201                                                          */
 202 /* Special reserved info labels (also hwgfs attributes) */
 203 #define _DEVNAME_ATTR           "_devname"      /* device name */
 204 #define _DRIVERNAME_ATTR        "_drivername"   /* driver name */
 205 #define _INVENT_ATTR            "_inventory"    /* device inventory data */
 206 #define _MASTERNODE_ATTR        "_masternode"   /* node that "controls" device */
 207
 208 /* Info labels that begin with '_' cannot be overwritten by an attr_set call */
 209 #define INFO_LBL_RESERVED(name) ((name)[0] == '_')
 210
 211 #if defined(__KERNEL__)
 212 void init_all_devices(void);
 213 #endif /* __KERNEL__ */
 214
 215 #include <asm/sn/xtalk/xbow.h>  /* For get MAX_PORT_NUM */
 216
 217 int io_brick_map_widget(int, int);
 218 int io_path_map_widget(vertex_hdl_t);
 219
 220 /*
 221  * Map a brick's widget number to a meaningful int
 222  */
 223
 224 struct io_brick_map_s {
 225     int                 ibm_type;                  /* brick type */
 226     int                 ibm_map_wid[MAX_PORT_NUM]; /* wid to int map */
 227 };
 228
 229
 230 #endif /* _ASM_IA64_SN_IOGRAPH_H */