3 * This file is subject to the terms and conditions of the GNU General Public
4 * License. See the file "COPYING" in the main directory of this archive
7 * Copyright (C) 2000-2002 Silicon Graphics, Inc. All rights reserved.
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <asm/sn/sn_sal.h>
15 #include <asm/sn/sn_cpuid.h>
16 #include <asm/processor.h>
17 #include <asm/pgtable.h>
19 #include <asm/timex.h>
22 #include <asm/sn/intr.h>
23 #include <asm/hw_irq.h>
24 #include <asm/sn/leds.h>
26 extern int autotest_enabled;
27 long mcatest=0, debug0, debug1, debug2, debug3;
29 #define HDELAY(t) (IS_RUNNING_ON_SIMULATOR() ? udelay(1) : udelay(t))
33 * mactest contains a decimal number (RPTT) where
34 * R - flag, if non zero, run forever
36 * P - identifies when to run the test
37 * 0 execute test at cpu 0 early init
38 * 1 execute test at cpu 0 idle
39 * 2 execute test at last (highest numbered) cpu idle
40 * 3 execute test on all cpus at idle
42 * TT- identifies test to run
43 * 01 = MCA via dup TLB dropin
44 * 02 = MCA via garbage address
45 * 03 = lfetch via garbage address
48 * 07 = INIT non-existent cpu
49 * 10 = IPI stress test. Target cpu 0
50 * 11 = IPI stress test. Target all cpus
51 * 12 = TLB stress test
52 * 13 = Park cpu (spinloop)
53 * 14 = One shot TLB test with tlb spinlock
54 * 15 = One shot TLB test
55 * 16 = One shot TLB test sync'ed with RTC
56 * 20 = set led to the cpuid & spin.
57 * 21 = Try mixed cache/uncached refs & see what happens
58 * 22 = Call SAL reboot
61 static int __init set_mcatest(char *str)
64 get_option(&str, &val);
68 __setup("mcatest=", set_mcatest);
70 static int __init set_debug0(char *str)
73 get_option(&str, &val);
77 __setup("debug0=", set_debug0);
79 static int __init set_debug1(char *str)
82 get_option(&str, &val);
86 __setup("debug1=", set_debug1);
88 static int __init set_debug2(char *str)
91 get_option(&str, &val);
95 __setup("debug2=", set_debug2);
97 static int __init set_debug3(char *str)
100 get_option(&str, &val);
104 __setup("debug3=", set_debug3);
106 static volatile int go;
112 else if (smp_processor_id() == 0)
119 sgi_mcatest_bkpt(void)
126 * pos - 0 called from early init
127 * pos - called when cpu about to go idle (fully initialized
132 long spos, test, repeat;
133 int cpu, curcpu, i, n;
135 //if (IS_RUNNING_ON_SIMULATOR()) mcatest=1323;
136 repeat = mcatest/1000;
137 spos = (mcatest/100)%10;
138 test = mcatest % 100;
139 curcpu = smp_processor_id();
141 if ( mcatest == 0 || !((pos == 0 && spos == 0) ||
142 (pos == 1 && spos == 3) ||
143 (pos == 1 && spos == 1 && curcpu == 0) ||
144 (pos == 1 && spos == 2 && curcpu == smp_num_cpus-1)))
148 if (test == 1 || test == 2 || test == 3) {
150 printk("CPU %d: About to cause unexpected MCA\n", curcpu);
161 long result, adrs[] = {0xe0021000009821e0UL, 0xc0003f3000000000UL, 0xc0000081101c0000UL, 0xc00000180e021004UL, 0xc00000180e022004UL, 0xc00000180e023004UL };
162 long size[] = {1,2,4,8};
165 for (k=0; k<2; k++) {
166 for (i=0; i<6; i++) {
167 for (j=0; j<4; j++) {
168 printk("Probing 0x%lx, size %ld\n", adrs[i], size[j]);
170 r = ia64_sn_probe_io_slot (adrs[i], size[j], &result);
171 printk(" status %d, val 0x%lx\n", r, result);
181 printk("CPU %d: About to send INIT to self (cpu %d)\n", curcpu, cpu);
186 platform_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0);
189 printk("CPU %d: Returned from INIT\n", curcpu);
194 printk("CPU %d: About to send INIT to other cpu (cpu %d)\n", curcpu, cpu);
199 platform_send_ipi(cpu, 0, IA64_IPI_DM_INIT, 0);
202 printk("CPU %d: Done\n", curcpu);
206 printk("CPU %d: About to send INIT to non-existent cpu\n", curcpu);
211 sn_send_IPI_phys(0xffff, 0, IA64_IPI_DM_INIT);
214 printk("CPU %d: Done\n", curcpu);
218 n = IS_RUNNING_ON_SIMULATOR() ? 10 : 10000000;
220 printk("CPU %d: IPI stress test. Target cpu 0\n", curcpu);
226 platform_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0);
229 printk("CPU %d: Done\n", curcpu);
233 n = IS_RUNNING_ON_SIMULATOR() ? 100 : 10000000;
234 printk("CPU %d: IPI stress test. Target all cpus\n", curcpu);
240 for (cpu=0; cpu<smp_num_cpus; cpu++)
241 if (smp_num_cpus > 2 && cpu != curcpu)
242 platform_send_ipi(cpu, IA64_IPI_RESCHEDULE, IA64_IPI_DM_INT, 0);
245 printk("CPU %d: Done\n", curcpu);
249 long adr = 0xe002200000000000UL;
250 n = IS_RUNNING_ON_SIMULATOR() ? 1000 : 100000;
251 printk("CPU %d: TLB flush stress test\n", curcpu);
257 platform_global_tlb_purge(adr, adr+25*PAGE_SIZE, 14);
260 printk("CPU %d: Done\n", curcpu);
264 printk("CPU %d: Park cpu in spinloop\n", curcpu);
267 if (test == 14 || test == 15 || test == 16 || test == 17) {
268 long adr = 0xe002200000000000UL;
271 if (debug0 == 0) debug0 = 1;
274 if (curcpu >= smp_num_cpus-2) {
275 printk("Parking cpu %d\n", curcpu);
279 printk("Waiting cpu %d\n", curcpu);
285 if (test == 16 || test == 17) {
286 unsigned long t, shift, mask;
287 mask = (smp_num_cpus > 16) ? 0x1f : 0xf;
291 if (IS_RUNNING_ON_SIMULATOR())
296 } while (t == curcpu);
299 if (IS_RUNNING_ON_SIMULATOR())
304 } while (t != curcpu);
306 if(debug3) printk("CPU %d: One TLB start\n", curcpu);
307 if (test != 17) platform_global_tlb_purge(adr, adr+PAGE_SIZE*debug0, 14);
308 if(debug3) printk("CPU %d: One TLB flush done\n", curcpu);
312 set_led_bits(smp_processor_id(), 0xff);
316 extern long ia64_mca_stack[];
318 volatile long *p, *up;
319 p = (volatile long*)__imva(ia64_mca_stack);
320 up = (volatile long*)(__pa(p) | __IA64_UNCACHED_OFFSET);
322 if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ get data in cache\n");
323 for (n=0, i=0; i<100; i++)
325 if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Make uncached refs to same data\n");
326 for (n=0, i=0; i<100; i++)
328 if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ dirty the data via cached refs\n");
329 for (n=0, i=0; i<100; i++)
331 if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Make uncached refs to same data\n");
332 for (n=0, i=0; i<100; i++)
334 if(!IS_RUNNING_ON_SIMULATOR()) printk("ZZZ Flushing cache\n");
335 for (n=0, i=0; i<100; i++)
336 ia64_fc((void*)(p+i));
337 printk("ZZZ done\n");
341 volatile long tb, t[10];
342 for (i=0; i<10; i++) {
343 tb = debug3+ia64_get_itc();
345 t[i] = ia64_get_itc() - tb;
347 for (i=0; i<10; i++) {
348 printk("ZZZ NULL 0x%lx\n", t[i]);
350 for (i=0; i<10; i++) {
351 tb = debug3+ia64_get_itc();
352 ia64_pal_call_static(PAL_MC_DRAIN, 0, 0, 0, 0);
353 t[i] = ia64_get_itc() - tb;
355 for (i=0; i<10; i++) {
356 printk("ZZZ DRAIN 0x%lx\n", t[i]);
360 extern void machine_restart(char*);
361 printk("ZZZ machine_restart\n");
365 printk("ZZZ ia64_pal_halt_light\n");
366 ia64_pal_halt_light();