2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * ioc.h: Definitions for SGI I/O Controller
8 * Copyright (C) 1996 David S. Miller
9 * Copyright (C) 1997, 1998, 1999, 2000 Ralf Baechle
10 * Copyright (C) 2001, 2003 Ladislav Michl
16 #include <linux/types.h>
19 * All registers are 8-bit wide alligned on 32-bit boundary. Bad things
20 * happen if you try word access them. You have been warned.
23 struct sgioc_pport_regs {
28 #define SGIOC_PCTRL_STROBE 0x01
29 #define SGIOC_PCTRL_AFD 0x02
30 #define SGIOC_PCTRL_INIT 0x04
31 #define SGIOC_PCTRL_SLIN 0x08
32 #define SGIOC_PCTRL_DIRECTION 0x20
33 #define SGIOC_PCTRL_SEL 0x40
36 #define SGIOC_PSTAT_DEVID 0x03
37 #define SGIOC_PSTAT_NOINK 0x04
38 #define SGIOC_PSTAT_ERROR 0x08
39 #define SGIOC_PSTAT_ONLINE 0x10
40 #define SGIOC_PSTAT_PE 0x20
41 #define SGIOC_PSTAT_ACK 0x40
42 #define SGIOC_PSTAT_BUSY 0x80
59 struct sgioc_uart_regs {
70 struct sgioc_keyb_regs {
79 volatile u8 istat0; /* Interrupt status zero */
80 #define SGINT_ISTAT0_FFULL 0x01
81 #define SGINT_ISTAT0_SCSI0 0x02
82 #define SGINT_ISTAT0_SCSI1 0x04
83 #define SGINT_ISTAT0_ENET 0x08
84 #define SGINT_ISTAT0_GFXDMA 0x10
85 #define SGINT_ISTAT0_PPORT 0x20
86 #define SGINT_ISTAT0_HPC2 0x40
87 #define SGINT_ISTAT0_LIO2 0x80
89 volatile u8 imask0; /* Interrupt mask zero */
91 volatile u8 istat1; /* Interrupt status one */
92 #define SGINT_ISTAT1_ISDNI 0x01
93 #define SGINT_ISTAT1_PWR 0x02
94 #define SGINT_ISTAT1_ISDNH 0x04
95 #define SGINT_ISTAT1_LIO3 0x08
96 #define SGINT_ISTAT1_HPC3 0x10
97 #define SGINT_ISTAT1_AFAIL 0x20
98 #define SGINT_ISTAT1_VIDEO 0x40
99 #define SGINT_ISTAT1_GIO2 0x80
101 volatile u8 imask1; /* Interrupt mask one */
103 volatile u8 vmeistat; /* VME interrupt status */
105 volatile u8 cmeimask0; /* VME interrupt mask zero */
107 volatile u8 cmeimask1; /* VME interrupt mask one */
109 volatile u8 cmepol; /* VME polarity */
113 volatile u8 errstat; /* Error status reg, reserved on INT2 */
116 volatile u8 tcnt0; /* counter 0 */
118 volatile u8 tcnt1; /* counter 1 */
120 volatile u8 tcnt2; /* counter 2 */
122 volatile u8 tcword; /* control word */
123 #define SGINT_TCWORD_BCD 0x01 /* Use BCD mode for counters */
124 #define SGINT_TCWORD_MMASK 0x0e /* Mode bitmask. */
125 #define SGINT_TCWORD_MITC 0x00 /* IRQ on terminal count (doesn't work) */
126 #define SGINT_TCWORD_MOS 0x02 /* One-shot IRQ mode. */
127 #define SGINT_TCWORD_MRGEN 0x04 /* Normal rate generation */
128 #define SGINT_TCWORD_MSWGEN 0x06 /* Square wave generator mode */
129 #define SGINT_TCWORD_MSWST 0x08 /* Software strobe */
130 #define SGINT_TCWORD_MHWST 0x0a /* Hardware strobe */
131 #define SGINT_TCWORD_CMASK 0x30 /* Command mask */
132 #define SGINT_TCWORD_CLAT 0x00 /* Latch command */
133 #define SGINT_TCWORD_CLSB 0x10 /* LSB read/write */
134 #define SGINT_TCWORD_CMSB 0x20 /* MSB read/write */
135 #define SGINT_TCWORD_CALL 0x30 /* Full counter read/write */
136 #define SGINT_TCWORD_CNT0 0x00 /* Select counter zero */
137 #define SGINT_TCWORD_CNT1 0x40 /* Select counter one */
138 #define SGINT_TCWORD_CNT2 0x80 /* Select counter two */
139 #define SGINT_TCWORD_CRBCK 0xc0 /* Readback command */
142 #define SGINT_TCSAMP_COUNTER 10255
144 /* We need software copies of these because they are write only. */
145 extern u8 sgi_ioc_reset, sgi_ioc_write;
148 struct sgioc_pport_regs pport;
150 struct sgioc_uart_regs serport;
151 struct sgioc_keyb_regs kbdmouse;
158 #define SGIOC_PANEL_POWERON 0x01
159 #define SGIOC_PANEL_POWERINTR 0x02
160 #define SGIOC_PANEL_VOLDNINTR 0x10
161 #define SGIOC_PANEL_VOLDNHOLD 0x20
162 #define SGIOC_PANEL_VOLUPINTR 0x40
163 #define SGIOC_PANEL_VOLUPHOLD 0x80
167 #define SGIOC_SYSID_FULLHOUSE 0x01
168 #define SGIOC_SYSID_BOARDREV(x) ((x & 0xe0) > 5)
169 #define SGIOC_SYSID_CHIPREV(x) ((x & 0x1e) > 1)
176 #define SGIOC_DMASEL_SCLK10MHZ 0x00 /* use 10MHZ serial clock */
177 #define SGIOC_DMASEL_ISDNB 0x01 /* enable isdn B */
178 #define SGIOC_DMASEL_ISDNA 0x02 /* enable isdn A */
179 #define SGIOC_DMASEL_PPORT 0x04 /* use parallel DMA */
180 #define SGIOC_DMASEL_SCLK667MHZ 0x10 /* use 6.67MHZ serial clock */
181 #define SGIOC_DMASEL_SCLKEXT 0x20 /* use external serial clock */
185 #define SGIOC_RESET_PPORT 0x01 /* 0=parport reset, 1=nornal */
186 #define SGIOC_RESET_KBDMOUSE 0x02 /* 0=kbdmouse reset, 1=normal */
187 #define SGIOC_RESET_EISA 0x04 /* 0=eisa reset, 1=normal */
188 #define SGIOC_RESET_ISDN 0x08 /* 0=isdn reset, 1=normal */
189 #define SGIOC_RESET_LC0OFF 0x10 /* guiness: turn led off (red, else green) */
190 #define SGIOC_RESET_LC1OFF 0x20 /* guiness: turn led off (green, else amber) */
194 #define SGIOC_WRITE_NTHRESH 0x01 /* use 4.5db threshhold */
195 #define SGIOC_WRITE_TPSPEED 0x02 /* use 100ohm TP speed */
196 #define SGIOC_WRITE_EPSEL 0x04 /* force cable mode: 1=AUI 0=TP */
197 #define SGIOC_WRITE_EASEL 0x08 /* 1=autoselect 0=manual cable selection */
198 #define SGIOC_WRITE_U1AMODE 0x10 /* 1=PC 0=MAC UART mode */
199 #define SGIOC_WRITE_U0AMODE 0x20 /* 1=PC 0=MAC UART mode */
200 #define SGIOC_WRITE_MLO 0x40 /* 1=4.75V 0=+5V */
201 #define SGIOC_WRITE_MHI 0x80 /* 1=5.25V 0=+5V */
203 struct sgint_regs int3;
206 extern struct sgioc_regs *sgioc;
207 extern struct sgint_regs *sgint;