drivers/net/wireless/rtlwifi/pci.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2009-2010  Realtek Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * wlanfae <wlanfae@realtek.com>
  23  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24  * Hsinchu 300, Taiwan.
  25  *
  26  * Larry Finger <Larry.Finger@lwfinger.net>
  27  *
  28  *****************************************************************************/
  29
  30 #include "core.h"
  31 #include "wifi.h"
  32 #include "pci.h"
  33 #include "base.h"
  34 #include "ps.h"
  35 #include "efuse.h"
  36
  37 static const u16 pcibridge_vendors[PCI_BRIDGE_VENDOR_MAX] = {
  38         INTEL_VENDOR_ID,
  39         ATI_VENDOR_ID,
  40         AMD_VENDOR_ID,
  41         SIS_VENDOR_ID
  42 };
  43
  44 static const u8 ac_to_hwq[] = {
  45         VO_QUEUE,
  46         VI_QUEUE,
  47         BE_QUEUE,
  48         BK_QUEUE
  49 };
  50
  51 static u8 _rtl_mac_to_hwqueue(struct ieee80211_hw *hw,
  52                        struct sk_buff *skb)
  53 {
  54         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  55         __le16 fc = rtl_get_fc(skb);
  56         u8 queue_index = skb_get_queue_mapping(skb);
  57
  58         if (unlikely(ieee80211_is_beacon(fc)))
  59                 return BEACON_QUEUE;
  60         if (ieee80211_is_mgmt(fc))
  61                 return MGNT_QUEUE;
  62         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
  63                 if (ieee80211_is_nullfunc(fc))
  64                         return HIGH_QUEUE;
  65
  66         return ac_to_hwq[queue_index];
  67 }
  68
  69 /* Update PCI dependent default settings*/
  70 static void _rtl_pci_update_default_setting(struct ieee80211_hw *hw)
  71 {
  72         struct rtl_priv *rtlpriv = rtl_priv(hw);
  73         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
  74         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  75         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  76         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
  77         u8 init_aspm;
  78
  79         ppsc->reg_rfps_level = 0;
  80         ppsc->support_aspm = 0;
  81
  82         /*Update PCI ASPM setting */
  83         ppsc->const_amdpci_aspm = rtlpci->const_amdpci_aspm;
  84         switch (rtlpci->const_pci_aspm) {
  85         case 0:
  86                 /*No ASPM */
  87                 break;
  88
  89         case 1:
  90                 /*ASPM dynamically enabled/disable. */
  91                 ppsc->reg_rfps_level |= RT_RF_LPS_LEVEL_ASPM;
  92                 break;
  93
  94         case 2:
  95                 /*ASPM with Clock Req dynamically enabled/disable. */
  96                 ppsc->reg_rfps_level |= (RT_RF_LPS_LEVEL_ASPM |
  97                                          RT_RF_OFF_LEVL_CLK_REQ);
  98                 break;
  99
 100         case 3:
 101                 /*
 102                  * Always enable ASPM and Clock Req
 103                  * from initialization to halt.
 104                  * */
 105                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM);
 106                 ppsc->reg_rfps_level |= (RT_RF_PS_LEVEL_ALWAYS_ASPM |
 107                                          RT_RF_OFF_LEVL_CLK_REQ);
 108                 break;
 109
 110         case 4:
 111                 /*
 112                  * Always enable ASPM without Clock Req
 113                  * from initialization to halt.
 114                  * */
 115                 ppsc->reg_rfps_level &= ~(RT_RF_LPS_LEVEL_ASPM |
 116                                           RT_RF_OFF_LEVL_CLK_REQ);
 117                 ppsc->reg_rfps_level |= RT_RF_PS_LEVEL_ALWAYS_ASPM;
 118                 break;
 119         }
 120
 121         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 122
 123         /*Update Radio OFF setting */
 124         switch (rtlpci->const_hwsw_rfoff_d3) {
 125         case 1:
 126                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 127                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 128                 break;
 129
 130         case 2:
 131                 if (ppsc->reg_rfps_level & RT_RF_LPS_LEVEL_ASPM)
 132                         ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_ASPM;
 133                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_HALT_NIC;
 134                 break;
 135
 136         case 3:
 137                 ppsc->reg_rfps_level |= RT_RF_OFF_LEVL_PCI_D3;
 138                 break;
 139         }
 140
 141         /*Set HW definition to determine if it supports ASPM. */
 142         switch (rtlpci->const_support_pciaspm) {
 143         case 0:{
 144                         /*Not support ASPM. */
 145                         bool support_aspm = false;
 146                         ppsc->support_aspm = support_aspm;
 147                         break;
 148                 }
 149         case 1:{
 150                         /*Support ASPM. */
 151                         bool support_aspm = true;
 152                         bool support_backdoor = true;
 153                         ppsc->support_aspm = support_aspm;
 154
 155                         /*if (priv->oem_id == RT_CID_TOSHIBA &&
 156                            !priv->ndis_adapter.amd_l1_patch)
 157                            support_backdoor = false; */
 158
 159                         ppsc->support_backdoor = support_backdoor;
 160
 161                         break;
 162                 }
 163         case 2:
 164                 /*ASPM value set by chipset. */
 165                 if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) {
 166                         bool support_aspm = true;
 167                         ppsc->support_aspm = support_aspm;
 168                 }
 169                 break;
 170         default:
 171                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
 172                          ("switch case not process\n"));
 173                 break;
 174         }
 175
 176         /* toshiba aspm issue, toshiba will set aspm selfly
 177          * so we should not set aspm in driver */
 178         pci_read_config_byte(rtlpci->pdev, 0x80, &init_aspm);
 179         if (rtlpriv->rtlhal.hw_type == HARDWARE_TYPE_RTL8192SE &&
 180                 init_aspm == 0x43)
 181                 ppsc->support_aspm = false;
 182 }
 183
 184 static bool _rtl_pci_platform_switch_device_pci_aspm(
 185                         struct ieee80211_hw *hw,
 186                         u8 value)
 187 {
 188         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 189         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 190
 191         if (rtlhal->hw_type != HARDWARE_TYPE_RTL8192SE)
 192                 value |= 0x40;
 193
 194         pci_write_config_byte(rtlpci->pdev, 0x80, value);
 195
 196         return false;
 197 }
 198
 199 /*When we set 0x01 to enable clk request. Set 0x0 to disable clk req.*/
 200 static bool _rtl_pci_switch_clk_req(struct ieee80211_hw *hw, u8 value)
 201 {
 202         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 203         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 204
 205         pci_write_config_byte(rtlpci->pdev, 0x81, value);
 206
 207         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE)
 208                 udelay(100);
 209
 210         return true;
 211 }
 212
 213 /*Disable RTL8192SE ASPM & Disable Pci Bridge ASPM*/
 214 static void rtl_pci_disable_aspm(struct ieee80211_hw *hw)
 215 {
 216         struct rtl_priv *rtlpriv = rtl_priv(hw);
 217         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 218         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 219         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 220         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 221         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 222         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 223         /*Retrieve original configuration settings. */
 224         u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg;
 225         u16 pcibridge_linkctrlreg = pcipriv->ndis_adapter.
 226                                 pcibridge_linkctrlreg;
 227         u16 aspmlevel = 0;
 228         u8 tmp_u1b = 0;
 229
 230         if (!ppsc->support_aspm)
 231                 return;
 232
 233         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 234                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 235                          ("PCI(Bridge) UNKNOWN.\n"));
 236
 237                 return;
 238         }
 239
 240         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 241                 RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 242                 _rtl_pci_switch_clk_req(hw, 0x0);
 243         }
 244
 245         /*for promising device will in L0 state after an I/O. */
 246         pci_read_config_byte(rtlpci->pdev, 0x80, &tmp_u1b);
 247
 248         /*Set corresponding value. */
 249         aspmlevel |= BIT(0) | BIT(1);
 250         linkctrl_reg &= ~aspmlevel;
 251         pcibridge_linkctrlreg &= ~(BIT(0) | BIT(1));
 252
 253         _rtl_pci_platform_switch_device_pci_aspm(hw, linkctrl_reg);
 254         udelay(50);
 255
 256         /*4 Disable Pci Bridge ASPM */
 257         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 258                                      pcicfg_addrport + (num4bytes << 2));
 259         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg);
 260
 261         udelay(50);
 262 }
 263
 264 /*
 265  *Enable RTL8192SE ASPM & Enable Pci Bridge ASPM for
 266  *power saving We should follow the sequence to enable
 267  *RTL8192SE first then enable Pci Bridge ASPM
 268  *or the system will show bluescreen.
 269  */
 270 static void rtl_pci_enable_aspm(struct ieee80211_hw *hw)
 271 {
 272         struct rtl_priv *rtlpriv = rtl_priv(hw);
 273         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 274         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 275         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 276         u8 pcibridge_busnum = pcipriv->ndis_adapter.pcibridge_busnum;
 277         u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum;
 278         u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum;
 279         u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor;
 280         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 281         u8 num4bytes = pcipriv->ndis_adapter.num4bytes;
 282         u16 aspmlevel;
 283         u8 u_pcibridge_aspmsetting;
 284         u8 u_device_aspmsetting;
 285
 286         if (!ppsc->support_aspm)
 287                 return;
 288
 289         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_UNKNOWN) {
 290                 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
 291                          ("PCI(Bridge) UNKNOWN.\n"));
 292                 return;
 293         }
 294
 295         /*4 Enable Pci Bridge ASPM */
 296         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 297                                      pcicfg_addrport + (num4bytes << 2));
 298
 299         u_pcibridge_aspmsetting =
 300             pcipriv->ndis_adapter.pcibridge_linkctrlreg |
 301             rtlpci->const_hostpci_aspm_setting;
 302
 303         if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL)
 304                 u_pcibridge_aspmsetting &= ~BIT(0);
 305
 306         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting);
 307
 308         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
 309                  ("PlatformEnableASPM():PciBridge busnumber[%x], "
 310                   "DevNumbe[%x], funcnumber[%x], Write reg[%x] = %x\n",
 311                   pcibridge_busnum, pcibridge_devnum, pcibridge_funcnum,
 312                   (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10),
 313                   u_pcibridge_aspmsetting));
 314
 315         udelay(50);
 316
 317         /*Get ASPM level (with/without Clock Req) */
 318         aspmlevel = rtlpci->const_devicepci_aspm_setting;
 319         u_device_aspmsetting = pcipriv->ndis_adapter.linkctrl_reg;
 320
 321         /*_rtl_pci_platform_switch_device_pci_aspm(dev,*/
 322         /*(priv->ndis_adapter.linkctrl_reg | ASPMLevel)); */
 323
 324         u_device_aspmsetting |= aspmlevel;
 325
 326         _rtl_pci_platform_switch_device_pci_aspm(hw, u_device_aspmsetting);
 327
 328         if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_CLK_REQ) {
 329                 _rtl_pci_switch_clk_req(hw, (ppsc->reg_rfps_level &
 330                                              RT_RF_OFF_LEVL_CLK_REQ) ? 1 : 0);
 331                 RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_CLK_REQ);
 332         }
 333         udelay(100);
 334 }
 335
 336 static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw)
 337 {
 338         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 339         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 340
 341         bool status = false;
 342         u8 offset_e0;
 343         unsigned offset_e4;
 344
 345         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 346                         pcicfg_addrport + 0xE0);
 347         rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0);
 348
 349         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 350                         pcicfg_addrport + 0xE0);
 351         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0);
 352
 353         if (offset_e0 == 0xA0) {
 354                 rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 355                                              pcicfg_addrport + 0xE4);
 356                 rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4);
 357                 if (offset_e4 & BIT(23))
 358                         status = true;
 359         }
 360
 361         return status;
 362 }
 363
 364 static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw)
 365 {
 366         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 367         u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset;
 368         u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport;
 369         u8 linkctrl_reg;
 370         u8 num4bbytes;
 371
 372         num4bbytes = (capabilityoffset + 0x10) / 4;
 373
 374         /*Read  Link Control Register */
 375         rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS,
 376                                      pcicfg_addrport + (num4bbytes << 2));
 377         rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg);
 378
 379         pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg;
 380 }
 381
 382 static void rtl_pci_parse_configuration(struct pci_dev *pdev,
 383                 struct ieee80211_hw *hw)
 384 {
 385         struct rtl_priv *rtlpriv = rtl_priv(hw);
 386         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
 387
 388         u8 tmp;
 389         int pos;
 390         u8 linkctrl_reg;
 391
 392         /*Link Control Register */
 393         pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
 394         pci_read_config_byte(pdev, pos + PCI_EXP_LNKCTL, &linkctrl_reg);
 395         pcipriv->ndis_adapter.linkctrl_reg = linkctrl_reg;
 396
 397         RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
 398                  ("Link Control Register =%x\n",
 399                   pcipriv->ndis_adapter.linkctrl_reg));
 400
 401         pci_read_config_byte(pdev, 0x98, &tmp);
 402         tmp |= BIT(4);
 403         pci_write_config_byte(pdev, 0x98, tmp);
 404
 405         tmp = 0x17;
 406         pci_write_config_byte(pdev, 0x70f, tmp);
 407 }
 408
 409 static void rtl_pci_init_aspm(struct ieee80211_hw *hw)
 410 {
 411         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
 412
 413         _rtl_pci_update_default_setting(hw);
 414
 415         if (ppsc->reg_rfps_level & RT_RF_PS_LEVEL_ALWAYS_ASPM) {
 416                 /*Always enable ASPM & Clock Req. */
 417                 rtl_pci_enable_aspm(hw);
 418                 RT_SET_PS_LEVEL(ppsc, RT_RF_PS_LEVEL_ALWAYS_ASPM);
 419         }
 420
 421 }
 422
 423 static void _rtl_pci_io_handler_init(struct device *dev,
 424                                      struct ieee80211_hw *hw)
 425 {
 426         struct rtl_priv *rtlpriv = rtl_priv(hw);
 427
 428         rtlpriv->io.dev = dev;
 429
 430         rtlpriv->io.write8_async = pci_write8_async;
 431         rtlpriv->io.write16_async = pci_write16_async;
 432         rtlpriv->io.write32_async = pci_write32_async;
 433
 434         rtlpriv->io.read8_sync = pci_read8_sync;
 435         rtlpriv->io.read16_sync = pci_read16_sync;
 436         rtlpriv->io.read32_sync = pci_read32_sync;
 437
 438 }
 439
 440 static void _rtl_pci_io_handler_release(struct ieee80211_hw *hw)
 441 {
 442 }
 443
 444 static bool _rtl_update_earlymode_info(struct ieee80211_hw *hw,
 445                 struct sk_buff *skb, struct rtl_tcb_desc *tcb_desc, u8 tid)
 446 {
 447         struct rtl_priv *rtlpriv = rtl_priv(hw);
 448         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 449         u8 additionlen = FCS_LEN;
 450         struct sk_buff *next_skb;
 451
 452         /* here open is 4, wep/tkip is 8, aes is 12*/
 453         if (info->control.hw_key)
 454                 additionlen += info->control.hw_key->icv_len;
 455
 456         /* The most skb num is 6 */
 457         tcb_desc->empkt_num = 0;
 458         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 459         skb_queue_walk(&rtlpriv->mac80211.skb_waitq[tid], next_skb) {
 460                 struct ieee80211_tx_info *next_info;
 461
 462                 next_info = IEEE80211_SKB_CB(next_skb);
 463                 if (next_info->flags & IEEE80211_TX_CTL_AMPDU) {
 464                         tcb_desc->empkt_len[tcb_desc->empkt_num] =
 465                                 next_skb->len + additionlen;
 466                         tcb_desc->empkt_num++;
 467                 } else {
 468                         break;
 469                 }
 470
 471                 if (skb_queue_is_last(&rtlpriv->mac80211.skb_waitq[tid],
 472                                       next_skb))
 473                         break;
 474
 475                 if (tcb_desc->empkt_num >= 5)
 476                         break;
 477         }
 478         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 479
 480         return true;
 481 }
 482
 483 /* just for early mode now */
 484 static void _rtl_pci_tx_chk_waitq(struct ieee80211_hw *hw)
 485 {
 486         struct rtl_priv *rtlpriv = rtl_priv(hw);
 487         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 488         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 489         struct sk_buff *skb = NULL;
 490         struct ieee80211_tx_info *info = NULL;
 491         int tid; /* should be int */
 492
 493         if (!rtlpriv->rtlhal.earlymode_enable)
 494                 return;
 495
 496         /* we juse use em for BE/BK/VI/VO */
 497         for (tid = 7; tid >= 0; tid--) {
 498                 u8 hw_queue = ac_to_hwq[rtl_tid_to_ac(hw, tid)];
 499                 struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
 500                 while (!mac->act_scanning &&
 501                        rtlpriv->psc.rfpwr_state == ERFON) {
 502                         struct rtl_tcb_desc tcb_desc;
 503                         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 504
 505                         spin_lock_bh(&rtlpriv->locks.waitq_lock);
 506                         if (!skb_queue_empty(&mac->skb_waitq[tid]) &&
 507                            (ring->entries - skb_queue_len(&ring->queue) > 5)) {
 508                                 skb = skb_dequeue(&mac->skb_waitq[tid]);
 509                         } else {
 510                                 spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 511                                 break;
 512                         }
 513                         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
 514
 515                         /* Some macaddr can't do early mode. like
 516                          * multicast/broadcast/no_qos data */
 517                         info = IEEE80211_SKB_CB(skb);
 518                         if (info->flags & IEEE80211_TX_CTL_AMPDU)
 519                                 _rtl_update_earlymode_info(hw, skb,
 520                                                            &tcb_desc, tid);
 521
 522                         rtlpriv->intf_ops->adapter_tx(hw, skb, &tcb_desc);
 523                 }
 524         }
 525 }
 526
 527
 528 static void _rtl_pci_tx_isr(struct ieee80211_hw *hw, int prio)
 529 {
 530         struct rtl_priv *rtlpriv = rtl_priv(hw);
 531         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 532
 533         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
 534
 535         while (skb_queue_len(&ring->queue)) {
 536                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
 537                 struct sk_buff *skb;
 538                 struct ieee80211_tx_info *info;
 539                 __le16 fc;
 540                 u8 tid;
 541
 542                 u8 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) entry, true,
 543                                                           HW_DESC_OWN);
 544
 545                 /*
 546                  *beacon packet will only use the first
 547                  *descriptor defautly,and the own may not
 548                  *be cleared by the hardware
 549                  */
 550                 if (own)
 551                         return;
 552                 ring->idx = (ring->idx + 1) % ring->entries;
 553
 554                 skb = __skb_dequeue(&ring->queue);
 555                 pci_unmap_single(rtlpci->pdev,
 556                                  rtlpriv->cfg->ops->
 557                                              get_desc((u8 *) entry, true,
 558                                                       HW_DESC_TXBUFF_ADDR),
 559                                  skb->len, PCI_DMA_TODEVICE);
 560
 561                 /* remove early mode header */
 562                 if (rtlpriv->rtlhal.earlymode_enable)
 563                         skb_pull(skb, EM_HDR_LEN);
 564
 565                 RT_TRACE(rtlpriv, (COMP_INTR | COMP_SEND), DBG_TRACE,
 566                          ("new ring->idx:%d, "
 567                           "free: skb_queue_len:%d, free: seq:%x\n",
 568                           ring->idx,
 569                           skb_queue_len(&ring->queue),
 570                           *(u16 *) (skb->data + 22)));
 571
 572                 if (prio == TXCMD_QUEUE) {
 573                         dev_kfree_skb(skb);
 574                         goto tx_status_ok;
 575
 576                 }
 577
 578                 /* for sw LPS, just after NULL skb send out, we can
 579                  * sure AP kown we are sleeped, our we should not let
 580                  * rf to sleep*/
 581                 fc = rtl_get_fc(skb);
 582                 if (ieee80211_is_nullfunc(fc)) {
 583                         if (ieee80211_has_pm(fc)) {
 584                                 rtlpriv->mac80211.offchan_deley = true;
 585                                 rtlpriv->psc.state_inap = 1;
 586                         } else {
 587                                 rtlpriv->psc.state_inap = 0;
 588                         }
 589                 }
 590
 591                 /* update tid tx pkt num */
 592                 tid = rtl_get_tid(skb);
 593                 if (tid <= 7)
 594                         rtlpriv->link_info.tidtx_inperiod[tid]++;
 595
 596                 info = IEEE80211_SKB_CB(skb);
 597                 ieee80211_tx_info_clear_status(info);
 598
 599                 info->flags |= IEEE80211_TX_STAT_ACK;
 600                 /*info->status.rates[0].count = 1; */
 601
 602                 ieee80211_tx_status_irqsafe(hw, skb);
 603
 604                 if ((ring->entries - skb_queue_len(&ring->queue))
 605                                 == 2) {
 606
 607                         RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
 608                                         ("more desc left, wake"
 609                                          "skb_queue@%d,ring->idx = %d,"
 610                                          "skb_queue_len = 0x%d\n",
 611                                          prio, ring->idx,
 612                                          skb_queue_len(&ring->queue)));
 613
 614                         ieee80211_wake_queue(hw,
 615                                         skb_get_queue_mapping
 616                                         (skb));
 617                 }
 618 tx_status_ok:
 619                 skb = NULL;
 620         }
 621
 622         if (((rtlpriv->link_info.num_rx_inperiod +
 623                 rtlpriv->link_info.num_tx_inperiod) > 8) ||
 624                 (rtlpriv->link_info.num_rx_inperiod > 2)) {
 625                 tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 626         }
 627 }
 628
 629 static void _rtl_pci_rx_interrupt(struct ieee80211_hw *hw)
 630 {
 631         struct rtl_priv *rtlpriv = rtl_priv(hw);
 632         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 633         int rx_queue_idx = RTL_PCI_RX_MPDU_QUEUE;
 634
 635         struct ieee80211_rx_status rx_status = { 0 };
 636         unsigned int count = rtlpci->rxringcount;
 637         u8 own;
 638         u8 tmp_one;
 639         u32 bufferaddress;
 640         bool unicast = false;
 641
 642         struct rtl_stats stats = {
 643                 .signal = 0,
 644                 .noise = -98,
 645                 .rate = 0,
 646         };
 647         int index = rtlpci->rx_ring[rx_queue_idx].idx;
 648
 649         /*RX NORMAL PKT */
 650         while (count--) {
 651                 /*rx descriptor */
 652                 struct rtl_rx_desc *pdesc = &rtlpci->rx_ring[rx_queue_idx].desc[
 653                                 index];
 654                 /*rx pkt */
 655                 struct sk_buff *skb = rtlpci->rx_ring[rx_queue_idx].rx_buf[
 656                                 index];
 657                 struct ieee80211_hdr *hdr;
 658                 __le16 fc;
 659                 struct sk_buff *new_skb = NULL;
 660
 661                 own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
 662                                                        false, HW_DESC_OWN);
 663
 664                 /*wait data to be filled by hardware */
 665                 if (own)
 666                         break;
 667
 668                 rtlpriv->cfg->ops->query_rx_desc(hw, &stats,
 669                                                  &rx_status,
 670                                                  (u8 *) pdesc, skb);
 671
 672                 if (stats.crc || stats.hwerror)
 673                         goto done;
 674
 675                 new_skb = dev_alloc_skb(rtlpci->rxbuffersize);
 676                 if (unlikely(!new_skb)) {
 677                         RT_TRACE(rtlpriv, (COMP_INTR | COMP_RECV),
 678                                  DBG_DMESG,
 679                                  ("can't alloc skb for rx\n"));
 680                         goto done;
 681                 }
 682
 683                 pci_unmap_single(rtlpci->pdev,
 684                                  *((dma_addr_t *) skb->cb),
 685                                  rtlpci->rxbuffersize,
 686                                  PCI_DMA_FROMDEVICE);
 687
 688                 skb_put(skb, rtlpriv->cfg->ops->get_desc((u8 *) pdesc, false,
 689                         HW_DESC_RXPKT_LEN));
 690                 skb_reserve(skb, stats.rx_drvinfo_size + stats.rx_bufshift);
 691
 692                 /*
 693                  * NOTICE This can not be use for mac80211,
 694                  * this is done in mac80211 code,
 695                  * if you done here sec DHCP will fail
 696                  * skb_trim(skb, skb->len - 4);
 697                  */
 698
 699                 hdr = rtl_get_hdr(skb);
 700                 fc = rtl_get_fc(skb);
 701
 702                 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status,
 703                        sizeof(rx_status));
 704
 705                 if (is_broadcast_ether_addr(hdr->addr1)) {
 706                         ;/*TODO*/
 707                 } else if (is_multicast_ether_addr(hdr->addr1)) {
 708                         ;/*TODO*/
 709                 } else {
 710                         unicast = true;
 711                         rtlpriv->stats.rxbytesunicast += skb->len;
 712                 }
 713
 714                 rtl_is_special_data(hw, skb, false);
 715
 716                 if (ieee80211_is_data(fc)) {
 717                         rtlpriv->cfg->ops->led_control(hw, LED_CTL_RX);
 718
 719                         if (unicast)
 720                                 rtlpriv->link_info.num_rx_inperiod++;
 721                 }
 722
 723                 /* for sw lps */
 724                 rtl_swlps_beacon(hw, (void *)skb->data, skb->len);
 725                 rtl_recognize_peer(hw, (void *)skb->data, skb->len);
 726                 if ((rtlpriv->mac80211.opmode == NL80211_IFTYPE_AP) &&
 727                     (rtlpriv->rtlhal.current_bandtype == BAND_ON_2_4G) &&
 728                      (ieee80211_is_beacon(fc) ||
 729                      ieee80211_is_probe_resp(fc))) {
 730                         dev_kfree_skb_any(skb);
 731                 } else {
 732                         if (unlikely(!rtl_action_proc(hw, skb, false))) {
 733                                 dev_kfree_skb_any(skb);
 734                         } else {
 735                                 struct sk_buff *uskb = NULL;
 736                                 u8 *pdata;
 737                                 uskb = dev_alloc_skb(skb->len + 128);
 738                                 memcpy(IEEE80211_SKB_RXCB(uskb),
 739                                        &rx_status, sizeof(rx_status));
 740                                 pdata = (u8 *)skb_put(uskb, skb->len);
 741                                 memcpy(pdata, skb->data, skb->len);
 742                                 dev_kfree_skb_any(skb);
 743
 744                                 ieee80211_rx_irqsafe(hw, uskb);
 745                         }
 746                 }
 747
 748                 if (((rtlpriv->link_info.num_rx_inperiod +
 749                         rtlpriv->link_info.num_tx_inperiod) > 8) ||
 750                         (rtlpriv->link_info.num_rx_inperiod > 2)) {
 751                         tasklet_schedule(&rtlpriv->works.ips_leave_tasklet);
 752                 }
 753
 754                 skb = new_skb;
 755
 756                 rtlpci->rx_ring[rx_queue_idx].rx_buf[index] = skb;
 757                 *((dma_addr_t *) skb->cb) =
 758                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
 759                                            rtlpci->rxbuffersize,
 760                                            PCI_DMA_FROMDEVICE);
 761
 762 done:
 763                 bufferaddress = (*((dma_addr_t *)skb->cb));
 764                 tmp_one = 1;
 765                 rtlpriv->cfg->ops->set_desc((u8 *) pdesc, false,
 766                                             HW_DESC_RXBUFF_ADDR,
 767                                             (u8 *)&bufferaddress);
 768                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 769                                             HW_DESC_RXPKT_LEN,
 770                                             (u8 *)&rtlpci->rxbuffersize);
 771
 772                 if (index == rtlpci->rxringcount - 1)
 773                         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false,
 774                                                     HW_DESC_RXERO,
 775                                                     (u8 *)&tmp_one);
 776
 777                 rtlpriv->cfg->ops->set_desc((u8 *)pdesc, false, HW_DESC_RXOWN,
 778                                             (u8 *)&tmp_one);
 779
 780                 index = (index + 1) % rtlpci->rxringcount;
 781         }
 782
 783         rtlpci->rx_ring[rx_queue_idx].idx = index;
 784 }
 785
 786 static irqreturn_t _rtl_pci_interrupt(int irq, void *dev_id)
 787 {
 788         struct ieee80211_hw *hw = dev_id;
 789         struct rtl_priv *rtlpriv = rtl_priv(hw);
 790         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 791         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 792         unsigned long flags;
 793         u32 inta = 0;
 794         u32 intb = 0;
 795
 796         if (rtlpci->irq_enabled == 0)
 797                 return IRQ_HANDLED;
 798
 799         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
 800
 801         /*read ISR: 4/8bytes */
 802         rtlpriv->cfg->ops->interrupt_recognized(hw, &inta, &intb);
 803
 804         /*Shared IRQ or HW disappared */
 805         if (!inta || inta == 0xffff)
 806                 goto done;
 807
 808         /*<1> beacon related */
 809         if (inta & rtlpriv->cfg->maps[RTL_IMR_TBDOK]) {
 810                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 811                          ("beacon ok interrupt!\n"));
 812         }
 813
 814         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TBDER])) {
 815                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 816                          ("beacon err interrupt!\n"));
 817         }
 818
 819         if (inta & rtlpriv->cfg->maps[RTL_IMR_BDOK]) {
 820                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 821                          ("beacon interrupt!\n"));
 822         }
 823
 824         if (inta & rtlpriv->cfg->maps[RTL_IMR_BcnInt]) {
 825                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 826                          ("prepare beacon for interrupt!\n"));
 827                 tasklet_schedule(&rtlpriv->works.irq_prepare_bcn_tasklet);
 828         }
 829
 830         /*<3> Tx related */
 831         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_TXFOVW]))
 832                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("IMR_TXFOVW!\n"));
 833
 834         if (inta & rtlpriv->cfg->maps[RTL_IMR_MGNTDOK]) {
 835                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 836                          ("Manage ok interrupt!\n"));
 837                 _rtl_pci_tx_isr(hw, MGNT_QUEUE);
 838         }
 839
 840         if (inta & rtlpriv->cfg->maps[RTL_IMR_HIGHDOK]) {
 841                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 842                          ("HIGH_QUEUE ok interrupt!\n"));
 843                 _rtl_pci_tx_isr(hw, HIGH_QUEUE);
 844         }
 845
 846         if (inta & rtlpriv->cfg->maps[RTL_IMR_BKDOK]) {
 847                 rtlpriv->link_info.num_tx_inperiod++;
 848
 849                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 850                          ("BK Tx OK interrupt!\n"));
 851                 _rtl_pci_tx_isr(hw, BK_QUEUE);
 852         }
 853
 854         if (inta & rtlpriv->cfg->maps[RTL_IMR_BEDOK]) {
 855                 rtlpriv->link_info.num_tx_inperiod++;
 856
 857                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 858                          ("BE TX OK interrupt!\n"));
 859                 _rtl_pci_tx_isr(hw, BE_QUEUE);
 860         }
 861
 862         if (inta & rtlpriv->cfg->maps[RTL_IMR_VIDOK]) {
 863                 rtlpriv->link_info.num_tx_inperiod++;
 864
 865                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 866                          ("VI TX OK interrupt!\n"));
 867                 _rtl_pci_tx_isr(hw, VI_QUEUE);
 868         }
 869
 870         if (inta & rtlpriv->cfg->maps[RTL_IMR_VODOK]) {
 871                 rtlpriv->link_info.num_tx_inperiod++;
 872
 873                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 874                          ("Vo TX OK interrupt!\n"));
 875                 _rtl_pci_tx_isr(hw, VO_QUEUE);
 876         }
 877
 878         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192SE) {
 879                 if (inta & rtlpriv->cfg->maps[RTL_IMR_COMDOK]) {
 880                         rtlpriv->link_info.num_tx_inperiod++;
 881
 882                         RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE,
 883                                         ("CMD TX OK interrupt!\n"));
 884                         _rtl_pci_tx_isr(hw, TXCMD_QUEUE);
 885                 }
 886         }
 887
 888         /*<2> Rx related */
 889         if (inta & rtlpriv->cfg->maps[RTL_IMR_ROK]) {
 890                 RT_TRACE(rtlpriv, COMP_INTR, DBG_TRACE, ("Rx ok interrupt!\n"));
 891                 _rtl_pci_rx_interrupt(hw);
 892         }
 893
 894         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RDU])) {
 895                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
 896                          ("rx descriptor unavailable!\n"));
 897                 _rtl_pci_rx_interrupt(hw);
 898         }
 899
 900         if (unlikely(inta & rtlpriv->cfg->maps[RTL_IMR_RXFOVW])) {
 901                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, ("rx overflow !\n"));
 902                 _rtl_pci_rx_interrupt(hw);
 903         }
 904
 905         if (rtlpriv->rtlhal.earlymode_enable)
 906                 tasklet_schedule(&rtlpriv->works.irq_tasklet);
 907
 908         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 909         return IRQ_HANDLED;
 910
 911 done:
 912         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
 913         return IRQ_HANDLED;
 914 }
 915
 916 static void _rtl_pci_irq_tasklet(struct ieee80211_hw *hw)
 917 {
 918         _rtl_pci_tx_chk_waitq(hw);
 919 }
 920
 921 static void _rtl_pci_ips_leave_tasklet(struct ieee80211_hw *hw)
 922 {
 923         rtl_lps_leave(hw);
 924 }
 925
 926 static void _rtl_pci_prepare_bcn_tasklet(struct ieee80211_hw *hw)
 927 {
 928         struct rtl_priv *rtlpriv = rtl_priv(hw);
 929         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 930         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 931         struct rtl8192_tx_ring *ring = NULL;
 932         struct ieee80211_hdr *hdr = NULL;
 933         struct ieee80211_tx_info *info = NULL;
 934         struct sk_buff *pskb = NULL;
 935         struct rtl_tx_desc *pdesc = NULL;
 936         struct rtl_tcb_desc tcb_desc;
 937         u8 temp_one = 1;
 938
 939         memset(&tcb_desc, 0, sizeof(struct rtl_tcb_desc));
 940         ring = &rtlpci->tx_ring[BEACON_QUEUE];
 941         pskb = __skb_dequeue(&ring->queue);
 942         if (pskb)
 943                 kfree_skb(pskb);
 944
 945         /*NB: the beacon data buffer must be 32-bit aligned. */
 946         pskb = ieee80211_beacon_get(hw, mac->vif);
 947         if (pskb == NULL)
 948                 return;
 949         hdr = rtl_get_hdr(pskb);
 950         info = IEEE80211_SKB_CB(pskb);
 951         pdesc = &ring->desc[0];
 952         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *) pdesc,
 953                 info, pskb, BEACON_QUEUE, &tcb_desc);
 954
 955         __skb_queue_tail(&ring->queue, pskb);
 956
 957         rtlpriv->cfg->ops->set_desc((u8 *) pdesc, true, HW_DESC_OWN,
 958                                     (u8 *)&temp_one);
 959
 960         return;
 961 }
 962
 963 static void _rtl_pci_init_trx_var(struct ieee80211_hw *hw)
 964 {
 965         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 966         u8 i;
 967
 968         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
 969                 rtlpci->txringcount[i] = RT_TXDESC_NUM;
 970
 971         /*
 972          *we just alloc 2 desc for beacon queue,
 973          *because we just need first desc in hw beacon.
 974          */
 975         rtlpci->txringcount[BEACON_QUEUE] = 2;
 976
 977         /*
 978          *BE queue need more descriptor for performance
 979          *consideration or, No more tx desc will happen,
 980          *and may cause mac80211 mem leakage.
 981          */
 982         rtlpci->txringcount[BE_QUEUE] = RT_TXDESC_NUM_BE_QUEUE;
 983
 984         rtlpci->rxbuffersize = 9100;    /*2048/1024; */
 985         rtlpci->rxringcount = RTL_PCI_MAX_RX_COUNT;     /*64; */
 986 }
 987
 988 static void _rtl_pci_init_struct(struct ieee80211_hw *hw,
 989                 struct pci_dev *pdev)
 990 {
 991         struct rtl_priv *rtlpriv = rtl_priv(hw);
 992         struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
 993         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
 994         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
 995
 996         rtlpci->up_first_time = true;
 997         rtlpci->being_init_adapter = false;
 998
 999         rtlhal->hw = hw;
1000         rtlpci->pdev = pdev;
1001
1002         /*Tx/Rx related var */
1003         _rtl_pci_init_trx_var(hw);
1004
1005         /*IBSS*/ mac->beacon_interval = 100;
1006
1007         /*AMPDU*/
1008         mac->min_space_cfg = 0;
1009         mac->max_mss_density = 0;
1010         /*set sane AMPDU defaults */
1011         mac->current_ampdu_density = 7;
1012         mac->current_ampdu_factor = 3;
1013
1014         /*QOS*/
1015         rtlpci->acm_method = eAcmWay2_SW;
1016
1017         /*task */
1018         tasklet_init(&rtlpriv->works.irq_tasklet,
1019                      (void (*)(unsigned long))_rtl_pci_irq_tasklet,
1020                      (unsigned long)hw);
1021         tasklet_init(&rtlpriv->works.irq_prepare_bcn_tasklet,
1022                      (void (*)(unsigned long))_rtl_pci_prepare_bcn_tasklet,
1023                      (unsigned long)hw);
1024         tasklet_init(&rtlpriv->works.ips_leave_tasklet,
1025                      (void (*)(unsigned long))_rtl_pci_ips_leave_tasklet,
1026                      (unsigned long)hw);
1027 }
1028
1029 static int _rtl_pci_init_tx_ring(struct ieee80211_hw *hw,
1030                                  unsigned int prio, unsigned int entries)
1031 {
1032         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1033         struct rtl_priv *rtlpriv = rtl_priv(hw);
1034         struct rtl_tx_desc *ring;
1035         dma_addr_t dma;
1036         u32 nextdescaddress;
1037         int i;
1038
1039         ring = pci_alloc_consistent(rtlpci->pdev,
1040                                     sizeof(*ring) * entries, &dma);
1041
1042         if (!ring || (unsigned long)ring & 0xFF) {
1043                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1044                          ("Cannot allocate TX ring (prio = %d)\n", prio));
1045                 return -ENOMEM;
1046         }
1047
1048         memset(ring, 0, sizeof(*ring) * entries);
1049         rtlpci->tx_ring[prio].desc = ring;
1050         rtlpci->tx_ring[prio].dma = dma;
1051         rtlpci->tx_ring[prio].idx = 0;
1052         rtlpci->tx_ring[prio].entries = entries;
1053         skb_queue_head_init(&rtlpci->tx_ring[prio].queue);
1054
1055         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1056                  ("queue:%d, ring_addr:%p\n", prio, ring));
1057
1058         for (i = 0; i < entries; i++) {
1059                 nextdescaddress = (u32) dma +
1060                                               ((i + 1) % entries) *
1061                                               sizeof(*ring);
1062
1063                 rtlpriv->cfg->ops->set_desc((u8 *)&(ring[i]),
1064                                             true, HW_DESC_TX_NEXTDESC_ADDR,
1065                                             (u8 *)&nextdescaddress);
1066         }
1067
1068         return 0;
1069 }
1070
1071 static int _rtl_pci_init_rx_ring(struct ieee80211_hw *hw)
1072 {
1073         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1074         struct rtl_priv *rtlpriv = rtl_priv(hw);
1075         struct rtl_rx_desc *entry = NULL;
1076         int i, rx_queue_idx;
1077         u8 tmp_one = 1;
1078
1079         /*
1080          *rx_queue_idx 0:RX_MPDU_QUEUE
1081          *rx_queue_idx 1:RX_CMD_QUEUE
1082          */
1083         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1084              rx_queue_idx++) {
1085                 rtlpci->rx_ring[rx_queue_idx].desc =
1086                     pci_alloc_consistent(rtlpci->pdev,
1087                                          sizeof(*rtlpci->rx_ring[rx_queue_idx].
1088                                                 desc) * rtlpci->rxringcount,
1089                                          &rtlpci->rx_ring[rx_queue_idx].dma);
1090
1091                 if (!rtlpci->rx_ring[rx_queue_idx].desc ||
1092                     (unsigned long)rtlpci->rx_ring[rx_queue_idx].desc & 0xFF) {
1093                         RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1094                                  ("Cannot allocate RX ring\n"));
1095                         return -ENOMEM;
1096                 }
1097
1098                 memset(rtlpci->rx_ring[rx_queue_idx].desc, 0,
1099                        sizeof(*rtlpci->rx_ring[rx_queue_idx].desc) *
1100                        rtlpci->rxringcount);
1101
1102                 rtlpci->rx_ring[rx_queue_idx].idx = 0;
1103
1104                 /* If amsdu_8k is disabled, set buffersize to 4096. This
1105                  * change will reduce memory fragmentation.
1106                  */
1107                 if (rtlpci->rxbuffersize > 4096 &&
1108                     rtlpriv->rtlhal.disable_amsdu_8k)
1109                         rtlpci->rxbuffersize = 4096;
1110
1111                 for (i = 0; i < rtlpci->rxringcount; i++) {
1112                         struct sk_buff *skb =
1113                             dev_alloc_skb(rtlpci->rxbuffersize);
1114                         u32 bufferaddress;
1115                         if (!skb)
1116                                 return 0;
1117                         entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1118
1119                         /*skb->dev = dev; */
1120
1121                         rtlpci->rx_ring[rx_queue_idx].rx_buf[i] = skb;
1122
1123                         /*
1124                          *just set skb->cb to mapping addr
1125                          *for pci_unmap_single use
1126                          */
1127                         *((dma_addr_t *) skb->cb) =
1128                             pci_map_single(rtlpci->pdev, skb_tail_pointer(skb),
1129                                            rtlpci->rxbuffersize,
1130                                            PCI_DMA_FROMDEVICE);
1131
1132                         bufferaddress = (*((dma_addr_t *)skb->cb));
1133                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1134                                                     HW_DESC_RXBUFF_ADDR,
1135                                                     (u8 *)&bufferaddress);
1136                         rtlpriv->cfg->ops->set_desc((u8 *)entry, false,
1137                                                     HW_DESC_RXPKT_LEN,
1138                                                     (u8 *)&rtlpci->
1139                                                     rxbuffersize);
1140                         rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1141                                                     HW_DESC_RXOWN,
1142                                                     (u8 *)&tmp_one);
1143                 }
1144
1145                 rtlpriv->cfg->ops->set_desc((u8 *) entry, false,
1146                                             HW_DESC_RXERO, (u8 *)&tmp_one);
1147         }
1148         return 0;
1149 }
1150
1151 static void _rtl_pci_free_tx_ring(struct ieee80211_hw *hw,
1152                 unsigned int prio)
1153 {
1154         struct rtl_priv *rtlpriv = rtl_priv(hw);
1155         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1156         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[prio];
1157
1158         while (skb_queue_len(&ring->queue)) {
1159                 struct rtl_tx_desc *entry = &ring->desc[ring->idx];
1160                 struct sk_buff *skb = __skb_dequeue(&ring->queue);
1161
1162                 pci_unmap_single(rtlpci->pdev,
1163                                  rtlpriv->cfg->
1164                                              ops->get_desc((u8 *) entry, true,
1165                                                    HW_DESC_TXBUFF_ADDR),
1166                                  skb->len, PCI_DMA_TODEVICE);
1167                 kfree_skb(skb);
1168                 ring->idx = (ring->idx + 1) % ring->entries;
1169         }
1170
1171         pci_free_consistent(rtlpci->pdev,
1172                             sizeof(*ring->desc) * ring->entries,
1173                             ring->desc, ring->dma);
1174         ring->desc = NULL;
1175 }
1176
1177 static void _rtl_pci_free_rx_ring(struct rtl_pci *rtlpci)
1178 {
1179         int i, rx_queue_idx;
1180
1181         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1182         /*rx_queue_idx 1:RX_CMD_QUEUE */
1183         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1184              rx_queue_idx++) {
1185                 for (i = 0; i < rtlpci->rxringcount; i++) {
1186                         struct sk_buff *skb =
1187                             rtlpci->rx_ring[rx_queue_idx].rx_buf[i];
1188                         if (!skb)
1189                                 continue;
1190
1191                         pci_unmap_single(rtlpci->pdev,
1192                                          *((dma_addr_t *) skb->cb),
1193                                          rtlpci->rxbuffersize,
1194                                          PCI_DMA_FROMDEVICE);
1195                         kfree_skb(skb);
1196                 }
1197
1198                 pci_free_consistent(rtlpci->pdev,
1199                                     sizeof(*rtlpci->rx_ring[rx_queue_idx].
1200                                            desc) * rtlpci->rxringcount,
1201                                     rtlpci->rx_ring[rx_queue_idx].desc,
1202                                     rtlpci->rx_ring[rx_queue_idx].dma);
1203                 rtlpci->rx_ring[rx_queue_idx].desc = NULL;
1204         }
1205 }
1206
1207 static int _rtl_pci_init_trx_ring(struct ieee80211_hw *hw)
1208 {
1209         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1210         int ret;
1211         int i;
1212
1213         ret = _rtl_pci_init_rx_ring(hw);
1214         if (ret)
1215                 return ret;
1216
1217         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1218                 ret = _rtl_pci_init_tx_ring(hw, i,
1219                                  rtlpci->txringcount[i]);
1220                 if (ret)
1221                         goto err_free_rings;
1222         }
1223
1224         return 0;
1225
1226 err_free_rings:
1227         _rtl_pci_free_rx_ring(rtlpci);
1228
1229         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1230                 if (rtlpci->tx_ring[i].desc)
1231                         _rtl_pci_free_tx_ring(hw, i);
1232
1233         return 1;
1234 }
1235
1236 static int _rtl_pci_deinit_trx_ring(struct ieee80211_hw *hw)
1237 {
1238         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1239         u32 i;
1240
1241         /*free rx rings */
1242         _rtl_pci_free_rx_ring(rtlpci);
1243
1244         /*free tx rings */
1245         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++)
1246                 _rtl_pci_free_tx_ring(hw, i);
1247
1248         return 0;
1249 }
1250
1251 int rtl_pci_reset_trx_ring(struct ieee80211_hw *hw)
1252 {
1253         struct rtl_priv *rtlpriv = rtl_priv(hw);
1254         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1255         int i, rx_queue_idx;
1256         unsigned long flags;
1257         u8 tmp_one = 1;
1258
1259         /*rx_queue_idx 0:RX_MPDU_QUEUE */
1260         /*rx_queue_idx 1:RX_CMD_QUEUE */
1261         for (rx_queue_idx = 0; rx_queue_idx < RTL_PCI_MAX_RX_QUEUE;
1262              rx_queue_idx++) {
1263                 /*
1264                  *force the rx_ring[RX_MPDU_QUEUE/
1265                  *RX_CMD_QUEUE].idx to the first one
1266                  */
1267                 if (rtlpci->rx_ring[rx_queue_idx].desc) {
1268                         struct rtl_rx_desc *entry = NULL;
1269
1270                         for (i = 0; i < rtlpci->rxringcount; i++) {
1271                                 entry = &rtlpci->rx_ring[rx_queue_idx].desc[i];
1272                                 rtlpriv->cfg->ops->set_desc((u8 *) entry,
1273                                                             false,
1274                                                             HW_DESC_RXOWN,
1275                                                             (u8 *)&tmp_one);
1276                         }
1277                         rtlpci->rx_ring[rx_queue_idx].idx = 0;
1278                 }
1279         }
1280
1281         /*
1282          *after reset, release previous pending packet,
1283          *and force the  tx idx to the first one
1284          */
1285         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1286         for (i = 0; i < RTL_PCI_MAX_TX_QUEUE_COUNT; i++) {
1287                 if (rtlpci->tx_ring[i].desc) {
1288                         struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[i];
1289
1290                         while (skb_queue_len(&ring->queue)) {
1291                                 struct rtl_tx_desc *entry =
1292                                     &ring->desc[ring->idx];
1293                                 struct sk_buff *skb =
1294                                     __skb_dequeue(&ring->queue);
1295
1296                                 pci_unmap_single(rtlpci->pdev,
1297                                                  rtlpriv->cfg->ops->
1298                                                          get_desc((u8 *)
1299                                                          entry,
1300                                                          true,
1301                                                          HW_DESC_TXBUFF_ADDR),
1302                                                  skb->len, PCI_DMA_TODEVICE);
1303                                 kfree_skb(skb);
1304                                 ring->idx = (ring->idx + 1) % ring->entries;
1305                         }
1306                         ring->idx = 0;
1307                 }
1308         }
1309
1310         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1311
1312         return 0;
1313 }
1314
1315 static bool rtl_pci_tx_chk_waitq_insert(struct ieee80211_hw *hw,
1316                                         struct sk_buff *skb)
1317 {
1318         struct rtl_priv *rtlpriv = rtl_priv(hw);
1319         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1320         struct ieee80211_sta *sta = info->control.sta;
1321         struct rtl_sta_info *sta_entry = NULL;
1322         u8 tid = rtl_get_tid(skb);
1323
1324         if (!sta)
1325                 return false;
1326         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1327
1328         if (!rtlpriv->rtlhal.earlymode_enable)
1329                 return false;
1330         if (sta_entry->tids[tid].agg.agg_state != RTL_AGG_OPERATIONAL)
1331                 return false;
1332         if (_rtl_mac_to_hwqueue(hw, skb) > VO_QUEUE)
1333                 return false;
1334         if (tid > 7)
1335                 return false;
1336
1337         /* maybe every tid should be checked */
1338         if (!rtlpriv->link_info.higher_busytxtraffic[tid])
1339                 return false;
1340
1341         spin_lock_bh(&rtlpriv->locks.waitq_lock);
1342         skb_queue_tail(&rtlpriv->mac80211.skb_waitq[tid], skb);
1343         spin_unlock_bh(&rtlpriv->locks.waitq_lock);
1344
1345         return true;
1346 }
1347
1348 static int rtl_pci_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
1349                 struct rtl_tcb_desc *ptcb_desc)
1350 {
1351         struct rtl_priv *rtlpriv = rtl_priv(hw);
1352         struct rtl_sta_info *sta_entry = NULL;
1353         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1354         struct ieee80211_sta *sta = info->control.sta;
1355         struct rtl8192_tx_ring *ring;
1356         struct rtl_tx_desc *pdesc;
1357         u8 idx;
1358         u8 hw_queue = _rtl_mac_to_hwqueue(hw, skb);
1359         unsigned long flags;
1360         struct ieee80211_hdr *hdr = rtl_get_hdr(skb);
1361         __le16 fc = rtl_get_fc(skb);
1362         u8 *pda_addr = hdr->addr1;
1363         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1364         /*ssn */
1365         u8 tid = 0;
1366         u16 seq_number = 0;
1367         u8 own;
1368         u8 temp_one = 1;
1369
1370         if (ieee80211_is_auth(fc)) {
1371                 RT_TRACE(rtlpriv, COMP_SEND, DBG_DMESG, ("MAC80211_LINKING\n"));
1372                 rtl_ips_nic_on(hw);
1373         }
1374
1375         if (rtlpriv->psc.sw_ps_enabled) {
1376                 if (ieee80211_is_data(fc) && !ieee80211_is_nullfunc(fc) &&
1377                         !ieee80211_has_pm(fc))
1378                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1379         }
1380
1381         rtl_action_proc(hw, skb, true);
1382
1383         if (is_multicast_ether_addr(pda_addr))
1384                 rtlpriv->stats.txbytesmulticast += skb->len;
1385         else if (is_broadcast_ether_addr(pda_addr))
1386                 rtlpriv->stats.txbytesbroadcast += skb->len;
1387         else
1388                 rtlpriv->stats.txbytesunicast += skb->len;
1389
1390         spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
1391         ring = &rtlpci->tx_ring[hw_queue];
1392         if (hw_queue != BEACON_QUEUE)
1393                 idx = (ring->idx + skb_queue_len(&ring->queue)) %
1394                                 ring->entries;
1395         else
1396                 idx = 0;
1397
1398         pdesc = &ring->desc[idx];
1399         own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc,
1400                         true, HW_DESC_OWN);
1401
1402         if ((own == 1) && (hw_queue != BEACON_QUEUE)) {
1403                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1404                          ("No more TX desc@%d, ring->idx = %d,"
1405                           "idx = %d, skb_queue_len = 0x%d\n",
1406                           hw_queue, ring->idx, idx,
1407                           skb_queue_len(&ring->queue)));
1408
1409                 spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1410                 return skb->len;
1411         }
1412
1413         if (ieee80211_is_data_qos(fc)) {
1414                 tid = rtl_get_tid(skb);
1415                 if (sta) {
1416                         sta_entry = (struct rtl_sta_info *)sta->drv_priv;
1417                         seq_number = (le16_to_cpu(hdr->seq_ctrl) &
1418                                       IEEE80211_SCTL_SEQ) >> 4;
1419                         seq_number += 1;
1420
1421                         if (!ieee80211_has_morefrags(hdr->frame_control))
1422                                 sta_entry->tids[tid].seq_number = seq_number;
1423                 }
1424         }
1425
1426         if (ieee80211_is_data(fc))
1427                 rtlpriv->cfg->ops->led_control(hw, LED_CTL_TX);
1428
1429         rtlpriv->cfg->ops->fill_tx_desc(hw, hdr, (u8 *)pdesc,
1430                         info, skb, hw_queue, ptcb_desc);
1431
1432         __skb_queue_tail(&ring->queue, skb);
1433
1434         rtlpriv->cfg->ops->set_desc((u8 *)pdesc, true,
1435                                     HW_DESC_OWN, (u8 *)&temp_one);
1436
1437
1438         if ((ring->entries - skb_queue_len(&ring->queue)) < 2 &&
1439             hw_queue != BEACON_QUEUE) {
1440
1441                 RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1442                          ("less desc left, stop skb_queue@%d, "
1443                           "ring->idx = %d,"
1444                           "idx = %d, skb_queue_len = 0x%d\n",
1445                           hw_queue, ring->idx, idx,
1446                           skb_queue_len(&ring->queue)));
1447
1448                 ieee80211_stop_queue(hw, skb_get_queue_mapping(skb));
1449         }
1450
1451         spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
1452
1453         rtlpriv->cfg->ops->tx_polling(hw, hw_queue);
1454
1455         return 0;
1456 }
1457
1458 static void rtl_pci_flush(struct ieee80211_hw *hw, bool drop)
1459 {
1460         struct rtl_priv *rtlpriv = rtl_priv(hw);
1461         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1462         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1463         u16 i = 0;
1464         int queue_id;
1465         struct rtl8192_tx_ring *ring;
1466
1467         for (queue_id = RTL_PCI_MAX_TX_QUEUE_COUNT - 1; queue_id >= 0;) {
1468                 u32 queue_len;
1469                 ring = &pcipriv->dev.tx_ring[queue_id];
1470                 queue_len = skb_queue_len(&ring->queue);
1471                 if (queue_len == 0 || queue_id == BEACON_QUEUE ||
1472                         queue_id == TXCMD_QUEUE) {
1473                         queue_id--;
1474                         continue;
1475                 } else {
1476                         msleep(20);
1477                         i++;
1478                 }
1479
1480                 /* we just wait 1s for all queues */
1481                 if (rtlpriv->psc.rfpwr_state == ERFOFF ||
1482                         is_hal_stop(rtlhal) || i >= 200)
1483                         return;
1484         }
1485 }
1486
1487 static void rtl_pci_deinit(struct ieee80211_hw *hw)
1488 {
1489         struct rtl_priv *rtlpriv = rtl_priv(hw);
1490         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1491
1492         _rtl_pci_deinit_trx_ring(hw);
1493
1494         synchronize_irq(rtlpci->pdev->irq);
1495         tasklet_kill(&rtlpriv->works.irq_tasklet);
1496         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1497
1498         flush_workqueue(rtlpriv->works.rtl_wq);
1499         destroy_workqueue(rtlpriv->works.rtl_wq);
1500
1501 }
1502
1503 static int rtl_pci_init(struct ieee80211_hw *hw, struct pci_dev *pdev)
1504 {
1505         struct rtl_priv *rtlpriv = rtl_priv(hw);
1506         int err;
1507
1508         _rtl_pci_init_struct(hw, pdev);
1509
1510         err = _rtl_pci_init_trx_ring(hw);
1511         if (err) {
1512                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1513                          ("tx ring initialization failed"));
1514                 return err;
1515         }
1516
1517         return 1;
1518 }
1519
1520 static int rtl_pci_start(struct ieee80211_hw *hw)
1521 {
1522         struct rtl_priv *rtlpriv = rtl_priv(hw);
1523         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1524         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1525         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1526
1527         int err;
1528
1529         rtl_pci_reset_trx_ring(hw);
1530
1531         rtlpci->driver_is_goingto_unload = false;
1532         err = rtlpriv->cfg->ops->hw_init(hw);
1533         if (err) {
1534                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1535                          ("Failed to config hardware!\n"));
1536                 return err;
1537         }
1538
1539         rtlpriv->cfg->ops->enable_interrupt(hw);
1540         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, ("enable_interrupt OK\n"));
1541
1542         rtl_init_rx_config(hw);
1543
1544         /*should after adapter start and interrupt enable. */
1545         set_hal_start(rtlhal);
1546
1547         RT_CLEAR_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
1548
1549         rtlpci->up_first_time = false;
1550
1551         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG, ("OK\n"));
1552         return 0;
1553 }
1554
1555 static void rtl_pci_stop(struct ieee80211_hw *hw)
1556 {
1557         struct rtl_priv *rtlpriv = rtl_priv(hw);
1558         struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
1559         struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
1560         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1561         unsigned long flags;
1562         u8 RFInProgressTimeOut = 0;
1563
1564         /*
1565          *should before disable interrrupt&adapter
1566          *and will do it immediately.
1567          */
1568         set_hal_stop(rtlhal);
1569
1570         rtlpriv->cfg->ops->disable_interrupt(hw);
1571         tasklet_kill(&rtlpriv->works.ips_leave_tasklet);
1572
1573         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1574         while (ppsc->rfchange_inprogress) {
1575                 spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1576                 if (RFInProgressTimeOut > 100) {
1577                         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1578                         break;
1579                 }
1580                 mdelay(1);
1581                 RFInProgressTimeOut++;
1582                 spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1583         }
1584         ppsc->rfchange_inprogress = true;
1585         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1586
1587         rtlpci->driver_is_goingto_unload = true;
1588         rtlpriv->cfg->ops->hw_disable(hw);
1589         rtlpriv->cfg->ops->led_control(hw, LED_CTL_POWER_OFF);
1590
1591         spin_lock_irqsave(&rtlpriv->locks.rf_ps_lock, flags);
1592         ppsc->rfchange_inprogress = false;
1593         spin_unlock_irqrestore(&rtlpriv->locks.rf_ps_lock, flags);
1594
1595         rtl_pci_enable_aspm(hw);
1596 }
1597
1598 static bool _rtl_pci_find_adapter(struct pci_dev *pdev,
1599                 struct ieee80211_hw *hw)
1600 {
1601         struct rtl_priv *rtlpriv = rtl_priv(hw);
1602         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1603         struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
1604         struct pci_dev *bridge_pdev = pdev->bus->self;
1605         u16 venderid;
1606         u16 deviceid;
1607         u8 revisionid;
1608         u16 irqline;
1609         u8 tmp;
1610
1611         pcipriv->ndis_adapter.pcibridge_vendor = PCI_BRIDGE_VENDOR_UNKNOWN;
1612         venderid = pdev->vendor;
1613         deviceid = pdev->device;
1614         pci_read_config_byte(pdev, 0x8, &revisionid);
1615         pci_read_config_word(pdev, 0x3C, &irqline);
1616
1617         if (deviceid == RTL_PCI_8192_DID ||
1618             deviceid == RTL_PCI_0044_DID ||
1619             deviceid == RTL_PCI_0047_DID ||
1620             deviceid == RTL_PCI_8192SE_DID ||
1621             deviceid == RTL_PCI_8174_DID ||
1622             deviceid == RTL_PCI_8173_DID ||
1623             deviceid == RTL_PCI_8172_DID ||
1624             deviceid == RTL_PCI_8171_DID) {
1625                 switch (revisionid) {
1626                 case RTL_PCI_REVISION_ID_8192PCIE:
1627                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1628                                  ("8192 PCI-E is found - "
1629                                   "vid/did=%x/%x\n", venderid, deviceid));
1630                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192E;
1631                         break;
1632                 case RTL_PCI_REVISION_ID_8192SE:
1633                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1634                                  ("8192SE is found - "
1635                                   "vid/did=%x/%x\n", venderid, deviceid));
1636                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1637                         break;
1638                 default:
1639                         RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1640                                  ("Err: Unknown device - "
1641                                   "vid/did=%x/%x\n", venderid, deviceid));
1642                         rtlhal->hw_type = HARDWARE_TYPE_RTL8192SE;
1643                         break;
1644
1645                 }
1646         } else if (deviceid == RTL_PCI_8192CET_DID ||
1647                    deviceid == RTL_PCI_8192CE_DID ||
1648                    deviceid == RTL_PCI_8191CE_DID ||
1649                    deviceid == RTL_PCI_8188CE_DID) {
1650                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192CE;
1651                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1652                          ("8192C PCI-E is found - "
1653                           "vid/did=%x/%x\n", venderid, deviceid));
1654         } else if (deviceid == RTL_PCI_8192DE_DID ||
1655                    deviceid == RTL_PCI_8192DE_DID2) {
1656                 rtlhal->hw_type = HARDWARE_TYPE_RTL8192DE;
1657                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1658                          ("8192D PCI-E is found - "
1659                           "vid/did=%x/%x\n", venderid, deviceid));
1660         } else {
1661                 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1662                          ("Err: Unknown device -"
1663                           " vid/did=%x/%x\n", venderid, deviceid));
1664
1665                 rtlhal->hw_type = RTL_DEFAULT_HARDWARE_TYPE;
1666         }
1667
1668         if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192DE) {
1669                 if (revisionid == 0 || revisionid == 1) {
1670                         if (revisionid == 0) {
1671                                 RT_TRACE(rtlpriv, COMP_INIT,
1672                                          DBG_LOUD, ("Find 92DE MAC0.\n"));
1673                                 rtlhal->interfaceindex = 0;
1674                         } else if (revisionid == 1) {
1675                                 RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1676                                         ("Find 92DE MAC1.\n"));
1677                                 rtlhal->interfaceindex = 1;
1678                         }
1679                 } else {
1680                         RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1681                                 ("Unknown device - "
1682                                 "VendorID/DeviceID=%x/%x, Revision=%x\n",
1683                                 venderid, deviceid, revisionid));
1684                         rtlhal->interfaceindex = 0;
1685                 }
1686         }
1687         /*find bus info */
1688         pcipriv->ndis_adapter.busnumber = pdev->bus->number;
1689         pcipriv->ndis_adapter.devnumber = PCI_SLOT(pdev->devfn);
1690         pcipriv->ndis_adapter.funcnumber = PCI_FUNC(pdev->devfn);
1691
1692         /*find bridge info */
1693         pcipriv->ndis_adapter.pcibridge_vendorid = bridge_pdev->vendor;
1694         for (tmp = 0; tmp < PCI_BRIDGE_VENDOR_MAX; tmp++) {
1695                 if (bridge_pdev->vendor == pcibridge_vendors[tmp]) {
1696                         pcipriv->ndis_adapter.pcibridge_vendor = tmp;
1697                         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1698                                  ("Pci Bridge Vendor is found index: %d\n",
1699                                   tmp));
1700                         break;
1701                 }
1702         }
1703
1704         if (pcipriv->ndis_adapter.pcibridge_vendor !=
1705                 PCI_BRIDGE_VENDOR_UNKNOWN) {
1706                 pcipriv->ndis_adapter.pcibridge_busnum =
1707                     bridge_pdev->bus->number;
1708                 pcipriv->ndis_adapter.pcibridge_devnum =
1709                     PCI_SLOT(bridge_pdev->devfn);
1710                 pcipriv->ndis_adapter.pcibridge_funcnum =
1711                     PCI_FUNC(bridge_pdev->devfn);
1712                 pcipriv->ndis_adapter.pcicfg_addrport =
1713                     (pcipriv->ndis_adapter.pcibridge_busnum << 16) |
1714                     (pcipriv->ndis_adapter.pcibridge_devnum << 11) |
1715                     (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31);
1716                 pcipriv->ndis_adapter.pcibridge_pciehdr_offset =
1717                     pci_pcie_cap(bridge_pdev);
1718                 pcipriv->ndis_adapter.num4bytes =
1719                     (pcipriv->ndis_adapter.pcibridge_pciehdr_offset + 0x10) / 4;
1720
1721                 rtl_pci_get_linkcontrol_field(hw);
1722
1723                 if (pcipriv->ndis_adapter.pcibridge_vendor ==
1724                     PCI_BRIDGE_VENDOR_AMD) {
1725                         pcipriv->ndis_adapter.amd_l1_patch =
1726                             rtl_pci_get_amd_l1_patch(hw);
1727                 }
1728         }
1729
1730         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1731                  ("pcidev busnumber:devnumber:funcnumber:"
1732                   "vendor:link_ctl %d:%d:%d:%x:%x\n",
1733                   pcipriv->ndis_adapter.busnumber,
1734                   pcipriv->ndis_adapter.devnumber,
1735                   pcipriv->ndis_adapter.funcnumber,
1736                   pdev->vendor, pcipriv->ndis_adapter.linkctrl_reg));
1737
1738         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1739                  ("pci_bridge busnumber:devnumber:funcnumber:vendor:"
1740                   "pcie_cap:link_ctl_reg:amd %d:%d:%d:%x:%x:%x:%x\n",
1741                   pcipriv->ndis_adapter.pcibridge_busnum,
1742                   pcipriv->ndis_adapter.pcibridge_devnum,
1743                   pcipriv->ndis_adapter.pcibridge_funcnum,
1744                   pcibridge_vendors[pcipriv->ndis_adapter.pcibridge_vendor],
1745                   pcipriv->ndis_adapter.pcibridge_pciehdr_offset,
1746                   pcipriv->ndis_adapter.pcibridge_linkctrlreg,
1747                   pcipriv->ndis_adapter.amd_l1_patch));
1748
1749         rtl_pci_parse_configuration(pdev, hw);
1750
1751         return true;
1752 }
1753
1754 int __devinit rtl_pci_probe(struct pci_dev *pdev,
1755                             const struct pci_device_id *id)
1756 {
1757         struct ieee80211_hw *hw = NULL;
1758
1759         struct rtl_priv *rtlpriv = NULL;
1760         struct rtl_pci_priv *pcipriv = NULL;
1761         struct rtl_pci *rtlpci;
1762         unsigned long pmem_start, pmem_len, pmem_flags;
1763         int err;
1764
1765         err = pci_enable_device(pdev);
1766         if (err) {
1767                 RT_ASSERT(false,
1768                           ("%s : Cannot enable new PCI device\n",
1769                            pci_name(pdev)));
1770                 return err;
1771         }
1772
1773         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1774                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1775                         RT_ASSERT(false, ("Unable to obtain 32bit DMA "
1776                                           "for consistent allocations\n"));
1777                         pci_disable_device(pdev);
1778                         return -ENOMEM;
1779                 }
1780         }
1781
1782         pci_set_master(pdev);
1783
1784         hw = ieee80211_alloc_hw(sizeof(struct rtl_pci_priv) +
1785                                 sizeof(struct rtl_priv), &rtl_ops);
1786         if (!hw) {
1787                 RT_ASSERT(false,
1788                           ("%s : ieee80211 alloc failed\n", pci_name(pdev)));
1789                 err = -ENOMEM;
1790                 goto fail1;
1791         }
1792
1793         SET_IEEE80211_DEV(hw, &pdev->dev);
1794         pci_set_drvdata(pdev, hw);
1795
1796         rtlpriv = hw->priv;
1797         pcipriv = (void *)rtlpriv->priv;
1798         pcipriv->dev.pdev = pdev;
1799
1800         /* init cfg & intf_ops */
1801         rtlpriv->rtlhal.interface = INTF_PCI;
1802         rtlpriv->cfg = (struct rtl_hal_cfg *)(id->driver_data);
1803         rtlpriv->intf_ops = &rtl_pci_ops;
1804
1805         /*
1806          *init dbgp flags before all
1807          *other functions, because we will
1808          *use it in other funtions like
1809          *RT_TRACE/RT_PRINT/RTL_PRINT_DATA
1810          *you can not use these macro
1811          *before this
1812          */
1813         rtl_dbgp_flag_init(hw);
1814
1815         /* MEM map */
1816         err = pci_request_regions(pdev, KBUILD_MODNAME);
1817         if (err) {
1818                 RT_ASSERT(false, ("Can't obtain PCI resources\n"));
1819                 return err;
1820         }
1821
1822         pmem_start = pci_resource_start(pdev, rtlpriv->cfg->bar_id);
1823         pmem_len = pci_resource_len(pdev, rtlpriv->cfg->bar_id);
1824         pmem_flags = pci_resource_flags(pdev, rtlpriv->cfg->bar_id);
1825
1826         /*shared mem start */
1827         rtlpriv->io.pci_mem_start =
1828                         (unsigned long)pci_iomap(pdev,
1829                         rtlpriv->cfg->bar_id, pmem_len);
1830         if (rtlpriv->io.pci_mem_start == 0) {
1831                 RT_ASSERT(false, ("Can't map PCI mem\n"));
1832                 goto fail2;
1833         }
1834
1835         RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1836                  ("mem mapped space: start: 0x%08lx len:%08lx "
1837                   "flags:%08lx, after map:0x%08lx\n",
1838                   pmem_start, pmem_len, pmem_flags,
1839                   rtlpriv->io.pci_mem_start));
1840
1841         /* Disable Clk Request */
1842         pci_write_config_byte(pdev, 0x81, 0);
1843         /* leave D3 mode */
1844         pci_write_config_byte(pdev, 0x44, 0);
1845         pci_write_config_byte(pdev, 0x04, 0x06);
1846         pci_write_config_byte(pdev, 0x04, 0x07);
1847
1848         /* find adapter */
1849         _rtl_pci_find_adapter(pdev, hw);
1850
1851         /* Init IO handler */
1852         _rtl_pci_io_handler_init(&pdev->dev, hw);
1853
1854         /*like read eeprom and so on */
1855         rtlpriv->cfg->ops->read_eeprom_info(hw);
1856
1857         if (rtlpriv->cfg->ops->init_sw_vars(hw)) {
1858                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1859                          ("Can't init_sw_vars.\n"));
1860                 goto fail3;
1861         }
1862
1863         rtlpriv->cfg->ops->init_sw_leds(hw);
1864
1865         /*aspm */
1866         rtl_pci_init_aspm(hw);
1867
1868         /* Init mac80211 sw */
1869         err = rtl_init_core(hw);
1870         if (err) {
1871                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1872                          ("Can't allocate sw for mac80211.\n"));
1873                 goto fail3;
1874         }
1875
1876         /* Init PCI sw */
1877         err = !rtl_pci_init(hw, pdev);
1878         if (err) {
1879                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1880                          ("Failed to init PCI.\n"));
1881                 goto fail3;
1882         }
1883
1884         err = ieee80211_register_hw(hw);
1885         if (err) {
1886                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1887                          ("Can't register mac80211 hw.\n"));
1888                 goto fail3;
1889         } else {
1890                 rtlpriv->mac80211.mac80211_registered = 1;
1891         }
1892
1893         err = sysfs_create_group(&pdev->dev.kobj, &rtl_attribute_group);
1894         if (err) {
1895                 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
1896                          ("failed to create sysfs device attributes\n"));
1897                 goto fail3;
1898         }
1899
1900         /*init rfkill */
1901         rtl_init_rfkill(hw);
1902
1903         rtlpci = rtl_pcidev(pcipriv);
1904         err = request_irq(rtlpci->pdev->irq, &_rtl_pci_interrupt,
1905                           IRQF_SHARED, KBUILD_MODNAME, hw);
1906         if (err) {
1907                 RT_TRACE(rtlpriv, COMP_INIT, DBG_DMESG,
1908                          ("%s: failed to register IRQ handler\n",
1909                           wiphy_name(hw->wiphy)));
1910                 goto fail3;
1911         } else {
1912                 rtlpci->irq_alloc = 1;
1913         }
1914
1915         set_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1916         return 0;
1917
1918 fail3:
1919         pci_set_drvdata(pdev, NULL);
1920         rtl_deinit_core(hw);
1921         _rtl_pci_io_handler_release(hw);
1922         ieee80211_free_hw(hw);
1923
1924         if (rtlpriv->io.pci_mem_start != 0)
1925                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1926
1927 fail2:
1928         pci_release_regions(pdev);
1929
1930 fail1:
1931
1932         pci_disable_device(pdev);
1933
1934         return -ENODEV;
1935
1936 }
1937 EXPORT_SYMBOL(rtl_pci_probe);
1938
1939 void rtl_pci_disconnect(struct pci_dev *pdev)
1940 {
1941         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
1942         struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw);
1943         struct rtl_priv *rtlpriv = rtl_priv(hw);
1944         struct rtl_pci *rtlpci = rtl_pcidev(pcipriv);
1945         struct rtl_mac *rtlmac = rtl_mac(rtlpriv);
1946
1947         clear_bit(RTL_STATUS_INTERFACE_START, &rtlpriv->status);
1948
1949         sysfs_remove_group(&pdev->dev.kobj, &rtl_attribute_group);
1950
1951         /*ieee80211_unregister_hw will call ops_stop */
1952         if (rtlmac->mac80211_registered == 1) {
1953                 ieee80211_unregister_hw(hw);
1954                 rtlmac->mac80211_registered = 0;
1955         } else {
1956                 rtl_deinit_deferred_work(hw);
1957                 rtlpriv->intf_ops->adapter_stop(hw);
1958         }
1959
1960         /*deinit rfkill */
1961         rtl_deinit_rfkill(hw);
1962
1963         rtl_pci_deinit(hw);
1964         rtl_deinit_core(hw);
1965         _rtl_pci_io_handler_release(hw);
1966         rtlpriv->cfg->ops->deinit_sw_vars(hw);
1967
1968         if (rtlpci->irq_alloc) {
1969                 free_irq(rtlpci->pdev->irq, hw);
1970                 rtlpci->irq_alloc = 0;
1971         }
1972
1973         if (rtlpriv->io.pci_mem_start != 0) {
1974                 pci_iounmap(pdev, (void __iomem *)rtlpriv->io.pci_mem_start);
1975                 pci_release_regions(pdev);
1976         }
1977
1978         pci_disable_device(pdev);
1979
1980         rtl_pci_disable_aspm(hw);
1981
1982         pci_set_drvdata(pdev, NULL);
1983
1984         ieee80211_free_hw(hw);
1985 }
1986 EXPORT_SYMBOL(rtl_pci_disconnect);
1987
1988 /***************************************
1989 kernel pci power state define:
1990 PCI_D0         ((pci_power_t __force) 0)
1991 PCI_D1         ((pci_power_t __force) 1)
1992 PCI_D2         ((pci_power_t __force) 2)
1993 PCI_D3hot      ((pci_power_t __force) 3)
1994 PCI_D3cold     ((pci_power_t __force) 4)
1995 PCI_UNKNOWN    ((pci_power_t __force) 5)
1996
1997 This function is called when system
1998 goes into suspend state mac80211 will
1999 call rtl_mac_stop() from the mac80211
2000 suspend function first, So there is
2001 no need to call hw_disable here.
2002 ****************************************/
2003 int rtl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2004 {
2005         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2006         struct rtl_priv *rtlpriv = rtl_priv(hw);
2007
2008         rtlpriv->cfg->ops->hw_suspend(hw);
2009         rtl_deinit_rfkill(hw);
2010
2011         pci_save_state(pdev);
2012         pci_disable_device(pdev);
2013         pci_set_power_state(pdev, PCI_D3hot);
2014         return 0;
2015 }
2016 EXPORT_SYMBOL(rtl_pci_suspend);
2017
2018 int rtl_pci_resume(struct pci_dev *pdev)
2019 {
2020         int ret;
2021         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
2022         struct rtl_priv *rtlpriv = rtl_priv(hw);
2023
2024         pci_set_power_state(pdev, PCI_D0);
2025         ret = pci_enable_device(pdev);
2026         if (ret) {
2027                 RT_ASSERT(false, ("ERR: <======\n"));
2028                 return ret;
2029         }
2030
2031         pci_restore_state(pdev);
2032
2033         rtlpriv->cfg->ops->hw_resume(hw);
2034         rtl_init_rfkill(hw);
2035         return 0;
2036 }
2037 EXPORT_SYMBOL(rtl_pci_resume);
2038
2039 struct rtl_intf_ops rtl_pci_ops = {
2040         .read_efuse_byte = read_efuse_byte,
2041         .adapter_start = rtl_pci_start,
2042         .adapter_stop = rtl_pci_stop,
2043         .adapter_tx = rtl_pci_tx,
2044         .flush = rtl_pci_flush,
2045         .reset_trx_ring = rtl_pci_reset_trx_ring,
2046         .waitq_insert = rtl_pci_tx_chk_waitq_insert,
2047
2048         .disable_aspm = rtl_pci_disable_aspm,
2049         .enable_aspm = rtl_pci_enable_aspm,
2050 };