2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
22 #include <linux/kvm_host.h>
27 #include "kvm_cache_regs.h"
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <linux/hash.h>
47 #include <trace/events/kvm.h>
49 #define CREATE_TRACE_POINTS
52 #include <asm/debugreg.h>
59 #include <asm/pvclock.h>
60 #include <asm/div64.h>
62 #define MAX_IO_MSRS 256
63 #define KVM_MAX_MCE_BANKS 32
64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
66 #define emul_to_vcpu(ctxt) \
67 container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
70 * - enable syscall per default because its emulated by KVM
71 * - enable LME and LMA per default on 64 bit KVM
75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
85 struct kvm_cpuid_entry2 __user *entries);
87 struct kvm_x86_ops *kvm_x86_ops;
88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
93 bool kvm_has_tsc_control;
94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
95 u32 kvm_max_guest_tsc_khz;
96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
98 #define KVM_NR_SHARED_MSRS 16
100 struct kvm_shared_msrs_global {
102 u32 msrs[KVM_NR_SHARED_MSRS];
105 struct kvm_shared_msrs {
106 struct user_return_notifier urn;
108 struct kvm_shared_msr_values {
111 } values[KVM_NR_SHARED_MSRS];
114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
117 struct kvm_stats_debugfs_item debugfs_entries[] = {
118 { "pf_fixed", VCPU_STAT(pf_fixed) },
119 { "pf_guest", VCPU_STAT(pf_guest) },
120 { "tlb_flush", VCPU_STAT(tlb_flush) },
121 { "invlpg", VCPU_STAT(invlpg) },
122 { "exits", VCPU_STAT(exits) },
123 { "io_exits", VCPU_STAT(io_exits) },
124 { "mmio_exits", VCPU_STAT(mmio_exits) },
125 { "signal_exits", VCPU_STAT(signal_exits) },
126 { "irq_window", VCPU_STAT(irq_window_exits) },
127 { "nmi_window", VCPU_STAT(nmi_window_exits) },
128 { "halt_exits", VCPU_STAT(halt_exits) },
129 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
130 { "hypercalls", VCPU_STAT(hypercalls) },
131 { "request_irq", VCPU_STAT(request_irq_exits) },
132 { "irq_exits", VCPU_STAT(irq_exits) },
133 { "host_state_reload", VCPU_STAT(host_state_reload) },
134 { "efer_reload", VCPU_STAT(efer_reload) },
135 { "fpu_reload", VCPU_STAT(fpu_reload) },
136 { "insn_emulation", VCPU_STAT(insn_emulation) },
137 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
138 { "irq_injections", VCPU_STAT(irq_injections) },
139 { "nmi_injections", VCPU_STAT(nmi_injections) },
140 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
141 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
142 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
143 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
144 { "mmu_flooded", VM_STAT(mmu_flooded) },
145 { "mmu_recycled", VM_STAT(mmu_recycled) },
146 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
147 { "mmu_unsync", VM_STAT(mmu_unsync) },
148 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
149 { "largepages", VM_STAT(lpages) },
153 u64 __read_mostly host_xcr0;
155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
160 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
161 vcpu->arch.apf.gfns[i] = ~0;
164 static void kvm_on_user_return(struct user_return_notifier *urn)
167 struct kvm_shared_msrs *locals
168 = container_of(urn, struct kvm_shared_msrs, urn);
169 struct kvm_shared_msr_values *values;
171 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
172 values = &locals->values[slot];
173 if (values->host != values->curr) {
174 wrmsrl(shared_msrs_global.msrs[slot], values->host);
175 values->curr = values->host;
178 locals->registered = false;
179 user_return_notifier_unregister(urn);
182 static void shared_msr_update(unsigned slot, u32 msr)
184 struct kvm_shared_msrs *smsr;
187 smsr = &__get_cpu_var(shared_msrs);
188 /* only read, and nobody should modify it at this time,
189 * so don't need lock */
190 if (slot >= shared_msrs_global.nr) {
191 printk(KERN_ERR "kvm: invalid MSR slot!");
194 rdmsrl_safe(msr, &value);
195 smsr->values[slot].host = value;
196 smsr->values[slot].curr = value;
199 void kvm_define_shared_msr(unsigned slot, u32 msr)
201 if (slot >= shared_msrs_global.nr)
202 shared_msrs_global.nr = slot + 1;
203 shared_msrs_global.msrs[slot] = msr;
204 /* we need ensured the shared_msr_global have been updated */
207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
209 static void kvm_shared_msr_cpu_online(void)
213 for (i = 0; i < shared_msrs_global.nr; ++i)
214 shared_msr_update(i, shared_msrs_global.msrs[i]);
217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
219 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
221 if (((value ^ smsr->values[slot].curr) & mask) == 0)
223 smsr->values[slot].curr = value;
224 wrmsrl(shared_msrs_global.msrs[slot], value);
225 if (!smsr->registered) {
226 smsr->urn.on_user_return = kvm_on_user_return;
227 user_return_notifier_register(&smsr->urn);
228 smsr->registered = true;
231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
233 static void drop_user_return_notifiers(void *ignore)
235 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
237 if (smsr->registered)
238 kvm_on_user_return(&smsr->urn);
241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
243 if (irqchip_in_kernel(vcpu->kvm))
244 return vcpu->arch.apic_base;
246 return vcpu->arch.apic_base;
248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
252 /* TODO: reserve bits check */
253 if (irqchip_in_kernel(vcpu->kvm))
254 kvm_lapic_set_base(vcpu, data);
256 vcpu->arch.apic_base = data;
258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
260 #define EXCPT_BENIGN 0
261 #define EXCPT_CONTRIBUTORY 1
264 static int exception_class(int vector)
274 return EXCPT_CONTRIBUTORY;
281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
282 unsigned nr, bool has_error, u32 error_code,
288 kvm_make_request(KVM_REQ_EVENT, vcpu);
290 if (!vcpu->arch.exception.pending) {
292 vcpu->arch.exception.pending = true;
293 vcpu->arch.exception.has_error_code = has_error;
294 vcpu->arch.exception.nr = nr;
295 vcpu->arch.exception.error_code = error_code;
296 vcpu->arch.exception.reinject = reinject;
300 /* to check exception */
301 prev_nr = vcpu->arch.exception.nr;
302 if (prev_nr == DF_VECTOR) {
303 /* triple fault -> shutdown */
304 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
307 class1 = exception_class(prev_nr);
308 class2 = exception_class(nr);
309 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
310 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
311 /* generate double fault per SDM Table 5-5 */
312 vcpu->arch.exception.pending = true;
313 vcpu->arch.exception.has_error_code = true;
314 vcpu->arch.exception.nr = DF_VECTOR;
315 vcpu->arch.exception.error_code = 0;
317 /* replace previous exception with a new one in a hope
318 that instruction re-execution will regenerate lost
323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
325 kvm_multiple_exception(vcpu, nr, false, 0, false);
327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
331 kvm_multiple_exception(vcpu, nr, false, 0, true);
333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
338 kvm_inject_gp(vcpu, 0);
340 kvm_x86_ops->skip_emulated_instruction(vcpu);
342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
346 ++vcpu->stat.pf_guest;
347 vcpu->arch.cr2 = fault->address;
348 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
350 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
352 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
354 if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
355 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
357 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
360 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
362 kvm_make_request(KVM_REQ_EVENT, vcpu);
363 vcpu->arch.nmi_pending = 1;
365 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
367 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
369 kvm_multiple_exception(vcpu, nr, true, error_code, false);
371 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
373 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
375 kvm_multiple_exception(vcpu, nr, true, error_code, true);
377 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
380 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
381 * a #GP and return false.
383 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
385 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
387 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
390 EXPORT_SYMBOL_GPL(kvm_require_cpl);
393 * This function will be used to read from the physical memory of the currently
394 * running guest. The difference to kvm_read_guest_page is that this function
395 * can read from guest physical or from the guest's guest physical memory.
397 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
398 gfn_t ngfn, void *data, int offset, int len,
404 ngpa = gfn_to_gpa(ngfn);
405 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
406 if (real_gfn == UNMAPPED_GVA)
409 real_gfn = gpa_to_gfn(real_gfn);
411 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
413 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
415 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
416 void *data, int offset, int len, u32 access)
418 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
419 data, offset, len, access);
423 * Load the pae pdptrs. Return true is they are all valid.
425 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
427 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
428 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
431 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
433 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
434 offset * sizeof(u64), sizeof(pdpte),
435 PFERR_USER_MASK|PFERR_WRITE_MASK);
440 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
441 if (is_present_gpte(pdpte[i]) &&
442 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
449 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
450 __set_bit(VCPU_EXREG_PDPTR,
451 (unsigned long *)&vcpu->arch.regs_avail);
452 __set_bit(VCPU_EXREG_PDPTR,
453 (unsigned long *)&vcpu->arch.regs_dirty);
458 EXPORT_SYMBOL_GPL(load_pdptrs);
460 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
462 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
468 if (is_long_mode(vcpu) || !is_pae(vcpu))
471 if (!test_bit(VCPU_EXREG_PDPTR,
472 (unsigned long *)&vcpu->arch.regs_avail))
475 gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
476 offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
477 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
478 PFERR_USER_MASK | PFERR_WRITE_MASK);
481 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
487 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
489 unsigned long old_cr0 = kvm_read_cr0(vcpu);
490 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
491 X86_CR0_CD | X86_CR0_NW;
496 if (cr0 & 0xffffffff00000000UL)
500 cr0 &= ~CR0_RESERVED_BITS;
502 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
505 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
508 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
510 if ((vcpu->arch.efer & EFER_LME)) {
515 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
520 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
525 kvm_x86_ops->set_cr0(vcpu, cr0);
527 if ((cr0 ^ old_cr0) & X86_CR0_PG) {
528 kvm_clear_async_pf_completion_queue(vcpu);
529 kvm_async_pf_hash_reset(vcpu);
532 if ((cr0 ^ old_cr0) & update_bits)
533 kvm_mmu_reset_context(vcpu);
536 EXPORT_SYMBOL_GPL(kvm_set_cr0);
538 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
540 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
542 EXPORT_SYMBOL_GPL(kvm_lmsw);
544 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
548 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
549 if (index != XCR_XFEATURE_ENABLED_MASK)
552 if (kvm_x86_ops->get_cpl(vcpu) != 0)
554 if (!(xcr0 & XSTATE_FP))
556 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
558 if (xcr0 & ~host_xcr0)
560 vcpu->arch.xcr0 = xcr0;
561 vcpu->guest_xcr0_loaded = 0;
565 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
567 if (__kvm_set_xcr(vcpu, index, xcr)) {
568 kvm_inject_gp(vcpu, 0);
573 EXPORT_SYMBOL_GPL(kvm_set_xcr);
575 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
577 struct kvm_cpuid_entry2 *best;
579 best = kvm_find_cpuid_entry(vcpu, 1, 0);
580 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
583 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
585 struct kvm_cpuid_entry2 *best;
587 best = kvm_find_cpuid_entry(vcpu, 7, 0);
588 return best && (best->ebx & bit(X86_FEATURE_SMEP));
591 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
593 struct kvm_cpuid_entry2 *best;
595 best = kvm_find_cpuid_entry(vcpu, 7, 0);
596 return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
599 static void update_cpuid(struct kvm_vcpu *vcpu)
601 struct kvm_cpuid_entry2 *best;
603 best = kvm_find_cpuid_entry(vcpu, 1, 0);
607 /* Update OSXSAVE bit */
608 if (cpu_has_xsave && best->function == 0x1) {
609 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
610 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
611 best->ecx |= bit(X86_FEATURE_OSXSAVE);
615 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
617 unsigned long old_cr4 = kvm_read_cr4(vcpu);
618 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
619 X86_CR4_PAE | X86_CR4_SMEP;
620 if (cr4 & CR4_RESERVED_BITS)
623 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
626 if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
629 if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
632 if (is_long_mode(vcpu)) {
633 if (!(cr4 & X86_CR4_PAE))
635 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
636 && ((cr4 ^ old_cr4) & pdptr_bits)
637 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
641 if (kvm_x86_ops->set_cr4(vcpu, cr4))
644 if ((cr4 ^ old_cr4) & pdptr_bits)
645 kvm_mmu_reset_context(vcpu);
647 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
652 EXPORT_SYMBOL_GPL(kvm_set_cr4);
654 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
656 if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
657 kvm_mmu_sync_roots(vcpu);
658 kvm_mmu_flush_tlb(vcpu);
662 if (is_long_mode(vcpu)) {
663 if (cr3 & CR3_L_MODE_RESERVED_BITS)
667 if (cr3 & CR3_PAE_RESERVED_BITS)
669 if (is_paging(vcpu) &&
670 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
674 * We don't check reserved bits in nonpae mode, because
675 * this isn't enforced, and VMware depends on this.
680 * Does the new cr3 value map to physical memory? (Note, we
681 * catch an invalid cr3 even in real-mode, because it would
682 * cause trouble later on when we turn on paging anyway.)
684 * A real CPU would silently accept an invalid cr3 and would
685 * attempt to use it - with largely undefined (and often hard
686 * to debug) behavior on the guest side.
688 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
690 vcpu->arch.cr3 = cr3;
691 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
692 vcpu->arch.mmu.new_cr3(vcpu);
695 EXPORT_SYMBOL_GPL(kvm_set_cr3);
697 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
699 if (cr8 & CR8_RESERVED_BITS)
701 if (irqchip_in_kernel(vcpu->kvm))
702 kvm_lapic_set_tpr(vcpu, cr8);
704 vcpu->arch.cr8 = cr8;
707 EXPORT_SYMBOL_GPL(kvm_set_cr8);
709 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
711 if (irqchip_in_kernel(vcpu->kvm))
712 return kvm_lapic_get_cr8(vcpu);
714 return vcpu->arch.cr8;
716 EXPORT_SYMBOL_GPL(kvm_get_cr8);
718 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
722 vcpu->arch.db[dr] = val;
723 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
724 vcpu->arch.eff_db[dr] = val;
727 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
731 if (val & 0xffffffff00000000ULL)
733 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
736 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
740 if (val & 0xffffffff00000000ULL)
742 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
743 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
744 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
745 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
753 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
757 res = __kvm_set_dr(vcpu, dr, val);
759 kvm_queue_exception(vcpu, UD_VECTOR);
761 kvm_inject_gp(vcpu, 0);
765 EXPORT_SYMBOL_GPL(kvm_set_dr);
767 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
771 *val = vcpu->arch.db[dr];
774 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
778 *val = vcpu->arch.dr6;
781 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
785 *val = vcpu->arch.dr7;
792 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
794 if (_kvm_get_dr(vcpu, dr, val)) {
795 kvm_queue_exception(vcpu, UD_VECTOR);
800 EXPORT_SYMBOL_GPL(kvm_get_dr);
803 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
804 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
806 * This list is modified at module load time to reflect the
807 * capabilities of the host cpu. This capabilities test skips MSRs that are
808 * kvm-specific. Those are put in the beginning of the list.
811 #define KVM_SAVE_MSRS_BEGIN 9
812 static u32 msrs_to_save[] = {
813 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
814 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
815 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
816 HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
817 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
820 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
822 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
825 static unsigned num_msrs_to_save;
827 static u32 emulated_msrs[] = {
828 MSR_IA32_MISC_ENABLE,
833 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
835 u64 old_efer = vcpu->arch.efer;
837 if (efer & efer_reserved_bits)
841 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
844 if (efer & EFER_FFXSR) {
845 struct kvm_cpuid_entry2 *feat;
847 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
848 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
852 if (efer & EFER_SVME) {
853 struct kvm_cpuid_entry2 *feat;
855 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
856 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
861 efer |= vcpu->arch.efer & EFER_LMA;
863 kvm_x86_ops->set_efer(vcpu, efer);
865 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
867 /* Update reserved bits */
868 if ((efer ^ old_efer) & EFER_NX)
869 kvm_mmu_reset_context(vcpu);
874 void kvm_enable_efer_bits(u64 mask)
876 efer_reserved_bits &= ~mask;
878 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
882 * Writes msr value into into the appropriate "register".
883 * Returns 0 on success, non-0 otherwise.
884 * Assumes vcpu_load() was already called.
886 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
888 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
892 * Adapt set_msr() to msr_io()'s calling convention
894 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
896 return kvm_set_msr(vcpu, index, *data);
899 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
903 struct pvclock_wall_clock wc;
904 struct timespec boot;
909 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
914 ++version; /* first time write, random junk */
918 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
921 * The guest calculates current wall clock time by adding
922 * system time (updated by kvm_guest_time_update below) to the
923 * wall clock specified here. guest system time equals host
924 * system time for us, thus we must fill in host boot time here.
928 wc.sec = boot.tv_sec;
929 wc.nsec = boot.tv_nsec;
930 wc.version = version;
932 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
935 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
938 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
940 uint32_t quotient, remainder;
942 /* Don't try to replace with do_div(), this one calculates
943 * "(dividend << 32) / divisor" */
945 : "=a" (quotient), "=d" (remainder)
946 : "0" (0), "1" (dividend), "r" (divisor) );
950 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
951 s8 *pshift, u32 *pmultiplier)
958 tps64 = base_khz * 1000LL;
959 scaled64 = scaled_khz * 1000LL;
960 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
965 tps32 = (uint32_t)tps64;
966 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
967 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
975 *pmultiplier = div_frac(scaled64, tps32);
977 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
978 __func__, base_khz, scaled_khz, shift, *pmultiplier);
981 static inline u64 get_kernel_ns(void)
985 WARN_ON(preemptible());
987 monotonic_to_bootbased(&ts);
988 return timespec_to_ns(&ts);
991 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
992 unsigned long max_tsc_khz;
994 static inline int kvm_tsc_changes_freq(void)
997 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
998 cpufreq_quick_get(cpu) != 0;
1003 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1005 if (vcpu->arch.virtual_tsc_khz)
1006 return vcpu->arch.virtual_tsc_khz;
1008 return __this_cpu_read(cpu_tsc_khz);
1011 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1015 WARN_ON(preemptible());
1016 if (kvm_tsc_changes_freq())
1017 printk_once(KERN_WARNING
1018 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1019 ret = nsec * vcpu_tsc_khz(vcpu);
1020 do_div(ret, USEC_PER_SEC);
1024 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1026 /* Compute a scale to convert nanoseconds in TSC cycles */
1027 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1028 &vcpu->arch.tsc_catchup_shift,
1029 &vcpu->arch.tsc_catchup_mult);
1032 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1034 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1035 vcpu->arch.tsc_catchup_mult,
1036 vcpu->arch.tsc_catchup_shift);
1037 tsc += vcpu->arch.last_tsc_write;
1041 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1043 struct kvm *kvm = vcpu->kvm;
1044 u64 offset, ns, elapsed;
1045 unsigned long flags;
1048 raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1049 offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1050 ns = get_kernel_ns();
1051 elapsed = ns - kvm->arch.last_tsc_nsec;
1052 sdiff = data - kvm->arch.last_tsc_write;
1057 * Special case: close write to TSC within 5 seconds of
1058 * another CPU is interpreted as an attempt to synchronize
1059 * The 5 seconds is to accommodate host load / swapping as
1060 * well as any reset of TSC during the boot process.
1062 * In that case, for a reliable TSC, we can match TSC offsets,
1063 * or make a best guest using elapsed value.
1065 if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1066 elapsed < 5ULL * NSEC_PER_SEC) {
1067 if (!check_tsc_unstable()) {
1068 offset = kvm->arch.last_tsc_offset;
1069 pr_debug("kvm: matched tsc offset for %llu\n", data);
1071 u64 delta = nsec_to_cycles(vcpu, elapsed);
1073 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1075 ns = kvm->arch.last_tsc_nsec;
1077 kvm->arch.last_tsc_nsec = ns;
1078 kvm->arch.last_tsc_write = data;
1079 kvm->arch.last_tsc_offset = offset;
1080 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1081 raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1083 /* Reset of TSC must disable overshoot protection below */
1084 vcpu->arch.hv_clock.tsc_timestamp = 0;
1085 vcpu->arch.last_tsc_write = data;
1086 vcpu->arch.last_tsc_nsec = ns;
1088 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1090 static int kvm_guest_time_update(struct kvm_vcpu *v)
1092 unsigned long flags;
1093 struct kvm_vcpu_arch *vcpu = &v->arch;
1095 unsigned long this_tsc_khz;
1096 s64 kernel_ns, max_kernel_ns;
1099 /* Keep irq disabled to prevent changes to the clock */
1100 local_irq_save(flags);
1101 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1102 kernel_ns = get_kernel_ns();
1103 this_tsc_khz = vcpu_tsc_khz(v);
1104 if (unlikely(this_tsc_khz == 0)) {
1105 local_irq_restore(flags);
1106 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1111 * We may have to catch up the TSC to match elapsed wall clock
1112 * time for two reasons, even if kvmclock is used.
1113 * 1) CPU could have been running below the maximum TSC rate
1114 * 2) Broken TSC compensation resets the base at each VCPU
1115 * entry to avoid unknown leaps of TSC even when running
1116 * again on the same CPU. This may cause apparent elapsed
1117 * time to disappear, and the guest to stand still or run
1120 if (vcpu->tsc_catchup) {
1121 u64 tsc = compute_guest_tsc(v, kernel_ns);
1122 if (tsc > tsc_timestamp) {
1123 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1124 tsc_timestamp = tsc;
1128 local_irq_restore(flags);
1130 if (!vcpu->time_page)
1134 * Time as measured by the TSC may go backwards when resetting the base
1135 * tsc_timestamp. The reason for this is that the TSC resolution is
1136 * higher than the resolution of the other clock scales. Thus, many
1137 * possible measurments of the TSC correspond to one measurement of any
1138 * other clock, and so a spread of values is possible. This is not a
1139 * problem for the computation of the nanosecond clock; with TSC rates
1140 * around 1GHZ, there can only be a few cycles which correspond to one
1141 * nanosecond value, and any path through this code will inevitably
1142 * take longer than that. However, with the kernel_ns value itself,
1143 * the precision may be much lower, down to HZ granularity. If the
1144 * first sampling of TSC against kernel_ns ends in the low part of the
1145 * range, and the second in the high end of the range, we can get:
1147 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1149 * As the sampling errors potentially range in the thousands of cycles,
1150 * it is possible such a time value has already been observed by the
1151 * guest. To protect against this, we must compute the system time as
1152 * observed by the guest and ensure the new system time is greater.
1155 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1156 max_kernel_ns = vcpu->last_guest_tsc -
1157 vcpu->hv_clock.tsc_timestamp;
1158 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1159 vcpu->hv_clock.tsc_to_system_mul,
1160 vcpu->hv_clock.tsc_shift);
1161 max_kernel_ns += vcpu->last_kernel_ns;
1164 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1165 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1166 &vcpu->hv_clock.tsc_shift,
1167 &vcpu->hv_clock.tsc_to_system_mul);
1168 vcpu->hw_tsc_khz = this_tsc_khz;
1171 if (max_kernel_ns > kernel_ns)
1172 kernel_ns = max_kernel_ns;
1174 /* With all the info we got, fill in the values */
1175 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1176 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1177 vcpu->last_kernel_ns = kernel_ns;
1178 vcpu->last_guest_tsc = tsc_timestamp;
1179 vcpu->hv_clock.flags = 0;
1182 * The interface expects us to write an even number signaling that the
1183 * update is finished. Since the guest won't see the intermediate
1184 * state, we just increase by 2 at the end.
1186 vcpu->hv_clock.version += 2;
1188 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1190 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1191 sizeof(vcpu->hv_clock));
1193 kunmap_atomic(shared_kaddr, KM_USER0);
1195 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1199 static bool msr_mtrr_valid(unsigned msr)
1202 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1203 case MSR_MTRRfix64K_00000:
1204 case MSR_MTRRfix16K_80000:
1205 case MSR_MTRRfix16K_A0000:
1206 case MSR_MTRRfix4K_C0000:
1207 case MSR_MTRRfix4K_C8000:
1208 case MSR_MTRRfix4K_D0000:
1209 case MSR_MTRRfix4K_D8000:
1210 case MSR_MTRRfix4K_E0000:
1211 case MSR_MTRRfix4K_E8000:
1212 case MSR_MTRRfix4K_F0000:
1213 case MSR_MTRRfix4K_F8000:
1214 case MSR_MTRRdefType:
1215 case MSR_IA32_CR_PAT:
1223 static bool valid_pat_type(unsigned t)
1225 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1228 static bool valid_mtrr_type(unsigned t)
1230 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1233 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1237 if (!msr_mtrr_valid(msr))
1240 if (msr == MSR_IA32_CR_PAT) {
1241 for (i = 0; i < 8; i++)
1242 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1245 } else if (msr == MSR_MTRRdefType) {
1248 return valid_mtrr_type(data & 0xff);
1249 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1250 for (i = 0; i < 8 ; i++)
1251 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1256 /* variable MTRRs */
1257 return valid_mtrr_type(data & 0xff);
1260 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1262 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1264 if (!mtrr_valid(vcpu, msr, data))
1267 if (msr == MSR_MTRRdefType) {
1268 vcpu->arch.mtrr_state.def_type = data;
1269 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1270 } else if (msr == MSR_MTRRfix64K_00000)
1272 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1273 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1274 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1275 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1276 else if (msr == MSR_IA32_CR_PAT)
1277 vcpu->arch.pat = data;
1278 else { /* Variable MTRRs */
1279 int idx, is_mtrr_mask;
1282 idx = (msr - 0x200) / 2;
1283 is_mtrr_mask = msr - 0x200 - 2 * idx;
1286 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1289 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1293 kvm_mmu_reset_context(vcpu);
1297 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1299 u64 mcg_cap = vcpu->arch.mcg_cap;
1300 unsigned bank_num = mcg_cap & 0xff;
1303 case MSR_IA32_MCG_STATUS:
1304 vcpu->arch.mcg_status = data;
1306 case MSR_IA32_MCG_CTL:
1307 if (!(mcg_cap & MCG_CTL_P))
1309 if (data != 0 && data != ~(u64)0)
1311 vcpu->arch.mcg_ctl = data;
1314 if (msr >= MSR_IA32_MC0_CTL &&
1315 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1316 u32 offset = msr - MSR_IA32_MC0_CTL;
1317 /* only 0 or all 1s can be written to IA32_MCi_CTL
1318 * some Linux kernels though clear bit 10 in bank 4 to
1319 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1320 * this to avoid an uncatched #GP in the guest
1322 if ((offset & 0x3) == 0 &&
1323 data != 0 && (data | (1 << 10)) != ~(u64)0)
1325 vcpu->arch.mce_banks[offset] = data;
1333 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1335 struct kvm *kvm = vcpu->kvm;
1336 int lm = is_long_mode(vcpu);
1337 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1338 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1339 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1340 : kvm->arch.xen_hvm_config.blob_size_32;
1341 u32 page_num = data & ~PAGE_MASK;
1342 u64 page_addr = data & PAGE_MASK;
1347 if (page_num >= blob_size)
1350 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1354 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1356 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1365 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1367 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1370 static bool kvm_hv_msr_partition_wide(u32 msr)
1374 case HV_X64_MSR_GUEST_OS_ID:
1375 case HV_X64_MSR_HYPERCALL:
1383 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1385 struct kvm *kvm = vcpu->kvm;
1388 case HV_X64_MSR_GUEST_OS_ID:
1389 kvm->arch.hv_guest_os_id = data;
1390 /* setting guest os id to zero disables hypercall page */
1391 if (!kvm->arch.hv_guest_os_id)
1392 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1394 case HV_X64_MSR_HYPERCALL: {
1399 /* if guest os id is not set hypercall should remain disabled */
1400 if (!kvm->arch.hv_guest_os_id)
1402 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1403 kvm->arch.hv_hypercall = data;
1406 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1407 addr = gfn_to_hva(kvm, gfn);
1408 if (kvm_is_error_hva(addr))
1410 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1411 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1412 if (__copy_to_user((void __user *)addr, instructions, 4))
1414 kvm->arch.hv_hypercall = data;
1418 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1419 "data 0x%llx\n", msr, data);
1425 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1428 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1431 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1432 vcpu->arch.hv_vapic = data;
1435 addr = gfn_to_hva(vcpu->kvm, data >>
1436 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1437 if (kvm_is_error_hva(addr))
1439 if (__clear_user((void __user *)addr, PAGE_SIZE))
1441 vcpu->arch.hv_vapic = data;
1444 case HV_X64_MSR_EOI:
1445 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1446 case HV_X64_MSR_ICR:
1447 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1448 case HV_X64_MSR_TPR:
1449 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1451 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1452 "data 0x%llx\n", msr, data);
1459 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1461 gpa_t gpa = data & ~0x3f;
1463 /* Bits 2:5 are resrved, Should be zero */
1467 vcpu->arch.apf.msr_val = data;
1469 if (!(data & KVM_ASYNC_PF_ENABLED)) {
1470 kvm_clear_async_pf_completion_queue(vcpu);
1471 kvm_async_pf_hash_reset(vcpu);
1475 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1478 vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1479 kvm_async_pf_wakeup_all(vcpu);
1483 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1485 if (vcpu->arch.time_page) {
1486 kvm_release_page_dirty(vcpu->arch.time_page);
1487 vcpu->arch.time_page = NULL;
1491 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1495 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1498 delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1499 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1500 vcpu->arch.st.accum_steal = delta;
1503 static void record_steal_time(struct kvm_vcpu *vcpu)
1505 if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1508 if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1509 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1512 vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1513 vcpu->arch.st.steal.version += 2;
1514 vcpu->arch.st.accum_steal = 0;
1516 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1517 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1520 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1524 return set_efer(vcpu, data);
1526 data &= ~(u64)0x40; /* ignore flush filter disable */
1527 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1529 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1534 case MSR_FAM10H_MMIO_CONF_BASE:
1536 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1541 case MSR_AMD64_NB_CFG:
1543 case MSR_IA32_DEBUGCTLMSR:
1545 /* We support the non-activated case already */
1547 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1548 /* Values other than LBR and BTF are vendor-specific,
1549 thus reserved and should throw a #GP */
1552 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1555 case MSR_IA32_UCODE_REV:
1556 case MSR_IA32_UCODE_WRITE:
1557 case MSR_VM_HSAVE_PA:
1558 case MSR_AMD64_PATCH_LOADER:
1560 case 0x200 ... 0x2ff:
1561 return set_msr_mtrr(vcpu, msr, data);
1562 case MSR_IA32_APICBASE:
1563 kvm_set_apic_base(vcpu, data);
1565 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1566 return kvm_x2apic_msr_write(vcpu, msr, data);
1567 case MSR_IA32_MISC_ENABLE:
1568 vcpu->arch.ia32_misc_enable_msr = data;
1570 case MSR_KVM_WALL_CLOCK_NEW:
1571 case MSR_KVM_WALL_CLOCK:
1572 vcpu->kvm->arch.wall_clock = data;
1573 kvm_write_wall_clock(vcpu->kvm, data);
1575 case MSR_KVM_SYSTEM_TIME_NEW:
1576 case MSR_KVM_SYSTEM_TIME: {
1577 kvmclock_reset(vcpu);
1579 vcpu->arch.time = data;
1580 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1582 /* we verify if the enable bit is set... */
1586 /* ...but clean it before doing the actual write */
1587 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1589 vcpu->arch.time_page =
1590 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1592 if (is_error_page(vcpu->arch.time_page)) {
1593 kvm_release_page_clean(vcpu->arch.time_page);
1594 vcpu->arch.time_page = NULL;
1598 case MSR_KVM_ASYNC_PF_EN:
1599 if (kvm_pv_enable_async_pf(vcpu, data))
1602 case MSR_KVM_STEAL_TIME:
1604 if (unlikely(!sched_info_on()))
1607 if (data & KVM_STEAL_RESERVED_MASK)
1610 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611 data & KVM_STEAL_VALID_BITS))
1614 vcpu->arch.st.msr_val = data;
1616 if (!(data & KVM_MSR_ENABLED))
1619 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1622 accumulate_steal_time(vcpu);
1625 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1629 case MSR_IA32_MCG_CTL:
1630 case MSR_IA32_MCG_STATUS:
1631 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632 return set_msr_mce(vcpu, msr, data);
1634 /* Performance counters are not protected by a CPUID bit,
1635 * so we should check all of them in the generic path for the sake of
1636 * cross vendor migration.
1637 * Writing a zero into the event select MSRs disables them,
1638 * which we perfectly emulate ;-). Any other value should be at least
1639 * reported, some guests depend on them.
1641 case MSR_P6_EVNTSEL0:
1642 case MSR_P6_EVNTSEL1:
1643 case MSR_K7_EVNTSEL0:
1644 case MSR_K7_EVNTSEL1:
1645 case MSR_K7_EVNTSEL2:
1646 case MSR_K7_EVNTSEL3:
1648 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1649 "0x%x data 0x%llx\n", msr, data);
1651 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1652 * so we ignore writes to make it happy.
1654 case MSR_P6_PERFCTR0:
1655 case MSR_P6_PERFCTR1:
1656 case MSR_K7_PERFCTR0:
1657 case MSR_K7_PERFCTR1:
1658 case MSR_K7_PERFCTR2:
1659 case MSR_K7_PERFCTR3:
1660 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1661 "0x%x data 0x%llx\n", msr, data);
1663 case MSR_K7_CLK_CTL:
1665 * Ignore all writes to this no longer documented MSR.
1666 * Writes are only relevant for old K7 processors,
1667 * all pre-dating SVM, but a recommended workaround from
1668 * AMD for these chips. It is possible to speicify the
1669 * affected processor models on the command line, hence
1670 * the need to ignore the workaround.
1673 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1674 if (kvm_hv_msr_partition_wide(msr)) {
1676 mutex_lock(&vcpu->kvm->lock);
1677 r = set_msr_hyperv_pw(vcpu, msr, data);
1678 mutex_unlock(&vcpu->kvm->lock);
1681 return set_msr_hyperv(vcpu, msr, data);
1683 case MSR_IA32_BBL_CR_CTL3:
1684 /* Drop writes to this legacy MSR -- see rdmsr
1685 * counterpart for further detail.
1687 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1690 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1691 return xen_hvm_config(vcpu, data);
1693 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1697 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1704 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1708 * Reads an msr value (of 'msr_index') into 'pdata'.
1709 * Returns 0 on success, non-0 otherwise.
1710 * Assumes vcpu_load() was already called.
1712 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1714 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1717 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1719 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1721 if (!msr_mtrr_valid(msr))
1724 if (msr == MSR_MTRRdefType)
1725 *pdata = vcpu->arch.mtrr_state.def_type +
1726 (vcpu->arch.mtrr_state.enabled << 10);
1727 else if (msr == MSR_MTRRfix64K_00000)
1729 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1730 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1731 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1732 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1733 else if (msr == MSR_IA32_CR_PAT)
1734 *pdata = vcpu->arch.pat;
1735 else { /* Variable MTRRs */
1736 int idx, is_mtrr_mask;
1739 idx = (msr - 0x200) / 2;
1740 is_mtrr_mask = msr - 0x200 - 2 * idx;
1743 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1746 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1753 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1756 u64 mcg_cap = vcpu->arch.mcg_cap;
1757 unsigned bank_num = mcg_cap & 0xff;
1760 case MSR_IA32_P5_MC_ADDR:
1761 case MSR_IA32_P5_MC_TYPE:
1764 case MSR_IA32_MCG_CAP:
1765 data = vcpu->arch.mcg_cap;
1767 case MSR_IA32_MCG_CTL:
1768 if (!(mcg_cap & MCG_CTL_P))
1770 data = vcpu->arch.mcg_ctl;
1772 case MSR_IA32_MCG_STATUS:
1773 data = vcpu->arch.mcg_status;
1776 if (msr >= MSR_IA32_MC0_CTL &&
1777 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1778 u32 offset = msr - MSR_IA32_MC0_CTL;
1779 data = vcpu->arch.mce_banks[offset];
1788 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1791 struct kvm *kvm = vcpu->kvm;
1794 case HV_X64_MSR_GUEST_OS_ID:
1795 data = kvm->arch.hv_guest_os_id;
1797 case HV_X64_MSR_HYPERCALL:
1798 data = kvm->arch.hv_hypercall;
1801 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1809 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1814 case HV_X64_MSR_VP_INDEX: {
1817 kvm_for_each_vcpu(r, v, vcpu->kvm)
1822 case HV_X64_MSR_EOI:
1823 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1824 case HV_X64_MSR_ICR:
1825 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1826 case HV_X64_MSR_TPR:
1827 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1829 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1836 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1841 case MSR_IA32_PLATFORM_ID:
1842 case MSR_IA32_UCODE_REV:
1843 case MSR_IA32_EBL_CR_POWERON:
1844 case MSR_IA32_DEBUGCTLMSR:
1845 case MSR_IA32_LASTBRANCHFROMIP:
1846 case MSR_IA32_LASTBRANCHTOIP:
1847 case MSR_IA32_LASTINTFROMIP:
1848 case MSR_IA32_LASTINTTOIP:
1851 case MSR_VM_HSAVE_PA:
1852 case MSR_P6_PERFCTR0:
1853 case MSR_P6_PERFCTR1:
1854 case MSR_P6_EVNTSEL0:
1855 case MSR_P6_EVNTSEL1:
1856 case MSR_K7_EVNTSEL0:
1857 case MSR_K7_PERFCTR0:
1858 case MSR_K8_INT_PENDING_MSG:
1859 case MSR_AMD64_NB_CFG:
1860 case MSR_FAM10H_MMIO_CONF_BASE:
1864 data = 0x500 | KVM_NR_VAR_MTRR;
1866 case 0x200 ... 0x2ff:
1867 return get_msr_mtrr(vcpu, msr, pdata);
1868 case 0xcd: /* fsb frequency */
1872 * MSR_EBC_FREQUENCY_ID
1873 * Conservative value valid for even the basic CPU models.
1874 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1875 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1876 * and 266MHz for model 3, or 4. Set Core Clock
1877 * Frequency to System Bus Frequency Ratio to 1 (bits
1878 * 31:24) even though these are only valid for CPU
1879 * models > 2, however guests may end up dividing or
1880 * multiplying by zero otherwise.
1882 case MSR_EBC_FREQUENCY_ID:
1885 case MSR_IA32_APICBASE:
1886 data = kvm_get_apic_base(vcpu);
1888 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1889 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1891 case MSR_IA32_MISC_ENABLE:
1892 data = vcpu->arch.ia32_misc_enable_msr;
1894 case MSR_IA32_PERF_STATUS:
1895 /* TSC increment by tick */
1897 /* CPU multiplier */
1898 data |= (((uint64_t)4ULL) << 40);
1901 data = vcpu->arch.efer;
1903 case MSR_KVM_WALL_CLOCK:
1904 case MSR_KVM_WALL_CLOCK_NEW:
1905 data = vcpu->kvm->arch.wall_clock;
1907 case MSR_KVM_SYSTEM_TIME:
1908 case MSR_KVM_SYSTEM_TIME_NEW:
1909 data = vcpu->arch.time;
1911 case MSR_KVM_ASYNC_PF_EN:
1912 data = vcpu->arch.apf.msr_val;
1914 case MSR_KVM_STEAL_TIME:
1915 data = vcpu->arch.st.msr_val;
1917 case MSR_IA32_P5_MC_ADDR:
1918 case MSR_IA32_P5_MC_TYPE:
1919 case MSR_IA32_MCG_CAP:
1920 case MSR_IA32_MCG_CTL:
1921 case MSR_IA32_MCG_STATUS:
1922 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1923 return get_msr_mce(vcpu, msr, pdata);
1924 case MSR_K7_CLK_CTL:
1926 * Provide expected ramp-up count for K7. All other
1927 * are set to zero, indicating minimum divisors for
1930 * This prevents guest kernels on AMD host with CPU
1931 * type 6, model 8 and higher from exploding due to
1932 * the rdmsr failing.
1936 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1937 if (kvm_hv_msr_partition_wide(msr)) {
1939 mutex_lock(&vcpu->kvm->lock);
1940 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1941 mutex_unlock(&vcpu->kvm->lock);
1944 return get_msr_hyperv(vcpu, msr, pdata);
1946 case MSR_IA32_BBL_CR_CTL3:
1947 /* This legacy MSR exists but isn't fully documented in current
1948 * silicon. It is however accessed by winxp in very narrow
1949 * scenarios where it sets bit #19, itself documented as
1950 * a "reserved" bit. Best effort attempt to source coherent
1951 * read data here should the balance of the register be
1952 * interpreted by the guest:
1954 * L2 cache control register 3: 64GB range, 256KB size,
1955 * enabled, latency 0x1, configured
1961 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1964 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1972 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1975 * Read or write a bunch of msrs. All parameters are kernel addresses.
1977 * @return number of msrs set successfully.
1979 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1980 struct kvm_msr_entry *entries,
1981 int (*do_msr)(struct kvm_vcpu *vcpu,
1982 unsigned index, u64 *data))
1986 idx = srcu_read_lock(&vcpu->kvm->srcu);
1987 for (i = 0; i < msrs->nmsrs; ++i)
1988 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1990 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1996 * Read or write a bunch of msrs. Parameters are user addresses.
1998 * @return number of msrs set successfully.
2000 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2001 int (*do_msr)(struct kvm_vcpu *vcpu,
2002 unsigned index, u64 *data),
2005 struct kvm_msrs msrs;
2006 struct kvm_msr_entry *entries;
2011 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2015 if (msrs.nmsrs >= MAX_IO_MSRS)
2019 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2020 entries = kmalloc(size, GFP_KERNEL);
2025 if (copy_from_user(entries, user_msrs->entries, size))
2028 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2033 if (writeback && copy_to_user(user_msrs->entries, entries, size))
2044 int kvm_dev_ioctl_check_extension(long ext)
2049 case KVM_CAP_IRQCHIP:
2051 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2052 case KVM_CAP_SET_TSS_ADDR:
2053 case KVM_CAP_EXT_CPUID:
2054 case KVM_CAP_CLOCKSOURCE:
2056 case KVM_CAP_NOP_IO_DELAY:
2057 case KVM_CAP_MP_STATE:
2058 case KVM_CAP_SYNC_MMU:
2059 case KVM_CAP_USER_NMI:
2060 case KVM_CAP_REINJECT_CONTROL:
2061 case KVM_CAP_IRQ_INJECT_STATUS:
2062 case KVM_CAP_ASSIGN_DEV_IRQ:
2064 case KVM_CAP_IOEVENTFD:
2066 case KVM_CAP_PIT_STATE2:
2067 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2068 case KVM_CAP_XEN_HVM:
2069 case KVM_CAP_ADJUST_CLOCK:
2070 case KVM_CAP_VCPU_EVENTS:
2071 case KVM_CAP_HYPERV:
2072 case KVM_CAP_HYPERV_VAPIC:
2073 case KVM_CAP_HYPERV_SPIN:
2074 case KVM_CAP_PCI_SEGMENT:
2075 case KVM_CAP_DEBUGREGS:
2076 case KVM_CAP_X86_ROBUST_SINGLESTEP:
2078 case KVM_CAP_ASYNC_PF:
2079 case KVM_CAP_GET_TSC_KHZ:
2082 case KVM_CAP_COALESCED_MMIO:
2083 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2086 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2088 case KVM_CAP_NR_VCPUS:
2089 r = KVM_SOFT_MAX_VCPUS;
2091 case KVM_CAP_MAX_VCPUS:
2094 case KVM_CAP_NR_MEMSLOTS:
2095 r = KVM_MEMORY_SLOTS;
2097 case KVM_CAP_PV_MMU: /* obsolete */
2104 r = KVM_MAX_MCE_BANKS;
2109 case KVM_CAP_TSC_CONTROL:
2110 r = kvm_has_tsc_control;
2120 long kvm_arch_dev_ioctl(struct file *filp,
2121 unsigned int ioctl, unsigned long arg)
2123 void __user *argp = (void __user *)arg;
2127 case KVM_GET_MSR_INDEX_LIST: {
2128 struct kvm_msr_list __user *user_msr_list = argp;
2129 struct kvm_msr_list msr_list;
2133 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2136 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2137 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2140 if (n < msr_list.nmsrs)
2143 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2144 num_msrs_to_save * sizeof(u32)))
2146 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2148 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2153 case KVM_GET_SUPPORTED_CPUID: {
2154 struct kvm_cpuid2 __user *cpuid_arg = argp;
2155 struct kvm_cpuid2 cpuid;
2158 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2160 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2161 cpuid_arg->entries);
2166 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2171 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2174 mce_cap = KVM_MCE_CAP_SUPPORTED;
2176 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2188 static void wbinvd_ipi(void *garbage)
2193 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2195 return vcpu->kvm->arch.iommu_domain &&
2196 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2199 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2201 /* Address WBINVD may be executed by guest */
2202 if (need_emulate_wbinvd(vcpu)) {
2203 if (kvm_x86_ops->has_wbinvd_exit())
2204 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2205 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2206 smp_call_function_single(vcpu->cpu,
2207 wbinvd_ipi, NULL, 1);
2210 kvm_x86_ops->vcpu_load(vcpu, cpu);
2211 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2212 /* Make sure TSC doesn't go backwards */
2216 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2217 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2218 tsc - vcpu->arch.last_guest_tsc;
2221 mark_tsc_unstable("KVM discovered backwards TSC");
2222 if (check_tsc_unstable()) {
2223 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2224 vcpu->arch.tsc_catchup = 1;
2226 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2227 if (vcpu->cpu != cpu)
2228 kvm_migrate_timers(vcpu);
2232 accumulate_steal_time(vcpu);
2233 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2236 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2238 kvm_x86_ops->vcpu_put(vcpu);
2239 kvm_put_guest_fpu(vcpu);
2240 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2243 static int is_efer_nx(void)
2245 unsigned long long efer = 0;
2247 rdmsrl_safe(MSR_EFER, &efer);
2248 return efer & EFER_NX;
2251 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2254 struct kvm_cpuid_entry2 *e, *entry;
2257 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2258 e = &vcpu->arch.cpuid_entries[i];
2259 if (e->function == 0x80000001) {
2264 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2265 entry->edx &= ~(1 << 20);
2266 printk(KERN_INFO "kvm: guest NX capability removed\n");
2270 /* when an old userspace process fills a new kernel module */
2271 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2272 struct kvm_cpuid *cpuid,
2273 struct kvm_cpuid_entry __user *entries)
2276 struct kvm_cpuid_entry *cpuid_entries;
2279 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2282 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2286 if (copy_from_user(cpuid_entries, entries,
2287 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2289 for (i = 0; i < cpuid->nent; i++) {
2290 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2291 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2292 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2293 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2294 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2295 vcpu->arch.cpuid_entries[i].index = 0;
2296 vcpu->arch.cpuid_entries[i].flags = 0;
2297 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2298 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2299 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2301 vcpu->arch.cpuid_nent = cpuid->nent;
2302 cpuid_fix_nx_cap(vcpu);
2304 kvm_apic_set_version(vcpu);
2305 kvm_x86_ops->cpuid_update(vcpu);
2309 vfree(cpuid_entries);
2314 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2315 struct kvm_cpuid2 *cpuid,
2316 struct kvm_cpuid_entry2 __user *entries)
2321 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2324 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2325 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2327 vcpu->arch.cpuid_nent = cpuid->nent;
2328 kvm_apic_set_version(vcpu);
2329 kvm_x86_ops->cpuid_update(vcpu);
2337 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2338 struct kvm_cpuid2 *cpuid,
2339 struct kvm_cpuid_entry2 __user *entries)
2344 if (cpuid->nent < vcpu->arch.cpuid_nent)
2347 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2348 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2353 cpuid->nent = vcpu->arch.cpuid_nent;
2357 static void cpuid_mask(u32 *word, int wordnum)
2359 *word &= boot_cpu_data.x86_capability[wordnum];
2362 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2365 entry->function = function;
2366 entry->index = index;
2367 cpuid_count(entry->function, entry->index,
2368 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2372 static bool supported_xcr0_bit(unsigned bit)
2374 u64 mask = ((u64)1 << bit);
2376 return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2379 #define F(x) bit(X86_FEATURE_##x)
2381 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2382 u32 index, int *nent, int maxnent)
2384 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2385 #ifdef CONFIG_X86_64
2386 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2388 unsigned f_lm = F(LM);
2390 unsigned f_gbpages = 0;
2393 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2396 const u32 kvm_supported_word0_x86_features =
2397 F(FPU) | F(VME) | F(DE) | F(PSE) |
2398 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2399 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2400 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2401 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2402 0 /* Reserved, DS, ACPI */ | F(MMX) |
2403 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2404 0 /* HTT, TM, Reserved, PBE */;
2405 /* cpuid 0x80000001.edx */
2406 const u32 kvm_supported_word1_x86_features =
2407 F(FPU) | F(VME) | F(DE) | F(PSE) |
2408 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2409 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2410 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2411 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2412 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2413 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2414 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2416 const u32 kvm_supported_word4_x86_features =
2417 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2418 0 /* DS-CPL, VMX, SMX, EST */ |
2419 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2420 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2421 0 /* Reserved, DCA */ | F(XMM4_1) |
2422 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2423 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2424 F(F16C) | F(RDRAND);
2425 /* cpuid 0x80000001.ecx */
2426 const u32 kvm_supported_word6_x86_features =
2427 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2428 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2429 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2430 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2432 /* cpuid 0xC0000001.edx */
2433 const u32 kvm_supported_word5_x86_features =
2434 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2435 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2439 const u32 kvm_supported_word9_x86_features =
2440 F(SMEP) | F(FSGSBASE) | F(ERMS);
2442 /* all calls to cpuid_count() should be made on the same cpu */
2444 do_cpuid_1_ent(entry, function, index);
2449 entry->eax = min(entry->eax, (u32)0xd);
2452 entry->edx &= kvm_supported_word0_x86_features;
2453 cpuid_mask(&entry->edx, 0);
2454 entry->ecx &= kvm_supported_word4_x86_features;
2455 cpuid_mask(&entry->ecx, 4);
2456 /* we support x2apic emulation even if host does not support
2457 * it since we emulate x2apic in software */
2458 entry->ecx |= F(X2APIC);
2460 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2461 * may return different values. This forces us to get_cpu() before
2462 * issuing the first command, and also to emulate this annoying behavior
2463 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2465 int t, times = entry->eax & 0xff;
2467 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2468 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2469 for (t = 1; t < times && *nent < maxnent; ++t) {
2470 do_cpuid_1_ent(&entry[t], function, 0);
2471 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2476 /* function 4 has additional index. */
2480 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2481 /* read more entries until cache_type is zero */
2482 for (i = 1; *nent < maxnent; ++i) {
2483 cache_type = entry[i - 1].eax & 0x1f;
2486 do_cpuid_1_ent(&entry[i], function, i);
2488 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2494 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2495 /* Mask ebx against host capbability word 9 */
2497 entry->ebx &= kvm_supported_word9_x86_features;
2498 cpuid_mask(&entry->ebx, 9);
2508 /* function 0xb has additional index. */
2512 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2513 /* read more entries until level_type is zero */
2514 for (i = 1; *nent < maxnent; ++i) {
2515 level_type = entry[i - 1].ecx & 0xff00;
2518 do_cpuid_1_ent(&entry[i], function, i);
2520 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2528 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2529 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2530 do_cpuid_1_ent(&entry[i], function, idx);
2531 if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2534 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2540 case KVM_CPUID_SIGNATURE: {
2541 char signature[12] = "KVMKVMKVM\0\0";
2542 u32 *sigptr = (u32 *)signature;
2544 entry->ebx = sigptr[0];
2545 entry->ecx = sigptr[1];
2546 entry->edx = sigptr[2];
2549 case KVM_CPUID_FEATURES:
2550 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2551 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2552 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2553 (1 << KVM_FEATURE_ASYNC_PF) |
2554 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2556 if (sched_info_on())
2557 entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2564 entry->eax = min(entry->eax, 0x8000001a);
2567 entry->edx &= kvm_supported_word1_x86_features;
2568 cpuid_mask(&entry->edx, 1);
2569 entry->ecx &= kvm_supported_word6_x86_features;
2570 cpuid_mask(&entry->ecx, 6);
2573 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2574 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2575 unsigned phys_as = entry->eax & 0xff;
2578 g_phys_as = phys_as;
2579 entry->eax = g_phys_as | (virt_as << 8);
2580 entry->ebx = entry->edx = 0;
2584 entry->ecx = entry->edx = 0;
2590 /*Add support for Centaur's CPUID instruction*/
2592 /*Just support up to 0xC0000004 now*/
2593 entry->eax = min(entry->eax, 0xC0000004);
2596 entry->edx &= kvm_supported_word5_x86_features;
2597 cpuid_mask(&entry->edx, 5);
2599 case 3: /* Processor serial number */
2600 case 5: /* MONITOR/MWAIT */
2601 case 6: /* Thermal management */
2602 case 0xA: /* Architectural Performance Monitoring */
2603 case 0x80000007: /* Advanced power management */
2608 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2612 kvm_x86_ops->set_supported_cpuid(function, entry);
2619 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2620 struct kvm_cpuid_entry2 __user *entries)
2622 struct kvm_cpuid_entry2 *cpuid_entries;
2623 int limit, nent = 0, r = -E2BIG;
2626 if (cpuid->nent < 1)
2628 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2629 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2631 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2635 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2636 limit = cpuid_entries[0].eax;
2637 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2638 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2639 &nent, cpuid->nent);
2641 if (nent >= cpuid->nent)
2644 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2645 limit = cpuid_entries[nent - 1].eax;
2646 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2647 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2648 &nent, cpuid->nent);
2653 if (nent >= cpuid->nent)
2656 /* Add support for Centaur's CPUID instruction. */
2657 if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2658 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2659 &nent, cpuid->nent);
2662 if (nent >= cpuid->nent)
2665 limit = cpuid_entries[nent - 1].eax;
2666 for (func = 0xC0000001;
2667 func <= limit && nent < cpuid->nent; ++func)
2668 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2669 &nent, cpuid->nent);
2672 if (nent >= cpuid->nent)
2676 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2680 if (nent >= cpuid->nent)
2683 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2687 if (nent >= cpuid->nent)
2691 if (copy_to_user(entries, cpuid_entries,
2692 nent * sizeof(struct kvm_cpuid_entry2)))
2698 vfree(cpuid_entries);
2703 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2704 struct kvm_lapic_state *s)
2706 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2711 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2712 struct kvm_lapic_state *s)
2714 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2715 kvm_apic_post_state_restore(vcpu);
2716 update_cr8_intercept(vcpu);
2721 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2722 struct kvm_interrupt *irq)
2724 if (irq->irq < 0 || irq->irq >= 256)
2726 if (irqchip_in_kernel(vcpu->kvm))
2729 kvm_queue_interrupt(vcpu, irq->irq, false);
2730 kvm_make_request(KVM_REQ_EVENT, vcpu);
2735 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2737 kvm_inject_nmi(vcpu);
2742 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2743 struct kvm_tpr_access_ctl *tac)
2747 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2751 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2755 unsigned bank_num = mcg_cap & 0xff, bank;
2758 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2760 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2763 vcpu->arch.mcg_cap = mcg_cap;
2764 /* Init IA32_MCG_CTL to all 1s */
2765 if (mcg_cap & MCG_CTL_P)
2766 vcpu->arch.mcg_ctl = ~(u64)0;
2767 /* Init IA32_MCi_CTL to all 1s */
2768 for (bank = 0; bank < bank_num; bank++)
2769 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2774 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2775 struct kvm_x86_mce *mce)
2777 u64 mcg_cap = vcpu->arch.mcg_cap;
2778 unsigned bank_num = mcg_cap & 0xff;
2779 u64 *banks = vcpu->arch.mce_banks;
2781 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2784 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2785 * reporting is disabled
2787 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2788 vcpu->arch.mcg_ctl != ~(u64)0)
2790 banks += 4 * mce->bank;
2792 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2793 * reporting is disabled for the bank
2795 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2797 if (mce->status & MCI_STATUS_UC) {
2798 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2799 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2800 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2803 if (banks[1] & MCI_STATUS_VAL)
2804 mce->status |= MCI_STATUS_OVER;
2805 banks[2] = mce->addr;
2806 banks[3] = mce->misc;
2807 vcpu->arch.mcg_status = mce->mcg_status;
2808 banks[1] = mce->status;
2809 kvm_queue_exception(vcpu, MC_VECTOR);
2810 } else if (!(banks[1] & MCI_STATUS_VAL)
2811 || !(banks[1] & MCI_STATUS_UC)) {
2812 if (banks[1] & MCI_STATUS_VAL)
2813 mce->status |= MCI_STATUS_OVER;
2814 banks[2] = mce->addr;
2815 banks[3] = mce->misc;
2816 banks[1] = mce->status;
2818 banks[1] |= MCI_STATUS_OVER;
2822 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2823 struct kvm_vcpu_events *events)
2825 events->exception.injected =
2826 vcpu->arch.exception.pending &&
2827 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2828 events->exception.nr = vcpu->arch.exception.nr;
2829 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2830 events->exception.pad = 0;
2831 events->exception.error_code = vcpu->arch.exception.error_code;
2833 events->interrupt.injected =
2834 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2835 events->interrupt.nr = vcpu->arch.interrupt.nr;
2836 events->interrupt.soft = 0;
2837 events->interrupt.shadow =
2838 kvm_x86_ops->get_interrupt_shadow(vcpu,
2839 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2841 events->nmi.injected = vcpu->arch.nmi_injected;
2842 events->nmi.pending = vcpu->arch.nmi_pending;
2843 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2844 events->nmi.pad = 0;
2846 events->sipi_vector = vcpu->arch.sipi_vector;
2848 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2849 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2850 | KVM_VCPUEVENT_VALID_SHADOW);
2851 memset(&events->reserved, 0, sizeof(events->reserved));
2854 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2855 struct kvm_vcpu_events *events)
2857 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2858 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2859 | KVM_VCPUEVENT_VALID_SHADOW))
2862 vcpu->arch.exception.pending = events->exception.injected;
2863 vcpu->arch.exception.nr = events->exception.nr;
2864 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2865 vcpu->arch.exception.error_code = events->exception.error_code;
2867 vcpu->arch.interrupt.pending = events->interrupt.injected;
2868 vcpu->arch.interrupt.nr = events->interrupt.nr;
2869 vcpu->arch.interrupt.soft = events->interrupt.soft;
2870 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2871 kvm_x86_ops->set_interrupt_shadow(vcpu,
2872 events->interrupt.shadow);
2874 vcpu->arch.nmi_injected = events->nmi.injected;
2875 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2876 vcpu->arch.nmi_pending = events->nmi.pending;
2877 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2879 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2880 vcpu->arch.sipi_vector = events->sipi_vector;
2882 kvm_make_request(KVM_REQ_EVENT, vcpu);
2887 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2888 struct kvm_debugregs *dbgregs)
2890 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2891 dbgregs->dr6 = vcpu->arch.dr6;
2892 dbgregs->dr7 = vcpu->arch.dr7;
2894 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2897 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2898 struct kvm_debugregs *dbgregs)
2903 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2904 vcpu->arch.dr6 = dbgregs->dr6;
2905 vcpu->arch.dr7 = dbgregs->dr7;
2910 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2911 struct kvm_xsave *guest_xsave)
2914 memcpy(guest_xsave->region,
2915 &vcpu->arch.guest_fpu.state->xsave,
2918 memcpy(guest_xsave->region,
2919 &vcpu->arch.guest_fpu.state->fxsave,
2920 sizeof(struct i387_fxsave_struct));
2921 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2926 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2927 struct kvm_xsave *guest_xsave)
2930 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2933 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2934 guest_xsave->region, xstate_size);
2936 if (xstate_bv & ~XSTATE_FPSSE)
2938 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2939 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2944 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2945 struct kvm_xcrs *guest_xcrs)
2947 if (!cpu_has_xsave) {
2948 guest_xcrs->nr_xcrs = 0;
2952 guest_xcrs->nr_xcrs = 1;
2953 guest_xcrs->flags = 0;
2954 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2955 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2958 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2959 struct kvm_xcrs *guest_xcrs)
2966 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2969 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2970 /* Only support XCR0 currently */
2971 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2972 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2973 guest_xcrs->xcrs[0].value);
2981 long kvm_arch_vcpu_ioctl(struct file *filp,
2982 unsigned int ioctl, unsigned long arg)
2984 struct kvm_vcpu *vcpu = filp->private_data;
2985 void __user *argp = (void __user *)arg;
2988 struct kvm_lapic_state *lapic;
2989 struct kvm_xsave *xsave;
2990 struct kvm_xcrs *xcrs;
2996 case KVM_GET_LAPIC: {
2998 if (!vcpu->arch.apic)
3000 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3005 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3009 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3014 case KVM_SET_LAPIC: {
3016 if (!vcpu->arch.apic)
3018 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3023 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3025 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3031 case KVM_INTERRUPT: {
3032 struct kvm_interrupt irq;
3035 if (copy_from_user(&irq, argp, sizeof irq))
3037 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3044 r = kvm_vcpu_ioctl_nmi(vcpu);
3050 case KVM_SET_CPUID: {
3051 struct kvm_cpuid __user *cpuid_arg = argp;
3052 struct kvm_cpuid cpuid;
3055 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3057 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3062 case KVM_SET_CPUID2: {
3063 struct kvm_cpuid2 __user *cpuid_arg = argp;
3064 struct kvm_cpuid2 cpuid;
3067 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3069 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3070 cpuid_arg->entries);
3075 case KVM_GET_CPUID2: {
3076 struct kvm_cpuid2 __user *cpuid_arg = argp;
3077 struct kvm_cpuid2 cpuid;
3080 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3082 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3083 cpuid_arg->entries);
3087 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3093 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3096 r = msr_io(vcpu, argp, do_set_msr, 0);
3098 case KVM_TPR_ACCESS_REPORTING: {
3099 struct kvm_tpr_access_ctl tac;
3102 if (copy_from_user(&tac, argp, sizeof tac))
3104 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3108 if (copy_to_user(argp, &tac, sizeof tac))
3113 case KVM_SET_VAPIC_ADDR: {
3114 struct kvm_vapic_addr va;
3117 if (!irqchip_in_kernel(vcpu->kvm))
3120 if (copy_from_user(&va, argp, sizeof va))
3123 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3126 case KVM_X86_SETUP_MCE: {
3130 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3132 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3135 case KVM_X86_SET_MCE: {
3136 struct kvm_x86_mce mce;
3139 if (copy_from_user(&mce, argp, sizeof mce))
3141 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3144 case KVM_GET_VCPU_EVENTS: {
3145 struct kvm_vcpu_events events;
3147 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3150 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3155 case KVM_SET_VCPU_EVENTS: {
3156 struct kvm_vcpu_events events;
3159 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3162 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3165 case KVM_GET_DEBUGREGS: {
3166 struct kvm_debugregs dbgregs;
3168 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3171 if (copy_to_user(argp, &dbgregs,
3172 sizeof(struct kvm_debugregs)))
3177 case KVM_SET_DEBUGREGS: {
3178 struct kvm_debugregs dbgregs;
3181 if (copy_from_user(&dbgregs, argp,
3182 sizeof(struct kvm_debugregs)))
3185 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3188 case KVM_GET_XSAVE: {
3189 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3194 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3197 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3202 case KVM_SET_XSAVE: {
3203 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3209 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3212 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3215 case KVM_GET_XCRS: {
3216 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3221 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3224 if (copy_to_user(argp, u.xcrs,
3225 sizeof(struct kvm_xcrs)))
3230 case KVM_SET_XCRS: {
3231 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3237 if (copy_from_user(u.xcrs, argp,
3238 sizeof(struct kvm_xcrs)))
3241 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3244 case KVM_SET_TSC_KHZ: {
3248 if (!kvm_has_tsc_control)
3251 user_tsc_khz = (u32)arg;
3253 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3256 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3261 case KVM_GET_TSC_KHZ: {
3263 if (check_tsc_unstable())
3266 r = vcpu_tsc_khz(vcpu);
3278 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3282 if (addr > (unsigned int)(-3 * PAGE_SIZE))
3284 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3288 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3291 kvm->arch.ept_identity_map_addr = ident_addr;
3295 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3296 u32 kvm_nr_mmu_pages)
3298 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3301 mutex_lock(&kvm->slots_lock);
3302 spin_lock(&kvm->mmu_lock);
3304 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3305 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3307 spin_unlock(&kvm->mmu_lock);
3308 mutex_unlock(&kvm->slots_lock);
3312 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3314 return kvm->arch.n_max_mmu_pages;
3317 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3322 switch (chip->chip_id) {
3323 case KVM_IRQCHIP_PIC_MASTER:
3324 memcpy(&chip->chip.pic,
3325 &pic_irqchip(kvm)->pics[0],
3326 sizeof(struct kvm_pic_state));
3328 case KVM_IRQCHIP_PIC_SLAVE:
3329 memcpy(&chip->chip.pic,
3330 &pic_irqchip(kvm)->pics[1],
3331 sizeof(struct kvm_pic_state));
3333 case KVM_IRQCHIP_IOAPIC:
3334 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3343 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3348 switch (chip->chip_id) {
3349 case KVM_IRQCHIP_PIC_MASTER:
3350 spin_lock(&pic_irqchip(kvm)->lock);
3351 memcpy(&pic_irqchip(kvm)->pics[0],
3353 sizeof(struct kvm_pic_state));
3354 spin_unlock(&pic_irqchip(kvm)->lock);
3356 case KVM_IRQCHIP_PIC_SLAVE:
3357 spin_lock(&pic_irqchip(kvm)->lock);
3358 memcpy(&pic_irqchip(kvm)->pics[1],
3360 sizeof(struct kvm_pic_state));
3361 spin_unlock(&pic_irqchip(kvm)->lock);
3363 case KVM_IRQCHIP_IOAPIC:
3364 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3370 kvm_pic_update_irq(pic_irqchip(kvm));
3374 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3378 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3379 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3380 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3384 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3388 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3389 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3390 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3391 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3395 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3399 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3400 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3401 sizeof(ps->channels));
3402 ps->flags = kvm->arch.vpit->pit_state.flags;
3403 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3404 memset(&ps->reserved, 0, sizeof(ps->reserved));
3408 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3410 int r = 0, start = 0;
3411 u32 prev_legacy, cur_legacy;
3412 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3413 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3414 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3415 if (!prev_legacy && cur_legacy)
3417 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3418 sizeof(kvm->arch.vpit->pit_state.channels));
3419 kvm->arch.vpit->pit_state.flags = ps->flags;
3420 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3421 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3425 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3426 struct kvm_reinject_control *control)
3428 if (!kvm->arch.vpit)
3430 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3431 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3432 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3437 * Get (and clear) the dirty memory log for a memory slot.
3439 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3440 struct kvm_dirty_log *log)
3443 struct kvm_memory_slot *memslot;
3445 unsigned long is_dirty = 0;
3447 mutex_lock(&kvm->slots_lock);
3450 if (log->slot >= KVM_MEMORY_SLOTS)
3453 memslot = &kvm->memslots->memslots[log->slot];
3455 if (!memslot->dirty_bitmap)
3458 n = kvm_dirty_bitmap_bytes(memslot);
3460 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3461 is_dirty = memslot->dirty_bitmap[i];
3463 /* If nothing is dirty, don't bother messing with page tables. */
3465 struct kvm_memslots *slots, *old_slots;
3466 unsigned long *dirty_bitmap;
3468 dirty_bitmap = memslot->dirty_bitmap_head;
3469 if (memslot->dirty_bitmap == dirty_bitmap)
3470 dirty_bitmap += n / sizeof(long);
3471 memset(dirty_bitmap, 0, n);
3474 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3477 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3478 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3479 slots->generation++;
3481 old_slots = kvm->memslots;
3482 rcu_assign_pointer(kvm->memslots, slots);
3483 synchronize_srcu_expedited(&kvm->srcu);
3484 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3487 spin_lock(&kvm->mmu_lock);
3488 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3489 spin_unlock(&kvm->mmu_lock);
3492 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3496 if (clear_user(log->dirty_bitmap, n))
3502 mutex_unlock(&kvm->slots_lock);
3506 long kvm_arch_vm_ioctl(struct file *filp,
3507 unsigned int ioctl, unsigned long arg)
3509 struct kvm *kvm = filp->private_data;
3510 void __user *argp = (void __user *)arg;
3513 * This union makes it completely explicit to gcc-3.x
3514 * that these two variables' stack usage should be
3515 * combined, not added together.
3518 struct kvm_pit_state ps;
3519 struct kvm_pit_state2 ps2;
3520 struct kvm_pit_config pit_config;
3524 case KVM_SET_TSS_ADDR:
3525 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3529 case KVM_SET_IDENTITY_MAP_ADDR: {
3533 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3535 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3540 case KVM_SET_NR_MMU_PAGES:
3541 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3545 case KVM_GET_NR_MMU_PAGES:
3546 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3548 case KVM_CREATE_IRQCHIP: {
3549 struct kvm_pic *vpic;
3551 mutex_lock(&kvm->lock);
3554 goto create_irqchip_unlock;
3556 vpic = kvm_create_pic(kvm);
3558 r = kvm_ioapic_init(kvm);
3560 mutex_lock(&kvm->slots_lock);
3561 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3563 mutex_unlock(&kvm->slots_lock);
3565 goto create_irqchip_unlock;
3568 goto create_irqchip_unlock;
3570 kvm->arch.vpic = vpic;
3572 r = kvm_setup_default_irq_routing(kvm);
3574 mutex_lock(&kvm->slots_lock);
3575 mutex_lock(&kvm->irq_lock);
3576 kvm_ioapic_destroy(kvm);
3577 kvm_destroy_pic(kvm);
3578 mutex_unlock(&kvm->irq_lock);
3579 mutex_unlock(&kvm->slots_lock);
3581 create_irqchip_unlock:
3582 mutex_unlock(&kvm->lock);
3585 case KVM_CREATE_PIT:
3586 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3588 case KVM_CREATE_PIT2:
3590 if (copy_from_user(&u.pit_config, argp,
3591 sizeof(struct kvm_pit_config)))
3594 mutex_lock(&kvm->slots_lock);
3597 goto create_pit_unlock;
3599 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3603 mutex_unlock(&kvm->slots_lock);
3605 case KVM_IRQ_LINE_STATUS:
3606 case KVM_IRQ_LINE: {
3607 struct kvm_irq_level irq_event;
3610 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3613 if (irqchip_in_kernel(kvm)) {
3615 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3616 irq_event.irq, irq_event.level);
3617 if (ioctl == KVM_IRQ_LINE_STATUS) {
3619 irq_event.status = status;
3620 if (copy_to_user(argp, &irq_event,
3628 case KVM_GET_IRQCHIP: {
3629 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3630 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3636 if (copy_from_user(chip, argp, sizeof *chip))
3637 goto get_irqchip_out;
3639 if (!irqchip_in_kernel(kvm))
3640 goto get_irqchip_out;
3641 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3643 goto get_irqchip_out;
3645 if (copy_to_user(argp, chip, sizeof *chip))
3646 goto get_irqchip_out;
3654 case KVM_SET_IRQCHIP: {
3655 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3656 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3662 if (copy_from_user(chip, argp, sizeof *chip))
3663 goto set_irqchip_out;
3665 if (!irqchip_in_kernel(kvm))
3666 goto set_irqchip_out;
3667 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3669 goto set_irqchip_out;
3679 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3682 if (!kvm->arch.vpit)
3684 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3688 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3695 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3698 if (!kvm->arch.vpit)
3700 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3706 case KVM_GET_PIT2: {
3708 if (!kvm->arch.vpit)
3710 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3714 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3719 case KVM_SET_PIT2: {
3721 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3724 if (!kvm->arch.vpit)
3726 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3732 case KVM_REINJECT_CONTROL: {
3733 struct kvm_reinject_control control;
3735 if (copy_from_user(&control, argp, sizeof(control)))
3737 r = kvm_vm_ioctl_reinject(kvm, &control);
3743 case KVM_XEN_HVM_CONFIG: {
3745 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3746 sizeof(struct kvm_xen_hvm_config)))
3749 if (kvm->arch.xen_hvm_config.flags)
3754 case KVM_SET_CLOCK: {
3755 struct kvm_clock_data user_ns;
3760 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3768 local_irq_disable();
3769 now_ns = get_kernel_ns();
3770 delta = user_ns.clock - now_ns;
3772 kvm->arch.kvmclock_offset = delta;
3775 case KVM_GET_CLOCK: {
3776 struct kvm_clock_data user_ns;
3779 local_irq_disable();
3780 now_ns = get_kernel_ns();
3781 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3784 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3787 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3800 static void kvm_init_msr_list(void)
3805 /* skip the first msrs in the list. KVM-specific */
3806 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3807 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3810 msrs_to_save[j] = msrs_to_save[i];
3813 num_msrs_to_save = j;
3816 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3824 if (!(vcpu->arch.apic &&
3825 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3826 && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3837 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3844 if (!(vcpu->arch.apic &&
3845 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3846 && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3848 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3858 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3859 struct kvm_segment *var, int seg)
3861 kvm_x86_ops->set_segment(vcpu, var, seg);
3864 void kvm_get_segment(struct kvm_vcpu *vcpu,
3865 struct kvm_segment *var, int seg)
3867 kvm_x86_ops->get_segment(vcpu, var, seg);
3870 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3875 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3878 struct x86_exception exception;
3880 BUG_ON(!mmu_is_nested(vcpu));
3882 /* NPT walks are always user-walks */
3883 access |= PFERR_USER_MASK;
3884 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3889 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3890 struct x86_exception *exception)
3892 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3893 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3896 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3897 struct x86_exception *exception)
3899 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3900 access |= PFERR_FETCH_MASK;
3901 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3904 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3905 struct x86_exception *exception)
3907 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3908 access |= PFERR_WRITE_MASK;
3909 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3912 /* uses this to access any guest's mapped memory without checking CPL */
3913 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3914 struct x86_exception *exception)
3916 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3919 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3920 struct kvm_vcpu *vcpu, u32 access,
3921 struct x86_exception *exception)
3924 int r = X86EMUL_CONTINUE;
3927 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3929 unsigned offset = addr & (PAGE_SIZE-1);
3930 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3933 if (gpa == UNMAPPED_GVA)
3934 return X86EMUL_PROPAGATE_FAULT;
3935 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3937 r = X86EMUL_IO_NEEDED;
3949 /* used for instruction fetching */
3950 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3951 gva_t addr, void *val, unsigned int bytes,
3952 struct x86_exception *exception)
3954 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3955 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3957 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3958 access | PFERR_FETCH_MASK,
3962 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3963 gva_t addr, void *val, unsigned int bytes,
3964 struct x86_exception *exception)
3966 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3967 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3969 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3972 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3974 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3975 gva_t addr, void *val, unsigned int bytes,
3976 struct x86_exception *exception)
3978 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3979 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3982 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3983 gva_t addr, void *val,
3985 struct x86_exception *exception)
3987 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3989 int r = X86EMUL_CONTINUE;
3992 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3995 unsigned offset = addr & (PAGE_SIZE-1);
3996 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3999 if (gpa == UNMAPPED_GVA)
4000 return X86EMUL_PROPAGATE_FAULT;
4001 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4003 r = X86EMUL_IO_NEEDED;
4014 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4016 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4017 gpa_t *gpa, struct x86_exception *exception,
4020 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4022 if (vcpu_match_mmio_gva(vcpu, gva) &&
4023 check_write_user_access(vcpu, write, access,
4024 vcpu->arch.access)) {
4025 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4026 (gva & (PAGE_SIZE - 1));
4027 trace_vcpu_match_mmio(gva, *gpa, write, false);
4032 access |= PFERR_WRITE_MASK;
4034 *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4036 if (*gpa == UNMAPPED_GVA)
4039 /* For APIC access vmexit */
4040 if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4043 if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4044 trace_vcpu_match_mmio(gva, *gpa, write, true);
4051 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4052 const void *val, int bytes)
4056 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4059 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4063 struct read_write_emulator_ops {
4064 int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4066 int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4067 void *val, int bytes);
4068 int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4069 int bytes, void *val);
4070 int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4071 void *val, int bytes);
4075 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4077 if (vcpu->mmio_read_completed) {
4078 memcpy(val, vcpu->mmio_data, bytes);
4079 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4080 vcpu->mmio_phys_addr, *(u64 *)val);
4081 vcpu->mmio_read_completed = 0;
4088 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4089 void *val, int bytes)
4091 return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4094 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4095 void *val, int bytes)
4097 return emulator_write_phys(vcpu, gpa, val, bytes);
4100 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4102 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4103 return vcpu_mmio_write(vcpu, gpa, bytes, val);
4106 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4107 void *val, int bytes)
4109 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4110 return X86EMUL_IO_NEEDED;
4113 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4114 void *val, int bytes)
4116 memcpy(vcpu->mmio_data, val, bytes);
4117 memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4118 return X86EMUL_CONTINUE;
4121 static struct read_write_emulator_ops read_emultor = {
4122 .read_write_prepare = read_prepare,
4123 .read_write_emulate = read_emulate,
4124 .read_write_mmio = vcpu_mmio_read,
4125 .read_write_exit_mmio = read_exit_mmio,
4128 static struct read_write_emulator_ops write_emultor = {
4129 .read_write_emulate = write_emulate,
4130 .read_write_mmio = write_mmio,
4131 .read_write_exit_mmio = write_exit_mmio,
4135 static int emulator_read_write_onepage(unsigned long addr, void *val,
4137 struct x86_exception *exception,
4138 struct kvm_vcpu *vcpu,
4139 struct read_write_emulator_ops *ops)
4143 bool write = ops->write;
4145 if (ops->read_write_prepare &&
4146 ops->read_write_prepare(vcpu, val, bytes))
4147 return X86EMUL_CONTINUE;
4149 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4152 return X86EMUL_PROPAGATE_FAULT;
4154 /* For APIC access vmexit */
4158 if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4159 return X86EMUL_CONTINUE;
4163 * Is this MMIO handled locally?
4165 handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4166 if (handled == bytes)
4167 return X86EMUL_CONTINUE;
4173 vcpu->mmio_needed = 1;
4174 vcpu->run->exit_reason = KVM_EXIT_MMIO;
4175 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4176 vcpu->mmio_size = bytes;
4177 vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4178 vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4179 vcpu->mmio_index = 0;
4181 return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4184 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4185 void *val, unsigned int bytes,
4186 struct x86_exception *exception,
4187 struct read_write_emulator_ops *ops)
4189 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4191 /* Crossing a page boundary? */
4192 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4195 now = -addr & ~PAGE_MASK;
4196 rc = emulator_read_write_onepage(addr, val, now, exception,
4199 if (rc != X86EMUL_CONTINUE)
4206 return emulator_read_write_onepage(addr, val, bytes, exception,
4210 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4214 struct x86_exception *exception)
4216 return emulator_read_write(ctxt, addr, val, bytes,
4217 exception, &read_emultor);
4220 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4224 struct x86_exception *exception)
4226 return emulator_read_write(ctxt, addr, (void *)val, bytes,
4227 exception, &write_emultor);
4230 #define CMPXCHG_TYPE(t, ptr, old, new) \
4231 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4233 #ifdef CONFIG_X86_64
4234 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4236 # define CMPXCHG64(ptr, old, new) \
4237 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4240 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4245 struct x86_exception *exception)
4247 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4253 /* guests cmpxchg8b have to be emulated atomically */
4254 if (bytes > 8 || (bytes & (bytes - 1)))
4257 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4259 if (gpa == UNMAPPED_GVA ||
4260 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4263 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4266 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4267 if (is_error_page(page)) {
4268 kvm_release_page_clean(page);
4272 kaddr = kmap_atomic(page, KM_USER0);
4273 kaddr += offset_in_page(gpa);
4276 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4279 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4282 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4285 exchanged = CMPXCHG64(kaddr, old, new);
4290 kunmap_atomic(kaddr, KM_USER0);
4291 kvm_release_page_dirty(page);
4294 return X86EMUL_CMPXCHG_FAILED;
4296 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4298 return X86EMUL_CONTINUE;
4301 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4303 return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4306 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4308 /* TODO: String I/O for in kernel device */
4311 if (vcpu->arch.pio.in)
4312 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4313 vcpu->arch.pio.size, pd);
4315 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4316 vcpu->arch.pio.port, vcpu->arch.pio.size,
4322 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4323 int size, unsigned short port, void *val,
4326 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4328 if (vcpu->arch.pio.count)
4331 trace_kvm_pio(0, port, size, count);
4333 vcpu->arch.pio.port = port;
4334 vcpu->arch.pio.in = 1;
4335 vcpu->arch.pio.count = count;
4336 vcpu->arch.pio.size = size;
4338 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4340 memcpy(val, vcpu->arch.pio_data, size * count);
4341 vcpu->arch.pio.count = 0;
4345 vcpu->run->exit_reason = KVM_EXIT_IO;
4346 vcpu->run->io.direction = KVM_EXIT_IO_IN;
4347 vcpu->run->io.size = size;
4348 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4349 vcpu->run->io.count = count;
4350 vcpu->run->io.port = port;
4355 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4356 int size, unsigned short port,
4357 const void *val, unsigned int count)
4359 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4361 trace_kvm_pio(1, port, size, count);
4363 vcpu->arch.pio.port = port;
4364 vcpu->arch.pio.in = 0;
4365 vcpu->arch.pio.count = count;
4366 vcpu->arch.pio.size = size;
4368 memcpy(vcpu->arch.pio_data, val, size * count);
4370 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4371 vcpu->arch.pio.count = 0;
4375 vcpu->run->exit_reason = KVM_EXIT_IO;
4376 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4377 vcpu->run->io.size = size;
4378 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4379 vcpu->run->io.count = count;
4380 vcpu->run->io.port = port;
4385 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4387 return kvm_x86_ops->get_segment_base(vcpu, seg);
4390 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4392 kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4395 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4397 if (!need_emulate_wbinvd(vcpu))
4398 return X86EMUL_CONTINUE;
4400 if (kvm_x86_ops->has_wbinvd_exit()) {
4401 int cpu = get_cpu();
4403 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4404 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4405 wbinvd_ipi, NULL, 1);
4407 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4410 return X86EMUL_CONTINUE;
4412 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4414 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4416 kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4419 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4421 return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4424 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4427 return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4430 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4432 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4435 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4437 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4438 unsigned long value;
4442 value = kvm_read_cr0(vcpu);
4445 value = vcpu->arch.cr2;
4448 value = kvm_read_cr3(vcpu);
4451 value = kvm_read_cr4(vcpu);
4454 value = kvm_get_cr8(vcpu);
4457 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4464 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4466 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4471 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4474 vcpu->arch.cr2 = val;
4477 res = kvm_set_cr3(vcpu, val);
4480 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4483 res = kvm_set_cr8(vcpu, val);
4486 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4493 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4495 return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4498 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4500 kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4503 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4505 kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4508 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4510 kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4513 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4515 kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4518 static unsigned long emulator_get_cached_segment_base(
4519 struct x86_emulate_ctxt *ctxt, int seg)
4521 return get_segment_base(emul_to_vcpu(ctxt), seg);
4524 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4525 struct desc_struct *desc, u32 *base3,
4528 struct kvm_segment var;
4530 kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4531 *selector = var.selector;
4538 set_desc_limit(desc, var.limit);
4539 set_desc_base(desc, (unsigned long)var.base);
4540 #ifdef CONFIG_X86_64
4542 *base3 = var.base >> 32;
4544 desc->type = var.type;
4546 desc->dpl = var.dpl;
4547 desc->p = var.present;
4548 desc->avl = var.avl;
4556 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4557 struct desc_struct *desc, u32 base3,
4560 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4561 struct kvm_segment var;
4563 var.selector = selector;
4564 var.base = get_desc_base(desc);
4565 #ifdef CONFIG_X86_64
4566 var.base |= ((u64)base3) << 32;
4568 var.limit = get_desc_limit(desc);
4570 var.limit = (var.limit << 12) | 0xfff;
4571 var.type = desc->type;
4572 var.present = desc->p;
4573 var.dpl = desc->dpl;
4578 var.avl = desc->avl;
4579 var.present = desc->p;
4580 var.unusable = !var.present;
4583 kvm_set_segment(vcpu, &var, seg);
4587 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4588 u32 msr_index, u64 *pdata)
4590 return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4593 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4594 u32 msr_index, u64 data)
4596 return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4599 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4601 emul_to_vcpu(ctxt)->arch.halt_request = 1;
4604 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4607 kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4609 * CR0.TS may reference the host fpu state, not the guest fpu state,
4610 * so it may be clear at this point.
4615 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4620 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4621 struct x86_instruction_info *info,
4622 enum x86_intercept_stage stage)
4624 return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4627 static struct x86_emulate_ops emulate_ops = {
4628 .read_std = kvm_read_guest_virt_system,
4629 .write_std = kvm_write_guest_virt_system,
4630 .fetch = kvm_fetch_guest_virt,
4631 .read_emulated = emulator_read_emulated,
4632 .write_emulated = emulator_write_emulated,
4633 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4634 .invlpg = emulator_invlpg,
4635 .pio_in_emulated = emulator_pio_in_emulated,
4636 .pio_out_emulated = emulator_pio_out_emulated,
4637 .get_segment = emulator_get_segment,
4638 .set_segment = emulator_set_segment,
4639 .get_cached_segment_base = emulator_get_cached_segment_base,
4640 .get_gdt = emulator_get_gdt,
4641 .get_idt = emulator_get_idt,
4642 .set_gdt = emulator_set_gdt,
4643 .set_idt = emulator_set_idt,
4644 .get_cr = emulator_get_cr,
4645 .set_cr = emulator_set_cr,
4646 .cpl = emulator_get_cpl,
4647 .get_dr = emulator_get_dr,
4648 .set_dr = emulator_set_dr,
4649 .set_msr = emulator_set_msr,
4650 .get_msr = emulator_get_msr,
4651 .halt = emulator_halt,
4652 .wbinvd = emulator_wbinvd,
4653 .fix_hypercall = emulator_fix_hypercall,
4654 .get_fpu = emulator_get_fpu,
4655 .put_fpu = emulator_put_fpu,
4656 .intercept = emulator_intercept,
4659 static void cache_all_regs(struct kvm_vcpu *vcpu)
4661 kvm_register_read(vcpu, VCPU_REGS_RAX);
4662 kvm_register_read(vcpu, VCPU_REGS_RSP);
4663 kvm_register_read(vcpu, VCPU_REGS_RIP);
4664 vcpu->arch.regs_dirty = ~0;
4667 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4669 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4671 * an sti; sti; sequence only disable interrupts for the first
4672 * instruction. So, if the last instruction, be it emulated or
4673 * not, left the system with the INT_STI flag enabled, it
4674 * means that the last instruction is an sti. We should not
4675 * leave the flag on in this case. The same goes for mov ss
4677 if (!(int_shadow & mask))
4678 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4681 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4683 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4684 if (ctxt->exception.vector == PF_VECTOR)
4685 kvm_propagate_fault(vcpu, &ctxt->exception);
4686 else if (ctxt->exception.error_code_valid)
4687 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4688 ctxt->exception.error_code);
4690 kvm_queue_exception(vcpu, ctxt->exception.vector);
4693 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4694 const unsigned long *regs)
4696 memset(&ctxt->twobyte, 0,
4697 (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4698 memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4700 ctxt->fetch.start = 0;
4701 ctxt->fetch.end = 0;
4702 ctxt->io_read.pos = 0;
4703 ctxt->io_read.end = 0;
4704 ctxt->mem_read.pos = 0;
4705 ctxt->mem_read.end = 0;
4708 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4710 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4714 * TODO: fix emulate.c to use guest_read/write_register
4715 * instead of direct ->regs accesses, can save hundred cycles
4716 * on Intel for instructions that don't read/change RSP, for
4719 cache_all_regs(vcpu);
4721 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4723 ctxt->eflags = kvm_get_rflags(vcpu);
4724 ctxt->eip = kvm_rip_read(vcpu);
4725 ctxt->mode = (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4726 (ctxt->eflags & X86_EFLAGS_VM) ? X86EMUL_MODE_VM86 :
4727 cs_l ? X86EMUL_MODE_PROT64 :
4728 cs_db ? X86EMUL_MODE_PROT32 :
4729 X86EMUL_MODE_PROT16;
4730 ctxt->guest_mode = is_guest_mode(vcpu);
4732 init_decode_cache(ctxt, vcpu->arch.regs);
4733 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4736 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4738 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4741 init_emulate_ctxt(vcpu);
4745 ctxt->_eip = ctxt->eip + inc_eip;
4746 ret = emulate_int_real(ctxt, irq);
4748 if (ret != X86EMUL_CONTINUE)
4749 return EMULATE_FAIL;
4751 ctxt->eip = ctxt->_eip;
4752 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4753 kvm_rip_write(vcpu, ctxt->eip);
4754 kvm_set_rflags(vcpu, ctxt->eflags);
4756 if (irq == NMI_VECTOR)
4757 vcpu->arch.nmi_pending = false;
4759 vcpu->arch.interrupt.pending = false;
4761 return EMULATE_DONE;
4763 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4765 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4767 int r = EMULATE_DONE;
4769 ++vcpu->stat.insn_emulation_fail;
4770 trace_kvm_emulate_insn_failed(vcpu);
4771 if (!is_guest_mode(vcpu)) {
4772 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4773 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4774 vcpu->run->internal.ndata = 0;
4777 kvm_queue_exception(vcpu, UD_VECTOR);
4782 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4790 * if emulation was due to access to shadowed page table
4791 * and it failed try to unshadow page and re-entetr the
4792 * guest to let CPU execute the instruction.
4794 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4797 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4799 if (gpa == UNMAPPED_GVA)
4800 return true; /* let cpu generate fault */
4802 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4808 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4815 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4816 bool writeback = true;
4818 kvm_clear_exception_queue(vcpu);
4820 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4821 init_emulate_ctxt(vcpu);
4822 ctxt->interruptibility = 0;
4823 ctxt->have_exception = false;
4824 ctxt->perm_ok = false;
4826 ctxt->only_vendor_specific_insn
4827 = emulation_type & EMULTYPE_TRAP_UD;
4829 r = x86_decode_insn(ctxt, insn, insn_len);
4831 trace_kvm_emulate_insn_start(vcpu);
4832 ++vcpu->stat.insn_emulation;
4834 if (emulation_type & EMULTYPE_TRAP_UD)
4835 return EMULATE_FAIL;
4836 if (reexecute_instruction(vcpu, cr2))
4837 return EMULATE_DONE;
4838 if (emulation_type & EMULTYPE_SKIP)
4839 return EMULATE_FAIL;
4840 return handle_emulation_failure(vcpu);
4844 if (emulation_type & EMULTYPE_SKIP) {
4845 kvm_rip_write(vcpu, ctxt->_eip);
4846 return EMULATE_DONE;
4849 /* this is needed for vmware backdoor interface to work since it
4850 changes registers values during IO operation */
4851 if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4852 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4853 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4857 r = x86_emulate_insn(ctxt);
4859 if (r == EMULATION_INTERCEPTED)
4860 return EMULATE_DONE;
4862 if (r == EMULATION_FAILED) {
4863 if (reexecute_instruction(vcpu, cr2))
4864 return EMULATE_DONE;
4866 return handle_emulation_failure(vcpu);
4869 if (ctxt->have_exception) {
4870 inject_emulated_exception(vcpu);
4872 } else if (vcpu->arch.pio.count) {
4873 if (!vcpu->arch.pio.in)
4874 vcpu->arch.pio.count = 0;
4877 r = EMULATE_DO_MMIO;
4878 } else if (vcpu->mmio_needed) {
4879 if (!vcpu->mmio_is_write)
4881 r = EMULATE_DO_MMIO;
4882 } else if (r == EMULATION_RESTART)
4888 toggle_interruptibility(vcpu, ctxt->interruptibility);
4889 kvm_set_rflags(vcpu, ctxt->eflags);
4890 kvm_make_request(KVM_REQ_EVENT, vcpu);
4891 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4892 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4893 kvm_rip_write(vcpu, ctxt->eip);
4895 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4899 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4901 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4903 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4904 int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4905 size, port, &val, 1);
4906 /* do not return to emulator after return from userspace */
4907 vcpu->arch.pio.count = 0;
4910 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4912 static void tsc_bad(void *info)
4914 __this_cpu_write(cpu_tsc_khz, 0);
4917 static void tsc_khz_changed(void *data)
4919 struct cpufreq_freqs *freq = data;
4920 unsigned long khz = 0;
4924 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4925 khz = cpufreq_quick_get(raw_smp_processor_id());
4928 __this_cpu_write(cpu_tsc_khz, khz);
4931 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4934 struct cpufreq_freqs *freq = data;
4936 struct kvm_vcpu *vcpu;
4937 int i, send_ipi = 0;
4940 * We allow guests to temporarily run on slowing clocks,
4941 * provided we notify them after, or to run on accelerating
4942 * clocks, provided we notify them before. Thus time never
4945 * However, we have a problem. We can't atomically update
4946 * the frequency of a given CPU from this function; it is
4947 * merely a notifier, which can be called from any CPU.
4948 * Changing the TSC frequency at arbitrary points in time
4949 * requires a recomputation of local variables related to
4950 * the TSC for each VCPU. We must flag these local variables
4951 * to be updated and be sure the update takes place with the
4952 * new frequency before any guests proceed.
4954 * Unfortunately, the combination of hotplug CPU and frequency
4955 * change creates an intractable locking scenario; the order
4956 * of when these callouts happen is undefined with respect to
4957 * CPU hotplug, and they can race with each other. As such,
4958 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4959 * undefined; you can actually have a CPU frequency change take
4960 * place in between the computation of X and the setting of the
4961 * variable. To protect against this problem, all updates of
4962 * the per_cpu tsc_khz variable are done in an interrupt
4963 * protected IPI, and all callers wishing to update the value
4964 * must wait for a synchronous IPI to complete (which is trivial
4965 * if the caller is on the CPU already). This establishes the
4966 * necessary total order on variable updates.
4968 * Note that because a guest time update may take place
4969 * anytime after the setting of the VCPU's request bit, the
4970 * correct TSC value must be set before the request. However,
4971 * to ensure the update actually makes it to any guest which
4972 * starts running in hardware virtualization between the set
4973 * and the acquisition of the spinlock, we must also ping the
4974 * CPU after setting the request bit.
4978 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4980 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4983 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4985 raw_spin_lock(&kvm_lock);
4986 list_for_each_entry(kvm, &vm_list, vm_list) {
4987 kvm_for_each_vcpu(i, vcpu, kvm) {
4988 if (vcpu->cpu != freq->cpu)
4990 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4991 if (vcpu->cpu != smp_processor_id())
4995 raw_spin_unlock(&kvm_lock);
4997 if (freq->old < freq->new && send_ipi) {
4999 * We upscale the frequency. Must make the guest
5000 * doesn't see old kvmclock values while running with
5001 * the new frequency, otherwise we risk the guest sees
5002 * time go backwards.
5004 * In case we update the frequency for another cpu
5005 * (which might be in guest context) send an interrupt
5006 * to kick the cpu out of guest context. Next time
5007 * guest context is entered kvmclock will be updated,
5008 * so the guest will not see stale values.
5010 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5015 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5016 .notifier_call = kvmclock_cpufreq_notifier
5019 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5020 unsigned long action, void *hcpu)
5022 unsigned int cpu = (unsigned long)hcpu;
5026 case CPU_DOWN_FAILED:
5027 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5029 case CPU_DOWN_PREPARE:
5030 smp_call_function_single(cpu, tsc_bad, NULL, 1);
5036 static struct notifier_block kvmclock_cpu_notifier_block = {
5037 .notifier_call = kvmclock_cpu_notifier,
5038 .priority = -INT_MAX
5041 static void kvm_timer_init(void)
5045 max_tsc_khz = tsc_khz;
5046 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5047 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5048 #ifdef CONFIG_CPU_FREQ
5049 struct cpufreq_policy policy;
5050 memset(&policy, 0, sizeof(policy));
5052 cpufreq_get_policy(&policy, cpu);
5053 if (policy.cpuinfo.max_freq)
5054 max_tsc_khz = policy.cpuinfo.max_freq;
5057 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5058 CPUFREQ_TRANSITION_NOTIFIER);
5060 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5061 for_each_online_cpu(cpu)
5062 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5065 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5067 static int kvm_is_in_guest(void)
5069 return percpu_read(current_vcpu) != NULL;
5072 static int kvm_is_user_mode(void)
5076 if (percpu_read(current_vcpu))
5077 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5079 return user_mode != 0;
5082 static unsigned long kvm_get_guest_ip(void)
5084 unsigned long ip = 0;
5086 if (percpu_read(current_vcpu))
5087 ip = kvm_rip_read(percpu_read(current_vcpu));
5092 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5093 .is_in_guest = kvm_is_in_guest,
5094 .is_user_mode = kvm_is_user_mode,
5095 .get_guest_ip = kvm_get_guest_ip,
5098 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5100 percpu_write(current_vcpu, vcpu);
5102 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5104 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5106 percpu_write(current_vcpu, NULL);
5108 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5110 static void kvm_set_mmio_spte_mask(void)
5113 int maxphyaddr = boot_cpu_data.x86_phys_bits;
5116 * Set the reserved bits and the present bit of an paging-structure
5117 * entry to generate page fault with PFER.RSV = 1.
5119 mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5122 #ifdef CONFIG_X86_64
5124 * If reserved bit is not supported, clear the present bit to disable
5127 if (maxphyaddr == 52)
5131 kvm_mmu_set_mmio_spte_mask(mask);
5134 int kvm_arch_init(void *opaque)
5137 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5140 printk(KERN_ERR "kvm: already loaded the other module\n");
5145 if (!ops->cpu_has_kvm_support()) {
5146 printk(KERN_ERR "kvm: no hardware support\n");
5150 if (ops->disabled_by_bios()) {
5151 printk(KERN_ERR "kvm: disabled by bios\n");
5156 r = kvm_mmu_module_init();
5160 kvm_set_mmio_spte_mask();
5161 kvm_init_msr_list();
5164 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5165 PT_DIRTY_MASK, PT64_NX_MASK, 0);
5169 perf_register_guest_info_callbacks(&kvm_guest_cbs);
5172 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5180 void kvm_arch_exit(void)
5182 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5184 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5185 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5186 CPUFREQ_TRANSITION_NOTIFIER);
5187 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5189 kvm_mmu_module_exit();
5192 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5194 ++vcpu->stat.halt_exits;
5195 if (irqchip_in_kernel(vcpu->kvm)) {
5196 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5199 vcpu->run->exit_reason = KVM_EXIT_HLT;
5203 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5205 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5208 if (is_long_mode(vcpu))
5211 return a0 | ((gpa_t)a1 << 32);
5214 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5216 u64 param, ingpa, outgpa, ret;
5217 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5218 bool fast, longmode;
5222 * hypercall generates UD from non zero cpl and real mode
5225 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5226 kvm_queue_exception(vcpu, UD_VECTOR);
5230 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5231 longmode = is_long_mode(vcpu) && cs_l == 1;
5234 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5235 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5236 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5237 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5238 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5239 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5241 #ifdef CONFIG_X86_64
5243 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5244 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5245 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5249 code = param & 0xffff;
5250 fast = (param >> 16) & 0x1;
5251 rep_cnt = (param >> 32) & 0xfff;
5252 rep_idx = (param >> 48) & 0xfff;
5254 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5257 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5258 kvm_vcpu_on_spin(vcpu);
5261 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5265 ret = res | (((u64)rep_done & 0xfff) << 32);
5267 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5269 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5270 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5276 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5278 unsigned long nr, a0, a1, a2, a3, ret;
5281 if (kvm_hv_hypercall_enabled(vcpu->kvm))
5282 return kvm_hv_hypercall(vcpu);
5284 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5285 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5286 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5287 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5288 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5290 trace_kvm_hypercall(nr, a0, a1, a2, a3);
5292 if (!is_long_mode(vcpu)) {
5300 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5306 case KVM_HC_VAPIC_POLL_IRQ:
5310 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5317 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5318 ++vcpu->stat.hypercalls;
5321 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5323 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5325 struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5326 char instruction[3];
5327 unsigned long rip = kvm_rip_read(vcpu);
5330 * Blow out the MMU to ensure that no other VCPU has an active mapping
5331 * to ensure that the updated hypercall appears atomically across all
5334 kvm_mmu_zap_all(vcpu->kvm);
5336 kvm_x86_ops->patch_hypercall(vcpu, instruction);
5338 return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5341 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5343 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5344 int j, nent = vcpu->arch.cpuid_nent;
5346 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5347 /* when no next entry is found, the current entry[i] is reselected */
5348 for (j = i + 1; ; j = (j + 1) % nent) {
5349 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5350 if (ej->function == e->function) {
5351 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5355 return 0; /* silence gcc, even though control never reaches here */
5358 /* find an entry with matching function, matching index (if needed), and that
5359 * should be read next (if it's stateful) */
5360 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5361 u32 function, u32 index)
5363 if (e->function != function)
5365 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5367 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5368 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5373 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5374 u32 function, u32 index)
5377 struct kvm_cpuid_entry2 *best = NULL;
5379 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5380 struct kvm_cpuid_entry2 *e;
5382 e = &vcpu->arch.cpuid_entries[i];
5383 if (is_matching_cpuid_entry(e, function, index)) {
5384 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5385 move_to_next_stateful_cpuid_entry(vcpu, i);
5392 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5394 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5396 struct kvm_cpuid_entry2 *best;
5398 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5399 if (!best || best->eax < 0x80000008)
5401 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5403 return best->eax & 0xff;
5409 * If no match is found, check whether we exceed the vCPU's limit
5410 * and return the content of the highest valid _standard_ leaf instead.
5411 * This is to satisfy the CPUID specification.
5413 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5414 u32 function, u32 index)
5416 struct kvm_cpuid_entry2 *maxlevel;
5418 maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5419 if (!maxlevel || maxlevel->eax >= function)
5421 if (function & 0x80000000) {
5422 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5426 return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5429 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5431 u32 function, index;
5432 struct kvm_cpuid_entry2 *best;
5434 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5435 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5436 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5437 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5438 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5439 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5440 best = kvm_find_cpuid_entry(vcpu, function, index);
5443 best = check_cpuid_limit(vcpu, function, index);
5446 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5447 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5448 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5449 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5451 kvm_x86_ops->skip_emulated_instruction(vcpu);
5452 trace_kvm_cpuid(function,
5453 kvm_register_read(vcpu, VCPU_REGS_RAX),
5454 kvm_register_read(vcpu, VCPU_REGS_RBX),
5455 kvm_register_read(vcpu, VCPU_REGS_RCX),
5456 kvm_register_read(vcpu, VCPU_REGS_RDX));
5458 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5461 * Check if userspace requested an interrupt window, and that the
5462 * interrupt window is open.
5464 * No need to exit to userspace if we already have an interrupt queued.
5466 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5468 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5469 vcpu->run->request_interrupt_window &&
5470 kvm_arch_interrupt_allowed(vcpu));
5473 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5475 struct kvm_run *kvm_run = vcpu->run;
5477 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5478 kvm_run->cr8 = kvm_get_cr8(vcpu);
5479 kvm_run->apic_base = kvm_get_apic_base(vcpu);
5480 if (irqchip_in_kernel(vcpu->kvm))
5481 kvm_run->ready_for_interrupt_injection = 1;
5483 kvm_run->ready_for_interrupt_injection =
5484 kvm_arch_interrupt_allowed(vcpu) &&
5485 !kvm_cpu_has_interrupt(vcpu) &&
5486 !kvm_event_needs_reinjection(vcpu);
5489 static void vapic_enter(struct kvm_vcpu *vcpu)
5491 struct kvm_lapic *apic = vcpu->arch.apic;
5494 if (!apic || !apic->vapic_addr)
5497 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5499 vcpu->arch.apic->vapic_page = page;
5502 static void vapic_exit(struct kvm_vcpu *vcpu)
5504 struct kvm_lapic *apic = vcpu->arch.apic;
5507 if (!apic || !apic->vapic_addr)
5510 idx = srcu_read_lock(&vcpu->kvm->srcu);
5511 kvm_release_page_dirty(apic->vapic_page);
5512 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5513 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5516 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5520 if (!kvm_x86_ops->update_cr8_intercept)
5523 if (!vcpu->arch.apic)
5526 if (!vcpu->arch.apic->vapic_addr)
5527 max_irr = kvm_lapic_find_highest_irr(vcpu);
5534 tpr = kvm_lapic_get_cr8(vcpu);
5536 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5539 static void inject_pending_event(struct kvm_vcpu *vcpu)
5541 /* try to reinject previous events if any */
5542 if (vcpu->arch.exception.pending) {
5543 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5544 vcpu->arch.exception.has_error_code,
5545 vcpu->arch.exception.error_code);
5546 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5547 vcpu->arch.exception.has_error_code,
5548 vcpu->arch.exception.error_code,
5549 vcpu->arch.exception.reinject);
5553 if (vcpu->arch.nmi_injected) {
5554 kvm_x86_ops->set_nmi(vcpu);
5558 if (vcpu->arch.interrupt.pending) {
5559 kvm_x86_ops->set_irq(vcpu);
5563 /* try to inject new event if pending */
5564 if (vcpu->arch.nmi_pending) {
5565 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5566 vcpu->arch.nmi_pending = false;
5567 vcpu->arch.nmi_injected = true;
5568 kvm_x86_ops->set_nmi(vcpu);
5570 } else if (kvm_cpu_has_interrupt(vcpu)) {
5571 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5572 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5574 kvm_x86_ops->set_irq(vcpu);
5579 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5581 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5582 !vcpu->guest_xcr0_loaded) {
5583 /* kvm_set_xcr() also depends on this */
5584 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5585 vcpu->guest_xcr0_loaded = 1;
5589 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5591 if (vcpu->guest_xcr0_loaded) {
5592 if (vcpu->arch.xcr0 != host_xcr0)
5593 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5594 vcpu->guest_xcr0_loaded = 0;
5598 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5602 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5603 vcpu->run->request_interrupt_window;
5605 if (vcpu->requests) {
5606 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5607 kvm_mmu_unload(vcpu);
5608 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5609 __kvm_migrate_timers(vcpu);
5610 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5611 r = kvm_guest_time_update(vcpu);
5615 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5616 kvm_mmu_sync_roots(vcpu);
5617 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5618 kvm_x86_ops->tlb_flush(vcpu);
5619 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5620 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5624 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5625 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5629 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5630 vcpu->fpu_active = 0;
5631 kvm_x86_ops->fpu_deactivate(vcpu);
5633 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5634 /* Page is swapped out. Do synthetic halt */
5635 vcpu->arch.apf.halted = true;
5639 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5640 record_steal_time(vcpu);
5644 r = kvm_mmu_reload(vcpu);
5649 * An NMI can be injected between local nmi_pending read and
5650 * vcpu->arch.nmi_pending read inside inject_pending_event().
5651 * But in that case, KVM_REQ_EVENT will be set, which makes
5652 * the race described above benign.
5654 nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5656 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5657 inject_pending_event(vcpu);
5659 /* enable NMI/IRQ window open exits if needed */
5661 kvm_x86_ops->enable_nmi_window(vcpu);
5662 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5663 kvm_x86_ops->enable_irq_window(vcpu);
5665 if (kvm_lapic_enabled(vcpu)) {
5666 update_cr8_intercept(vcpu);
5667 kvm_lapic_sync_to_vapic(vcpu);
5673 kvm_x86_ops->prepare_guest_switch(vcpu);
5674 if (vcpu->fpu_active)
5675 kvm_load_guest_fpu(vcpu);
5676 kvm_load_guest_xcr0(vcpu);
5678 vcpu->mode = IN_GUEST_MODE;
5680 /* We should set ->mode before check ->requests,
5681 * see the comment in make_all_cpus_request.
5685 local_irq_disable();
5687 if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5688 || need_resched() || signal_pending(current)) {
5689 vcpu->mode = OUTSIDE_GUEST_MODE;
5693 kvm_x86_ops->cancel_injection(vcpu);
5698 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5702 if (unlikely(vcpu->arch.switch_db_regs)) {
5704 set_debugreg(vcpu->arch.eff_db[0], 0);
5705 set_debugreg(vcpu->arch.eff_db[1], 1);
5706 set_debugreg(vcpu->arch.eff_db[2], 2);
5707 set_debugreg(vcpu->arch.eff_db[3], 3);
5710 trace_kvm_entry(vcpu->vcpu_id);
5711 kvm_x86_ops->run(vcpu);
5714 * If the guest has used debug registers, at least dr7
5715 * will be disabled while returning to the host.
5716 * If we don't have active breakpoints in the host, we don't
5717 * care about the messed up debug address registers. But if
5718 * we have some of them active, restore the old state.
5720 if (hw_breakpoint_active())
5721 hw_breakpoint_restore();
5723 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5725 vcpu->mode = OUTSIDE_GUEST_MODE;
5732 * We must have an instruction between local_irq_enable() and
5733 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5734 * the interrupt shadow. The stat.exits increment will do nicely.
5735 * But we need to prevent reordering, hence this barrier():
5743 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5746 * Profile KVM exit RIPs:
5748 if (unlikely(prof_on == KVM_PROFILING)) {
5749 unsigned long rip = kvm_rip_read(vcpu);
5750 profile_hit(KVM_PROFILING, (void *)rip);
5754 kvm_lapic_sync_from_vapic(vcpu);
5756 r = kvm_x86_ops->handle_exit(vcpu);
5762 static int __vcpu_run(struct kvm_vcpu *vcpu)
5765 struct kvm *kvm = vcpu->kvm;
5767 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5768 pr_debug("vcpu %d received sipi with vector # %x\n",
5769 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5770 kvm_lapic_reset(vcpu);
5771 r = kvm_arch_vcpu_reset(vcpu);
5774 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5777 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5782 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5783 !vcpu->arch.apf.halted)
5784 r = vcpu_enter_guest(vcpu);
5786 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5787 kvm_vcpu_block(vcpu);
5788 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5789 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5791 switch(vcpu->arch.mp_state) {
5792 case KVM_MP_STATE_HALTED:
5793 vcpu->arch.mp_state =
5794 KVM_MP_STATE_RUNNABLE;
5795 case KVM_MP_STATE_RUNNABLE:
5796 vcpu->arch.apf.halted = false;
5798 case KVM_MP_STATE_SIPI_RECEIVED:
5809 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5810 if (kvm_cpu_has_pending_timer(vcpu))
5811 kvm_inject_pending_timer_irqs(vcpu);
5813 if (dm_request_for_irq_injection(vcpu)) {
5815 vcpu->run->exit_reason = KVM_EXIT_INTR;
5816 ++vcpu->stat.request_irq_exits;
5819 kvm_check_async_pf_completion(vcpu);
5821 if (signal_pending(current)) {
5823 vcpu->run->exit_reason = KVM_EXIT_INTR;
5824 ++vcpu->stat.signal_exits;
5826 if (need_resched()) {
5827 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5829 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5833 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5840 static int complete_mmio(struct kvm_vcpu *vcpu)
5842 struct kvm_run *run = vcpu->run;
5845 if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5848 if (vcpu->mmio_needed) {
5849 vcpu->mmio_needed = 0;
5850 if (!vcpu->mmio_is_write)
5851 memcpy(vcpu->mmio_data + vcpu->mmio_index,
5853 vcpu->mmio_index += 8;
5854 if (vcpu->mmio_index < vcpu->mmio_size) {
5855 run->exit_reason = KVM_EXIT_MMIO;
5856 run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5857 memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5858 run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5859 run->mmio.is_write = vcpu->mmio_is_write;
5860 vcpu->mmio_needed = 1;
5863 if (vcpu->mmio_is_write)
5865 vcpu->mmio_read_completed = 1;
5867 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5868 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5869 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5870 if (r != EMULATE_DONE)
5875 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5880 if (!tsk_used_math(current) && init_fpu(current))
5883 if (vcpu->sigset_active)
5884 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5886 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5887 kvm_vcpu_block(vcpu);
5888 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5893 /* re-sync apic's tpr */
5894 if (!irqchip_in_kernel(vcpu->kvm)) {
5895 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5901 r = complete_mmio(vcpu);
5905 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5906 kvm_register_write(vcpu, VCPU_REGS_RAX,
5907 kvm_run->hypercall.ret);
5909 r = __vcpu_run(vcpu);
5912 post_kvm_run_save(vcpu);
5913 if (vcpu->sigset_active)
5914 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5919 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5921 if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5923 * We are here if userspace calls get_regs() in the middle of
5924 * instruction emulation. Registers state needs to be copied
5925 * back from emulation context to vcpu. Usrapace shouldn't do
5926 * that usually, but some bad designed PV devices (vmware
5927 * backdoor interface) need this to work
5929 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5930 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5931 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5933 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5934 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5935 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5936 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5937 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5938 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5939 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5940 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5941 #ifdef CONFIG_X86_64
5942 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5943 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5944 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5945 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5946 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5947 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5948 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5949 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5952 regs->rip = kvm_rip_read(vcpu);
5953 regs->rflags = kvm_get_rflags(vcpu);
5958 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5960 vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5961 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5963 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5964 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5965 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5966 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5967 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5968 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5969 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5970 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5971 #ifdef CONFIG_X86_64
5972 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5973 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5974 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5975 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5976 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5977 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5978 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5979 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5982 kvm_rip_write(vcpu, regs->rip);
5983 kvm_set_rflags(vcpu, regs->rflags);
5985 vcpu->arch.exception.pending = false;
5987 kvm_make_request(KVM_REQ_EVENT, vcpu);
5992 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5994 struct kvm_segment cs;
5996 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6000 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6002 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6003 struct kvm_sregs *sregs)
6007 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6008 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6009 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6010 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6011 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6012 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6014 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6015 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6017 kvm_x86_ops->get_idt(vcpu, &dt);
6018 sregs->idt.limit = dt.size;
6019 sregs->idt.base = dt.address;
6020 kvm_x86_ops->get_gdt(vcpu, &dt);
6021 sregs->gdt.limit = dt.size;
6022 sregs->gdt.base = dt.address;
6024 sregs->cr0 = kvm_read_cr0(vcpu);
6025 sregs->cr2 = vcpu->arch.cr2;
6026 sregs->cr3 = kvm_read_cr3(vcpu);
6027 sregs->cr4 = kvm_read_cr4(vcpu);
6028 sregs->cr8 = kvm_get_cr8(vcpu);
6029 sregs->efer = vcpu->arch.efer;
6030 sregs->apic_base = kvm_get_apic_base(vcpu);
6032 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6034 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6035 set_bit(vcpu->arch.interrupt.nr,
6036 (unsigned long *)sregs->interrupt_bitmap);
6041 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6042 struct kvm_mp_state *mp_state)
6044 mp_state->mp_state = vcpu->arch.mp_state;
6048 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6049 struct kvm_mp_state *mp_state)
6051 vcpu->arch.mp_state = mp_state->mp_state;
6052 kvm_make_request(KVM_REQ_EVENT, vcpu);
6056 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6057 bool has_error_code, u32 error_code)
6059 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6062 init_emulate_ctxt(vcpu);
6064 ret = emulator_task_switch(ctxt, tss_selector, reason,
6065 has_error_code, error_code);
6068 return EMULATE_FAIL;
6070 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6071 kvm_rip_write(vcpu, ctxt->eip);
6072 kvm_set_rflags(vcpu, ctxt->eflags);
6073 kvm_make_request(KVM_REQ_EVENT, vcpu);
6074 return EMULATE_DONE;
6076 EXPORT_SYMBOL_GPL(kvm_task_switch);
6078 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6079 struct kvm_sregs *sregs)
6081 int mmu_reset_needed = 0;
6082 int pending_vec, max_bits, idx;
6085 dt.size = sregs->idt.limit;
6086 dt.address = sregs->idt.base;
6087 kvm_x86_ops->set_idt(vcpu, &dt);
6088 dt.size = sregs->gdt.limit;
6089 dt.address = sregs->gdt.base;
6090 kvm_x86_ops->set_gdt(vcpu, &dt);
6092 vcpu->arch.cr2 = sregs->cr2;
6093 mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6094 vcpu->arch.cr3 = sregs->cr3;
6095 __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6097 kvm_set_cr8(vcpu, sregs->cr8);
6099 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6100 kvm_x86_ops->set_efer(vcpu, sregs->efer);
6101 kvm_set_apic_base(vcpu, sregs->apic_base);
6103 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6104 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6105 vcpu->arch.cr0 = sregs->cr0;
6107 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6108 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6109 if (sregs->cr4 & X86_CR4_OSXSAVE)
6112 idx = srcu_read_lock(&vcpu->kvm->srcu);
6113 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6114 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6115 mmu_reset_needed = 1;
6117 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6119 if (mmu_reset_needed)
6120 kvm_mmu_reset_context(vcpu);
6122 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6123 pending_vec = find_first_bit(
6124 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6125 if (pending_vec < max_bits) {
6126 kvm_queue_interrupt(vcpu, pending_vec, false);
6127 pr_debug("Set back pending irq %d\n", pending_vec);
6130 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6131 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6132 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6133 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6134 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6135 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6137 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6138 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6140 update_cr8_intercept(vcpu);
6142 /* Older userspace won't unhalt the vcpu on reset. */
6143 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6144 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6146 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6148 kvm_make_request(KVM_REQ_EVENT, vcpu);
6153 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6154 struct kvm_guest_debug *dbg)
6156 unsigned long rflags;
6159 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6161 if (vcpu->arch.exception.pending)
6163 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6164 kvm_queue_exception(vcpu, DB_VECTOR);
6166 kvm_queue_exception(vcpu, BP_VECTOR);
6170 * Read rflags as long as potentially injected trace flags are still
6173 rflags = kvm_get_rflags(vcpu);
6175 vcpu->guest_debug = dbg->control;
6176 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6177 vcpu->guest_debug = 0;
6179 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6180 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6181 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6182 vcpu->arch.switch_db_regs =
6183 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6185 for (i = 0; i < KVM_NR_DB_REGS; i++)
6186 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6187 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6190 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6191 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6192 get_segment_base(vcpu, VCPU_SREG_CS);
6195 * Trigger an rflags update that will inject or remove the trace
6198 kvm_set_rflags(vcpu, rflags);
6200 kvm_x86_ops->set_guest_debug(vcpu, dbg);
6210 * Translate a guest virtual address to a guest physical address.
6212 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6213 struct kvm_translation *tr)
6215 unsigned long vaddr = tr->linear_address;
6219 idx = srcu_read_lock(&vcpu->kvm->srcu);
6220 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6221 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6222 tr->physical_address = gpa;
6223 tr->valid = gpa != UNMAPPED_GVA;
6230 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6232 struct i387_fxsave_struct *fxsave =
6233 &vcpu->arch.guest_fpu.state->fxsave;
6235 memcpy(fpu->fpr, fxsave->st_space, 128);
6236 fpu->fcw = fxsave->cwd;
6237 fpu->fsw = fxsave->swd;
6238 fpu->ftwx = fxsave->twd;
6239 fpu->last_opcode = fxsave->fop;
6240 fpu->last_ip = fxsave->rip;
6241 fpu->last_dp = fxsave->rdp;
6242 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6247 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6249 struct i387_fxsave_struct *fxsave =
6250 &vcpu->arch.guest_fpu.state->fxsave;
6252 memcpy(fxsave->st_space, fpu->fpr, 128);
6253 fxsave->cwd = fpu->fcw;
6254 fxsave->swd = fpu->fsw;
6255 fxsave->twd = fpu->ftwx;
6256 fxsave->fop = fpu->last_opcode;
6257 fxsave->rip = fpu->last_ip;
6258 fxsave->rdp = fpu->last_dp;
6259 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6264 int fx_init(struct kvm_vcpu *vcpu)
6268 err = fpu_alloc(&vcpu->arch.guest_fpu);
6272 fpu_finit(&vcpu->arch.guest_fpu);
6275 * Ensure guest xcr0 is valid for loading
6277 vcpu->arch.xcr0 = XSTATE_FP;
6279 vcpu->arch.cr0 |= X86_CR0_ET;
6283 EXPORT_SYMBOL_GPL(fx_init);
6285 static void fx_free(struct kvm_vcpu *vcpu)
6287 fpu_free(&vcpu->arch.guest_fpu);
6290 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6292 if (vcpu->guest_fpu_loaded)
6296 * Restore all possible states in the guest,
6297 * and assume host would use all available bits.
6298 * Guest xcr0 would be loaded later.
6300 kvm_put_guest_xcr0(vcpu);
6301 vcpu->guest_fpu_loaded = 1;
6302 unlazy_fpu(current);
6303 fpu_restore_checking(&vcpu->arch.guest_fpu);
6307 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6309 kvm_put_guest_xcr0(vcpu);
6311 if (!vcpu->guest_fpu_loaded)
6314 vcpu->guest_fpu_loaded = 0;
6315 fpu_save_init(&vcpu->arch.guest_fpu);
6316 ++vcpu->stat.fpu_reload;
6317 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6321 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6323 kvmclock_reset(vcpu);
6325 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6327 kvm_x86_ops->vcpu_free(vcpu);
6330 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6333 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6334 printk_once(KERN_WARNING
6335 "kvm: SMP vm created on host with unstable TSC; "
6336 "guest TSC will not be reliable\n");
6337 return kvm_x86_ops->vcpu_create(kvm, id);
6340 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6344 vcpu->arch.mtrr_state.have_fixed = 1;
6346 r = kvm_arch_vcpu_reset(vcpu);
6348 r = kvm_mmu_setup(vcpu);
6354 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6356 vcpu->arch.apf.msr_val = 0;
6359 kvm_mmu_unload(vcpu);
6363 kvm_x86_ops->vcpu_free(vcpu);
6366 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6368 vcpu->arch.nmi_pending = false;
6369 vcpu->arch.nmi_injected = false;
6371 vcpu->arch.switch_db_regs = 0;
6372 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6373 vcpu->arch.dr6 = DR6_FIXED_1;
6374 vcpu->arch.dr7 = DR7_FIXED_1;
6376 kvm_make_request(KVM_REQ_EVENT, vcpu);
6377 vcpu->arch.apf.msr_val = 0;
6378 vcpu->arch.st.msr_val = 0;
6380 kvmclock_reset(vcpu);
6382 kvm_clear_async_pf_completion_queue(vcpu);
6383 kvm_async_pf_hash_reset(vcpu);
6384 vcpu->arch.apf.halted = false;
6386 return kvm_x86_ops->vcpu_reset(vcpu);
6389 int kvm_arch_hardware_enable(void *garbage)
6392 struct kvm_vcpu *vcpu;
6395 kvm_shared_msr_cpu_online();
6396 list_for_each_entry(kvm, &vm_list, vm_list)
6397 kvm_for_each_vcpu(i, vcpu, kvm)
6398 if (vcpu->cpu == smp_processor_id())
6399 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6400 return kvm_x86_ops->hardware_enable(garbage);
6403 void kvm_arch_hardware_disable(void *garbage)
6405 kvm_x86_ops->hardware_disable(garbage);
6406 drop_user_return_notifiers(garbage);
6409 int kvm_arch_hardware_setup(void)
6411 return kvm_x86_ops->hardware_setup();
6414 void kvm_arch_hardware_unsetup(void)
6416 kvm_x86_ops->hardware_unsetup();
6419 void kvm_arch_check_processor_compat(void *rtn)
6421 kvm_x86_ops->check_processor_compatibility(rtn);
6424 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6430 BUG_ON(vcpu->kvm == NULL);
6433 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6434 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6435 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6436 vcpu->arch.mmu.translate_gpa = translate_gpa;
6437 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6438 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6439 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6441 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6443 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6448 vcpu->arch.pio_data = page_address(page);
6450 kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6452 r = kvm_mmu_create(vcpu);
6454 goto fail_free_pio_data;
6456 if (irqchip_in_kernel(kvm)) {
6457 r = kvm_create_lapic(vcpu);
6459 goto fail_mmu_destroy;
6462 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6464 if (!vcpu->arch.mce_banks) {
6466 goto fail_free_lapic;
6468 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6470 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6471 goto fail_free_mce_banks;
6473 kvm_async_pf_hash_reset(vcpu);
6476 fail_free_mce_banks:
6477 kfree(vcpu->arch.mce_banks);
6479 kvm_free_lapic(vcpu);
6481 kvm_mmu_destroy(vcpu);
6483 free_page((unsigned long)vcpu->arch.pio_data);
6488 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6492 kfree(vcpu->arch.mce_banks);
6493 kvm_free_lapic(vcpu);
6494 idx = srcu_read_lock(&vcpu->kvm->srcu);
6495 kvm_mmu_destroy(vcpu);
6496 srcu_read_unlock(&vcpu->kvm->srcu, idx);
6497 free_page((unsigned long)vcpu->arch.pio_data);
6500 int kvm_arch_init_vm(struct kvm *kvm)
6502 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6503 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6505 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6506 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6508 raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6513 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6516 kvm_mmu_unload(vcpu);
6520 static void kvm_free_vcpus(struct kvm *kvm)
6523 struct kvm_vcpu *vcpu;
6526 * Unpin any mmu pages first.
6528 kvm_for_each_vcpu(i, vcpu, kvm) {
6529 kvm_clear_async_pf_completion_queue(vcpu);
6530 kvm_unload_vcpu_mmu(vcpu);
6532 kvm_for_each_vcpu(i, vcpu, kvm)
6533 kvm_arch_vcpu_free(vcpu);
6535 mutex_lock(&kvm->lock);
6536 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6537 kvm->vcpus[i] = NULL;
6539 atomic_set(&kvm->online_vcpus, 0);
6540 mutex_unlock(&kvm->lock);
6543 void kvm_arch_sync_events(struct kvm *kvm)
6545 kvm_free_all_assigned_devices(kvm);
6549 void kvm_arch_destroy_vm(struct kvm *kvm)
6551 kvm_iommu_unmap_guest(kvm);
6552 kfree(kvm->arch.vpic);
6553 kfree(kvm->arch.vioapic);
6554 kvm_free_vcpus(kvm);
6555 if (kvm->arch.apic_access_page)
6556 put_page(kvm->arch.apic_access_page);
6557 if (kvm->arch.ept_identity_pagetable)
6558 put_page(kvm->arch.ept_identity_pagetable);
6561 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6562 struct kvm_memory_slot *memslot,
6563 struct kvm_memory_slot old,
6564 struct kvm_userspace_memory_region *mem,
6567 int npages = memslot->npages;
6568 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6570 /* Prevent internal slot pages from being moved by fork()/COW. */
6571 if (memslot->id >= KVM_MEMORY_SLOTS)
6572 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6574 /*To keep backward compatibility with older userspace,
6575 *x86 needs to hanlde !user_alloc case.
6578 if (npages && !old.rmap) {
6579 unsigned long userspace_addr;
6581 down_write(¤t->mm->mmap_sem);
6582 userspace_addr = do_mmap(NULL, 0,
6584 PROT_READ | PROT_WRITE,
6587 up_write(¤t->mm->mmap_sem);
6589 if (IS_ERR((void *)userspace_addr))
6590 return PTR_ERR((void *)userspace_addr);
6592 memslot->userspace_addr = userspace_addr;
6600 void kvm_arch_commit_memory_region(struct kvm *kvm,
6601 struct kvm_userspace_memory_region *mem,
6602 struct kvm_memory_slot old,
6606 int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6608 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6611 down_write(¤t->mm->mmap_sem);
6612 ret = do_munmap(current->mm, old.userspace_addr,
6613 old.npages * PAGE_SIZE);
6614 up_write(¤t->mm->mmap_sem);
6617 "kvm_vm_ioctl_set_memory_region: "
6618 "failed to munmap memory\n");
6621 if (!kvm->arch.n_requested_mmu_pages)
6622 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6624 spin_lock(&kvm->mmu_lock);
6626 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6627 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6628 spin_unlock(&kvm->mmu_lock);
6631 void kvm_arch_flush_shadow(struct kvm *kvm)
6633 kvm_mmu_zap_all(kvm);
6634 kvm_reload_remote_mmus(kvm);
6637 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6639 return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6640 !vcpu->arch.apf.halted)
6641 || !list_empty_careful(&vcpu->async_pf.done)
6642 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6643 || vcpu->arch.nmi_pending ||
6644 (kvm_arch_interrupt_allowed(vcpu) &&
6645 kvm_cpu_has_interrupt(vcpu));
6648 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6651 int cpu = vcpu->cpu;
6653 if (waitqueue_active(&vcpu->wq)) {
6654 wake_up_interruptible(&vcpu->wq);
6655 ++vcpu->stat.halt_wakeup;
6659 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6660 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6661 smp_send_reschedule(cpu);
6665 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6667 return kvm_x86_ops->interrupt_allowed(vcpu);
6670 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6672 unsigned long current_rip = kvm_rip_read(vcpu) +
6673 get_segment_base(vcpu, VCPU_SREG_CS);
6675 return current_rip == linear_rip;
6677 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6679 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6681 unsigned long rflags;
6683 rflags = kvm_x86_ops->get_rflags(vcpu);
6684 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6685 rflags &= ~X86_EFLAGS_TF;
6688 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6690 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6692 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6693 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6694 rflags |= X86_EFLAGS_TF;
6695 kvm_x86_ops->set_rflags(vcpu, rflags);
6696 kvm_make_request(KVM_REQ_EVENT, vcpu);
6698 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6700 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6704 if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6705 is_error_page(work->page))
6708 r = kvm_mmu_reload(vcpu);
6712 if (!vcpu->arch.mmu.direct_map &&
6713 work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6716 vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6719 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6721 return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6724 static inline u32 kvm_async_pf_next_probe(u32 key)
6726 return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6729 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6731 u32 key = kvm_async_pf_hash_fn(gfn);
6733 while (vcpu->arch.apf.gfns[key] != ~0)
6734 key = kvm_async_pf_next_probe(key);
6736 vcpu->arch.apf.gfns[key] = gfn;
6739 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6742 u32 key = kvm_async_pf_hash_fn(gfn);
6744 for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6745 (vcpu->arch.apf.gfns[key] != gfn &&
6746 vcpu->arch.apf.gfns[key] != ~0); i++)
6747 key = kvm_async_pf_next_probe(key);
6752 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6754 return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6757 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6761 i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6763 vcpu->arch.apf.gfns[i] = ~0;
6765 j = kvm_async_pf_next_probe(j);
6766 if (vcpu->arch.apf.gfns[j] == ~0)
6768 k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6770 * k lies cyclically in ]i,j]
6772 * |....j i.k.| or |.k..j i...|
6774 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6775 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6780 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6783 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6787 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6788 struct kvm_async_pf *work)
6790 struct x86_exception fault;
6792 trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6793 kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6795 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6796 (vcpu->arch.apf.send_user_only &&
6797 kvm_x86_ops->get_cpl(vcpu) == 0))
6798 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6799 else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6800 fault.vector = PF_VECTOR;
6801 fault.error_code_valid = true;
6802 fault.error_code = 0;
6803 fault.nested_page_fault = false;
6804 fault.address = work->arch.token;
6805 kvm_inject_page_fault(vcpu, &fault);
6809 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6810 struct kvm_async_pf *work)
6812 struct x86_exception fault;
6814 trace_kvm_async_pf_ready(work->arch.token, work->gva);
6815 if (is_error_page(work->page))
6816 work->arch.token = ~0; /* broadcast wakeup */
6818 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6820 if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6821 !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6822 fault.vector = PF_VECTOR;
6823 fault.error_code_valid = true;
6824 fault.error_code = 0;
6825 fault.nested_page_fault = false;
6826 fault.address = work->arch.token;
6827 kvm_inject_page_fault(vcpu, &fault);
6829 vcpu->arch.apf.halted = false;
6832 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6834 if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6837 return !kvm_event_needs_reinjection(vcpu) &&
6838 kvm_x86_ops->interrupt_allowed(vcpu);
6841 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6842 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6843 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6844 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6845 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6846 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6847 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6848 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6849 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6850 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6851 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6852 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);