1 # ==========================================================================
3 # ==========================================================================
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
26 # Read .config if it exist, otherwise ignore
27 -include include/config/auto.conf
29 include scripts/Kbuild.include
31 # The filename Kbuild has precedence over Makefile
32 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
33 include $(if $(wildcard $(kbuild-dir)/Kbuild), $(kbuild-dir)/Kbuild, $(kbuild-dir)/Makefile)
35 include scripts/Makefile.lib
38 ifneq ($(hostprogs-y),$(host-progs))
39 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
40 hostprogs-y += $(host-progs)
44 # Do not include host rules unles needed
45 ifneq ($(hostprogs-y)$(hostprogs-m),)
46 include scripts/Makefile.host
49 ifneq ($(KBUILD_SRC),)
50 # Create output directory if not already present
51 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
53 # Create directories for object files if directory does not exist
54 # Needed when obj-y := dir/file.o syntax is used
55 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
60 $(warning kbuild: $(obj)/Makefile - Usage of EXTRA_TARGETS is obsolete in 2.6. Please fix!)
64 $(warning kbuild: $(obj)/Makefile - Usage of build-targets is obsolete in 2.6. Please fix!)
68 $(warning kbuild: $(obj)/Makefile - Usage of export-objs is obsolete in 2.6. Please fix!)
72 $(warning kbuild: $(obj)/Makefile - Usage of O_TARGET := $(O_TARGET) is obsolete in 2.6. Please fix!)
76 $(error kbuild: $(obj)/Makefile - Use of L_TARGET is replaced by lib-y in 2.6. Please fix!)
80 $(warning kbuild: $(obj)/Makefile - list-multi := $(list-multi) is obsolete in 2.6. Please fix!)
84 $(warning kbuild: Makefile.build is included improperly)
87 ifeq ($(CONFIG_XEN),y)
88 $(objtree)/scripts/Makefile.xen: $(srctree)/scripts/Makefile.xen.awk $(srctree)/scripts/Makefile.build
90 $(if $(shell echo a | $(AWK) '{ print gensub(/a/, "AA", "g"); }'),\
91 ,$(error 'Your awk program does not define gensub. Use gawk or another awk with gensub'))
92 @$(AWK) -f $< $(filter-out $<,$^) >$@
94 xen-src-single-used-m := $(patsubst $(srctree)/%,%,$(wildcard $(addprefix $(srctree)/,$(single-used-m:.o=-xen.c))))
95 xen-single-used-m := $(xen-src-single-used-m:-xen.c=.o)
96 single-used-m := $(filter-out $(xen-single-used-m),$(single-used-m))
98 -include $(objtree)/scripts/Makefile.xen
101 # ===========================================================================
103 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
104 lib-target := $(obj)/lib.a
107 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
108 builtin-target := $(obj)/built-in.o
111 # We keep a list of all modules in $(MODVERDIR)
113 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
114 $(if $(KBUILD_MODULES),$(obj-m)) \
115 $(subdir-ym) $(always)
118 # Linus' kernel sanity checking tool
119 ifneq ($(KBUILD_CHECKSRC),0)
120 ifeq ($(KBUILD_CHECKSRC),2)
121 quiet_cmd_force_checksrc = CHECK $<
122 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
124 quiet_cmd_checksrc = CHECK $<
125 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
130 # Compile C sources (.c)
131 # ---------------------------------------------------------------------------
133 # Default is built-in, unless we know otherwise
134 modkern_cflags := $(CFLAGS_KERNEL)
135 quiet_modtag := $(empty) $(empty)
137 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
138 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
139 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
140 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
142 $(real-objs-m) : quiet_modtag := [M]
143 $(real-objs-m:.o=.i) : quiet_modtag := [M]
144 $(real-objs-m:.o=.s) : quiet_modtag := [M]
145 $(real-objs-m:.o=.lst): quiet_modtag := [M]
147 $(obj-m) : quiet_modtag := [M]
149 # Default for not multi-part modules
150 modname = $(basetarget)
152 $(multi-objs-m) : modname = $(modname-multi)
153 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
154 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
155 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
156 $(multi-objs-y) : modname = $(modname-multi)
157 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
158 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
159 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
161 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
162 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
164 $(obj)/%.s: $(src)/%.c FORCE
165 $(call if_changed_dep,cc_s_c)
167 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
168 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
170 $(obj)/%.i: $(src)/%.c FORCE
171 $(call if_changed_dep,cc_i_c)
173 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
174 cmd_cc_symtypes_c = \
175 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
176 | $(GENKSYMS) -T $@ >/dev/null; \
177 test -s $@ || rm -f $@
179 $(obj)/%.symtypes : $(src)/%.c FORCE
180 $(call if_changed_dep,cc_symtypes_c)
183 # The C file is compiled and updated dependency information is generated.
184 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
186 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
188 ifndef CONFIG_MODVERSIONS
189 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
192 # When module versioning is enabled the following steps are executed:
193 # o compile a .tmp_<file>.o from <file>.c
194 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
195 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
197 # o otherwise, we calculate symbol versions using the good old
198 # genksyms on the preprocessed source and postprocess them in a way
199 # that they are usable as a linker script
200 # o generate <file>.o from .tmp_<file>.o using the linker to
201 # replace the unresolved symbols __crc_exported_symbol with
202 # the actual value of the checksum generated by genksyms
204 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
206 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
207 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
208 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
209 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
210 > $(@D)/.tmp_$(@F:.o=.ver); \
212 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
213 -T $(@D)/.tmp_$(@F:.o=.ver); \
214 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
216 mv -f $(@D)/.tmp_$(@F) $@; \
221 $(call echo-cmd,checksrc) $(cmd_checksrc) \
222 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
224 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
227 mv -f $(dot-target).tmp $(dot-target).cmd
230 # Built-in and composite module parts
231 $(obj)/%.o: $(src)/%.c FORCE
232 $(call cmd,force_checksrc)
233 $(call if_changed_rule,cc_o_c)
235 # Single-part modules are special since we need to mark them in $(MODVERDIR)
237 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
238 $(call cmd,force_checksrc)
239 $(call if_changed_rule,cc_o_c)
240 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
242 quiet_cmd_cc_lst_c = MKLST $@
243 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
244 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
245 System.map $(OBJDUMP) > $@
247 $(obj)/%.lst: $(src)/%.c FORCE
248 $(call if_changed_dep,cc_lst_c)
250 # Compile assembler sources (.S)
251 # ---------------------------------------------------------------------------
253 modkern_aflags := $(AFLAGS_KERNEL)
255 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
256 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
258 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
259 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
261 $(obj)/%.s: $(src)/%.S FORCE
262 $(call if_changed_dep,as_s_S)
264 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
265 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
267 $(obj)/%.o: $(src)/%.S FORCE
268 $(call if_changed_dep,as_o_S)
270 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
271 targets += $(extra-y) $(MAKECMDGOALS) $(always)
273 # Linker scripts preprocessor (.lds.S -> .lds)
274 # ---------------------------------------------------------------------------
275 quiet_cmd_cpp_lds_S = LDS $@
276 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
278 $(obj)/%.lds: $(src)/%.lds.S FORCE
279 $(call if_changed_dep,cpp_lds_S)
281 # Build the compiled-in targets
282 # ---------------------------------------------------------------------------
284 # To build objects in subdirs, we need to descend into the directories
285 $(sort $(subdir-obj-y)): $(subdir-ym) ;
288 # Rule to compile a set of .o files into one .o file
291 quiet_cmd_link_o_target = LD $@
292 # If the list of objects to link is empty, just create an empty built-in.o
293 cmd_link_o_target = $(if $(strip $(obj-y)),\
294 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
295 rm -f $@; $(AR) rcs $@)
297 $(builtin-target): $(obj-y) FORCE
298 $(call if_changed,link_o_target)
300 targets += $(builtin-target)
301 endif # builtin-target
304 # Rule to compile a set of .o files into one .a file
307 quiet_cmd_link_l_target = AR $@
308 cmd_link_l_target = rm -f $@; $(AR) $(EXTRA_ARFLAGS) rcs $@ $(lib-y)
310 $(lib-target): $(lib-y) FORCE
311 $(call if_changed,link_l_target)
313 targets += $(lib-target)
317 # Rule to link composite objects
319 # Composite objects are specified in kbuild makefile as follows:
320 # <composite-object>-objs := <list of .o files>
322 # <composite-object>-y := <list of .o files>
324 $(filter $(addprefix $(obj)/, \
325 $($(subst $(obj)/,,$(@:.o=-objs))) \
326 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
328 quiet_cmd_link_multi-y = LD $@
329 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
331 quiet_cmd_link_multi-m = LD [M] $@
332 cmd_link_multi-m = $(cmd_link_multi-y)
334 # We would rather have a list of rules like
336 # but that's not so easy, so we rather make all composite objects depend
337 # on the set of all their parts
338 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
339 $(call if_changed,link_multi-y)
341 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
342 $(call if_changed,link_multi-m)
343 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
345 targets += $(multi-used-y) $(multi-used-m)
349 # ---------------------------------------------------------------------------
351 PHONY += $(subdir-ym)
353 $(Q)$(MAKE) $(build)=$@
355 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
356 # ---------------------------------------------------------------------------
362 # Read all saved command lines and dependencies for the $(targets) we
363 # may be building above, using $(if_changed{,_dep}). As an
364 # optimization, we don't need to read them if the target does not
365 # exist, we will rebuild anyway in that case.
367 targets := $(wildcard $(sort $(targets)))
368 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
370 ifneq ($(cmd_files),)
375 # Declare the contents of the .PHONY variable as phony. We keep that
376 # information in a variable se we can use it in if_changed and friends.