1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/kernel.h>
14 #include <linux/types.h>
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/timer.h>
18 #include <linux/init.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/string.h>
24 #include <linux/dma-mapping.h>
26 #include <linux/gfp.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/onenand.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mmc/host.h>
31 #include <linux/ioport.h>
32 #include <linux/platform_data/s3c-hsudc.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
40 #include <mach/hardware.h>
42 #include <mach/irqs.h>
46 #include <plat/devs.h>
49 #include <plat/ehci.h>
51 #include <plat/fb-s3c2410.h>
52 #include <plat/hwmon.h>
54 #include <plat/keypad.h>
56 #include <plat/nand.h>
57 #include <plat/sdhci.h>
60 #include <plat/udc-hs.h>
61 #include <plat/usb-control.h>
62 #include <plat/usb-phy.h>
63 #include <plat/regs-iic.h>
64 #include <plat/regs-serial.h>
65 #include <plat/regs-spi.h>
66 #include <plat/s3c64xx-spi.h>
68 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
71 #ifdef CONFIG_CPU_S3C2440
72 static struct resource s3c_ac97_resource[] = {
73 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
74 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
75 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
76 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
77 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
80 struct platform_device s3c_device_ac97 = {
81 .name = "samsung-ac97",
83 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
84 .resource = s3c_ac97_resource,
86 .dma_mask = &samsung_device_dma_mask,
87 .coherent_dma_mask = DMA_BIT_MASK(32),
90 #endif /* CONFIG_CPU_S3C2440 */
94 #ifdef CONFIG_PLAT_S3C24XX
95 static struct resource s3c_adc_resource[] = {
96 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
97 [1] = DEFINE_RES_IRQ(IRQ_TC),
98 [2] = DEFINE_RES_IRQ(IRQ_ADC),
101 struct platform_device s3c_device_adc = {
102 .name = "s3c24xx-adc",
104 .num_resources = ARRAY_SIZE(s3c_adc_resource),
105 .resource = s3c_adc_resource,
107 #endif /* CONFIG_PLAT_S3C24XX */
109 #if defined(CONFIG_SAMSUNG_DEV_ADC)
110 static struct resource s3c_adc_resource[] = {
111 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
112 [1] = DEFINE_RES_IRQ(IRQ_TC),
113 [2] = DEFINE_RES_IRQ(IRQ_ADC),
116 struct platform_device s3c_device_adc = {
117 .name = "samsung-adc",
119 .num_resources = ARRAY_SIZE(s3c_adc_resource),
120 .resource = s3c_adc_resource,
122 #endif /* CONFIG_SAMSUNG_DEV_ADC */
124 /* Camif Controller */
126 #ifdef CONFIG_CPU_S3C2440
127 static struct resource s3c_camif_resource[] = {
128 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
129 [1] = DEFINE_RES_IRQ(IRQ_CAM),
132 struct platform_device s3c_device_camif = {
133 .name = "s3c2440-camif",
135 .num_resources = ARRAY_SIZE(s3c_camif_resource),
136 .resource = s3c_camif_resource,
138 .dma_mask = &samsung_device_dma_mask,
139 .coherent_dma_mask = DMA_BIT_MASK(32),
142 #endif /* CONFIG_CPU_S3C2440 */
146 struct platform_device samsung_asoc_dma = {
147 .name = "samsung-audio",
150 .dma_mask = &samsung_device_dma_mask,
151 .coherent_dma_mask = DMA_BIT_MASK(32),
155 struct platform_device samsung_asoc_idma = {
156 .name = "samsung-idma",
159 .dma_mask = &samsung_device_dma_mask,
160 .coherent_dma_mask = DMA_BIT_MASK(32),
166 #ifdef CONFIG_S3C_DEV_FB
167 static struct resource s3c_fb_resource[] = {
168 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
169 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
170 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
171 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
174 struct platform_device s3c_device_fb = {
177 .num_resources = ARRAY_SIZE(s3c_fb_resource),
178 .resource = s3c_fb_resource,
180 .dma_mask = &samsung_device_dma_mask,
181 .coherent_dma_mask = DMA_BIT_MASK(32),
185 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
187 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
190 #endif /* CONFIG_S3C_DEV_FB */
194 #ifdef CONFIG_S5P_DEV_FIMC0
195 static struct resource s5p_fimc0_resource[] = {
196 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
197 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
200 struct platform_device s5p_device_fimc0 = {
203 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
204 .resource = s5p_fimc0_resource,
206 .dma_mask = &samsung_device_dma_mask,
207 .coherent_dma_mask = DMA_BIT_MASK(32),
211 struct platform_device s5p_device_fimc_md = {
212 .name = "s5p-fimc-md",
215 #endif /* CONFIG_S5P_DEV_FIMC0 */
217 #ifdef CONFIG_S5P_DEV_FIMC1
218 static struct resource s5p_fimc1_resource[] = {
219 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
220 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
223 struct platform_device s5p_device_fimc1 = {
226 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
227 .resource = s5p_fimc1_resource,
229 .dma_mask = &samsung_device_dma_mask,
230 .coherent_dma_mask = DMA_BIT_MASK(32),
233 #endif /* CONFIG_S5P_DEV_FIMC1 */
235 #ifdef CONFIG_S5P_DEV_FIMC2
236 static struct resource s5p_fimc2_resource[] = {
237 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
238 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
241 struct platform_device s5p_device_fimc2 = {
244 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
245 .resource = s5p_fimc2_resource,
247 .dma_mask = &samsung_device_dma_mask,
248 .coherent_dma_mask = DMA_BIT_MASK(32),
251 #endif /* CONFIG_S5P_DEV_FIMC2 */
253 #ifdef CONFIG_S5P_DEV_FIMC3
254 static struct resource s5p_fimc3_resource[] = {
255 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
256 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
259 struct platform_device s5p_device_fimc3 = {
262 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
263 .resource = s5p_fimc3_resource,
265 .dma_mask = &samsung_device_dma_mask,
266 .coherent_dma_mask = DMA_BIT_MASK(32),
269 #endif /* CONFIG_S5P_DEV_FIMC3 */
273 #ifdef CONFIG_S5P_DEV_G2D
274 static struct resource s5p_g2d_resource[] = {
277 .end = S5P_PA_G2D + SZ_4K - 1,
278 .flags = IORESOURCE_MEM,
283 .flags = IORESOURCE_IRQ,
287 struct platform_device s5p_device_g2d = {
290 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
291 .resource = s5p_g2d_resource,
293 .dma_mask = &samsung_device_dma_mask,
294 .coherent_dma_mask = DMA_BIT_MASK(32),
297 #endif /* CONFIG_S5P_DEV_G2D */
299 #ifdef CONFIG_S5P_DEV_JPEG
300 static struct resource s5p_jpeg_resource[] = {
301 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
302 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
305 struct platform_device s5p_device_jpeg = {
308 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
309 .resource = s5p_jpeg_resource,
311 .dma_mask = &samsung_device_dma_mask,
312 .coherent_dma_mask = DMA_BIT_MASK(32),
315 #endif /* CONFIG_S5P_DEV_JPEG */
319 #ifdef CONFIG_S5P_DEV_FIMD0
320 static struct resource s5p_fimd0_resource[] = {
321 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
322 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
323 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
324 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
327 struct platform_device s5p_device_fimd0 = {
330 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
331 .resource = s5p_fimd0_resource,
333 .dma_mask = &samsung_device_dma_mask,
334 .coherent_dma_mask = DMA_BIT_MASK(32),
338 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
340 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
343 #endif /* CONFIG_S5P_DEV_FIMD0 */
347 #ifdef CONFIG_S3C_DEV_HWMON
348 struct platform_device s3c_device_hwmon = {
351 .dev.parent = &s3c_device_adc.dev,
354 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
356 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
359 #endif /* CONFIG_S3C_DEV_HWMON */
363 #ifdef CONFIG_S3C_DEV_HSMMC
364 static struct resource s3c_hsmmc_resource[] = {
365 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
366 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
369 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
371 .host_caps = (MMC_CAP_4_BIT_DATA |
372 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
373 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
376 struct platform_device s3c_device_hsmmc0 = {
379 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
380 .resource = s3c_hsmmc_resource,
382 .dma_mask = &samsung_device_dma_mask,
383 .coherent_dma_mask = DMA_BIT_MASK(32),
384 .platform_data = &s3c_hsmmc0_def_platdata,
388 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
390 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
392 #endif /* CONFIG_S3C_DEV_HSMMC */
394 #ifdef CONFIG_S3C_DEV_HSMMC1
395 static struct resource s3c_hsmmc1_resource[] = {
396 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
397 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
400 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
402 .host_caps = (MMC_CAP_4_BIT_DATA |
403 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
404 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
407 struct platform_device s3c_device_hsmmc1 = {
410 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
411 .resource = s3c_hsmmc1_resource,
413 .dma_mask = &samsung_device_dma_mask,
414 .coherent_dma_mask = DMA_BIT_MASK(32),
415 .platform_data = &s3c_hsmmc1_def_platdata,
419 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
421 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
423 #endif /* CONFIG_S3C_DEV_HSMMC1 */
427 #ifdef CONFIG_S3C_DEV_HSMMC2
428 static struct resource s3c_hsmmc2_resource[] = {
429 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
430 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
433 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
435 .host_caps = (MMC_CAP_4_BIT_DATA |
436 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
437 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
440 struct platform_device s3c_device_hsmmc2 = {
443 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
444 .resource = s3c_hsmmc2_resource,
446 .dma_mask = &samsung_device_dma_mask,
447 .coherent_dma_mask = DMA_BIT_MASK(32),
448 .platform_data = &s3c_hsmmc2_def_platdata,
452 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
454 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
456 #endif /* CONFIG_S3C_DEV_HSMMC2 */
458 #ifdef CONFIG_S3C_DEV_HSMMC3
459 static struct resource s3c_hsmmc3_resource[] = {
460 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
461 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
464 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
466 .host_caps = (MMC_CAP_4_BIT_DATA |
467 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
468 .clk_type = S3C_SDHCI_CLK_DIV_INTERNAL,
471 struct platform_device s3c_device_hsmmc3 = {
474 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
475 .resource = s3c_hsmmc3_resource,
477 .dma_mask = &samsung_device_dma_mask,
478 .coherent_dma_mask = DMA_BIT_MASK(32),
479 .platform_data = &s3c_hsmmc3_def_platdata,
483 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
485 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
487 #endif /* CONFIG_S3C_DEV_HSMMC3 */
491 static struct resource s3c_i2c0_resource[] = {
492 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
493 [1] = DEFINE_RES_IRQ(IRQ_IIC),
496 struct platform_device s3c_device_i2c0 = {
497 .name = "s3c2410-i2c",
498 #ifdef CONFIG_S3C_DEV_I2C1
503 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
504 .resource = s3c_i2c0_resource,
507 struct s3c2410_platform_i2c default_i2c_data __initdata = {
510 .frequency = 100*1000,
514 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
516 struct s3c2410_platform_i2c *npd;
519 pd = &default_i2c_data;
523 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
527 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
530 #ifdef CONFIG_S3C_DEV_I2C1
531 static struct resource s3c_i2c1_resource[] = {
532 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
533 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
536 struct platform_device s3c_device_i2c1 = {
537 .name = "s3c2410-i2c",
539 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
540 .resource = s3c_i2c1_resource,
543 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
545 struct s3c2410_platform_i2c *npd;
548 pd = &default_i2c_data;
552 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
556 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
558 #endif /* CONFIG_S3C_DEV_I2C1 */
560 #ifdef CONFIG_S3C_DEV_I2C2
561 static struct resource s3c_i2c2_resource[] = {
562 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
563 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
566 struct platform_device s3c_device_i2c2 = {
567 .name = "s3c2410-i2c",
569 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
570 .resource = s3c_i2c2_resource,
573 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
575 struct s3c2410_platform_i2c *npd;
578 pd = &default_i2c_data;
582 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
586 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
588 #endif /* CONFIG_S3C_DEV_I2C2 */
590 #ifdef CONFIG_S3C_DEV_I2C3
591 static struct resource s3c_i2c3_resource[] = {
592 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
593 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
596 struct platform_device s3c_device_i2c3 = {
597 .name = "s3c2440-i2c",
599 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
600 .resource = s3c_i2c3_resource,
603 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
605 struct s3c2410_platform_i2c *npd;
608 pd = &default_i2c_data;
612 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
616 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
618 #endif /*CONFIG_S3C_DEV_I2C3 */
620 #ifdef CONFIG_S3C_DEV_I2C4
621 static struct resource s3c_i2c4_resource[] = {
622 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
623 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
626 struct platform_device s3c_device_i2c4 = {
627 .name = "s3c2440-i2c",
629 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
630 .resource = s3c_i2c4_resource,
633 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
635 struct s3c2410_platform_i2c *npd;
638 pd = &default_i2c_data;
642 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
646 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
648 #endif /*CONFIG_S3C_DEV_I2C4 */
650 #ifdef CONFIG_S3C_DEV_I2C5
651 static struct resource s3c_i2c5_resource[] = {
652 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
653 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
656 struct platform_device s3c_device_i2c5 = {
657 .name = "s3c2440-i2c",
659 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
660 .resource = s3c_i2c5_resource,
663 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
665 struct s3c2410_platform_i2c *npd;
668 pd = &default_i2c_data;
672 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
676 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
678 #endif /*CONFIG_S3C_DEV_I2C5 */
680 #ifdef CONFIG_S3C_DEV_I2C6
681 static struct resource s3c_i2c6_resource[] = {
682 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
683 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
686 struct platform_device s3c_device_i2c6 = {
687 .name = "s3c2440-i2c",
689 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
690 .resource = s3c_i2c6_resource,
693 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
695 struct s3c2410_platform_i2c *npd;
698 pd = &default_i2c_data;
702 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
706 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
708 #endif /* CONFIG_S3C_DEV_I2C6 */
710 #ifdef CONFIG_S3C_DEV_I2C7
711 static struct resource s3c_i2c7_resource[] = {
712 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
713 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
716 struct platform_device s3c_device_i2c7 = {
717 .name = "s3c2440-i2c",
719 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
720 .resource = s3c_i2c7_resource,
723 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
725 struct s3c2410_platform_i2c *npd;
728 pd = &default_i2c_data;
732 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
736 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
738 #endif /* CONFIG_S3C_DEV_I2C7 */
742 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
743 static struct resource s5p_i2c_resource[] = {
744 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
745 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
748 struct platform_device s5p_device_i2c_hdmiphy = {
749 .name = "s3c2440-hdmiphy-i2c",
751 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
752 .resource = s5p_i2c_resource,
755 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
757 struct s3c2410_platform_i2c *npd;
760 pd = &default_i2c_data;
762 if (soc_is_exynos4210())
764 else if (soc_is_s5pv210())
770 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
771 &s5p_device_i2c_hdmiphy);
773 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
777 #ifdef CONFIG_PLAT_S3C24XX
778 static struct resource s3c_iis_resource[] = {
779 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
782 struct platform_device s3c_device_iis = {
783 .name = "s3c24xx-iis",
785 .num_resources = ARRAY_SIZE(s3c_iis_resource),
786 .resource = s3c_iis_resource,
788 .dma_mask = &samsung_device_dma_mask,
789 .coherent_dma_mask = DMA_BIT_MASK(32),
792 #endif /* CONFIG_PLAT_S3C24XX */
796 #ifdef CONFIG_SAMSUNG_DEV_IDE
797 static struct resource s3c_cfcon_resource[] = {
798 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
799 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
802 struct platform_device s3c_device_cfcon = {
804 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
805 .resource = s3c_cfcon_resource,
808 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
810 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
813 #endif /* CONFIG_SAMSUNG_DEV_IDE */
817 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
818 static struct resource samsung_keypad_resources[] = {
819 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
820 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
823 struct platform_device samsung_device_keypad = {
824 .name = "samsung-keypad",
826 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
827 .resource = samsung_keypad_resources,
830 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
832 struct samsung_keypad_platdata *npd;
834 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
835 &samsung_device_keypad);
838 npd->cfg_gpio = samsung_keypad_cfg_gpio;
840 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
844 #ifdef CONFIG_PLAT_S3C24XX
845 static struct resource s3c_lcd_resource[] = {
846 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
847 [1] = DEFINE_RES_IRQ(IRQ_LCD),
850 struct platform_device s3c_device_lcd = {
851 .name = "s3c2410-lcd",
853 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
854 .resource = s3c_lcd_resource,
856 .dma_mask = &samsung_device_dma_mask,
857 .coherent_dma_mask = DMA_BIT_MASK(32),
861 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
863 struct s3c2410fb_mach_info *npd;
865 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
867 npd->displays = kmemdup(pd->displays,
868 sizeof(struct s3c2410fb_display) * npd->num_displays,
871 printk(KERN_ERR "no memory for LCD display data\n");
873 printk(KERN_ERR "no memory for LCD platform data\n");
876 #endif /* CONFIG_PLAT_S3C24XX */
880 #ifdef CONFIG_S5P_DEV_MFC
881 static struct resource s5p_mfc_resource[] = {
882 [0] = DEFINE_RES_MEM(S5P_PA_MFC, SZ_64K),
883 [1] = DEFINE_RES_IRQ(IRQ_MFC),
886 struct platform_device s5p_device_mfc = {
889 .num_resources = ARRAY_SIZE(s5p_mfc_resource),
890 .resource = s5p_mfc_resource,
894 * MFC hardware has 2 memory interfaces which are modelled as two separate
895 * platform devices to let dma-mapping distinguish between them.
897 * MFC parent device (s5p_device_mfc) must be registered before memory
898 * interface specific devices (s5p_device_mfc_l and s5p_device_mfc_r).
901 struct platform_device s5p_device_mfc_l = {
905 .parent = &s5p_device_mfc.dev,
906 .dma_mask = &samsung_device_dma_mask,
907 .coherent_dma_mask = DMA_BIT_MASK(32),
911 struct platform_device s5p_device_mfc_r = {
915 .parent = &s5p_device_mfc.dev,
916 .dma_mask = &samsung_device_dma_mask,
917 .coherent_dma_mask = DMA_BIT_MASK(32),
920 #endif /* CONFIG_S5P_DEV_MFC */
924 #ifdef CONFIG_S5P_DEV_CSIS0
925 static struct resource s5p_mipi_csis0_resource[] = {
926 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
927 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
930 struct platform_device s5p_device_mipi_csis0 = {
931 .name = "s5p-mipi-csis",
933 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
934 .resource = s5p_mipi_csis0_resource,
936 #endif /* CONFIG_S5P_DEV_CSIS0 */
938 #ifdef CONFIG_S5P_DEV_CSIS1
939 static struct resource s5p_mipi_csis1_resource[] = {
940 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
941 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
944 struct platform_device s5p_device_mipi_csis1 = {
945 .name = "s5p-mipi-csis",
947 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
948 .resource = s5p_mipi_csis1_resource,
954 #ifdef CONFIG_S3C_DEV_NAND
955 static struct resource s3c_nand_resource[] = {
956 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
959 struct platform_device s3c_device_nand = {
960 .name = "s3c2410-nand",
962 .num_resources = ARRAY_SIZE(s3c_nand_resource),
963 .resource = s3c_nand_resource,
967 * s3c_nand_copy_set() - copy nand set data
968 * @set: The new structure, directly copied from the old.
970 * Copy all the fields from the NAND set field from what is probably __initdata
971 * to new kernel memory. The code returns 0 if the copy happened correctly or
972 * an error code for the calling function to display.
974 * Note, we currently do not try and look to see if we've already copied the
975 * data in a previous set.
977 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
982 size = sizeof(struct mtd_partition) * set->nr_partitions;
984 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
985 set->partitions = ptr;
991 if (set->nr_map && set->nr_chips) {
992 size = sizeof(int) * set->nr_chips;
993 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
1000 if (set->ecc_layout) {
1001 ptr = kmemdup(set->ecc_layout,
1002 sizeof(struct nand_ecclayout), GFP_KERNEL);
1003 set->ecc_layout = ptr;
1012 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
1014 struct s3c2410_platform_nand *npd;
1018 /* note, if we get a failure in allocation, we simply drop out of the
1019 * function. If there is so little memory available at initialisation
1020 * time then there is little chance the system is going to run.
1023 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
1028 /* now see if we need to copy any of the nand set data */
1030 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
1032 struct s3c2410_nand_set *from = npd->sets;
1033 struct s3c2410_nand_set *to;
1036 to = kmemdup(from, size, GFP_KERNEL);
1037 npd->sets = to; /* set, even if we failed */
1040 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1044 for (i = 0; i < npd->nr_sets; i++) {
1045 ret = s3c_nand_copy_set(to);
1047 printk(KERN_ERR "%s: failed to copy set %d\n",
1055 #endif /* CONFIG_S3C_DEV_NAND */
1059 #ifdef CONFIG_S3C_DEV_ONENAND
1060 static struct resource s3c_onenand_resources[] = {
1061 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1062 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1063 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1066 struct platform_device s3c_device_onenand = {
1067 .name = "samsung-onenand",
1069 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1070 .resource = s3c_onenand_resources,
1072 #endif /* CONFIG_S3C_DEV_ONENAND */
1074 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1075 static struct resource s3c64xx_onenand1_resources[] = {
1076 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1077 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1078 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1081 struct platform_device s3c64xx_device_onenand1 = {
1082 .name = "samsung-onenand",
1084 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1085 .resource = s3c64xx_onenand1_resources,
1088 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1090 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1091 &s3c64xx_device_onenand1);
1093 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1095 #ifdef CONFIG_S5P_DEV_ONENAND
1096 static struct resource s5p_onenand_resources[] = {
1097 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1098 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1099 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1102 struct platform_device s5p_device_onenand = {
1103 .name = "s5pc110-onenand",
1105 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1106 .resource = s5p_onenand_resources,
1108 #endif /* CONFIG_S5P_DEV_ONENAND */
1112 #ifdef CONFIG_PLAT_S5P
1113 static struct resource s5p_pmu_resource[] = {
1114 DEFINE_RES_IRQ(IRQ_PMU)
1117 static struct platform_device s5p_device_pmu = {
1119 .id = ARM_PMU_DEVICE_CPU,
1120 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1121 .resource = s5p_pmu_resource,
1124 static int __init s5p_pmu_init(void)
1126 platform_device_register(&s5p_device_pmu);
1129 arch_initcall(s5p_pmu_init);
1130 #endif /* CONFIG_PLAT_S5P */
1134 #ifdef CONFIG_SAMSUNG_DEV_PWM
1136 #define TIMER_RESOURCE_SIZE (1)
1138 #define TIMER_RESOURCE(_tmr, _irq) \
1139 (struct resource [TIMER_RESOURCE_SIZE]) { \
1143 .flags = IORESOURCE_IRQ \
1147 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1148 .name = "s3c24xx-pwm", \
1150 .num_resources = TIMER_RESOURCE_SIZE, \
1151 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1154 * since we already have an static mapping for the timer,
1155 * we do not bother setting any IO resource for the base.
1158 struct platform_device s3c_device_timer[] = {
1159 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1160 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1161 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1162 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1163 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1165 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1169 #ifdef CONFIG_PLAT_S3C24XX
1170 static struct resource s3c_rtc_resource[] = {
1171 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1172 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1173 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1176 struct platform_device s3c_device_rtc = {
1177 .name = "s3c2410-rtc",
1179 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1180 .resource = s3c_rtc_resource,
1182 #endif /* CONFIG_PLAT_S3C24XX */
1184 #ifdef CONFIG_S3C_DEV_RTC
1185 static struct resource s3c_rtc_resource[] = {
1186 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1187 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1188 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1191 struct platform_device s3c_device_rtc = {
1192 .name = "s3c64xx-rtc",
1194 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1195 .resource = s3c_rtc_resource,
1197 #endif /* CONFIG_S3C_DEV_RTC */
1201 #ifdef CONFIG_PLAT_S3C24XX
1202 static struct resource s3c_sdi_resource[] = {
1203 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1204 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1207 struct platform_device s3c_device_sdi = {
1208 .name = "s3c2410-sdi",
1210 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1211 .resource = s3c_sdi_resource,
1214 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1216 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1219 #endif /* CONFIG_PLAT_S3C24XX */
1223 #ifdef CONFIG_PLAT_S3C24XX
1224 static struct resource s3c_spi0_resource[] = {
1225 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1226 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1229 struct platform_device s3c_device_spi0 = {
1230 .name = "s3c2410-spi",
1232 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1233 .resource = s3c_spi0_resource,
1235 .dma_mask = &samsung_device_dma_mask,
1236 .coherent_dma_mask = DMA_BIT_MASK(32),
1240 static struct resource s3c_spi1_resource[] = {
1241 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1242 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1245 struct platform_device s3c_device_spi1 = {
1246 .name = "s3c2410-spi",
1248 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1249 .resource = s3c_spi1_resource,
1251 .dma_mask = &samsung_device_dma_mask,
1252 .coherent_dma_mask = DMA_BIT_MASK(32),
1255 #endif /* CONFIG_PLAT_S3C24XX */
1259 #ifdef CONFIG_PLAT_S3C24XX
1260 static struct resource s3c_ts_resource[] = {
1261 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1262 [1] = DEFINE_RES_IRQ(IRQ_TC),
1265 struct platform_device s3c_device_ts = {
1266 .name = "s3c2410-ts",
1268 .dev.parent = &s3c_device_adc.dev,
1269 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1270 .resource = s3c_ts_resource,
1273 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1275 s3c_set_platdata(hard_s3c2410ts_info,
1276 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1278 #endif /* CONFIG_PLAT_S3C24XX */
1280 #ifdef CONFIG_SAMSUNG_DEV_TS
1281 static struct resource s3c_ts_resource[] = {
1282 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1283 [1] = DEFINE_RES_IRQ(IRQ_TC),
1286 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1289 .oversampling_shift = 2,
1292 struct platform_device s3c_device_ts = {
1293 .name = "s3c64xx-ts",
1295 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1296 .resource = s3c_ts_resource,
1299 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1302 pd = &default_ts_data;
1304 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1307 #endif /* CONFIG_SAMSUNG_DEV_TS */
1311 #ifdef CONFIG_S5P_DEV_TV
1313 static struct resource s5p_hdmi_resources[] = {
1314 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1315 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1318 struct platform_device s5p_device_hdmi = {
1321 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1322 .resource = s5p_hdmi_resources,
1325 static struct resource s5p_sdo_resources[] = {
1326 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1327 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1330 struct platform_device s5p_device_sdo = {
1333 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1334 .resource = s5p_sdo_resources,
1337 static struct resource s5p_mixer_resources[] = {
1338 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1339 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1340 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1343 struct platform_device s5p_device_mixer = {
1344 .name = "s5p-mixer",
1346 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1347 .resource = s5p_mixer_resources,
1349 .dma_mask = &samsung_device_dma_mask,
1350 .coherent_dma_mask = DMA_BIT_MASK(32),
1353 #endif /* CONFIG_S5P_DEV_TV */
1357 #ifdef CONFIG_S3C_DEV_USB_HOST
1358 static struct resource s3c_usb_resource[] = {
1359 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1360 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1363 struct platform_device s3c_device_ohci = {
1364 .name = "s3c2410-ohci",
1366 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1367 .resource = s3c_usb_resource,
1369 .dma_mask = &samsung_device_dma_mask,
1370 .coherent_dma_mask = DMA_BIT_MASK(32),
1375 * s3c_ohci_set_platdata - initialise OHCI device platform data
1376 * @info: The platform data.
1378 * This call copies the @info passed in and sets the device .platform_data
1379 * field to that copy. The @info is copied so that the original can be marked
1383 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1385 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1388 #endif /* CONFIG_S3C_DEV_USB_HOST */
1390 /* USB Device (Gadget) */
1392 #ifdef CONFIG_PLAT_S3C24XX
1393 static struct resource s3c_usbgadget_resource[] = {
1394 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1395 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1398 struct platform_device s3c_device_usbgadget = {
1399 .name = "s3c2410-usbgadget",
1401 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1402 .resource = s3c_usbgadget_resource,
1405 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1407 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1409 #endif /* CONFIG_PLAT_S3C24XX */
1411 /* USB EHCI Host Controller */
1413 #ifdef CONFIG_S5P_DEV_USB_EHCI
1414 static struct resource s5p_ehci_resource[] = {
1415 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1416 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1419 struct platform_device s5p_device_ehci = {
1422 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1423 .resource = s5p_ehci_resource,
1425 .dma_mask = &samsung_device_dma_mask,
1426 .coherent_dma_mask = DMA_BIT_MASK(32),
1430 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1432 struct s5p_ehci_platdata *npd;
1434 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1438 npd->phy_init = s5p_usb_phy_init;
1440 npd->phy_exit = s5p_usb_phy_exit;
1442 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1446 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1447 static struct resource s3c_usb_hsotg_resources[] = {
1448 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1449 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1452 struct platform_device s3c_device_usb_hsotg = {
1453 .name = "s3c-hsotg",
1455 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1456 .resource = s3c_usb_hsotg_resources,
1458 .dma_mask = &samsung_device_dma_mask,
1459 .coherent_dma_mask = DMA_BIT_MASK(32),
1463 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1465 struct s3c_hsotg_plat *npd;
1467 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1468 &s3c_device_usb_hsotg);
1471 npd->phy_init = s5p_usb_phy_init;
1473 npd->phy_exit = s5p_usb_phy_exit;
1475 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1477 /* USB High Spped 2.0 Device (Gadget) */
1479 #ifdef CONFIG_PLAT_S3C24XX
1480 static struct resource s3c_hsudc_resource[] = {
1481 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1482 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1485 struct platform_device s3c_device_usb_hsudc = {
1486 .name = "s3c-hsudc",
1488 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1489 .resource = s3c_hsudc_resource,
1491 .dma_mask = &samsung_device_dma_mask,
1492 .coherent_dma_mask = DMA_BIT_MASK(32),
1496 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1498 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1500 #endif /* CONFIG_PLAT_S3C24XX */
1504 #ifdef CONFIG_S3C_DEV_WDT
1505 static struct resource s3c_wdt_resource[] = {
1506 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1507 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1510 struct platform_device s3c_device_wdt = {
1511 .name = "s3c2410-wdt",
1513 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1514 .resource = s3c_wdt_resource,
1516 #endif /* CONFIG_S3C_DEV_WDT */
1518 #ifdef CONFIG_S3C64XX_DEV_SPI0
1519 static struct resource s3c64xx_spi0_resource[] = {
1520 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1521 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1522 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1526 struct platform_device s3c64xx_device_spi0 = {
1527 .name = "s3c64xx-spi",
1529 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1530 .resource = s3c64xx_spi0_resource,
1532 .dma_mask = &samsung_device_dma_mask,
1533 .coherent_dma_mask = DMA_BIT_MASK(32),
1537 void __init s3c64xx_spi0_set_platdata(struct s3c64xx_spi_info *pd,
1538 int src_clk_nr, int num_cs)
1541 pr_err("%s:Need to pass platform data\n", __func__);
1545 /* Reject invalid configuration */
1546 if (!num_cs || src_clk_nr < 0) {
1547 pr_err("%s: Invalid SPI configuration\n", __func__);
1551 pd->num_cs = num_cs;
1552 pd->src_clk_nr = src_clk_nr;
1554 pd->cfg_gpio = s3c64xx_spi0_cfg_gpio;
1556 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi0);
1558 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1560 #ifdef CONFIG_S3C64XX_DEV_SPI1
1561 static struct resource s3c64xx_spi1_resource[] = {
1562 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1563 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1564 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1565 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1568 struct platform_device s3c64xx_device_spi1 = {
1569 .name = "s3c64xx-spi",
1571 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1572 .resource = s3c64xx_spi1_resource,
1574 .dma_mask = &samsung_device_dma_mask,
1575 .coherent_dma_mask = DMA_BIT_MASK(32),
1579 void __init s3c64xx_spi1_set_platdata(struct s3c64xx_spi_info *pd,
1580 int src_clk_nr, int num_cs)
1583 pr_err("%s:Need to pass platform data\n", __func__);
1587 /* Reject invalid configuration */
1588 if (!num_cs || src_clk_nr < 0) {
1589 pr_err("%s: Invalid SPI configuration\n", __func__);
1593 pd->num_cs = num_cs;
1594 pd->src_clk_nr = src_clk_nr;
1596 pd->cfg_gpio = s3c64xx_spi1_cfg_gpio;
1598 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi1);
1600 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1602 #ifdef CONFIG_S3C64XX_DEV_SPI2
1603 static struct resource s3c64xx_spi2_resource[] = {
1604 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1605 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1606 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1607 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1610 struct platform_device s3c64xx_device_spi2 = {
1611 .name = "s3c64xx-spi",
1613 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1614 .resource = s3c64xx_spi2_resource,
1616 .dma_mask = &samsung_device_dma_mask,
1617 .coherent_dma_mask = DMA_BIT_MASK(32),
1621 void __init s3c64xx_spi2_set_platdata(struct s3c64xx_spi_info *pd,
1622 int src_clk_nr, int num_cs)
1625 pr_err("%s:Need to pass platform data\n", __func__);
1629 /* Reject invalid configuration */
1630 if (!num_cs || src_clk_nr < 0) {
1631 pr_err("%s: Invalid SPI configuration\n", __func__);
1635 pd->num_cs = num_cs;
1636 pd->src_clk_nr = src_clk_nr;
1638 pd->cfg_gpio = s3c64xx_spi2_cfg_gpio;
1640 s3c_set_platdata(pd, sizeof(*pd), &s3c64xx_device_spi2);
1642 #endif /* CONFIG_S3C64XX_DEV_SPI2 */