1 /************************************************************
3 * Linux EATA SCSI driver *
5 * based on the CAM document CAM/89-004 rev. 2.0c, *
6 * DPT's driver kit, some internal documents and source, *
7 * and several other Linux scsi drivers and kernel docs. *
9 * The driver currently: *
10 * -supports all ISA based EATA-DMA boards *
11 * like PM2011, PM2021, PM2041, PM3021 *
12 * -supports all EISA based EATA-DMA boards *
13 * like PM2012B, PM2022, PM2122, PM2322, PM2042, *
14 * PM3122, PM3222, PM3332 *
15 * -supports all PCI based EATA-DMA boards *
16 * like PM2024, PM2124, PM2044, PM2144, PM3224, *
18 * -supports the Wide, Ultra Wide and Differential *
19 * versions of the boards *
20 * -supports multiple HBAs with & without IRQ sharing *
21 * -supports all SCSI channels on multi channel boards *
22 * -supports ix86 and MIPS, untested on ALPHA *
23 * -needs identical IDs on all channels of a HBA *
24 * -can be loaded as module *
25 * -displays statistical and hardware information *
26 * in /proc/scsi/eata_dma *
27 * -provides rudimentary latency measurement *
28 * possibilities via /proc/scsi/eata_dma/<hostnum> *
30 * (c)1993-96 Michael Neuffer *
31 * mike@i-Connect.Net *
32 * neuffer@mail.uni-mainz.de *
34 * This program is free software; you can redistribute it *
35 * and/or modify it under the terms of the GNU General *
36 * Public License as published by the Free Software *
37 * Foundation; either version 2 of the License, or *
38 * (at your option) any later version. *
40 * This program is distributed in the hope that it will be *
41 * useful, but WITHOUT ANY WARRANTY; without even the *
42 * implied warranty of MERCHANTABILITY or FITNESS FOR A *
43 * PARTICULAR PURPOSE. See the GNU General Public License *
46 * You should have received a copy of the GNU General *
47 * Public License along with this kernel; if not, write to *
48 * the Free Software Foundation, Inc., 675 Mass Ave, *
49 * Cambridge, MA 02139, USA. *
51 * I have to thank DPT for their excellent support. I took *
52 * me almost a year and a stopover at their HQ, on my first *
53 * trip to the USA, to get it, but since then they've been *
54 * very helpful and tried to give me all the infos and *
57 * Thanks also to Simon Shapiro, Greg Hosler and Mike *
58 * Jagdis who did a lot of testing and found quite a number *
59 * of bugs during the development. *
60 ************************************************************
61 * last change: 96/10/21 OS: Linux 2.0.23 *
62 ************************************************************/
64 /* Look in eata_dma.h for configuration and revision information */
66 #include <linux/module.h>
67 #include <linux/kernel.h>
68 #include <linux/sched.h>
69 #include <linux/string.h>
70 #include <linux/ioport.h>
71 #include <linux/malloc.h>
73 #include <linux/pci.h>
74 #include <linux/proc_fs.h>
75 #include <linux/delay.h>
76 #include <asm/byteorder.h>
77 #include <asm/types.h>
80 #include <asm/pgtable.h>
82 #include <asm/cachectl.h>
83 #include <linux/spinlock.h>
85 #include <linux/blk.h>
90 #include "eata_dma_proc.h"
92 #include <linux/stat.h>
93 #include <linux/config.h> /* for CONFIG_PCI */
95 static u32 ISAbases[] =
96 {0x1F0, 0x170, 0x330, 0x230};
97 static unchar EISAbases[] =
98 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1};
99 static uint registered_HBAs = 0;
100 static struct Scsi_Host *last_HBA = NULL;
101 static struct Scsi_Host *first_HBA = NULL;
102 static unchar reg_IRQ[] =
103 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
104 static unchar reg_IRQL[] =
105 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
106 static struct eata_sp *status = 0; /* Statuspacket array */
107 static void *dma_scratch = 0;
109 static struct eata_register *fake_int_base;
110 static int fake_int_result;
111 static int fake_int_happened;
113 static ulong int_counter = 0;
114 static ulong queue_counter = 0;
116 void eata_fake_int_handler(s32 irq, void *dev_id, struct pt_regs * regs)
118 fake_int_result = inb((ulong)fake_int_base + HA_RSTATUS);
119 fake_int_happened = TRUE;
120 DBG(DBG_INTR3, printk("eata_fake_int_handler called irq%d base %p"
121 " res %#x\n", irq, fake_int_base, fake_int_result));
125 #include "eata_dma_proc.c"
128 int eata_release(struct Scsi_Host *sh)
131 if (sh->irq && reg_IRQ[sh->irq] == 1) free_irq(sh->irq, NULL);
132 else reg_IRQ[sh->irq]--;
134 kfree((void *)status);
135 kfree((void *)dma_scratch - 4);
136 for (i = 0; i < sh->can_queue; i++){ /* Free all SG arrays */
137 if(SD(sh)->ccb[i].sg_list != NULL)
138 kfree((void *) SD(sh)->ccb[i].sg_list);
141 if (SD(sh)->channel == 0) {
142 if (sh->dma_channel != BUSMASTER) free_dma(sh->dma_channel);
143 if (sh->io_port && sh->n_io_port)
144 release_region(sh->io_port, sh->n_io_port);
151 inline void eata_latency_in(struct eata_ccb *cp, hostdata *hd)
154 time = jiffies - cp->timestamp;
155 if(hd->all_lat[1] > time)
156 hd->all_lat[1] = time;
157 if(hd->all_lat[2] < time)
158 hd->all_lat[2] = time;
159 hd->all_lat[3] += time;
161 if((cp->rw_latency) == WRITE) { /* was WRITE */
162 if(hd->writes_lat[cp->sizeindex][1] > time)
163 hd->writes_lat[cp->sizeindex][1] = time;
164 if(hd->writes_lat[cp->sizeindex][2] < time)
165 hd->writes_lat[cp->sizeindex][2] = time;
166 hd->writes_lat[cp->sizeindex][3] += time;
167 hd->writes_lat[cp->sizeindex][0]++;
168 } else if((cp->rw_latency) == READ) {
169 if(hd->reads_lat[cp->sizeindex][1] > time)
170 hd->reads_lat[cp->sizeindex][1] = time;
171 if(hd->reads_lat[cp->sizeindex][2] < time)
172 hd->reads_lat[cp->sizeindex][2] = time;
173 hd->reads_lat[cp->sizeindex][3] += time;
174 hd->reads_lat[cp->sizeindex][0]++;
178 inline void eata_latency_out(struct eata_ccb *cp, Scsi_Cmnd *cmd)
183 x = 0; /* just to keep GCC quiet */
184 cp->timestamp = jiffies; /* For latency measurements */
185 switch(cmd->cmnd[0]) {
188 cp->rw_latency = WRITE;
192 cp->rw_latency = READ;
195 sho = (short *) &cmd->cmnd[7];
197 cp->rw_latency = WRITE;
200 sho = (short *) &cmd->cmnd[7];
202 cp->rw_latency = READ;
205 lon = (long *) &cmd->cmnd[6];
207 cp->rw_latency = WRITE;
210 lon = (long *) &cmd->cmnd[6];
212 cp->rw_latency = READ;
215 cp->rw_latency = OTHER;
218 if (cmd->cmnd[0] == WRITE_6 || cmd->cmnd[0] == WRITE_10 ||
219 cmd->cmnd[0] == WRITE_12 || cmd->cmnd[0] == READ_6 ||
220 cmd->cmnd[0] == READ_10 || cmd->cmnd[0] == READ_12) {
221 for(z = 0; (x > (1 << z)) && (z <= 11); z++)
227 void eata_int_handler(int, void *, struct pt_regs *);
229 void do_eata_int_handler(int irq, void *dev_id, struct pt_regs * regs)
233 spin_lock_irqsave(&io_request_lock, flags);
234 eata_int_handler(irq, dev_id, regs);
235 spin_unlock_irqrestore(&io_request_lock, flags);
238 void eata_int_handler(int irq, void *dev_id, struct pt_regs * regs)
241 uint hba_stat, scsi_stat, eata_stat;
243 struct eata_ccb *ccb;
247 struct Scsi_Host *sh;
249 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) {
253 while(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) {
259 sys_cacheflush(sp, sizeof(struct eata_sp), 2);
264 eata_stat = inb((uint)sh->base + HA_RSTATUS);
265 printk("eata_dma: int_handler, Spurious IRQ %d "
266 "received. CCB pointer not set.\n", irq);
271 base = (uint) cmd->host->base;
272 hba_stat = sp->hba_stat;
274 scsi_stat = (sp->scsi_stat >> 1) & 0x1f;
276 if (sp->EOC == FALSE) {
277 eata_stat = inb(base + HA_RSTATUS);
278 printk(KERN_WARNING "eata_dma: int_handler, board: %x cmd %lx "
279 "returned unfinished.\n"
280 "EATA: %x HBA: %x SCSI: %x spadr %lx spadrirq %lx, "
281 "irq%d\n", base, (long)ccb, eata_stat, hba_stat,
282 scsi_stat,(long)&status, (long)&status[irq], irq);
283 cmd->result = DID_ERROR << 16;
289 sp->EOC = FALSE; /* Clean out this flag */
291 if (ccb->status == LOCKED || ccb->status == RESET) {
292 printk("eata_dma: int_handler, reseted command pid %ld returned"
294 DBG(DBG_INTR && DBG_DELAY, DELAY(1));
297 eata_stat = inb(base + HA_RSTATUS);
298 DBG(DBG_INTR, printk("IRQ %d received, base %#.4x, pid %ld, "
299 "target: %x, lun: %x, ea_s: %#.2x, hba_s: "
300 "%#.2x \n", irq, base, cmd->pid, cmd->target,
301 cmd->lun, eata_stat, hba_stat));
304 case HA_NO_ERROR: /* NO Error */
305 if(HD(cmd)->do_latency == TRUE && ccb->timestamp)
306 eata_latency_in(ccb, HD(cmd));
307 result = DID_OK << 16;
309 case HA_ERR_SEL_TO: /* Selection Timeout */
310 case HA_ERR_CMD_TO: /* Command Timeout */
311 result = DID_TIME_OUT << 16;
313 case HA_BUS_RESET: /* SCSI Bus Reset Received */
314 result = DID_RESET << 16;
315 DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: BUS RESET "
316 "received on cmd %ld\n",
317 HD(cmd)->HBA_number, cmd->pid));
319 case HA_INIT_POWERUP: /* Initial Controller Power-up */
320 if (cmd->device->type != TYPE_TAPE)
321 result = DID_BUS_BUSY << 16;
323 result = DID_ERROR << 16;
325 for (i = 0; i < MAXTARGET; i++)
326 DBG(DBG_STATUS, printk(KERN_DEBUG "scsi%d: cmd pid %ld "
327 "returned with INIT_POWERUP\n",
328 HD(cmd)->HBA_number, cmd->pid));
332 result = DID_ABORT << 16;
333 DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: aborted cmd "
334 "returned\n", HD(cmd)->HBA_number));
338 HD(cmd)->resetlevel[cmd->channel] = 0;
339 result = DID_RESET << 16;
340 DBG(DBG_STATUS, printk(KERN_WARNING "scsi%d: reseted cmd "
342 HD(cmd)->HBA_number, cmd->pid));
343 case HA_SCSI_HUNG: /* SCSI Hung */
344 printk(KERN_ERR "scsi%d: SCSI hung\n", HD(cmd)->HBA_number);
345 result = DID_ERROR << 16;
347 case HA_RSENSE_FAIL: /* Auto Request-Sense Failed */
348 DBG(DBG_STATUS, printk(KERN_ERR "scsi%d: Auto Request Sense "
349 "Failed\n", HD(cmd)->HBA_number));
350 result = DID_ERROR << 16;
352 case HA_UNX_BUSPHASE: /* Unexpected Bus Phase */
353 case HA_UNX_BUS_FREE: /* Unexpected Bus Free */
354 case HA_BUS_PARITY: /* Bus Parity Error */
355 case HA_UNX_MSGRJCT: /* Unexpected Message Reject */
356 case HA_RESET_STUCK: /* SCSI Bus Reset Stuck */
357 case HA_PARITY_ERR: /* Controller Ram Parity */
359 result = DID_ERROR << 16;
362 cmd->result = result | (scsi_stat << 1);
365 if (scsi_stat || result || hba_stat || eata_stat != 0x50
366 || cmd->scsi_done == NULL || cmd->device->id == 7)
367 printk("HBA: %d, channel %d, id: %d, lun %d, pid %ld:\n"
368 "eata_stat %#x, hba_stat %#.2x, scsi_stat %#.2x, "
369 "sense_key: %#x, result: %#.8x\n", x,
370 cmd->device->channel, cmd->device->id, cmd->device->lun,
371 cmd->pid, eata_stat, hba_stat, scsi_stat,
372 cmd->sense_buffer[2] & 0xf, cmd->result);
373 DBG(DBG_INTR&&DBG_DELAY,DELAY(1));
376 ccb->status = FREE; /* now we can release the slot */
384 inline int eata_send_command(u32 addr, u32 base, u8 command)
388 while (inb(base + HA_RAUXSTAT) & HA_ABUSY)
392 if(addr != (u32) NULL)
393 addr = virt_to_bus((void *)addr);
396 * This is overkill.....but the MIPSen seem to need this
397 * and it will be optimized away for i86 and ALPHA machines.
401 /* And now the address in nice little byte chunks */
402 #ifdef __LITTLE_ENDIAN
403 outb(addr, base + HA_WDMAADDR);
404 outb(addr >> 8, base + HA_WDMAADDR + 1);
405 outb(addr >> 16, base + HA_WDMAADDR + 2);
406 outb(addr >> 24, base + HA_WDMAADDR + 3);
408 outb(addr >> 24, base + HA_WDMAADDR);
409 outb(addr >> 16, base + HA_WDMAADDR + 1);
410 outb(addr >> 8, base + HA_WDMAADDR + 2);
411 outb(addr, base + HA_WDMAADDR + 3);
413 outb(command, base + HA_WCOMMAND);
417 inline int eata_send_immediate(u32 base, u32 addr, u8 ifc, u8 code, u8 code2)
419 if(addr != (u32) NULL)
420 addr = virt_to_bus((void *)addr);
423 * This is overkill.....but the MIPSen seem to need this
424 * and it will be optimized away for i86 and ALPHA machines.
428 outb(0x0, base + HA_WDMAADDR - 1);
430 #ifdef __LITTLE_ENDIAN
431 outb(addr, base + HA_WDMAADDR);
432 outb(addr >> 8, base + HA_WDMAADDR + 1);
433 outb(addr >> 16, base + HA_WDMAADDR + 2);
434 outb(addr >> 24, base + HA_WDMAADDR + 3);
436 outb(addr >> 24, base + HA_WDMAADDR);
437 outb(addr >> 16, base + HA_WDMAADDR + 1);
438 outb(addr >> 8, base + HA_WDMAADDR + 2);
439 outb(addr, base + HA_WDMAADDR + 3);
442 outb(0x0, base + HA_WDMAADDR);
443 outb(0x0, base + HA_WDMAADDR + 1);
444 outb(code2, base + HA_WCODE2);
445 outb(code, base + HA_WCODE);
448 outb(ifc, base + HA_WIFC);
449 outb(EATA_CMD_IMMEDIATE, base + HA_WCOMMAND);
453 int eata_queue(Scsi_Cmnd * cmd, void (* done) (Scsi_Cmnd *))
455 unsigned int i, x, y;
458 struct Scsi_Host *sh;
459 struct eata_ccb *ccb;
460 struct scatterlist *sl;
467 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) {
468 if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) {
469 printk("eata_dma: scsi%d interrupt pending in eata_queue.\n"
470 " Calling interrupt handler.\n", sh->host_no);
471 eata_int_handler(sh->irq, 0, 0);
481 if (cmd->cmnd[0] == REQUEST_SENSE && cmd->sense_buffer[0] != 0) {
482 DBG(DBG_REQSENSE, printk(KERN_DEBUG "Tried to REQUEST SENSE\n"));
483 cmd->result = DID_OK << 16;
489 /* check for free slot */
490 for (y = hd->last_ccb + 1, x = 0; x < sh->can_queue; x++, y++) {
491 if (y >= sh->can_queue)
493 if (hd->ccb[y].status == FREE)
499 if (x >= sh->can_queue) {
500 cmd->result = DID_BUS_BUSY << 16;
501 DBG(DBG_QUEUE && DBG_ABNORM,
502 printk(KERN_CRIT "eata_queue pid %ld, HBA QUEUE FULL..., "
503 "returning DID_BUS_BUSY\n", cmd->pid));
505 restore_flags(flags);
510 memset(ccb, 0, sizeof(struct eata_ccb) - sizeof(struct eata_sg_list *));
512 ccb->status = USED; /* claim free slot */
514 restore_flags(flags);
516 DBG(DBG_QUEUE, printk("eata_queue pid %ld, target: %x, lun: %x, y %d\n",
517 cmd->pid, cmd->target, cmd->lun, y));
518 DBG(DBG_QUEUE && DBG_DELAY, DELAY(1));
520 if(hd->do_latency == TRUE)
521 eata_latency_out(ccb, cmd);
523 cmd->scsi_done = (void *)done;
525 switch (cmd->cmnd[0]) {
526 case CHANGE_DEFINITION: case COMPARE: case COPY:
527 case COPY_VERIFY: case LOG_SELECT: case MODE_SELECT:
528 case MODE_SELECT_10: case SEND_DIAGNOSTIC: case WRITE_BUFFER:
529 case FORMAT_UNIT: case REASSIGN_BLOCKS: case RESERVE:
530 case SEARCH_EQUAL: case SEARCH_HIGH: case SEARCH_LOW:
531 case WRITE_6: case WRITE_10: case WRITE_VERIFY:
532 case UPDATE_BLOCK: case WRITE_LONG: case WRITE_SAME:
533 case SEARCH_HIGH_12: case SEARCH_EQUAL_12: case SEARCH_LOW_12:
534 case WRITE_12: case WRITE_VERIFY_12: case SET_WINDOW:
535 case MEDIUM_SCAN: case SEND_VOLUME_TAG:
536 case 0xea: /* alternate number for WRITE LONG */
537 ccb->DataOut = TRUE; /* Output mode */
539 case TEST_UNIT_READY:
541 ccb->DataIn = TRUE; /* Input mode */
544 /* FIXME: This will will have to be changed once the midlevel driver
545 * allows different HBA IDs on every channel.
547 if (cmd->target == sh->this_id)
548 ccb->Interpret = TRUE; /* Interpret command */
551 ccb->scatter = TRUE; /* SG mode */
552 if (ccb->sg_list == NULL) {
553 ccb->sg_list = kmalloc(sh->sg_tablesize * sizeof(struct eata_sg_list),
554 GFP_ATOMIC | GFP_DMA);
556 if (ccb->sg_list == NULL)
559 * Claim the bus was busy. Actually we are the problem but this
560 * will do a deferred retry for us ;)
562 printk(KERN_ERR "eata_dma: Run out of DMA memory for SG lists !\n");
563 cmd->result = DID_BUS_BUSY << 16;
568 ccb->cp_dataDMA = htonl(virt_to_bus(ccb->sg_list));
570 ccb->cp_datalen = htonl(cmd->use_sg * sizeof(struct eata_sg_list));
571 sl=(struct scatterlist *)cmd->request_buffer;
572 for(i = 0; i < cmd->use_sg; i++, sl++){
573 ccb->sg_list[i].data = htonl(virt_to_bus(sl->address));
574 ccb->sg_list[i].len = htonl((u32) sl->length);
577 ccb->scatter = FALSE;
578 ccb->cp_datalen = htonl(cmd->request_bufflen);
579 ccb->cp_dataDMA = htonl(virt_to_bus(cmd->request_buffer));
582 ccb->Auto_Req_Sen = TRUE;
583 ccb->cp_reqDMA = htonl(virt_to_bus(cmd->sense_buffer));
584 ccb->reqlen = sizeof(cmd->sense_buffer);
586 ccb->cp_id = cmd->target;
587 ccb->cp_channel = cmd->channel;
588 ccb->cp_lun = cmd->lun;
589 ccb->cp_dispri = TRUE;
590 ccb->cp_identify = TRUE;
591 memcpy(ccb->cp_cdb, cmd->cmnd, cmd->cmd_len);
593 ccb->cp_statDMA = htonl(virt_to_bus(&(hd->sp)));
595 ccb->cp_viraddr = ccb; /* This will be passed thru, so we don't need to
598 cmd->host_scribble = (char *)&hd->ccb[y];
600 if(eata_send_command((u32) ccb, (u32) sh->base, EATA_CMD_DMA_SEND_CP) == FALSE) {
601 cmd->result = DID_BUS_BUSY << 16;
602 DBG(DBG_QUEUE && DBG_ABNORM,
603 printk("eata_queue target %d, pid %ld, HBA busy, "
604 "returning DID_BUS_BUSY\n",cmd->target, cmd->pid));
609 DBG(DBG_QUEUE, printk("Queued base %#.4x pid: %ld target: %x lun: %x "
610 "slot %d irq %d\n", (s32)sh->base, cmd->pid,
611 cmd->target, cmd->lun, y, sh->irq));
612 DBG(DBG_QUEUE && DBG_DELAY, DELAY(1));
618 int eata_abort(Scsi_Cmnd * cmd)
623 struct Scsi_Host *sh;
628 DBG(DBG_ABNORM, printk("eata_abort called pid: %ld target: %x lun: %x"
629 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
631 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
633 /* Some interrupt controllers seem to loose interrupts */
634 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) {
635 if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) {
636 printk("eata_dma: scsi%d interrupt pending in eata_abort.\n"
637 " Calling interrupt handler.\n", sh->host_no);
638 eata_int_handler(sh->irq, 0, 0);
642 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY) {
644 printk("eata_dma: abort, timeout error.\n");
645 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
646 restore_flags(flags);
647 return (SCSI_ABORT_ERROR);
650 if (CD(cmd)->status == RESET) {
651 printk("eata_dma: abort, command reset error.\n");
652 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
653 restore_flags(flags);
654 return (SCSI_ABORT_ERROR);
656 if (CD(cmd)->status == LOCKED) {
657 DBG(DBG_ABNORM, printk("eata_dma: abort, queue slot locked.\n"));
658 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
659 restore_flags(flags);
660 return (SCSI_ABORT_NOT_RUNNING);
662 if (CD(cmd)->status == USED) {
663 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_BUSY\n"));
664 restore_flags(flags);
665 return (SCSI_ABORT_BUSY); /* SNOOZE */
667 if (CD(cmd)->status == FREE) {
668 DBG(DBG_ABNORM, printk("Returning: SCSI_ABORT_NOT_RUNNING\n"));
669 restore_flags(flags);
670 return (SCSI_ABORT_NOT_RUNNING);
672 restore_flags(flags);
673 panic("eata_dma: abort: invalid slot status\n");
676 int eata_reset(Scsi_Cmnd * cmd, unsigned int resetflags)
679 /* 10 million PCI reads take at least one third of a second */
680 ulong loop = 10 * 1000 * 1000;
682 unchar success = FALSE;
684 struct Scsi_Host *sh;
689 DBG(DBG_ABNORM, printk("eata_reset called pid:%ld target: %x lun: %x"
690 " reason %x\n", cmd->pid, cmd->target, cmd->lun,
693 for (x = 1, sh = first_HBA; x <= registered_HBAs; x++, sh = SD(sh)->next) {
694 if(inb((uint)sh->base + HA_RAUXSTAT) & HA_AIRQ) {
695 printk("eata_dma: scsi%d interrupt pending in eata_reset.\n"
696 " Calling interrupt handler.\n", sh->host_no);
697 eata_int_handler(sh->irq, 0, 0);
701 if (HD(cmd)->state == RESET) {
702 printk("eata_reset: exit, already in reset.\n");
703 restore_flags(flags);
704 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
705 return (SCSI_RESET_ERROR);
708 while (inb((u32)(cmd->host->base) + HA_RAUXSTAT) & HA_ABUSY)
710 printk("eata_reset: exit, timeout error.\n");
711 restore_flags(flags);
712 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
713 return (SCSI_RESET_ERROR);
716 for (x = 0; x < cmd->host->can_queue; x++) {
717 if (HD(cmd)->ccb[x].status == FREE)
720 if (HD(cmd)->ccb[x].status == LOCKED) {
721 HD(cmd)->ccb[x].status = FREE;
722 printk("eata_reset: locked slot %d forced free.\n", x);
723 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
728 sp = HD(cmd)->ccb[x].cmd;
729 HD(cmd)->ccb[x].status = RESET;
732 panic("eata_reset: slot %d, sp==NULL.\n", x);
734 printk("eata_reset: slot %d in reset, pid %ld.\n", x, sp->pid);
736 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
742 /* hard reset the HBA */
743 inb((u32) (cmd->host->base) + HA_RSTATUS); /* This might cause trouble */
744 eata_send_command(0, (u32) cmd->host->base, EATA_CMD_RESET);
746 HD(cmd)->state = RESET;
748 DBG(DBG_ABNORM, printk("eata_reset: board reset done, enabling "
751 DELAY(2); /* In theorie we should get interrupts and set free all
754 DBG(DBG_ABNORM, printk("eata_reset: interrupts disabled again.\n"));
755 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
757 for (x = 0; x < cmd->host->can_queue; x++) {
759 /* Skip slots already set free by interrupt and those that
760 * are still LOCKED from the last reset */
761 if (HD(cmd)->ccb[x].status != RESET)
764 sp = HD(cmd)->ccb[x].cmd;
765 sp->result = DID_RESET << 16;
767 /* This mailbox is still waiting for its interrupt */
768 HD(cmd)->ccb[x].status = LOCKED;
770 printk("eata_reset: slot %d locked, DID_RESET, pid %ld done.\n",
772 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
777 HD(cmd)->state = FALSE;
778 restore_flags(flags);
781 DBG(DBG_ABNORM, printk("eata_reset: exit, pending.\n"));
782 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
783 return (SCSI_RESET_PENDING);
785 DBG(DBG_ABNORM, printk("eata_reset: exit, wakeup.\n"));
786 DBG(DBG_ABNORM && DBG_DELAY, DELAY(1));
787 return (SCSI_RESET_PUNT);
791 /* Here we try to determine the optimum queue depth for
792 * each attached device.
794 * At the moment the algorithm is rather simple
796 static void eata_select_queue_depths(struct Scsi_Host *host,
797 Scsi_Device *devicelist)
804 for(device = devicelist; device != NULL; device = device->next) {
805 if(device->host == host)
806 device->queue_depth = 2;
809 /* First we do a sample run go find out what we have */
810 for(device = devicelist; device != NULL; device = device->next) {
811 if (device->host == host) {
813 switch(device->type) {
816 factor += TYPE_DISK_QUEUE;
819 factor += TYPE_TAPE_QUEUE;
823 factor += TYPE_ROM_QUEUE;
828 factor += TYPE_OTHER_QUEUE;
834 DBG(DBG_REGISTER, printk(KERN_DEBUG "scsi%d: needed queueslots %d\n",
835 host->host_no, factor));
837 if(factor == 0) /* We don't want to get a DIV BY ZERO error */
840 factor = (SD(host)->queuesize * 10) / factor;
842 DBG(DBG_REGISTER, printk(KERN_DEBUG "scsi%d: using factor %dE-1\n",
843 host->host_no, factor));
845 /* Now that have the factor we can set the individual queuesizes */
846 for(device = devicelist; device != NULL; device = device->next) {
847 if(device->host == host) {
848 if(SD(device->host)->bustype != IS_ISA){
849 switch(device->type) {
852 device->queue_depth = (TYPE_DISK_QUEUE * factor) / 10;
855 device->queue_depth = (TYPE_TAPE_QUEUE * factor) / 10;
859 device->queue_depth = (TYPE_ROM_QUEUE * factor) / 10;
864 device->queue_depth = (TYPE_OTHER_QUEUE * factor) / 10;
867 } else /* ISA forces us to limit the queue depth because of the
868 * bounce buffer memory overhead. I know this is cruel */
869 device->queue_depth = 2;
872 * It showed that we need to set an upper limit of commands
873 * we can allow to queue for a single device on the bus.
874 * If we get above that limit, the broken midlevel SCSI code
875 * will produce bogus timeouts and aborts en masse. :-(
877 if(device->queue_depth > UPPER_DEVICE_QUEUE_LIMIT)
878 device->queue_depth = UPPER_DEVICE_QUEUE_LIMIT;
879 if(device->queue_depth == 0)
880 device->queue_depth = 1;
882 printk(KERN_INFO "scsi%d: queue depth for target %d on channel %d "
883 "set to %d\n", host->host_no, device->id, device->channel,
884 device->queue_depth);
891 int check_blink_state(long base)
895 u32 state = 0x12345678;
898 blinkindicator = htonl(0x54504442);
899 while ((loops--) && (state != oldstate)) {
901 state = inl((uint) base + 1);
904 DBG(DBG_BLINK, printk("Did Blink check. Status: %d\n",
905 (state == oldstate) && (state == blinkindicator)));
907 if ((state == oldstate) && (state == blinkindicator))
914 char * get_board_data(u32 base, u32 irq, u32 id)
921 cp = (struct eata_ccb *) kmalloc(sizeof(struct eata_ccb),
922 GFP_ATOMIC | GFP_DMA);
927 sp = (struct eata_sp *) kmalloc(sizeof(struct eata_sp),
928 GFP_ATOMIC | GFP_DMA);
937 memset(cp, 0, sizeof(struct eata_ccb));
938 memset(sp, 0, sizeof(struct eata_sp));
939 memset(buff, 0, 256);
942 cp->Interpret = TRUE; /* Interpret command */
943 cp->cp_dispri = TRUE;
944 cp->cp_identify = TRUE;
946 cp->cp_datalen = htonl(56);
947 cp->cp_dataDMA = htonl(virt_to_bus(buff));
948 cp->cp_statDMA = htonl(virt_to_bus(sp));
954 cp->cp_cdb[0] = INQUIRY;
961 fake_int_base = (struct eata_register *) base;
962 fake_int_result = FALSE;
963 fake_int_happened = FALSE;
965 eata_send_command((u32) cp, (u32) base, EATA_CMD_DMA_SEND_CP);
967 i = jiffies + (3 * HZ);
968 while (fake_int_happened == FALSE && time_before_eq(jiffies, i))
971 DBG(DBG_INTR3, printk(KERN_DEBUG "fake_int_result: %#x hbastat %#x "
972 "scsistat %#x, buff %p sp %p\n",
973 fake_int_result, (u32) (sp->hba_stat /*& 0x7f*/),
974 (u32) sp->scsi_stat, buff, sp));
979 if ((fake_int_result & HA_SERROR) || time_after(jiffies, i)){
980 printk(KERN_WARNING "eata_dma: trying to reset HBA at %x to clear "
981 "possible blink state\n", base);
982 /* hard reset the HBA */
983 inb((u32) (base) + HA_RSTATUS);
984 eata_send_command(0, base, EATA_CMD_RESET);
992 int get_conf_PIO(u32 base, struct get_conf *buf)
994 ulong loop = R_LIMIT;
997 if(check_region(base, 9))
1000 memset(buf, 0, sizeof(struct get_conf));
1002 while (inb(base + HA_RSTATUS) & HA_SBUSY)
1006 fake_int_base = (struct eata_register *) base;
1007 fake_int_result = FALSE;
1008 fake_int_happened = FALSE;
1010 DBG(DBG_PIO && DBG_PROBE,
1011 printk("Issuing PIO READ CONFIG to HBA at %#x\n", base));
1012 eata_send_command(0, base, EATA_CMD_PIO_READ_CONFIG);
1015 for (p = (u16 *) buf;
1016 (long)p <= ((long)buf + (sizeof(struct get_conf) / 2)); p++) {
1017 while (!(inb(base + HA_RSTATUS) & HA_SDRQ))
1022 *p = inw(base + HA_RDATA);
1025 if (!(inb(base + HA_RSTATUS) & HA_SERROR)) { /* Error ? */
1026 if (htonl(EATA_SIGNATURE) == buf->signature) {
1027 DBG(DBG_PIO&&DBG_PROBE, printk("EATA Controller found at %x "
1028 "EATA Level: %x\n", (uint) base,
1029 (uint) (buf->version)));
1031 while (inb(base + HA_RSTATUS) & HA_SDRQ)
1032 inw(base + HA_RDATA);
1036 DBG(DBG_PROBE, printk("eata_dma: get_conf_PIO, error during transfer "
1037 "for HBA at %lx\n", (long)base));
1043 void print_config(struct get_conf *gc)
1045 printk("LEN: %d ver:%d OCS:%d TAR:%d TRNXFR:%d MORES:%d DMAS:%d\n",
1046 (u32) ntohl(gc->len), gc->version,
1047 gc->OCS_enabled, gc->TAR_support, gc->TRNXFR, gc->MORE_support,
1049 printk("DMAV:%d HAAV:%d SCSIID0:%d ID1:%d ID2:%d QUEUE:%d SG:%d SEC:%d\n",
1050 gc->DMA_valid, gc->HAA_valid, gc->scsi_id[3], gc->scsi_id[2],
1051 gc->scsi_id[1], ntohs(gc->queuesiz), ntohs(gc->SGsiz), gc->SECOND);
1052 printk("IRQ:%d IRQT:%d DMAC:%d FORCADR:%d SG_64K:%d SG_UAE:%d MID:%d "
1054 gc->IRQ, gc->IRQ_TR, (8 - gc->DMA_channel) & 7, gc->FORCADR,
1055 gc->SG_64K, gc->SG_UAE, gc->MAX_ID, gc->MAX_CHAN, gc->MAX_LUN);
1056 printk("RIDQ:%d PCI:%d EISA:%d\n",
1057 gc->ID_qest, gc->is_PCI, gc->is_EISA);
1058 DBG(DPT_DEBUG, DELAY(14));
1061 short register_HBA(u32 base, struct get_conf *gc, Scsi_Host_Template * tpnt,
1065 unchar dma_channel = 0;
1068 struct Scsi_Host *sh;
1073 DBG(DBG_REGISTER, print_config(gc));
1075 if (gc->DMA_support == FALSE) {
1076 printk("The EATA HBA at %#.4x does not support DMA.\n"
1077 "Please use the EATA-PIO driver.\n", base);
1080 if(gc->HAA_valid == FALSE || ntohl(gc->len) < 0x22)
1083 if (reg_IRQ[gc->IRQ] == FALSE) { /* Interrupt already registered ? */
1084 if (!request_irq(gc->IRQ, (void *) eata_fake_int_handler, SA_INTERRUPT,
1088 reg_IRQL[gc->IRQ] = TRUE; /* IRQ is edge triggered */
1090 printk("Couldn't allocate IRQ %d, Sorry.", gc->IRQ);
1093 } else { /* More than one HBA on this IRQ */
1094 if (reg_IRQL[gc->IRQ] == TRUE) {
1095 printk("Can't support more than one HBA on this IRQ,\n"
1096 " if the IRQ is edge triggered. Sorry.\n");
1103 /* If DMA is supported but DMA_valid isn't set to indicate that
1104 * the channel number is given we must have pre 2.0 firmware (1.7?)
1105 * which leaves us to guess since the "newer ones" also don't set the
1108 if (gc->DMA_support && !gc->DMA_valid && gc->DMA_channel) {
1109 printk(KERN_WARNING "eata_dma: If you are using a pre 2.0 firmware "
1110 "please update it !\n"
1111 " You can get new firmware releases from ftp.dpt.com\n");
1112 gc->DMA_channel = (base == 0x1f0 ? 3 /* DMA=5 */ : 2 /* DMA=6 */);
1113 gc->DMA_valid = TRUE;
1116 /* if gc->DMA_valid it must be an ISA HBA and we have to register it */
1117 dma_channel = BUSMASTER;
1118 if (gc->DMA_valid) {
1119 if (request_dma(dma_channel = (8 - gc->DMA_channel) & 7, "eata_dma")) {
1120 printk(KERN_WARNING "Unable to allocate DMA channel %d for ISA HBA"
1121 " at %#.4x.\n", dma_channel, base);
1123 if (reg_IRQ[gc->IRQ] == 0)
1124 free_irq(gc->IRQ, NULL);
1125 if (gc->IRQ_TR == FALSE)
1126 reg_IRQL[gc->IRQ] = FALSE;
1131 if (dma_channel != BUSMASTER) {
1132 disable_dma(dma_channel);
1133 clear_dma_ff(dma_channel);
1134 set_dma_mode(dma_channel, DMA_MODE_CASCADE);
1135 enable_dma(dma_channel);
1138 if (bustype != IS_EISA && bustype != IS_ISA)
1139 buff = get_board_data(base, gc->IRQ, gc->scsi_id[3]);
1142 if (bustype == IS_EISA || bustype == IS_ISA) {
1143 bugs = bugs || BROKEN_INQUIRY;
1145 if (gc->DMA_support == FALSE)
1146 printk(KERN_WARNING "HBA at %#.4x doesn't support DMA. "
1149 printk(KERN_WARNING "HBA at %#.4x does not react on INQUIRY. "
1152 free_dma(dma_channel);
1154 if (reg_IRQ[gc->IRQ] == 0)
1155 free_irq(gc->IRQ, NULL);
1156 if (gc->IRQ_TR == FALSE)
1157 reg_IRQL[gc->IRQ] = FALSE;
1162 if (gc->DMA_support == FALSE && buff != NULL)
1163 printk(KERN_WARNING "HBA %.12sat %#.4x doesn't set the DMA_support "
1164 "flag correctly.\n", &buff[16], base);
1166 request_region(base, 9, "eata_dma"); /* We already checked the
1167 * availability, so this
1171 if(ntohs(gc->queuesiz) == 0) {
1172 gc->queuesiz = ntohs(64);
1173 printk(KERN_WARNING "Warning: Queue size has to be corrected. Assuming"
1175 " This might be a PM2012B with a defective Firmware\n"
1176 " Contact DPT support@dpt.com for an upgrade\n");
1179 size = sizeof(hostdata) + ((sizeof(struct eata_ccb) + sizeof(long))
1180 * ntohs(gc->queuesiz));
1182 DBG(DBG_REGISTER, printk("scsi_register size: %ld\n", size));
1184 sh = scsi_register(tpnt, size);
1190 memset(hd->reads, 0, sizeof(u32) * 26);
1192 sh->select_queue_depths = eata_select_queue_depths;
1194 hd->bustype = bustype;
1197 * If we are using a ISA board, we can't use extended SG,
1198 * because we would need excessive amounts of memory for
1201 if (gc->SG_64K==TRUE && ntohs(gc->SGsiz)==64 && hd->bustype!=IS_ISA){
1202 sh->sg_tablesize = SG_SIZE_BIG;
1204 sh->sg_tablesize = ntohs(gc->SGsiz);
1205 if (sh->sg_tablesize > SG_SIZE || sh->sg_tablesize == 0) {
1206 if (sh->sg_tablesize == 0)
1207 printk(KERN_WARNING "Warning: SG size had to be fixed.\n"
1208 "This might be a PM2012 with a defective Firmware"
1209 "\nContact DPT support@dpt.com for an upgrade\n");
1210 sh->sg_tablesize = SG_SIZE;
1213 hd->sgsize = sh->sg_tablesize;
1217 sh->can_queue = hd->queuesize = ntohs(gc->queuesiz);
1218 sh->cmd_per_lun = 0;
1222 DBG(DBG_REGISTER, printk(KERN_NOTICE "eata_dma: couldn't register HBA"
1224 scsi_unregister(sh);
1226 free_dma(dma_channel);
1229 if (reg_IRQ[gc->IRQ] == 0)
1230 free_irq(gc->IRQ, NULL);
1231 if (gc->IRQ_TR == FALSE)
1232 reg_IRQL[gc->IRQ] = FALSE;
1237 hd->broken_INQUIRY = (bugs & BROKEN_INQUIRY);
1239 if(hd->broken_INQUIRY == TRUE) {
1240 strcpy(hd->vendor, "DPT");
1241 strcpy(hd->name, "??????????");
1242 strcpy(hd->revision, "???.?");
1243 hd->firmware_revision = 0;
1245 strncpy(hd->vendor, &buff[8], 8);
1247 strncpy(hd->name, &buff[16], 17);
1249 hd->revision[0] = buff[32];
1250 hd->revision[1] = buff[33];
1251 hd->revision[2] = buff[34];
1252 hd->revision[3] = '.';
1253 hd->revision[4] = buff[35];
1254 hd->revision[5] = 0;
1255 hd->firmware_revision = (buff[32] << 24) + (buff[33] << 16)
1256 + (buff[34] << 8) + buff[35];
1259 if (hd->firmware_revision >= (('0'<<24) + ('7'<<16) + ('G'<< 8) + '0'))
1260 hd->immediate_support = 1;
1262 hd->immediate_support = 0;
1264 switch (ntohl(gc->len)) {
1266 hd->EATA_revision = 'a';
1269 hd->EATA_revision = 'b';
1272 hd->EATA_revision = 'c';
1275 hd->EATA_revision = 'z';
1277 hd->EATA_revision = '?';
1281 if(ntohl(gc->len) >= 0x22) {
1282 sh->max_id = gc->MAX_ID + 1;
1283 sh->max_lun = gc->MAX_LUN + 1;
1289 hd->HBA_number = sh->host_no;
1290 hd->channel = gc->MAX_CHAN;
1291 sh->max_channel = gc->MAX_CHAN;
1292 sh->unique_id = base;
1297 sh->dma_channel = dma_channel;
1300 * SCSI midlevel code should support different HBA ids on every channel
1302 sh->this_id = gc->scsi_id[3];
1305 hd->primary = FALSE;
1309 if (hd->bustype != IS_ISA) {
1310 sh->unchecked_isa_dma = FALSE;
1312 sh->unchecked_isa_dma = TRUE; /* We're doing ISA DMA */
1315 for(x = 0; x <= 11; x++){ /* Initialize min. latency */
1316 hd->writes_lat[x][1] = 0xffffffff;
1317 hd->reads_lat[x][1] = 0xffffffff;
1319 hd->all_lat[1] = 0xffffffff;
1321 hd->next = NULL; /* build a linked list of all HBAs */
1322 hd->prev = last_HBA;
1323 if(hd->prev != NULL)
1324 SD(hd->prev)->next = sh;
1326 if (first_HBA == NULL)
1335 void find_EISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1341 u8 pal1, pal2, pal3;
1344 for (i = 0; i < MAXEISA; i++) {
1345 if (EISAbases[i] == TRUE) { /* Still a possibility ? */
1347 base = 0x1c88 + (i * 0x1000);
1349 pal1 = inb((u16)base - 8);
1350 pal2 = inb((u16)base - 7);
1351 pal3 = inb((u16)base - 6);
1353 if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) ||
1354 ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) && (pal3 == NEC_ID3))||
1355 ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) && (pal3 == ATT_ID3))){
1356 DBG(DBG_PROBE, printk("EISA EATA id tags found: %x %x %x \n",
1357 (int)pal1, (int)pal2, (int)pal3));
1359 if (get_conf_PIO(base, buf) == TRUE) {
1361 DBG(DBG_EISA, printk("Registering EISA HBA\n"));
1362 register_HBA(base, buf, tpnt, IS_EISA);
1364 printk("eata_dma: No valid IRQ. HBA removed from list\n");
1368 if (check_blink_state(base))
1369 printk("HBA is in BLINK state. Consult your HBAs "
1370 "Manual to correct this.\n");
1373 /* Nothing found here so we take it from the list */
1383 void find_ISA(struct get_conf *buf, Scsi_Host_Template * tpnt)
1387 for (i = 0; i < MAXISA; i++) {
1389 if (get_conf_PIO(ISAbases[i],buf) == TRUE){
1390 DBG(DBG_ISA, printk("Registering ISA HBA\n"));
1391 register_HBA(ISAbases[i], buf, tpnt, IS_ISA);
1395 if (check_blink_state(ISAbases[i]))
1396 printk("HBA is in BLINK state. Consult your HBAs "
1397 "Manual to correct this.\n");
1406 void find_PCI(struct get_conf *buf, Scsi_Host_Template * tpnt)
1409 printk("eata_dma: kernel PCI support not enabled. Skipping scan for PCI HBAs.\n");
1411 struct pci_dev *dev = NULL;
1413 u8 pal1, pal2, pal3;
1415 while ((dev = pci_find_device(PCI_VENDOR_ID_DPT, PCI_DEVICE_ID_DPT, dev)) != NULL) {
1416 DBG(DBG_PROBE && DBG_PCI,
1417 printk("eata_dma: find_PCI, HBA at %s\n", dev->name));
1418 if (pci_enable_device(dev))
1420 pci_set_master(dev);
1421 base = pci_resource_flags(dev, 0);
1422 if (base & IORESOURCE_MEM) {
1423 printk("eata_dma: invalid base address of device %s\n", dev->name);
1426 base = pci_resource_start(dev, 0);
1427 /* EISA tag there ? */
1429 pal2 = inb(base + 1);
1430 pal3 = inb(base + 2);
1431 if (((pal1 == DPT_ID1) && (pal2 == DPT_ID2)) ||
1432 ((pal1 == NEC_ID1) && (pal2 == NEC_ID2) &&
1433 (pal3 == NEC_ID3)) ||
1434 ((pal1 == ATT_ID1) && (pal2 == ATT_ID2) &&
1438 base += 0x10; /* Now, THIS is the real address */
1439 if (base != 0x1f8) {
1440 /* We didn't find it in the primary search */
1441 if (get_conf_PIO(base, buf) == TRUE) {
1442 /* OK. We made it till here, so we can go now
1443 * and register it. We only have to check and
1444 * eventually remove it from the EISA and ISA list
1446 DBG(DBG_PCI, printk("Registering PCI HBA\n"));
1447 register_HBA(base, buf, tpnt, IS_PCI);
1449 if (base < 0x1000) {
1450 for (x = 0; x < MAXISA; ++x) {
1451 if (ISAbases[x] == base) {
1456 } else if ((base & 0x0fff) == 0x0c88)
1457 EISAbases[(base >> 12) & 0x0f] = 0;
1460 else if (check_blink_state(base) == TRUE) {
1461 printk("eata_dma: HBA is in BLINK state.\n"
1462 "Consult your HBAs manual to correct this.\n");
1467 #endif /* #ifndef CONFIG_PCI */
1470 int eata_detect(Scsi_Host_Template * tpnt)
1472 struct Scsi_Host *HBA_ptr;
1476 DBG((DBG_PROBE && DBG_DELAY) || DPT_DEBUG,
1477 printk("Using lots of delays to let you read the debugging output\n"));
1479 tpnt->proc_name = "eata_dma";
1481 status = kmalloc(512, GFP_ATOMIC | GFP_DMA);
1482 dma_scratch = kmalloc(1024, GFP_ATOMIC | GFP_DMA);
1484 if(status == NULL || dma_scratch == NULL) {
1485 printk("eata_dma: can't allocate enough memory to probe for hosts !\n");
1495 find_PCI(&gc, tpnt);
1497 find_EISA(&gc, tpnt);
1499 find_ISA(&gc, tpnt);
1501 for (i = 0; i <= MAXIRQ; i++) { /* Now that we know what we have, we */
1502 if (reg_IRQ[i] >= 1){ /* exchange the interrupt handler which */
1503 free_irq(i, NULL); /* we used for probing with the real one */
1504 request_irq(i, (void *)(do_eata_int_handler), SA_INTERRUPT|SA_SHIRQ,
1509 HBA_ptr = first_HBA;
1511 if (registered_HBAs != 0) {
1512 printk("EATA (Extended Attachment) driver version: %d.%d%s"
1513 "\ndeveloped in co-operation with DPT\n"
1514 "(c) 1993-96 Michael Neuffer, mike@i-Connect.Net\n",
1515 VER_MAJOR, VER_MINOR, VER_SUB);
1516 printk("Registered HBAs:");
1517 printk("\nHBA no. Boardtype Revis EATA Bus BaseIO IRQ"
1518 " DMA Ch ID Pr QS S/G IS\n");
1519 for (i = 1; i <= registered_HBAs; i++) {
1520 printk("scsi%-2d: %.12s v%s 2.0%c %s %#.4x %2d",
1521 HBA_ptr->host_no, SD(HBA_ptr)->name, SD(HBA_ptr)->revision,
1522 SD(HBA_ptr)->EATA_revision, (SD(HBA_ptr)->bustype == 'P')?
1523 "PCI ":(SD(HBA_ptr)->bustype == 'E')?"EISA":"ISA ",
1524 (u32) HBA_ptr->base, HBA_ptr->irq);
1525 if(HBA_ptr->dma_channel != BUSMASTER)
1526 printk(" %2x ", HBA_ptr->dma_channel);
1528 printk(" %s", "BMST");
1529 printk(" %d %d %c %3d %3d %c\n",
1530 SD(HBA_ptr)->channel+1, HBA_ptr->this_id,
1531 (SD(HBA_ptr)->primary == TRUE)?'Y':'N',
1532 HBA_ptr->can_queue, HBA_ptr->sg_tablesize,
1533 (SD(HBA_ptr)->immediate_support == TRUE)?'Y':'N');
1534 HBA_ptr = SD(HBA_ptr)->next;
1537 kfree((void *)status);
1540 kfree((void *)dma_scratch - 4);
1542 DBG(DPT_DEBUG, DELAY(12));
1544 return(registered_HBAs);
1547 /* Eventually this will go into an include file, but this will be later */
1548 static Scsi_Host_Template driver_template = EATA_DMA;
1549 #include "scsi_module.c"
1552 * Overrides for Emacs so that we almost follow Linus's tabbing style.
1553 * Emacs will notice this stuff at the end of the file and automatically
1554 * adjust the settings for this buffer only. This must remain at the end
1556 * ---------------------------------------------------------------------------
1559 * c-brace-imaginary-offset: 0
1560 * c-brace-offset: -4
1561 * c-argdecl-indent: 4
1562 * c-label-offset: -4
1563 * c-continued-statement-offset: 4
1564 * c-continued-brace-offset: 0