4 * Copyright (C) Eicon Technology Corporation, 2000.
6 * This source file is supplied for the exclusive use with Eicon
7 * Technology Corporation's range of DIVA Server Adapters.
9 * Eicon File Revision : 1.0
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2, or (at your option)
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY OF ANY KIND WHATSOEVER INCLUDING ANY
18 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
19 * See the GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38 /*---------------------------------------------------------------------------*/
47 #define FALSE (0 != 0)
51 /*---------------------------------------------------------------------------*/
53 #define DSP_MEMORY_TYPE_EXTERNAL_DM 0
54 #define DSP_MEMORY_TYPE_EXTERNAL_PM 1
55 #define DSP_MEMORY_TYPE_INTERNAL_DM 2
56 #define DSP_MEMORY_TYPE_INTERNAL_PM 3
58 #define DSP_DOWNLOAD_FLAG_BOOTABLE 0x0001
59 #define DSP_DOWNLOAD_FLAG_2181 0x0002
60 #define DSP_DOWNLOAD_FLAG_TIMECRITICAL 0x0004
61 #define DSP_DOWNLOAD_FLAG_COMPAND 0x0008
63 #define DSP_MEMORY_BLOCK_COUNT 16
65 #define DSP_SEGMENT_PM_FLAG 0x0001
66 #define DSP_SEGMENT_SHARED_FLAG 0x0002
68 #define DSP_SEGMENT_EXTERNAL_DM DSP_MEMORY_TYPE_EXTERNAL_DM
69 #define DSP_SEGMENT_EXTERNAL_PM DSP_MEMORY_TYPE_EXTERNAL_PM
70 #define DSP_SEGMENT_INTERNAL_DM DSP_MEMORY_TYPE_INTERNAL_DM
71 #define DSP_SEGMENT_INTERNAL_PM DSP_MEMORY_TYPE_INTERNAL_PM
72 #define DSP_SEGMENT_FIRST_RELOCATABLE 4
74 #define DSP_DATA_BLOCK_PM_FLAG 0x0001
75 #define DSP_DATA_BLOCK_DWORD_FLAG 0x0002
76 #define DSP_DATA_BLOCK_RESOLVE_FLAG 0x0004
78 #define DSP_RELOC_NONE 0x00
79 #define DSP_RELOC_SEGMENT_MASK 0x3f
80 #define DSP_RELOC_TYPE_MASK 0xc0
81 #define DSP_RELOC_TYPE_0 0x00 /* relocation of address in DM word / high part of PM word */
82 #define DSP_RELOC_TYPE_1 0x40 /* relocation of address in low part of PM data word */
83 #define DSP_RELOC_TYPE_2 0x80 /* relocation of address in standard command */
84 #define DSP_RELOC_TYPE_3 0xc0 /* relocation of address in call/jump on flag in */
86 #define DSP_COMBIFILE_FORMAT_IDENTIFICATION_SIZE 48
87 #define DSP_COMBIFILE_FORMAT_VERSION_BCD 0x0100
89 #define DSP_FILE_FORMAT_IDENTIFICATION_SIZE 48
90 #define DSP_FILE_FORMAT_VERSION_BCD 0x0100
93 typedef struct tag_dsp_combifile_header
95 char format_identification[DSP_COMBIFILE_FORMAT_IDENTIFICATION_SIZE];
96 word format_version_bcd;
98 word combifile_description_size;
99 word directory_entries;
102 word usage_mask_size;
103 } t_dsp_combifile_header;
105 typedef struct tag_dsp_combifile_directory_entry
107 word card_type_number;
108 word file_set_number;
109 } t_dsp_combifile_directory_entry;
111 typedef struct tag_dsp_file_header
113 char format_identification[DSP_FILE_FORMAT_IDENTIFICATION_SIZE];
114 word format_version_bcd;
117 word required_processing_power;
118 word interface_channel_count;
120 word download_description_size;
121 word memory_block_table_size;
122 word memory_block_count;
123 word segment_table_size;
125 word symbol_table_size;
127 word total_data_size_dm;
128 word data_block_count_dm;
129 word total_data_size_pm;
130 word data_block_count_pm;
133 typedef struct tag_dsp_memory_block_desc
135 word alias_memory_block;
138 word size; /* DSP words */
139 } t_dsp_memory_block_desc;
141 typedef struct tag_dsp_segment_desc
147 word alignment; /* ==0 -> no other legal start address than base */
148 } t_dsp_segment_desc;
150 typedef struct tag_dsp_symbol_desc
155 word size; /* DSP words */
158 typedef struct tag_dsp_data_block_header
163 word size; /* DSP words */
164 } t_dsp_data_block_header;
166 typedef struct tag_dsp_download_desc /* be sure to keep native alignment for MAESTRA's */
170 word required_processing_power;
171 word interface_channel_count;
172 word excess_header_size;
173 word memory_block_count;
176 word data_block_count_dm;
177 word data_block_count_pm;
178 byte *p_excess_header_data;
179 char *p_download_description;
180 t_dsp_memory_block_desc *p_memory_block_table;
181 t_dsp_segment_desc *p_segment_table;
182 t_dsp_symbol_desc *p_symbol_table;
183 word *p_data_blocks_dm;
184 word *p_data_blocks_pm;
185 } t_dsp_download_desc;
187 #define DSP_DOWNLOAD_INDEX_KERNEL 0
188 #define DSP30TX_DOWNLOAD_INDEX_KERNEL 1
189 #define DSP30RX_DOWNLOAD_INDEX_KERNEL 2
190 #define DSP_MAX_DOWNLOAD_COUNT 35
193 #define DSP_DOWNLOAD_MAX_SEGMENTS 16
195 #define DSP_UDATA_REQUEST_RECONFIGURE 0
198 <word> reconfigure delay (in 8kHz samples)
199 <word> reconfigure code
200 <byte> reconfigure hdlc preamble flags
203 #define DSP_RECONFIGURE_TX_FLAG 0x8000
204 #define DSP_RECONFIGURE_SHORT_TRAIN_FLAG 0x4000
205 #define DSP_RECONFIGURE_ECHO_PROTECT_FLAG 0x2000
206 #define DSP_RECONFIGURE_HDLC_FLAG 0x1000
207 #define DSP_RECONFIGURE_SYNC_FLAG 0x0800
208 #define DSP_RECONFIGURE_PROTOCOL_MASK 0x00ff
209 #define DSP_RECONFIGURE_IDLE 0
210 #define DSP_RECONFIGURE_V25 1
211 #define DSP_RECONFIGURE_V21_CH2 2
212 #define DSP_RECONFIGURE_V27_2400 3
213 #define DSP_RECONFIGURE_V27_4800 4
214 #define DSP_RECONFIGURE_V29_7200 5
215 #define DSP_RECONFIGURE_V29_9600 6
216 #define DSP_RECONFIGURE_V33_12000 7
217 #define DSP_RECONFIGURE_V33_14400 8
218 #define DSP_RECONFIGURE_V17_7200 9
219 #define DSP_RECONFIGURE_V17_9600 10
220 #define DSP_RECONFIGURE_V17_12000 11
221 #define DSP_RECONFIGURE_V17_14400 12
224 data indications if transparent framer
229 data indications if HDLC framer
235 <byte> preamble flags
238 #define DSP_UDATA_INDICATION_SYNC 0
241 <word> time of sync (sampled from counter at 8kHz)
244 #define DSP_UDATA_INDICATION_DCD_OFF 1
247 <word> time of DCD off (sampled from counter at 8kHz)
250 #define DSP_UDATA_INDICATION_DCD_ON 2
253 <word> time of DCD on (sampled from counter at 8kHz)
254 <byte> connected norm
255 <word> connected options
256 <dword> connected speed (bit/s)
259 #define DSP_UDATA_INDICATION_CTS_OFF 3
262 <word> time of CTS off (sampled from counter at 8kHz)
265 #define DSP_UDATA_INDICATION_CTS_ON 4
268 <word> time of CTS on (sampled from counter at 8kHz)
269 <byte> connected norm
270 <word> connected options
271 <dword> connected speed (bit/s)
274 #define DSP_CONNECTED_NORM_UNSPECIFIED 0
275 #define DSP_CONNECTED_NORM_V21 1
276 #define DSP_CONNECTED_NORM_V23 2
277 #define DSP_CONNECTED_NORM_V22 3
278 #define DSP_CONNECTED_NORM_V22_BIS 4
279 #define DSP_CONNECTED_NORM_V32_BIS 5
280 #define DSP_CONNECTED_NORM_V34 6
281 #define DSP_CONNECTED_NORM_V8 7
282 #define DSP_CONNECTED_NORM_BELL_212A 8
283 #define DSP_CONNECTED_NORM_BELL_103 9
284 #define DSP_CONNECTED_NORM_V29_LEASED_LINE 10
285 #define DSP_CONNECTED_NORM_V33_LEASED_LINE 11
286 #define DSP_CONNECTED_NORM_TFAST 12
287 #define DSP_CONNECTED_NORM_V21_CH2 13
288 #define DSP_CONNECTED_NORM_V27_TER 14
289 #define DSP_CONNECTED_NORM_V29 15
290 #define DSP_CONNECTED_NORM_V33 16
291 #define DSP_CONNECTED_NORM_V17 17
293 #define DSP_CONNECTED_OPTION_TRELLIS 0x0001
296 /*---------------------------------------------------------------------------*/
303 /*---------------------------------------------------------------------------*/