arch/parisc/mm/pa20.c

   1 /* $Id: pa20.c,v 1.1 1999/03/17 01:05:41 pjlahaie Exp $
   2  *
   3  * pa20.c: PA 2.0 specific mmu/cache code.
   4  *
   5  */
   6 #include <linux/init.h>
   7 #include <linux/kernel.h>
   8 #include <linux/sched.h>
   9 #include <linux/mm.h>
  10
  11 #include <asm/page.h>
  12 #include <asm/pgtable.h>
  13 #include <asm/system.h>
  14 #include <asm/sgialib.h>
  15 #include <asm/mmu_context.h>
  16
  17 extern unsigned long mips_tlb_entries;
  18
  19 /* page functions */
  20 void pa20_clear_page(unsigned long page)
  21 {
  22 }
  23
  24 static void pa20_copy_page(unsigned long to, unsigned long from)
  25 {
  26 }
  27
  28 /* Cache operations. */
  29 static inline void pa20_flush_cache_all(void) { }
  30 static void pa20_flush_cache_mm(struct mm_struct *mm) { }
  31 static void pa20_flush_cache_range(struct mm_struct *mm,
  32                                     unsigned long start,
  33                                     unsigned long end)
  34 {
  35 }
  36
  37 static void pa20_flush_cache_page(struct vm_area_struct *vma,
  38                                    unsigned long page)
  39 {
  40 }
  41
  42 static void pa20_flush_page_to_ram(unsigned long page)
  43 {
  44 }
  45
  46 static void pa20_flush_cache_sigtramp(unsigned long page)
  47 {
  48 }
  49
  50 /* TLB operations. */
  51 static inline void pa20_flush_tlb_all(void)
  52 {
  53         unsigned long flags;
  54         int entry;
  55
  56         save_and_cli(flags);
  57 /* Here we will need to flush all the TLBs */
  58         restore_flags(flags);
  59 }
  60
  61 static void pa20_flush_tlb_mm(struct mm_struct *mm)
  62 {
  63 /* This is what the MIPS does..  Is it the right thing for PA-RISC? */
  64         if(mm == current->mm)
  65                 pa20_flush_tlb_all();
  66 }
  67
  68 static void pa20_flush_tlb_range(struct mm_struct *mm, unsigned long start,
  69                                   unsigned long end)
  70 {
  71         if(mm == current->mm)
  72                 pa20_flush_tlb_all();
  73 }
  74
  75 static void pa20_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  76 {
  77         if(vma->vm_mm == current->mm)
  78                 pa20_flush_tlb_all();
  79 }
  80
  81 static void pa20_load_pgd(unsigned long pg_dir)
  82 {
  83         unsigned long flags;
  84     /* We need to do the right thing here */
  85 }
  86
  87 /*
  88  * Initialize new page directory with pointers to invalid ptes
  89  */
  90 static void pa20_pgd_init(unsigned long page)
  91 {
  92         unsigned long dummy1, dummy2;
  93
  94 }
  95
  96 static void pa20_update_mmu_cache(struct vm_area_struct * vma,
  97                                    unsigned long address, pte_t pte)
  98 {
  99         pa20_flush_tlb_page(vma, address);
 100 }
 101
 102 static void pa20_show_regs(struct pt_regs * regs)
 103 {
 104         /*
 105          * Saved main processor registers
 106          */
 107         printk("$0 : %08x %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
 108                0, (unsigned long) regs->regs[1], (unsigned long) regs->regs[2],
 109                (unsigned long) regs->regs[3], (unsigned long) regs->regs[4],
 110                (unsigned long) regs->regs[5], (unsigned long) regs->regs[6],
 111                (unsigned long) regs->regs[7]);
 112         printk("$8 : %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
 113                (unsigned long) regs->regs[8], (unsigned long) regs->regs[9],
 114                (unsigned long) regs->regs[10], (unsigned long) regs->regs[11],
 115                (unsigned long) regs->regs[12], (unsigned long) regs->regs[13],
 116                (unsigned long) regs->regs[14], (unsigned long) regs->regs[15]);
 117         printk("$16: %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
 118                (unsigned long) regs->regs[16], (unsigned long) regs->regs[17],
 119                (unsigned long) regs->regs[18], (unsigned long) regs->regs[19],
 120                (unsigned long) regs->regs[20], (unsigned long) regs->regs[21],
 121                (unsigned long) regs->regs[22], (unsigned long) regs->regs[23]);
 122         printk("$24: %08lx %08lx                   %08lx %08lx %08lx %08lx\n",
 123                (unsigned long) regs->regs[24], (unsigned long) regs->regs[25],
 124                (unsigned long) regs->regs[28], (unsigned long) regs->regs[29],
 125                (unsigned long) regs->regs[30], (unsigned long) regs->regs[31]);
 126
 127         /*
 128          * Saved cp0 registers
 129          */
 130         printk("epc  : %08lx\nStatus: %08x\nCause : %08x\n",
 131                (unsigned long) regs->cp0_epc, (unsigned int) regs->cp0_status,
 132                (unsigned int) regs->cp0_cause);
 133 }
 134
 135 static int pa20_user_mode(struct pt_regs *regs)
 136 {
 137        /* Return user mode stuff?? */
 138 }
 139
 140 __initfunc(void ld_mmu_pa20(void))
 141 {
 142
 143     /* Taken directly from the MIPS arch..  Lots of bad things here */
 144         clear_page = pa20_clear_page;
 145         copy_page = pa20_copy_page;
 146
 147         flush_cache_all = pa20_flush_cache_all;
 148         flush_cache_mm = pa20_flush_cache_mm;
 149         flush_cache_range = pa20_flush_cache_range;
 150         flush_cache_page = pa20_flush_cache_page;
 151         flush_cache_sigtramp = pa20_flush_cache_sigtramp;
 152         flush_page_to_ram = pa20_flush_page_to_ram;
 153
 154         flush_tlb_all = pa20_flush_tlb_all;
 155         flush_tlb_mm = pa20_flush_tlb_mm;
 156         flush_tlb_range = pa20_flush_tlb_range;
 157         flush_tlb_page = pa20_flush_tlb_page;
 158         pa20_asid_setup();
 159
 160         load_pgd = pa20_load_pgd;
 161         pgd_init = pa20_pgd_init;
 162         update_mmu_cache = pa20_update_mmu_cache;
 163
 164         show_regs = pa20_show_regs;
 165
 166         add_wired_entry = pa20_add_wired_entry;
 167
 168         user_mode = pa20_user_mode;
 169         flush_tlb_all();
 170 }