arch/mips/baget/setup.c

   1 /* $Id: setup.c,v 1.4 1999/10/09 00:00:57 ralf Exp $
   2  *
   3  * setup.c: Baget/MIPS specific setup, including init of the feature struct.
   4  *
   5  * Copyright (C) 1998 Gleb Raiko & Vladimir Roganov
   6  *
   7  */
   8 #include <linux/init.h>
   9 #include <linux/kernel.h>
  10 #include <linux/sched.h>
  11 #include <asm/irq.h>
  12 #include <asm/addrspace.h>
  13 #include <asm/reboot.h>
  14
  15 #include <asm/baget/baget.h>
  16
  17 extern long mips_memory_upper;
  18
  19 #define CACHEABLE_STR(val) ((val) ? "not cached" : "cached")
  20 #define MIN(a,b)           (((a)<(b)) ? (a):(b))
  21
  22 static void __init vac_show(void)
  23 {
  24         int i;
  25         unsigned short val, decode = vac_inw(VAC_DECODE_CTRL);
  26         unsigned short a24_base = vac_inw(VAC_A24_BASE);
  27         unsigned long  a24_addr = ((unsigned long)
  28                                            (a24_base & VAC_A24_MASK)) << 16;
  29         char *decode_mode[]  = { "eprom", "vsb", "shared", "dram" };
  30         char *address_mode[] = { "", ", A16", ", A32/A24", ", A32/A24/A16" };
  31         char *state[] = { "", " on write", " on read", " on read/write", };
  32         char *region_mode[] = { "inactive", "shared", "vsb", "vme" };
  33         char *asiz[]        = { "user", "A32", "A16", "A24" };
  34         unsigned short regs[] = { VAC_REG1,     VAC_REG2, VAC_REG3  };
  35         unsigned short bndr[] = { VAC_DRAM_MASK,VAC_BNDR2,VAC_BNDR3 };
  36         unsigned short io_sels[] = { VAC_IOSEL0_CTRL,
  37                                      VAC_IOSEL1_CTRL,
  38                                      VAC_IOSEL2_CTRL,
  39                                      VAC_IOSEL3_CTRL,
  40                                      VAC_IOSEL4_CTRL,
  41                                      VAC_IOSEL5_CTRL };
  42
  43         printk("[DSACKi %s, DRAMCS%s qualified, boundary%s qualified%s]\n",
  44                (decode & VAC_DECODE_DSACKI)     ? "on" : "off",
  45                (decode & VAC_DECODE_QFY_DRAMCS) ? ""   : " not",
  46                (decode & VAC_DECODE_QFY_BNDR)   ? ""   : " not",
  47                (decode & VAC_DECODE_FPUCS)      ? ", fpu" : "");
  48
  49         printk("slave0 ");
  50         if (decode & VAC_DECODE_RDR_SLSEL0)
  51                 printk("at %08lx (%d MB)\t[dram %s]\n",
  52                        ((unsigned long)vac_inw(VAC_SLSEL0_BASE))<<16,
  53                        ((0xffff ^ vac_inw(VAC_SLSEL0_MASK)) + 1) >> 4,
  54                        (decode & VAC_DECODE_QFY_SLSEL0) ? "qualified" : "");
  55         else
  56                 printk("off\n");
  57
  58         printk("slave1 ");
  59         if (decode & VAC_DECODE_RDR_SLSEL1)
  60                 printk("at %08lx (%d MB)\t[%s%s, %s]\n",
  61                        ((unsigned long)vac_inw(VAC_SLSEL1_BASE))<<16,
  62                        ((0xffff ^ vac_inw(VAC_SLSEL1_MASK)) + 1) >> 4,
  63                        decode_mode[VAC_DECODE_MODE_VAL(decode)],
  64                        address_mode[VAC_DECODE_CMP_SLSEL1_VAL(decode)],
  65                        (decode & VAC_DECODE_QFY_SLSEL1) ? "qualified" : "");
  66         else
  67                 printk("off\n");
  68
  69         printk("icf global at %04x, module at %04x [%s]\n",
  70                        ((unsigned int)
  71                         VAC_ICFSEL_GLOBAL_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
  72                        ((unsigned int)
  73                         VAC_ICFSEL_MODULE_VAL(vac_inw(VAC_ICFSEL_BASE)))<<4,
  74                        (decode & VAC_DECODE_QFY_ICFSEL) ? "qualified" : "");
  75
  76
  77         printk("region0 at 00000000 (%dMB)\t[dram, %s, delay %d cpuclk"
  78                ", cached]\n",
  79                (vac_inw(VAC_DRAM_MASK)+1)>>4,
  80                (decode & VAC_DECODE_DSACK) ? "D32" : "3state",
  81                VAC_DECODE_CPUCLK_VAL(decode));
  82
  83         for (i = 0; i < sizeof(regs)/sizeof(regs[0]); i++) {
  84                 unsigned long from =
  85                         ((unsigned long)vac_inw(bndr[i]))<<16;
  86                 unsigned long to   =
  87                         ((unsigned long)
  88                          ((i+1 == sizeof(bndr)/sizeof(bndr[0])) ?
  89                           0xff00 : vac_inw(bndr[i+1])))<<16;
  90
  91
  92                 val = vac_inw(regs[i]);
  93                 printk("region%d at %08lx (%dMB)\t[%s %s/%s, %s]\n",
  94                        i+1,
  95                        from,
  96                        (unsigned int)((to - from) >> 20),
  97                        region_mode[VAC_REG_MODE(val)],
  98                        asiz[VAC_REG_ASIZ_VAL(val)],
  99                        ((val & VAC_REG_WORD) ?  "D16" : "D32"),
 100                        CACHEABLE_STR(val&VAC_A24_A24_CACHINH));
 101
 102                 if (a24_addr >= from && a24_addr < to)
 103                         printk("\ta24 at %08lx (%dMB)\t[vme, A24/%s, %s]\n",
 104                                a24_addr,
 105                                MIN((unsigned int)(a24_addr - from)>>20, 32),
 106                                (a24_base & VAC_A24_DATAPATH) ?  "user" :
 107                                ((a24_base & VAC_A24_D32_ENABLE)  ?
 108                                 "D32" : "D16"),
 109                                CACHEABLE_STR(a24_base & VAC_A24_A24_CACHINH));
 110         }
 111
 112         printk("region4 at ff000000 (15MB)\t[eprom]\n");
 113         val = vac_inw(VAC_EPROMCS_CTRL);
 114         printk("\t[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
 115                "read %d%s, write %d%s, assert %d%s]\n",
 116                VAC_CTRL_DELAY_DSACKI_VAL(val),
 117                state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
 118                (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
 119                (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
 120                VAC_CTRL_RECOVERY_IOSELI_VAL(val),
 121                VAC_CTRL_DELAY_IORD_VAL(val)/2,
 122                (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
 123                VAC_CTRL_DELAY_IOWR_VAL(val)/2,
 124                (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
 125                VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
 126                (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
 127
 128         printk("region5 at fff00000 (896KB)\t[local io, %s]\n",
 129                CACHEABLE_STR(vac_inw(VAC_A24_BASE) & VAC_A24_IO_CACHINH));
 130
 131         for (i = 0; i < sizeof(io_sels)/sizeof(io_sels[0]); i++) {
 132                 val = vac_inw(io_sels[i]);
 133                 printk("\tio%d[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
 134                        "\n\t read %d%s cpuclk, write %d%s cpuclk, "
 135                        "assert %d%s%s cpuclk]\n",
 136                        i,
 137                        VAC_CTRL_DELAY_DSACKI_VAL(val),
 138                        state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
 139                        (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
 140                        (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
 141                        VAC_CTRL_RECOVERY_IOSELI_VAL(val),
 142                        VAC_CTRL_DELAY_IORD_VAL(val)/2,
 143                        (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
 144                        VAC_CTRL_DELAY_IOWR_VAL(val)/2,
 145                        (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
 146                        VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
 147                        (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "",
 148                        (vac_inw(VAC_DEV_LOC) & VAC_DEV_LOC_IOSEL(i)) ?
 149                           ", id" : "");
 150         }
 151
 152         printk("region6 at fffe0000 (128KB)\t[vme, A16/%s, "
 153                "not cached]\n",
 154                (a24_base & VAC_A24_A16D32_ENABLE) ?
 155                ((a24_base & VAC_A24_A16D32) ? "D32" : "D16") : "user");
 156
 157         val = vac_inw(VAC_SHRCS_CTRL);
 158         printk("shared[ack %d cpuclk%s, %s%srecovery %d cpuclk, "
 159                "read %d%s, write %d%s, assert %d%s]\n",
 160                VAC_CTRL_DELAY_DSACKI_VAL(val),
 161                state[val & (VAC_CTRL_IORD|VAC_CTRL_IOWR)],
 162                (val & VAC_CTRL_DSACK0) ? "dsack0*, " : "",
 163                (val & VAC_CTRL_DSACK1) ? "dsack1*, " : "",
 164                VAC_CTRL_RECOVERY_IOSELI_VAL(val),
 165                VAC_CTRL_DELAY_IORD_VAL(val)/2,
 166                (VAC_CTRL_DELAY_IORD_VAL(val)&1) ? ".5" : "",
 167                VAC_CTRL_DELAY_IOWR_VAL(val)/2,
 168                (VAC_CTRL_DELAY_IOWR_VAL(val)&1) ? ".5" : "",
 169                VAC_CTRL_DELAY_IOSELI_VAL(val)/2,
 170                (VAC_CTRL_DELAY_IOSELI_VAL(val)&1) ? ".5" : "");
 171 }
 172
 173 static void __init vac_init(void)
 174 {
 175         unsigned short mem_limit = ((mips_memory_upper-KSEG0) >> 16);
 176
 177         switch(vac_inw(VAC_ID)) {
 178         case 0x1AC0:
 179                 printk("VAC068-F5: ");
 180                 break;
 181         case 0x1AC1:
 182                 printk("VAC068A: ");
 183                 break;
 184         default:
 185                 panic("Unknown VAC revision number");
 186         }
 187
 188         vac_outw(mem_limit-1, VAC_DRAM_MASK);
 189         vac_outw(mem_limit, VAC_BNDR2);
 190         vac_outw(mem_limit, VAC_BNDR3);
 191         vac_outw(((BAGET_A24M_BASE>>16)&~VAC_A24_D32_ENABLE)|VAC_A24_DATAPATH,
 192                  VAC_A24_BASE);
 193         vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG1);
 194         vac_outw(VAC_REG_INACTIVE|VAC_REG_ASIZ0,VAC_REG2);
 195         vac_outw(VAC_REG_MWB|VAC_REG_ASIZ1,VAC_REG3);
 196         vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL0_BASE);
 197         vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL0_MASK);
 198         vac_outw(BAGET_A24S_BASE>>16,VAC_SLSEL1_BASE);
 199         vac_outw(BAGET_A24S_MASK>>16,VAC_SLSEL1_MASK);
 200         vac_outw(BAGET_GSW_BASE|BAGET_MSW_BASE(0),VAC_ICFSEL_BASE);
 201         vac_outw(VAC_DECODE_FPUCS|
 202                  VAC_DECODE_CPUCLK(3)|
 203                  VAC_DECODE_RDR_SLSEL0|VAC_DECODE_RDR_SLSEL1|
 204                  VAC_DECODE_DSACK|
 205                  VAC_DECODE_QFY_BNDR|
 206                  VAC_DECODE_QFY_ICFSEL|
 207                  VAC_DECODE_QFY_SLSEL1|VAC_DECODE_QFY_SLSEL0|
 208                  VAC_DECODE_CMP_SLSEL1_HI|
 209                  VAC_DECODE_DRAMCS|
 210                  VAC_DECODE_QFY_DRAMCS|
 211                  VAC_DECODE_DSACKI,VAC_DECODE_CTRL);
 212         vac_outw(VAC_PIO_FUNC_UART_A_TX|VAC_PIO_FUNC_UART_A_RX|
 213                  VAC_PIO_FUNC_UART_B_TX|VAC_PIO_FUNC_UART_B_RX|
 214                  VAC_PIO_FUNC_IOWR|
 215                  VAC_PIO_FUNC_IOSEL3|
 216                  VAC_PIO_FUNC_IRQ7|VAC_PIO_FUNC_IRQ10|VAC_PIO_FUNC_IRQ11|
 217                  VAC_PIO_FUNC_IOSEL2|
 218                  VAC_PIO_FUNC_FCIACK,VAC_PIO_FUNC);
 219         vac_outw(VAC_PIO_DIR_FCIACK |
 220                  VAC_PIO_DIR_OUT(0) |
 221                  VAC_PIO_DIR_OUT(1) |
 222                  VAC_PIO_DIR_OUT(2) |
 223                  VAC_PIO_DIR_OUT(3) |
 224                  VAC_PIO_DIR_IN(4)  |
 225                  VAC_PIO_DIR_OUT(5) |
 226                  VAC_PIO_DIR_OUT(6) |
 227                  VAC_PIO_DIR_OUT(7) |
 228                  VAC_PIO_DIR_OUT(8) |
 229                  VAC_PIO_DIR_IN(9)  |
 230                  VAC_PIO_DIR_OUT(10)|
 231                  VAC_PIO_DIR_OUT(11)|
 232                  VAC_PIO_DIR_OUT(12)|
 233                  VAC_PIO_DIR_OUT(13),VAC_PIO_DIRECTION);
 234         vac_outw(VAC_DEV_LOC_IOSEL(2),VAC_DEV_LOC);
 235         vac_outw(VAC_CTRL_IOWR|
 236                  VAC_CTRL_DELAY_IOWR(3)|
 237                  VAC_CTRL_DELAY_IORD(3)|
 238                  VAC_CTRL_RECOVERY_IOSELI(1)|
 239                  VAC_CTRL_DELAY_DSACKI(8),VAC_SHRCS_CTRL);
 240         vac_outw(VAC_CTRL_IOWR|
 241                  VAC_CTRL_DELAY_IOWR(3)|
 242                  VAC_CTRL_DELAY_IORD(3)|
 243                  VAC_CTRL_RECOVERY_IOSELI(1)|
 244                  VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
 245                  VAC_CTRL_DELAY_DSACKI(8),VAC_EPROMCS_CTRL);
 246         vac_outw(VAC_CTRL_IOWR|
 247                  VAC_CTRL_DELAY_IOWR(3)|
 248                  VAC_CTRL_DELAY_IORD(3)|
 249                  VAC_CTRL_RECOVERY_IOSELI(2)|
 250                  VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
 251                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL0_CTRL);
 252         vac_outw(VAC_CTRL_IOWR|
 253                  VAC_CTRL_DELAY_IOWR(3)|
 254                  VAC_CTRL_DELAY_IORD(3)|
 255                  VAC_CTRL_RECOVERY_IOSELI(2)|
 256                  VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
 257                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL1_CTRL);
 258         vac_outw(VAC_CTRL_IOWR|
 259                  VAC_CTRL_DELAY_IOWR(3)|
 260                  VAC_CTRL_DELAY_IORD(3)|
 261                  VAC_CTRL_RECOVERY_IOSELI(2)|
 262                  VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
 263                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL2_CTRL);
 264         vac_outw(VAC_CTRL_IOWR|
 265                  VAC_CTRL_DELAY_IOWR(3)|
 266                  VAC_CTRL_DELAY_IORD(3)|
 267                  VAC_CTRL_RECOVERY_IOSELI(2)|
 268                  VAC_CTRL_DSACK0|VAC_CTRL_DSACK1|
 269                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL3_CTRL);
 270         vac_outw(VAC_CTRL_IOWR|
 271                  VAC_CTRL_DELAY_IOWR(3)|
 272                  VAC_CTRL_DELAY_IORD(3)|
 273                  VAC_CTRL_RECOVERY_IOSELI(2)|
 274                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL4_CTRL);
 275         vac_outw(VAC_CTRL_IOWR|
 276                  VAC_CTRL_DELAY_IOWR(3)|
 277                  VAC_CTRL_DELAY_IORD(3)|
 278                  VAC_CTRL_RECOVERY_IOSELI(2)|
 279                  VAC_CTRL_DELAY_DSACKI(8),VAC_IOSEL5_CTRL);
 280
 281         vac_show();
 282 }
 283
 284 static void __init vac_start(void)
 285 {
 286         vac_outw(0, VAC_ID);
 287         vac_outw(VAC_INT_CTRL_TIMER_DISABLE|
 288                  VAC_INT_CTRL_UART_B_DISABLE|
 289                  VAC_INT_CTRL_UART_A_DISABLE|
 290                  VAC_INT_CTRL_MBOX_DISABLE|
 291                  VAC_INT_CTRL_PIO4_DISABLE|
 292                  VAC_INT_CTRL_PIO7_DISABLE|
 293                  VAC_INT_CTRL_PIO8_DISABLE|
 294                  VAC_INT_CTRL_PIO9_DISABLE,VAC_INT_CTRL);
 295         vac_outw(VAC_INT_CTRL_TIMER_PIO10|
 296                  VAC_INT_CTRL_UART_B_PIO7|
 297                  VAC_INT_CTRL_UART_A_PIO7,VAC_INT_CTRL);
 298         /*
 299          *  Set quadro speed for both UARTs.
 300          *  To do it we need use formulae from VIC/VAC manual,
 301          *  keeping in mind Baget's 50MHz frequency...
 302          */
 303         vac_outw((500000/(384*16))<<8,VAC_CPU_CLK_DIV);
 304 }
 305
 306 static void __init vic_show(void)
 307 {
 308         unsigned char val;
 309         char *timeout[]  = { "4", "16", "32", "64", "128", "256", "disabled" };
 310         char *deadlock[] = { "[dedlk only]", "[dedlk only]",
 311                              "[dedlk], [halt w/ rmc], [lberr]",
 312                              "[dedlk], [halt w/o rmc], [lberr]" };
 313
 314         val = vic_inb(VIC_IFACE_CFG);
 315         if (val & VIC_IFACE_CFG_VME)
 316                 printk("VMEbus controller ");
 317         if (val & VIC_IFACE_CFG_TURBO)
 318                 printk("turbo ");
 319         if (val & VIC_IFACE_CFG_MSTAB)
 320                 printk("metastability delay ");
 321         printk("%s ",
 322                deadlock[VIC_IFACE_CFG_DEADLOCK_VAL(val)]);
 323
 324
 325         printk("interrupts: ");
 326         val = vic_inb(VIC_ERR_INT);
 327         if (!(val & VIC_ERR_INT_SYSFAIL))
 328                 printk("[sysfail]");
 329         if (!(val & VIC_ERR_INT_TIMO))
 330                 printk("[timeout]");
 331         if (!(val & VIC_ERR_INT_WRPOST))
 332                 printk("[write post]");
 333         if (!(val & VIC_ERR_INT_ACFAIL))
 334                 printk("[acfail] ");
 335         printk("\n");
 336
 337         printk("timeouts: ");
 338         val = vic_inb(VIC_XFER_TIMO);
 339         printk("local %s, vme %s ",
 340                timeout[VIC_XFER_TIMO_LOCAL_PERIOD_VAL(val)],
 341                timeout[VIC_XFER_TIMO_VME_PERIOD_VAL(val)]);
 342         if (val & VIC_XFER_TIMO_VME)
 343                 printk("acquisition ");
 344         if (val & VIC_XFER_TIMO_ARB)
 345                 printk("arbitration ");
 346         printk("\n");
 347
 348         val = vic_inb(VIC_LOCAL_TIM);
 349         printk("pas time: (%d,%d), ds time: %d\n",
 350                VIC_LOCAL_TIM_PAS_ASSERT_VAL(val),
 351                VIC_LOCAL_TIM_PAS_DEASSERT_VAL(val),
 352                VIC_LOCAT_TIM_DS_DEASSERT_VAL(val));
 353
 354         val = vic_inb(VIC_BXFER_DEF);
 355         printk("dma: ");
 356         if (val & VIC_BXFER_DEF_DUAL)
 357                 printk("[dual path]");
 358         if (val & VIC_BXFER_DEF_LOCAL_CROSS)
 359                 printk("[local boundary cross]");
 360         if (val & VIC_BXFER_DEF_VME_CROSS)
 361                 printk("[vme boundary cross]");
 362
 363 }
 364
 365 static void __init vic_init(void)
 366 {
 367          unsigned char id = vic_inb(VIC_ID);
 368          if ((id & 0xf0) != 0xf0)
 369                  panic("VIC not found");
 370          printk(" VIC068A Rev. %X: ", id & 0x0f);
 371
 372          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_II);
 373          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT1);
 374          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT2);
 375          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT3);
 376          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE,VIC_VME_INT4);
 377 /*
 378          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT5);
 379 */
 380          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT6);
 381
 382          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_VME_INT7);
 383          vic_outb(VIC_INT_IPL(3)|VIC_INT_DISABLE, VIC_DMA_INT);
 384          vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 385                   VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT1);
 386          vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 387                   VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT2);
 388          vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 389                   VIC_INT_HIGH|VIC_INT_DISABLE, VIC_LINT3);
 390          vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 391                   VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT4);
 392 /*
 393          vic_outb(VIC_INT_IPL(3)|VIC_INT_NOAUTO|VIC_INT_LEVEL|
 394                   VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT5);
 395 */
 396          vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 397                   VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT6);
 398          vic_outb(VIC_INT_IPL(6)|VIC_INT_NOAUTO|VIC_INT_EDGE|
 399                   VIC_INT_LOW|VIC_INT_DISABLE, VIC_LINT7);
 400
 401          vic_outb(VIC_INT_IPL(3)|
 402                   VIC_INT_SWITCH(0)|
 403                   VIC_INT_SWITCH(1)|
 404                   VIC_INT_SWITCH(2)|
 405                   VIC_INT_SWITCH(3), VIC_ICGS_INT);
 406          vic_outb(VIC_INT_IPL(3)|
 407                   VIC_INT_SWITCH(0)|
 408                   VIC_INT_SWITCH(1)|
 409                   VIC_INT_SWITCH(2)|
 410                   VIC_INT_SWITCH(3), VIC_ICMS_INT);
 411          vic_outb(VIC_INT_IPL(6)|
 412                   VIC_ERR_INT_SYSFAIL|
 413                   VIC_ERR_INT_TIMO|
 414                   VIC_ERR_INT_WRPOST|
 415                   VIC_ERR_INT_ACFAIL, VIC_ERR_INT);
 416          vic_outb(VIC_ICxS_BASE_ID(0xf), VIC_ICGS_BASE);
 417          vic_outb(VIC_ICxS_BASE_ID(0xe), VIC_ICMS_BASE);
 418          vic_outb(VIC_LOCAL_BASE_ID(0x6), VIC_LOCAL_BASE);
 419          vic_outb(VIC_ERR_BASE_ID(0x3), VIC_ERR_BASE);
 420          vic_outb(VIC_XFER_TIMO_VME_PERIOD_32|
 421                   VIC_XFER_TIMO_LOCAL_PERIOD_32, VIC_XFER_TIMO);
 422          vic_outb(VIC_LOCAL_TIM_PAS_ASSERT(2)|
 423                   VIC_LOCAT_TIM_DS_DEASSERT(1)|
 424                   VIC_LOCAL_TIM_PAS_DEASSERT(1), VIC_LOCAL_TIM);
 425          vic_outb(VIC_BXFER_DEF_VME_CROSS|
 426                   VIC_BXFER_DEF_LOCAL_CROSS|
 427                   VIC_BXFER_DEF_AMSR|
 428                   VIC_BXFER_DEF_DUAL, VIC_BXFER_DEF);
 429          vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
 430                   VIC_SSxCR0_A32|VIC_SSxCR0_D32|
 431                   VIC_SS0CR0_TIMER_FREQ_NONE, VIC_SS0CR0);
 432          vic_outb(VIC_SSxCR1_TF1(0xf)|
 433                   VIC_SSxCR1_TF2(0xf), VIC_SS0CR1);
 434          vic_outb(VIC_SSxCR0_LOCAL_XFER_SINGLE|
 435                   VIC_SSxCR0_A24|VIC_SSxCR0_D32, VIC_SS1CR0);
 436          vic_outb(VIC_SSxCR1_TF1(0xf)|
 437                   VIC_SSxCR1_TF2(0xf), VIC_SS1CR1);
 438          vic_outb(VIC_IFACE_CFG_NOHALT|
 439                   VIC_IFACE_CFG_NOTURBO, VIC_IFACE_CFG);
 440          vic_outb(VIC_AMS_CODE(0), VIC_AMS);
 441          vic_outb(VIC_BXFER_CTRL_INTERLEAVE(0), VIC_BXFER_CTRL);
 442          vic_outb(0, VIC_BXFER_LEN_LO);
 443          vic_outb(0, VIC_BXFER_LEN_HI);
 444          vic_outb(VIC_REQ_CFG_FAIRNESS_DISABLED|
 445                   VIC_REQ_CFG_LEVEL(3)|
 446                   VIC_REQ_CFG_RR_ARBITRATION, VIC_REQ_CFG);
 447          vic_outb(VIC_RELEASE_BLKXFER_BLEN(0)|
 448                   VIC_RELEASE_RWD, VIC_RELEASE);
 449          vic_outb(VIC_IC6_RUN, VIC_IC6);
 450          vic_outb(0, VIC_IC7);
 451
 452          vic_show();
 453 }
 454
 455 static void vic_start(void)
 456 {
 457         vic_outb(VIC_INT_IPL(3)|
 458                  VIC_INT_NOAUTO|
 459                  VIC_INT_EDGE|
 460                  VIC_INT_HIGH|
 461                  VIC_INT_ENABLE, VIC_LINT7);
 462 }
 463
 464 void __init baget_irq_setup(void)
 465 {
 466         extern void bagetIRQ(void);
 467
 468         /* Now, it's safe to set the exception vector. */
 469         set_except_vector(0, bagetIRQ);
 470 }
 471
 472 extern void baget_machine_restart(char *command);
 473 extern void baget_machine_halt(void);
 474 extern void baget_machine_power_off(void);
 475
 476 void __init baget_setup(void)
 477 {
 478         printk("BT23/63-201n found.\n");
 479         *BAGET_WRERR_ACK = 0;
 480         irq_setup = baget_irq_setup;
 481
 482         _machine_restart   = baget_machine_restart;
 483         _machine_halt      = baget_machine_halt;
 484         _machine_power_off = baget_machine_power_off;
 485
 486         vac_init();
 487         vic_init();
 488         vac_start();
 489         vic_start();
 490 }