2 * pci.c - Low-Level PCI Access in IA-64
4 * Derived from bios32.c of i386 tree.
6 #include <linux/config.h>
8 #include <linux/types.h>
9 #include <linux/kernel.h>
10 #include <linux/pci.h>
11 #include <linux/init.h>
12 #include <linux/ioport.h>
13 #include <linux/malloc.h>
14 #include <linux/smp_lock.h>
15 #include <linux/spinlock.h>
17 #include <asm/machvec.h>
19 #include <asm/segment.h>
20 #include <asm/system.h>
36 #define DBG(x...) printk(x)
42 * This interrupt-safe spinlock protects all accesses to PCI
43 * configuration space.
45 spinlock_t pci_lock = SPIN_LOCK_UNLOCKED;
47 struct pci_fixup pcibios_fixups[] = {
51 /* Macro to build a PCI configuration address to be passed as a parameter to SAL. */
53 #define PCI_CONFIG_ADDRESS(dev, where) \
54 (((u64) dev->bus->number << 16) | ((u64) (dev->devfn & 0xff) << 8) | (where & 0xff))
57 pci_conf_read_config_byte(struct pci_dev *dev, int where, u8 *value)
62 status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 1, &lval);
68 pci_conf_read_config_word(struct pci_dev *dev, int where, u16 *value)
73 status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 2, &lval);
79 pci_conf_read_config_dword(struct pci_dev *dev, int where, u32 *value)
84 status = ia64_sal_pci_config_read(PCI_CONFIG_ADDRESS(dev, where), 4, &lval);
90 pci_conf_write_config_byte (struct pci_dev *dev, int where, u8 value)
92 return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 1, value);
96 pci_conf_write_config_word (struct pci_dev *dev, int where, u16 value)
98 return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 2, value);
102 pci_conf_write_config_dword (struct pci_dev *dev, int where, u32 value)
104 return ia64_sal_pci_config_write(PCI_CONFIG_ADDRESS(dev, where), 4, value);
107 struct pci_ops pci_conf = {
108 pci_conf_read_config_byte,
109 pci_conf_read_config_word,
110 pci_conf_read_config_dword,
111 pci_conf_write_config_byte,
112 pci_conf_write_config_word,
113 pci_conf_write_config_dword
117 * Initialization. Uses the SAL interface
122 # define PCI_BUSES_TO_SCAN 255
125 platform_pci_fixup(0); /* phase 0 initialization (before PCI bus has been scanned) */
127 printk("PCI: Probing PCI hardware\n");
128 for (i = 0; i < PCI_BUSES_TO_SCAN; i++)
129 pci_scan_bus(i, &pci_conf, NULL);
131 platform_pci_fixup(1); /* phase 1 initialization (after PCI bus has been scanned) */
136 * Called after each bus is probed, but before its children
140 pcibios_fixup_bus (struct pci_bus *b)
146 pcibios_update_resource (struct pci_dev *dev, struct resource *root,
147 struct resource *res, int resource)
149 unsigned long where, size;
152 where = PCI_BASE_ADDRESS_0 + (resource * 4);
153 size = res->end - res->start;
154 pci_read_config_dword(dev, where, ®);
155 reg = (reg & size) | (((u32)(res->start - root->start)) & ~size);
156 pci_write_config_dword(dev, where, reg);
158 /* ??? FIXME -- record old value for shutdown. */
162 pcibios_update_irq (struct pci_dev *dev, int irq)
164 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
166 /* ??? FIXME -- record old value for shutdown. */
170 pcibios_fixup_pbus_ranges (struct pci_bus * bus, struct pbus_set_ranges_data * ranges)
172 ranges->io_start -= bus->resource[0]->start;
173 ranges->io_end -= bus->resource[0]->start;
174 ranges->mem_start -= bus->resource[1]->start;
175 ranges->mem_end -= bus->resource[1]->start;
179 pcibios_enable_device (struct pci_dev *dev)
181 /* Not needed, since we enable all devices at startup. */
186 pcibios_align_resource (void *data, struct resource *res, unsigned long size)
191 * PCI BIOS setup, always defaults to SAL interface
194 pcibios_setup (char *str)