arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 #define KVM_NR_SHARED_MSRS 16
 101
 102 struct kvm_shared_msrs_global {
 103         int nr;
 104         u32 msrs[KVM_NR_SHARED_MSRS];
 105 };
 106
 107 struct kvm_shared_msrs {
 108         struct user_return_notifier urn;
 109         bool registered;
 110         struct kvm_shared_msr_values {
 111                 u64 host;
 112                 u64 curr;
 113         } values[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 117 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 118
 119 struct kvm_stats_debugfs_item debugfs_entries[] = {
 120         { "pf_fixed", VCPU_STAT(pf_fixed) },
 121         { "pf_guest", VCPU_STAT(pf_guest) },
 122         { "tlb_flush", VCPU_STAT(tlb_flush) },
 123         { "invlpg", VCPU_STAT(invlpg) },
 124         { "exits", VCPU_STAT(exits) },
 125         { "io_exits", VCPU_STAT(io_exits) },
 126         { "mmio_exits", VCPU_STAT(mmio_exits) },
 127         { "signal_exits", VCPU_STAT(signal_exits) },
 128         { "irq_window", VCPU_STAT(irq_window_exits) },
 129         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 130         { "halt_exits", VCPU_STAT(halt_exits) },
 131         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 132         { "hypercalls", VCPU_STAT(hypercalls) },
 133         { "request_irq", VCPU_STAT(request_irq_exits) },
 134         { "irq_exits", VCPU_STAT(irq_exits) },
 135         { "host_state_reload", VCPU_STAT(host_state_reload) },
 136         { "efer_reload", VCPU_STAT(efer_reload) },
 137         { "fpu_reload", VCPU_STAT(fpu_reload) },
 138         { "insn_emulation", VCPU_STAT(insn_emulation) },
 139         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 140         { "irq_injections", VCPU_STAT(irq_injections) },
 141         { "nmi_injections", VCPU_STAT(nmi_injections) },
 142         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 143         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 144         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 145         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 146         { "mmu_flooded", VM_STAT(mmu_flooded) },
 147         { "mmu_recycled", VM_STAT(mmu_recycled) },
 148         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 149         { "mmu_unsync", VM_STAT(mmu_unsync) },
 150         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 151         { "largepages", VM_STAT(lpages) },
 152         { NULL }
 153 };
 154
 155 u64 __read_mostly host_xcr0;
 156
 157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         atomic_inc(&vcpu->arch.nmi_queued);
 365         kvm_make_request(KVM_REQ_NMI, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 583 }
 584
 585 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 586 {
 587         struct kvm_cpuid_entry2 *best;
 588
 589         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 590         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 591 }
 592
 593 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 594 {
 595         struct kvm_cpuid_entry2 *best;
 596
 597         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 598         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 599 }
 600
 601 static void update_cpuid(struct kvm_vcpu *vcpu)
 602 {
 603         struct kvm_cpuid_entry2 *best;
 604         struct kvm_lapic *apic = vcpu->arch.apic;
 605
 606         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 607         if (!best)
 608                 return;
 609
 610         /* Update OSXSAVE bit */
 611         if (cpu_has_xsave && best->function == 0x1) {
 612                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 613                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 614                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 615         }
 616
 617         if (apic) {
 618                 if (best->ecx & bit(X86_FEATURE_TSC_DEADLINE_TIMER))
 619                         apic->lapic_timer.timer_mode_mask = 3 << 17;
 620                 else
 621                         apic->lapic_timer.timer_mode_mask = 1 << 17;
 622         }
 623 }
 624
 625 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 626 {
 627         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 628         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 629                                    X86_CR4_PAE | X86_CR4_SMEP;
 630         if (cr4 & CR4_RESERVED_BITS)
 631                 return 1;
 632
 633         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 634                 return 1;
 635
 636         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 637                 return 1;
 638
 639         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 640                 return 1;
 641
 642         if (is_long_mode(vcpu)) {
 643                 if (!(cr4 & X86_CR4_PAE))
 644                         return 1;
 645         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 646                    && ((cr4 ^ old_cr4) & pdptr_bits)
 647                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 648                                    kvm_read_cr3(vcpu)))
 649                 return 1;
 650
 651         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 652                 return 1;
 653
 654         if ((cr4 ^ old_cr4) & pdptr_bits)
 655                 kvm_mmu_reset_context(vcpu);
 656
 657         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 658                 update_cpuid(vcpu);
 659
 660         return 0;
 661 }
 662 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 663
 664 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 665 {
 666         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 667                 kvm_mmu_sync_roots(vcpu);
 668                 kvm_mmu_flush_tlb(vcpu);
 669                 return 0;
 670         }
 671
 672         if (is_long_mode(vcpu)) {
 673                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 674                         return 1;
 675         } else {
 676                 if (is_pae(vcpu)) {
 677                         if (cr3 & CR3_PAE_RESERVED_BITS)
 678                                 return 1;
 679                         if (is_paging(vcpu) &&
 680                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 681                                 return 1;
 682                 }
 683                 /*
 684                  * We don't check reserved bits in nonpae mode, because
 685                  * this isn't enforced, and VMware depends on this.
 686                  */
 687         }
 688
 689         /*
 690          * Does the new cr3 value map to physical memory? (Note, we
 691          * catch an invalid cr3 even in real-mode, because it would
 692          * cause trouble later on when we turn on paging anyway.)
 693          *
 694          * A real CPU would silently accept an invalid cr3 and would
 695          * attempt to use it - with largely undefined (and often hard
 696          * to debug) behavior on the guest side.
 697          */
 698         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 699                 return 1;
 700         vcpu->arch.cr3 = cr3;
 701         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 702         vcpu->arch.mmu.new_cr3(vcpu);
 703         return 0;
 704 }
 705 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 706
 707 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 708 {
 709         if (cr8 & CR8_RESERVED_BITS)
 710                 return 1;
 711         if (irqchip_in_kernel(vcpu->kvm))
 712                 kvm_lapic_set_tpr(vcpu, cr8);
 713         else
 714                 vcpu->arch.cr8 = cr8;
 715         return 0;
 716 }
 717 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 718
 719 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 720 {
 721         if (irqchip_in_kernel(vcpu->kvm))
 722                 return kvm_lapic_get_cr8(vcpu);
 723         else
 724                 return vcpu->arch.cr8;
 725 }
 726 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 727
 728 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 729 {
 730         switch (dr) {
 731         case 0 ... 3:
 732                 vcpu->arch.db[dr] = val;
 733                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 734                         vcpu->arch.eff_db[dr] = val;
 735                 break;
 736         case 4:
 737                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 738                         return 1; /* #UD */
 739                 /* fall through */
 740         case 6:
 741                 if (val & 0xffffffff00000000ULL)
 742                         return -1; /* #GP */
 743                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1; /* #UD */
 748                 /* fall through */
 749         default: /* 7 */
 750                 if (val & 0xffffffff00000000ULL)
 751                         return -1; /* #GP */
 752                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 753                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 754                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 755                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 756                 }
 757                 break;
 758         }
 759
 760         return 0;
 761 }
 762
 763 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 764 {
 765         int res;
 766
 767         res = __kvm_set_dr(vcpu, dr, val);
 768         if (res > 0)
 769                 kvm_queue_exception(vcpu, UD_VECTOR);
 770         else if (res < 0)
 771                 kvm_inject_gp(vcpu, 0);
 772
 773         return res;
 774 }
 775 EXPORT_SYMBOL_GPL(kvm_set_dr);
 776
 777 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 778 {
 779         switch (dr) {
 780         case 0 ... 3:
 781                 *val = vcpu->arch.db[dr];
 782                 break;
 783         case 4:
 784                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 785                         return 1;
 786                 /* fall through */
 787         case 6:
 788                 *val = vcpu->arch.dr6;
 789                 break;
 790         case 5:
 791                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 792                         return 1;
 793                 /* fall through */
 794         default: /* 7 */
 795                 *val = vcpu->arch.dr7;
 796                 break;
 797         }
 798
 799         return 0;
 800 }
 801
 802 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 803 {
 804         if (_kvm_get_dr(vcpu, dr, val)) {
 805                 kvm_queue_exception(vcpu, UD_VECTOR);
 806                 return 1;
 807         }
 808         return 0;
 809 }
 810 EXPORT_SYMBOL_GPL(kvm_get_dr);
 811
 812 /*
 813  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 814  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 815  *
 816  * This list is modified at module load time to reflect the
 817  * capabilities of the host cpu. This capabilities test skips MSRs that are
 818  * kvm-specific. Those are put in the beginning of the list.
 819  */
 820
 821 #define KVM_SAVE_MSRS_BEGIN     9
 822 static u32 msrs_to_save[] = {
 823         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 824         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 825         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 826         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 827         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 828         MSR_STAR,
 829 #ifdef CONFIG_X86_64
 830         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 831 #endif
 832         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 833 };
 834
 835 static unsigned num_msrs_to_save;
 836
 837 static u32 emulated_msrs[] = {
 838         MSR_IA32_TSCDEADLINE,
 839         MSR_IA32_MISC_ENABLE,
 840         MSR_IA32_MCG_STATUS,
 841         MSR_IA32_MCG_CTL,
 842 };
 843
 844 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 845 {
 846         u64 old_efer = vcpu->arch.efer;
 847
 848         if (efer & efer_reserved_bits)
 849                 return 1;
 850
 851         if (is_paging(vcpu)
 852             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 853                 return 1;
 854
 855         if (efer & EFER_FFXSR) {
 856                 struct kvm_cpuid_entry2 *feat;
 857
 858                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 859                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 860                         return 1;
 861         }
 862
 863         if (efer & EFER_SVME) {
 864                 struct kvm_cpuid_entry2 *feat;
 865
 866                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 867                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 868                         return 1;
 869         }
 870
 871         efer &= ~EFER_LMA;
 872         efer |= vcpu->arch.efer & EFER_LMA;
 873
 874         kvm_x86_ops->set_efer(vcpu, efer);
 875
 876         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 877
 878         /* Update reserved bits */
 879         if ((efer ^ old_efer) & EFER_NX)
 880                 kvm_mmu_reset_context(vcpu);
 881
 882         return 0;
 883 }
 884
 885 void kvm_enable_efer_bits(u64 mask)
 886 {
 887        efer_reserved_bits &= ~mask;
 888 }
 889 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 890
 891
 892 /*
 893  * Writes msr value into into the appropriate "register".
 894  * Returns 0 on success, non-0 otherwise.
 895  * Assumes vcpu_load() was already called.
 896  */
 897 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 898 {
 899         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 900 }
 901
 902 /*
 903  * Adapt set_msr() to msr_io()'s calling convention
 904  */
 905 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 906 {
 907         return kvm_set_msr(vcpu, index, *data);
 908 }
 909
 910 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 911 {
 912         int version;
 913         int r;
 914         struct pvclock_wall_clock wc;
 915         struct timespec boot;
 916
 917         if (!wall_clock)
 918                 return;
 919
 920         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 921         if (r)
 922                 return;
 923
 924         if (version & 1)
 925                 ++version;  /* first time write, random junk */
 926
 927         ++version;
 928
 929         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 930
 931         /*
 932          * The guest calculates current wall clock time by adding
 933          * system time (updated by kvm_guest_time_update below) to the
 934          * wall clock specified here.  guest system time equals host
 935          * system time for us, thus we must fill in host boot time here.
 936          */
 937         getboottime(&boot);
 938
 939         wc.sec = boot.tv_sec;
 940         wc.nsec = boot.tv_nsec;
 941         wc.version = version;
 942
 943         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 944
 945         version++;
 946         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 947 }
 948
 949 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 950 {
 951         uint32_t quotient, remainder;
 952
 953         /* Don't try to replace with do_div(), this one calculates
 954          * "(dividend << 32) / divisor" */
 955         __asm__ ( "divl %4"
 956                   : "=a" (quotient), "=d" (remainder)
 957                   : "0" (0), "1" (dividend), "r" (divisor) );
 958         return quotient;
 959 }
 960
 961 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 962                                s8 *pshift, u32 *pmultiplier)
 963 {
 964         uint64_t scaled64;
 965         int32_t  shift = 0;
 966         uint64_t tps64;
 967         uint32_t tps32;
 968
 969         tps64 = base_khz * 1000LL;
 970         scaled64 = scaled_khz * 1000LL;
 971         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 972                 tps64 >>= 1;
 973                 shift--;
 974         }
 975
 976         tps32 = (uint32_t)tps64;
 977         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 978                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 979                         scaled64 >>= 1;
 980                 else
 981                         tps32 <<= 1;
 982                 shift++;
 983         }
 984
 985         *pshift = shift;
 986         *pmultiplier = div_frac(scaled64, tps32);
 987
 988         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 989                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 990 }
 991
 992 static inline u64 get_kernel_ns(void)
 993 {
 994         struct timespec ts;
 995
 996         WARN_ON(preemptible());
 997         ktime_get_ts(&ts);
 998         monotonic_to_bootbased(&ts);
 999         return timespec_to_ns(&ts);
1000 }
1001
1002 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1003 unsigned long max_tsc_khz;
1004
1005 static inline int kvm_tsc_changes_freq(void)
1006 {
1007         int cpu = get_cpu();
1008         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1009                   cpufreq_quick_get(cpu) != 0;
1010         put_cpu();
1011         return ret;
1012 }
1013
1014 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1015 {
1016         if (vcpu->arch.virtual_tsc_khz)
1017                 return vcpu->arch.virtual_tsc_khz;
1018         else
1019                 return __this_cpu_read(cpu_tsc_khz);
1020 }
1021
1022 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1023 {
1024         u64 ret;
1025
1026         WARN_ON(preemptible());
1027         if (kvm_tsc_changes_freq())
1028                 printk_once(KERN_WARNING
1029                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1030         ret = nsec * vcpu_tsc_khz(vcpu);
1031         do_div(ret, USEC_PER_SEC);
1032         return ret;
1033 }
1034
1035 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1036 {
1037         /* Compute a scale to convert nanoseconds in TSC cycles */
1038         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1039                            &vcpu->arch.tsc_catchup_shift,
1040                            &vcpu->arch.tsc_catchup_mult);
1041 }
1042
1043 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1044 {
1045         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1046                                       vcpu->arch.tsc_catchup_mult,
1047                                       vcpu->arch.tsc_catchup_shift);
1048         tsc += vcpu->arch.last_tsc_write;
1049         return tsc;
1050 }
1051
1052 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1053 {
1054         struct kvm *kvm = vcpu->kvm;
1055         u64 offset, ns, elapsed;
1056         unsigned long flags;
1057         s64 sdiff;
1058
1059         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1060         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1061         ns = get_kernel_ns();
1062         elapsed = ns - kvm->arch.last_tsc_nsec;
1063         sdiff = data - kvm->arch.last_tsc_write;
1064         if (sdiff < 0)
1065                 sdiff = -sdiff;
1066
1067         /*
1068          * Special case: close write to TSC within 5 seconds of
1069          * another CPU is interpreted as an attempt to synchronize
1070          * The 5 seconds is to accommodate host load / swapping as
1071          * well as any reset of TSC during the boot process.
1072          *
1073          * In that case, for a reliable TSC, we can match TSC offsets,
1074          * or make a best guest using elapsed value.
1075          */
1076         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1077             elapsed < 5ULL * NSEC_PER_SEC) {
1078                 if (!check_tsc_unstable()) {
1079                         offset = kvm->arch.last_tsc_offset;
1080                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1081                 } else {
1082                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1083                         offset += delta;
1084                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1085                 }
1086                 ns = kvm->arch.last_tsc_nsec;
1087         }
1088         kvm->arch.last_tsc_nsec = ns;
1089         kvm->arch.last_tsc_write = data;
1090         kvm->arch.last_tsc_offset = offset;
1091         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1092         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1093
1094         /* Reset of TSC must disable overshoot protection below */
1095         vcpu->arch.hv_clock.tsc_timestamp = 0;
1096         vcpu->arch.last_tsc_write = data;
1097         vcpu->arch.last_tsc_nsec = ns;
1098 }
1099 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1100
1101 static int kvm_guest_time_update(struct kvm_vcpu *v)
1102 {
1103         unsigned long flags;
1104         struct kvm_vcpu_arch *vcpu = &v->arch;
1105         void *shared_kaddr;
1106         unsigned long this_tsc_khz;
1107         s64 kernel_ns, max_kernel_ns;
1108         u64 tsc_timestamp;
1109
1110         /* Keep irq disabled to prevent changes to the clock */
1111         local_irq_save(flags);
1112         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1113         kernel_ns = get_kernel_ns();
1114         this_tsc_khz = vcpu_tsc_khz(v);
1115         if (unlikely(this_tsc_khz == 0)) {
1116                 local_irq_restore(flags);
1117                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1118                 return 1;
1119         }
1120
1121         /*
1122          * We may have to catch up the TSC to match elapsed wall clock
1123          * time for two reasons, even if kvmclock is used.
1124          *   1) CPU could have been running below the maximum TSC rate
1125          *   2) Broken TSC compensation resets the base at each VCPU
1126          *      entry to avoid unknown leaps of TSC even when running
1127          *      again on the same CPU.  This may cause apparent elapsed
1128          *      time to disappear, and the guest to stand still or run
1129          *      very slowly.
1130          */
1131         if (vcpu->tsc_catchup) {
1132                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1133                 if (tsc > tsc_timestamp) {
1134                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1135                         tsc_timestamp = tsc;
1136                 }
1137         }
1138
1139         local_irq_restore(flags);
1140
1141         if (!vcpu->time_page)
1142                 return 0;
1143
1144         /*
1145          * Time as measured by the TSC may go backwards when resetting the base
1146          * tsc_timestamp.  The reason for this is that the TSC resolution is
1147          * higher than the resolution of the other clock scales.  Thus, many
1148          * possible measurments of the TSC correspond to one measurement of any
1149          * other clock, and so a spread of values is possible.  This is not a
1150          * problem for the computation of the nanosecond clock; with TSC rates
1151          * around 1GHZ, there can only be a few cycles which correspond to one
1152          * nanosecond value, and any path through this code will inevitably
1153          * take longer than that.  However, with the kernel_ns value itself,
1154          * the precision may be much lower, down to HZ granularity.  If the
1155          * first sampling of TSC against kernel_ns ends in the low part of the
1156          * range, and the second in the high end of the range, we can get:
1157          *
1158          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1159          *
1160          * As the sampling errors potentially range in the thousands of cycles,
1161          * it is possible such a time value has already been observed by the
1162          * guest.  To protect against this, we must compute the system time as
1163          * observed by the guest and ensure the new system time is greater.
1164          */
1165         max_kernel_ns = 0;
1166         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1167                 max_kernel_ns = vcpu->last_guest_tsc -
1168                                 vcpu->hv_clock.tsc_timestamp;
1169                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1170                                     vcpu->hv_clock.tsc_to_system_mul,
1171                                     vcpu->hv_clock.tsc_shift);
1172                 max_kernel_ns += vcpu->last_kernel_ns;
1173         }
1174
1175         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1176                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1177                                    &vcpu->hv_clock.tsc_shift,
1178                                    &vcpu->hv_clock.tsc_to_system_mul);
1179                 vcpu->hw_tsc_khz = this_tsc_khz;
1180         }
1181
1182         if (max_kernel_ns > kernel_ns)
1183                 kernel_ns = max_kernel_ns;
1184
1185         /* With all the info we got, fill in the values */
1186         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1187         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1188         vcpu->last_kernel_ns = kernel_ns;
1189         vcpu->last_guest_tsc = tsc_timestamp;
1190         vcpu->hv_clock.flags = 0;
1191
1192         /*
1193          * The interface expects us to write an even number signaling that the
1194          * update is finished. Since the guest won't see the intermediate
1195          * state, we just increase by 2 at the end.
1196          */
1197         vcpu->hv_clock.version += 2;
1198
1199         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1200
1201         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1202                sizeof(vcpu->hv_clock));
1203
1204         kunmap_atomic(shared_kaddr, KM_USER0);
1205
1206         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1207         return 0;
1208 }
1209
1210 static bool msr_mtrr_valid(unsigned msr)
1211 {
1212         switch (msr) {
1213         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1214         case MSR_MTRRfix64K_00000:
1215         case MSR_MTRRfix16K_80000:
1216         case MSR_MTRRfix16K_A0000:
1217         case MSR_MTRRfix4K_C0000:
1218         case MSR_MTRRfix4K_C8000:
1219         case MSR_MTRRfix4K_D0000:
1220         case MSR_MTRRfix4K_D8000:
1221         case MSR_MTRRfix4K_E0000:
1222         case MSR_MTRRfix4K_E8000:
1223         case MSR_MTRRfix4K_F0000:
1224         case MSR_MTRRfix4K_F8000:
1225         case MSR_MTRRdefType:
1226         case MSR_IA32_CR_PAT:
1227                 return true;
1228         case 0x2f8:
1229                 return true;
1230         }
1231         return false;
1232 }
1233
1234 static bool valid_pat_type(unsigned t)
1235 {
1236         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1237 }
1238
1239 static bool valid_mtrr_type(unsigned t)
1240 {
1241         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1242 }
1243
1244 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1245 {
1246         int i;
1247
1248         if (!msr_mtrr_valid(msr))
1249                 return false;
1250
1251         if (msr == MSR_IA32_CR_PAT) {
1252                 for (i = 0; i < 8; i++)
1253                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1254                                 return false;
1255                 return true;
1256         } else if (msr == MSR_MTRRdefType) {
1257                 if (data & ~0xcff)
1258                         return false;
1259                 return valid_mtrr_type(data & 0xff);
1260         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1261                 for (i = 0; i < 8 ; i++)
1262                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1263                                 return false;
1264                 return true;
1265         }
1266
1267         /* variable MTRRs */
1268         return valid_mtrr_type(data & 0xff);
1269 }
1270
1271 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1272 {
1273         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1274
1275         if (!mtrr_valid(vcpu, msr, data))
1276                 return 1;
1277
1278         if (msr == MSR_MTRRdefType) {
1279                 vcpu->arch.mtrr_state.def_type = data;
1280                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1281         } else if (msr == MSR_MTRRfix64K_00000)
1282                 p[0] = data;
1283         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1284                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1285         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1286                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1287         else if (msr == MSR_IA32_CR_PAT)
1288                 vcpu->arch.pat = data;
1289         else {  /* Variable MTRRs */
1290                 int idx, is_mtrr_mask;
1291                 u64 *pt;
1292
1293                 idx = (msr - 0x200) / 2;
1294                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1295                 if (!is_mtrr_mask)
1296                         pt =
1297                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1298                 else
1299                         pt =
1300                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1301                 *pt = data;
1302         }
1303
1304         kvm_mmu_reset_context(vcpu);
1305         return 0;
1306 }
1307
1308 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1309 {
1310         u64 mcg_cap = vcpu->arch.mcg_cap;
1311         unsigned bank_num = mcg_cap & 0xff;
1312
1313         switch (msr) {
1314         case MSR_IA32_MCG_STATUS:
1315                 vcpu->arch.mcg_status = data;
1316                 break;
1317         case MSR_IA32_MCG_CTL:
1318                 if (!(mcg_cap & MCG_CTL_P))
1319                         return 1;
1320                 if (data != 0 && data != ~(u64)0)
1321                         return -1;
1322                 vcpu->arch.mcg_ctl = data;
1323                 break;
1324         default:
1325                 if (msr >= MSR_IA32_MC0_CTL &&
1326                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1327                         u32 offset = msr - MSR_IA32_MC0_CTL;
1328                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1329                          * some Linux kernels though clear bit 10 in bank 4 to
1330                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1331                          * this to avoid an uncatched #GP in the guest
1332                          */
1333                         if ((offset & 0x3) == 0 &&
1334                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1335                                 return -1;
1336                         vcpu->arch.mce_banks[offset] = data;
1337                         break;
1338                 }
1339                 return 1;
1340         }
1341         return 0;
1342 }
1343
1344 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1345 {
1346         struct kvm *kvm = vcpu->kvm;
1347         int lm = is_long_mode(vcpu);
1348         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1349                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1350         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1351                 : kvm->arch.xen_hvm_config.blob_size_32;
1352         u32 page_num = data & ~PAGE_MASK;
1353         u64 page_addr = data & PAGE_MASK;
1354         u8 *page;
1355         int r;
1356
1357         r = -E2BIG;
1358         if (page_num >= blob_size)
1359                 goto out;
1360         r = -ENOMEM;
1361         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1362         if (!page)
1363                 goto out;
1364         r = -EFAULT;
1365         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1366                 goto out_free;
1367         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1368                 goto out_free;
1369         r = 0;
1370 out_free:
1371         kfree(page);
1372 out:
1373         return r;
1374 }
1375
1376 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1377 {
1378         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1379 }
1380
1381 static bool kvm_hv_msr_partition_wide(u32 msr)
1382 {
1383         bool r = false;
1384         switch (msr) {
1385         case HV_X64_MSR_GUEST_OS_ID:
1386         case HV_X64_MSR_HYPERCALL:
1387                 r = true;
1388                 break;
1389         }
1390
1391         return r;
1392 }
1393
1394 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1395 {
1396         struct kvm *kvm = vcpu->kvm;
1397
1398         switch (msr) {
1399         case HV_X64_MSR_GUEST_OS_ID:
1400                 kvm->arch.hv_guest_os_id = data;
1401                 /* setting guest os id to zero disables hypercall page */
1402                 if (!kvm->arch.hv_guest_os_id)
1403                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1404                 break;
1405         case HV_X64_MSR_HYPERCALL: {
1406                 u64 gfn;
1407                 unsigned long addr;
1408                 u8 instructions[4];
1409
1410                 /* if guest os id is not set hypercall should remain disabled */
1411                 if (!kvm->arch.hv_guest_os_id)
1412                         break;
1413                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1414                         kvm->arch.hv_hypercall = data;
1415                         break;
1416                 }
1417                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1418                 addr = gfn_to_hva(kvm, gfn);
1419                 if (kvm_is_error_hva(addr))
1420                         return 1;
1421                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1422                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1423                 if (__copy_to_user((void __user *)addr, instructions, 4))
1424                         return 1;
1425                 kvm->arch.hv_hypercall = data;
1426                 break;
1427         }
1428         default:
1429                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1430                           "data 0x%llx\n", msr, data);
1431                 return 1;
1432         }
1433         return 0;
1434 }
1435
1436 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1437 {
1438         switch (msr) {
1439         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1440                 unsigned long addr;
1441
1442                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1443                         vcpu->arch.hv_vapic = data;
1444                         break;
1445                 }
1446                 addr = gfn_to_hva(vcpu->kvm, data >>
1447                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1448                 if (kvm_is_error_hva(addr))
1449                         return 1;
1450                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1451                         return 1;
1452                 vcpu->arch.hv_vapic = data;
1453                 break;
1454         }
1455         case HV_X64_MSR_EOI:
1456                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1457         case HV_X64_MSR_ICR:
1458                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1459         case HV_X64_MSR_TPR:
1460                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1461         default:
1462                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1463                           "data 0x%llx\n", msr, data);
1464                 return 1;
1465         }
1466
1467         return 0;
1468 }
1469
1470 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1471 {
1472         gpa_t gpa = data & ~0x3f;
1473
1474         /* Bits 2:5 are resrved, Should be zero */
1475         if (data & 0x3c)
1476                 return 1;
1477
1478         vcpu->arch.apf.msr_val = data;
1479
1480         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1481                 kvm_clear_async_pf_completion_queue(vcpu);
1482                 kvm_async_pf_hash_reset(vcpu);
1483                 return 0;
1484         }
1485
1486         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1487                 return 1;
1488
1489         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1490         kvm_async_pf_wakeup_all(vcpu);
1491         return 0;
1492 }
1493
1494 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1495 {
1496         if (vcpu->arch.time_page) {
1497                 kvm_release_page_dirty(vcpu->arch.time_page);
1498                 vcpu->arch.time_page = NULL;
1499         }
1500 }
1501
1502 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1503 {
1504         u64 delta;
1505
1506         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1507                 return;
1508
1509         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1510         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1511         vcpu->arch.st.accum_steal = delta;
1512 }
1513
1514 static void record_steal_time(struct kvm_vcpu *vcpu)
1515 {
1516         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1517                 return;
1518
1519         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1520                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1521                 return;
1522
1523         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1524         vcpu->arch.st.steal.version += 2;
1525         vcpu->arch.st.accum_steal = 0;
1526
1527         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1528                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1529 }
1530
1531 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1532 {
1533         switch (msr) {
1534         case MSR_EFER:
1535                 return set_efer(vcpu, data);
1536         case MSR_K7_HWCR:
1537                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1538                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1539                 if (data != 0) {
1540                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1541                                 data);
1542                         return 1;
1543                 }
1544                 break;
1545         case MSR_FAM10H_MMIO_CONF_BASE:
1546                 if (data != 0) {
1547                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1548                                 "0x%llx\n", data);
1549                         return 1;
1550                 }
1551                 break;
1552         case MSR_AMD64_NB_CFG:
1553                 break;
1554         case MSR_IA32_DEBUGCTLMSR:
1555                 if (!data) {
1556                         /* We support the non-activated case already */
1557                         break;
1558                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1559                         /* Values other than LBR and BTF are vendor-specific,
1560                            thus reserved and should throw a #GP */
1561                         return 1;
1562                 }
1563                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1564                         __func__, data);
1565                 break;
1566         case MSR_IA32_UCODE_REV:
1567         case MSR_IA32_UCODE_WRITE:
1568         case MSR_VM_HSAVE_PA:
1569         case MSR_AMD64_PATCH_LOADER:
1570                 break;
1571         case 0x200 ... 0x2ff:
1572                 return set_msr_mtrr(vcpu, msr, data);
1573         case MSR_IA32_APICBASE:
1574                 kvm_set_apic_base(vcpu, data);
1575                 break;
1576         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1577                 return kvm_x2apic_msr_write(vcpu, msr, data);
1578         case MSR_IA32_TSCDEADLINE:
1579                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1580                 break;
1581         case MSR_IA32_MISC_ENABLE:
1582                 vcpu->arch.ia32_misc_enable_msr = data;
1583                 break;
1584         case MSR_KVM_WALL_CLOCK_NEW:
1585         case MSR_KVM_WALL_CLOCK:
1586                 vcpu->kvm->arch.wall_clock = data;
1587                 kvm_write_wall_clock(vcpu->kvm, data);
1588                 break;
1589         case MSR_KVM_SYSTEM_TIME_NEW:
1590         case MSR_KVM_SYSTEM_TIME: {
1591                 kvmclock_reset(vcpu);
1592
1593                 vcpu->arch.time = data;
1594                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1595
1596                 /* we verify if the enable bit is set... */
1597                 if (!(data & 1))
1598                         break;
1599
1600                 /* ...but clean it before doing the actual write */
1601                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1602
1603                 vcpu->arch.time_page =
1604                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1605
1606                 if (is_error_page(vcpu->arch.time_page)) {
1607                         kvm_release_page_clean(vcpu->arch.time_page);
1608                         vcpu->arch.time_page = NULL;
1609                 }
1610                 break;
1611         }
1612         case MSR_KVM_ASYNC_PF_EN:
1613                 if (kvm_pv_enable_async_pf(vcpu, data))
1614                         return 1;
1615                 break;
1616         case MSR_KVM_STEAL_TIME:
1617
1618                 if (unlikely(!sched_info_on()))
1619                         return 1;
1620
1621                 if (data & KVM_STEAL_RESERVED_MASK)
1622                         return 1;
1623
1624                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1625                                                         data & KVM_STEAL_VALID_BITS))
1626                         return 1;
1627
1628                 vcpu->arch.st.msr_val = data;
1629
1630                 if (!(data & KVM_MSR_ENABLED))
1631                         break;
1632
1633                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1634
1635                 preempt_disable();
1636                 accumulate_steal_time(vcpu);
1637                 preempt_enable();
1638
1639                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1640
1641                 break;
1642
1643         case MSR_IA32_MCG_CTL:
1644         case MSR_IA32_MCG_STATUS:
1645         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1646                 return set_msr_mce(vcpu, msr, data);
1647
1648         /* Performance counters are not protected by a CPUID bit,
1649          * so we should check all of them in the generic path for the sake of
1650          * cross vendor migration.
1651          * Writing a zero into the event select MSRs disables them,
1652          * which we perfectly emulate ;-). Any other value should be at least
1653          * reported, some guests depend on them.
1654          */
1655         case MSR_P6_EVNTSEL0:
1656         case MSR_P6_EVNTSEL1:
1657         case MSR_K7_EVNTSEL0:
1658         case MSR_K7_EVNTSEL1:
1659         case MSR_K7_EVNTSEL2:
1660         case MSR_K7_EVNTSEL3:
1661                 if (data != 0)
1662                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1663                                 "0x%x data 0x%llx\n", msr, data);
1664                 break;
1665         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1666          * so we ignore writes to make it happy.
1667          */
1668         case MSR_P6_PERFCTR0:
1669         case MSR_P6_PERFCTR1:
1670         case MSR_K7_PERFCTR0:
1671         case MSR_K7_PERFCTR1:
1672         case MSR_K7_PERFCTR2:
1673         case MSR_K7_PERFCTR3:
1674                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1675                         "0x%x data 0x%llx\n", msr, data);
1676                 break;
1677         case MSR_K7_CLK_CTL:
1678                 /*
1679                  * Ignore all writes to this no longer documented MSR.
1680                  * Writes are only relevant for old K7 processors,
1681                  * all pre-dating SVM, but a recommended workaround from
1682                  * AMD for these chips. It is possible to speicify the
1683                  * affected processor models on the command line, hence
1684                  * the need to ignore the workaround.
1685                  */
1686                 break;
1687         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1688                 if (kvm_hv_msr_partition_wide(msr)) {
1689                         int r;
1690                         mutex_lock(&vcpu->kvm->lock);
1691                         r = set_msr_hyperv_pw(vcpu, msr, data);
1692                         mutex_unlock(&vcpu->kvm->lock);
1693                         return r;
1694                 } else
1695                         return set_msr_hyperv(vcpu, msr, data);
1696                 break;
1697         case MSR_IA32_BBL_CR_CTL3:
1698                 /* Drop writes to this legacy MSR -- see rdmsr
1699                  * counterpart for further detail.
1700                  */
1701                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1702                 break;
1703         default:
1704                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1705                         return xen_hvm_config(vcpu, data);
1706                 if (!ignore_msrs) {
1707                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1708                                 msr, data);
1709                         return 1;
1710                 } else {
1711                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1712                                 msr, data);
1713                         break;
1714                 }
1715         }
1716         return 0;
1717 }
1718 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1719
1720
1721 /*
1722  * Reads an msr value (of 'msr_index') into 'pdata'.
1723  * Returns 0 on success, non-0 otherwise.
1724  * Assumes vcpu_load() was already called.
1725  */
1726 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1727 {
1728         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1729 }
1730
1731 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1732 {
1733         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1734
1735         if (!msr_mtrr_valid(msr))
1736                 return 1;
1737
1738         if (msr == MSR_MTRRdefType)
1739                 *pdata = vcpu->arch.mtrr_state.def_type +
1740                          (vcpu->arch.mtrr_state.enabled << 10);
1741         else if (msr == MSR_MTRRfix64K_00000)
1742                 *pdata = p[0];
1743         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1744                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1745         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1746                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1747         else if (msr == MSR_IA32_CR_PAT)
1748                 *pdata = vcpu->arch.pat;
1749         else {  /* Variable MTRRs */
1750                 int idx, is_mtrr_mask;
1751                 u64 *pt;
1752
1753                 idx = (msr - 0x200) / 2;
1754                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1755                 if (!is_mtrr_mask)
1756                         pt =
1757                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1758                 else
1759                         pt =
1760                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1761                 *pdata = *pt;
1762         }
1763
1764         return 0;
1765 }
1766
1767 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1768 {
1769         u64 data;
1770         u64 mcg_cap = vcpu->arch.mcg_cap;
1771         unsigned bank_num = mcg_cap & 0xff;
1772
1773         switch (msr) {
1774         case MSR_IA32_P5_MC_ADDR:
1775         case MSR_IA32_P5_MC_TYPE:
1776                 data = 0;
1777                 break;
1778         case MSR_IA32_MCG_CAP:
1779                 data = vcpu->arch.mcg_cap;
1780                 break;
1781         case MSR_IA32_MCG_CTL:
1782                 if (!(mcg_cap & MCG_CTL_P))
1783                         return 1;
1784                 data = vcpu->arch.mcg_ctl;
1785                 break;
1786         case MSR_IA32_MCG_STATUS:
1787                 data = vcpu->arch.mcg_status;
1788                 break;
1789         default:
1790                 if (msr >= MSR_IA32_MC0_CTL &&
1791                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1792                         u32 offset = msr - MSR_IA32_MC0_CTL;
1793                         data = vcpu->arch.mce_banks[offset];
1794                         break;
1795                 }
1796                 return 1;
1797         }
1798         *pdata = data;
1799         return 0;
1800 }
1801
1802 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1803 {
1804         u64 data = 0;
1805         struct kvm *kvm = vcpu->kvm;
1806
1807         switch (msr) {
1808         case HV_X64_MSR_GUEST_OS_ID:
1809                 data = kvm->arch.hv_guest_os_id;
1810                 break;
1811         case HV_X64_MSR_HYPERCALL:
1812                 data = kvm->arch.hv_hypercall;
1813                 break;
1814         default:
1815                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1816                 return 1;
1817         }
1818
1819         *pdata = data;
1820         return 0;
1821 }
1822
1823 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1824 {
1825         u64 data = 0;
1826
1827         switch (msr) {
1828         case HV_X64_MSR_VP_INDEX: {
1829                 int r;
1830                 struct kvm_vcpu *v;
1831                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1832                         if (v == vcpu)
1833                                 data = r;
1834                 break;
1835         }
1836         case HV_X64_MSR_EOI:
1837                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1838         case HV_X64_MSR_ICR:
1839                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1840         case HV_X64_MSR_TPR:
1841                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1842         case HV_X64_MSR_APIC_ASSIST_PAGE:
1843                 data = vcpu->arch.hv_vapic;
1844                 break;
1845         default:
1846                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1847                 return 1;
1848         }
1849         *pdata = data;
1850         return 0;
1851 }
1852
1853 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1854 {
1855         u64 data;
1856
1857         switch (msr) {
1858         case MSR_IA32_PLATFORM_ID:
1859         case MSR_IA32_EBL_CR_POWERON:
1860         case MSR_IA32_DEBUGCTLMSR:
1861         case MSR_IA32_LASTBRANCHFROMIP:
1862         case MSR_IA32_LASTBRANCHTOIP:
1863         case MSR_IA32_LASTINTFROMIP:
1864         case MSR_IA32_LASTINTTOIP:
1865         case MSR_K8_SYSCFG:
1866         case MSR_K7_HWCR:
1867         case MSR_VM_HSAVE_PA:
1868         case MSR_P6_PERFCTR0:
1869         case MSR_P6_PERFCTR1:
1870         case MSR_P6_EVNTSEL0:
1871         case MSR_P6_EVNTSEL1:
1872         case MSR_K7_EVNTSEL0:
1873         case MSR_K7_PERFCTR0:
1874         case MSR_K8_INT_PENDING_MSG:
1875         case MSR_AMD64_NB_CFG:
1876         case MSR_FAM10H_MMIO_CONF_BASE:
1877                 data = 0;
1878                 break;
1879         case MSR_IA32_UCODE_REV:
1880                 data = 0x100000000ULL;
1881                 break;
1882         case MSR_MTRRcap:
1883                 data = 0x500 | KVM_NR_VAR_MTRR;
1884                 break;
1885         case 0x200 ... 0x2ff:
1886                 return get_msr_mtrr(vcpu, msr, pdata);
1887         case 0xcd: /* fsb frequency */
1888                 data = 3;
1889                 break;
1890                 /*
1891                  * MSR_EBC_FREQUENCY_ID
1892                  * Conservative value valid for even the basic CPU models.
1893                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1894                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1895                  * and 266MHz for model 3, or 4. Set Core Clock
1896                  * Frequency to System Bus Frequency Ratio to 1 (bits
1897                  * 31:24) even though these are only valid for CPU
1898                  * models > 2, however guests may end up dividing or
1899                  * multiplying by zero otherwise.
1900                  */
1901         case MSR_EBC_FREQUENCY_ID:
1902                 data = 1 << 24;
1903                 break;
1904         case MSR_IA32_APICBASE:
1905                 data = kvm_get_apic_base(vcpu);
1906                 break;
1907         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1908                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1909                 break;
1910         case MSR_IA32_TSCDEADLINE:
1911                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1912                 break;
1913         case MSR_IA32_MISC_ENABLE:
1914                 data = vcpu->arch.ia32_misc_enable_msr;
1915                 break;
1916         case MSR_IA32_PERF_STATUS:
1917                 /* TSC increment by tick */
1918                 data = 1000ULL;
1919                 /* CPU multiplier */
1920                 data |= (((uint64_t)4ULL) << 40);
1921                 break;
1922         case MSR_EFER:
1923                 data = vcpu->arch.efer;
1924                 break;
1925         case MSR_KVM_WALL_CLOCK:
1926         case MSR_KVM_WALL_CLOCK_NEW:
1927                 data = vcpu->kvm->arch.wall_clock;
1928                 break;
1929         case MSR_KVM_SYSTEM_TIME:
1930         case MSR_KVM_SYSTEM_TIME_NEW:
1931                 data = vcpu->arch.time;
1932                 break;
1933         case MSR_KVM_ASYNC_PF_EN:
1934                 data = vcpu->arch.apf.msr_val;
1935                 break;
1936         case MSR_KVM_STEAL_TIME:
1937                 data = vcpu->arch.st.msr_val;
1938                 break;
1939         case MSR_IA32_P5_MC_ADDR:
1940         case MSR_IA32_P5_MC_TYPE:
1941         case MSR_IA32_MCG_CAP:
1942         case MSR_IA32_MCG_CTL:
1943         case MSR_IA32_MCG_STATUS:
1944         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1945                 return get_msr_mce(vcpu, msr, pdata);
1946         case MSR_K7_CLK_CTL:
1947                 /*
1948                  * Provide expected ramp-up count for K7. All other
1949                  * are set to zero, indicating minimum divisors for
1950                  * every field.
1951                  *
1952                  * This prevents guest kernels on AMD host with CPU
1953                  * type 6, model 8 and higher from exploding due to
1954                  * the rdmsr failing.
1955                  */
1956                 data = 0x20000000;
1957                 break;
1958         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1959                 if (kvm_hv_msr_partition_wide(msr)) {
1960                         int r;
1961                         mutex_lock(&vcpu->kvm->lock);
1962                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1963                         mutex_unlock(&vcpu->kvm->lock);
1964                         return r;
1965                 } else
1966                         return get_msr_hyperv(vcpu, msr, pdata);
1967                 break;
1968         case MSR_IA32_BBL_CR_CTL3:
1969                 /* This legacy MSR exists but isn't fully documented in current
1970                  * silicon.  It is however accessed by winxp in very narrow
1971                  * scenarios where it sets bit #19, itself documented as
1972                  * a "reserved" bit.  Best effort attempt to source coherent
1973                  * read data here should the balance of the register be
1974                  * interpreted by the guest:
1975                  *
1976                  * L2 cache control register 3: 64GB range, 256KB size,
1977                  * enabled, latency 0x1, configured
1978                  */
1979                 data = 0xbe702111;
1980                 break;
1981         default:
1982                 if (!ignore_msrs) {
1983                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1984                         return 1;
1985                 } else {
1986                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1987                         data = 0;
1988                 }
1989                 break;
1990         }
1991         *pdata = data;
1992         return 0;
1993 }
1994 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1995
1996 /*
1997  * Read or write a bunch of msrs. All parameters are kernel addresses.
1998  *
1999  * @return number of msrs set successfully.
2000  */
2001 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2002                     struct kvm_msr_entry *entries,
2003                     int (*do_msr)(struct kvm_vcpu *vcpu,
2004                                   unsigned index, u64 *data))
2005 {
2006         int i, idx;
2007
2008         idx = srcu_read_lock(&vcpu->kvm->srcu);
2009         for (i = 0; i < msrs->nmsrs; ++i)
2010                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2011                         break;
2012         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2013
2014         return i;
2015 }
2016
2017 /*
2018  * Read or write a bunch of msrs. Parameters are user addresses.
2019  *
2020  * @return number of msrs set successfully.
2021  */
2022 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2023                   int (*do_msr)(struct kvm_vcpu *vcpu,
2024                                 unsigned index, u64 *data),
2025                   int writeback)
2026 {
2027         struct kvm_msrs msrs;
2028         struct kvm_msr_entry *entries;
2029         int r, n;
2030         unsigned size;
2031
2032         r = -EFAULT;
2033         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2034                 goto out;
2035
2036         r = -E2BIG;
2037         if (msrs.nmsrs >= MAX_IO_MSRS)
2038                 goto out;
2039
2040         r = -ENOMEM;
2041         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2042         entries = kmalloc(size, GFP_KERNEL);
2043         if (!entries)
2044                 goto out;
2045
2046         r = -EFAULT;
2047         if (copy_from_user(entries, user_msrs->entries, size))
2048                 goto out_free;
2049
2050         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2051         if (r < 0)
2052                 goto out_free;
2053
2054         r = -EFAULT;
2055         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2056                 goto out_free;
2057
2058         r = n;
2059
2060 out_free:
2061         kfree(entries);
2062 out:
2063         return r;
2064 }
2065
2066 int kvm_dev_ioctl_check_extension(long ext)
2067 {
2068         int r;
2069
2070         switch (ext) {
2071         case KVM_CAP_IRQCHIP:
2072         case KVM_CAP_HLT:
2073         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2074         case KVM_CAP_SET_TSS_ADDR:
2075         case KVM_CAP_EXT_CPUID:
2076         case KVM_CAP_CLOCKSOURCE:
2077         case KVM_CAP_PIT:
2078         case KVM_CAP_NOP_IO_DELAY:
2079         case KVM_CAP_MP_STATE:
2080         case KVM_CAP_SYNC_MMU:
2081         case KVM_CAP_USER_NMI:
2082         case KVM_CAP_REINJECT_CONTROL:
2083         case KVM_CAP_IRQ_INJECT_STATUS:
2084         case KVM_CAP_ASSIGN_DEV_IRQ:
2085         case KVM_CAP_IRQFD:
2086         case KVM_CAP_IOEVENTFD:
2087         case KVM_CAP_PIT2:
2088         case KVM_CAP_PIT_STATE2:
2089         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2090         case KVM_CAP_XEN_HVM:
2091         case KVM_CAP_ADJUST_CLOCK:
2092         case KVM_CAP_VCPU_EVENTS:
2093         case KVM_CAP_HYPERV:
2094         case KVM_CAP_HYPERV_VAPIC:
2095         case KVM_CAP_HYPERV_SPIN:
2096         case KVM_CAP_PCI_SEGMENT:
2097         case KVM_CAP_DEBUGREGS:
2098         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2099         case KVM_CAP_XSAVE:
2100         case KVM_CAP_ASYNC_PF:
2101         case KVM_CAP_GET_TSC_KHZ:
2102                 r = 1;
2103                 break;
2104         case KVM_CAP_COALESCED_MMIO:
2105                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2106                 break;
2107         case KVM_CAP_VAPIC:
2108                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2109                 break;
2110         case KVM_CAP_NR_VCPUS:
2111                 r = KVM_SOFT_MAX_VCPUS;
2112                 break;
2113         case KVM_CAP_MAX_VCPUS:
2114                 r = KVM_MAX_VCPUS;
2115                 break;
2116         case KVM_CAP_NR_MEMSLOTS:
2117                 r = KVM_MEMORY_SLOTS;
2118                 break;
2119         case KVM_CAP_PV_MMU:    /* obsolete */
2120                 r = 0;
2121                 break;
2122         case KVM_CAP_IOMMU:
2123                 r = iommu_present(&pci_bus_type);
2124                 break;
2125         case KVM_CAP_MCE:
2126                 r = KVM_MAX_MCE_BANKS;
2127                 break;
2128         case KVM_CAP_XCRS:
2129                 r = cpu_has_xsave;
2130                 break;
2131         case KVM_CAP_TSC_CONTROL:
2132                 r = kvm_has_tsc_control;
2133                 break;
2134         case KVM_CAP_TSC_DEADLINE_TIMER:
2135                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2136                 break;
2137         default:
2138                 r = 0;
2139                 break;
2140         }
2141         return r;
2142
2143 }
2144
2145 long kvm_arch_dev_ioctl(struct file *filp,
2146                         unsigned int ioctl, unsigned long arg)
2147 {
2148         void __user *argp = (void __user *)arg;
2149         long r;
2150
2151         switch (ioctl) {
2152         case KVM_GET_MSR_INDEX_LIST: {
2153                 struct kvm_msr_list __user *user_msr_list = argp;
2154                 struct kvm_msr_list msr_list;
2155                 unsigned n;
2156
2157                 r = -EFAULT;
2158                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2159                         goto out;
2160                 n = msr_list.nmsrs;
2161                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2162                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2163                         goto out;
2164                 r = -E2BIG;
2165                 if (n < msr_list.nmsrs)
2166                         goto out;
2167                 r = -EFAULT;
2168                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2169                                  num_msrs_to_save * sizeof(u32)))
2170                         goto out;
2171                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2172                                  &emulated_msrs,
2173                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2174                         goto out;
2175                 r = 0;
2176                 break;
2177         }
2178         case KVM_GET_SUPPORTED_CPUID: {
2179                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2180                 struct kvm_cpuid2 cpuid;
2181
2182                 r = -EFAULT;
2183                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2184                         goto out;
2185                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2186                                                       cpuid_arg->entries);
2187                 if (r)
2188                         goto out;
2189
2190                 r = -EFAULT;
2191                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2192                         goto out;
2193                 r = 0;
2194                 break;
2195         }
2196         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2197                 u64 mce_cap;
2198
2199                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2200                 r = -EFAULT;
2201                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2202                         goto out;
2203                 r = 0;
2204                 break;
2205         }
2206         default:
2207                 r = -EINVAL;
2208         }
2209 out:
2210         return r;
2211 }
2212
2213 static void wbinvd_ipi(void *garbage)
2214 {
2215         wbinvd();
2216 }
2217
2218 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2219 {
2220         return vcpu->kvm->arch.iommu_domain &&
2221                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2222 }
2223
2224 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2225 {
2226         /* Address WBINVD may be executed by guest */
2227         if (need_emulate_wbinvd(vcpu)) {
2228                 if (kvm_x86_ops->has_wbinvd_exit())
2229                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2230                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2231                         smp_call_function_single(vcpu->cpu,
2232                                         wbinvd_ipi, NULL, 1);
2233         }
2234
2235         kvm_x86_ops->vcpu_load(vcpu, cpu);
2236         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2237                 /* Make sure TSC doesn't go backwards */
2238                 s64 tsc_delta;
2239                 u64 tsc;
2240
2241                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2242                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2243                              tsc - vcpu->arch.last_guest_tsc;
2244
2245                 if (tsc_delta < 0)
2246                         mark_tsc_unstable("KVM discovered backwards TSC");
2247                 if (check_tsc_unstable()) {
2248                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2249                         vcpu->arch.tsc_catchup = 1;
2250                 }
2251                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2252                 if (vcpu->cpu != cpu)
2253                         kvm_migrate_timers(vcpu);
2254                 vcpu->cpu = cpu;
2255         }
2256
2257         accumulate_steal_time(vcpu);
2258         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2259 }
2260
2261 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2262 {
2263         kvm_x86_ops->vcpu_put(vcpu);
2264         kvm_put_guest_fpu(vcpu);
2265         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2266 }
2267
2268 static int is_efer_nx(void)
2269 {
2270         unsigned long long efer = 0;
2271
2272         rdmsrl_safe(MSR_EFER, &efer);
2273         return efer & EFER_NX;
2274 }
2275
2276 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2277 {
2278         int i;
2279         struct kvm_cpuid_entry2 *e, *entry;
2280
2281         entry = NULL;
2282         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2283                 e = &vcpu->arch.cpuid_entries[i];
2284                 if (e->function == 0x80000001) {
2285                         entry = e;
2286                         break;
2287                 }
2288         }
2289         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2290                 entry->edx &= ~(1 << 20);
2291                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2292         }
2293 }
2294
2295 /* when an old userspace process fills a new kernel module */
2296 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2297                                     struct kvm_cpuid *cpuid,
2298                                     struct kvm_cpuid_entry __user *entries)
2299 {
2300         int r, i;
2301         struct kvm_cpuid_entry *cpuid_entries;
2302
2303         r = -E2BIG;
2304         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2305                 goto out;
2306         r = -ENOMEM;
2307         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2308         if (!cpuid_entries)
2309                 goto out;
2310         r = -EFAULT;
2311         if (copy_from_user(cpuid_entries, entries,
2312                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2313                 goto out_free;
2314         for (i = 0; i < cpuid->nent; i++) {
2315                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2316                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2317                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2318                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2319                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2320                 vcpu->arch.cpuid_entries[i].index = 0;
2321                 vcpu->arch.cpuid_entries[i].flags = 0;
2322                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2323                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2324                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2325         }
2326         vcpu->arch.cpuid_nent = cpuid->nent;
2327         cpuid_fix_nx_cap(vcpu);
2328         r = 0;
2329         kvm_apic_set_version(vcpu);
2330         kvm_x86_ops->cpuid_update(vcpu);
2331         update_cpuid(vcpu);
2332
2333 out_free:
2334         vfree(cpuid_entries);
2335 out:
2336         return r;
2337 }
2338
2339 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2340                                      struct kvm_cpuid2 *cpuid,
2341                                      struct kvm_cpuid_entry2 __user *entries)
2342 {
2343         int r;
2344
2345         r = -E2BIG;
2346         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2347                 goto out;
2348         r = -EFAULT;
2349         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2350                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2351                 goto out;
2352         vcpu->arch.cpuid_nent = cpuid->nent;
2353         kvm_apic_set_version(vcpu);
2354         kvm_x86_ops->cpuid_update(vcpu);
2355         update_cpuid(vcpu);
2356         return 0;
2357
2358 out:
2359         return r;
2360 }
2361
2362 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2363                                      struct kvm_cpuid2 *cpuid,
2364                                      struct kvm_cpuid_entry2 __user *entries)
2365 {
2366         int r;
2367
2368         r = -E2BIG;
2369         if (cpuid->nent < vcpu->arch.cpuid_nent)
2370                 goto out;
2371         r = -EFAULT;
2372         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2373                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2374                 goto out;
2375         return 0;
2376
2377 out:
2378         cpuid->nent = vcpu->arch.cpuid_nent;
2379         return r;
2380 }
2381
2382 static void cpuid_mask(u32 *word, int wordnum)
2383 {
2384         *word &= boot_cpu_data.x86_capability[wordnum];
2385 }
2386
2387 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2388                            u32 index)
2389 {
2390         entry->function = function;
2391         entry->index = index;
2392         cpuid_count(entry->function, entry->index,
2393                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2394         entry->flags = 0;
2395 }
2396
2397 static bool supported_xcr0_bit(unsigned bit)
2398 {
2399         u64 mask = ((u64)1 << bit);
2400
2401         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2402 }
2403
2404 #define F(x) bit(X86_FEATURE_##x)
2405
2406 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2407                          u32 index, int *nent, int maxnent)
2408 {
2409         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2410 #ifdef CONFIG_X86_64
2411         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2412                                 ? F(GBPAGES) : 0;
2413         unsigned f_lm = F(LM);
2414 #else
2415         unsigned f_gbpages = 0;
2416         unsigned f_lm = 0;
2417 #endif
2418         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2419
2420         /* cpuid 1.edx */
2421         const u32 kvm_supported_word0_x86_features =
2422                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2423                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2424                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2425                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2426                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2427                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2428                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2429                 0 /* HTT, TM, Reserved, PBE */;
2430         /* cpuid 0x80000001.edx */
2431         const u32 kvm_supported_word1_x86_features =
2432                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2433                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2434                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2435                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2436                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2437                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2438                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2439                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2440         /* cpuid 1.ecx */
2441         const u32 kvm_supported_word4_x86_features =
2442                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2443                 0 /* DS-CPL, VMX, SMX, EST */ |
2444                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2445                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2446                 0 /* Reserved, DCA */ | F(XMM4_1) |
2447                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2448                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2449                 F(F16C) | F(RDRAND);
2450         /* cpuid 0x80000001.ecx */
2451         const u32 kvm_supported_word6_x86_features =
2452                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2453                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2454                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2455                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2456
2457         /* cpuid 0xC0000001.edx */
2458         const u32 kvm_supported_word5_x86_features =
2459                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2460                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2461                 F(PMM) | F(PMM_EN);
2462
2463         /* cpuid 7.0.ebx */
2464         const u32 kvm_supported_word9_x86_features =
2465                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2466
2467         /* all calls to cpuid_count() should be made on the same cpu */
2468         get_cpu();
2469         do_cpuid_1_ent(entry, function, index);
2470         ++*nent;
2471
2472         switch (function) {
2473         case 0:
2474                 entry->eax = min(entry->eax, (u32)0xd);
2475                 break;
2476         case 1:
2477                 entry->edx &= kvm_supported_word0_x86_features;
2478                 cpuid_mask(&entry->edx, 0);
2479                 entry->ecx &= kvm_supported_word4_x86_features;
2480                 cpuid_mask(&entry->ecx, 4);
2481                 /* we support x2apic emulation even if host does not support
2482                  * it since we emulate x2apic in software */
2483                 entry->ecx |= F(X2APIC);
2484                 break;
2485         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2486          * may return different values. This forces us to get_cpu() before
2487          * issuing the first command, and also to emulate this annoying behavior
2488          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2489         case 2: {
2490                 int t, times = entry->eax & 0xff;
2491
2492                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2493                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2494                 for (t = 1; t < times && *nent < maxnent; ++t) {
2495                         do_cpuid_1_ent(&entry[t], function, 0);
2496                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2497                         ++*nent;
2498                 }
2499                 break;
2500         }
2501         /* function 4 has additional index. */
2502         case 4: {
2503                 int i, cache_type;
2504
2505                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2506                 /* read more entries until cache_type is zero */
2507                 for (i = 1; *nent < maxnent; ++i) {
2508                         cache_type = entry[i - 1].eax & 0x1f;
2509                         if (!cache_type)
2510                                 break;
2511                         do_cpuid_1_ent(&entry[i], function, i);
2512                         entry[i].flags |=
2513                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2514                         ++*nent;
2515                 }
2516                 break;
2517         }
2518         case 7: {
2519                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2520                 /* Mask ebx against host capbability word 9 */
2521                 if (index == 0) {
2522                         entry->ebx &= kvm_supported_word9_x86_features;
2523                         cpuid_mask(&entry->ebx, 9);
2524                 } else
2525                         entry->ebx = 0;
2526                 entry->eax = 0;
2527                 entry->ecx = 0;
2528                 entry->edx = 0;
2529                 break;
2530         }
2531         case 9:
2532                 break;
2533         /* function 0xb has additional index. */
2534         case 0xb: {
2535                 int i, level_type;
2536
2537                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2538                 /* read more entries until level_type is zero */
2539                 for (i = 1; *nent < maxnent; ++i) {
2540                         level_type = entry[i - 1].ecx & 0xff00;
2541                         if (!level_type)
2542                                 break;
2543                         do_cpuid_1_ent(&entry[i], function, i);
2544                         entry[i].flags |=
2545                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2546                         ++*nent;
2547                 }
2548                 break;
2549         }
2550         case 0xd: {
2551                 int idx, i;
2552
2553                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2554                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2555                         do_cpuid_1_ent(&entry[i], function, idx);
2556                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2557                                 continue;
2558                         entry[i].flags |=
2559                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2560                         ++*nent;
2561                         ++i;
2562                 }
2563                 break;
2564         }
2565         case KVM_CPUID_SIGNATURE: {
2566                 char signature[12] = "KVMKVMKVM\0\0";
2567                 u32 *sigptr = (u32 *)signature;
2568                 entry->eax = 0;
2569                 entry->ebx = sigptr[0];
2570                 entry->ecx = sigptr[1];
2571                 entry->edx = sigptr[2];
2572                 break;
2573         }
2574         case KVM_CPUID_FEATURES:
2575                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2576                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2577                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2578                              (1 << KVM_FEATURE_ASYNC_PF) |
2579                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2580
2581                 if (sched_info_on())
2582                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2583
2584                 entry->ebx = 0;
2585                 entry->ecx = 0;
2586                 entry->edx = 0;
2587                 break;
2588         case 0x80000000:
2589                 entry->eax = min(entry->eax, 0x8000001a);
2590                 break;
2591         case 0x80000001:
2592                 entry->edx &= kvm_supported_word1_x86_features;
2593                 cpuid_mask(&entry->edx, 1);
2594                 entry->ecx &= kvm_supported_word6_x86_features;
2595                 cpuid_mask(&entry->ecx, 6);
2596                 break;
2597         case 0x80000008: {
2598                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2599                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2600                 unsigned phys_as = entry->eax & 0xff;
2601
2602                 if (!g_phys_as)
2603                         g_phys_as = phys_as;
2604                 entry->eax = g_phys_as | (virt_as << 8);
2605                 entry->ebx = entry->edx = 0;
2606                 break;
2607         }
2608         case 0x80000019:
2609                 entry->ecx = entry->edx = 0;
2610                 break;
2611         case 0x8000001a:
2612                 break;
2613         case 0x8000001d:
2614                 break;
2615         /*Add support for Centaur's CPUID instruction*/
2616         case 0xC0000000:
2617                 /*Just support up to 0xC0000004 now*/
2618                 entry->eax = min(entry->eax, 0xC0000004);
2619                 break;
2620         case 0xC0000001:
2621                 entry->edx &= kvm_supported_word5_x86_features;
2622                 cpuid_mask(&entry->edx, 5);
2623                 break;
2624         case 3: /* Processor serial number */
2625         case 5: /* MONITOR/MWAIT */
2626         case 6: /* Thermal management */
2627         case 0xA: /* Architectural Performance Monitoring */
2628         case 0x80000007: /* Advanced power management */
2629         case 0xC0000002:
2630         case 0xC0000003:
2631         case 0xC0000004:
2632         default:
2633                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2634                 break;
2635         }
2636
2637         kvm_x86_ops->set_supported_cpuid(function, entry);
2638
2639         put_cpu();
2640 }
2641
2642 #undef F
2643
2644 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2645                                      struct kvm_cpuid_entry2 __user *entries)
2646 {
2647         struct kvm_cpuid_entry2 *cpuid_entries;
2648         int limit, nent = 0, r = -E2BIG;
2649         u32 func;
2650
2651         if (cpuid->nent < 1)
2652                 goto out;
2653         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2654                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2655         r = -ENOMEM;
2656         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2657         if (!cpuid_entries)
2658                 goto out;
2659
2660         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2661         limit = cpuid_entries[0].eax;
2662         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2663                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2664                              &nent, cpuid->nent);
2665         r = -E2BIG;
2666         if (nent >= cpuid->nent)
2667                 goto out_free;
2668
2669         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2670         limit = cpuid_entries[nent - 1].eax;
2671         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2672                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2673                              &nent, cpuid->nent);
2674
2675
2676
2677         r = -E2BIG;
2678         if (nent >= cpuid->nent)
2679                 goto out_free;
2680
2681         /* Add support for Centaur's CPUID instruction. */
2682         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2683                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2684                                 &nent, cpuid->nent);
2685
2686                 r = -E2BIG;
2687                 if (nent >= cpuid->nent)
2688                         goto out_free;
2689
2690                 limit = cpuid_entries[nent - 1].eax;
2691                 for (func = 0xC0000001;
2692                         func <= limit && nent < cpuid->nent; ++func)
2693                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2694                                         &nent, cpuid->nent);
2695
2696                 r = -E2BIG;
2697                 if (nent >= cpuid->nent)
2698                         goto out_free;
2699         }
2700
2701         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2702                      cpuid->nent);
2703
2704         r = -E2BIG;
2705         if (nent >= cpuid->nent)
2706                 goto out_free;
2707
2708         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2709                      cpuid->nent);
2710
2711         r = -E2BIG;
2712         if (nent >= cpuid->nent)
2713                 goto out_free;
2714
2715         r = -EFAULT;
2716         if (copy_to_user(entries, cpuid_entries,
2717                          nent * sizeof(struct kvm_cpuid_entry2)))
2718                 goto out_free;
2719         cpuid->nent = nent;
2720         r = 0;
2721
2722 out_free:
2723         vfree(cpuid_entries);
2724 out:
2725         return r;
2726 }
2727
2728 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2729                                     struct kvm_lapic_state *s)
2730 {
2731         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2732
2733         return 0;
2734 }
2735
2736 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2737                                     struct kvm_lapic_state *s)
2738 {
2739         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2740         kvm_apic_post_state_restore(vcpu);
2741         update_cr8_intercept(vcpu);
2742
2743         return 0;
2744 }
2745
2746 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2747                                     struct kvm_interrupt *irq)
2748 {
2749         if (irq->irq < 0 || irq->irq >= 256)
2750                 return -EINVAL;
2751         if (irqchip_in_kernel(vcpu->kvm))
2752                 return -ENXIO;
2753
2754         kvm_queue_interrupt(vcpu, irq->irq, false);
2755         kvm_make_request(KVM_REQ_EVENT, vcpu);
2756
2757         return 0;
2758 }
2759
2760 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2761 {
2762         kvm_inject_nmi(vcpu);
2763
2764         return 0;
2765 }
2766
2767 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2768                                            struct kvm_tpr_access_ctl *tac)
2769 {
2770         if (tac->flags)
2771                 return -EINVAL;
2772         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2773         return 0;
2774 }
2775
2776 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2777                                         u64 mcg_cap)
2778 {
2779         int r;
2780         unsigned bank_num = mcg_cap & 0xff, bank;
2781
2782         r = -EINVAL;
2783         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2784                 goto out;
2785         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2786                 goto out;
2787         r = 0;
2788         vcpu->arch.mcg_cap = mcg_cap;
2789         /* Init IA32_MCG_CTL to all 1s */
2790         if (mcg_cap & MCG_CTL_P)
2791                 vcpu->arch.mcg_ctl = ~(u64)0;
2792         /* Init IA32_MCi_CTL to all 1s */
2793         for (bank = 0; bank < bank_num; bank++)
2794                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2795 out:
2796         return r;
2797 }
2798
2799 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2800                                       struct kvm_x86_mce *mce)
2801 {
2802         u64 mcg_cap = vcpu->arch.mcg_cap;
2803         unsigned bank_num = mcg_cap & 0xff;
2804         u64 *banks = vcpu->arch.mce_banks;
2805
2806         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2807                 return -EINVAL;
2808         /*
2809          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2810          * reporting is disabled
2811          */
2812         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2813             vcpu->arch.mcg_ctl != ~(u64)0)
2814                 return 0;
2815         banks += 4 * mce->bank;
2816         /*
2817          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2818          * reporting is disabled for the bank
2819          */
2820         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2821                 return 0;
2822         if (mce->status & MCI_STATUS_UC) {
2823                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2824                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2825                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2826                         return 0;
2827                 }
2828                 if (banks[1] & MCI_STATUS_VAL)
2829                         mce->status |= MCI_STATUS_OVER;
2830                 banks[2] = mce->addr;
2831                 banks[3] = mce->misc;
2832                 vcpu->arch.mcg_status = mce->mcg_status;
2833                 banks[1] = mce->status;
2834                 kvm_queue_exception(vcpu, MC_VECTOR);
2835         } else if (!(banks[1] & MCI_STATUS_VAL)
2836                    || !(banks[1] & MCI_STATUS_UC)) {
2837                 if (banks[1] & MCI_STATUS_VAL)
2838                         mce->status |= MCI_STATUS_OVER;
2839                 banks[2] = mce->addr;
2840                 banks[3] = mce->misc;
2841                 banks[1] = mce->status;
2842         } else
2843                 banks[1] |= MCI_STATUS_OVER;
2844         return 0;
2845 }
2846
2847 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2848                                                struct kvm_vcpu_events *events)
2849 {
2850         process_nmi(vcpu);
2851         events->exception.injected =
2852                 vcpu->arch.exception.pending &&
2853                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2854         events->exception.nr = vcpu->arch.exception.nr;
2855         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2856         events->exception.pad = 0;
2857         events->exception.error_code = vcpu->arch.exception.error_code;
2858
2859         events->interrupt.injected =
2860                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2861         events->interrupt.nr = vcpu->arch.interrupt.nr;
2862         events->interrupt.soft = 0;
2863         events->interrupt.shadow =
2864                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2865                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2866
2867         events->nmi.injected = vcpu->arch.nmi_injected;
2868         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2869         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2870         events->nmi.pad = 0;
2871
2872         events->sipi_vector = vcpu->arch.sipi_vector;
2873
2874         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2875                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2876                          | KVM_VCPUEVENT_VALID_SHADOW);
2877         memset(&events->reserved, 0, sizeof(events->reserved));
2878 }
2879
2880 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2881                                               struct kvm_vcpu_events *events)
2882 {
2883         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2884                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2885                               | KVM_VCPUEVENT_VALID_SHADOW))
2886                 return -EINVAL;
2887
2888         process_nmi(vcpu);
2889         vcpu->arch.exception.pending = events->exception.injected;
2890         vcpu->arch.exception.nr = events->exception.nr;
2891         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2892         vcpu->arch.exception.error_code = events->exception.error_code;
2893
2894         vcpu->arch.interrupt.pending = events->interrupt.injected;
2895         vcpu->arch.interrupt.nr = events->interrupt.nr;
2896         vcpu->arch.interrupt.soft = events->interrupt.soft;
2897         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2898                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2899                                                   events->interrupt.shadow);
2900
2901         vcpu->arch.nmi_injected = events->nmi.injected;
2902         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2903                 vcpu->arch.nmi_pending = events->nmi.pending;
2904         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2905
2906         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2907                 vcpu->arch.sipi_vector = events->sipi_vector;
2908
2909         kvm_make_request(KVM_REQ_EVENT, vcpu);
2910
2911         return 0;
2912 }
2913
2914 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2915                                              struct kvm_debugregs *dbgregs)
2916 {
2917         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2918         dbgregs->dr6 = vcpu->arch.dr6;
2919         dbgregs->dr7 = vcpu->arch.dr7;
2920         dbgregs->flags = 0;
2921         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2922 }
2923
2924 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2925                                             struct kvm_debugregs *dbgregs)
2926 {
2927         if (dbgregs->flags)
2928                 return -EINVAL;
2929
2930         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2931         vcpu->arch.dr6 = dbgregs->dr6;
2932         vcpu->arch.dr7 = dbgregs->dr7;
2933
2934         return 0;
2935 }
2936
2937 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2938                                          struct kvm_xsave *guest_xsave)
2939 {
2940         if (cpu_has_xsave)
2941                 memcpy(guest_xsave->region,
2942                         &vcpu->arch.guest_fpu.state->xsave,
2943                         xstate_size);
2944         else {
2945                 memcpy(guest_xsave->region,
2946                         &vcpu->arch.guest_fpu.state->fxsave,
2947                         sizeof(struct i387_fxsave_struct));
2948                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2949                         XSTATE_FPSSE;
2950         }
2951 }
2952
2953 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2954                                         struct kvm_xsave *guest_xsave)
2955 {
2956         u64 xstate_bv =
2957                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2958
2959         if (cpu_has_xsave)
2960                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2961                         guest_xsave->region, xstate_size);
2962         else {
2963                 if (xstate_bv & ~XSTATE_FPSSE)
2964                         return -EINVAL;
2965                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2966                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2967         }
2968         return 0;
2969 }
2970
2971 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2972                                         struct kvm_xcrs *guest_xcrs)
2973 {
2974         if (!cpu_has_xsave) {
2975                 guest_xcrs->nr_xcrs = 0;
2976                 return;
2977         }
2978
2979         guest_xcrs->nr_xcrs = 1;
2980         guest_xcrs->flags = 0;
2981         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2982         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2983 }
2984
2985 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2986                                        struct kvm_xcrs *guest_xcrs)
2987 {
2988         int i, r = 0;
2989
2990         if (!cpu_has_xsave)
2991                 return -EINVAL;
2992
2993         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2994                 return -EINVAL;
2995
2996         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2997                 /* Only support XCR0 currently */
2998                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2999                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3000                                 guest_xcrs->xcrs[0].value);
3001                         break;
3002                 }
3003         if (r)
3004                 r = -EINVAL;
3005         return r;
3006 }
3007
3008 long kvm_arch_vcpu_ioctl(struct file *filp,
3009                          unsigned int ioctl, unsigned long arg)
3010 {
3011         struct kvm_vcpu *vcpu = filp->private_data;
3012         void __user *argp = (void __user *)arg;
3013         int r;
3014         union {
3015                 struct kvm_lapic_state *lapic;
3016                 struct kvm_xsave *xsave;
3017                 struct kvm_xcrs *xcrs;
3018                 void *buffer;
3019         } u;
3020
3021         u.buffer = NULL;
3022         switch (ioctl) {
3023         case KVM_GET_LAPIC: {
3024                 r = -EINVAL;
3025                 if (!vcpu->arch.apic)
3026                         goto out;
3027                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3028
3029                 r = -ENOMEM;
3030                 if (!u.lapic)
3031                         goto out;
3032                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3033                 if (r)
3034                         goto out;
3035                 r = -EFAULT;
3036                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3037                         goto out;
3038                 r = 0;
3039                 break;
3040         }
3041         case KVM_SET_LAPIC: {
3042                 r = -EINVAL;
3043                 if (!vcpu->arch.apic)
3044                         goto out;
3045                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3046                 r = -ENOMEM;
3047                 if (!u.lapic)
3048                         goto out;
3049                 r = -EFAULT;
3050                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3051                         goto out;
3052                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3053                 if (r)
3054                         goto out;
3055                 r = 0;
3056                 break;
3057         }
3058         case KVM_INTERRUPT: {
3059                 struct kvm_interrupt irq;
3060
3061                 r = -EFAULT;
3062                 if (copy_from_user(&irq, argp, sizeof irq))
3063                         goto out;
3064                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3065                 if (r)
3066                         goto out;
3067                 r = 0;
3068                 break;
3069         }
3070         case KVM_NMI: {
3071                 r = kvm_vcpu_ioctl_nmi(vcpu);
3072                 if (r)
3073                         goto out;
3074                 r = 0;
3075                 break;
3076         }
3077         case KVM_SET_CPUID: {
3078                 struct kvm_cpuid __user *cpuid_arg = argp;
3079                 struct kvm_cpuid cpuid;
3080
3081                 r = -EFAULT;
3082                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3083                         goto out;
3084                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3085                 if (r)
3086                         goto out;
3087                 break;
3088         }
3089         case KVM_SET_CPUID2: {
3090                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3091                 struct kvm_cpuid2 cpuid;
3092
3093                 r = -EFAULT;
3094                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3095                         goto out;
3096                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3097                                               cpuid_arg->entries);
3098                 if (r)
3099                         goto out;
3100                 break;
3101         }
3102         case KVM_GET_CPUID2: {
3103                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3104                 struct kvm_cpuid2 cpuid;
3105
3106                 r = -EFAULT;
3107                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3108                         goto out;
3109                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3110                                               cpuid_arg->entries);
3111                 if (r)
3112                         goto out;
3113                 r = -EFAULT;
3114                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3115                         goto out;
3116                 r = 0;
3117                 break;
3118         }
3119         case KVM_GET_MSRS:
3120                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3121                 break;
3122         case KVM_SET_MSRS:
3123                 r = msr_io(vcpu, argp, do_set_msr, 0);
3124                 break;
3125         case KVM_TPR_ACCESS_REPORTING: {
3126                 struct kvm_tpr_access_ctl tac;
3127
3128                 r = -EFAULT;
3129                 if (copy_from_user(&tac, argp, sizeof tac))
3130                         goto out;
3131                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3132                 if (r)
3133                         goto out;
3134                 r = -EFAULT;
3135                 if (copy_to_user(argp, &tac, sizeof tac))
3136                         goto out;
3137                 r = 0;
3138                 break;
3139         };
3140         case KVM_SET_VAPIC_ADDR: {
3141                 struct kvm_vapic_addr va;
3142
3143                 r = -EINVAL;
3144                 if (!irqchip_in_kernel(vcpu->kvm))
3145                         goto out;
3146                 r = -EFAULT;
3147                 if (copy_from_user(&va, argp, sizeof va))
3148                         goto out;
3149                 r = 0;
3150                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3151                 break;
3152         }
3153         case KVM_X86_SETUP_MCE: {
3154                 u64 mcg_cap;
3155
3156                 r = -EFAULT;
3157                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3158                         goto out;
3159                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3160                 break;
3161         }
3162         case KVM_X86_SET_MCE: {
3163                 struct kvm_x86_mce mce;
3164
3165                 r = -EFAULT;
3166                 if (copy_from_user(&mce, argp, sizeof mce))
3167                         goto out;
3168                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3169                 break;
3170         }
3171         case KVM_GET_VCPU_EVENTS: {
3172                 struct kvm_vcpu_events events;
3173
3174                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3175
3176                 r = -EFAULT;
3177                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3178                         break;
3179                 r = 0;
3180                 break;
3181         }
3182         case KVM_SET_VCPU_EVENTS: {
3183                 struct kvm_vcpu_events events;
3184
3185                 r = -EFAULT;
3186                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3187                         break;
3188
3189                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3190                 break;
3191         }
3192         case KVM_GET_DEBUGREGS: {
3193                 struct kvm_debugregs dbgregs;
3194
3195                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3196
3197                 r = -EFAULT;
3198                 if (copy_to_user(argp, &dbgregs,
3199                                  sizeof(struct kvm_debugregs)))
3200                         break;
3201                 r = 0;
3202                 break;
3203         }
3204         case KVM_SET_DEBUGREGS: {
3205                 struct kvm_debugregs dbgregs;
3206
3207                 r = -EFAULT;
3208                 if (copy_from_user(&dbgregs, argp,
3209                                    sizeof(struct kvm_debugregs)))
3210                         break;
3211
3212                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3213                 break;
3214         }
3215         case KVM_GET_XSAVE: {
3216                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3217                 r = -ENOMEM;
3218                 if (!u.xsave)
3219                         break;
3220
3221                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3222
3223                 r = -EFAULT;
3224                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3225                         break;
3226                 r = 0;
3227                 break;
3228         }
3229         case KVM_SET_XSAVE: {
3230                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3231                 r = -ENOMEM;
3232                 if (!u.xsave)
3233                         break;
3234
3235                 r = -EFAULT;
3236                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3237                         break;
3238
3239                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3240                 break;
3241         }
3242         case KVM_GET_XCRS: {
3243                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3244                 r = -ENOMEM;
3245                 if (!u.xcrs)
3246                         break;
3247
3248                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3249
3250                 r = -EFAULT;
3251                 if (copy_to_user(argp, u.xcrs,
3252                                  sizeof(struct kvm_xcrs)))
3253                         break;
3254                 r = 0;
3255                 break;
3256         }
3257         case KVM_SET_XCRS: {
3258                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3259                 r = -ENOMEM;
3260                 if (!u.xcrs)
3261                         break;
3262
3263                 r = -EFAULT;
3264                 if (copy_from_user(u.xcrs, argp,
3265                                    sizeof(struct kvm_xcrs)))
3266                         break;
3267
3268                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3269                 break;
3270         }
3271         case KVM_SET_TSC_KHZ: {
3272                 u32 user_tsc_khz;
3273
3274                 r = -EINVAL;
3275                 if (!kvm_has_tsc_control)
3276                         break;
3277
3278                 user_tsc_khz = (u32)arg;
3279
3280                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3281                         goto out;
3282
3283                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3284
3285                 r = 0;
3286                 goto out;
3287         }
3288         case KVM_GET_TSC_KHZ: {
3289                 r = -EIO;
3290                 if (check_tsc_unstable())
3291                         goto out;
3292
3293                 r = vcpu_tsc_khz(vcpu);
3294
3295                 goto out;
3296         }
3297         default:
3298                 r = -EINVAL;
3299         }
3300 out:
3301         kfree(u.buffer);
3302         return r;
3303 }
3304
3305 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3306 {
3307         int ret;
3308
3309         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3310                 return -1;
3311         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3312         return ret;
3313 }
3314
3315 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3316                                               u64 ident_addr)
3317 {
3318         kvm->arch.ept_identity_map_addr = ident_addr;
3319         return 0;
3320 }
3321
3322 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3323                                           u32 kvm_nr_mmu_pages)
3324 {
3325         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3326                 return -EINVAL;
3327
3328         mutex_lock(&kvm->slots_lock);
3329         spin_lock(&kvm->mmu_lock);
3330
3331         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3332         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3333
3334         spin_unlock(&kvm->mmu_lock);
3335         mutex_unlock(&kvm->slots_lock);
3336         return 0;
3337 }
3338
3339 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3340 {
3341         return kvm->arch.n_max_mmu_pages;
3342 }
3343
3344 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3345 {
3346         int r;
3347
3348         r = 0;
3349         switch (chip->chip_id) {
3350         case KVM_IRQCHIP_PIC_MASTER:
3351                 memcpy(&chip->chip.pic,
3352                         &pic_irqchip(kvm)->pics[0],
3353                         sizeof(struct kvm_pic_state));
3354                 break;
3355         case KVM_IRQCHIP_PIC_SLAVE:
3356                 memcpy(&chip->chip.pic,
3357                         &pic_irqchip(kvm)->pics[1],
3358                         sizeof(struct kvm_pic_state));
3359                 break;
3360         case KVM_IRQCHIP_IOAPIC:
3361                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3362                 break;
3363         default:
3364                 r = -EINVAL;
3365                 break;
3366         }
3367         return r;
3368 }
3369
3370 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3371 {
3372         int r;
3373
3374         r = 0;
3375         switch (chip->chip_id) {
3376         case KVM_IRQCHIP_PIC_MASTER:
3377                 spin_lock(&pic_irqchip(kvm)->lock);
3378                 memcpy(&pic_irqchip(kvm)->pics[0],
3379                         &chip->chip.pic,
3380                         sizeof(struct kvm_pic_state));
3381                 spin_unlock(&pic_irqchip(kvm)->lock);
3382                 break;
3383         case KVM_IRQCHIP_PIC_SLAVE:
3384                 spin_lock(&pic_irqchip(kvm)->lock);
3385                 memcpy(&pic_irqchip(kvm)->pics[1],
3386                         &chip->chip.pic,
3387                         sizeof(struct kvm_pic_state));
3388                 spin_unlock(&pic_irqchip(kvm)->lock);
3389                 break;
3390         case KVM_IRQCHIP_IOAPIC:
3391                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3392                 break;
3393         default:
3394                 r = -EINVAL;
3395                 break;
3396         }
3397         kvm_pic_update_irq(pic_irqchip(kvm));
3398         return r;
3399 }
3400
3401 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3402 {
3403         int r = 0;
3404
3405         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3406         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3407         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3408         return r;
3409 }
3410
3411 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3412 {
3413         int r = 0;
3414
3415         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3416         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3417         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3418         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3419         return r;
3420 }
3421
3422 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3423 {
3424         int r = 0;
3425
3426         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3427         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3428                 sizeof(ps->channels));
3429         ps->flags = kvm->arch.vpit->pit_state.flags;
3430         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3431         memset(&ps->reserved, 0, sizeof(ps->reserved));
3432         return r;
3433 }
3434
3435 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3436 {
3437         int r = 0, start = 0;
3438         u32 prev_legacy, cur_legacy;
3439         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3440         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3441         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3442         if (!prev_legacy && cur_legacy)
3443                 start = 1;
3444         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3445                sizeof(kvm->arch.vpit->pit_state.channels));
3446         kvm->arch.vpit->pit_state.flags = ps->flags;
3447         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3448         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3449         return r;
3450 }
3451
3452 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3453                                  struct kvm_reinject_control *control)
3454 {
3455         if (!kvm->arch.vpit)
3456                 return -ENXIO;
3457         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3458         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3459         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3460         return 0;
3461 }
3462
3463 /*
3464  * Get (and clear) the dirty memory log for a memory slot.
3465  */
3466 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3467                                       struct kvm_dirty_log *log)
3468 {
3469         int r;
3470         struct kvm_memory_slot *memslot;
3471         unsigned long n;
3472
3473         mutex_lock(&kvm->slots_lock);
3474
3475         r = -EINVAL;
3476         if (log->slot >= KVM_MEMORY_SLOTS)
3477                 goto out;
3478
3479         memslot = &kvm->memslots->memslots[log->slot];
3480         r = -ENOENT;
3481         if (!memslot->dirty_bitmap)
3482                 goto out;
3483
3484         n = kvm_dirty_bitmap_bytes(memslot);
3485
3486         /* If nothing is dirty, don't bother messing with page tables. */
3487         if (memslot->nr_dirty_pages) {
3488                 struct kvm_memslots *slots, *old_slots;
3489                 unsigned long *dirty_bitmap;
3490
3491                 dirty_bitmap = memslot->dirty_bitmap_head;
3492                 if (memslot->dirty_bitmap == dirty_bitmap)
3493                         dirty_bitmap += n / sizeof(long);
3494                 memset(dirty_bitmap, 0, n);
3495
3496                 r = -ENOMEM;
3497                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3498                 if (!slots)
3499                         goto out;
3500                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3501                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3502                 slots->memslots[log->slot].nr_dirty_pages = 0;
3503                 slots->generation++;
3504
3505                 old_slots = kvm->memslots;
3506                 rcu_assign_pointer(kvm->memslots, slots);
3507                 synchronize_srcu_expedited(&kvm->srcu);
3508                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3509                 kfree(old_slots);
3510
3511                 spin_lock(&kvm->mmu_lock);
3512                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3513                 spin_unlock(&kvm->mmu_lock);
3514
3515                 r = -EFAULT;
3516                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3517                         goto out;
3518         } else {
3519                 r = -EFAULT;
3520                 if (clear_user(log->dirty_bitmap, n))
3521                         goto out;
3522         }
3523
3524         r = 0;
3525 out:
3526         mutex_unlock(&kvm->slots_lock);
3527         return r;
3528 }
3529
3530 long kvm_arch_vm_ioctl(struct file *filp,
3531                        unsigned int ioctl, unsigned long arg)
3532 {
3533         struct kvm *kvm = filp->private_data;
3534         void __user *argp = (void __user *)arg;
3535         int r = -ENOTTY;
3536         /*
3537          * This union makes it completely explicit to gcc-3.x
3538          * that these two variables' stack usage should be
3539          * combined, not added together.
3540          */
3541         union {
3542                 struct kvm_pit_state ps;
3543                 struct kvm_pit_state2 ps2;
3544                 struct kvm_pit_config pit_config;
3545         } u;
3546
3547         switch (ioctl) {
3548         case KVM_SET_TSS_ADDR:
3549                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3550                 if (r < 0)
3551                         goto out;
3552                 break;
3553         case KVM_SET_IDENTITY_MAP_ADDR: {
3554                 u64 ident_addr;
3555
3556                 r = -EFAULT;
3557                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3558                         goto out;
3559                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3560                 if (r < 0)
3561                         goto out;
3562                 break;
3563         }
3564         case KVM_SET_NR_MMU_PAGES:
3565                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3566                 if (r)
3567                         goto out;
3568                 break;
3569         case KVM_GET_NR_MMU_PAGES:
3570                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3571                 break;
3572         case KVM_CREATE_IRQCHIP: {
3573                 struct kvm_pic *vpic;
3574
3575                 mutex_lock(&kvm->lock);
3576                 r = -EEXIST;
3577                 if (kvm->arch.vpic)
3578                         goto create_irqchip_unlock;
3579                 r = -ENOMEM;
3580                 vpic = kvm_create_pic(kvm);
3581                 if (vpic) {
3582                         r = kvm_ioapic_init(kvm);
3583                         if (r) {
3584                                 mutex_lock(&kvm->slots_lock);
3585                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3586                                                           &vpic->dev_master);
3587                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3588                                                           &vpic->dev_slave);
3589                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3590                                                           &vpic->dev_eclr);
3591                                 mutex_unlock(&kvm->slots_lock);
3592                                 kfree(vpic);
3593                                 goto create_irqchip_unlock;
3594                         }
3595                 } else
3596                         goto create_irqchip_unlock;
3597                 smp_wmb();
3598                 kvm->arch.vpic = vpic;
3599                 smp_wmb();
3600                 r = kvm_setup_default_irq_routing(kvm);
3601                 if (r) {
3602                         mutex_lock(&kvm->slots_lock);
3603                         mutex_lock(&kvm->irq_lock);
3604                         kvm_ioapic_destroy(kvm);
3605                         kvm_destroy_pic(kvm);
3606                         mutex_unlock(&kvm->irq_lock);
3607                         mutex_unlock(&kvm->slots_lock);
3608                 }
3609         create_irqchip_unlock:
3610                 mutex_unlock(&kvm->lock);
3611                 break;
3612         }
3613         case KVM_CREATE_PIT:
3614                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3615                 goto create_pit;
3616         case KVM_CREATE_PIT2:
3617                 r = -EFAULT;
3618                 if (copy_from_user(&u.pit_config, argp,
3619                                    sizeof(struct kvm_pit_config)))
3620                         goto out;
3621         create_pit:
3622                 mutex_lock(&kvm->slots_lock);
3623                 r = -EEXIST;
3624                 if (kvm->arch.vpit)
3625                         goto create_pit_unlock;
3626                 r = -ENOMEM;
3627                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3628                 if (kvm->arch.vpit)
3629                         r = 0;
3630         create_pit_unlock:
3631                 mutex_unlock(&kvm->slots_lock);
3632                 break;
3633         case KVM_IRQ_LINE_STATUS:
3634         case KVM_IRQ_LINE: {
3635                 struct kvm_irq_level irq_event;
3636
3637                 r = -EFAULT;
3638                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3639                         goto out;
3640                 r = -ENXIO;
3641                 if (irqchip_in_kernel(kvm)) {
3642                         __s32 status;
3643                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3644                                         irq_event.irq, irq_event.level);
3645                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3646                                 r = -EFAULT;
3647                                 irq_event.status = status;
3648                                 if (copy_to_user(argp, &irq_event,
3649                                                         sizeof irq_event))
3650                                         goto out;
3651                         }
3652                         r = 0;
3653                 }
3654                 break;
3655         }
3656         case KVM_GET_IRQCHIP: {
3657                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3658                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3659
3660                 r = -ENOMEM;
3661                 if (!chip)
3662                         goto out;
3663                 r = -EFAULT;
3664                 if (copy_from_user(chip, argp, sizeof *chip))
3665                         goto get_irqchip_out;
3666                 r = -ENXIO;
3667                 if (!irqchip_in_kernel(kvm))
3668                         goto get_irqchip_out;
3669                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3670                 if (r)
3671                         goto get_irqchip_out;
3672                 r = -EFAULT;
3673                 if (copy_to_user(argp, chip, sizeof *chip))
3674                         goto get_irqchip_out;
3675                 r = 0;
3676         get_irqchip_out:
3677                 kfree(chip);
3678                 if (r)
3679                         goto out;
3680                 break;
3681         }
3682         case KVM_SET_IRQCHIP: {
3683                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3684                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3685
3686                 r = -ENOMEM;
3687                 if (!chip)
3688                         goto out;
3689                 r = -EFAULT;
3690                 if (copy_from_user(chip, argp, sizeof *chip))
3691                         goto set_irqchip_out;
3692                 r = -ENXIO;
3693                 if (!irqchip_in_kernel(kvm))
3694                         goto set_irqchip_out;
3695                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3696                 if (r)
3697                         goto set_irqchip_out;
3698                 r = 0;
3699         set_irqchip_out:
3700                 kfree(chip);
3701                 if (r)
3702                         goto out;
3703                 break;
3704         }
3705         case KVM_GET_PIT: {
3706                 r = -EFAULT;
3707                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3708                         goto out;
3709                 r = -ENXIO;
3710                 if (!kvm->arch.vpit)
3711                         goto out;
3712                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3713                 if (r)
3714                         goto out;
3715                 r = -EFAULT;
3716                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3717                         goto out;
3718                 r = 0;
3719                 break;
3720         }
3721         case KVM_SET_PIT: {
3722                 r = -EFAULT;
3723                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3724                         goto out;
3725                 r = -ENXIO;
3726                 if (!kvm->arch.vpit)
3727                         goto out;
3728                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3729                 if (r)
3730                         goto out;
3731                 r = 0;
3732                 break;
3733         }
3734         case KVM_GET_PIT2: {
3735                 r = -ENXIO;
3736                 if (!kvm->arch.vpit)
3737                         goto out;
3738                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3739                 if (r)
3740                         goto out;
3741                 r = -EFAULT;
3742                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3743                         goto out;
3744                 r = 0;
3745                 break;
3746         }
3747         case KVM_SET_PIT2: {
3748                 r = -EFAULT;
3749                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3750                         goto out;
3751                 r = -ENXIO;
3752                 if (!kvm->arch.vpit)
3753                         goto out;
3754                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3755                 if (r)
3756                         goto out;
3757                 r = 0;
3758                 break;
3759         }
3760         case KVM_REINJECT_CONTROL: {
3761                 struct kvm_reinject_control control;
3762                 r =  -EFAULT;
3763                 if (copy_from_user(&control, argp, sizeof(control)))
3764                         goto out;
3765                 r = kvm_vm_ioctl_reinject(kvm, &control);
3766                 if (r)
3767                         goto out;
3768                 r = 0;
3769                 break;
3770         }
3771         case KVM_XEN_HVM_CONFIG: {
3772                 r = -EFAULT;
3773                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3774                                    sizeof(struct kvm_xen_hvm_config)))
3775                         goto out;
3776                 r = -EINVAL;
3777                 if (kvm->arch.xen_hvm_config.flags)
3778                         goto out;
3779                 r = 0;
3780                 break;
3781         }
3782         case KVM_SET_CLOCK: {
3783                 struct kvm_clock_data user_ns;
3784                 u64 now_ns;
3785                 s64 delta;
3786
3787                 r = -EFAULT;
3788                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3789                         goto out;
3790
3791                 r = -EINVAL;
3792                 if (user_ns.flags)
3793                         goto out;
3794
3795                 r = 0;
3796                 local_irq_disable();
3797                 now_ns = get_kernel_ns();
3798                 delta = user_ns.clock - now_ns;
3799                 local_irq_enable();
3800                 kvm->arch.kvmclock_offset = delta;
3801                 break;
3802         }
3803         case KVM_GET_CLOCK: {
3804                 struct kvm_clock_data user_ns;
3805                 u64 now_ns;
3806
3807                 local_irq_disable();
3808                 now_ns = get_kernel_ns();
3809                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3810                 local_irq_enable();
3811                 user_ns.flags = 0;
3812                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3813
3814                 r = -EFAULT;
3815                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3816                         goto out;
3817                 r = 0;
3818                 break;
3819         }
3820
3821         default:
3822                 ;
3823         }
3824 out:
3825         return r;
3826 }
3827
3828 static void kvm_init_msr_list(void)
3829 {
3830         u32 dummy[2];
3831         unsigned i, j;
3832
3833         /* skip the first msrs in the list. KVM-specific */
3834         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3835                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3836                         continue;
3837                 if (j < i)
3838                         msrs_to_save[j] = msrs_to_save[i];
3839                 j++;
3840         }
3841         num_msrs_to_save = j;
3842 }
3843
3844 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3845                            const void *v)
3846 {
3847         int handled = 0;
3848         int n;
3849
3850         do {
3851                 n = min(len, 8);
3852                 if (!(vcpu->arch.apic &&
3853                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3854                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3855                         break;
3856                 handled += n;
3857                 addr += n;
3858                 len -= n;
3859                 v += n;
3860         } while (len);
3861
3862         return handled;
3863 }
3864
3865 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3866 {
3867         int handled = 0;
3868         int n;
3869
3870         do {
3871                 n = min(len, 8);
3872                 if (!(vcpu->arch.apic &&
3873                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3874                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3875                         break;
3876                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3877                 handled += n;
3878                 addr += n;
3879                 len -= n;
3880                 v += n;
3881         } while (len);
3882
3883         return handled;
3884 }
3885
3886 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3887                         struct kvm_segment *var, int seg)
3888 {
3889         kvm_x86_ops->set_segment(vcpu, var, seg);
3890 }
3891
3892 void kvm_get_segment(struct kvm_vcpu *vcpu,
3893                      struct kvm_segment *var, int seg)
3894 {
3895         kvm_x86_ops->get_segment(vcpu, var, seg);
3896 }
3897
3898 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3899 {
3900         return gpa;
3901 }
3902
3903 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3904 {
3905         gpa_t t_gpa;
3906         struct x86_exception exception;
3907
3908         BUG_ON(!mmu_is_nested(vcpu));
3909
3910         /* NPT walks are always user-walks */
3911         access |= PFERR_USER_MASK;
3912         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3913
3914         return t_gpa;
3915 }
3916
3917 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3918                               struct x86_exception *exception)
3919 {
3920         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3921         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3922 }
3923
3924  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3925                                 struct x86_exception *exception)
3926 {
3927         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3928         access |= PFERR_FETCH_MASK;
3929         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3930 }
3931
3932 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3933                                struct x86_exception *exception)
3934 {
3935         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3936         access |= PFERR_WRITE_MASK;
3937         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3938 }
3939
3940 /* uses this to access any guest's mapped memory without checking CPL */
3941 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3942                                 struct x86_exception *exception)
3943 {
3944         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3945 }
3946
3947 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3948                                       struct kvm_vcpu *vcpu, u32 access,
3949                                       struct x86_exception *exception)
3950 {
3951         void *data = val;
3952         int r = X86EMUL_CONTINUE;
3953
3954         while (bytes) {
3955                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3956                                                             exception);
3957                 unsigned offset = addr & (PAGE_SIZE-1);
3958                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3959                 int ret;
3960
3961                 if (gpa == UNMAPPED_GVA)
3962                         return X86EMUL_PROPAGATE_FAULT;
3963                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3964                 if (ret < 0) {
3965                         r = X86EMUL_IO_NEEDED;
3966                         goto out;
3967                 }
3968
3969                 bytes -= toread;
3970                 data += toread;
3971                 addr += toread;
3972         }
3973 out:
3974         return r;
3975 }
3976
3977 /* used for instruction fetching */
3978 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3979                                 gva_t addr, void *val, unsigned int bytes,
3980                                 struct x86_exception *exception)
3981 {
3982         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3983         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3984
3985         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3986                                           access | PFERR_FETCH_MASK,
3987                                           exception);
3988 }
3989
3990 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3991                                gva_t addr, void *val, unsigned int bytes,
3992                                struct x86_exception *exception)
3993 {
3994         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3995         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3996
3997         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3998                                           exception);
3999 }
4000 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4001
4002 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4003                                       gva_t addr, void *val, unsigned int bytes,
4004                                       struct x86_exception *exception)
4005 {
4006         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4007         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4008 }
4009
4010 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4011                                        gva_t addr, void *val,
4012                                        unsigned int bytes,
4013                                        struct x86_exception *exception)
4014 {
4015         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4016         void *data = val;
4017         int r = X86EMUL_CONTINUE;
4018
4019         while (bytes) {
4020                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4021                                                              PFERR_WRITE_MASK,
4022                                                              exception);
4023                 unsigned offset = addr & (PAGE_SIZE-1);
4024                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4025                 int ret;
4026
4027                 if (gpa == UNMAPPED_GVA)
4028                         return X86EMUL_PROPAGATE_FAULT;
4029                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4030                 if (ret < 0) {
4031                         r = X86EMUL_IO_NEEDED;
4032                         goto out;
4033                 }
4034
4035                 bytes -= towrite;
4036                 data += towrite;
4037                 addr += towrite;
4038         }
4039 out:
4040         return r;
4041 }
4042 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4043
4044 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4045                                 gpa_t *gpa, struct x86_exception *exception,
4046                                 bool write)
4047 {
4048         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4049
4050         if (vcpu_match_mmio_gva(vcpu, gva) &&
4051                   check_write_user_access(vcpu, write, access,
4052                   vcpu->arch.access)) {
4053                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4054                                         (gva & (PAGE_SIZE - 1));
4055                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4056                 return 1;
4057         }
4058
4059         if (write)
4060                 access |= PFERR_WRITE_MASK;
4061
4062         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4063
4064         if (*gpa == UNMAPPED_GVA)
4065                 return -1;
4066
4067         /* For APIC access vmexit */
4068         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4069                 return 1;
4070
4071         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4072                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4073                 return 1;
4074         }
4075
4076         return 0;
4077 }
4078
4079 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4080                         const void *val, int bytes)
4081 {
4082         int ret;
4083
4084         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4085         if (ret < 0)
4086                 return 0;
4087         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4088         return 1;
4089 }
4090
4091 struct read_write_emulator_ops {
4092         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4093                                   int bytes);
4094         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4095                                   void *val, int bytes);
4096         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4097                                int bytes, void *val);
4098         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4099                                     void *val, int bytes);
4100         bool write;
4101 };
4102
4103 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4104 {
4105         if (vcpu->mmio_read_completed) {
4106                 memcpy(val, vcpu->mmio_data, bytes);
4107                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4108                                vcpu->mmio_phys_addr, *(u64 *)val);
4109                 vcpu->mmio_read_completed = 0;
4110                 return 1;
4111         }
4112
4113         return 0;
4114 }
4115
4116 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4117                         void *val, int bytes)
4118 {
4119         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4120 }
4121
4122 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4123                          void *val, int bytes)
4124 {
4125         return emulator_write_phys(vcpu, gpa, val, bytes);
4126 }
4127
4128 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4129 {
4130         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4131         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4132 }
4133
4134 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4135                           void *val, int bytes)
4136 {
4137         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4138         return X86EMUL_IO_NEEDED;
4139 }
4140
4141 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4142                            void *val, int bytes)
4143 {
4144         memcpy(vcpu->mmio_data, val, bytes);
4145         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4146         return X86EMUL_CONTINUE;
4147 }
4148
4149 static struct read_write_emulator_ops read_emultor = {
4150         .read_write_prepare = read_prepare,
4151         .read_write_emulate = read_emulate,
4152         .read_write_mmio = vcpu_mmio_read,
4153         .read_write_exit_mmio = read_exit_mmio,
4154 };
4155
4156 static struct read_write_emulator_ops write_emultor = {
4157         .read_write_emulate = write_emulate,
4158         .read_write_mmio = write_mmio,
4159         .read_write_exit_mmio = write_exit_mmio,
4160         .write = true,
4161 };
4162
4163 static int emulator_read_write_onepage(unsigned long addr, void *val,
4164                                        unsigned int bytes,
4165                                        struct x86_exception *exception,
4166                                        struct kvm_vcpu *vcpu,
4167                                        struct read_write_emulator_ops *ops)
4168 {
4169         gpa_t gpa;
4170         int handled, ret;
4171         bool write = ops->write;
4172
4173         if (ops->read_write_prepare &&
4174                   ops->read_write_prepare(vcpu, val, bytes))
4175                 return X86EMUL_CONTINUE;
4176
4177         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4178
4179         if (ret < 0)
4180                 return X86EMUL_PROPAGATE_FAULT;
4181
4182         /* For APIC access vmexit */
4183         if (ret)
4184                 goto mmio;
4185
4186         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4187                 return X86EMUL_CONTINUE;
4188
4189 mmio:
4190         /*
4191          * Is this MMIO handled locally?
4192          */
4193         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4194         if (handled == bytes)
4195                 return X86EMUL_CONTINUE;
4196
4197         gpa += handled;
4198         bytes -= handled;
4199         val += handled;
4200
4201         vcpu->mmio_needed = 1;
4202         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4203         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4204         vcpu->mmio_size = bytes;
4205         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4206         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4207         vcpu->mmio_index = 0;
4208
4209         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4210 }
4211
4212 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4213                         void *val, unsigned int bytes,
4214                         struct x86_exception *exception,
4215                         struct read_write_emulator_ops *ops)
4216 {
4217         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4218
4219         /* Crossing a page boundary? */
4220         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4221                 int rc, now;
4222
4223                 now = -addr & ~PAGE_MASK;
4224                 rc = emulator_read_write_onepage(addr, val, now, exception,
4225                                                  vcpu, ops);
4226
4227                 if (rc != X86EMUL_CONTINUE)
4228                         return rc;
4229                 addr += now;
4230                 val += now;
4231                 bytes -= now;
4232         }
4233
4234         return emulator_read_write_onepage(addr, val, bytes, exception,
4235                                            vcpu, ops);
4236 }
4237
4238 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4239                                   unsigned long addr,
4240                                   void *val,
4241                                   unsigned int bytes,
4242                                   struct x86_exception *exception)
4243 {
4244         return emulator_read_write(ctxt, addr, val, bytes,
4245                                    exception, &read_emultor);
4246 }
4247
4248 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4249                             unsigned long addr,
4250                             const void *val,
4251                             unsigned int bytes,
4252                             struct x86_exception *exception)
4253 {
4254         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4255                                    exception, &write_emultor);
4256 }
4257
4258 #define CMPXCHG_TYPE(t, ptr, old, new) \
4259         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4260
4261 #ifdef CONFIG_X86_64
4262 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4263 #else
4264 #  define CMPXCHG64(ptr, old, new) \
4265         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4266 #endif
4267
4268 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4269                                      unsigned long addr,
4270                                      const void *old,
4271                                      const void *new,
4272                                      unsigned int bytes,
4273                                      struct x86_exception *exception)
4274 {
4275         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4276         gpa_t gpa;
4277         struct page *page;
4278         char *kaddr;
4279         bool exchanged;
4280
4281         /* guests cmpxchg8b have to be emulated atomically */
4282         if (bytes > 8 || (bytes & (bytes - 1)))
4283                 goto emul_write;
4284
4285         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4286
4287         if (gpa == UNMAPPED_GVA ||
4288             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4289                 goto emul_write;
4290
4291         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4292                 goto emul_write;
4293
4294         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4295         if (is_error_page(page)) {
4296                 kvm_release_page_clean(page);
4297                 goto emul_write;
4298         }
4299
4300         kaddr = kmap_atomic(page, KM_USER0);
4301         kaddr += offset_in_page(gpa);
4302         switch (bytes) {
4303         case 1:
4304                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4305                 break;
4306         case 2:
4307                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4308                 break;
4309         case 4:
4310                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4311                 break;
4312         case 8:
4313                 exchanged = CMPXCHG64(kaddr, old, new);
4314                 break;
4315         default:
4316                 BUG();
4317         }
4318         kunmap_atomic(kaddr, KM_USER0);
4319         kvm_release_page_dirty(page);
4320
4321         if (!exchanged)
4322                 return X86EMUL_CMPXCHG_FAILED;
4323
4324         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4325
4326         return X86EMUL_CONTINUE;
4327
4328 emul_write:
4329         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4330
4331         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4332 }
4333
4334 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4335 {
4336         /* TODO: String I/O for in kernel device */
4337         int r;
4338
4339         if (vcpu->arch.pio.in)
4340                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4341                                     vcpu->arch.pio.size, pd);
4342         else
4343                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4344                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4345                                      pd);
4346         return r;
4347 }
4348
4349 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4350                                unsigned short port, void *val,
4351                                unsigned int count, bool in)
4352 {
4353         trace_kvm_pio(!in, port, size, count);
4354
4355         vcpu->arch.pio.port = port;
4356         vcpu->arch.pio.in = in;
4357         vcpu->arch.pio.count  = count;
4358         vcpu->arch.pio.size = size;
4359
4360         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4361                 vcpu->arch.pio.count = 0;
4362                 return 1;
4363         }
4364
4365         vcpu->run->exit_reason = KVM_EXIT_IO;
4366         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4367         vcpu->run->io.size = size;
4368         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4369         vcpu->run->io.count = count;
4370         vcpu->run->io.port = port;
4371
4372         return 0;
4373 }
4374
4375 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4376                                     int size, unsigned short port, void *val,
4377                                     unsigned int count)
4378 {
4379         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4380         int ret;
4381
4382         if (vcpu->arch.pio.count)
4383                 goto data_avail;
4384
4385         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4386         if (ret) {
4387 data_avail:
4388                 memcpy(val, vcpu->arch.pio_data, size * count);
4389                 vcpu->arch.pio.count = 0;
4390                 return 1;
4391         }
4392
4393         return 0;
4394 }
4395
4396 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4397                                      int size, unsigned short port,
4398                                      const void *val, unsigned int count)
4399 {
4400         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4401
4402         memcpy(vcpu->arch.pio_data, val, size * count);
4403         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4404 }
4405
4406 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4407 {
4408         return kvm_x86_ops->get_segment_base(vcpu, seg);
4409 }
4410
4411 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4412 {
4413         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4414 }
4415
4416 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4417 {
4418         if (!need_emulate_wbinvd(vcpu))
4419                 return X86EMUL_CONTINUE;
4420
4421         if (kvm_x86_ops->has_wbinvd_exit()) {
4422                 int cpu = get_cpu();
4423
4424                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4425                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4426                                 wbinvd_ipi, NULL, 1);
4427                 put_cpu();
4428                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4429         } else
4430                 wbinvd();
4431         return X86EMUL_CONTINUE;
4432 }
4433 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4434
4435 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4436 {
4437         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4438 }
4439
4440 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4441 {
4442         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4443 }
4444
4445 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4446 {
4447
4448         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4449 }
4450
4451 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4452 {
4453         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4454 }
4455
4456 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4457 {
4458         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4459         unsigned long value;
4460
4461         switch (cr) {
4462         case 0:
4463                 value = kvm_read_cr0(vcpu);
4464                 break;
4465         case 2:
4466                 value = vcpu->arch.cr2;
4467                 break;
4468         case 3:
4469                 value = kvm_read_cr3(vcpu);
4470                 break;
4471         case 4:
4472                 value = kvm_read_cr4(vcpu);
4473                 break;
4474         case 8:
4475                 value = kvm_get_cr8(vcpu);
4476                 break;
4477         default:
4478                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4479                 return 0;
4480         }
4481
4482         return value;
4483 }
4484
4485 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4486 {
4487         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4488         int res = 0;
4489
4490         switch (cr) {
4491         case 0:
4492                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4493                 break;
4494         case 2:
4495                 vcpu->arch.cr2 = val;
4496                 break;
4497         case 3:
4498                 res = kvm_set_cr3(vcpu, val);
4499                 break;
4500         case 4:
4501                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4502                 break;
4503         case 8:
4504                 res = kvm_set_cr8(vcpu, val);
4505                 break;
4506         default:
4507                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4508                 res = -1;
4509         }
4510
4511         return res;
4512 }
4513
4514 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4515 {
4516         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4517 }
4518
4519 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4520 {
4521         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4522 }
4523
4524 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4525 {
4526         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4527 }
4528
4529 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4530 {
4531         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4532 }
4533
4534 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4535 {
4536         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4537 }
4538
4539 static unsigned long emulator_get_cached_segment_base(
4540         struct x86_emulate_ctxt *ctxt, int seg)
4541 {
4542         return get_segment_base(emul_to_vcpu(ctxt), seg);
4543 }
4544
4545 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4546                                  struct desc_struct *desc, u32 *base3,
4547                                  int seg)
4548 {
4549         struct kvm_segment var;
4550
4551         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4552         *selector = var.selector;
4553
4554         if (var.unusable)
4555                 return false;
4556
4557         if (var.g)
4558                 var.limit >>= 12;
4559         set_desc_limit(desc, var.limit);
4560         set_desc_base(desc, (unsigned long)var.base);
4561 #ifdef CONFIG_X86_64
4562         if (base3)
4563                 *base3 = var.base >> 32;
4564 #endif
4565         desc->type = var.type;
4566         desc->s = var.s;
4567         desc->dpl = var.dpl;
4568         desc->p = var.present;
4569         desc->avl = var.avl;
4570         desc->l = var.l;
4571         desc->d = var.db;
4572         desc->g = var.g;
4573
4574         return true;
4575 }
4576
4577 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4578                                  struct desc_struct *desc, u32 base3,
4579                                  int seg)
4580 {
4581         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4582         struct kvm_segment var;
4583
4584         var.selector = selector;
4585         var.base = get_desc_base(desc);
4586 #ifdef CONFIG_X86_64
4587         var.base |= ((u64)base3) << 32;
4588 #endif
4589         var.limit = get_desc_limit(desc);
4590         if (desc->g)
4591                 var.limit = (var.limit << 12) | 0xfff;
4592         var.type = desc->type;
4593         var.present = desc->p;
4594         var.dpl = desc->dpl;
4595         var.db = desc->d;
4596         var.s = desc->s;
4597         var.l = desc->l;
4598         var.g = desc->g;
4599         var.avl = desc->avl;
4600         var.present = desc->p;
4601         var.unusable = !var.present;
4602         var.padding = 0;
4603
4604         kvm_set_segment(vcpu, &var, seg);
4605         return;
4606 }
4607
4608 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4609                             u32 msr_index, u64 *pdata)
4610 {
4611         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4612 }
4613
4614 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4615                             u32 msr_index, u64 data)
4616 {
4617         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4618 }
4619
4620 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4621 {
4622         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4623 }
4624
4625 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4626 {
4627         preempt_disable();
4628         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4629         /*
4630          * CR0.TS may reference the host fpu state, not the guest fpu state,
4631          * so it may be clear at this point.
4632          */
4633         clts();
4634 }
4635
4636 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4637 {
4638         preempt_enable();
4639 }
4640
4641 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4642                               struct x86_instruction_info *info,
4643                               enum x86_intercept_stage stage)
4644 {
4645         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4646 }
4647
4648 static struct x86_emulate_ops emulate_ops = {
4649         .read_std            = kvm_read_guest_virt_system,
4650         .write_std           = kvm_write_guest_virt_system,
4651         .fetch               = kvm_fetch_guest_virt,
4652         .read_emulated       = emulator_read_emulated,
4653         .write_emulated      = emulator_write_emulated,
4654         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4655         .invlpg              = emulator_invlpg,
4656         .pio_in_emulated     = emulator_pio_in_emulated,
4657         .pio_out_emulated    = emulator_pio_out_emulated,
4658         .get_segment         = emulator_get_segment,
4659         .set_segment         = emulator_set_segment,
4660         .get_cached_segment_base = emulator_get_cached_segment_base,
4661         .get_gdt             = emulator_get_gdt,
4662         .get_idt             = emulator_get_idt,
4663         .set_gdt             = emulator_set_gdt,
4664         .set_idt             = emulator_set_idt,
4665         .get_cr              = emulator_get_cr,
4666         .set_cr              = emulator_set_cr,
4667         .cpl                 = emulator_get_cpl,
4668         .get_dr              = emulator_get_dr,
4669         .set_dr              = emulator_set_dr,
4670         .set_msr             = emulator_set_msr,
4671         .get_msr             = emulator_get_msr,
4672         .halt                = emulator_halt,
4673         .wbinvd              = emulator_wbinvd,
4674         .fix_hypercall       = emulator_fix_hypercall,
4675         .get_fpu             = emulator_get_fpu,
4676         .put_fpu             = emulator_put_fpu,
4677         .intercept           = emulator_intercept,
4678 };
4679
4680 static void cache_all_regs(struct kvm_vcpu *vcpu)
4681 {
4682         kvm_register_read(vcpu, VCPU_REGS_RAX);
4683         kvm_register_read(vcpu, VCPU_REGS_RSP);
4684         kvm_register_read(vcpu, VCPU_REGS_RIP);
4685         vcpu->arch.regs_dirty = ~0;
4686 }
4687
4688 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4689 {
4690         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4691         /*
4692          * an sti; sti; sequence only disable interrupts for the first
4693          * instruction. So, if the last instruction, be it emulated or
4694          * not, left the system with the INT_STI flag enabled, it
4695          * means that the last instruction is an sti. We should not
4696          * leave the flag on in this case. The same goes for mov ss
4697          */
4698         if (!(int_shadow & mask))
4699                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4700 }
4701
4702 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4703 {
4704         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4705         if (ctxt->exception.vector == PF_VECTOR)
4706                 kvm_propagate_fault(vcpu, &ctxt->exception);
4707         else if (ctxt->exception.error_code_valid)
4708                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4709                                       ctxt->exception.error_code);
4710         else
4711                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4712 }
4713
4714 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4715                               const unsigned long *regs)
4716 {
4717         memset(&ctxt->twobyte, 0,
4718                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4719         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4720
4721         ctxt->fetch.start = 0;
4722         ctxt->fetch.end = 0;
4723         ctxt->io_read.pos = 0;
4724         ctxt->io_read.end = 0;
4725         ctxt->mem_read.pos = 0;
4726         ctxt->mem_read.end = 0;
4727 }
4728
4729 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4730 {
4731         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4732         int cs_db, cs_l;
4733
4734         /*
4735          * TODO: fix emulate.c to use guest_read/write_register
4736          * instead of direct ->regs accesses, can save hundred cycles
4737          * on Intel for instructions that don't read/change RSP, for
4738          * for example.
4739          */
4740         cache_all_regs(vcpu);
4741
4742         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4743
4744         ctxt->eflags = kvm_get_rflags(vcpu);
4745         ctxt->eip = kvm_rip_read(vcpu);
4746         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4747                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4748                      cs_l                               ? X86EMUL_MODE_PROT64 :
4749                      cs_db                              ? X86EMUL_MODE_PROT32 :
4750                                                           X86EMUL_MODE_PROT16;
4751         ctxt->guest_mode = is_guest_mode(vcpu);
4752
4753         init_decode_cache(ctxt, vcpu->arch.regs);
4754         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4755 }
4756
4757 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4758 {
4759         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4760         int ret;
4761
4762         init_emulate_ctxt(vcpu);
4763
4764         ctxt->op_bytes = 2;
4765         ctxt->ad_bytes = 2;
4766         ctxt->_eip = ctxt->eip + inc_eip;
4767         ret = emulate_int_real(ctxt, irq);
4768
4769         if (ret != X86EMUL_CONTINUE)
4770                 return EMULATE_FAIL;
4771
4772         ctxt->eip = ctxt->_eip;
4773         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4774         kvm_rip_write(vcpu, ctxt->eip);
4775         kvm_set_rflags(vcpu, ctxt->eflags);
4776
4777         if (irq == NMI_VECTOR)
4778                 vcpu->arch.nmi_pending = 0;
4779         else
4780                 vcpu->arch.interrupt.pending = false;
4781
4782         return EMULATE_DONE;
4783 }
4784 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4785
4786 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4787 {
4788         int r = EMULATE_DONE;
4789
4790         ++vcpu->stat.insn_emulation_fail;
4791         trace_kvm_emulate_insn_failed(vcpu);
4792         if (!is_guest_mode(vcpu)) {
4793                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4794                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4795                 vcpu->run->internal.ndata = 0;
4796                 r = EMULATE_FAIL;
4797         }
4798         kvm_queue_exception(vcpu, UD_VECTOR);
4799
4800         return r;
4801 }
4802
4803 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4804 {
4805         gpa_t gpa;
4806
4807         if (tdp_enabled)
4808                 return false;
4809
4810         /*
4811          * if emulation was due to access to shadowed page table
4812          * and it failed try to unshadow page and re-entetr the
4813          * guest to let CPU execute the instruction.
4814          */
4815         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4816                 return true;
4817
4818         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4819
4820         if (gpa == UNMAPPED_GVA)
4821                 return true; /* let cpu generate fault */
4822
4823         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4824                 return true;
4825
4826         return false;
4827 }
4828
4829 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4830                               unsigned long cr2,  int emulation_type)
4831 {
4832         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4833         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4834
4835         last_retry_eip = vcpu->arch.last_retry_eip;
4836         last_retry_addr = vcpu->arch.last_retry_addr;
4837
4838         /*
4839          * If the emulation is caused by #PF and it is non-page_table
4840          * writing instruction, it means the VM-EXIT is caused by shadow
4841          * page protected, we can zap the shadow page and retry this
4842          * instruction directly.
4843          *
4844          * Note: if the guest uses a non-page-table modifying instruction
4845          * on the PDE that points to the instruction, then we will unmap
4846          * the instruction and go to an infinite loop. So, we cache the
4847          * last retried eip and the last fault address, if we meet the eip
4848          * and the address again, we can break out of the potential infinite
4849          * loop.
4850          */
4851         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4852
4853         if (!(emulation_type & EMULTYPE_RETRY))
4854                 return false;
4855
4856         if (x86_page_table_writing_insn(ctxt))
4857                 return false;
4858
4859         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4860                 return false;
4861
4862         vcpu->arch.last_retry_eip = ctxt->eip;
4863         vcpu->arch.last_retry_addr = cr2;
4864
4865         if (!vcpu->arch.mmu.direct_map)
4866                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4867
4868         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4869
4870         return true;
4871 }
4872
4873 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4874                             unsigned long cr2,
4875                             int emulation_type,
4876                             void *insn,
4877                             int insn_len)
4878 {
4879         int r;
4880         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4881         bool writeback = true;
4882
4883         kvm_clear_exception_queue(vcpu);
4884
4885         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4886                 init_emulate_ctxt(vcpu);
4887                 ctxt->interruptibility = 0;
4888                 ctxt->have_exception = false;
4889                 ctxt->perm_ok = false;
4890
4891                 ctxt->only_vendor_specific_insn
4892                         = emulation_type & EMULTYPE_TRAP_UD;
4893
4894                 r = x86_decode_insn(ctxt, insn, insn_len);
4895
4896                 trace_kvm_emulate_insn_start(vcpu);
4897                 ++vcpu->stat.insn_emulation;
4898                 if (r != EMULATION_OK)  {
4899                         if (emulation_type & EMULTYPE_TRAP_UD)
4900                                 return EMULATE_FAIL;
4901                         if (reexecute_instruction(vcpu, cr2))
4902                                 return EMULATE_DONE;
4903                         if (emulation_type & EMULTYPE_SKIP)
4904                                 return EMULATE_FAIL;
4905                         return handle_emulation_failure(vcpu);
4906                 }
4907         }
4908
4909         if (emulation_type & EMULTYPE_SKIP) {
4910                 kvm_rip_write(vcpu, ctxt->_eip);
4911                 return EMULATE_DONE;
4912         }
4913
4914         if (retry_instruction(ctxt, cr2, emulation_type))
4915                 return EMULATE_DONE;
4916
4917         /* this is needed for vmware backdoor interface to work since it
4918            changes registers values  during IO operation */
4919         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4920                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4921                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4922         }
4923
4924 restart:
4925         r = x86_emulate_insn(ctxt);
4926
4927         if (r == EMULATION_INTERCEPTED)
4928                 return EMULATE_DONE;
4929
4930         if (r == EMULATION_FAILED) {
4931                 if (reexecute_instruction(vcpu, cr2))
4932                         return EMULATE_DONE;
4933
4934                 return handle_emulation_failure(vcpu);
4935         }
4936
4937         if (ctxt->have_exception) {
4938                 inject_emulated_exception(vcpu);
4939                 r = EMULATE_DONE;
4940         } else if (vcpu->arch.pio.count) {
4941                 if (!vcpu->arch.pio.in)
4942                         vcpu->arch.pio.count = 0;
4943                 else
4944                         writeback = false;
4945                 r = EMULATE_DO_MMIO;
4946         } else if (vcpu->mmio_needed) {
4947                 if (!vcpu->mmio_is_write)
4948                         writeback = false;
4949                 r = EMULATE_DO_MMIO;
4950         } else if (r == EMULATION_RESTART)
4951                 goto restart;
4952         else
4953                 r = EMULATE_DONE;
4954
4955         if (writeback) {
4956                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4957                 kvm_set_rflags(vcpu, ctxt->eflags);
4958                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4959                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4960                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4961                 kvm_rip_write(vcpu, ctxt->eip);
4962         } else
4963                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4964
4965         return r;
4966 }
4967 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4968
4969 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4970 {
4971         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4972         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4973                                             size, port, &val, 1);
4974         /* do not return to emulator after return from userspace */
4975         vcpu->arch.pio.count = 0;
4976         return ret;
4977 }
4978 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4979
4980 static void tsc_bad(void *info)
4981 {
4982         __this_cpu_write(cpu_tsc_khz, 0);
4983 }
4984
4985 static void tsc_khz_changed(void *data)
4986 {
4987         struct cpufreq_freqs *freq = data;
4988         unsigned long khz = 0;
4989
4990         if (data)
4991                 khz = freq->new;
4992         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4993                 khz = cpufreq_quick_get(raw_smp_processor_id());
4994         if (!khz)
4995                 khz = tsc_khz;
4996         __this_cpu_write(cpu_tsc_khz, khz);
4997 }
4998
4999 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5000                                      void *data)
5001 {
5002         struct cpufreq_freqs *freq = data;
5003         struct kvm *kvm;
5004         struct kvm_vcpu *vcpu;
5005         int i, send_ipi = 0;
5006
5007         /*
5008          * We allow guests to temporarily run on slowing clocks,
5009          * provided we notify them after, or to run on accelerating
5010          * clocks, provided we notify them before.  Thus time never
5011          * goes backwards.
5012          *
5013          * However, we have a problem.  We can't atomically update
5014          * the frequency of a given CPU from this function; it is
5015          * merely a notifier, which can be called from any CPU.
5016          * Changing the TSC frequency at arbitrary points in time
5017          * requires a recomputation of local variables related to
5018          * the TSC for each VCPU.  We must flag these local variables
5019          * to be updated and be sure the update takes place with the
5020          * new frequency before any guests proceed.
5021          *
5022          * Unfortunately, the combination of hotplug CPU and frequency
5023          * change creates an intractable locking scenario; the order
5024          * of when these callouts happen is undefined with respect to
5025          * CPU hotplug, and they can race with each other.  As such,
5026          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5027          * undefined; you can actually have a CPU frequency change take
5028          * place in between the computation of X and the setting of the
5029          * variable.  To protect against this problem, all updates of
5030          * the per_cpu tsc_khz variable are done in an interrupt
5031          * protected IPI, and all callers wishing to update the value
5032          * must wait for a synchronous IPI to complete (which is trivial
5033          * if the caller is on the CPU already).  This establishes the
5034          * necessary total order on variable updates.
5035          *
5036          * Note that because a guest time update may take place
5037          * anytime after the setting of the VCPU's request bit, the
5038          * correct TSC value must be set before the request.  However,
5039          * to ensure the update actually makes it to any guest which
5040          * starts running in hardware virtualization between the set
5041          * and the acquisition of the spinlock, we must also ping the
5042          * CPU after setting the request bit.
5043          *
5044          */
5045
5046         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5047                 return 0;
5048         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5049                 return 0;
5050
5051         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5052
5053         raw_spin_lock(&kvm_lock);
5054         list_for_each_entry(kvm, &vm_list, vm_list) {
5055                 kvm_for_each_vcpu(i, vcpu, kvm) {
5056                         if (vcpu->cpu != freq->cpu)
5057                                 continue;
5058                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5059                         if (vcpu->cpu != smp_processor_id())
5060                                 send_ipi = 1;
5061                 }
5062         }
5063         raw_spin_unlock(&kvm_lock);
5064
5065         if (freq->old < freq->new && send_ipi) {
5066                 /*
5067                  * We upscale the frequency.  Must make the guest
5068                  * doesn't see old kvmclock values while running with
5069                  * the new frequency, otherwise we risk the guest sees
5070                  * time go backwards.
5071                  *
5072                  * In case we update the frequency for another cpu
5073                  * (which might be in guest context) send an interrupt
5074                  * to kick the cpu out of guest context.  Next time
5075                  * guest context is entered kvmclock will be updated,
5076                  * so the guest will not see stale values.
5077                  */
5078                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5079         }
5080         return 0;
5081 }
5082
5083 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5084         .notifier_call  = kvmclock_cpufreq_notifier
5085 };
5086
5087 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5088                                         unsigned long action, void *hcpu)
5089 {
5090         unsigned int cpu = (unsigned long)hcpu;
5091
5092         switch (action) {
5093                 case CPU_ONLINE:
5094                 case CPU_DOWN_FAILED:
5095                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5096                         break;
5097                 case CPU_DOWN_PREPARE:
5098                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5099                         break;
5100         }
5101         return NOTIFY_OK;
5102 }
5103
5104 static struct notifier_block kvmclock_cpu_notifier_block = {
5105         .notifier_call  = kvmclock_cpu_notifier,
5106         .priority = -INT_MAX
5107 };
5108
5109 static void kvm_timer_init(void)
5110 {
5111         int cpu;
5112
5113         max_tsc_khz = tsc_khz;
5114         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5115         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5116 #ifdef CONFIG_CPU_FREQ
5117                 struct cpufreq_policy policy;
5118                 memset(&policy, 0, sizeof(policy));
5119                 cpu = get_cpu();
5120                 cpufreq_get_policy(&policy, cpu);
5121                 if (policy.cpuinfo.max_freq)
5122                         max_tsc_khz = policy.cpuinfo.max_freq;
5123                 put_cpu();
5124 #endif
5125                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5126                                           CPUFREQ_TRANSITION_NOTIFIER);
5127         }
5128         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5129         for_each_online_cpu(cpu)
5130                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5131 }
5132
5133 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5134
5135 static int kvm_is_in_guest(void)
5136 {
5137         return percpu_read(current_vcpu) != NULL;
5138 }
5139
5140 static int kvm_is_user_mode(void)
5141 {
5142         int user_mode = 3;
5143
5144         if (percpu_read(current_vcpu))
5145                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5146
5147         return user_mode != 0;
5148 }
5149
5150 static unsigned long kvm_get_guest_ip(void)
5151 {
5152         unsigned long ip = 0;
5153
5154         if (percpu_read(current_vcpu))
5155                 ip = kvm_rip_read(percpu_read(current_vcpu));
5156
5157         return ip;
5158 }
5159
5160 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5161         .is_in_guest            = kvm_is_in_guest,
5162         .is_user_mode           = kvm_is_user_mode,
5163         .get_guest_ip           = kvm_get_guest_ip,
5164 };
5165
5166 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5167 {
5168         percpu_write(current_vcpu, vcpu);
5169 }
5170 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5171
5172 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5173 {
5174         percpu_write(current_vcpu, NULL);
5175 }
5176 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5177
5178 static void kvm_set_mmio_spte_mask(void)
5179 {
5180         u64 mask;
5181         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5182
5183         /*
5184          * Set the reserved bits and the present bit of an paging-structure
5185          * entry to generate page fault with PFER.RSV = 1.
5186          */
5187         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5188         mask |= 1ull;
5189
5190 #ifdef CONFIG_X86_64
5191         /*
5192          * If reserved bit is not supported, clear the present bit to disable
5193          * mmio page fault.
5194          */
5195         if (maxphyaddr == 52)
5196                 mask &= ~1ull;
5197 #endif
5198
5199         kvm_mmu_set_mmio_spte_mask(mask);
5200 }
5201
5202 int kvm_arch_init(void *opaque)
5203 {
5204         int r;
5205         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5206
5207         if (kvm_x86_ops) {
5208                 printk(KERN_ERR "kvm: already loaded the other module\n");
5209                 r = -EEXIST;
5210                 goto out;
5211         }
5212
5213         if (!ops->cpu_has_kvm_support()) {
5214                 printk(KERN_ERR "kvm: no hardware support\n");
5215                 r = -EOPNOTSUPP;
5216                 goto out;
5217         }
5218         if (ops->disabled_by_bios()) {
5219                 printk(KERN_ERR "kvm: disabled by bios\n");
5220                 r = -EOPNOTSUPP;
5221                 goto out;
5222         }
5223
5224         r = kvm_mmu_module_init();
5225         if (r)
5226                 goto out;
5227
5228         kvm_set_mmio_spte_mask();
5229         kvm_init_msr_list();
5230
5231         kvm_x86_ops = ops;
5232         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5233                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5234
5235         kvm_timer_init();
5236
5237         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5238
5239         if (cpu_has_xsave)
5240                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5241
5242         return 0;
5243
5244 out:
5245         return r;
5246 }
5247
5248 void kvm_arch_exit(void)
5249 {
5250         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5251
5252         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5253                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5254                                             CPUFREQ_TRANSITION_NOTIFIER);
5255         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5256         kvm_x86_ops = NULL;
5257         kvm_mmu_module_exit();
5258 }
5259
5260 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5261 {
5262         ++vcpu->stat.halt_exits;
5263         if (irqchip_in_kernel(vcpu->kvm)) {
5264                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5265                 return 1;
5266         } else {
5267                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5268                 return 0;
5269         }
5270 }
5271 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5272
5273 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5274 {
5275         u64 param, ingpa, outgpa, ret;
5276         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5277         bool fast, longmode;
5278         int cs_db, cs_l;
5279
5280         /*
5281          * hypercall generates UD from non zero cpl and real mode
5282          * per HYPER-V spec
5283          */
5284         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5285                 kvm_queue_exception(vcpu, UD_VECTOR);
5286                 return 0;
5287         }
5288
5289         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5290         longmode = is_long_mode(vcpu) && cs_l == 1;
5291
5292         if (!longmode) {
5293                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5294                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5295                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5296                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5297                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5298                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5299         }
5300 #ifdef CONFIG_X86_64
5301         else {
5302                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5303                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5304                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5305         }
5306 #endif
5307
5308         code = param & 0xffff;
5309         fast = (param >> 16) & 0x1;
5310         rep_cnt = (param >> 32) & 0xfff;
5311         rep_idx = (param >> 48) & 0xfff;
5312
5313         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5314
5315         switch (code) {
5316         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5317                 kvm_vcpu_on_spin(vcpu);
5318                 break;
5319         default:
5320                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5321                 break;
5322         }
5323
5324         ret = res | (((u64)rep_done & 0xfff) << 32);
5325         if (longmode) {
5326                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5327         } else {
5328                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5329                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5330         }
5331
5332         return 1;
5333 }
5334
5335 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5336 {
5337         unsigned long nr, a0, a1, a2, a3, ret;
5338         int r = 1;
5339
5340         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5341                 return kvm_hv_hypercall(vcpu);
5342
5343         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5344         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5345         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5346         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5347         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5348
5349         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5350
5351         if (!is_long_mode(vcpu)) {
5352                 nr &= 0xFFFFFFFF;
5353                 a0 &= 0xFFFFFFFF;
5354                 a1 &= 0xFFFFFFFF;
5355                 a2 &= 0xFFFFFFFF;
5356                 a3 &= 0xFFFFFFFF;
5357         }
5358
5359         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5360                 ret = -KVM_EPERM;
5361                 goto out;
5362         }
5363
5364         switch (nr) {
5365         case KVM_HC_VAPIC_POLL_IRQ:
5366                 ret = 0;
5367                 break;
5368         default:
5369                 ret = -KVM_ENOSYS;
5370                 break;
5371         }
5372 out:
5373         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5374         ++vcpu->stat.hypercalls;
5375         return r;
5376 }
5377 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5378
5379 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5380 {
5381         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5382         char instruction[3];
5383         unsigned long rip = kvm_rip_read(vcpu);
5384
5385         /*
5386          * Blow out the MMU to ensure that no other VCPU has an active mapping
5387          * to ensure that the updated hypercall appears atomically across all
5388          * VCPUs.
5389          */
5390         kvm_mmu_zap_all(vcpu->kvm);
5391
5392         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5393
5394         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5395 }
5396
5397 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5398 {
5399         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5400         int j, nent = vcpu->arch.cpuid_nent;
5401
5402         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5403         /* when no next entry is found, the current entry[i] is reselected */
5404         for (j = i + 1; ; j = (j + 1) % nent) {
5405                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5406                 if (ej->function == e->function) {
5407                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5408                         return j;
5409                 }
5410         }
5411         return 0; /* silence gcc, even though control never reaches here */
5412 }
5413
5414 /* find an entry with matching function, matching index (if needed), and that
5415  * should be read next (if it's stateful) */
5416 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5417         u32 function, u32 index)
5418 {
5419         if (e->function != function)
5420                 return 0;
5421         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5422                 return 0;
5423         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5424             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5425                 return 0;
5426         return 1;
5427 }
5428
5429 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5430                                               u32 function, u32 index)
5431 {
5432         int i;
5433         struct kvm_cpuid_entry2 *best = NULL;
5434
5435         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5436                 struct kvm_cpuid_entry2 *e;
5437
5438                 e = &vcpu->arch.cpuid_entries[i];
5439                 if (is_matching_cpuid_entry(e, function, index)) {
5440                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5441                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5442                         best = e;
5443                         break;
5444                 }
5445         }
5446         return best;
5447 }
5448 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5449
5450 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5451 {
5452         struct kvm_cpuid_entry2 *best;
5453
5454         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5455         if (!best || best->eax < 0x80000008)
5456                 goto not_found;
5457         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5458         if (best)
5459                 return best->eax & 0xff;
5460 not_found:
5461         return 36;
5462 }
5463
5464 /*
5465  * If no match is found, check whether we exceed the vCPU's limit
5466  * and return the content of the highest valid _standard_ leaf instead.
5467  * This is to satisfy the CPUID specification.
5468  */
5469 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5470                                                   u32 function, u32 index)
5471 {
5472         struct kvm_cpuid_entry2 *maxlevel;
5473
5474         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5475         if (!maxlevel || maxlevel->eax >= function)
5476                 return NULL;
5477         if (function & 0x80000000) {
5478                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5479                 if (!maxlevel)
5480                         return NULL;
5481         }
5482         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5483 }
5484
5485 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5486 {
5487         u32 function, index;
5488         struct kvm_cpuid_entry2 *best;
5489
5490         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5491         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5492         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5493         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5494         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5495         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5496         best = kvm_find_cpuid_entry(vcpu, function, index);
5497
5498         if (!best)
5499                 best = check_cpuid_limit(vcpu, function, index);
5500
5501         if (best) {
5502                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5503                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5504                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5505                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5506         }
5507         kvm_x86_ops->skip_emulated_instruction(vcpu);
5508         trace_kvm_cpuid(function,
5509                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5510                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5511                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5512                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5513 }
5514 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5515
5516 /*
5517  * Check if userspace requested an interrupt window, and that the
5518  * interrupt window is open.
5519  *
5520  * No need to exit to userspace if we already have an interrupt queued.
5521  */
5522 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5523 {
5524         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5525                 vcpu->run->request_interrupt_window &&
5526                 kvm_arch_interrupt_allowed(vcpu));
5527 }
5528
5529 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5530 {
5531         struct kvm_run *kvm_run = vcpu->run;
5532
5533         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5534         kvm_run->cr8 = kvm_get_cr8(vcpu);
5535         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5536         if (irqchip_in_kernel(vcpu->kvm))
5537                 kvm_run->ready_for_interrupt_injection = 1;
5538         else
5539                 kvm_run->ready_for_interrupt_injection =
5540                         kvm_arch_interrupt_allowed(vcpu) &&
5541                         !kvm_cpu_has_interrupt(vcpu) &&
5542                         !kvm_event_needs_reinjection(vcpu);
5543 }
5544
5545 static void vapic_enter(struct kvm_vcpu *vcpu)
5546 {
5547         struct kvm_lapic *apic = vcpu->arch.apic;
5548         struct page *page;
5549
5550         if (!apic || !apic->vapic_addr)
5551                 return;
5552
5553         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5554
5555         vcpu->arch.apic->vapic_page = page;
5556 }
5557
5558 static void vapic_exit(struct kvm_vcpu *vcpu)
5559 {
5560         struct kvm_lapic *apic = vcpu->arch.apic;
5561         int idx;
5562
5563         if (!apic || !apic->vapic_addr)
5564                 return;
5565
5566         idx = srcu_read_lock(&vcpu->kvm->srcu);
5567         kvm_release_page_dirty(apic->vapic_page);
5568         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5569         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5570 }
5571
5572 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5573 {
5574         int max_irr, tpr;
5575
5576         if (!kvm_x86_ops->update_cr8_intercept)
5577                 return;
5578
5579         if (!vcpu->arch.apic)
5580                 return;
5581
5582         if (!vcpu->arch.apic->vapic_addr)
5583                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5584         else
5585                 max_irr = -1;
5586
5587         if (max_irr != -1)
5588                 max_irr >>= 4;
5589
5590         tpr = kvm_lapic_get_cr8(vcpu);
5591
5592         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5593 }
5594
5595 static void inject_pending_event(struct kvm_vcpu *vcpu)
5596 {
5597         /* try to reinject previous events if any */
5598         if (vcpu->arch.exception.pending) {
5599                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5600                                         vcpu->arch.exception.has_error_code,
5601                                         vcpu->arch.exception.error_code);
5602                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5603                                           vcpu->arch.exception.has_error_code,
5604                                           vcpu->arch.exception.error_code,
5605                                           vcpu->arch.exception.reinject);
5606                 return;
5607         }
5608
5609         if (vcpu->arch.nmi_injected) {
5610                 kvm_x86_ops->set_nmi(vcpu);
5611                 return;
5612         }
5613
5614         if (vcpu->arch.interrupt.pending) {
5615                 kvm_x86_ops->set_irq(vcpu);
5616                 return;
5617         }
5618
5619         /* try to inject new event if pending */
5620         if (vcpu->arch.nmi_pending) {
5621                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5622                         --vcpu->arch.nmi_pending;
5623                         vcpu->arch.nmi_injected = true;
5624                         kvm_x86_ops->set_nmi(vcpu);
5625                 }
5626         } else if (kvm_cpu_has_interrupt(vcpu)) {
5627                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5628                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5629                                             false);
5630                         kvm_x86_ops->set_irq(vcpu);
5631                 }
5632         }
5633 }
5634
5635 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5636 {
5637         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5638                         !vcpu->guest_xcr0_loaded) {
5639                 /* kvm_set_xcr() also depends on this */
5640                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5641                 vcpu->guest_xcr0_loaded = 1;
5642         }
5643 }
5644
5645 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5646 {
5647         if (vcpu->guest_xcr0_loaded) {
5648                 if (vcpu->arch.xcr0 != host_xcr0)
5649                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5650                 vcpu->guest_xcr0_loaded = 0;
5651         }
5652 }
5653
5654 static void process_nmi(struct kvm_vcpu *vcpu)
5655 {
5656         unsigned limit = 2;
5657
5658         /*
5659          * x86 is limited to one NMI running, and one NMI pending after it.
5660          * If an NMI is already in progress, limit further NMIs to just one.
5661          * Otherwise, allow two (and we'll inject the first one immediately).
5662          */
5663         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5664                 limit = 1;
5665
5666         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5667         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5668         kvm_make_request(KVM_REQ_EVENT, vcpu);
5669 }
5670
5671 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5672 {
5673         int r;
5674         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5675                 vcpu->run->request_interrupt_window;
5676         bool req_immediate_exit = 0;
5677
5678         if (vcpu->requests) {
5679                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5680                         kvm_mmu_unload(vcpu);
5681                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5682                         __kvm_migrate_timers(vcpu);
5683                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5684                         r = kvm_guest_time_update(vcpu);
5685                         if (unlikely(r))
5686                                 goto out;
5687                 }
5688                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5689                         kvm_mmu_sync_roots(vcpu);
5690                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5691                         kvm_x86_ops->tlb_flush(vcpu);
5692                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5693                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5694                         r = 0;
5695                         goto out;
5696                 }
5697                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5698                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5699                         r = 0;
5700                         goto out;
5701                 }
5702                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5703                         vcpu->fpu_active = 0;
5704                         kvm_x86_ops->fpu_deactivate(vcpu);
5705                 }
5706                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5707                         /* Page is swapped out. Do synthetic halt */
5708                         vcpu->arch.apf.halted = true;
5709                         r = 1;
5710                         goto out;
5711                 }
5712                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5713                         record_steal_time(vcpu);
5714                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5715                         process_nmi(vcpu);
5716                 req_immediate_exit =
5717                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5718         }
5719
5720         r = kvm_mmu_reload(vcpu);
5721         if (unlikely(r))
5722                 goto out;
5723
5724         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5725                 inject_pending_event(vcpu);
5726
5727                 /* enable NMI/IRQ window open exits if needed */
5728                 if (vcpu->arch.nmi_pending)
5729                         kvm_x86_ops->enable_nmi_window(vcpu);
5730                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5731                         kvm_x86_ops->enable_irq_window(vcpu);
5732
5733                 if (kvm_lapic_enabled(vcpu)) {
5734                         update_cr8_intercept(vcpu);
5735                         kvm_lapic_sync_to_vapic(vcpu);
5736                 }
5737         }
5738
5739         preempt_disable();
5740
5741         kvm_x86_ops->prepare_guest_switch(vcpu);
5742         if (vcpu->fpu_active)
5743                 kvm_load_guest_fpu(vcpu);
5744         kvm_load_guest_xcr0(vcpu);
5745
5746         vcpu->mode = IN_GUEST_MODE;
5747
5748         /* We should set ->mode before check ->requests,
5749          * see the comment in make_all_cpus_request.
5750          */
5751         smp_mb();
5752
5753         local_irq_disable();
5754
5755         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5756             || need_resched() || signal_pending(current)) {
5757                 vcpu->mode = OUTSIDE_GUEST_MODE;
5758                 smp_wmb();
5759                 local_irq_enable();
5760                 preempt_enable();
5761                 kvm_x86_ops->cancel_injection(vcpu);
5762                 r = 1;
5763                 goto out;
5764         }
5765
5766         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5767
5768         if (req_immediate_exit)
5769                 smp_send_reschedule(vcpu->cpu);
5770
5771         kvm_guest_enter();
5772
5773         if (unlikely(vcpu->arch.switch_db_regs)) {
5774                 set_debugreg(0, 7);
5775                 set_debugreg(vcpu->arch.eff_db[0], 0);
5776                 set_debugreg(vcpu->arch.eff_db[1], 1);
5777                 set_debugreg(vcpu->arch.eff_db[2], 2);
5778                 set_debugreg(vcpu->arch.eff_db[3], 3);
5779         }
5780
5781         trace_kvm_entry(vcpu->vcpu_id);
5782         kvm_x86_ops->run(vcpu);
5783
5784         /*
5785          * If the guest has used debug registers, at least dr7
5786          * will be disabled while returning to the host.
5787          * If we don't have active breakpoints in the host, we don't
5788          * care about the messed up debug address registers. But if
5789          * we have some of them active, restore the old state.
5790          */
5791         if (hw_breakpoint_active())
5792                 hw_breakpoint_restore();
5793
5794         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5795
5796         vcpu->mode = OUTSIDE_GUEST_MODE;
5797         smp_wmb();
5798         local_irq_enable();
5799
5800         ++vcpu->stat.exits;
5801
5802         /*
5803          * We must have an instruction between local_irq_enable() and
5804          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5805          * the interrupt shadow.  The stat.exits increment will do nicely.
5806          * But we need to prevent reordering, hence this barrier():
5807          */
5808         barrier();
5809
5810         kvm_guest_exit();
5811
5812         preempt_enable();
5813
5814         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5815
5816         /*
5817          * Profile KVM exit RIPs:
5818          */
5819         if (unlikely(prof_on == KVM_PROFILING)) {
5820                 unsigned long rip = kvm_rip_read(vcpu);
5821                 profile_hit(KVM_PROFILING, (void *)rip);
5822         }
5823
5824
5825         kvm_lapic_sync_from_vapic(vcpu);
5826
5827         r = kvm_x86_ops->handle_exit(vcpu);
5828 out:
5829         return r;
5830 }
5831
5832
5833 static int __vcpu_run(struct kvm_vcpu *vcpu)
5834 {
5835         int r;
5836         struct kvm *kvm = vcpu->kvm;
5837
5838         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5839                 pr_debug("vcpu %d received sipi with vector # %x\n",
5840                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5841                 kvm_lapic_reset(vcpu);
5842                 r = kvm_arch_vcpu_reset(vcpu);
5843                 if (r)
5844                         return r;
5845                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5846         }
5847
5848         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5849         vapic_enter(vcpu);
5850
5851         r = 1;
5852         while (r > 0) {
5853                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5854                     !vcpu->arch.apf.halted)
5855                         r = vcpu_enter_guest(vcpu);
5856                 else {
5857                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5858                         kvm_vcpu_block(vcpu);
5859                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5860                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5861                         {
5862                                 switch(vcpu->arch.mp_state) {
5863                                 case KVM_MP_STATE_HALTED:
5864                                         vcpu->arch.mp_state =
5865                                                 KVM_MP_STATE_RUNNABLE;
5866                                 case KVM_MP_STATE_RUNNABLE:
5867                                         vcpu->arch.apf.halted = false;
5868                                         break;
5869                                 case KVM_MP_STATE_SIPI_RECEIVED:
5870                                 default:
5871                                         r = -EINTR;
5872                                         break;
5873                                 }
5874                         }
5875                 }
5876
5877                 if (r <= 0)
5878                         break;
5879
5880                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5881                 if (kvm_cpu_has_pending_timer(vcpu))
5882                         kvm_inject_pending_timer_irqs(vcpu);
5883
5884                 if (dm_request_for_irq_injection(vcpu)) {
5885                         r = -EINTR;
5886                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5887                         ++vcpu->stat.request_irq_exits;
5888                 }
5889
5890                 kvm_check_async_pf_completion(vcpu);
5891
5892                 if (signal_pending(current)) {
5893                         r = -EINTR;
5894                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5895                         ++vcpu->stat.signal_exits;
5896                 }
5897                 if (need_resched()) {
5898                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5899                         kvm_resched(vcpu);
5900                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5901                 }
5902         }
5903
5904         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5905
5906         vapic_exit(vcpu);
5907
5908         return r;
5909 }
5910
5911 static int complete_mmio(struct kvm_vcpu *vcpu)
5912 {
5913         struct kvm_run *run = vcpu->run;
5914         int r;
5915
5916         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5917                 return 1;
5918
5919         if (vcpu->mmio_needed) {
5920                 vcpu->mmio_needed = 0;
5921                 if (!vcpu->mmio_is_write)
5922                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5923                                run->mmio.data, 8);
5924                 vcpu->mmio_index += 8;
5925                 if (vcpu->mmio_index < vcpu->mmio_size) {
5926                         run->exit_reason = KVM_EXIT_MMIO;
5927                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5928                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5929                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5930                         run->mmio.is_write = vcpu->mmio_is_write;
5931                         vcpu->mmio_needed = 1;
5932                         return 0;
5933                 }
5934                 if (vcpu->mmio_is_write)
5935                         return 1;
5936                 vcpu->mmio_read_completed = 1;
5937         }
5938         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5939         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5940         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5941         if (r != EMULATE_DONE)
5942                 return 0;
5943         return 1;
5944 }
5945
5946 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5947 {
5948         int r;
5949         sigset_t sigsaved;
5950
5951         if (!tsk_used_math(current) && init_fpu(current))
5952                 return -ENOMEM;
5953
5954         if (vcpu->sigset_active)
5955                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5956
5957         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5958                 kvm_vcpu_block(vcpu);
5959                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5960                 r = -EAGAIN;
5961                 goto out;
5962         }
5963
5964         /* re-sync apic's tpr */
5965         if (!irqchip_in_kernel(vcpu->kvm)) {
5966                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5967                         r = -EINVAL;
5968                         goto out;
5969                 }
5970         }
5971
5972         r = complete_mmio(vcpu);
5973         if (r <= 0)
5974                 goto out;
5975
5976         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5977                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5978                                      kvm_run->hypercall.ret);
5979
5980         r = __vcpu_run(vcpu);
5981
5982 out:
5983         post_kvm_run_save(vcpu);
5984         if (vcpu->sigset_active)
5985                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5986
5987         return r;
5988 }
5989
5990 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5991 {
5992         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5993                 /*
5994                  * We are here if userspace calls get_regs() in the middle of
5995                  * instruction emulation. Registers state needs to be copied
5996                  * back from emulation context to vcpu. Usrapace shouldn't do
5997                  * that usually, but some bad designed PV devices (vmware
5998                  * backdoor interface) need this to work
5999                  */
6000                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6001                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6002                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6003         }
6004         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6005         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6006         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6007         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6008         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6009         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6010         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6011         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6012 #ifdef CONFIG_X86_64
6013         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6014         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6015         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6016         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6017         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6018         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6019         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6020         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6021 #endif
6022
6023         regs->rip = kvm_rip_read(vcpu);
6024         regs->rflags = kvm_get_rflags(vcpu);
6025
6026         return 0;
6027 }
6028
6029 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6030 {
6031         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6032         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6033
6034         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6035         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6036         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6037         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6038         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6039         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6040         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6041         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6042 #ifdef CONFIG_X86_64
6043         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6044         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6045         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6046         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6047         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6048         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6049         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6050         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6051 #endif
6052
6053         kvm_rip_write(vcpu, regs->rip);
6054         kvm_set_rflags(vcpu, regs->rflags);
6055
6056         vcpu->arch.exception.pending = false;
6057
6058         kvm_make_request(KVM_REQ_EVENT, vcpu);
6059
6060         return 0;
6061 }
6062
6063 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6064 {
6065         struct kvm_segment cs;
6066
6067         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6068         *db = cs.db;
6069         *l = cs.l;
6070 }
6071 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6072
6073 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6074                                   struct kvm_sregs *sregs)
6075 {
6076         struct desc_ptr dt;
6077
6078         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6079         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6080         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6081         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6082         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6083         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6084
6085         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6086         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6087
6088         kvm_x86_ops->get_idt(vcpu, &dt);
6089         sregs->idt.limit = dt.size;
6090         sregs->idt.base = dt.address;
6091         kvm_x86_ops->get_gdt(vcpu, &dt);
6092         sregs->gdt.limit = dt.size;
6093         sregs->gdt.base = dt.address;
6094
6095         sregs->cr0 = kvm_read_cr0(vcpu);
6096         sregs->cr2 = vcpu->arch.cr2;
6097         sregs->cr3 = kvm_read_cr3(vcpu);
6098         sregs->cr4 = kvm_read_cr4(vcpu);
6099         sregs->cr8 = kvm_get_cr8(vcpu);
6100         sregs->efer = vcpu->arch.efer;
6101         sregs->apic_base = kvm_get_apic_base(vcpu);
6102
6103         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6104
6105         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6106                 set_bit(vcpu->arch.interrupt.nr,
6107                         (unsigned long *)sregs->interrupt_bitmap);
6108
6109         return 0;
6110 }
6111
6112 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6113                                     struct kvm_mp_state *mp_state)
6114 {
6115         mp_state->mp_state = vcpu->arch.mp_state;
6116         return 0;
6117 }
6118
6119 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6120                                     struct kvm_mp_state *mp_state)
6121 {
6122         vcpu->arch.mp_state = mp_state->mp_state;
6123         kvm_make_request(KVM_REQ_EVENT, vcpu);
6124         return 0;
6125 }
6126
6127 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6128                     bool has_error_code, u32 error_code)
6129 {
6130         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6131         int ret;
6132
6133         init_emulate_ctxt(vcpu);
6134
6135         ret = emulator_task_switch(ctxt, tss_selector, reason,
6136                                    has_error_code, error_code);
6137
6138         if (ret)
6139                 return EMULATE_FAIL;
6140
6141         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6142         kvm_rip_write(vcpu, ctxt->eip);
6143         kvm_set_rflags(vcpu, ctxt->eflags);
6144         kvm_make_request(KVM_REQ_EVENT, vcpu);
6145         return EMULATE_DONE;
6146 }
6147 EXPORT_SYMBOL_GPL(kvm_task_switch);
6148
6149 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6150                                   struct kvm_sregs *sregs)
6151 {
6152         int mmu_reset_needed = 0;
6153         int pending_vec, max_bits, idx;
6154         struct desc_ptr dt;
6155
6156         dt.size = sregs->idt.limit;
6157         dt.address = sregs->idt.base;
6158         kvm_x86_ops->set_idt(vcpu, &dt);
6159         dt.size = sregs->gdt.limit;
6160         dt.address = sregs->gdt.base;
6161         kvm_x86_ops->set_gdt(vcpu, &dt);
6162
6163         vcpu->arch.cr2 = sregs->cr2;
6164         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6165         vcpu->arch.cr3 = sregs->cr3;
6166         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6167
6168         kvm_set_cr8(vcpu, sregs->cr8);
6169
6170         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6171         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6172         kvm_set_apic_base(vcpu, sregs->apic_base);
6173
6174         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6175         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6176         vcpu->arch.cr0 = sregs->cr0;
6177
6178         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6179         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6180         if (sregs->cr4 & X86_CR4_OSXSAVE)
6181                 update_cpuid(vcpu);
6182
6183         idx = srcu_read_lock(&vcpu->kvm->srcu);
6184         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6185                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6186                 mmu_reset_needed = 1;
6187         }
6188         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6189
6190         if (mmu_reset_needed)
6191                 kvm_mmu_reset_context(vcpu);
6192
6193         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6194         pending_vec = find_first_bit(
6195                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6196         if (pending_vec < max_bits) {
6197                 kvm_queue_interrupt(vcpu, pending_vec, false);
6198                 pr_debug("Set back pending irq %d\n", pending_vec);
6199         }
6200
6201         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6202         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6203         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6204         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6205         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6206         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6207
6208         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6209         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6210
6211         update_cr8_intercept(vcpu);
6212
6213         /* Older userspace won't unhalt the vcpu on reset. */
6214         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6215             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6216             !is_protmode(vcpu))
6217                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6218
6219         kvm_make_request(KVM_REQ_EVENT, vcpu);
6220
6221         return 0;
6222 }
6223
6224 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6225                                         struct kvm_guest_debug *dbg)
6226 {
6227         unsigned long rflags;
6228         int i, r;
6229
6230         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6231                 r = -EBUSY;
6232                 if (vcpu->arch.exception.pending)
6233                         goto out;
6234                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6235                         kvm_queue_exception(vcpu, DB_VECTOR);
6236                 else
6237                         kvm_queue_exception(vcpu, BP_VECTOR);
6238         }
6239
6240         /*
6241          * Read rflags as long as potentially injected trace flags are still
6242          * filtered out.
6243          */
6244         rflags = kvm_get_rflags(vcpu);
6245
6246         vcpu->guest_debug = dbg->control;
6247         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6248                 vcpu->guest_debug = 0;
6249
6250         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6251                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6252                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6253                 vcpu->arch.switch_db_regs =
6254                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6255         } else {
6256                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6257                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6258                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6259         }
6260
6261         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6262                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6263                         get_segment_base(vcpu, VCPU_SREG_CS);
6264
6265         /*
6266          * Trigger an rflags update that will inject or remove the trace
6267          * flags.
6268          */
6269         kvm_set_rflags(vcpu, rflags);
6270
6271         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6272
6273         r = 0;
6274
6275 out:
6276
6277         return r;
6278 }
6279
6280 /*
6281  * Translate a guest virtual address to a guest physical address.
6282  */
6283 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6284                                     struct kvm_translation *tr)
6285 {
6286         unsigned long vaddr = tr->linear_address;
6287         gpa_t gpa;
6288         int idx;
6289
6290         idx = srcu_read_lock(&vcpu->kvm->srcu);
6291         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6292         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6293         tr->physical_address = gpa;
6294         tr->valid = gpa != UNMAPPED_GVA;
6295         tr->writeable = 1;
6296         tr->usermode = 0;
6297
6298         return 0;
6299 }
6300
6301 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6302 {
6303         struct i387_fxsave_struct *fxsave =
6304                         &vcpu->arch.guest_fpu.state->fxsave;
6305
6306         memcpy(fpu->fpr, fxsave->st_space, 128);
6307         fpu->fcw = fxsave->cwd;
6308         fpu->fsw = fxsave->swd;
6309         fpu->ftwx = fxsave->twd;
6310         fpu->last_opcode = fxsave->fop;
6311         fpu->last_ip = fxsave->rip;
6312         fpu->last_dp = fxsave->rdp;
6313         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6314
6315         return 0;
6316 }
6317
6318 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6319 {
6320         struct i387_fxsave_struct *fxsave =
6321                         &vcpu->arch.guest_fpu.state->fxsave;
6322
6323         memcpy(fxsave->st_space, fpu->fpr, 128);
6324         fxsave->cwd = fpu->fcw;
6325         fxsave->swd = fpu->fsw;
6326         fxsave->twd = fpu->ftwx;
6327         fxsave->fop = fpu->last_opcode;
6328         fxsave->rip = fpu->last_ip;
6329         fxsave->rdp = fpu->last_dp;
6330         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6331
6332         return 0;
6333 }
6334
6335 int fx_init(struct kvm_vcpu *vcpu)
6336 {
6337         int err;
6338
6339         err = fpu_alloc(&vcpu->arch.guest_fpu);
6340         if (err)
6341                 return err;
6342
6343         fpu_finit(&vcpu->arch.guest_fpu);
6344
6345         /*
6346          * Ensure guest xcr0 is valid for loading
6347          */
6348         vcpu->arch.xcr0 = XSTATE_FP;
6349
6350         vcpu->arch.cr0 |= X86_CR0_ET;
6351
6352         return 0;
6353 }
6354 EXPORT_SYMBOL_GPL(fx_init);
6355
6356 static void fx_free(struct kvm_vcpu *vcpu)
6357 {
6358         fpu_free(&vcpu->arch.guest_fpu);
6359 }
6360
6361 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6362 {
6363         if (vcpu->guest_fpu_loaded)
6364                 return;
6365
6366         /*
6367          * Restore all possible states in the guest,
6368          * and assume host would use all available bits.
6369          * Guest xcr0 would be loaded later.
6370          */
6371         kvm_put_guest_xcr0(vcpu);
6372         vcpu->guest_fpu_loaded = 1;
6373         unlazy_fpu(current);
6374         fpu_restore_checking(&vcpu->arch.guest_fpu);
6375         trace_kvm_fpu(1);
6376 }
6377
6378 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6379 {
6380         kvm_put_guest_xcr0(vcpu);
6381
6382         if (!vcpu->guest_fpu_loaded)
6383                 return;
6384
6385         vcpu->guest_fpu_loaded = 0;
6386         fpu_save_init(&vcpu->arch.guest_fpu);
6387         ++vcpu->stat.fpu_reload;
6388         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6389         trace_kvm_fpu(0);
6390 }
6391
6392 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6393 {
6394         kvmclock_reset(vcpu);
6395
6396         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6397         fx_free(vcpu);
6398         kvm_x86_ops->vcpu_free(vcpu);
6399 }
6400
6401 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6402                                                 unsigned int id)
6403 {
6404         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6405                 printk_once(KERN_WARNING
6406                 "kvm: SMP vm created on host with unstable TSC; "
6407                 "guest TSC will not be reliable\n");
6408         return kvm_x86_ops->vcpu_create(kvm, id);
6409 }
6410
6411 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6412 {
6413         int r;
6414
6415         vcpu->arch.mtrr_state.have_fixed = 1;
6416         vcpu_load(vcpu);
6417         r = kvm_arch_vcpu_reset(vcpu);
6418         if (r == 0)
6419                 r = kvm_mmu_setup(vcpu);
6420         vcpu_put(vcpu);
6421
6422         return r;
6423 }
6424
6425 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6426 {
6427         vcpu->arch.apf.msr_val = 0;
6428
6429         vcpu_load(vcpu);
6430         kvm_mmu_unload(vcpu);
6431         vcpu_put(vcpu);
6432
6433         fx_free(vcpu);
6434         kvm_x86_ops->vcpu_free(vcpu);
6435 }
6436
6437 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6438 {
6439         atomic_set(&vcpu->arch.nmi_queued, 0);
6440         vcpu->arch.nmi_pending = 0;
6441         vcpu->arch.nmi_injected = false;
6442
6443         vcpu->arch.switch_db_regs = 0;
6444         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6445         vcpu->arch.dr6 = DR6_FIXED_1;
6446         vcpu->arch.dr7 = DR7_FIXED_1;
6447
6448         kvm_make_request(KVM_REQ_EVENT, vcpu);
6449         vcpu->arch.apf.msr_val = 0;
6450         vcpu->arch.st.msr_val = 0;
6451
6452         kvmclock_reset(vcpu);
6453
6454         kvm_clear_async_pf_completion_queue(vcpu);
6455         kvm_async_pf_hash_reset(vcpu);
6456         vcpu->arch.apf.halted = false;
6457
6458         return kvm_x86_ops->vcpu_reset(vcpu);
6459 }
6460
6461 int kvm_arch_hardware_enable(void *garbage)
6462 {
6463         struct kvm *kvm;
6464         struct kvm_vcpu *vcpu;
6465         int i;
6466
6467         kvm_shared_msr_cpu_online();
6468         list_for_each_entry(kvm, &vm_list, vm_list)
6469                 kvm_for_each_vcpu(i, vcpu, kvm)
6470                         if (vcpu->cpu == smp_processor_id())
6471                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6472         return kvm_x86_ops->hardware_enable(garbage);
6473 }
6474
6475 void kvm_arch_hardware_disable(void *garbage)
6476 {
6477         kvm_x86_ops->hardware_disable(garbage);
6478         drop_user_return_notifiers(garbage);
6479 }
6480
6481 int kvm_arch_hardware_setup(void)
6482 {
6483         return kvm_x86_ops->hardware_setup();
6484 }
6485
6486 void kvm_arch_hardware_unsetup(void)
6487 {
6488         kvm_x86_ops->hardware_unsetup();
6489 }
6490
6491 void kvm_arch_check_processor_compat(void *rtn)
6492 {
6493         kvm_x86_ops->check_processor_compatibility(rtn);
6494 }
6495
6496 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6497 {
6498         struct page *page;
6499         struct kvm *kvm;
6500         int r;
6501
6502         BUG_ON(vcpu->kvm == NULL);
6503         kvm = vcpu->kvm;
6504
6505         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6506         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6507         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6508         vcpu->arch.mmu.translate_gpa = translate_gpa;
6509         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6510         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6511                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6512         else
6513                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6514
6515         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6516         if (!page) {
6517                 r = -ENOMEM;
6518                 goto fail;
6519         }
6520         vcpu->arch.pio_data = page_address(page);
6521
6522         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6523
6524         r = kvm_mmu_create(vcpu);
6525         if (r < 0)
6526                 goto fail_free_pio_data;
6527
6528         if (irqchip_in_kernel(kvm)) {
6529                 r = kvm_create_lapic(vcpu);
6530                 if (r < 0)
6531                         goto fail_mmu_destroy;
6532         }
6533
6534         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6535                                        GFP_KERNEL);
6536         if (!vcpu->arch.mce_banks) {
6537                 r = -ENOMEM;
6538                 goto fail_free_lapic;
6539         }
6540         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6541
6542         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6543                 goto fail_free_mce_banks;
6544
6545         kvm_async_pf_hash_reset(vcpu);
6546
6547         return 0;
6548 fail_free_mce_banks:
6549         kfree(vcpu->arch.mce_banks);
6550 fail_free_lapic:
6551         kvm_free_lapic(vcpu);
6552 fail_mmu_destroy:
6553         kvm_mmu_destroy(vcpu);
6554 fail_free_pio_data:
6555         free_page((unsigned long)vcpu->arch.pio_data);
6556 fail:
6557         return r;
6558 }
6559
6560 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6561 {
6562         int idx;
6563
6564         kfree(vcpu->arch.mce_banks);
6565         kvm_free_lapic(vcpu);
6566         idx = srcu_read_lock(&vcpu->kvm->srcu);
6567         kvm_mmu_destroy(vcpu);
6568         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6569         free_page((unsigned long)vcpu->arch.pio_data);
6570 }
6571
6572 int kvm_arch_init_vm(struct kvm *kvm)
6573 {
6574         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6575         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6576
6577         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6578         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6579
6580         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6581
6582         return 0;
6583 }
6584
6585 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6586 {
6587         vcpu_load(vcpu);
6588         kvm_mmu_unload(vcpu);
6589         vcpu_put(vcpu);
6590 }
6591
6592 static void kvm_free_vcpus(struct kvm *kvm)
6593 {
6594         unsigned int i;
6595         struct kvm_vcpu *vcpu;
6596
6597         /*
6598          * Unpin any mmu pages first.
6599          */
6600         kvm_for_each_vcpu(i, vcpu, kvm) {
6601                 kvm_clear_async_pf_completion_queue(vcpu);
6602                 kvm_unload_vcpu_mmu(vcpu);
6603         }
6604         kvm_for_each_vcpu(i, vcpu, kvm)
6605                 kvm_arch_vcpu_free(vcpu);
6606
6607         mutex_lock(&kvm->lock);
6608         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6609                 kvm->vcpus[i] = NULL;
6610
6611         atomic_set(&kvm->online_vcpus, 0);
6612         mutex_unlock(&kvm->lock);
6613 }
6614
6615 void kvm_arch_sync_events(struct kvm *kvm)
6616 {
6617         kvm_free_all_assigned_devices(kvm);
6618         kvm_free_pit(kvm);
6619 }
6620
6621 void kvm_arch_destroy_vm(struct kvm *kvm)
6622 {
6623         kvm_iommu_unmap_guest(kvm);
6624         kfree(kvm->arch.vpic);
6625         kfree(kvm->arch.vioapic);
6626         kvm_free_vcpus(kvm);
6627         if (kvm->arch.apic_access_page)
6628                 put_page(kvm->arch.apic_access_page);
6629         if (kvm->arch.ept_identity_pagetable)
6630                 put_page(kvm->arch.ept_identity_pagetable);
6631 }
6632
6633 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6634                                 struct kvm_memory_slot *memslot,
6635                                 struct kvm_memory_slot old,
6636                                 struct kvm_userspace_memory_region *mem,
6637                                 int user_alloc)
6638 {
6639         int npages = memslot->npages;
6640         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6641
6642         /* Prevent internal slot pages from being moved by fork()/COW. */
6643         if (memslot->id >= KVM_MEMORY_SLOTS)
6644                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6645
6646         /*To keep backward compatibility with older userspace,
6647          *x86 needs to hanlde !user_alloc case.
6648          */
6649         if (!user_alloc) {
6650                 if (npages && !old.rmap) {
6651                         unsigned long userspace_addr;
6652
6653                         down_write(&current->mm->mmap_sem);
6654                         userspace_addr = do_mmap(NULL, 0,
6655                                                  npages * PAGE_SIZE,
6656                                                  PROT_READ | PROT_WRITE,
6657                                                  map_flags,
6658                                                  0);
6659                         up_write(&current->mm->mmap_sem);
6660
6661                         if (IS_ERR((void *)userspace_addr))
6662                                 return PTR_ERR((void *)userspace_addr);
6663
6664                         memslot->userspace_addr = userspace_addr;
6665                 }
6666         }
6667
6668
6669         return 0;
6670 }
6671
6672 void kvm_arch_commit_memory_region(struct kvm *kvm,
6673                                 struct kvm_userspace_memory_region *mem,
6674                                 struct kvm_memory_slot old,
6675                                 int user_alloc)
6676 {
6677
6678         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6679
6680         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6681                 int ret;
6682
6683                 down_write(&current->mm->mmap_sem);
6684                 ret = do_munmap(current->mm, old.userspace_addr,
6685                                 old.npages * PAGE_SIZE);
6686                 up_write(&current->mm->mmap_sem);
6687                 if (ret < 0)
6688                         printk(KERN_WARNING
6689                                "kvm_vm_ioctl_set_memory_region: "
6690                                "failed to munmap memory\n");
6691         }
6692
6693         if (!kvm->arch.n_requested_mmu_pages)
6694                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6695
6696         spin_lock(&kvm->mmu_lock);
6697         if (nr_mmu_pages)
6698                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6699         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6700         spin_unlock(&kvm->mmu_lock);
6701 }
6702
6703 void kvm_arch_flush_shadow(struct kvm *kvm)
6704 {
6705         kvm_mmu_zap_all(kvm);
6706         kvm_reload_remote_mmus(kvm);
6707 }
6708
6709 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6710 {
6711         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6712                 !vcpu->arch.apf.halted)
6713                 || !list_empty_careful(&vcpu->async_pf.done)
6714                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6715                 || atomic_read(&vcpu->arch.nmi_queued) ||
6716                 (kvm_arch_interrupt_allowed(vcpu) &&
6717                  kvm_cpu_has_interrupt(vcpu));
6718 }
6719
6720 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6721 {
6722         int me;
6723         int cpu = vcpu->cpu;
6724
6725         if (waitqueue_active(&vcpu->wq)) {
6726                 wake_up_interruptible(&vcpu->wq);
6727                 ++vcpu->stat.halt_wakeup;
6728         }
6729
6730         me = get_cpu();
6731         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6732                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6733                         smp_send_reschedule(cpu);
6734         put_cpu();
6735 }
6736
6737 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6738 {
6739         return kvm_x86_ops->interrupt_allowed(vcpu);
6740 }
6741
6742 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6743 {
6744         unsigned long current_rip = kvm_rip_read(vcpu) +
6745                 get_segment_base(vcpu, VCPU_SREG_CS);
6746
6747         return current_rip == linear_rip;
6748 }
6749 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6750
6751 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6752 {
6753         unsigned long rflags;
6754
6755         rflags = kvm_x86_ops->get_rflags(vcpu);
6756         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6757                 rflags &= ~X86_EFLAGS_TF;
6758         return rflags;
6759 }
6760 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6761
6762 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6763 {
6764         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6765             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6766                 rflags |= X86_EFLAGS_TF;
6767         kvm_x86_ops->set_rflags(vcpu, rflags);
6768         kvm_make_request(KVM_REQ_EVENT, vcpu);
6769 }
6770 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6771
6772 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6773 {
6774         int r;
6775
6776         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6777               is_error_page(work->page))
6778                 return;
6779
6780         r = kvm_mmu_reload(vcpu);
6781         if (unlikely(r))
6782                 return;
6783
6784         if (!vcpu->arch.mmu.direct_map &&
6785               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6786                 return;
6787
6788         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6789 }
6790
6791 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6792 {
6793         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6794 }
6795
6796 static inline u32 kvm_async_pf_next_probe(u32 key)
6797 {
6798         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6799 }
6800
6801 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6802 {
6803         u32 key = kvm_async_pf_hash_fn(gfn);
6804
6805         while (vcpu->arch.apf.gfns[key] != ~0)
6806                 key = kvm_async_pf_next_probe(key);
6807
6808         vcpu->arch.apf.gfns[key] = gfn;
6809 }
6810
6811 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6812 {
6813         int i;
6814         u32 key = kvm_async_pf_hash_fn(gfn);
6815
6816         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6817                      (vcpu->arch.apf.gfns[key] != gfn &&
6818                       vcpu->arch.apf.gfns[key] != ~0); i++)
6819                 key = kvm_async_pf_next_probe(key);
6820
6821         return key;
6822 }
6823
6824 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6825 {
6826         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6827 }
6828
6829 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6830 {
6831         u32 i, j, k;
6832
6833         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6834         while (true) {
6835                 vcpu->arch.apf.gfns[i] = ~0;
6836                 do {
6837                         j = kvm_async_pf_next_probe(j);
6838                         if (vcpu->arch.apf.gfns[j] == ~0)
6839                                 return;
6840                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6841                         /*
6842                          * k lies cyclically in ]i,j]
6843                          * |    i.k.j |
6844                          * |....j i.k.| or  |.k..j i...|
6845                          */
6846                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6847                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6848                 i = j;
6849         }
6850 }
6851
6852 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6853 {
6854
6855         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6856                                       sizeof(val));
6857 }
6858
6859 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6860                                      struct kvm_async_pf *work)
6861 {
6862         struct x86_exception fault;
6863
6864         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6865         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6866
6867         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6868             (vcpu->arch.apf.send_user_only &&
6869              kvm_x86_ops->get_cpl(vcpu) == 0))
6870                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6871         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6872                 fault.vector = PF_VECTOR;
6873                 fault.error_code_valid = true;
6874                 fault.error_code = 0;
6875                 fault.nested_page_fault = false;
6876                 fault.address = work->arch.token;
6877                 kvm_inject_page_fault(vcpu, &fault);
6878         }
6879 }
6880
6881 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6882                                  struct kvm_async_pf *work)
6883 {
6884         struct x86_exception fault;
6885
6886         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6887         if (is_error_page(work->page))
6888                 work->arch.token = ~0; /* broadcast wakeup */
6889         else
6890                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6891
6892         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6893             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6894                 fault.vector = PF_VECTOR;
6895                 fault.error_code_valid = true;
6896                 fault.error_code = 0;
6897                 fault.nested_page_fault = false;
6898                 fault.address = work->arch.token;
6899                 kvm_inject_page_fault(vcpu, &fault);
6900         }
6901         vcpu->arch.apf.halted = false;
6902 }
6903
6904 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6905 {
6906         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6907                 return true;
6908         else
6909                 return !kvm_event_needs_reinjection(vcpu) &&
6910                         kvm_x86_ops->interrupt_allowed(vcpu);
6911 }
6912
6913 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6914 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6915 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6916 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6917 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6918 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6919 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6920 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6921 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6922 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6923 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6924 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);