arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define KVM_MAX_MCE_BANKS 32
  64 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  65
  66 #define emul_to_vcpu(ctxt) \
  67         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  68
  69 /* EFER defaults:
  70  * - enable syscall per default because its emulated by KVM
  71  * - enable LME and LMA per default on 64 bit KVM
  72  */
  73 #ifdef CONFIG_X86_64
  74 static
  75 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  76 #else
  77 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  78 #endif
  79
  80 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  81 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  82
  83 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  84 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  85                                     struct kvm_cpuid_entry2 __user *entries);
  86
  87 struct kvm_x86_ops *kvm_x86_ops;
  88 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  89
  90 int ignore_msrs = 0;
  91 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  92
  93 bool kvm_has_tsc_control;
  94 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  95 u32  kvm_max_guest_tsc_khz;
  96 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  97
  98 #define KVM_NR_SHARED_MSRS 16
  99
 100 struct kvm_shared_msrs_global {
 101         int nr;
 102         u32 msrs[KVM_NR_SHARED_MSRS];
 103 };
 104
 105 struct kvm_shared_msrs {
 106         struct user_return_notifier urn;
 107         bool registered;
 108         struct kvm_shared_msr_values {
 109                 u64 host;
 110                 u64 curr;
 111         } values[KVM_NR_SHARED_MSRS];
 112 };
 113
 114 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 115 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 116
 117 struct kvm_stats_debugfs_item debugfs_entries[] = {
 118         { "pf_fixed", VCPU_STAT(pf_fixed) },
 119         { "pf_guest", VCPU_STAT(pf_guest) },
 120         { "tlb_flush", VCPU_STAT(tlb_flush) },
 121         { "invlpg", VCPU_STAT(invlpg) },
 122         { "exits", VCPU_STAT(exits) },
 123         { "io_exits", VCPU_STAT(io_exits) },
 124         { "mmio_exits", VCPU_STAT(mmio_exits) },
 125         { "signal_exits", VCPU_STAT(signal_exits) },
 126         { "irq_window", VCPU_STAT(irq_window_exits) },
 127         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 128         { "halt_exits", VCPU_STAT(halt_exits) },
 129         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 130         { "hypercalls", VCPU_STAT(hypercalls) },
 131         { "request_irq", VCPU_STAT(request_irq_exits) },
 132         { "irq_exits", VCPU_STAT(irq_exits) },
 133         { "host_state_reload", VCPU_STAT(host_state_reload) },
 134         { "efer_reload", VCPU_STAT(efer_reload) },
 135         { "fpu_reload", VCPU_STAT(fpu_reload) },
 136         { "insn_emulation", VCPU_STAT(insn_emulation) },
 137         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 138         { "irq_injections", VCPU_STAT(irq_injections) },
 139         { "nmi_injections", VCPU_STAT(nmi_injections) },
 140         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 141         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 142         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 143         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 144         { "mmu_flooded", VM_STAT(mmu_flooded) },
 145         { "mmu_recycled", VM_STAT(mmu_recycled) },
 146         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 147         { "mmu_unsync", VM_STAT(mmu_unsync) },
 148         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 149         { "largepages", VM_STAT(lpages) },
 150         { NULL }
 151 };
 152
 153 u64 __read_mostly host_xcr0;
 154
 155 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 156
 157 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 158 {
 159         int i;
 160         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 161                 vcpu->arch.apf.gfns[i] = ~0;
 162 }
 163
 164 static void kvm_on_user_return(struct user_return_notifier *urn)
 165 {
 166         unsigned slot;
 167         struct kvm_shared_msrs *locals
 168                 = container_of(urn, struct kvm_shared_msrs, urn);
 169         struct kvm_shared_msr_values *values;
 170
 171         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 172                 values = &locals->values[slot];
 173                 if (values->host != values->curr) {
 174                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 175                         values->curr = values->host;
 176                 }
 177         }
 178         locals->registered = false;
 179         user_return_notifier_unregister(urn);
 180 }
 181
 182 static void shared_msr_update(unsigned slot, u32 msr)
 183 {
 184         struct kvm_shared_msrs *smsr;
 185         u64 value;
 186
 187         smsr = &__get_cpu_var(shared_msrs);
 188         /* only read, and nobody should modify it at this time,
 189          * so don't need lock */
 190         if (slot >= shared_msrs_global.nr) {
 191                 printk(KERN_ERR "kvm: invalid MSR slot!");
 192                 return;
 193         }
 194         rdmsrl_safe(msr, &value);
 195         smsr->values[slot].host = value;
 196         smsr->values[slot].curr = value;
 197 }
 198
 199 void kvm_define_shared_msr(unsigned slot, u32 msr)
 200 {
 201         if (slot >= shared_msrs_global.nr)
 202                 shared_msrs_global.nr = slot + 1;
 203         shared_msrs_global.msrs[slot] = msr;
 204         /* we need ensured the shared_msr_global have been updated */
 205         smp_wmb();
 206 }
 207 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 208
 209 static void kvm_shared_msr_cpu_online(void)
 210 {
 211         unsigned i;
 212
 213         for (i = 0; i < shared_msrs_global.nr; ++i)
 214                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 215 }
 216
 217 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 218 {
 219         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 220
 221         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 222                 return;
 223         smsr->values[slot].curr = value;
 224         wrmsrl(shared_msrs_global.msrs[slot], value);
 225         if (!smsr->registered) {
 226                 smsr->urn.on_user_return = kvm_on_user_return;
 227                 user_return_notifier_register(&smsr->urn);
 228                 smsr->registered = true;
 229         }
 230 }
 231 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 232
 233 static void drop_user_return_notifiers(void *ignore)
 234 {
 235         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 236
 237         if (smsr->registered)
 238                 kvm_on_user_return(&smsr->urn);
 239 }
 240
 241 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 242 {
 243         if (irqchip_in_kernel(vcpu->kvm))
 244                 return vcpu->arch.apic_base;
 245         else
 246                 return vcpu->arch.apic_base;
 247 }
 248 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 249
 250 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 251 {
 252         /* TODO: reserve bits check */
 253         if (irqchip_in_kernel(vcpu->kvm))
 254                 kvm_lapic_set_base(vcpu, data);
 255         else
 256                 vcpu->arch.apic_base = data;
 257 }
 258 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 259
 260 #define EXCPT_BENIGN            0
 261 #define EXCPT_CONTRIBUTORY      1
 262 #define EXCPT_PF                2
 263
 264 static int exception_class(int vector)
 265 {
 266         switch (vector) {
 267         case PF_VECTOR:
 268                 return EXCPT_PF;
 269         case DE_VECTOR:
 270         case TS_VECTOR:
 271         case NP_VECTOR:
 272         case SS_VECTOR:
 273         case GP_VECTOR:
 274                 return EXCPT_CONTRIBUTORY;
 275         default:
 276                 break;
 277         }
 278         return EXCPT_BENIGN;
 279 }
 280
 281 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 282                 unsigned nr, bool has_error, u32 error_code,
 283                 bool reinject)
 284 {
 285         u32 prev_nr;
 286         int class1, class2;
 287
 288         kvm_make_request(KVM_REQ_EVENT, vcpu);
 289
 290         if (!vcpu->arch.exception.pending) {
 291         queue:
 292                 vcpu->arch.exception.pending = true;
 293                 vcpu->arch.exception.has_error_code = has_error;
 294                 vcpu->arch.exception.nr = nr;
 295                 vcpu->arch.exception.error_code = error_code;
 296                 vcpu->arch.exception.reinject = reinject;
 297                 return;
 298         }
 299
 300         /* to check exception */
 301         prev_nr = vcpu->arch.exception.nr;
 302         if (prev_nr == DF_VECTOR) {
 303                 /* triple fault -> shutdown */
 304                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 305                 return;
 306         }
 307         class1 = exception_class(prev_nr);
 308         class2 = exception_class(nr);
 309         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 310                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 311                 /* generate double fault per SDM Table 5-5 */
 312                 vcpu->arch.exception.pending = true;
 313                 vcpu->arch.exception.has_error_code = true;
 314                 vcpu->arch.exception.nr = DF_VECTOR;
 315                 vcpu->arch.exception.error_code = 0;
 316         } else
 317                 /* replace previous exception with a new one in a hope
 318                    that instruction re-execution will regenerate lost
 319                    exception */
 320                 goto queue;
 321 }
 322
 323 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 324 {
 325         kvm_multiple_exception(vcpu, nr, false, 0, false);
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 328
 329 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 330 {
 331         kvm_multiple_exception(vcpu, nr, false, 0, true);
 332 }
 333 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 334
 335 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 336 {
 337         if (err)
 338                 kvm_inject_gp(vcpu, 0);
 339         else
 340                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 341 }
 342 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 343
 344 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 345 {
 346         ++vcpu->stat.pf_guest;
 347         vcpu->arch.cr2 = fault->address;
 348         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 349 }
 350
 351 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 352 {
 353         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 354                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 355         else
 356                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 357 }
 358
 359 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 360 {
 361         kvm_make_request(KVM_REQ_EVENT, vcpu);
 362         vcpu->arch.nmi_pending = 1;
 363 }
 364 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 365
 366 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 367 {
 368         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 371
 372 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 377
 378 /*
 379  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 380  * a #GP and return false.
 381  */
 382 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 383 {
 384         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 385                 return true;
 386         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 387         return false;
 388 }
 389 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 390
 391 /*
 392  * This function will be used to read from the physical memory of the currently
 393  * running guest. The difference to kvm_read_guest_page is that this function
 394  * can read from guest physical or from the guest's guest physical memory.
 395  */
 396 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 397                             gfn_t ngfn, void *data, int offset, int len,
 398                             u32 access)
 399 {
 400         gfn_t real_gfn;
 401         gpa_t ngpa;
 402
 403         ngpa     = gfn_to_gpa(ngfn);
 404         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 405         if (real_gfn == UNMAPPED_GVA)
 406                 return -EFAULT;
 407
 408         real_gfn = gpa_to_gfn(real_gfn);
 409
 410         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 411 }
 412 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 413
 414 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 415                                void *data, int offset, int len, u32 access)
 416 {
 417         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 418                                        data, offset, len, access);
 419 }
 420
 421 /*
 422  * Load the pae pdptrs.  Return true is they are all valid.
 423  */
 424 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 425 {
 426         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 427         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 428         int i;
 429         int ret;
 430         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 431
 432         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 433                                       offset * sizeof(u64), sizeof(pdpte),
 434                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 435         if (ret < 0) {
 436                 ret = 0;
 437                 goto out;
 438         }
 439         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 440                 if (is_present_gpte(pdpte[i]) &&
 441                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 442                         ret = 0;
 443                         goto out;
 444                 }
 445         }
 446         ret = 1;
 447
 448         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 449         __set_bit(VCPU_EXREG_PDPTR,
 450                   (unsigned long *)&vcpu->arch.regs_avail);
 451         __set_bit(VCPU_EXREG_PDPTR,
 452                   (unsigned long *)&vcpu->arch.regs_dirty);
 453 out:
 454
 455         return ret;
 456 }
 457 EXPORT_SYMBOL_GPL(load_pdptrs);
 458
 459 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 460 {
 461         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 462         bool changed = true;
 463         int offset;
 464         gfn_t gfn;
 465         int r;
 466
 467         if (is_long_mode(vcpu) || !is_pae(vcpu))
 468                 return false;
 469
 470         if (!test_bit(VCPU_EXREG_PDPTR,
 471                       (unsigned long *)&vcpu->arch.regs_avail))
 472                 return true;
 473
 474         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 475         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 476         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 477                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 478         if (r < 0)
 479                 goto out;
 480         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 481 out:
 482
 483         return changed;
 484 }
 485
 486 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 487 {
 488         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 489         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 490                                     X86_CR0_CD | X86_CR0_NW;
 491
 492         cr0 |= X86_CR0_ET;
 493
 494 #ifdef CONFIG_X86_64
 495         if (cr0 & 0xffffffff00000000UL)
 496                 return 1;
 497 #endif
 498
 499         cr0 &= ~CR0_RESERVED_BITS;
 500
 501         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 502                 return 1;
 503
 504         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 505                 return 1;
 506
 507         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 508 #ifdef CONFIG_X86_64
 509                 if ((vcpu->arch.efer & EFER_LME)) {
 510                         int cs_db, cs_l;
 511
 512                         if (!is_pae(vcpu))
 513                                 return 1;
 514                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 515                         if (cs_l)
 516                                 return 1;
 517                 } else
 518 #endif
 519                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 520                                                  kvm_read_cr3(vcpu)))
 521                         return 1;
 522         }
 523
 524         kvm_x86_ops->set_cr0(vcpu, cr0);
 525
 526         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 527                 kvm_clear_async_pf_completion_queue(vcpu);
 528                 kvm_async_pf_hash_reset(vcpu);
 529         }
 530
 531         if ((cr0 ^ old_cr0) & update_bits)
 532                 kvm_mmu_reset_context(vcpu);
 533         return 0;
 534 }
 535 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 536
 537 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 538 {
 539         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_lmsw);
 542
 543 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 544 {
 545         u64 xcr0;
 546
 547         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 548         if (index != XCR_XFEATURE_ENABLED_MASK)
 549                 return 1;
 550         xcr0 = xcr;
 551         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 552                 return 1;
 553         if (!(xcr0 & XSTATE_FP))
 554                 return 1;
 555         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 556                 return 1;
 557         if (xcr0 & ~host_xcr0)
 558                 return 1;
 559         vcpu->arch.xcr0 = xcr0;
 560         vcpu->guest_xcr0_loaded = 0;
 561         return 0;
 562 }
 563
 564 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 565 {
 566         if (__kvm_set_xcr(vcpu, index, xcr)) {
 567                 kvm_inject_gp(vcpu, 0);
 568                 return 1;
 569         }
 570         return 0;
 571 }
 572 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 573
 574 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 575 {
 576         struct kvm_cpuid_entry2 *best;
 577
 578         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 579         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 580 }
 581
 582 static void update_cpuid(struct kvm_vcpu *vcpu)
 583 {
 584         struct kvm_cpuid_entry2 *best;
 585
 586         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 587         if (!best)
 588                 return;
 589
 590         /* Update OSXSAVE bit */
 591         if (cpu_has_xsave && best->function == 0x1) {
 592                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 593                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 594                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 595         }
 596 }
 597
 598 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 599 {
 600         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 601         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 602
 603         if (cr4 & CR4_RESERVED_BITS)
 604                 return 1;
 605
 606         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 607                 return 1;
 608
 609         if (is_long_mode(vcpu)) {
 610                 if (!(cr4 & X86_CR4_PAE))
 611                         return 1;
 612         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 613                    && ((cr4 ^ old_cr4) & pdptr_bits)
 614                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 615                                    kvm_read_cr3(vcpu)))
 616                 return 1;
 617
 618         if (cr4 & X86_CR4_VMXE)
 619                 return 1;
 620
 621         kvm_x86_ops->set_cr4(vcpu, cr4);
 622
 623         if ((cr4 ^ old_cr4) & pdptr_bits)
 624                 kvm_mmu_reset_context(vcpu);
 625
 626         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 627                 update_cpuid(vcpu);
 628
 629         return 0;
 630 }
 631 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 632
 633 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 634 {
 635         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 636                 kvm_mmu_sync_roots(vcpu);
 637                 kvm_mmu_flush_tlb(vcpu);
 638                 return 0;
 639         }
 640
 641         if (is_long_mode(vcpu)) {
 642                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 643                         return 1;
 644         } else {
 645                 if (is_pae(vcpu)) {
 646                         if (cr3 & CR3_PAE_RESERVED_BITS)
 647                                 return 1;
 648                         if (is_paging(vcpu) &&
 649                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 650                                 return 1;
 651                 }
 652                 /*
 653                  * We don't check reserved bits in nonpae mode, because
 654                  * this isn't enforced, and VMware depends on this.
 655                  */
 656         }
 657
 658         /*
 659          * Does the new cr3 value map to physical memory? (Note, we
 660          * catch an invalid cr3 even in real-mode, because it would
 661          * cause trouble later on when we turn on paging anyway.)
 662          *
 663          * A real CPU would silently accept an invalid cr3 and would
 664          * attempt to use it - with largely undefined (and often hard
 665          * to debug) behavior on the guest side.
 666          */
 667         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 668                 return 1;
 669         vcpu->arch.cr3 = cr3;
 670         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 671         vcpu->arch.mmu.new_cr3(vcpu);
 672         return 0;
 673 }
 674 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 675
 676 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 677 {
 678         if (cr8 & CR8_RESERVED_BITS)
 679                 return 1;
 680         if (irqchip_in_kernel(vcpu->kvm))
 681                 kvm_lapic_set_tpr(vcpu, cr8);
 682         else
 683                 vcpu->arch.cr8 = cr8;
 684         return 0;
 685 }
 686 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 687
 688 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 689 {
 690         if (irqchip_in_kernel(vcpu->kvm))
 691                 return kvm_lapic_get_cr8(vcpu);
 692         else
 693                 return vcpu->arch.cr8;
 694 }
 695 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 696
 697 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 698 {
 699         switch (dr) {
 700         case 0 ... 3:
 701                 vcpu->arch.db[dr] = val;
 702                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 703                         vcpu->arch.eff_db[dr] = val;
 704                 break;
 705         case 4:
 706                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 707                         return 1; /* #UD */
 708                 /* fall through */
 709         case 6:
 710                 if (val & 0xffffffff00000000ULL)
 711                         return -1; /* #GP */
 712                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 713                 break;
 714         case 5:
 715                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 716                         return 1; /* #UD */
 717                 /* fall through */
 718         default: /* 7 */
 719                 if (val & 0xffffffff00000000ULL)
 720                         return -1; /* #GP */
 721                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 722                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 723                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 724                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 725                 }
 726                 break;
 727         }
 728
 729         return 0;
 730 }
 731
 732 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 733 {
 734         int res;
 735
 736         res = __kvm_set_dr(vcpu, dr, val);
 737         if (res > 0)
 738                 kvm_queue_exception(vcpu, UD_VECTOR);
 739         else if (res < 0)
 740                 kvm_inject_gp(vcpu, 0);
 741
 742         return res;
 743 }
 744 EXPORT_SYMBOL_GPL(kvm_set_dr);
 745
 746 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 747 {
 748         switch (dr) {
 749         case 0 ... 3:
 750                 *val = vcpu->arch.db[dr];
 751                 break;
 752         case 4:
 753                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 754                         return 1;
 755                 /* fall through */
 756         case 6:
 757                 *val = vcpu->arch.dr6;
 758                 break;
 759         case 5:
 760                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 761                         return 1;
 762                 /* fall through */
 763         default: /* 7 */
 764                 *val = vcpu->arch.dr7;
 765                 break;
 766         }
 767
 768         return 0;
 769 }
 770
 771 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 772 {
 773         if (_kvm_get_dr(vcpu, dr, val)) {
 774                 kvm_queue_exception(vcpu, UD_VECTOR);
 775                 return 1;
 776         }
 777         return 0;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_get_dr);
 780
 781 /*
 782  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 783  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 784  *
 785  * This list is modified at module load time to reflect the
 786  * capabilities of the host cpu. This capabilities test skips MSRs that are
 787  * kvm-specific. Those are put in the beginning of the list.
 788  */
 789
 790 #define KVM_SAVE_MSRS_BEGIN     8
 791 static u32 msrs_to_save[] = {
 792         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 793         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 794         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 795         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 796         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 797         MSR_STAR,
 798 #ifdef CONFIG_X86_64
 799         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 800 #endif
 801         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 802 };
 803
 804 static unsigned num_msrs_to_save;
 805
 806 static u32 emulated_msrs[] = {
 807         MSR_IA32_MISC_ENABLE,
 808         MSR_IA32_MCG_STATUS,
 809         MSR_IA32_MCG_CTL,
 810 };
 811
 812 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 813 {
 814         u64 old_efer = vcpu->arch.efer;
 815
 816         if (efer & efer_reserved_bits)
 817                 return 1;
 818
 819         if (is_paging(vcpu)
 820             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 821                 return 1;
 822
 823         if (efer & EFER_FFXSR) {
 824                 struct kvm_cpuid_entry2 *feat;
 825
 826                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 827                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 828                         return 1;
 829         }
 830
 831         if (efer & EFER_SVME) {
 832                 struct kvm_cpuid_entry2 *feat;
 833
 834                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 835                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 836                         return 1;
 837         }
 838
 839         efer &= ~EFER_LMA;
 840         efer |= vcpu->arch.efer & EFER_LMA;
 841
 842         kvm_x86_ops->set_efer(vcpu, efer);
 843
 844         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 845
 846         /* Update reserved bits */
 847         if ((efer ^ old_efer) & EFER_NX)
 848                 kvm_mmu_reset_context(vcpu);
 849
 850         return 0;
 851 }
 852
 853 void kvm_enable_efer_bits(u64 mask)
 854 {
 855        efer_reserved_bits &= ~mask;
 856 }
 857 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 858
 859
 860 /*
 861  * Writes msr value into into the appropriate "register".
 862  * Returns 0 on success, non-0 otherwise.
 863  * Assumes vcpu_load() was already called.
 864  */
 865 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 866 {
 867         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 868 }
 869
 870 /*
 871  * Adapt set_msr() to msr_io()'s calling convention
 872  */
 873 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 874 {
 875         return kvm_set_msr(vcpu, index, *data);
 876 }
 877
 878 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 879 {
 880         int version;
 881         int r;
 882         struct pvclock_wall_clock wc;
 883         struct timespec boot;
 884
 885         if (!wall_clock)
 886                 return;
 887
 888         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 889         if (r)
 890                 return;
 891
 892         if (version & 1)
 893                 ++version;  /* first time write, random junk */
 894
 895         ++version;
 896
 897         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 898
 899         /*
 900          * The guest calculates current wall clock time by adding
 901          * system time (updated by kvm_guest_time_update below) to the
 902          * wall clock specified here.  guest system time equals host
 903          * system time for us, thus we must fill in host boot time here.
 904          */
 905         getboottime(&boot);
 906
 907         wc.sec = boot.tv_sec;
 908         wc.nsec = boot.tv_nsec;
 909         wc.version = version;
 910
 911         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 912
 913         version++;
 914         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 915 }
 916
 917 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 918 {
 919         uint32_t quotient, remainder;
 920
 921         /* Don't try to replace with do_div(), this one calculates
 922          * "(dividend << 32) / divisor" */
 923         __asm__ ( "divl %4"
 924                   : "=a" (quotient), "=d" (remainder)
 925                   : "0" (0), "1" (dividend), "r" (divisor) );
 926         return quotient;
 927 }
 928
 929 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 930                                s8 *pshift, u32 *pmultiplier)
 931 {
 932         uint64_t scaled64;
 933         int32_t  shift = 0;
 934         uint64_t tps64;
 935         uint32_t tps32;
 936
 937         tps64 = base_khz * 1000LL;
 938         scaled64 = scaled_khz * 1000LL;
 939         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 940                 tps64 >>= 1;
 941                 shift--;
 942         }
 943
 944         tps32 = (uint32_t)tps64;
 945         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 946                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 947                         scaled64 >>= 1;
 948                 else
 949                         tps32 <<= 1;
 950                 shift++;
 951         }
 952
 953         *pshift = shift;
 954         *pmultiplier = div_frac(scaled64, tps32);
 955
 956         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 957                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 958 }
 959
 960 static inline u64 get_kernel_ns(void)
 961 {
 962         struct timespec ts;
 963
 964         WARN_ON(preemptible());
 965         ktime_get_ts(&ts);
 966         monotonic_to_bootbased(&ts);
 967         return timespec_to_ns(&ts);
 968 }
 969
 970 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 971 unsigned long max_tsc_khz;
 972
 973 static inline int kvm_tsc_changes_freq(void)
 974 {
 975         int cpu = get_cpu();
 976         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 977                   cpufreq_quick_get(cpu) != 0;
 978         put_cpu();
 979         return ret;
 980 }
 981
 982 static u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
 983 {
 984         if (vcpu->arch.virtual_tsc_khz)
 985                 return vcpu->arch.virtual_tsc_khz;
 986         else
 987                 return __this_cpu_read(cpu_tsc_khz);
 988 }
 989
 990 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 991 {
 992         u64 ret;
 993
 994         WARN_ON(preemptible());
 995         if (kvm_tsc_changes_freq())
 996                 printk_once(KERN_WARNING
 997                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 998         ret = nsec * vcpu_tsc_khz(vcpu);
 999         do_div(ret, USEC_PER_SEC);
1000         return ret;
1001 }
1002
1003 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1004 {
1005         /* Compute a scale to convert nanoseconds in TSC cycles */
1006         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1007                            &vcpu->arch.tsc_catchup_shift,
1008                            &vcpu->arch.tsc_catchup_mult);
1009 }
1010
1011 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1012 {
1013         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1014                                       vcpu->arch.tsc_catchup_mult,
1015                                       vcpu->arch.tsc_catchup_shift);
1016         tsc += vcpu->arch.last_tsc_write;
1017         return tsc;
1018 }
1019
1020 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1021 {
1022         struct kvm *kvm = vcpu->kvm;
1023         u64 offset, ns, elapsed;
1024         unsigned long flags;
1025         s64 sdiff;
1026
1027         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1028         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1029         ns = get_kernel_ns();
1030         elapsed = ns - kvm->arch.last_tsc_nsec;
1031         sdiff = data - kvm->arch.last_tsc_write;
1032         if (sdiff < 0)
1033                 sdiff = -sdiff;
1034
1035         /*
1036          * Special case: close write to TSC within 5 seconds of
1037          * another CPU is interpreted as an attempt to synchronize
1038          * The 5 seconds is to accommodate host load / swapping as
1039          * well as any reset of TSC during the boot process.
1040          *
1041          * In that case, for a reliable TSC, we can match TSC offsets,
1042          * or make a best guest using elapsed value.
1043          */
1044         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1045             elapsed < 5ULL * NSEC_PER_SEC) {
1046                 if (!check_tsc_unstable()) {
1047                         offset = kvm->arch.last_tsc_offset;
1048                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1049                 } else {
1050                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1051                         offset += delta;
1052                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1053                 }
1054                 ns = kvm->arch.last_tsc_nsec;
1055         }
1056         kvm->arch.last_tsc_nsec = ns;
1057         kvm->arch.last_tsc_write = data;
1058         kvm->arch.last_tsc_offset = offset;
1059         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1060         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1061
1062         /* Reset of TSC must disable overshoot protection below */
1063         vcpu->arch.hv_clock.tsc_timestamp = 0;
1064         vcpu->arch.last_tsc_write = data;
1065         vcpu->arch.last_tsc_nsec = ns;
1066 }
1067 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1068
1069 static int kvm_guest_time_update(struct kvm_vcpu *v)
1070 {
1071         unsigned long flags;
1072         struct kvm_vcpu_arch *vcpu = &v->arch;
1073         void *shared_kaddr;
1074         unsigned long this_tsc_khz;
1075         s64 kernel_ns, max_kernel_ns;
1076         u64 tsc_timestamp;
1077
1078         /* Keep irq disabled to prevent changes to the clock */
1079         local_irq_save(flags);
1080         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1081         kernel_ns = get_kernel_ns();
1082         this_tsc_khz = vcpu_tsc_khz(v);
1083         if (unlikely(this_tsc_khz == 0)) {
1084                 local_irq_restore(flags);
1085                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1086                 return 1;
1087         }
1088
1089         /*
1090          * We may have to catch up the TSC to match elapsed wall clock
1091          * time for two reasons, even if kvmclock is used.
1092          *   1) CPU could have been running below the maximum TSC rate
1093          *   2) Broken TSC compensation resets the base at each VCPU
1094          *      entry to avoid unknown leaps of TSC even when running
1095          *      again on the same CPU.  This may cause apparent elapsed
1096          *      time to disappear, and the guest to stand still or run
1097          *      very slowly.
1098          */
1099         if (vcpu->tsc_catchup) {
1100                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1101                 if (tsc > tsc_timestamp) {
1102                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1103                         tsc_timestamp = tsc;
1104                 }
1105         }
1106
1107         local_irq_restore(flags);
1108
1109         if (!vcpu->time_page)
1110                 return 0;
1111
1112         /*
1113          * Time as measured by the TSC may go backwards when resetting the base
1114          * tsc_timestamp.  The reason for this is that the TSC resolution is
1115          * higher than the resolution of the other clock scales.  Thus, many
1116          * possible measurments of the TSC correspond to one measurement of any
1117          * other clock, and so a spread of values is possible.  This is not a
1118          * problem for the computation of the nanosecond clock; with TSC rates
1119          * around 1GHZ, there can only be a few cycles which correspond to one
1120          * nanosecond value, and any path through this code will inevitably
1121          * take longer than that.  However, with the kernel_ns value itself,
1122          * the precision may be much lower, down to HZ granularity.  If the
1123          * first sampling of TSC against kernel_ns ends in the low part of the
1124          * range, and the second in the high end of the range, we can get:
1125          *
1126          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1127          *
1128          * As the sampling errors potentially range in the thousands of cycles,
1129          * it is possible such a time value has already been observed by the
1130          * guest.  To protect against this, we must compute the system time as
1131          * observed by the guest and ensure the new system time is greater.
1132          */
1133         max_kernel_ns = 0;
1134         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1135                 max_kernel_ns = vcpu->last_guest_tsc -
1136                                 vcpu->hv_clock.tsc_timestamp;
1137                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1138                                     vcpu->hv_clock.tsc_to_system_mul,
1139                                     vcpu->hv_clock.tsc_shift);
1140                 max_kernel_ns += vcpu->last_kernel_ns;
1141         }
1142
1143         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1144                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1145                                    &vcpu->hv_clock.tsc_shift,
1146                                    &vcpu->hv_clock.tsc_to_system_mul);
1147                 vcpu->hw_tsc_khz = this_tsc_khz;
1148         }
1149
1150         if (max_kernel_ns > kernel_ns)
1151                 kernel_ns = max_kernel_ns;
1152
1153         /* With all the info we got, fill in the values */
1154         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1155         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1156         vcpu->last_kernel_ns = kernel_ns;
1157         vcpu->last_guest_tsc = tsc_timestamp;
1158         vcpu->hv_clock.flags = 0;
1159
1160         /*
1161          * The interface expects us to write an even number signaling that the
1162          * update is finished. Since the guest won't see the intermediate
1163          * state, we just increase by 2 at the end.
1164          */
1165         vcpu->hv_clock.version += 2;
1166
1167         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1168
1169         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1170                sizeof(vcpu->hv_clock));
1171
1172         kunmap_atomic(shared_kaddr, KM_USER0);
1173
1174         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1175         return 0;
1176 }
1177
1178 static bool msr_mtrr_valid(unsigned msr)
1179 {
1180         switch (msr) {
1181         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1182         case MSR_MTRRfix64K_00000:
1183         case MSR_MTRRfix16K_80000:
1184         case MSR_MTRRfix16K_A0000:
1185         case MSR_MTRRfix4K_C0000:
1186         case MSR_MTRRfix4K_C8000:
1187         case MSR_MTRRfix4K_D0000:
1188         case MSR_MTRRfix4K_D8000:
1189         case MSR_MTRRfix4K_E0000:
1190         case MSR_MTRRfix4K_E8000:
1191         case MSR_MTRRfix4K_F0000:
1192         case MSR_MTRRfix4K_F8000:
1193         case MSR_MTRRdefType:
1194         case MSR_IA32_CR_PAT:
1195                 return true;
1196         case 0x2f8:
1197                 return true;
1198         }
1199         return false;
1200 }
1201
1202 static bool valid_pat_type(unsigned t)
1203 {
1204         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1205 }
1206
1207 static bool valid_mtrr_type(unsigned t)
1208 {
1209         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1210 }
1211
1212 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1213 {
1214         int i;
1215
1216         if (!msr_mtrr_valid(msr))
1217                 return false;
1218
1219         if (msr == MSR_IA32_CR_PAT) {
1220                 for (i = 0; i < 8; i++)
1221                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1222                                 return false;
1223                 return true;
1224         } else if (msr == MSR_MTRRdefType) {
1225                 if (data & ~0xcff)
1226                         return false;
1227                 return valid_mtrr_type(data & 0xff);
1228         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1229                 for (i = 0; i < 8 ; i++)
1230                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1231                                 return false;
1232                 return true;
1233         }
1234
1235         /* variable MTRRs */
1236         return valid_mtrr_type(data & 0xff);
1237 }
1238
1239 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1240 {
1241         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1242
1243         if (!mtrr_valid(vcpu, msr, data))
1244                 return 1;
1245
1246         if (msr == MSR_MTRRdefType) {
1247                 vcpu->arch.mtrr_state.def_type = data;
1248                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1249         } else if (msr == MSR_MTRRfix64K_00000)
1250                 p[0] = data;
1251         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1252                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1253         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1254                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1255         else if (msr == MSR_IA32_CR_PAT)
1256                 vcpu->arch.pat = data;
1257         else {  /* Variable MTRRs */
1258                 int idx, is_mtrr_mask;
1259                 u64 *pt;
1260
1261                 idx = (msr - 0x200) / 2;
1262                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1263                 if (!is_mtrr_mask)
1264                         pt =
1265                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1266                 else
1267                         pt =
1268                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1269                 *pt = data;
1270         }
1271
1272         kvm_mmu_reset_context(vcpu);
1273         return 0;
1274 }
1275
1276 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1277 {
1278         u64 mcg_cap = vcpu->arch.mcg_cap;
1279         unsigned bank_num = mcg_cap & 0xff;
1280
1281         switch (msr) {
1282         case MSR_IA32_MCG_STATUS:
1283                 vcpu->arch.mcg_status = data;
1284                 break;
1285         case MSR_IA32_MCG_CTL:
1286                 if (!(mcg_cap & MCG_CTL_P))
1287                         return 1;
1288                 if (data != 0 && data != ~(u64)0)
1289                         return -1;
1290                 vcpu->arch.mcg_ctl = data;
1291                 break;
1292         default:
1293                 if (msr >= MSR_IA32_MC0_CTL &&
1294                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1295                         u32 offset = msr - MSR_IA32_MC0_CTL;
1296                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1297                          * some Linux kernels though clear bit 10 in bank 4 to
1298                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1299                          * this to avoid an uncatched #GP in the guest
1300                          */
1301                         if ((offset & 0x3) == 0 &&
1302                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1303                                 return -1;
1304                         vcpu->arch.mce_banks[offset] = data;
1305                         break;
1306                 }
1307                 return 1;
1308         }
1309         return 0;
1310 }
1311
1312 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1313 {
1314         struct kvm *kvm = vcpu->kvm;
1315         int lm = is_long_mode(vcpu);
1316         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1317                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1318         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1319                 : kvm->arch.xen_hvm_config.blob_size_32;
1320         u32 page_num = data & ~PAGE_MASK;
1321         u64 page_addr = data & PAGE_MASK;
1322         u8 *page;
1323         int r;
1324
1325         r = -E2BIG;
1326         if (page_num >= blob_size)
1327                 goto out;
1328         r = -ENOMEM;
1329         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1330         if (!page)
1331                 goto out;
1332         r = -EFAULT;
1333         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1334                 goto out_free;
1335         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1336                 goto out_free;
1337         r = 0;
1338 out_free:
1339         kfree(page);
1340 out:
1341         return r;
1342 }
1343
1344 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1345 {
1346         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1347 }
1348
1349 static bool kvm_hv_msr_partition_wide(u32 msr)
1350 {
1351         bool r = false;
1352         switch (msr) {
1353         case HV_X64_MSR_GUEST_OS_ID:
1354         case HV_X64_MSR_HYPERCALL:
1355                 r = true;
1356                 break;
1357         }
1358
1359         return r;
1360 }
1361
1362 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1363 {
1364         struct kvm *kvm = vcpu->kvm;
1365
1366         switch (msr) {
1367         case HV_X64_MSR_GUEST_OS_ID:
1368                 kvm->arch.hv_guest_os_id = data;
1369                 /* setting guest os id to zero disables hypercall page */
1370                 if (!kvm->arch.hv_guest_os_id)
1371                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1372                 break;
1373         case HV_X64_MSR_HYPERCALL: {
1374                 u64 gfn;
1375                 unsigned long addr;
1376                 u8 instructions[4];
1377
1378                 /* if guest os id is not set hypercall should remain disabled */
1379                 if (!kvm->arch.hv_guest_os_id)
1380                         break;
1381                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1382                         kvm->arch.hv_hypercall = data;
1383                         break;
1384                 }
1385                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1386                 addr = gfn_to_hva(kvm, gfn);
1387                 if (kvm_is_error_hva(addr))
1388                         return 1;
1389                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1390                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1391                 if (copy_to_user((void __user *)addr, instructions, 4))
1392                         return 1;
1393                 kvm->arch.hv_hypercall = data;
1394                 break;
1395         }
1396         default:
1397                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1398                           "data 0x%llx\n", msr, data);
1399                 return 1;
1400         }
1401         return 0;
1402 }
1403
1404 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1405 {
1406         switch (msr) {
1407         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1408                 unsigned long addr;
1409
1410                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1411                         vcpu->arch.hv_vapic = data;
1412                         break;
1413                 }
1414                 addr = gfn_to_hva(vcpu->kvm, data >>
1415                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1416                 if (kvm_is_error_hva(addr))
1417                         return 1;
1418                 if (clear_user((void __user *)addr, PAGE_SIZE))
1419                         return 1;
1420                 vcpu->arch.hv_vapic = data;
1421                 break;
1422         }
1423         case HV_X64_MSR_EOI:
1424                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1425         case HV_X64_MSR_ICR:
1426                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1427         case HV_X64_MSR_TPR:
1428                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1429         default:
1430                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1431                           "data 0x%llx\n", msr, data);
1432                 return 1;
1433         }
1434
1435         return 0;
1436 }
1437
1438 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1439 {
1440         gpa_t gpa = data & ~0x3f;
1441
1442         /* Bits 2:5 are resrved, Should be zero */
1443         if (data & 0x3c)
1444                 return 1;
1445
1446         vcpu->arch.apf.msr_val = data;
1447
1448         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1449                 kvm_clear_async_pf_completion_queue(vcpu);
1450                 kvm_async_pf_hash_reset(vcpu);
1451                 return 0;
1452         }
1453
1454         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1455                 return 1;
1456
1457         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1458         kvm_async_pf_wakeup_all(vcpu);
1459         return 0;
1460 }
1461
1462 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1463 {
1464         if (vcpu->arch.time_page) {
1465                 kvm_release_page_dirty(vcpu->arch.time_page);
1466                 vcpu->arch.time_page = NULL;
1467         }
1468 }
1469
1470 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1471 {
1472         switch (msr) {
1473         case MSR_EFER:
1474                 return set_efer(vcpu, data);
1475         case MSR_K7_HWCR:
1476                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1477                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1478                 if (data != 0) {
1479                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1480                                 data);
1481                         return 1;
1482                 }
1483                 break;
1484         case MSR_FAM10H_MMIO_CONF_BASE:
1485                 if (data != 0) {
1486                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1487                                 "0x%llx\n", data);
1488                         return 1;
1489                 }
1490                 break;
1491         case MSR_AMD64_NB_CFG:
1492                 break;
1493         case MSR_IA32_DEBUGCTLMSR:
1494                 if (!data) {
1495                         /* We support the non-activated case already */
1496                         break;
1497                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1498                         /* Values other than LBR and BTF are vendor-specific,
1499                            thus reserved and should throw a #GP */
1500                         return 1;
1501                 }
1502                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1503                         __func__, data);
1504                 break;
1505         case MSR_IA32_UCODE_REV:
1506         case MSR_IA32_UCODE_WRITE:
1507         case MSR_VM_HSAVE_PA:
1508         case MSR_AMD64_PATCH_LOADER:
1509                 break;
1510         case 0xe2:
1511         case 0x200 ... 0x2ff:
1512                 return set_msr_mtrr(vcpu, msr, data);
1513         case MSR_IA32_APICBASE:
1514                 kvm_set_apic_base(vcpu, data);
1515                 break;
1516         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1517                 return kvm_x2apic_msr_write(vcpu, msr, data);
1518         case MSR_IA32_MISC_ENABLE:
1519                 vcpu->arch.ia32_misc_enable_msr = data;
1520                 break;
1521         case MSR_KVM_WALL_CLOCK_NEW:
1522         case MSR_KVM_WALL_CLOCK:
1523                 vcpu->kvm->arch.wall_clock = data;
1524                 kvm_write_wall_clock(vcpu->kvm, data);
1525                 break;
1526         case MSR_KVM_SYSTEM_TIME_NEW:
1527         case MSR_KVM_SYSTEM_TIME: {
1528                 kvmclock_reset(vcpu);
1529
1530                 vcpu->arch.time = data;
1531                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1532
1533                 /* we verify if the enable bit is set... */
1534                 if (!(data & 1))
1535                         break;
1536
1537                 /* ...but clean it before doing the actual write */
1538                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1539
1540                 vcpu->arch.time_page =
1541                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1542
1543                 if (is_error_page(vcpu->arch.time_page)) {
1544                         kvm_release_page_clean(vcpu->arch.time_page);
1545                         vcpu->arch.time_page = NULL;
1546                 }
1547                 break;
1548         }
1549         case MSR_KVM_ASYNC_PF_EN:
1550                 if (kvm_pv_enable_async_pf(vcpu, data))
1551                         return 1;
1552                 break;
1553         case MSR_IA32_MCG_CTL:
1554         case MSR_IA32_MCG_STATUS:
1555         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1556                 return set_msr_mce(vcpu, msr, data);
1557
1558         /* Performance counters are not protected by a CPUID bit,
1559          * so we should check all of them in the generic path for the sake of
1560          * cross vendor migration.
1561          * Writing a zero into the event select MSRs disables them,
1562          * which we perfectly emulate ;-). Any other value should be at least
1563          * reported, some guests depend on them.
1564          */
1565         case MSR_P6_EVNTSEL0:
1566         case MSR_P6_EVNTSEL1:
1567         case MSR_K7_EVNTSEL0:
1568         case MSR_K7_EVNTSEL1:
1569         case MSR_K7_EVNTSEL2:
1570         case MSR_K7_EVNTSEL3:
1571                 if (data != 0)
1572                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1573                                 "0x%x data 0x%llx\n", msr, data);
1574                 break;
1575         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1576          * so we ignore writes to make it happy.
1577          */
1578         case MSR_P6_PERFCTR0:
1579         case MSR_P6_PERFCTR1:
1580         case MSR_K7_PERFCTR0:
1581         case MSR_K7_PERFCTR1:
1582         case MSR_K7_PERFCTR2:
1583         case MSR_K7_PERFCTR3:
1584                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1585                         "0x%x data 0x%llx\n", msr, data);
1586                 break;
1587         case MSR_K7_CLK_CTL:
1588                 /*
1589                  * Ignore all writes to this no longer documented MSR.
1590                  * Writes are only relevant for old K7 processors,
1591                  * all pre-dating SVM, but a recommended workaround from
1592                  * AMD for these chips. It is possible to speicify the
1593                  * affected processor models on the command line, hence
1594                  * the need to ignore the workaround.
1595                  */
1596                 break;
1597         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1598                 if (kvm_hv_msr_partition_wide(msr)) {
1599                         int r;
1600                         mutex_lock(&vcpu->kvm->lock);
1601                         r = set_msr_hyperv_pw(vcpu, msr, data);
1602                         mutex_unlock(&vcpu->kvm->lock);
1603                         return r;
1604                 } else
1605                         return set_msr_hyperv(vcpu, msr, data);
1606                 break;
1607         case MSR_IA32_BBL_CR_CTL3:
1608                 /* Drop writes to this legacy MSR -- see rdmsr
1609                  * counterpart for further detail.
1610                  */
1611                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1612                 break;
1613         default:
1614                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1615                         return xen_hvm_config(vcpu, data);
1616                 if (!ignore_msrs) {
1617                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1618                                 msr, data);
1619                         return 1;
1620                 } else {
1621                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1622                                 msr, data);
1623                         break;
1624                 }
1625         }
1626         return 0;
1627 }
1628 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1629
1630
1631 /*
1632  * Reads an msr value (of 'msr_index') into 'pdata'.
1633  * Returns 0 on success, non-0 otherwise.
1634  * Assumes vcpu_load() was already called.
1635  */
1636 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1637 {
1638         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1639 }
1640
1641 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1642 {
1643         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1644
1645         if (!msr_mtrr_valid(msr))
1646                 return 1;
1647
1648         if (msr == MSR_MTRRdefType)
1649                 *pdata = vcpu->arch.mtrr_state.def_type +
1650                          (vcpu->arch.mtrr_state.enabled << 10);
1651         else if (msr == MSR_MTRRfix64K_00000)
1652                 *pdata = p[0];
1653         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1654                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1655         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1656                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1657         else if (msr == MSR_IA32_CR_PAT)
1658                 *pdata = vcpu->arch.pat;
1659         else {  /* Variable MTRRs */
1660                 int idx, is_mtrr_mask;
1661                 u64 *pt;
1662
1663                 idx = (msr - 0x200) / 2;
1664                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1665                 if (!is_mtrr_mask)
1666                         pt =
1667                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1668                 else
1669                         pt =
1670                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1671                 *pdata = *pt;
1672         }
1673
1674         return 0;
1675 }
1676
1677 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1678 {
1679         u64 data;
1680         u64 mcg_cap = vcpu->arch.mcg_cap;
1681         unsigned bank_num = mcg_cap & 0xff;
1682
1683         switch (msr) {
1684         case MSR_IA32_P5_MC_ADDR:
1685         case MSR_IA32_P5_MC_TYPE:
1686                 data = 0;
1687                 break;
1688         case MSR_IA32_MCG_CAP:
1689                 data = vcpu->arch.mcg_cap;
1690                 break;
1691         case MSR_IA32_MCG_CTL:
1692                 if (!(mcg_cap & MCG_CTL_P))
1693                         return 1;
1694                 data = vcpu->arch.mcg_ctl;
1695                 break;
1696         case MSR_IA32_MCG_STATUS:
1697                 data = vcpu->arch.mcg_status;
1698                 break;
1699         default:
1700                 if (msr >= MSR_IA32_MC0_CTL &&
1701                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1702                         u32 offset = msr - MSR_IA32_MC0_CTL;
1703                         data = vcpu->arch.mce_banks[offset];
1704                         break;
1705                 }
1706                 return 1;
1707         }
1708         *pdata = data;
1709         return 0;
1710 }
1711
1712 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1713 {
1714         u64 data = 0;
1715         struct kvm *kvm = vcpu->kvm;
1716
1717         switch (msr) {
1718         case HV_X64_MSR_GUEST_OS_ID:
1719                 data = kvm->arch.hv_guest_os_id;
1720                 break;
1721         case HV_X64_MSR_HYPERCALL:
1722                 data = kvm->arch.hv_hypercall;
1723                 break;
1724         default:
1725                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1726                 return 1;
1727         }
1728
1729         *pdata = data;
1730         return 0;
1731 }
1732
1733 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1734 {
1735         u64 data = 0;
1736
1737         switch (msr) {
1738         case HV_X64_MSR_VP_INDEX: {
1739                 int r;
1740                 struct kvm_vcpu *v;
1741                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1742                         if (v == vcpu)
1743                                 data = r;
1744                 break;
1745         }
1746         case HV_X64_MSR_EOI:
1747                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1748         case HV_X64_MSR_ICR:
1749                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1750         case HV_X64_MSR_TPR:
1751                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1752         default:
1753                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1754                 return 1;
1755         }
1756         *pdata = data;
1757         return 0;
1758 }
1759
1760 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1761 {
1762         u64 data;
1763
1764         switch (msr) {
1765         case MSR_IA32_PLATFORM_ID:
1766         case MSR_IA32_UCODE_REV:
1767         case MSR_IA32_EBL_CR_POWERON:
1768         case MSR_IA32_DEBUGCTLMSR:
1769         case MSR_IA32_LASTBRANCHFROMIP:
1770         case MSR_IA32_LASTBRANCHTOIP:
1771         case MSR_IA32_LASTINTFROMIP:
1772         case MSR_IA32_LASTINTTOIP:
1773         case MSR_K8_SYSCFG:
1774         case MSR_K7_HWCR:
1775         case MSR_VM_HSAVE_PA:
1776         case MSR_P6_PERFCTR0:
1777         case MSR_P6_PERFCTR1:
1778         case MSR_P6_EVNTSEL0:
1779         case MSR_P6_EVNTSEL1:
1780         case MSR_K7_EVNTSEL0:
1781         case MSR_K7_PERFCTR0:
1782         case MSR_K8_INT_PENDING_MSG:
1783         case MSR_AMD64_NB_CFG:
1784         case MSR_FAM10H_MMIO_CONF_BASE:
1785         case 0xe2:
1786                 data = 0;
1787                 break;
1788         case MSR_MTRRcap:
1789                 data = 0x500 | KVM_NR_VAR_MTRR;
1790                 break;
1791         case 0x200 ... 0x2ff:
1792                 return get_msr_mtrr(vcpu, msr, pdata);
1793         case 0xcd: /* fsb frequency */
1794                 data = 3;
1795                 break;
1796                 /*
1797                  * MSR_EBC_FREQUENCY_ID
1798                  * Conservative value valid for even the basic CPU models.
1799                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1800                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1801                  * and 266MHz for model 3, or 4. Set Core Clock
1802                  * Frequency to System Bus Frequency Ratio to 1 (bits
1803                  * 31:24) even though these are only valid for CPU
1804                  * models > 2, however guests may end up dividing or
1805                  * multiplying by zero otherwise.
1806                  */
1807         case MSR_EBC_FREQUENCY_ID:
1808                 data = 1 << 24;
1809                 break;
1810         case MSR_IA32_APICBASE:
1811                 data = kvm_get_apic_base(vcpu);
1812                 break;
1813         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1814                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1815                 break;
1816         case MSR_IA32_MISC_ENABLE:
1817                 data = vcpu->arch.ia32_misc_enable_msr;
1818                 break;
1819         case MSR_IA32_PERF_STATUS:
1820                 /* TSC increment by tick */
1821                 data = 1000ULL;
1822                 /* CPU multiplier */
1823                 data |= (((uint64_t)4ULL) << 40);
1824                 break;
1825         case MSR_EFER:
1826                 data = vcpu->arch.efer;
1827                 break;
1828         case MSR_KVM_WALL_CLOCK:
1829         case MSR_KVM_WALL_CLOCK_NEW:
1830                 data = vcpu->kvm->arch.wall_clock;
1831                 break;
1832         case MSR_KVM_SYSTEM_TIME:
1833         case MSR_KVM_SYSTEM_TIME_NEW:
1834                 data = vcpu->arch.time;
1835                 break;
1836         case MSR_KVM_ASYNC_PF_EN:
1837                 data = vcpu->arch.apf.msr_val;
1838                 break;
1839         case MSR_IA32_P5_MC_ADDR:
1840         case MSR_IA32_P5_MC_TYPE:
1841         case MSR_IA32_MCG_CAP:
1842         case MSR_IA32_MCG_CTL:
1843         case MSR_IA32_MCG_STATUS:
1844         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1845                 return get_msr_mce(vcpu, msr, pdata);
1846         case MSR_K7_CLK_CTL:
1847                 /*
1848                  * Provide expected ramp-up count for K7. All other
1849                  * are set to zero, indicating minimum divisors for
1850                  * every field.
1851                  *
1852                  * This prevents guest kernels on AMD host with CPU
1853                  * type 6, model 8 and higher from exploding due to
1854                  * the rdmsr failing.
1855                  */
1856                 data = 0x20000000;
1857                 break;
1858         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1859                 if (kvm_hv_msr_partition_wide(msr)) {
1860                         int r;
1861                         mutex_lock(&vcpu->kvm->lock);
1862                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1863                         mutex_unlock(&vcpu->kvm->lock);
1864                         return r;
1865                 } else
1866                         return get_msr_hyperv(vcpu, msr, pdata);
1867                 break;
1868         case MSR_IA32_BBL_CR_CTL3:
1869                 /* This legacy MSR exists but isn't fully documented in current
1870                  * silicon.  It is however accessed by winxp in very narrow
1871                  * scenarios where it sets bit #19, itself documented as
1872                  * a "reserved" bit.  Best effort attempt to source coherent
1873                  * read data here should the balance of the register be
1874                  * interpreted by the guest:
1875                  *
1876                  * L2 cache control register 3: 64GB range, 256KB size,
1877                  * enabled, latency 0x1, configured
1878                  */
1879                 data = 0xbe702111;
1880                 break;
1881         default:
1882                 if (!ignore_msrs) {
1883                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1884                         return 1;
1885                 } else {
1886                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1887                         data = 0;
1888                 }
1889                 break;
1890         }
1891         *pdata = data;
1892         return 0;
1893 }
1894 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1895
1896 /*
1897  * Read or write a bunch of msrs. All parameters are kernel addresses.
1898  *
1899  * @return number of msrs set successfully.
1900  */
1901 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1902                     struct kvm_msr_entry *entries,
1903                     int (*do_msr)(struct kvm_vcpu *vcpu,
1904                                   unsigned index, u64 *data))
1905 {
1906         int i, idx;
1907
1908         idx = srcu_read_lock(&vcpu->kvm->srcu);
1909         for (i = 0; i < msrs->nmsrs; ++i)
1910                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1911                         break;
1912         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1913
1914         return i;
1915 }
1916
1917 /*
1918  * Read or write a bunch of msrs. Parameters are user addresses.
1919  *
1920  * @return number of msrs set successfully.
1921  */
1922 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1923                   int (*do_msr)(struct kvm_vcpu *vcpu,
1924                                 unsigned index, u64 *data),
1925                   int writeback)
1926 {
1927         struct kvm_msrs msrs;
1928         struct kvm_msr_entry *entries;
1929         int r, n;
1930         unsigned size;
1931
1932         r = -EFAULT;
1933         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1934                 goto out;
1935
1936         r = -E2BIG;
1937         if (msrs.nmsrs >= MAX_IO_MSRS)
1938                 goto out;
1939
1940         r = -ENOMEM;
1941         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1942         entries = kmalloc(size, GFP_KERNEL);
1943         if (!entries)
1944                 goto out;
1945
1946         r = -EFAULT;
1947         if (copy_from_user(entries, user_msrs->entries, size))
1948                 goto out_free;
1949
1950         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1951         if (r < 0)
1952                 goto out_free;
1953
1954         r = -EFAULT;
1955         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1956                 goto out_free;
1957
1958         r = n;
1959
1960 out_free:
1961         kfree(entries);
1962 out:
1963         return r;
1964 }
1965
1966 int kvm_dev_ioctl_check_extension(long ext)
1967 {
1968         int r;
1969
1970         switch (ext) {
1971         case KVM_CAP_IRQCHIP:
1972         case KVM_CAP_HLT:
1973         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1974         case KVM_CAP_SET_TSS_ADDR:
1975         case KVM_CAP_EXT_CPUID:
1976         case KVM_CAP_CLOCKSOURCE:
1977         case KVM_CAP_PIT:
1978         case KVM_CAP_NOP_IO_DELAY:
1979         case KVM_CAP_MP_STATE:
1980         case KVM_CAP_SYNC_MMU:
1981         case KVM_CAP_USER_NMI:
1982         case KVM_CAP_REINJECT_CONTROL:
1983         case KVM_CAP_IRQ_INJECT_STATUS:
1984         case KVM_CAP_ASSIGN_DEV_IRQ:
1985         case KVM_CAP_IRQFD:
1986         case KVM_CAP_IOEVENTFD:
1987         case KVM_CAP_PIT2:
1988         case KVM_CAP_PIT_STATE2:
1989         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1990         case KVM_CAP_XEN_HVM:
1991         case KVM_CAP_ADJUST_CLOCK:
1992         case KVM_CAP_VCPU_EVENTS:
1993         case KVM_CAP_HYPERV:
1994         case KVM_CAP_HYPERV_VAPIC:
1995         case KVM_CAP_HYPERV_SPIN:
1996         case KVM_CAP_PCI_SEGMENT:
1997         case KVM_CAP_DEBUGREGS:
1998         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1999         case KVM_CAP_XSAVE:
2000         case KVM_CAP_ASYNC_PF:
2001         case KVM_CAP_GET_TSC_KHZ:
2002                 r = 1;
2003                 break;
2004         case KVM_CAP_COALESCED_MMIO:
2005                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2006                 break;
2007         case KVM_CAP_VAPIC:
2008                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2009                 break;
2010         case KVM_CAP_NR_VCPUS:
2011                 r = KVM_MAX_VCPUS;
2012                 break;
2013         case KVM_CAP_NR_MEMSLOTS:
2014                 r = KVM_MEMORY_SLOTS;
2015                 break;
2016         case KVM_CAP_PV_MMU:    /* obsolete */
2017                 r = 0;
2018                 break;
2019         case KVM_CAP_IOMMU:
2020                 r = iommu_found();
2021                 break;
2022         case KVM_CAP_MCE:
2023                 r = KVM_MAX_MCE_BANKS;
2024                 break;
2025         case KVM_CAP_XCRS:
2026                 r = cpu_has_xsave;
2027                 break;
2028         case KVM_CAP_TSC_CONTROL:
2029                 r = kvm_has_tsc_control;
2030                 break;
2031         default:
2032                 r = 0;
2033                 break;
2034         }
2035         return r;
2036
2037 }
2038
2039 long kvm_arch_dev_ioctl(struct file *filp,
2040                         unsigned int ioctl, unsigned long arg)
2041 {
2042         void __user *argp = (void __user *)arg;
2043         long r;
2044
2045         switch (ioctl) {
2046         case KVM_GET_MSR_INDEX_LIST: {
2047                 struct kvm_msr_list __user *user_msr_list = argp;
2048                 struct kvm_msr_list msr_list;
2049                 unsigned n;
2050
2051                 r = -EFAULT;
2052                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2053                         goto out;
2054                 n = msr_list.nmsrs;
2055                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2056                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2057                         goto out;
2058                 r = -E2BIG;
2059                 if (n < msr_list.nmsrs)
2060                         goto out;
2061                 r = -EFAULT;
2062                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2063                                  num_msrs_to_save * sizeof(u32)))
2064                         goto out;
2065                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2066                                  &emulated_msrs,
2067                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2068                         goto out;
2069                 r = 0;
2070                 break;
2071         }
2072         case KVM_GET_SUPPORTED_CPUID: {
2073                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2074                 struct kvm_cpuid2 cpuid;
2075
2076                 r = -EFAULT;
2077                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2078                         goto out;
2079                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2080                                                       cpuid_arg->entries);
2081                 if (r)
2082                         goto out;
2083
2084                 r = -EFAULT;
2085                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2086                         goto out;
2087                 r = 0;
2088                 break;
2089         }
2090         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2091                 u64 mce_cap;
2092
2093                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2094                 r = -EFAULT;
2095                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2096                         goto out;
2097                 r = 0;
2098                 break;
2099         }
2100         default:
2101                 r = -EINVAL;
2102         }
2103 out:
2104         return r;
2105 }
2106
2107 static void wbinvd_ipi(void *garbage)
2108 {
2109         wbinvd();
2110 }
2111
2112 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2113 {
2114         return vcpu->kvm->arch.iommu_domain &&
2115                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2116 }
2117
2118 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2119 {
2120         /* Address WBINVD may be executed by guest */
2121         if (need_emulate_wbinvd(vcpu)) {
2122                 if (kvm_x86_ops->has_wbinvd_exit())
2123                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2124                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2125                         smp_call_function_single(vcpu->cpu,
2126                                         wbinvd_ipi, NULL, 1);
2127         }
2128
2129         kvm_x86_ops->vcpu_load(vcpu, cpu);
2130         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2131                 /* Make sure TSC doesn't go backwards */
2132                 s64 tsc_delta;
2133                 u64 tsc;
2134
2135                 kvm_get_msr(vcpu, MSR_IA32_TSC, &tsc);
2136                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2137                              tsc - vcpu->arch.last_guest_tsc;
2138
2139                 if (tsc_delta < 0)
2140                         mark_tsc_unstable("KVM discovered backwards TSC");
2141                 if (check_tsc_unstable()) {
2142                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2143                         vcpu->arch.tsc_catchup = 1;
2144                 }
2145                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2146                 if (vcpu->cpu != cpu)
2147                         kvm_migrate_timers(vcpu);
2148                 vcpu->cpu = cpu;
2149         }
2150 }
2151
2152 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2153 {
2154         kvm_x86_ops->vcpu_put(vcpu);
2155         kvm_put_guest_fpu(vcpu);
2156         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
2157 }
2158
2159 static int is_efer_nx(void)
2160 {
2161         unsigned long long efer = 0;
2162
2163         rdmsrl_safe(MSR_EFER, &efer);
2164         return efer & EFER_NX;
2165 }
2166
2167 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2168 {
2169         int i;
2170         struct kvm_cpuid_entry2 *e, *entry;
2171
2172         entry = NULL;
2173         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2174                 e = &vcpu->arch.cpuid_entries[i];
2175                 if (e->function == 0x80000001) {
2176                         entry = e;
2177                         break;
2178                 }
2179         }
2180         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2181                 entry->edx &= ~(1 << 20);
2182                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2183         }
2184 }
2185
2186 /* when an old userspace process fills a new kernel module */
2187 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2188                                     struct kvm_cpuid *cpuid,
2189                                     struct kvm_cpuid_entry __user *entries)
2190 {
2191         int r, i;
2192         struct kvm_cpuid_entry *cpuid_entries;
2193
2194         r = -E2BIG;
2195         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2196                 goto out;
2197         r = -ENOMEM;
2198         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2199         if (!cpuid_entries)
2200                 goto out;
2201         r = -EFAULT;
2202         if (copy_from_user(cpuid_entries, entries,
2203                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2204                 goto out_free;
2205         for (i = 0; i < cpuid->nent; i++) {
2206                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2207                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2208                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2209                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2210                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2211                 vcpu->arch.cpuid_entries[i].index = 0;
2212                 vcpu->arch.cpuid_entries[i].flags = 0;
2213                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2214                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2215                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2216         }
2217         vcpu->arch.cpuid_nent = cpuid->nent;
2218         cpuid_fix_nx_cap(vcpu);
2219         r = 0;
2220         kvm_apic_set_version(vcpu);
2221         kvm_x86_ops->cpuid_update(vcpu);
2222         update_cpuid(vcpu);
2223
2224 out_free:
2225         vfree(cpuid_entries);
2226 out:
2227         return r;
2228 }
2229
2230 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2231                                      struct kvm_cpuid2 *cpuid,
2232                                      struct kvm_cpuid_entry2 __user *entries)
2233 {
2234         int r;
2235
2236         r = -E2BIG;
2237         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2238                 goto out;
2239         r = -EFAULT;
2240         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2241                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2242                 goto out;
2243         vcpu->arch.cpuid_nent = cpuid->nent;
2244         kvm_apic_set_version(vcpu);
2245         kvm_x86_ops->cpuid_update(vcpu);
2246         update_cpuid(vcpu);
2247         return 0;
2248
2249 out:
2250         return r;
2251 }
2252
2253 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2254                                      struct kvm_cpuid2 *cpuid,
2255                                      struct kvm_cpuid_entry2 __user *entries)
2256 {
2257         int r;
2258
2259         r = -E2BIG;
2260         if (cpuid->nent < vcpu->arch.cpuid_nent)
2261                 goto out;
2262         r = -EFAULT;
2263         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2264                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2265                 goto out;
2266         return 0;
2267
2268 out:
2269         cpuid->nent = vcpu->arch.cpuid_nent;
2270         return r;
2271 }
2272
2273 static void cpuid_mask(u32 *word, int wordnum)
2274 {
2275         *word &= boot_cpu_data.x86_capability[wordnum];
2276 }
2277
2278 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2279                            u32 index)
2280 {
2281         entry->function = function;
2282         entry->index = index;
2283         cpuid_count(entry->function, entry->index,
2284                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2285         entry->flags = 0;
2286 }
2287
2288 #define F(x) bit(X86_FEATURE_##x)
2289
2290 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2291                          u32 index, int *nent, int maxnent)
2292 {
2293         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2294 #ifdef CONFIG_X86_64
2295         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2296                                 ? F(GBPAGES) : 0;
2297         unsigned f_lm = F(LM);
2298 #else
2299         unsigned f_gbpages = 0;
2300         unsigned f_lm = 0;
2301 #endif
2302         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2303
2304         /* cpuid 1.edx */
2305         const u32 kvm_supported_word0_x86_features =
2306                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2307                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2308                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2309                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2310                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2311                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2312                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2313                 0 /* HTT, TM, Reserved, PBE */;
2314         /* cpuid 0x80000001.edx */
2315         const u32 kvm_supported_word1_x86_features =
2316                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2317                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2318                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2319                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2320                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2321                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2322                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2323                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2324         /* cpuid 1.ecx */
2325         const u32 kvm_supported_word4_x86_features =
2326                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64 */ | F(MWAIT) |
2327                 0 /* DS-CPL, VMX, SMX, EST */ |
2328                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2329                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2330                 0 /* Reserved, DCA */ | F(XMM4_1) |
2331                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2332                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2333                 F(F16C);
2334         /* cpuid 0x80000001.ecx */
2335         const u32 kvm_supported_word6_x86_features =
2336                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2337                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2338                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2339                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2340
2341         /* cpuid 0xC0000001.edx */
2342         const u32 kvm_supported_word5_x86_features =
2343                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2344                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2345                 F(PMM) | F(PMM_EN);
2346
2347         /* all calls to cpuid_count() should be made on the same cpu */
2348         get_cpu();
2349         do_cpuid_1_ent(entry, function, index);
2350         ++*nent;
2351
2352         switch (function) {
2353         case 0:
2354                 entry->eax = min(entry->eax, (u32)0xd);
2355                 break;
2356         case 1:
2357                 entry->edx &= kvm_supported_word0_x86_features;
2358                 cpuid_mask(&entry->edx, 0);
2359                 entry->ecx &= kvm_supported_word4_x86_features;
2360                 cpuid_mask(&entry->ecx, 4);
2361                 /* we support x2apic emulation even if host does not support
2362                  * it since we emulate x2apic in software */
2363                 entry->ecx |= F(X2APIC);
2364                 break;
2365         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2366          * may return different values. This forces us to get_cpu() before
2367          * issuing the first command, and also to emulate this annoying behavior
2368          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2369         case 2: {
2370                 int t, times = entry->eax & 0xff;
2371
2372                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2373                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2374                 for (t = 1; t < times && *nent < maxnent; ++t) {
2375                         do_cpuid_1_ent(&entry[t], function, 0);
2376                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2377                         ++*nent;
2378                 }
2379                 break;
2380         }
2381         /* function 4 and 0xb have additional index. */
2382         case 4: {
2383                 int i, cache_type;
2384
2385                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2386                 /* read more entries until cache_type is zero */
2387                 for (i = 1; *nent < maxnent; ++i) {
2388                         cache_type = entry[i - 1].eax & 0x1f;
2389                         if (!cache_type)
2390                                 break;
2391                         do_cpuid_1_ent(&entry[i], function, i);
2392                         entry[i].flags |=
2393                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2394                         ++*nent;
2395                 }
2396                 break;
2397         }
2398         case 0xb: {
2399                 int i, level_type;
2400
2401                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2402                 /* read more entries until level_type is zero */
2403                 for (i = 1; *nent < maxnent; ++i) {
2404                         level_type = entry[i - 1].ecx & 0xff00;
2405                         if (!level_type)
2406                                 break;
2407                         do_cpuid_1_ent(&entry[i], function, i);
2408                         entry[i].flags |=
2409                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2410                         ++*nent;
2411                 }
2412                 break;
2413         }
2414         case 0xd: {
2415                 int i;
2416
2417                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2418                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2419                         if (entry[i].eax == 0)
2420                                 continue;
2421                         do_cpuid_1_ent(&entry[i], function, i);
2422                         entry[i].flags |=
2423                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2424                         ++*nent;
2425                 }
2426                 break;
2427         }
2428         case KVM_CPUID_SIGNATURE: {
2429                 char signature[12] = "KVMKVMKVM\0\0";
2430                 u32 *sigptr = (u32 *)signature;
2431                 entry->eax = 0;
2432                 entry->ebx = sigptr[0];
2433                 entry->ecx = sigptr[1];
2434                 entry->edx = sigptr[2];
2435                 break;
2436         }
2437         case KVM_CPUID_FEATURES:
2438                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2439                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2440                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2441                              (1 << KVM_FEATURE_ASYNC_PF) |
2442                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2443                 entry->ebx = 0;
2444                 entry->ecx = 0;
2445                 entry->edx = 0;
2446                 break;
2447         case 0x80000000:
2448                 entry->eax = min(entry->eax, 0x8000001a);
2449                 break;
2450         case 0x80000001:
2451                 entry->edx &= kvm_supported_word1_x86_features;
2452                 cpuid_mask(&entry->edx, 1);
2453                 entry->ecx &= kvm_supported_word6_x86_features;
2454                 cpuid_mask(&entry->ecx, 6);
2455                 break;
2456         /*Add support for Centaur's CPUID instruction*/
2457         case 0xC0000000:
2458                 /*Just support up to 0xC0000004 now*/
2459                 entry->eax = min(entry->eax, 0xC0000004);
2460                 break;
2461         case 0xC0000001:
2462                 entry->edx &= kvm_supported_word5_x86_features;
2463                 cpuid_mask(&entry->edx, 5);
2464                 break;
2465         case 0xC0000002:
2466         case 0xC0000003:
2467         case 0xC0000004:
2468                 /*Now nothing to do, reserved for the future*/
2469                 break;
2470         }
2471
2472         kvm_x86_ops->set_supported_cpuid(function, entry);
2473
2474         put_cpu();
2475 }
2476
2477 #undef F
2478
2479 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2480                                      struct kvm_cpuid_entry2 __user *entries)
2481 {
2482         struct kvm_cpuid_entry2 *cpuid_entries;
2483         int limit, nent = 0, r = -E2BIG;
2484         u32 func;
2485
2486         if (cpuid->nent < 1)
2487                 goto out;
2488         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2489                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2490         r = -ENOMEM;
2491         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2492         if (!cpuid_entries)
2493                 goto out;
2494
2495         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2496         limit = cpuid_entries[0].eax;
2497         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2498                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2499                              &nent, cpuid->nent);
2500         r = -E2BIG;
2501         if (nent >= cpuid->nent)
2502                 goto out_free;
2503
2504         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2505         limit = cpuid_entries[nent - 1].eax;
2506         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2507                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2508                              &nent, cpuid->nent);
2509
2510
2511
2512         r = -E2BIG;
2513         if (nent >= cpuid->nent)
2514                 goto out_free;
2515
2516         /* Add support for Centaur's CPUID instruction. */
2517         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2518                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2519                                 &nent, cpuid->nent);
2520
2521                 r = -E2BIG;
2522                 if (nent >= cpuid->nent)
2523                         goto out_free;
2524
2525                 limit = cpuid_entries[nent - 1].eax;
2526                 for (func = 0xC0000001;
2527                         func <= limit && nent < cpuid->nent; ++func)
2528                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2529                                         &nent, cpuid->nent);
2530
2531                 r = -E2BIG;
2532                 if (nent >= cpuid->nent)
2533                         goto out_free;
2534         }
2535
2536         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2537                      cpuid->nent);
2538
2539         r = -E2BIG;
2540         if (nent >= cpuid->nent)
2541                 goto out_free;
2542
2543         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2544                      cpuid->nent);
2545
2546         r = -E2BIG;
2547         if (nent >= cpuid->nent)
2548                 goto out_free;
2549
2550         r = -EFAULT;
2551         if (copy_to_user(entries, cpuid_entries,
2552                          nent * sizeof(struct kvm_cpuid_entry2)))
2553                 goto out_free;
2554         cpuid->nent = nent;
2555         r = 0;
2556
2557 out_free:
2558         vfree(cpuid_entries);
2559 out:
2560         return r;
2561 }
2562
2563 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2564                                     struct kvm_lapic_state *s)
2565 {
2566         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2567
2568         return 0;
2569 }
2570
2571 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2572                                     struct kvm_lapic_state *s)
2573 {
2574         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2575         kvm_apic_post_state_restore(vcpu);
2576         update_cr8_intercept(vcpu);
2577
2578         return 0;
2579 }
2580
2581 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2582                                     struct kvm_interrupt *irq)
2583 {
2584         if (irq->irq < 0 || irq->irq >= 256)
2585                 return -EINVAL;
2586         if (irqchip_in_kernel(vcpu->kvm))
2587                 return -ENXIO;
2588
2589         kvm_queue_interrupt(vcpu, irq->irq, false);
2590         kvm_make_request(KVM_REQ_EVENT, vcpu);
2591
2592         return 0;
2593 }
2594
2595 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2596 {
2597         kvm_inject_nmi(vcpu);
2598
2599         return 0;
2600 }
2601
2602 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2603                                            struct kvm_tpr_access_ctl *tac)
2604 {
2605         if (tac->flags)
2606                 return -EINVAL;
2607         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2608         return 0;
2609 }
2610
2611 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2612                                         u64 mcg_cap)
2613 {
2614         int r;
2615         unsigned bank_num = mcg_cap & 0xff, bank;
2616
2617         r = -EINVAL;
2618         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2619                 goto out;
2620         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2621                 goto out;
2622         r = 0;
2623         vcpu->arch.mcg_cap = mcg_cap;
2624         /* Init IA32_MCG_CTL to all 1s */
2625         if (mcg_cap & MCG_CTL_P)
2626                 vcpu->arch.mcg_ctl = ~(u64)0;
2627         /* Init IA32_MCi_CTL to all 1s */
2628         for (bank = 0; bank < bank_num; bank++)
2629                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2630 out:
2631         return r;
2632 }
2633
2634 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2635                                       struct kvm_x86_mce *mce)
2636 {
2637         u64 mcg_cap = vcpu->arch.mcg_cap;
2638         unsigned bank_num = mcg_cap & 0xff;
2639         u64 *banks = vcpu->arch.mce_banks;
2640
2641         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2642                 return -EINVAL;
2643         /*
2644          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2645          * reporting is disabled
2646          */
2647         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2648             vcpu->arch.mcg_ctl != ~(u64)0)
2649                 return 0;
2650         banks += 4 * mce->bank;
2651         /*
2652          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2653          * reporting is disabled for the bank
2654          */
2655         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2656                 return 0;
2657         if (mce->status & MCI_STATUS_UC) {
2658                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2659                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2660                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2661                         return 0;
2662                 }
2663                 if (banks[1] & MCI_STATUS_VAL)
2664                         mce->status |= MCI_STATUS_OVER;
2665                 banks[2] = mce->addr;
2666                 banks[3] = mce->misc;
2667                 vcpu->arch.mcg_status = mce->mcg_status;
2668                 banks[1] = mce->status;
2669                 kvm_queue_exception(vcpu, MC_VECTOR);
2670         } else if (!(banks[1] & MCI_STATUS_VAL)
2671                    || !(banks[1] & MCI_STATUS_UC)) {
2672                 if (banks[1] & MCI_STATUS_VAL)
2673                         mce->status |= MCI_STATUS_OVER;
2674                 banks[2] = mce->addr;
2675                 banks[3] = mce->misc;
2676                 banks[1] = mce->status;
2677         } else
2678                 banks[1] |= MCI_STATUS_OVER;
2679         return 0;
2680 }
2681
2682 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2683                                                struct kvm_vcpu_events *events)
2684 {
2685         events->exception.injected =
2686                 vcpu->arch.exception.pending &&
2687                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2688         events->exception.nr = vcpu->arch.exception.nr;
2689         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2690         events->exception.pad = 0;
2691         events->exception.error_code = vcpu->arch.exception.error_code;
2692
2693         events->interrupt.injected =
2694                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2695         events->interrupt.nr = vcpu->arch.interrupt.nr;
2696         events->interrupt.soft = 0;
2697         events->interrupt.shadow =
2698                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2699                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2700
2701         events->nmi.injected = vcpu->arch.nmi_injected;
2702         events->nmi.pending = vcpu->arch.nmi_pending;
2703         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2704         events->nmi.pad = 0;
2705
2706         events->sipi_vector = vcpu->arch.sipi_vector;
2707
2708         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2709                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2710                          | KVM_VCPUEVENT_VALID_SHADOW);
2711         memset(&events->reserved, 0, sizeof(events->reserved));
2712 }
2713
2714 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2715                                               struct kvm_vcpu_events *events)
2716 {
2717         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2718                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2719                               | KVM_VCPUEVENT_VALID_SHADOW))
2720                 return -EINVAL;
2721
2722         vcpu->arch.exception.pending = events->exception.injected;
2723         vcpu->arch.exception.nr = events->exception.nr;
2724         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2725         vcpu->arch.exception.error_code = events->exception.error_code;
2726
2727         vcpu->arch.interrupt.pending = events->interrupt.injected;
2728         vcpu->arch.interrupt.nr = events->interrupt.nr;
2729         vcpu->arch.interrupt.soft = events->interrupt.soft;
2730         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2731                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2732                                                   events->interrupt.shadow);
2733
2734         vcpu->arch.nmi_injected = events->nmi.injected;
2735         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2736                 vcpu->arch.nmi_pending = events->nmi.pending;
2737         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2738
2739         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2740                 vcpu->arch.sipi_vector = events->sipi_vector;
2741
2742         kvm_make_request(KVM_REQ_EVENT, vcpu);
2743
2744         return 0;
2745 }
2746
2747 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2748                                              struct kvm_debugregs *dbgregs)
2749 {
2750         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2751         dbgregs->dr6 = vcpu->arch.dr6;
2752         dbgregs->dr7 = vcpu->arch.dr7;
2753         dbgregs->flags = 0;
2754         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2755 }
2756
2757 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2758                                             struct kvm_debugregs *dbgregs)
2759 {
2760         if (dbgregs->flags)
2761                 return -EINVAL;
2762
2763         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2764         vcpu->arch.dr6 = dbgregs->dr6;
2765         vcpu->arch.dr7 = dbgregs->dr7;
2766
2767         return 0;
2768 }
2769
2770 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2771                                          struct kvm_xsave *guest_xsave)
2772 {
2773         if (cpu_has_xsave)
2774                 memcpy(guest_xsave->region,
2775                         &vcpu->arch.guest_fpu.state->xsave,
2776                         xstate_size);
2777         else {
2778                 memcpy(guest_xsave->region,
2779                         &vcpu->arch.guest_fpu.state->fxsave,
2780                         sizeof(struct i387_fxsave_struct));
2781                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2782                         XSTATE_FPSSE;
2783         }
2784 }
2785
2786 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2787                                         struct kvm_xsave *guest_xsave)
2788 {
2789         u64 xstate_bv =
2790                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2791
2792         if (cpu_has_xsave)
2793                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2794                         guest_xsave->region, xstate_size);
2795         else {
2796                 if (xstate_bv & ~XSTATE_FPSSE)
2797                         return -EINVAL;
2798                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2799                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2800         }
2801         return 0;
2802 }
2803
2804 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2805                                         struct kvm_xcrs *guest_xcrs)
2806 {
2807         if (!cpu_has_xsave) {
2808                 guest_xcrs->nr_xcrs = 0;
2809                 return;
2810         }
2811
2812         guest_xcrs->nr_xcrs = 1;
2813         guest_xcrs->flags = 0;
2814         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2815         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2816 }
2817
2818 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2819                                        struct kvm_xcrs *guest_xcrs)
2820 {
2821         int i, r = 0;
2822
2823         if (!cpu_has_xsave)
2824                 return -EINVAL;
2825
2826         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2827                 return -EINVAL;
2828
2829         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2830                 /* Only support XCR0 currently */
2831                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2832                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2833                                 guest_xcrs->xcrs[0].value);
2834                         break;
2835                 }
2836         if (r)
2837                 r = -EINVAL;
2838         return r;
2839 }
2840
2841 long kvm_arch_vcpu_ioctl(struct file *filp,
2842                          unsigned int ioctl, unsigned long arg)
2843 {
2844         struct kvm_vcpu *vcpu = filp->private_data;
2845         void __user *argp = (void __user *)arg;
2846         int r;
2847         union {
2848                 struct kvm_lapic_state *lapic;
2849                 struct kvm_xsave *xsave;
2850                 struct kvm_xcrs *xcrs;
2851                 void *buffer;
2852         } u;
2853
2854         u.buffer = NULL;
2855         switch (ioctl) {
2856         case KVM_GET_LAPIC: {
2857                 r = -EINVAL;
2858                 if (!vcpu->arch.apic)
2859                         goto out;
2860                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2861
2862                 r = -ENOMEM;
2863                 if (!u.lapic)
2864                         goto out;
2865                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2866                 if (r)
2867                         goto out;
2868                 r = -EFAULT;
2869                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2870                         goto out;
2871                 r = 0;
2872                 break;
2873         }
2874         case KVM_SET_LAPIC: {
2875                 r = -EINVAL;
2876                 if (!vcpu->arch.apic)
2877                         goto out;
2878                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2879                 r = -ENOMEM;
2880                 if (!u.lapic)
2881                         goto out;
2882                 r = -EFAULT;
2883                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2884                         goto out;
2885                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2886                 if (r)
2887                         goto out;
2888                 r = 0;
2889                 break;
2890         }
2891         case KVM_INTERRUPT: {
2892                 struct kvm_interrupt irq;
2893
2894                 r = -EFAULT;
2895                 if (copy_from_user(&irq, argp, sizeof irq))
2896                         goto out;
2897                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2898                 if (r)
2899                         goto out;
2900                 r = 0;
2901                 break;
2902         }
2903         case KVM_NMI: {
2904                 r = kvm_vcpu_ioctl_nmi(vcpu);
2905                 if (r)
2906                         goto out;
2907                 r = 0;
2908                 break;
2909         }
2910         case KVM_SET_CPUID: {
2911                 struct kvm_cpuid __user *cpuid_arg = argp;
2912                 struct kvm_cpuid cpuid;
2913
2914                 r = -EFAULT;
2915                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2916                         goto out;
2917                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2918                 if (r)
2919                         goto out;
2920                 break;
2921         }
2922         case KVM_SET_CPUID2: {
2923                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2924                 struct kvm_cpuid2 cpuid;
2925
2926                 r = -EFAULT;
2927                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2928                         goto out;
2929                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2930                                               cpuid_arg->entries);
2931                 if (r)
2932                         goto out;
2933                 break;
2934         }
2935         case KVM_GET_CPUID2: {
2936                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2937                 struct kvm_cpuid2 cpuid;
2938
2939                 r = -EFAULT;
2940                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2941                         goto out;
2942                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2943                                               cpuid_arg->entries);
2944                 if (r)
2945                         goto out;
2946                 r = -EFAULT;
2947                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2948                         goto out;
2949                 r = 0;
2950                 break;
2951         }
2952         case KVM_GET_MSRS:
2953                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2954                 break;
2955         case KVM_SET_MSRS:
2956                 r = msr_io(vcpu, argp, do_set_msr, 0);
2957                 break;
2958         case KVM_TPR_ACCESS_REPORTING: {
2959                 struct kvm_tpr_access_ctl tac;
2960
2961                 r = -EFAULT;
2962                 if (copy_from_user(&tac, argp, sizeof tac))
2963                         goto out;
2964                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2965                 if (r)
2966                         goto out;
2967                 r = -EFAULT;
2968                 if (copy_to_user(argp, &tac, sizeof tac))
2969                         goto out;
2970                 r = 0;
2971                 break;
2972         };
2973         case KVM_SET_VAPIC_ADDR: {
2974                 struct kvm_vapic_addr va;
2975
2976                 r = -EINVAL;
2977                 if (!irqchip_in_kernel(vcpu->kvm))
2978                         goto out;
2979                 r = -EFAULT;
2980                 if (copy_from_user(&va, argp, sizeof va))
2981                         goto out;
2982                 r = 0;
2983                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2984                 break;
2985         }
2986         case KVM_X86_SETUP_MCE: {
2987                 u64 mcg_cap;
2988
2989                 r = -EFAULT;
2990                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2991                         goto out;
2992                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2993                 break;
2994         }
2995         case KVM_X86_SET_MCE: {
2996                 struct kvm_x86_mce mce;
2997
2998                 r = -EFAULT;
2999                 if (copy_from_user(&mce, argp, sizeof mce))
3000                         goto out;
3001                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3002                 break;
3003         }
3004         case KVM_GET_VCPU_EVENTS: {
3005                 struct kvm_vcpu_events events;
3006
3007                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3008
3009                 r = -EFAULT;
3010                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3011                         break;
3012                 r = 0;
3013                 break;
3014         }
3015         case KVM_SET_VCPU_EVENTS: {
3016                 struct kvm_vcpu_events events;
3017
3018                 r = -EFAULT;
3019                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3020                         break;
3021
3022                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3023                 break;
3024         }
3025         case KVM_GET_DEBUGREGS: {
3026                 struct kvm_debugregs dbgregs;
3027
3028                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3029
3030                 r = -EFAULT;
3031                 if (copy_to_user(argp, &dbgregs,
3032                                  sizeof(struct kvm_debugregs)))
3033                         break;
3034                 r = 0;
3035                 break;
3036         }
3037         case KVM_SET_DEBUGREGS: {
3038                 struct kvm_debugregs dbgregs;
3039
3040                 r = -EFAULT;
3041                 if (copy_from_user(&dbgregs, argp,
3042                                    sizeof(struct kvm_debugregs)))
3043                         break;
3044
3045                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3046                 break;
3047         }
3048         case KVM_GET_XSAVE: {
3049                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3050                 r = -ENOMEM;
3051                 if (!u.xsave)
3052                         break;
3053
3054                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3055
3056                 r = -EFAULT;
3057                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3058                         break;
3059                 r = 0;
3060                 break;
3061         }
3062         case KVM_SET_XSAVE: {
3063                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3064                 r = -ENOMEM;
3065                 if (!u.xsave)
3066                         break;
3067
3068                 r = -EFAULT;
3069                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3070                         break;
3071
3072                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3073                 break;
3074         }
3075         case KVM_GET_XCRS: {
3076                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3077                 r = -ENOMEM;
3078                 if (!u.xcrs)
3079                         break;
3080
3081                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3082
3083                 r = -EFAULT;
3084                 if (copy_to_user(argp, u.xcrs,
3085                                  sizeof(struct kvm_xcrs)))
3086                         break;
3087                 r = 0;
3088                 break;
3089         }
3090         case KVM_SET_XCRS: {
3091                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3092                 r = -ENOMEM;
3093                 if (!u.xcrs)
3094                         break;
3095
3096                 r = -EFAULT;
3097                 if (copy_from_user(u.xcrs, argp,
3098                                    sizeof(struct kvm_xcrs)))
3099                         break;
3100
3101                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3102                 break;
3103         }
3104         case KVM_SET_TSC_KHZ: {
3105                 u32 user_tsc_khz;
3106
3107                 r = -EINVAL;
3108                 if (!kvm_has_tsc_control)
3109                         break;
3110
3111                 user_tsc_khz = (u32)arg;
3112
3113                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3114                         goto out;
3115
3116                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3117
3118                 r = 0;
3119                 goto out;
3120         }
3121         case KVM_GET_TSC_KHZ: {
3122                 r = -EIO;
3123                 if (check_tsc_unstable())
3124                         goto out;
3125
3126                 r = vcpu_tsc_khz(vcpu);
3127
3128                 goto out;
3129         }
3130         default:
3131                 r = -EINVAL;
3132         }
3133 out:
3134         kfree(u.buffer);
3135         return r;
3136 }
3137
3138 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3139 {
3140         int ret;
3141
3142         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3143                 return -1;
3144         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3145         return ret;
3146 }
3147
3148 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3149                                               u64 ident_addr)
3150 {
3151         kvm->arch.ept_identity_map_addr = ident_addr;
3152         return 0;
3153 }
3154
3155 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3156                                           u32 kvm_nr_mmu_pages)
3157 {
3158         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3159                 return -EINVAL;
3160
3161         mutex_lock(&kvm->slots_lock);
3162         spin_lock(&kvm->mmu_lock);
3163
3164         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3165         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3166
3167         spin_unlock(&kvm->mmu_lock);
3168         mutex_unlock(&kvm->slots_lock);
3169         return 0;
3170 }
3171
3172 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3173 {
3174         return kvm->arch.n_max_mmu_pages;
3175 }
3176
3177 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3178 {
3179         int r;
3180
3181         r = 0;
3182         switch (chip->chip_id) {
3183         case KVM_IRQCHIP_PIC_MASTER:
3184                 memcpy(&chip->chip.pic,
3185                         &pic_irqchip(kvm)->pics[0],
3186                         sizeof(struct kvm_pic_state));
3187                 break;
3188         case KVM_IRQCHIP_PIC_SLAVE:
3189                 memcpy(&chip->chip.pic,
3190                         &pic_irqchip(kvm)->pics[1],
3191                         sizeof(struct kvm_pic_state));
3192                 break;
3193         case KVM_IRQCHIP_IOAPIC:
3194                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3195                 break;
3196         default:
3197                 r = -EINVAL;
3198                 break;
3199         }
3200         return r;
3201 }
3202
3203 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3204 {
3205         int r;
3206
3207         r = 0;
3208         switch (chip->chip_id) {
3209         case KVM_IRQCHIP_PIC_MASTER:
3210                 spin_lock(&pic_irqchip(kvm)->lock);
3211                 memcpy(&pic_irqchip(kvm)->pics[0],
3212                         &chip->chip.pic,
3213                         sizeof(struct kvm_pic_state));
3214                 spin_unlock(&pic_irqchip(kvm)->lock);
3215                 break;
3216         case KVM_IRQCHIP_PIC_SLAVE:
3217                 spin_lock(&pic_irqchip(kvm)->lock);
3218                 memcpy(&pic_irqchip(kvm)->pics[1],
3219                         &chip->chip.pic,
3220                         sizeof(struct kvm_pic_state));
3221                 spin_unlock(&pic_irqchip(kvm)->lock);
3222                 break;
3223         case KVM_IRQCHIP_IOAPIC:
3224                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3225                 break;
3226         default:
3227                 r = -EINVAL;
3228                 break;
3229         }
3230         kvm_pic_update_irq(pic_irqchip(kvm));
3231         return r;
3232 }
3233
3234 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3235 {
3236         int r = 0;
3237
3238         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3239         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3240         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3241         return r;
3242 }
3243
3244 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3245 {
3246         int r = 0;
3247
3248         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3249         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3250         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3251         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3252         return r;
3253 }
3254
3255 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3256 {
3257         int r = 0;
3258
3259         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3260         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3261                 sizeof(ps->channels));
3262         ps->flags = kvm->arch.vpit->pit_state.flags;
3263         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3264         memset(&ps->reserved, 0, sizeof(ps->reserved));
3265         return r;
3266 }
3267
3268 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3269 {
3270         int r = 0, start = 0;
3271         u32 prev_legacy, cur_legacy;
3272         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3273         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3274         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3275         if (!prev_legacy && cur_legacy)
3276                 start = 1;
3277         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3278                sizeof(kvm->arch.vpit->pit_state.channels));
3279         kvm->arch.vpit->pit_state.flags = ps->flags;
3280         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3281         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3282         return r;
3283 }
3284
3285 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3286                                  struct kvm_reinject_control *control)
3287 {
3288         if (!kvm->arch.vpit)
3289                 return -ENXIO;
3290         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3291         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3292         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3293         return 0;
3294 }
3295
3296 /*
3297  * Get (and clear) the dirty memory log for a memory slot.
3298  */
3299 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3300                                       struct kvm_dirty_log *log)
3301 {
3302         int r, i;
3303         struct kvm_memory_slot *memslot;
3304         unsigned long n;
3305         unsigned long is_dirty = 0;
3306
3307         mutex_lock(&kvm->slots_lock);
3308
3309         r = -EINVAL;
3310         if (log->slot >= KVM_MEMORY_SLOTS)
3311                 goto out;
3312
3313         memslot = &kvm->memslots->memslots[log->slot];
3314         r = -ENOENT;
3315         if (!memslot->dirty_bitmap)
3316                 goto out;
3317
3318         n = kvm_dirty_bitmap_bytes(memslot);
3319
3320         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3321                 is_dirty = memslot->dirty_bitmap[i];
3322
3323         /* If nothing is dirty, don't bother messing with page tables. */
3324         if (is_dirty) {
3325                 struct kvm_memslots *slots, *old_slots;
3326                 unsigned long *dirty_bitmap;
3327
3328                 dirty_bitmap = memslot->dirty_bitmap_head;
3329                 if (memslot->dirty_bitmap == dirty_bitmap)
3330                         dirty_bitmap += n / sizeof(long);
3331                 memset(dirty_bitmap, 0, n);
3332
3333                 r = -ENOMEM;
3334                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3335                 if (!slots)
3336                         goto out;
3337                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3338                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3339                 slots->generation++;
3340
3341                 old_slots = kvm->memslots;
3342                 rcu_assign_pointer(kvm->memslots, slots);
3343                 synchronize_srcu_expedited(&kvm->srcu);
3344                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3345                 kfree(old_slots);
3346
3347                 spin_lock(&kvm->mmu_lock);
3348                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3349                 spin_unlock(&kvm->mmu_lock);
3350
3351                 r = -EFAULT;
3352                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3353                         goto out;
3354         } else {
3355                 r = -EFAULT;
3356                 if (clear_user(log->dirty_bitmap, n))
3357                         goto out;
3358         }
3359
3360         r = 0;
3361 out:
3362         mutex_unlock(&kvm->slots_lock);
3363         return r;
3364 }
3365
3366 long kvm_arch_vm_ioctl(struct file *filp,
3367                        unsigned int ioctl, unsigned long arg)
3368 {
3369         struct kvm *kvm = filp->private_data;
3370         void __user *argp = (void __user *)arg;
3371         int r = -ENOTTY;
3372         /*
3373          * This union makes it completely explicit to gcc-3.x
3374          * that these two variables' stack usage should be
3375          * combined, not added together.
3376          */
3377         union {
3378                 struct kvm_pit_state ps;
3379                 struct kvm_pit_state2 ps2;
3380                 struct kvm_pit_config pit_config;
3381         } u;
3382
3383         switch (ioctl) {
3384         case KVM_SET_TSS_ADDR:
3385                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3386                 if (r < 0)
3387                         goto out;
3388                 break;
3389         case KVM_SET_IDENTITY_MAP_ADDR: {
3390                 u64 ident_addr;
3391
3392                 r = -EFAULT;
3393                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3394                         goto out;
3395                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3396                 if (r < 0)
3397                         goto out;
3398                 break;
3399         }
3400         case KVM_SET_NR_MMU_PAGES:
3401                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3402                 if (r)
3403                         goto out;
3404                 break;
3405         case KVM_GET_NR_MMU_PAGES:
3406                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3407                 break;
3408         case KVM_CREATE_IRQCHIP: {
3409                 struct kvm_pic *vpic;
3410
3411                 mutex_lock(&kvm->lock);
3412                 r = -EEXIST;
3413                 if (kvm->arch.vpic)
3414                         goto create_irqchip_unlock;
3415                 r = -ENOMEM;
3416                 vpic = kvm_create_pic(kvm);
3417                 if (vpic) {
3418                         r = kvm_ioapic_init(kvm);
3419                         if (r) {
3420                                 mutex_lock(&kvm->slots_lock);
3421                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3422                                                           &vpic->dev);
3423                                 mutex_unlock(&kvm->slots_lock);
3424                                 kfree(vpic);
3425                                 goto create_irqchip_unlock;
3426                         }
3427                 } else
3428                         goto create_irqchip_unlock;
3429                 smp_wmb();
3430                 kvm->arch.vpic = vpic;
3431                 smp_wmb();
3432                 r = kvm_setup_default_irq_routing(kvm);
3433                 if (r) {
3434                         mutex_lock(&kvm->slots_lock);
3435                         mutex_lock(&kvm->irq_lock);
3436                         kvm_ioapic_destroy(kvm);
3437                         kvm_destroy_pic(kvm);
3438                         mutex_unlock(&kvm->irq_lock);
3439                         mutex_unlock(&kvm->slots_lock);
3440                 }
3441         create_irqchip_unlock:
3442                 mutex_unlock(&kvm->lock);
3443                 break;
3444         }
3445         case KVM_CREATE_PIT:
3446                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3447                 goto create_pit;
3448         case KVM_CREATE_PIT2:
3449                 r = -EFAULT;
3450                 if (copy_from_user(&u.pit_config, argp,
3451                                    sizeof(struct kvm_pit_config)))
3452                         goto out;
3453         create_pit:
3454                 mutex_lock(&kvm->slots_lock);
3455                 r = -EEXIST;
3456                 if (kvm->arch.vpit)
3457                         goto create_pit_unlock;
3458                 r = -ENOMEM;
3459                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3460                 if (kvm->arch.vpit)
3461                         r = 0;
3462         create_pit_unlock:
3463                 mutex_unlock(&kvm->slots_lock);
3464                 break;
3465         case KVM_IRQ_LINE_STATUS:
3466         case KVM_IRQ_LINE: {
3467                 struct kvm_irq_level irq_event;
3468
3469                 r = -EFAULT;
3470                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3471                         goto out;
3472                 r = -ENXIO;
3473                 if (irqchip_in_kernel(kvm)) {
3474                         __s32 status;
3475                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3476                                         irq_event.irq, irq_event.level);
3477                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3478                                 r = -EFAULT;
3479                                 irq_event.status = status;
3480                                 if (copy_to_user(argp, &irq_event,
3481                                                         sizeof irq_event))
3482                                         goto out;
3483                         }
3484                         r = 0;
3485                 }
3486                 break;
3487         }
3488         case KVM_GET_IRQCHIP: {
3489                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3490                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3491
3492                 r = -ENOMEM;
3493                 if (!chip)
3494                         goto out;
3495                 r = -EFAULT;
3496                 if (copy_from_user(chip, argp, sizeof *chip))
3497                         goto get_irqchip_out;
3498                 r = -ENXIO;
3499                 if (!irqchip_in_kernel(kvm))
3500                         goto get_irqchip_out;
3501                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3502                 if (r)
3503                         goto get_irqchip_out;
3504                 r = -EFAULT;
3505                 if (copy_to_user(argp, chip, sizeof *chip))
3506                         goto get_irqchip_out;
3507                 r = 0;
3508         get_irqchip_out:
3509                 kfree(chip);
3510                 if (r)
3511                         goto out;
3512                 break;
3513         }
3514         case KVM_SET_IRQCHIP: {
3515                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3516                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3517
3518                 r = -ENOMEM;
3519                 if (!chip)
3520                         goto out;
3521                 r = -EFAULT;
3522                 if (copy_from_user(chip, argp, sizeof *chip))
3523                         goto set_irqchip_out;
3524                 r = -ENXIO;
3525                 if (!irqchip_in_kernel(kvm))
3526                         goto set_irqchip_out;
3527                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3528                 if (r)
3529                         goto set_irqchip_out;
3530                 r = 0;
3531         set_irqchip_out:
3532                 kfree(chip);
3533                 if (r)
3534                         goto out;
3535                 break;
3536         }
3537         case KVM_GET_PIT: {
3538                 r = -EFAULT;
3539                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3540                         goto out;
3541                 r = -ENXIO;
3542                 if (!kvm->arch.vpit)
3543                         goto out;
3544                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3545                 if (r)
3546                         goto out;
3547                 r = -EFAULT;
3548                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3549                         goto out;
3550                 r = 0;
3551                 break;
3552         }
3553         case KVM_SET_PIT: {
3554                 r = -EFAULT;
3555                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3556                         goto out;
3557                 r = -ENXIO;
3558                 if (!kvm->arch.vpit)
3559                         goto out;
3560                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3561                 if (r)
3562                         goto out;
3563                 r = 0;
3564                 break;
3565         }
3566         case KVM_GET_PIT2: {
3567                 r = -ENXIO;
3568                 if (!kvm->arch.vpit)
3569                         goto out;
3570                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3571                 if (r)
3572                         goto out;
3573                 r = -EFAULT;
3574                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3575                         goto out;
3576                 r = 0;
3577                 break;
3578         }
3579         case KVM_SET_PIT2: {
3580                 r = -EFAULT;
3581                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3582                         goto out;
3583                 r = -ENXIO;
3584                 if (!kvm->arch.vpit)
3585                         goto out;
3586                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3587                 if (r)
3588                         goto out;
3589                 r = 0;
3590                 break;
3591         }
3592         case KVM_REINJECT_CONTROL: {
3593                 struct kvm_reinject_control control;
3594                 r =  -EFAULT;
3595                 if (copy_from_user(&control, argp, sizeof(control)))
3596                         goto out;
3597                 r = kvm_vm_ioctl_reinject(kvm, &control);
3598                 if (r)
3599                         goto out;
3600                 r = 0;
3601                 break;
3602         }
3603         case KVM_XEN_HVM_CONFIG: {
3604                 r = -EFAULT;
3605                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3606                                    sizeof(struct kvm_xen_hvm_config)))
3607                         goto out;
3608                 r = -EINVAL;
3609                 if (kvm->arch.xen_hvm_config.flags)
3610                         goto out;
3611                 r = 0;
3612                 break;
3613         }
3614         case KVM_SET_CLOCK: {
3615                 struct kvm_clock_data user_ns;
3616                 u64 now_ns;
3617                 s64 delta;
3618
3619                 r = -EFAULT;
3620                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3621                         goto out;
3622
3623                 r = -EINVAL;
3624                 if (user_ns.flags)
3625                         goto out;
3626
3627                 r = 0;
3628                 local_irq_disable();
3629                 now_ns = get_kernel_ns();
3630                 delta = user_ns.clock - now_ns;
3631                 local_irq_enable();
3632                 kvm->arch.kvmclock_offset = delta;
3633                 break;
3634         }
3635         case KVM_GET_CLOCK: {
3636                 struct kvm_clock_data user_ns;
3637                 u64 now_ns;
3638
3639                 local_irq_disable();
3640                 now_ns = get_kernel_ns();
3641                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3642                 local_irq_enable();
3643                 user_ns.flags = 0;
3644                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3645
3646                 r = -EFAULT;
3647                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3648                         goto out;
3649                 r = 0;
3650                 break;
3651         }
3652
3653         default:
3654                 ;
3655         }
3656 out:
3657         return r;
3658 }
3659
3660 static void kvm_init_msr_list(void)
3661 {
3662         u32 dummy[2];
3663         unsigned i, j;
3664
3665         /* skip the first msrs in the list. KVM-specific */
3666         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3667                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3668                         continue;
3669                 if (j < i)
3670                         msrs_to_save[j] = msrs_to_save[i];
3671                 j++;
3672         }
3673         num_msrs_to_save = j;
3674 }
3675
3676 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3677                            const void *v)
3678 {
3679         int handled = 0;
3680         int n;
3681
3682         do {
3683                 n = min(len, 8);
3684                 if (!(vcpu->arch.apic &&
3685                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3686                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3687                         break;
3688                 handled += n;
3689                 addr += n;
3690                 len -= n;
3691                 v += n;
3692         } while (len);
3693
3694         return handled;
3695 }
3696
3697 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3698 {
3699         int handled = 0;
3700         int n;
3701
3702         do {
3703                 n = min(len, 8);
3704                 if (!(vcpu->arch.apic &&
3705                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3706                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3707                         break;
3708                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3709                 handled += n;
3710                 addr += n;
3711                 len -= n;
3712                 v += n;
3713         } while (len);
3714
3715         return handled;
3716 }
3717
3718 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3719                         struct kvm_segment *var, int seg)
3720 {
3721         kvm_x86_ops->set_segment(vcpu, var, seg);
3722 }
3723
3724 void kvm_get_segment(struct kvm_vcpu *vcpu,
3725                      struct kvm_segment *var, int seg)
3726 {
3727         kvm_x86_ops->get_segment(vcpu, var, seg);
3728 }
3729
3730 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3731 {
3732         return gpa;
3733 }
3734
3735 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3736 {
3737         gpa_t t_gpa;
3738         struct x86_exception exception;
3739
3740         BUG_ON(!mmu_is_nested(vcpu));
3741
3742         /* NPT walks are always user-walks */
3743         access |= PFERR_USER_MASK;
3744         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3745
3746         return t_gpa;
3747 }
3748
3749 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3750                               struct x86_exception *exception)
3751 {
3752         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3753         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3754 }
3755
3756  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3757                                 struct x86_exception *exception)
3758 {
3759         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3760         access |= PFERR_FETCH_MASK;
3761         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3762 }
3763
3764 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3765                                struct x86_exception *exception)
3766 {
3767         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3768         access |= PFERR_WRITE_MASK;
3769         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3770 }
3771
3772 /* uses this to access any guest's mapped memory without checking CPL */
3773 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3774                                 struct x86_exception *exception)
3775 {
3776         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3777 }
3778
3779 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3780                                       struct kvm_vcpu *vcpu, u32 access,
3781                                       struct x86_exception *exception)
3782 {
3783         void *data = val;
3784         int r = X86EMUL_CONTINUE;
3785
3786         while (bytes) {
3787                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3788                                                             exception);
3789                 unsigned offset = addr & (PAGE_SIZE-1);
3790                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3791                 int ret;
3792
3793                 if (gpa == UNMAPPED_GVA)
3794                         return X86EMUL_PROPAGATE_FAULT;
3795                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3796                 if (ret < 0) {
3797                         r = X86EMUL_IO_NEEDED;
3798                         goto out;
3799                 }
3800
3801                 bytes -= toread;
3802                 data += toread;
3803                 addr += toread;
3804         }
3805 out:
3806         return r;
3807 }
3808
3809 /* used for instruction fetching */
3810 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3811                                 gva_t addr, void *val, unsigned int bytes,
3812                                 struct x86_exception *exception)
3813 {
3814         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3815         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3816
3817         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3818                                           access | PFERR_FETCH_MASK,
3819                                           exception);
3820 }
3821
3822 static int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3823                                gva_t addr, void *val, unsigned int bytes,
3824                                struct x86_exception *exception)
3825 {
3826         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3827         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3828
3829         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3830                                           exception);
3831 }
3832
3833 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3834                                       gva_t addr, void *val, unsigned int bytes,
3835                                       struct x86_exception *exception)
3836 {
3837         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3838         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3839 }
3840
3841 static int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3842                                        gva_t addr, void *val,
3843                                        unsigned int bytes,
3844                                        struct x86_exception *exception)
3845 {
3846         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3847         void *data = val;
3848         int r = X86EMUL_CONTINUE;
3849
3850         while (bytes) {
3851                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3852                                                              PFERR_WRITE_MASK,
3853                                                              exception);
3854                 unsigned offset = addr & (PAGE_SIZE-1);
3855                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3856                 int ret;
3857
3858                 if (gpa == UNMAPPED_GVA)
3859                         return X86EMUL_PROPAGATE_FAULT;
3860                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3861                 if (ret < 0) {
3862                         r = X86EMUL_IO_NEEDED;
3863                         goto out;
3864                 }
3865
3866                 bytes -= towrite;
3867                 data += towrite;
3868                 addr += towrite;
3869         }
3870 out:
3871         return r;
3872 }
3873
3874 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3875                                   unsigned long addr,
3876                                   void *val,
3877                                   unsigned int bytes,
3878                                   struct x86_exception *exception)
3879 {
3880         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3881         gpa_t                 gpa;
3882         int handled;
3883
3884         if (vcpu->mmio_read_completed) {
3885                 memcpy(val, vcpu->mmio_data, bytes);
3886                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3887                                vcpu->mmio_phys_addr, *(u64 *)val);
3888                 vcpu->mmio_read_completed = 0;
3889                 return X86EMUL_CONTINUE;
3890         }
3891
3892         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3893
3894         if (gpa == UNMAPPED_GVA)
3895                 return X86EMUL_PROPAGATE_FAULT;
3896
3897         /* For APIC access vmexit */
3898         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3899                 goto mmio;
3900
3901         if (kvm_read_guest_virt(ctxt, addr, val, bytes, exception)
3902             == X86EMUL_CONTINUE)
3903                 return X86EMUL_CONTINUE;
3904
3905 mmio:
3906         /*
3907          * Is this MMIO handled locally?
3908          */
3909         handled = vcpu_mmio_read(vcpu, gpa, bytes, val);
3910
3911         if (handled == bytes)
3912                 return X86EMUL_CONTINUE;
3913
3914         gpa += handled;
3915         bytes -= handled;
3916         val += handled;
3917
3918         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3919
3920         vcpu->mmio_needed = 1;
3921         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3922         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3923         vcpu->mmio_size = bytes;
3924         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3925         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3926         vcpu->mmio_index = 0;
3927
3928         return X86EMUL_IO_NEEDED;
3929 }
3930
3931 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3932                         const void *val, int bytes)
3933 {
3934         int ret;
3935
3936         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3937         if (ret < 0)
3938                 return 0;
3939         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3940         return 1;
3941 }
3942
3943 static int emulator_write_emulated_onepage(unsigned long addr,
3944                                            const void *val,
3945                                            unsigned int bytes,
3946                                            struct x86_exception *exception,
3947                                            struct kvm_vcpu *vcpu)
3948 {
3949         gpa_t                 gpa;
3950         int handled;
3951
3952         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3953
3954         if (gpa == UNMAPPED_GVA)
3955                 return X86EMUL_PROPAGATE_FAULT;
3956
3957         /* For APIC access vmexit */
3958         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3959                 goto mmio;
3960
3961         if (emulator_write_phys(vcpu, gpa, val, bytes))
3962                 return X86EMUL_CONTINUE;
3963
3964 mmio:
3965         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3966         /*
3967          * Is this MMIO handled locally?
3968          */
3969         handled = vcpu_mmio_write(vcpu, gpa, bytes, val);
3970         if (handled == bytes)
3971                 return X86EMUL_CONTINUE;
3972
3973         gpa += handled;
3974         bytes -= handled;
3975         val += handled;
3976
3977         vcpu->mmio_needed = 1;
3978         memcpy(vcpu->mmio_data, val, bytes);
3979         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3980         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3981         vcpu->mmio_size = bytes;
3982         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3983         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3984         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3985         vcpu->mmio_index = 0;
3986
3987         return X86EMUL_CONTINUE;
3988 }
3989
3990 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3991                             unsigned long addr,
3992                             const void *val,
3993                             unsigned int bytes,
3994                             struct x86_exception *exception)
3995 {
3996         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3997
3998         /* Crossing a page boundary? */
3999         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4000                 int rc, now;
4001
4002                 now = -addr & ~PAGE_MASK;
4003                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
4004                                                      vcpu);
4005                 if (rc != X86EMUL_CONTINUE)
4006                         return rc;
4007                 addr += now;
4008                 val += now;
4009                 bytes -= now;
4010         }
4011         return emulator_write_emulated_onepage(addr, val, bytes, exception,
4012                                                vcpu);
4013 }
4014
4015 #define CMPXCHG_TYPE(t, ptr, old, new) \
4016         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4017
4018 #ifdef CONFIG_X86_64
4019 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4020 #else
4021 #  define CMPXCHG64(ptr, old, new) \
4022         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4023 #endif
4024
4025 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4026                                      unsigned long addr,
4027                                      const void *old,
4028                                      const void *new,
4029                                      unsigned int bytes,
4030                                      struct x86_exception *exception)
4031 {
4032         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4033         gpa_t gpa;
4034         struct page *page;
4035         char *kaddr;
4036         bool exchanged;
4037
4038         /* guests cmpxchg8b have to be emulated atomically */
4039         if (bytes > 8 || (bytes & (bytes - 1)))
4040                 goto emul_write;
4041
4042         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4043
4044         if (gpa == UNMAPPED_GVA ||
4045             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4046                 goto emul_write;
4047
4048         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4049                 goto emul_write;
4050
4051         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4052         if (is_error_page(page)) {
4053                 kvm_release_page_clean(page);
4054                 goto emul_write;
4055         }
4056
4057         kaddr = kmap_atomic(page, KM_USER0);
4058         kaddr += offset_in_page(gpa);
4059         switch (bytes) {
4060         case 1:
4061                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4062                 break;
4063         case 2:
4064                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4065                 break;
4066         case 4:
4067                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4068                 break;
4069         case 8:
4070                 exchanged = CMPXCHG64(kaddr, old, new);
4071                 break;
4072         default:
4073                 BUG();
4074         }
4075         kunmap_atomic(kaddr, KM_USER0);
4076         kvm_release_page_dirty(page);
4077
4078         if (!exchanged)
4079                 return X86EMUL_CMPXCHG_FAILED;
4080
4081         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4082
4083         return X86EMUL_CONTINUE;
4084
4085 emul_write:
4086         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4087
4088         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4089 }
4090
4091 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4092 {
4093         /* TODO: String I/O for in kernel device */
4094         int r;
4095
4096         if (vcpu->arch.pio.in)
4097                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4098                                     vcpu->arch.pio.size, pd);
4099         else
4100                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4101                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4102                                      pd);
4103         return r;
4104 }
4105
4106
4107 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4108                                     int size, unsigned short port, void *val,
4109                                     unsigned int count)
4110 {
4111         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4112
4113         if (vcpu->arch.pio.count)
4114                 goto data_avail;
4115
4116         trace_kvm_pio(0, port, size, count);
4117
4118         vcpu->arch.pio.port = port;
4119         vcpu->arch.pio.in = 1;
4120         vcpu->arch.pio.count  = count;
4121         vcpu->arch.pio.size = size;
4122
4123         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4124         data_avail:
4125                 memcpy(val, vcpu->arch.pio_data, size * count);
4126                 vcpu->arch.pio.count = 0;
4127                 return 1;
4128         }
4129
4130         vcpu->run->exit_reason = KVM_EXIT_IO;
4131         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4132         vcpu->run->io.size = size;
4133         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4134         vcpu->run->io.count = count;
4135         vcpu->run->io.port = port;
4136
4137         return 0;
4138 }
4139
4140 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4141                                      int size, unsigned short port,
4142                                      const void *val, unsigned int count)
4143 {
4144         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4145
4146         trace_kvm_pio(1, port, size, count);
4147
4148         vcpu->arch.pio.port = port;
4149         vcpu->arch.pio.in = 0;
4150         vcpu->arch.pio.count = count;
4151         vcpu->arch.pio.size = size;
4152
4153         memcpy(vcpu->arch.pio_data, val, size * count);
4154
4155         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4156                 vcpu->arch.pio.count = 0;
4157                 return 1;
4158         }
4159
4160         vcpu->run->exit_reason = KVM_EXIT_IO;
4161         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4162         vcpu->run->io.size = size;
4163         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4164         vcpu->run->io.count = count;
4165         vcpu->run->io.port = port;
4166
4167         return 0;
4168 }
4169
4170 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4171 {
4172         return kvm_x86_ops->get_segment_base(vcpu, seg);
4173 }
4174
4175 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4176 {
4177         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4178 }
4179
4180 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4181 {
4182         if (!need_emulate_wbinvd(vcpu))
4183                 return X86EMUL_CONTINUE;
4184
4185         if (kvm_x86_ops->has_wbinvd_exit()) {
4186                 int cpu = get_cpu();
4187
4188                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4189                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4190                                 wbinvd_ipi, NULL, 1);
4191                 put_cpu();
4192                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4193         } else
4194                 wbinvd();
4195         return X86EMUL_CONTINUE;
4196 }
4197 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4198
4199 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4200 {
4201         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4202 }
4203
4204 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4205 {
4206         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4207 }
4208
4209 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4210 {
4211
4212         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4213 }
4214
4215 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4216 {
4217         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4218 }
4219
4220 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4221 {
4222         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4223         unsigned long value;
4224
4225         switch (cr) {
4226         case 0:
4227                 value = kvm_read_cr0(vcpu);
4228                 break;
4229         case 2:
4230                 value = vcpu->arch.cr2;
4231                 break;
4232         case 3:
4233                 value = kvm_read_cr3(vcpu);
4234                 break;
4235         case 4:
4236                 value = kvm_read_cr4(vcpu);
4237                 break;
4238         case 8:
4239                 value = kvm_get_cr8(vcpu);
4240                 break;
4241         default:
4242                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4243                 return 0;
4244         }
4245
4246         return value;
4247 }
4248
4249 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4250 {
4251         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4252         int res = 0;
4253
4254         switch (cr) {
4255         case 0:
4256                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4257                 break;
4258         case 2:
4259                 vcpu->arch.cr2 = val;
4260                 break;
4261         case 3:
4262                 res = kvm_set_cr3(vcpu, val);
4263                 break;
4264         case 4:
4265                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4266                 break;
4267         case 8:
4268                 res = kvm_set_cr8(vcpu, val);
4269                 break;
4270         default:
4271                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4272                 res = -1;
4273         }
4274
4275         return res;
4276 }
4277
4278 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4279 {
4280         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4281 }
4282
4283 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4284 {
4285         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4286 }
4287
4288 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4289 {
4290         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4291 }
4292
4293 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4294 {
4295         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4296 }
4297
4298 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4299 {
4300         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4301 }
4302
4303 static unsigned long emulator_get_cached_segment_base(
4304         struct x86_emulate_ctxt *ctxt, int seg)
4305 {
4306         return get_segment_base(emul_to_vcpu(ctxt), seg);
4307 }
4308
4309 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4310                                  struct desc_struct *desc, u32 *base3,
4311                                  int seg)
4312 {
4313         struct kvm_segment var;
4314
4315         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4316         *selector = var.selector;
4317
4318         if (var.unusable)
4319                 return false;
4320
4321         if (var.g)
4322                 var.limit >>= 12;
4323         set_desc_limit(desc, var.limit);
4324         set_desc_base(desc, (unsigned long)var.base);
4325 #ifdef CONFIG_X86_64
4326         if (base3)
4327                 *base3 = var.base >> 32;
4328 #endif
4329         desc->type = var.type;
4330         desc->s = var.s;
4331         desc->dpl = var.dpl;
4332         desc->p = var.present;
4333         desc->avl = var.avl;
4334         desc->l = var.l;
4335         desc->d = var.db;
4336         desc->g = var.g;
4337
4338         return true;
4339 }
4340
4341 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4342                                  struct desc_struct *desc, u32 base3,
4343                                  int seg)
4344 {
4345         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4346         struct kvm_segment var;
4347
4348         var.selector = selector;
4349         var.base = get_desc_base(desc);
4350 #ifdef CONFIG_X86_64
4351         var.base |= ((u64)base3) << 32;
4352 #endif
4353         var.limit = get_desc_limit(desc);
4354         if (desc->g)
4355                 var.limit = (var.limit << 12) | 0xfff;
4356         var.type = desc->type;
4357         var.present = desc->p;
4358         var.dpl = desc->dpl;
4359         var.db = desc->d;
4360         var.s = desc->s;
4361         var.l = desc->l;
4362         var.g = desc->g;
4363         var.avl = desc->avl;
4364         var.present = desc->p;
4365         var.unusable = !var.present;
4366         var.padding = 0;
4367
4368         kvm_set_segment(vcpu, &var, seg);
4369         return;
4370 }
4371
4372 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4373                             u32 msr_index, u64 *pdata)
4374 {
4375         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4376 }
4377
4378 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4379                             u32 msr_index, u64 data)
4380 {
4381         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4382 }
4383
4384 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4385 {
4386         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4387 }
4388
4389 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4390 {
4391         preempt_disable();
4392         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4393         /*
4394          * CR0.TS may reference the host fpu state, not the guest fpu state,
4395          * so it may be clear at this point.
4396          */
4397         clts();
4398 }
4399
4400 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4401 {
4402         preempt_enable();
4403 }
4404
4405 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4406                               struct x86_instruction_info *info,
4407                               enum x86_intercept_stage stage)
4408 {
4409         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4410 }
4411
4412 static struct x86_emulate_ops emulate_ops = {
4413         .read_std            = kvm_read_guest_virt_system,
4414         .write_std           = kvm_write_guest_virt_system,
4415         .fetch               = kvm_fetch_guest_virt,
4416         .read_emulated       = emulator_read_emulated,
4417         .write_emulated      = emulator_write_emulated,
4418         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4419         .invlpg              = emulator_invlpg,
4420         .pio_in_emulated     = emulator_pio_in_emulated,
4421         .pio_out_emulated    = emulator_pio_out_emulated,
4422         .get_segment         = emulator_get_segment,
4423         .set_segment         = emulator_set_segment,
4424         .get_cached_segment_base = emulator_get_cached_segment_base,
4425         .get_gdt             = emulator_get_gdt,
4426         .get_idt             = emulator_get_idt,
4427         .set_gdt             = emulator_set_gdt,
4428         .set_idt             = emulator_set_idt,
4429         .get_cr              = emulator_get_cr,
4430         .set_cr              = emulator_set_cr,
4431         .cpl                 = emulator_get_cpl,
4432         .get_dr              = emulator_get_dr,
4433         .set_dr              = emulator_set_dr,
4434         .set_msr             = emulator_set_msr,
4435         .get_msr             = emulator_get_msr,
4436         .halt                = emulator_halt,
4437         .wbinvd              = emulator_wbinvd,
4438         .fix_hypercall       = emulator_fix_hypercall,
4439         .get_fpu             = emulator_get_fpu,
4440         .put_fpu             = emulator_put_fpu,
4441         .intercept           = emulator_intercept,
4442 };
4443
4444 static void cache_all_regs(struct kvm_vcpu *vcpu)
4445 {
4446         kvm_register_read(vcpu, VCPU_REGS_RAX);
4447         kvm_register_read(vcpu, VCPU_REGS_RSP);
4448         kvm_register_read(vcpu, VCPU_REGS_RIP);
4449         vcpu->arch.regs_dirty = ~0;
4450 }
4451
4452 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4453 {
4454         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4455         /*
4456          * an sti; sti; sequence only disable interrupts for the first
4457          * instruction. So, if the last instruction, be it emulated or
4458          * not, left the system with the INT_STI flag enabled, it
4459          * means that the last instruction is an sti. We should not
4460          * leave the flag on in this case. The same goes for mov ss
4461          */
4462         if (!(int_shadow & mask))
4463                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4464 }
4465
4466 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4467 {
4468         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4469         if (ctxt->exception.vector == PF_VECTOR)
4470                 kvm_propagate_fault(vcpu, &ctxt->exception);
4471         else if (ctxt->exception.error_code_valid)
4472                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4473                                       ctxt->exception.error_code);
4474         else
4475                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4476 }
4477
4478 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4479 {
4480         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4481         int cs_db, cs_l;
4482
4483         /*
4484          * TODO: fix emulate.c to use guest_read/write_register
4485          * instead of direct ->regs accesses, can save hundred cycles
4486          * on Intel for instructions that don't read/change RSP, for
4487          * for example.
4488          */
4489         cache_all_regs(vcpu);
4490
4491         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4492
4493         vcpu->arch.emulate_ctxt.eflags = kvm_get_rflags(vcpu);
4494         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4495         vcpu->arch.emulate_ctxt.mode =
4496                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4497                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4498                 ? X86EMUL_MODE_VM86 : cs_l
4499                 ? X86EMUL_MODE_PROT64 : cs_db
4500                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4501         vcpu->arch.emulate_ctxt.guest_mode = is_guest_mode(vcpu);
4502         memset(c, 0, sizeof(struct decode_cache));
4503         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4504         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4505 }
4506
4507 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4508 {
4509         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4510         int ret;
4511
4512         init_emulate_ctxt(vcpu);
4513
4514         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4515         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4516         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip +
4517                                                                  inc_eip;
4518         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4519
4520         if (ret != X86EMUL_CONTINUE)
4521                 return EMULATE_FAIL;
4522
4523         vcpu->arch.emulate_ctxt.eip = c->eip;
4524         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4525         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4526         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4527
4528         if (irq == NMI_VECTOR)
4529                 vcpu->arch.nmi_pending = false;
4530         else
4531                 vcpu->arch.interrupt.pending = false;
4532
4533         return EMULATE_DONE;
4534 }
4535 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4536
4537 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4538 {
4539         int r = EMULATE_DONE;
4540
4541         ++vcpu->stat.insn_emulation_fail;
4542         trace_kvm_emulate_insn_failed(vcpu);
4543         if (!is_guest_mode(vcpu)) {
4544                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4545                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4546                 vcpu->run->internal.ndata = 0;
4547                 r = EMULATE_FAIL;
4548         }
4549         kvm_queue_exception(vcpu, UD_VECTOR);
4550
4551         return r;
4552 }
4553
4554 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4555 {
4556         gpa_t gpa;
4557
4558         if (tdp_enabled)
4559                 return false;
4560
4561         /*
4562          * if emulation was due to access to shadowed page table
4563          * and it failed try to unshadow page and re-entetr the
4564          * guest to let CPU execute the instruction.
4565          */
4566         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4567                 return true;
4568
4569         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4570
4571         if (gpa == UNMAPPED_GVA)
4572                 return true; /* let cpu generate fault */
4573
4574         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4575                 return true;
4576
4577         return false;
4578 }
4579
4580 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4581                             unsigned long cr2,
4582                             int emulation_type,
4583                             void *insn,
4584                             int insn_len)
4585 {
4586         int r;
4587         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4588         bool writeback = true;
4589
4590         kvm_clear_exception_queue(vcpu);
4591
4592         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4593                 init_emulate_ctxt(vcpu);
4594                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4595                 vcpu->arch.emulate_ctxt.have_exception = false;
4596                 vcpu->arch.emulate_ctxt.perm_ok = false;
4597
4598                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4599                         = emulation_type & EMULTYPE_TRAP_UD;
4600
4601                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4602
4603                 trace_kvm_emulate_insn_start(vcpu);
4604                 ++vcpu->stat.insn_emulation;
4605                 if (r)  {
4606                         if (emulation_type & EMULTYPE_TRAP_UD)
4607                                 return EMULATE_FAIL;
4608                         if (reexecute_instruction(vcpu, cr2))
4609                                 return EMULATE_DONE;
4610                         if (emulation_type & EMULTYPE_SKIP)
4611                                 return EMULATE_FAIL;
4612                         return handle_emulation_failure(vcpu);
4613                 }
4614         }
4615
4616         if (emulation_type & EMULTYPE_SKIP) {
4617                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4618                 return EMULATE_DONE;
4619         }
4620
4621         /* this is needed for vmware backdoor interface to work since it
4622            changes registers values  during IO operation */
4623         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4624                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4625                 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4626         }
4627
4628 restart:
4629         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4630
4631         if (r == EMULATION_INTERCEPTED)
4632                 return EMULATE_DONE;
4633
4634         if (r == EMULATION_FAILED) {
4635                 if (reexecute_instruction(vcpu, cr2))
4636                         return EMULATE_DONE;
4637
4638                 return handle_emulation_failure(vcpu);
4639         }
4640
4641         if (vcpu->arch.emulate_ctxt.have_exception) {
4642                 inject_emulated_exception(vcpu);
4643                 r = EMULATE_DONE;
4644         } else if (vcpu->arch.pio.count) {
4645                 if (!vcpu->arch.pio.in)
4646                         vcpu->arch.pio.count = 0;
4647                 else
4648                         writeback = false;
4649                 r = EMULATE_DO_MMIO;
4650         } else if (vcpu->mmio_needed) {
4651                 if (!vcpu->mmio_is_write)
4652                         writeback = false;
4653                 r = EMULATE_DO_MMIO;
4654         } else if (r == EMULATION_RESTART)
4655                 goto restart;
4656         else
4657                 r = EMULATE_DONE;
4658
4659         if (writeback) {
4660                 toggle_interruptibility(vcpu,
4661                                 vcpu->arch.emulate_ctxt.interruptibility);
4662                 kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4663                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4664                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4665                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4666                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4667         } else
4668                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4669
4670         return r;
4671 }
4672 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4673
4674 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4675 {
4676         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4677         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4678                                             size, port, &val, 1);
4679         /* do not return to emulator after return from userspace */
4680         vcpu->arch.pio.count = 0;
4681         return ret;
4682 }
4683 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4684
4685 static void tsc_bad(void *info)
4686 {
4687         __this_cpu_write(cpu_tsc_khz, 0);
4688 }
4689
4690 static void tsc_khz_changed(void *data)
4691 {
4692         struct cpufreq_freqs *freq = data;
4693         unsigned long khz = 0;
4694
4695         if (data)
4696                 khz = freq->new;
4697         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4698                 khz = cpufreq_quick_get(raw_smp_processor_id());
4699         if (!khz)
4700                 khz = tsc_khz;
4701         __this_cpu_write(cpu_tsc_khz, khz);
4702 }
4703
4704 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4705                                      void *data)
4706 {
4707         struct cpufreq_freqs *freq = data;
4708         struct kvm *kvm;
4709         struct kvm_vcpu *vcpu;
4710         int i, send_ipi = 0;
4711
4712         /*
4713          * We allow guests to temporarily run on slowing clocks,
4714          * provided we notify them after, or to run on accelerating
4715          * clocks, provided we notify them before.  Thus time never
4716          * goes backwards.
4717          *
4718          * However, we have a problem.  We can't atomically update
4719          * the frequency of a given CPU from this function; it is
4720          * merely a notifier, which can be called from any CPU.
4721          * Changing the TSC frequency at arbitrary points in time
4722          * requires a recomputation of local variables related to
4723          * the TSC for each VCPU.  We must flag these local variables
4724          * to be updated and be sure the update takes place with the
4725          * new frequency before any guests proceed.
4726          *
4727          * Unfortunately, the combination of hotplug CPU and frequency
4728          * change creates an intractable locking scenario; the order
4729          * of when these callouts happen is undefined with respect to
4730          * CPU hotplug, and they can race with each other.  As such,
4731          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4732          * undefined; you can actually have a CPU frequency change take
4733          * place in between the computation of X and the setting of the
4734          * variable.  To protect against this problem, all updates of
4735          * the per_cpu tsc_khz variable are done in an interrupt
4736          * protected IPI, and all callers wishing to update the value
4737          * must wait for a synchronous IPI to complete (which is trivial
4738          * if the caller is on the CPU already).  This establishes the
4739          * necessary total order on variable updates.
4740          *
4741          * Note that because a guest time update may take place
4742          * anytime after the setting of the VCPU's request bit, the
4743          * correct TSC value must be set before the request.  However,
4744          * to ensure the update actually makes it to any guest which
4745          * starts running in hardware virtualization between the set
4746          * and the acquisition of the spinlock, we must also ping the
4747          * CPU after setting the request bit.
4748          *
4749          */
4750
4751         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4752                 return 0;
4753         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4754                 return 0;
4755
4756         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4757
4758         raw_spin_lock(&kvm_lock);
4759         list_for_each_entry(kvm, &vm_list, vm_list) {
4760                 kvm_for_each_vcpu(i, vcpu, kvm) {
4761                         if (vcpu->cpu != freq->cpu)
4762                                 continue;
4763                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4764                         if (vcpu->cpu != smp_processor_id())
4765                                 send_ipi = 1;
4766                 }
4767         }
4768         raw_spin_unlock(&kvm_lock);
4769
4770         if (freq->old < freq->new && send_ipi) {
4771                 /*
4772                  * We upscale the frequency.  Must make the guest
4773                  * doesn't see old kvmclock values while running with
4774                  * the new frequency, otherwise we risk the guest sees
4775                  * time go backwards.
4776                  *
4777                  * In case we update the frequency for another cpu
4778                  * (which might be in guest context) send an interrupt
4779                  * to kick the cpu out of guest context.  Next time
4780                  * guest context is entered kvmclock will be updated,
4781                  * so the guest will not see stale values.
4782                  */
4783                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4784         }
4785         return 0;
4786 }
4787
4788 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4789         .notifier_call  = kvmclock_cpufreq_notifier
4790 };
4791
4792 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4793                                         unsigned long action, void *hcpu)
4794 {
4795         unsigned int cpu = (unsigned long)hcpu;
4796
4797         switch (action) {
4798                 case CPU_ONLINE:
4799                 case CPU_DOWN_FAILED:
4800                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4801                         break;
4802                 case CPU_DOWN_PREPARE:
4803                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4804                         break;
4805         }
4806         return NOTIFY_OK;
4807 }
4808
4809 static struct notifier_block kvmclock_cpu_notifier_block = {
4810         .notifier_call  = kvmclock_cpu_notifier,
4811         .priority = -INT_MAX
4812 };
4813
4814 static void kvm_timer_init(void)
4815 {
4816         int cpu;
4817
4818         max_tsc_khz = tsc_khz;
4819         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4820         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4821 #ifdef CONFIG_CPU_FREQ
4822                 struct cpufreq_policy policy;
4823                 memset(&policy, 0, sizeof(policy));
4824                 cpu = get_cpu();
4825                 cpufreq_get_policy(&policy, cpu);
4826                 if (policy.cpuinfo.max_freq)
4827                         max_tsc_khz = policy.cpuinfo.max_freq;
4828                 put_cpu();
4829 #endif
4830                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4831                                           CPUFREQ_TRANSITION_NOTIFIER);
4832         }
4833         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4834         for_each_online_cpu(cpu)
4835                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4836 }
4837
4838 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4839
4840 static int kvm_is_in_guest(void)
4841 {
4842         return percpu_read(current_vcpu) != NULL;
4843 }
4844
4845 static int kvm_is_user_mode(void)
4846 {
4847         int user_mode = 3;
4848
4849         if (percpu_read(current_vcpu))
4850                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4851
4852         return user_mode != 0;
4853 }
4854
4855 static unsigned long kvm_get_guest_ip(void)
4856 {
4857         unsigned long ip = 0;
4858
4859         if (percpu_read(current_vcpu))
4860                 ip = kvm_rip_read(percpu_read(current_vcpu));
4861
4862         return ip;
4863 }
4864
4865 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4866         .is_in_guest            = kvm_is_in_guest,
4867         .is_user_mode           = kvm_is_user_mode,
4868         .get_guest_ip           = kvm_get_guest_ip,
4869 };
4870
4871 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4872 {
4873         percpu_write(current_vcpu, vcpu);
4874 }
4875 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4876
4877 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4878 {
4879         percpu_write(current_vcpu, NULL);
4880 }
4881 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4882
4883 int kvm_arch_init(void *opaque)
4884 {
4885         int r;
4886         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4887
4888         if (kvm_x86_ops) {
4889                 printk(KERN_ERR "kvm: already loaded the other module\n");
4890                 r = -EEXIST;
4891                 goto out;
4892         }
4893
4894         if (!ops->cpu_has_kvm_support()) {
4895                 printk(KERN_ERR "kvm: no hardware support\n");
4896                 r = -EOPNOTSUPP;
4897                 goto out;
4898         }
4899         if (ops->disabled_by_bios()) {
4900                 printk(KERN_ERR "kvm: disabled by bios\n");
4901                 r = -EOPNOTSUPP;
4902                 goto out;
4903         }
4904
4905         r = kvm_mmu_module_init();
4906         if (r)
4907                 goto out;
4908
4909         kvm_init_msr_list();
4910
4911         kvm_x86_ops = ops;
4912         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4913         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4914                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4915
4916         kvm_timer_init();
4917
4918         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4919
4920         if (cpu_has_xsave)
4921                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4922
4923         return 0;
4924
4925 out:
4926         return r;
4927 }
4928
4929 void kvm_arch_exit(void)
4930 {
4931         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4932
4933         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4934                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4935                                             CPUFREQ_TRANSITION_NOTIFIER);
4936         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4937         kvm_x86_ops = NULL;
4938         kvm_mmu_module_exit();
4939 }
4940
4941 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4942 {
4943         ++vcpu->stat.halt_exits;
4944         if (irqchip_in_kernel(vcpu->kvm)) {
4945                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4946                 return 1;
4947         } else {
4948                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4949                 return 0;
4950         }
4951 }
4952 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4953
4954 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4955                            unsigned long a1)
4956 {
4957         if (is_long_mode(vcpu))
4958                 return a0;
4959         else
4960                 return a0 | ((gpa_t)a1 << 32);
4961 }
4962
4963 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4964 {
4965         u64 param, ingpa, outgpa, ret;
4966         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4967         bool fast, longmode;
4968         int cs_db, cs_l;
4969
4970         /*
4971          * hypercall generates UD from non zero cpl and real mode
4972          * per HYPER-V spec
4973          */
4974         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4975                 kvm_queue_exception(vcpu, UD_VECTOR);
4976                 return 0;
4977         }
4978
4979         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4980         longmode = is_long_mode(vcpu) && cs_l == 1;
4981
4982         if (!longmode) {
4983                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4984                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4985                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4986                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4987                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4988                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4989         }
4990 #ifdef CONFIG_X86_64
4991         else {
4992                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4993                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4994                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4995         }
4996 #endif
4997
4998         code = param & 0xffff;
4999         fast = (param >> 16) & 0x1;
5000         rep_cnt = (param >> 32) & 0xfff;
5001         rep_idx = (param >> 48) & 0xfff;
5002
5003         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5004
5005         switch (code) {
5006         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5007                 kvm_vcpu_on_spin(vcpu);
5008                 break;
5009         default:
5010                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5011                 break;
5012         }
5013
5014         ret = res | (((u64)rep_done & 0xfff) << 32);
5015         if (longmode) {
5016                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5017         } else {
5018                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5019                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5020         }
5021
5022         return 1;
5023 }
5024
5025 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5026 {
5027         unsigned long nr, a0, a1, a2, a3, ret;
5028         int r = 1;
5029
5030         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5031                 return kvm_hv_hypercall(vcpu);
5032
5033         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5034         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5035         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5036         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5037         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5038
5039         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5040
5041         if (!is_long_mode(vcpu)) {
5042                 nr &= 0xFFFFFFFF;
5043                 a0 &= 0xFFFFFFFF;
5044                 a1 &= 0xFFFFFFFF;
5045                 a2 &= 0xFFFFFFFF;
5046                 a3 &= 0xFFFFFFFF;
5047         }
5048
5049         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5050                 ret = -KVM_EPERM;
5051                 goto out;
5052         }
5053
5054         switch (nr) {
5055         case KVM_HC_VAPIC_POLL_IRQ:
5056                 ret = 0;
5057                 break;
5058         case KVM_HC_MMU_OP:
5059                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5060                 break;
5061         default:
5062                 ret = -KVM_ENOSYS;
5063                 break;
5064         }
5065 out:
5066         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5067         ++vcpu->stat.hypercalls;
5068         return r;
5069 }
5070 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5071
5072 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5073 {
5074         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5075         char instruction[3];
5076         unsigned long rip = kvm_rip_read(vcpu);
5077
5078         /*
5079          * Blow out the MMU to ensure that no other VCPU has an active mapping
5080          * to ensure that the updated hypercall appears atomically across all
5081          * VCPUs.
5082          */
5083         kvm_mmu_zap_all(vcpu->kvm);
5084
5085         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5086
5087         return emulator_write_emulated(&vcpu->arch.emulate_ctxt,
5088                                        rip, instruction, 3, NULL);
5089 }
5090
5091 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5092 {
5093         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5094         int j, nent = vcpu->arch.cpuid_nent;
5095
5096         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5097         /* when no next entry is found, the current entry[i] is reselected */
5098         for (j = i + 1; ; j = (j + 1) % nent) {
5099                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5100                 if (ej->function == e->function) {
5101                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5102                         return j;
5103                 }
5104         }
5105         return 0; /* silence gcc, even though control never reaches here */
5106 }
5107
5108 /* find an entry with matching function, matching index (if needed), and that
5109  * should be read next (if it's stateful) */
5110 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5111         u32 function, u32 index)
5112 {
5113         if (e->function != function)
5114                 return 0;
5115         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5116                 return 0;
5117         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5118             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5119                 return 0;
5120         return 1;
5121 }
5122
5123 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5124                                               u32 function, u32 index)
5125 {
5126         int i;
5127         struct kvm_cpuid_entry2 *best = NULL;
5128
5129         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5130                 struct kvm_cpuid_entry2 *e;
5131
5132                 e = &vcpu->arch.cpuid_entries[i];
5133                 if (is_matching_cpuid_entry(e, function, index)) {
5134                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5135                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5136                         best = e;
5137                         break;
5138                 }
5139         }
5140         return best;
5141 }
5142 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5143
5144 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5145 {
5146         struct kvm_cpuid_entry2 *best;
5147
5148         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5149         if (!best || best->eax < 0x80000008)
5150                 goto not_found;
5151         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5152         if (best)
5153                 return best->eax & 0xff;
5154 not_found:
5155         return 36;
5156 }
5157
5158 /*
5159  * If no match is found, check whether we exceed the vCPU's limit
5160  * and return the content of the highest valid _standard_ leaf instead.
5161  * This is to satisfy the CPUID specification.
5162  */
5163 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5164                                                   u32 function, u32 index)
5165 {
5166         struct kvm_cpuid_entry2 *maxlevel;
5167
5168         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5169         if (!maxlevel || maxlevel->eax >= function)
5170                 return NULL;
5171         if (function & 0x80000000) {
5172                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5173                 if (!maxlevel)
5174                         return NULL;
5175         }
5176         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5177 }
5178
5179 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5180 {
5181         u32 function, index;
5182         struct kvm_cpuid_entry2 *best;
5183
5184         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5185         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5186         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5187         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5188         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5189         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5190         best = kvm_find_cpuid_entry(vcpu, function, index);
5191
5192         if (!best)
5193                 best = check_cpuid_limit(vcpu, function, index);
5194
5195         if (best) {
5196                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5197                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5198                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5199                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5200         }
5201         kvm_x86_ops->skip_emulated_instruction(vcpu);
5202         trace_kvm_cpuid(function,
5203                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5204                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5205                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5206                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5207 }
5208 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5209
5210 /*
5211  * Check if userspace requested an interrupt window, and that the
5212  * interrupt window is open.
5213  *
5214  * No need to exit to userspace if we already have an interrupt queued.
5215  */
5216 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5217 {
5218         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5219                 vcpu->run->request_interrupt_window &&
5220                 kvm_arch_interrupt_allowed(vcpu));
5221 }
5222
5223 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5224 {
5225         struct kvm_run *kvm_run = vcpu->run;
5226
5227         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5228         kvm_run->cr8 = kvm_get_cr8(vcpu);
5229         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5230         if (irqchip_in_kernel(vcpu->kvm))
5231                 kvm_run->ready_for_interrupt_injection = 1;
5232         else
5233                 kvm_run->ready_for_interrupt_injection =
5234                         kvm_arch_interrupt_allowed(vcpu) &&
5235                         !kvm_cpu_has_interrupt(vcpu) &&
5236                         !kvm_event_needs_reinjection(vcpu);
5237 }
5238
5239 static void vapic_enter(struct kvm_vcpu *vcpu)
5240 {
5241         struct kvm_lapic *apic = vcpu->arch.apic;
5242         struct page *page;
5243
5244         if (!apic || !apic->vapic_addr)
5245                 return;
5246
5247         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5248
5249         vcpu->arch.apic->vapic_page = page;
5250 }
5251
5252 static void vapic_exit(struct kvm_vcpu *vcpu)
5253 {
5254         struct kvm_lapic *apic = vcpu->arch.apic;
5255         int idx;
5256
5257         if (!apic || !apic->vapic_addr)
5258                 return;
5259
5260         idx = srcu_read_lock(&vcpu->kvm->srcu);
5261         kvm_release_page_dirty(apic->vapic_page);
5262         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5263         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5264 }
5265
5266 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5267 {
5268         int max_irr, tpr;
5269
5270         if (!kvm_x86_ops->update_cr8_intercept)
5271                 return;
5272
5273         if (!vcpu->arch.apic)
5274                 return;
5275
5276         if (!vcpu->arch.apic->vapic_addr)
5277                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5278         else
5279                 max_irr = -1;
5280
5281         if (max_irr != -1)
5282                 max_irr >>= 4;
5283
5284         tpr = kvm_lapic_get_cr8(vcpu);
5285
5286         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5287 }
5288
5289 static void inject_pending_event(struct kvm_vcpu *vcpu)
5290 {
5291         /* try to reinject previous events if any */
5292         if (vcpu->arch.exception.pending) {
5293                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5294                                         vcpu->arch.exception.has_error_code,
5295                                         vcpu->arch.exception.error_code);
5296                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5297                                           vcpu->arch.exception.has_error_code,
5298                                           vcpu->arch.exception.error_code,
5299                                           vcpu->arch.exception.reinject);
5300                 return;
5301         }
5302
5303         if (vcpu->arch.nmi_injected) {
5304                 kvm_x86_ops->set_nmi(vcpu);
5305                 return;
5306         }
5307
5308         if (vcpu->arch.interrupt.pending) {
5309                 kvm_x86_ops->set_irq(vcpu);
5310                 return;
5311         }
5312
5313         /* try to inject new event if pending */
5314         if (vcpu->arch.nmi_pending) {
5315                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5316                         vcpu->arch.nmi_pending = false;
5317                         vcpu->arch.nmi_injected = true;
5318                         kvm_x86_ops->set_nmi(vcpu);
5319                 }
5320         } else if (kvm_cpu_has_interrupt(vcpu)) {
5321                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5322                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5323                                             false);
5324                         kvm_x86_ops->set_irq(vcpu);
5325                 }
5326         }
5327 }
5328
5329 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5330 {
5331         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5332                         !vcpu->guest_xcr0_loaded) {
5333                 /* kvm_set_xcr() also depends on this */
5334                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5335                 vcpu->guest_xcr0_loaded = 1;
5336         }
5337 }
5338
5339 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5340 {
5341         if (vcpu->guest_xcr0_loaded) {
5342                 if (vcpu->arch.xcr0 != host_xcr0)
5343                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5344                 vcpu->guest_xcr0_loaded = 0;
5345         }
5346 }
5347
5348 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5349 {
5350         int r;
5351         bool nmi_pending;
5352         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5353                 vcpu->run->request_interrupt_window;
5354
5355         if (vcpu->requests) {
5356                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5357                         kvm_mmu_unload(vcpu);
5358                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5359                         __kvm_migrate_timers(vcpu);
5360                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5361                         r = kvm_guest_time_update(vcpu);
5362                         if (unlikely(r))
5363                                 goto out;
5364                 }
5365                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5366                         kvm_mmu_sync_roots(vcpu);
5367                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5368                         kvm_x86_ops->tlb_flush(vcpu);
5369                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5370                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5371                         r = 0;
5372                         goto out;
5373                 }
5374                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5375                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5376                         r = 0;
5377                         goto out;
5378                 }
5379                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5380                         vcpu->fpu_active = 0;
5381                         kvm_x86_ops->fpu_deactivate(vcpu);
5382                 }
5383                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5384                         /* Page is swapped out. Do synthetic halt */
5385                         vcpu->arch.apf.halted = true;
5386                         r = 1;
5387                         goto out;
5388                 }
5389         }
5390
5391         r = kvm_mmu_reload(vcpu);
5392         if (unlikely(r))
5393                 goto out;
5394
5395         /*
5396          * An NMI can be injected between local nmi_pending read and
5397          * vcpu->arch.nmi_pending read inside inject_pending_event().
5398          * But in that case, KVM_REQ_EVENT will be set, which makes
5399          * the race described above benign.
5400          */
5401         nmi_pending = ACCESS_ONCE(vcpu->arch.nmi_pending);
5402
5403         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5404                 inject_pending_event(vcpu);
5405
5406                 /* enable NMI/IRQ window open exits if needed */
5407                 if (nmi_pending)
5408                         kvm_x86_ops->enable_nmi_window(vcpu);
5409                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5410                         kvm_x86_ops->enable_irq_window(vcpu);
5411
5412                 if (kvm_lapic_enabled(vcpu)) {
5413                         update_cr8_intercept(vcpu);
5414                         kvm_lapic_sync_to_vapic(vcpu);
5415                 }
5416         }
5417
5418         preempt_disable();
5419
5420         kvm_x86_ops->prepare_guest_switch(vcpu);
5421         if (vcpu->fpu_active)
5422                 kvm_load_guest_fpu(vcpu);
5423         kvm_load_guest_xcr0(vcpu);
5424
5425         vcpu->mode = IN_GUEST_MODE;
5426
5427         /* We should set ->mode before check ->requests,
5428          * see the comment in make_all_cpus_request.
5429          */
5430         smp_mb();
5431
5432         local_irq_disable();
5433
5434         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5435             || need_resched() || signal_pending(current)) {
5436                 vcpu->mode = OUTSIDE_GUEST_MODE;
5437                 smp_wmb();
5438                 local_irq_enable();
5439                 preempt_enable();
5440                 kvm_x86_ops->cancel_injection(vcpu);
5441                 r = 1;
5442                 goto out;
5443         }
5444
5445         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5446
5447         kvm_guest_enter();
5448
5449         if (unlikely(vcpu->arch.switch_db_regs)) {
5450                 set_debugreg(0, 7);
5451                 set_debugreg(vcpu->arch.eff_db[0], 0);
5452                 set_debugreg(vcpu->arch.eff_db[1], 1);
5453                 set_debugreg(vcpu->arch.eff_db[2], 2);
5454                 set_debugreg(vcpu->arch.eff_db[3], 3);
5455         }
5456
5457         trace_kvm_entry(vcpu->vcpu_id);
5458         kvm_x86_ops->run(vcpu);
5459
5460         /*
5461          * If the guest has used debug registers, at least dr7
5462          * will be disabled while returning to the host.
5463          * If we don't have active breakpoints in the host, we don't
5464          * care about the messed up debug address registers. But if
5465          * we have some of them active, restore the old state.
5466          */
5467         if (hw_breakpoint_active())
5468                 hw_breakpoint_restore();
5469
5470         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5471
5472         vcpu->mode = OUTSIDE_GUEST_MODE;
5473         smp_wmb();
5474         local_irq_enable();
5475
5476         ++vcpu->stat.exits;
5477
5478         /*
5479          * We must have an instruction between local_irq_enable() and
5480          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5481          * the interrupt shadow.  The stat.exits increment will do nicely.
5482          * But we need to prevent reordering, hence this barrier():
5483          */
5484         barrier();
5485
5486         kvm_guest_exit();
5487
5488         preempt_enable();
5489
5490         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5491
5492         /*
5493          * Profile KVM exit RIPs:
5494          */
5495         if (unlikely(prof_on == KVM_PROFILING)) {
5496                 unsigned long rip = kvm_rip_read(vcpu);
5497                 profile_hit(KVM_PROFILING, (void *)rip);
5498         }
5499
5500
5501         kvm_lapic_sync_from_vapic(vcpu);
5502
5503         r = kvm_x86_ops->handle_exit(vcpu);
5504 out:
5505         return r;
5506 }
5507
5508
5509 static int __vcpu_run(struct kvm_vcpu *vcpu)
5510 {
5511         int r;
5512         struct kvm *kvm = vcpu->kvm;
5513
5514         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5515                 pr_debug("vcpu %d received sipi with vector # %x\n",
5516                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5517                 kvm_lapic_reset(vcpu);
5518                 r = kvm_arch_vcpu_reset(vcpu);
5519                 if (r)
5520                         return r;
5521                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5522         }
5523
5524         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5525         vapic_enter(vcpu);
5526
5527         r = 1;
5528         while (r > 0) {
5529                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5530                     !vcpu->arch.apf.halted)
5531                         r = vcpu_enter_guest(vcpu);
5532                 else {
5533                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5534                         kvm_vcpu_block(vcpu);
5535                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5536                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5537                         {
5538                                 switch(vcpu->arch.mp_state) {
5539                                 case KVM_MP_STATE_HALTED:
5540                                         vcpu->arch.mp_state =
5541                                                 KVM_MP_STATE_RUNNABLE;
5542                                 case KVM_MP_STATE_RUNNABLE:
5543                                         vcpu->arch.apf.halted = false;
5544                                         break;
5545                                 case KVM_MP_STATE_SIPI_RECEIVED:
5546                                 default:
5547                                         r = -EINTR;
5548                                         break;
5549                                 }
5550                         }
5551                 }
5552
5553                 if (r <= 0)
5554                         break;
5555
5556                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5557                 if (kvm_cpu_has_pending_timer(vcpu))
5558                         kvm_inject_pending_timer_irqs(vcpu);
5559
5560                 if (dm_request_for_irq_injection(vcpu)) {
5561                         r = -EINTR;
5562                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5563                         ++vcpu->stat.request_irq_exits;
5564                 }
5565
5566                 kvm_check_async_pf_completion(vcpu);
5567
5568                 if (signal_pending(current)) {
5569                         r = -EINTR;
5570                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5571                         ++vcpu->stat.signal_exits;
5572                 }
5573                 if (need_resched()) {
5574                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5575                         kvm_resched(vcpu);
5576                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5577                 }
5578         }
5579
5580         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5581
5582         vapic_exit(vcpu);
5583
5584         return r;
5585 }
5586
5587 static int complete_mmio(struct kvm_vcpu *vcpu)
5588 {
5589         struct kvm_run *run = vcpu->run;
5590         int r;
5591
5592         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5593                 return 1;
5594
5595         if (vcpu->mmio_needed) {
5596                 vcpu->mmio_needed = 0;
5597                 if (!vcpu->mmio_is_write)
5598                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5599                                run->mmio.data, 8);
5600                 vcpu->mmio_index += 8;
5601                 if (vcpu->mmio_index < vcpu->mmio_size) {
5602                         run->exit_reason = KVM_EXIT_MMIO;
5603                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5604                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5605                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5606                         run->mmio.is_write = vcpu->mmio_is_write;
5607                         vcpu->mmio_needed = 1;
5608                         return 0;
5609                 }
5610                 if (vcpu->mmio_is_write)
5611                         return 1;
5612                 vcpu->mmio_read_completed = 1;
5613         }
5614         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5615         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5616         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5617         if (r != EMULATE_DONE)
5618                 return 0;
5619         return 1;
5620 }
5621
5622 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5623 {
5624         int r;
5625         sigset_t sigsaved;
5626
5627         if (!tsk_used_math(current) && init_fpu(current))
5628                 return -ENOMEM;
5629
5630         if (vcpu->sigset_active)
5631                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5632
5633         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5634                 kvm_vcpu_block(vcpu);
5635                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5636                 r = -EAGAIN;
5637                 goto out;
5638         }
5639
5640         /* re-sync apic's tpr */
5641         if (!irqchip_in_kernel(vcpu->kvm)) {
5642                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5643                         r = -EINVAL;
5644                         goto out;
5645                 }
5646         }
5647
5648         r = complete_mmio(vcpu);
5649         if (r <= 0)
5650                 goto out;
5651
5652         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5653                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5654                                      kvm_run->hypercall.ret);
5655
5656         r = __vcpu_run(vcpu);
5657
5658 out:
5659         post_kvm_run_save(vcpu);
5660         if (vcpu->sigset_active)
5661                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5662
5663         return r;
5664 }
5665
5666 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5667 {
5668         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5669                 /*
5670                  * We are here if userspace calls get_regs() in the middle of
5671                  * instruction emulation. Registers state needs to be copied
5672                  * back from emulation context to vcpu. Usrapace shouldn't do
5673                  * that usually, but some bad designed PV devices (vmware
5674                  * backdoor interface) need this to work
5675                  */
5676                 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5677                 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5678                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5679         }
5680         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5681         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5682         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5683         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5684         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5685         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5686         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5687         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5688 #ifdef CONFIG_X86_64
5689         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5690         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5691         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5692         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5693         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5694         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5695         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5696         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5697 #endif
5698
5699         regs->rip = kvm_rip_read(vcpu);
5700         regs->rflags = kvm_get_rflags(vcpu);
5701
5702         return 0;
5703 }
5704
5705 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5706 {
5707         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5708         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5709
5710         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5711         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5712         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5713         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5714         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5715         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5716         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5717         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5718 #ifdef CONFIG_X86_64
5719         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5720         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5721         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5722         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5723         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5724         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5725         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5726         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5727 #endif
5728
5729         kvm_rip_write(vcpu, regs->rip);
5730         kvm_set_rflags(vcpu, regs->rflags);
5731
5732         vcpu->arch.exception.pending = false;
5733
5734         kvm_make_request(KVM_REQ_EVENT, vcpu);
5735
5736         return 0;
5737 }
5738
5739 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5740 {
5741         struct kvm_segment cs;
5742
5743         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5744         *db = cs.db;
5745         *l = cs.l;
5746 }
5747 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5748
5749 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5750                                   struct kvm_sregs *sregs)
5751 {
5752         struct desc_ptr dt;
5753
5754         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5755         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5756         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5757         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5758         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5759         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5760
5761         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5762         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5763
5764         kvm_x86_ops->get_idt(vcpu, &dt);
5765         sregs->idt.limit = dt.size;
5766         sregs->idt.base = dt.address;
5767         kvm_x86_ops->get_gdt(vcpu, &dt);
5768         sregs->gdt.limit = dt.size;
5769         sregs->gdt.base = dt.address;
5770
5771         sregs->cr0 = kvm_read_cr0(vcpu);
5772         sregs->cr2 = vcpu->arch.cr2;
5773         sregs->cr3 = kvm_read_cr3(vcpu);
5774         sregs->cr4 = kvm_read_cr4(vcpu);
5775         sregs->cr8 = kvm_get_cr8(vcpu);
5776         sregs->efer = vcpu->arch.efer;
5777         sregs->apic_base = kvm_get_apic_base(vcpu);
5778
5779         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5780
5781         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5782                 set_bit(vcpu->arch.interrupt.nr,
5783                         (unsigned long *)sregs->interrupt_bitmap);
5784
5785         return 0;
5786 }
5787
5788 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5789                                     struct kvm_mp_state *mp_state)
5790 {
5791         mp_state->mp_state = vcpu->arch.mp_state;
5792         return 0;
5793 }
5794
5795 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5796                                     struct kvm_mp_state *mp_state)
5797 {
5798         vcpu->arch.mp_state = mp_state->mp_state;
5799         kvm_make_request(KVM_REQ_EVENT, vcpu);
5800         return 0;
5801 }
5802
5803 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5804                     bool has_error_code, u32 error_code)
5805 {
5806         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5807         int ret;
5808
5809         init_emulate_ctxt(vcpu);
5810
5811         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5812                                    tss_selector, reason, has_error_code,
5813                                    error_code);
5814
5815         if (ret)
5816                 return EMULATE_FAIL;
5817
5818         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5819         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5820         kvm_set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5821         kvm_make_request(KVM_REQ_EVENT, vcpu);
5822         return EMULATE_DONE;
5823 }
5824 EXPORT_SYMBOL_GPL(kvm_task_switch);
5825
5826 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5827                                   struct kvm_sregs *sregs)
5828 {
5829         int mmu_reset_needed = 0;
5830         int pending_vec, max_bits, idx;
5831         struct desc_ptr dt;
5832
5833         dt.size = sregs->idt.limit;
5834         dt.address = sregs->idt.base;
5835         kvm_x86_ops->set_idt(vcpu, &dt);
5836         dt.size = sregs->gdt.limit;
5837         dt.address = sregs->gdt.base;
5838         kvm_x86_ops->set_gdt(vcpu, &dt);
5839
5840         vcpu->arch.cr2 = sregs->cr2;
5841         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5842         vcpu->arch.cr3 = sregs->cr3;
5843         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5844
5845         kvm_set_cr8(vcpu, sregs->cr8);
5846
5847         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5848         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5849         kvm_set_apic_base(vcpu, sregs->apic_base);
5850
5851         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5852         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5853         vcpu->arch.cr0 = sregs->cr0;
5854
5855         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5856         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5857         if (sregs->cr4 & X86_CR4_OSXSAVE)
5858                 update_cpuid(vcpu);
5859
5860         idx = srcu_read_lock(&vcpu->kvm->srcu);
5861         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5862                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5863                 mmu_reset_needed = 1;
5864         }
5865         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5866
5867         if (mmu_reset_needed)
5868                 kvm_mmu_reset_context(vcpu);
5869
5870         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5871         pending_vec = find_first_bit(
5872                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5873         if (pending_vec < max_bits) {
5874                 kvm_queue_interrupt(vcpu, pending_vec, false);
5875                 pr_debug("Set back pending irq %d\n", pending_vec);
5876         }
5877
5878         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5879         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5880         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5881         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5882         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5883         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5884
5885         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5886         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5887
5888         update_cr8_intercept(vcpu);
5889
5890         /* Older userspace won't unhalt the vcpu on reset. */
5891         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5892             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5893             !is_protmode(vcpu))
5894                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5895
5896         kvm_make_request(KVM_REQ_EVENT, vcpu);
5897
5898         return 0;
5899 }
5900
5901 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5902                                         struct kvm_guest_debug *dbg)
5903 {
5904         unsigned long rflags;
5905         int i, r;
5906
5907         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5908                 r = -EBUSY;
5909                 if (vcpu->arch.exception.pending)
5910                         goto out;
5911                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5912                         kvm_queue_exception(vcpu, DB_VECTOR);
5913                 else
5914                         kvm_queue_exception(vcpu, BP_VECTOR);
5915         }
5916
5917         /*
5918          * Read rflags as long as potentially injected trace flags are still
5919          * filtered out.
5920          */
5921         rflags = kvm_get_rflags(vcpu);
5922
5923         vcpu->guest_debug = dbg->control;
5924         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5925                 vcpu->guest_debug = 0;
5926
5927         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5928                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5929                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5930                 vcpu->arch.switch_db_regs =
5931                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5932         } else {
5933                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5934                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5935                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5936         }
5937
5938         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5939                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5940                         get_segment_base(vcpu, VCPU_SREG_CS);
5941
5942         /*
5943          * Trigger an rflags update that will inject or remove the trace
5944          * flags.
5945          */
5946         kvm_set_rflags(vcpu, rflags);
5947
5948         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5949
5950         r = 0;
5951
5952 out:
5953
5954         return r;
5955 }
5956
5957 /*
5958  * Translate a guest virtual address to a guest physical address.
5959  */
5960 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5961                                     struct kvm_translation *tr)
5962 {
5963         unsigned long vaddr = tr->linear_address;
5964         gpa_t gpa;
5965         int idx;
5966
5967         idx = srcu_read_lock(&vcpu->kvm->srcu);
5968         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5969         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5970         tr->physical_address = gpa;
5971         tr->valid = gpa != UNMAPPED_GVA;
5972         tr->writeable = 1;
5973         tr->usermode = 0;
5974
5975         return 0;
5976 }
5977
5978 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5979 {
5980         struct i387_fxsave_struct *fxsave =
5981                         &vcpu->arch.guest_fpu.state->fxsave;
5982
5983         memcpy(fpu->fpr, fxsave->st_space, 128);
5984         fpu->fcw = fxsave->cwd;
5985         fpu->fsw = fxsave->swd;
5986         fpu->ftwx = fxsave->twd;
5987         fpu->last_opcode = fxsave->fop;
5988         fpu->last_ip = fxsave->rip;
5989         fpu->last_dp = fxsave->rdp;
5990         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5991
5992         return 0;
5993 }
5994
5995 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5996 {
5997         struct i387_fxsave_struct *fxsave =
5998                         &vcpu->arch.guest_fpu.state->fxsave;
5999
6000         memcpy(fxsave->st_space, fpu->fpr, 128);
6001         fxsave->cwd = fpu->fcw;
6002         fxsave->swd = fpu->fsw;
6003         fxsave->twd = fpu->ftwx;
6004         fxsave->fop = fpu->last_opcode;
6005         fxsave->rip = fpu->last_ip;
6006         fxsave->rdp = fpu->last_dp;
6007         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6008
6009         return 0;
6010 }
6011
6012 int fx_init(struct kvm_vcpu *vcpu)
6013 {
6014         int err;
6015
6016         err = fpu_alloc(&vcpu->arch.guest_fpu);
6017         if (err)
6018                 return err;
6019
6020         fpu_finit(&vcpu->arch.guest_fpu);
6021
6022         /*
6023          * Ensure guest xcr0 is valid for loading
6024          */
6025         vcpu->arch.xcr0 = XSTATE_FP;
6026
6027         vcpu->arch.cr0 |= X86_CR0_ET;
6028
6029         return 0;
6030 }
6031 EXPORT_SYMBOL_GPL(fx_init);
6032
6033 static void fx_free(struct kvm_vcpu *vcpu)
6034 {
6035         fpu_free(&vcpu->arch.guest_fpu);
6036 }
6037
6038 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6039 {
6040         if (vcpu->guest_fpu_loaded)
6041                 return;
6042
6043         /*
6044          * Restore all possible states in the guest,
6045          * and assume host would use all available bits.
6046          * Guest xcr0 would be loaded later.
6047          */
6048         kvm_put_guest_xcr0(vcpu);
6049         vcpu->guest_fpu_loaded = 1;
6050         unlazy_fpu(current);
6051         fpu_restore_checking(&vcpu->arch.guest_fpu);
6052         trace_kvm_fpu(1);
6053 }
6054
6055 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6056 {
6057         kvm_put_guest_xcr0(vcpu);
6058
6059         if (!vcpu->guest_fpu_loaded)
6060                 return;
6061
6062         vcpu->guest_fpu_loaded = 0;
6063         fpu_save_init(&vcpu->arch.guest_fpu);
6064         ++vcpu->stat.fpu_reload;
6065         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6066         trace_kvm_fpu(0);
6067 }
6068
6069 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6070 {
6071         kvmclock_reset(vcpu);
6072
6073         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6074         fx_free(vcpu);
6075         kvm_x86_ops->vcpu_free(vcpu);
6076 }
6077
6078 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6079                                                 unsigned int id)
6080 {
6081         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6082                 printk_once(KERN_WARNING
6083                 "kvm: SMP vm created on host with unstable TSC; "
6084                 "guest TSC will not be reliable\n");
6085         return kvm_x86_ops->vcpu_create(kvm, id);
6086 }
6087
6088 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6089 {
6090         int r;
6091
6092         vcpu->arch.mtrr_state.have_fixed = 1;
6093         vcpu_load(vcpu);
6094         r = kvm_arch_vcpu_reset(vcpu);
6095         if (r == 0)
6096                 r = kvm_mmu_setup(vcpu);
6097         vcpu_put(vcpu);
6098         if (r < 0)
6099                 goto free_vcpu;
6100
6101         return 0;
6102 free_vcpu:
6103         kvm_x86_ops->vcpu_free(vcpu);
6104         return r;
6105 }
6106
6107 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6108 {
6109         vcpu->arch.apf.msr_val = 0;
6110
6111         vcpu_load(vcpu);
6112         kvm_mmu_unload(vcpu);
6113         vcpu_put(vcpu);
6114
6115         fx_free(vcpu);
6116         kvm_x86_ops->vcpu_free(vcpu);
6117 }
6118
6119 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6120 {
6121         vcpu->arch.nmi_pending = false;
6122         vcpu->arch.nmi_injected = false;
6123
6124         vcpu->arch.switch_db_regs = 0;
6125         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6126         vcpu->arch.dr6 = DR6_FIXED_1;
6127         vcpu->arch.dr7 = DR7_FIXED_1;
6128
6129         kvm_make_request(KVM_REQ_EVENT, vcpu);
6130         vcpu->arch.apf.msr_val = 0;
6131
6132         kvmclock_reset(vcpu);
6133
6134         kvm_clear_async_pf_completion_queue(vcpu);
6135         kvm_async_pf_hash_reset(vcpu);
6136         vcpu->arch.apf.halted = false;
6137
6138         return kvm_x86_ops->vcpu_reset(vcpu);
6139 }
6140
6141 int kvm_arch_hardware_enable(void *garbage)
6142 {
6143         struct kvm *kvm;
6144         struct kvm_vcpu *vcpu;
6145         int i;
6146
6147         kvm_shared_msr_cpu_online();
6148         list_for_each_entry(kvm, &vm_list, vm_list)
6149                 kvm_for_each_vcpu(i, vcpu, kvm)
6150                         if (vcpu->cpu == smp_processor_id())
6151                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6152         return kvm_x86_ops->hardware_enable(garbage);
6153 }
6154
6155 void kvm_arch_hardware_disable(void *garbage)
6156 {
6157         kvm_x86_ops->hardware_disable(garbage);
6158         drop_user_return_notifiers(garbage);
6159 }
6160
6161 int kvm_arch_hardware_setup(void)
6162 {
6163         return kvm_x86_ops->hardware_setup();
6164 }
6165
6166 void kvm_arch_hardware_unsetup(void)
6167 {
6168         kvm_x86_ops->hardware_unsetup();
6169 }
6170
6171 void kvm_arch_check_processor_compat(void *rtn)
6172 {
6173         kvm_x86_ops->check_processor_compatibility(rtn);
6174 }
6175
6176 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6177 {
6178         struct page *page;
6179         struct kvm *kvm;
6180         int r;
6181
6182         BUG_ON(vcpu->kvm == NULL);
6183         kvm = vcpu->kvm;
6184
6185         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6186         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6187         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6188         vcpu->arch.mmu.translate_gpa = translate_gpa;
6189         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6190         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6191                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6192         else
6193                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6194
6195         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6196         if (!page) {
6197                 r = -ENOMEM;
6198                 goto fail;
6199         }
6200         vcpu->arch.pio_data = page_address(page);
6201
6202         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6203
6204         r = kvm_mmu_create(vcpu);
6205         if (r < 0)
6206                 goto fail_free_pio_data;
6207
6208         if (irqchip_in_kernel(kvm)) {
6209                 r = kvm_create_lapic(vcpu);
6210                 if (r < 0)
6211                         goto fail_mmu_destroy;
6212         }
6213
6214         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6215                                        GFP_KERNEL);
6216         if (!vcpu->arch.mce_banks) {
6217                 r = -ENOMEM;
6218                 goto fail_free_lapic;
6219         }
6220         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6221
6222         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6223                 goto fail_free_mce_banks;
6224
6225         kvm_async_pf_hash_reset(vcpu);
6226
6227         return 0;
6228 fail_free_mce_banks:
6229         kfree(vcpu->arch.mce_banks);
6230 fail_free_lapic:
6231         kvm_free_lapic(vcpu);
6232 fail_mmu_destroy:
6233         kvm_mmu_destroy(vcpu);
6234 fail_free_pio_data:
6235         free_page((unsigned long)vcpu->arch.pio_data);
6236 fail:
6237         return r;
6238 }
6239
6240 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6241 {
6242         int idx;
6243
6244         kfree(vcpu->arch.mce_banks);
6245         kvm_free_lapic(vcpu);
6246         idx = srcu_read_lock(&vcpu->kvm->srcu);
6247         kvm_mmu_destroy(vcpu);
6248         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6249         free_page((unsigned long)vcpu->arch.pio_data);
6250 }
6251
6252 int kvm_arch_init_vm(struct kvm *kvm)
6253 {
6254         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6255         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6256
6257         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6258         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6259
6260         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6261
6262         return 0;
6263 }
6264
6265 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6266 {
6267         vcpu_load(vcpu);
6268         kvm_mmu_unload(vcpu);
6269         vcpu_put(vcpu);
6270 }
6271
6272 static void kvm_free_vcpus(struct kvm *kvm)
6273 {
6274         unsigned int i;
6275         struct kvm_vcpu *vcpu;
6276
6277         /*
6278          * Unpin any mmu pages first.
6279          */
6280         kvm_for_each_vcpu(i, vcpu, kvm) {
6281                 kvm_clear_async_pf_completion_queue(vcpu);
6282                 kvm_unload_vcpu_mmu(vcpu);
6283         }
6284         kvm_for_each_vcpu(i, vcpu, kvm)
6285                 kvm_arch_vcpu_free(vcpu);
6286
6287         mutex_lock(&kvm->lock);
6288         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6289                 kvm->vcpus[i] = NULL;
6290
6291         atomic_set(&kvm->online_vcpus, 0);
6292         mutex_unlock(&kvm->lock);
6293 }
6294
6295 void kvm_arch_sync_events(struct kvm *kvm)
6296 {
6297         kvm_free_all_assigned_devices(kvm);
6298         kvm_free_pit(kvm);
6299 }
6300
6301 void kvm_arch_destroy_vm(struct kvm *kvm)
6302 {
6303         kvm_iommu_unmap_guest(kvm);
6304         kfree(kvm->arch.vpic);
6305         kfree(kvm->arch.vioapic);
6306         kvm_free_vcpus(kvm);
6307         if (kvm->arch.apic_access_page)
6308                 put_page(kvm->arch.apic_access_page);
6309         if (kvm->arch.ept_identity_pagetable)
6310                 put_page(kvm->arch.ept_identity_pagetable);
6311 }
6312
6313 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6314                                 struct kvm_memory_slot *memslot,
6315                                 struct kvm_memory_slot old,
6316                                 struct kvm_userspace_memory_region *mem,
6317                                 int user_alloc)
6318 {
6319         int npages = memslot->npages;
6320         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6321
6322         /* Prevent internal slot pages from being moved by fork()/COW. */
6323         if (memslot->id >= KVM_MEMORY_SLOTS)
6324                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6325
6326         /*To keep backward compatibility with older userspace,
6327          *x86 needs to hanlde !user_alloc case.
6328          */
6329         if (!user_alloc) {
6330                 if (npages && !old.rmap) {
6331                         unsigned long userspace_addr;
6332
6333                         down_write(&current->mm->mmap_sem);
6334                         userspace_addr = do_mmap(NULL, 0,
6335                                                  npages * PAGE_SIZE,
6336                                                  PROT_READ | PROT_WRITE,
6337                                                  map_flags,
6338                                                  0);
6339                         up_write(&current->mm->mmap_sem);
6340
6341                         if (IS_ERR((void *)userspace_addr))
6342                                 return PTR_ERR((void *)userspace_addr);
6343
6344                         memslot->userspace_addr = userspace_addr;
6345                 }
6346         }
6347
6348
6349         return 0;
6350 }
6351
6352 void kvm_arch_commit_memory_region(struct kvm *kvm,
6353                                 struct kvm_userspace_memory_region *mem,
6354                                 struct kvm_memory_slot old,
6355                                 int user_alloc)
6356 {
6357
6358         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6359
6360         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6361                 int ret;
6362
6363                 down_write(&current->mm->mmap_sem);
6364                 ret = do_munmap(current->mm, old.userspace_addr,
6365                                 old.npages * PAGE_SIZE);
6366                 up_write(&current->mm->mmap_sem);
6367                 if (ret < 0)
6368                         printk(KERN_WARNING
6369                                "kvm_vm_ioctl_set_memory_region: "
6370                                "failed to munmap memory\n");
6371         }
6372
6373         if (!kvm->arch.n_requested_mmu_pages)
6374                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6375
6376         spin_lock(&kvm->mmu_lock);
6377         if (nr_mmu_pages)
6378                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6379         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6380         spin_unlock(&kvm->mmu_lock);
6381 }
6382
6383 void kvm_arch_flush_shadow(struct kvm *kvm)
6384 {
6385         kvm_mmu_zap_all(kvm);
6386         kvm_reload_remote_mmus(kvm);
6387 }
6388
6389 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6390 {
6391         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6392                 !vcpu->arch.apf.halted)
6393                 || !list_empty_careful(&vcpu->async_pf.done)
6394                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6395                 || vcpu->arch.nmi_pending ||
6396                 (kvm_arch_interrupt_allowed(vcpu) &&
6397                  kvm_cpu_has_interrupt(vcpu));
6398 }
6399
6400 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6401 {
6402         int me;
6403         int cpu = vcpu->cpu;
6404
6405         if (waitqueue_active(&vcpu->wq)) {
6406                 wake_up_interruptible(&vcpu->wq);
6407                 ++vcpu->stat.halt_wakeup;
6408         }
6409
6410         me = get_cpu();
6411         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6412                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6413                         smp_send_reschedule(cpu);
6414         put_cpu();
6415 }
6416
6417 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6418 {
6419         return kvm_x86_ops->interrupt_allowed(vcpu);
6420 }
6421
6422 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6423 {
6424         unsigned long current_rip = kvm_rip_read(vcpu) +
6425                 get_segment_base(vcpu, VCPU_SREG_CS);
6426
6427         return current_rip == linear_rip;
6428 }
6429 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6430
6431 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6432 {
6433         unsigned long rflags;
6434
6435         rflags = kvm_x86_ops->get_rflags(vcpu);
6436         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6437                 rflags &= ~X86_EFLAGS_TF;
6438         return rflags;
6439 }
6440 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6441
6442 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6443 {
6444         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6445             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6446                 rflags |= X86_EFLAGS_TF;
6447         kvm_x86_ops->set_rflags(vcpu, rflags);
6448         kvm_make_request(KVM_REQ_EVENT, vcpu);
6449 }
6450 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6451
6452 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6453 {
6454         int r;
6455
6456         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6457               is_error_page(work->page))
6458                 return;
6459
6460         r = kvm_mmu_reload(vcpu);
6461         if (unlikely(r))
6462                 return;
6463
6464         if (!vcpu->arch.mmu.direct_map &&
6465               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6466                 return;
6467
6468         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6469 }
6470
6471 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6472 {
6473         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6474 }
6475
6476 static inline u32 kvm_async_pf_next_probe(u32 key)
6477 {
6478         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6479 }
6480
6481 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6482 {
6483         u32 key = kvm_async_pf_hash_fn(gfn);
6484
6485         while (vcpu->arch.apf.gfns[key] != ~0)
6486                 key = kvm_async_pf_next_probe(key);
6487
6488         vcpu->arch.apf.gfns[key] = gfn;
6489 }
6490
6491 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6492 {
6493         int i;
6494         u32 key = kvm_async_pf_hash_fn(gfn);
6495
6496         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6497                      (vcpu->arch.apf.gfns[key] != gfn &&
6498                       vcpu->arch.apf.gfns[key] != ~0); i++)
6499                 key = kvm_async_pf_next_probe(key);
6500
6501         return key;
6502 }
6503
6504 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6505 {
6506         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6507 }
6508
6509 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6510 {
6511         u32 i, j, k;
6512
6513         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6514         while (true) {
6515                 vcpu->arch.apf.gfns[i] = ~0;
6516                 do {
6517                         j = kvm_async_pf_next_probe(j);
6518                         if (vcpu->arch.apf.gfns[j] == ~0)
6519                                 return;
6520                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6521                         /*
6522                          * k lies cyclically in ]i,j]
6523                          * |    i.k.j |
6524                          * |....j i.k.| or  |.k..j i...|
6525                          */
6526                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6527                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6528                 i = j;
6529         }
6530 }
6531
6532 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6533 {
6534
6535         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6536                                       sizeof(val));
6537 }
6538
6539 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6540                                      struct kvm_async_pf *work)
6541 {
6542         struct x86_exception fault;
6543
6544         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6545         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6546
6547         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6548             (vcpu->arch.apf.send_user_only &&
6549              kvm_x86_ops->get_cpl(vcpu) == 0))
6550                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6551         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6552                 fault.vector = PF_VECTOR;
6553                 fault.error_code_valid = true;
6554                 fault.error_code = 0;
6555                 fault.nested_page_fault = false;
6556                 fault.address = work->arch.token;
6557                 kvm_inject_page_fault(vcpu, &fault);
6558         }
6559 }
6560
6561 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6562                                  struct kvm_async_pf *work)
6563 {
6564         struct x86_exception fault;
6565
6566         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6567         if (is_error_page(work->page))
6568                 work->arch.token = ~0; /* broadcast wakeup */
6569         else
6570                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6571
6572         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6573             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6574                 fault.vector = PF_VECTOR;
6575                 fault.error_code_valid = true;
6576                 fault.error_code = 0;
6577                 fault.nested_page_fault = false;
6578                 fault.address = work->arch.token;
6579                 kvm_inject_page_fault(vcpu, &fault);
6580         }
6581         vcpu->arch.apf.halted = false;
6582 }
6583
6584 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6585 {
6586         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6587                 return true;
6588         else
6589                 return !kvm_event_needs_reinjection(vcpu) &&
6590                         kvm_x86_ops->interrupt_allowed(vcpu);
6591 }
6592
6593 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6594 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6595 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6596 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6597 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6598 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6599 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6600 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6601 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6602 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6603 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6604 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);