2 Driver for Philips tda1004xh OFDM Frontend
4 This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 This driver needs a copy of the DLL "ttlcdacc.dll" from the Haupauge or Technotrend
23 windows driver saved as '/etc/dvb/tda1004x.mc'.
24 You can also pass the complete file name with the module parameter 'tda1004x_firmware'.
26 Currently the DLL from v2.15a of the technotrend driver is supported. Other versions can
27 be added reasonably painlessly.
29 Windows driver URL: http://www.technotrend.de/
33 #define __KERNEL_SYSCALLS__
34 #include <linux/kernel.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/string.h>
39 #include <linux/slab.h>
41 #include <linux/unistd.h>
42 #include <linux/fcntl.h>
43 #include <linux/errno.h>
44 #include "dvb_frontend.h"
45 #include "dvb_functions.h"
47 #ifndef DVB_TDA1004X_FIRMWARE_FILE
48 #define DVB_TDA1004X_FIRMWARE_FILE "/etc/dvb/tda1004x.mc"
51 static int tda1004x_debug = 0;
52 static char *tda1004x_firmware = DVB_TDA1004X_FIRMWARE_FILE;
55 #define TDA10045H_ADDRESS 0x08
56 #define TD1344_ADDRESS 0x61
57 #define TDM1316L_ADDRESS 0x63
58 #define MC44BC374_ADDRESS 0x65
60 #define TDA1004X_CHIPID 0x00
61 #define TDA1004X_AUTO 0x01
62 #define TDA1004X_IN_CONF1 0x02
63 #define TDA1004X_IN_CONF2 0x03
64 #define TDA1004X_OUT_CONF1 0x04
65 #define TDA1004X_OUT_CONF2 0x05
66 #define TDA1004X_STATUS_CD 0x06
67 #define TDA1004X_CONFC4 0x07
68 #define TDA1004X_DSSPARE2 0x0C
69 #define TDA1004X_CODE_IN 0x0D
70 #define TDA1004X_FWPAGE 0x0E
71 #define TDA1004X_SCAN_CPT 0x10
72 #define TDA1004X_DSP_CMD 0x11
73 #define TDA1004X_DSP_ARG 0x12
74 #define TDA1004X_DSP_DATA1 0x13
75 #define TDA1004X_DSP_DATA2 0x14
76 #define TDA1004X_CONFADC1 0x15
77 #define TDA1004X_CONFC1 0x16
78 #define TDA1004X_SIGNAL_STRENGTH 0x1a
79 #define TDA1004X_SNR 0x1c
80 #define TDA1004X_REG1E 0x1e
81 #define TDA1004X_REG1F 0x1f
82 #define TDA1004X_CBER_RESET 0x20
83 #define TDA1004X_CBER_MSB 0x21
84 #define TDA1004X_CBER_LSB 0x22
85 #define TDA1004X_CVBER_LUT 0x23
86 #define TDA1004X_VBER_MSB 0x24
87 #define TDA1004X_VBER_MID 0x25
88 #define TDA1004X_VBER_LSB 0x26
89 #define TDA1004X_UNCOR 0x27
90 #define TDA1004X_CONFPLL_P 0x2D
91 #define TDA1004X_CONFPLL_M_MSB 0x2E
92 #define TDA1004X_CONFPLL_M_LSB 0x2F
93 #define TDA1004X_CONFPLL_N 0x30
94 #define TDA1004X_UNSURW_MSB 0x31
95 #define TDA1004X_UNSURW_LSB 0x32
96 #define TDA1004X_WREF_MSB 0x33
97 #define TDA1004X_WREF_MID 0x34
98 #define TDA1004X_WREF_LSB 0x35
99 #define TDA1004X_MUXOUT 0x36
100 #define TDA1004X_CONFADC2 0x37
101 #define TDA1004X_IOFFSET 0x38
103 #define dprintk if (tda1004x_debug) printk
105 static struct dvb_frontend_info tda10045h_info = {
106 .name = "Philips TDA10045H",
108 .frequency_min = 51000000,
109 .frequency_max = 858000000,
110 .frequency_stepsize = 166667,
112 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
113 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
114 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
115 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
119 struct tda1004x_state {
131 static struct fwinfo tda10045h_fwinfo[] = { {.file_size = 286720,.fw_offset = 0x34cc5,.fw_size = 30555} };
132 static int tda10045h_fwinfo_count = sizeof(tda10045h_fwinfo) / sizeof(struct fwinfo);
137 static int tda1004x_write_byte(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, int data)
140 u8 buf[] = { reg, data };
141 struct i2c_msg msg = { .addr=0, .flags=0, .buf=buf, .len=2 };
143 dprintk("%s: reg=0x%x, data=0x%x\n", __FUNCTION__, reg, data);
145 msg.addr = tda_state->tda1004x_address;
146 ret = i2c->xfer(i2c, &msg, 1);
149 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
150 __FUNCTION__, reg, data, ret);
152 dprintk("%s: success reg=0x%x, data=0x%x, ret=%i\n", __FUNCTION__,
154 return (ret != 1) ? -1 : 0;
157 static int tda1004x_read_byte(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg)
162 struct i2c_msg msg[] = {{ .addr=0, .flags=0, .buf=b0, .len=1},
163 { .addr=0, .flags=I2C_M_RD, .buf=b1, .len = 1}};
165 dprintk("%s: reg=0x%x\n", __FUNCTION__, reg);
167 msg[0].addr = tda_state->tda1004x_address;
168 msg[1].addr = tda_state->tda1004x_address;
169 ret = i2c->xfer(i2c, msg, 2);
172 dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
177 dprintk("%s: success reg=0x%x, data=0x%x, ret=%i\n", __FUNCTION__,
182 static int tda1004x_write_mask(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, int mask, int data)
185 dprintk("%s: reg=0x%x, mask=0x%x, data=0x%x\n", __FUNCTION__, reg,
188 // read a byte and check
189 val = tda1004x_read_byte(i2c, tda_state, reg);
197 // write it out again
198 return tda1004x_write_byte(i2c, tda_state, reg, val);
201 static int tda1004x_write_buf(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, unsigned char *buf, int len)
206 dprintk("%s: reg=0x%x, len=0x%x\n", __FUNCTION__, reg, len);
209 for (i = 0; i < len; i++) {
210 result = tda1004x_write_byte(i2c, tda_state, reg + i, buf[i]);
218 static int tda1004x_enable_tuner_i2c(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
221 dprintk("%s\n", __FUNCTION__);
223 result = tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 2, 2);
228 static int tda1004x_disable_tuner_i2c(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
231 dprintk("%s\n", __FUNCTION__);
233 return tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 2, 0);
237 static int tda10045h_set_bandwidth(struct dvb_i2c_bus *i2c,
238 struct tda1004x_state *tda_state,
239 fe_bandwidth_t bandwidth)
241 static u8 bandwidth_6mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x60, 0x1e, 0xa7, 0x45, 0x4f };
242 static u8 bandwidth_7mhz[] = { 0x02, 0x00, 0x37, 0x00, 0x4a, 0x2f, 0x6d, 0x76, 0xdb };
243 static u8 bandwidth_8mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x48, 0x17, 0x89, 0xc7, 0x14 };
246 case BANDWIDTH_6_MHZ:
247 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x14);
248 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_6mhz, sizeof(bandwidth_6mhz));
251 case BANDWIDTH_7_MHZ:
252 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x80);
253 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_7mhz, sizeof(bandwidth_7mhz));
256 case BANDWIDTH_8_MHZ:
257 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x14);
258 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_8mhz, sizeof(bandwidth_8mhz));
265 tda1004x_write_byte(i2c, tda_state, TDA1004X_IOFFSET, 0);
272 static int tda1004x_init(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
275 struct i2c_msg fw_msg = {.addr = 0,.flags = 0,.buf = fw_buf,.len = 0 };
276 struct i2c_msg tuner_msg = {.addr = 0,.flags = 0,.buf = 0,.len = 0 };
277 unsigned char *firmware = NULL;
284 static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
285 mm_segment_t fs = get_fs();
287 dprintk("%s\n", __FUNCTION__);
291 fd = open(tda1004x_firmware, 0, 0);
293 printk("%s: Unable to open firmware %s\n", __FUNCTION__,
297 filesize = lseek(fd, 0L, 2);
299 printk("%s: Firmware %s is empty\n", __FUNCTION__,
305 // find extraction parameters
306 for (fwinfo_idx = 0; fwinfo_idx < tda10045h_fwinfo_count; fwinfo_idx++) {
307 if (tda10045h_fwinfo[fwinfo_idx].file_size == filesize)
310 if (fwinfo_idx >= tda10045h_fwinfo_count) {
311 printk("%s: Unsupported firmware %s\n", __FUNCTION__, tda1004x_firmware);
315 fw_size = tda10045h_fwinfo[fwinfo_idx].fw_size;
317 // allocate buffer for it
318 firmware = vmalloc(fw_size);
319 if (firmware == NULL) {
320 printk("%s: Out of memory loading firmware\n",
327 lseek(fd, tda10045h_fwinfo[fwinfo_idx].fw_offset, 0);
328 if (read(fd, firmware, fw_size) != fw_size) {
329 printk("%s: Failed to read firmware\n", __FUNCTION__);
337 // Disable the MC44BC374C
338 tda1004x_enable_tuner_i2c(i2c, tda_state);
339 tuner_msg.addr = MC44BC374_ADDRESS;
340 tuner_msg.buf = disable_mc44BC374c;
341 tuner_msg.len = sizeof(disable_mc44BC374c);
342 if (i2c->xfer(i2c, &tuner_msg, 1) != 1) {
343 i2c->xfer(i2c, &tuner_msg, 1);
345 tda1004x_disable_tuner_i2c(i2c, tda_state);
347 // set some valid bandwith parameters
348 switch(tda_state->tda1004x_address) {
349 case TDA10045H_ADDRESS:
350 tda10045h_set_bandwidth(i2c, tda_state, BANDWIDTH_8_MHZ);
355 // do the firmware upload
356 tda1004x_write_byte(i2c, tda_state, TDA1004X_FWPAGE, 0);
357 fw_msg.addr = tda_state->tda1004x_address;
359 while (fw_pos != fw_size) {
360 // work out how much to send this time
361 tx_size = fw_size - fw_pos;
366 fw_buf[0] = TDA1004X_CODE_IN;
367 memcpy(fw_buf + 1, firmware + fw_pos, tx_size);
368 fw_msg.len = tx_size + 1;
369 if (i2c->xfer(i2c, &fw_msg, 1) != 1) {
375 dprintk("%s: fw_pos=0x%x\n", __FUNCTION__, fw_pos);
380 // Initialise the DSP and check upload was OK
381 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 0x10, 0);
382 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSP_CMD, 0x67);
383 if ((tda1004x_read_byte(i2c, tda_state, TDA1004X_DSP_DATA1) != 0x67) ||
384 (tda1004x_read_byte(i2c, tda_state, TDA1004X_DSP_DATA2) != 0x2c)) {
385 printk("%s: firmware upload failed!\n", __FUNCTION__);
390 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 8, 0);
391 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 0x10, 0x10);
392 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0xC0, 0x0);
393 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 0x20, 0);
394 tda1004x_write_byte(i2c, tda_state, TDA1004X_CONFADC1, 0x2e);
395 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x80, 0x80);
396 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x40, 0);
397 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x10, 0);
398 tda1004x_write_byte(i2c, tda_state, TDA1004X_REG1E, 0);
399 tda1004x_write_byte(i2c, tda_state, TDA1004X_REG1F, 0);
400 tda1004x_write_mask(i2c, tda_state, TDA1004X_VBER_MSB, 0xe0, 0xa0);
406 static int tda1004x_encode_fec(int fec)
408 // convert known FEC values
426 static int tda1004x_decode_fec(int tdafec)
428 // convert known FEC values
446 static int tda1004x_set_frequency(struct dvb_i2c_bus *i2c,
447 struct tda1004x_state *tda_state,
448 struct dvb_frontend_parameters *fe_params)
451 struct i2c_msg tuner_msg = {.addr=0, .flags=0, .buf=tuner_buf, .len=sizeof(tuner_buf) };
454 int counter, counter2;
456 dprintk("%s\n", __FUNCTION__);
458 // setup the frequency buffer
459 switch (tda_state->tuner_address) {
462 // setup tuner buffer
464 (((fe_params->frequency / 1000) * 6) + 217502) / 1000;
465 tuner_buf[0] = tuner_frequency >> 8;
466 tuner_buf[1] = tuner_frequency & 0xff;
468 if (fe_params->frequency < 550000000) {
475 tda1004x_enable_tuner_i2c(i2c, tda_state);
476 tuner_msg.addr = tda_state->tuner_address;
478 i2c->xfer(i2c, &tuner_msg, 1);
480 // wait for it to finish
482 tuner_msg.flags = I2C_M_RD;
485 while (counter++ < 100) {
486 if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
487 if (tuner_buf[0] & 0x40) {
498 tda1004x_disable_tuner_i2c(i2c, tda_state);
501 case TDM1316L_ADDRESS:
502 // determine charge pump
503 tuner_frequency = fe_params->frequency + 36130000;
504 if (tuner_frequency < 87000000) {
506 } else if (tuner_frequency < 130000000) {
508 } else if (tuner_frequency < 160000000) {
510 } else if (tuner_frequency < 200000000) {
512 } else if (tuner_frequency < 290000000) {
514 } else if (tuner_frequency < 420000000) {
516 } else if (tuner_frequency < 480000000) {
518 } else if (tuner_frequency < 620000000) {
520 } else if (tuner_frequency < 830000000) {
522 } else if (tuner_frequency < 895000000) {
529 if (fe_params->frequency < 49000000) {
531 } else if (fe_params->frequency < 159000000) {
533 } else if (fe_params->frequency < 444000000) {
535 } else if (fe_params->frequency < 861000000) {
542 switch (fe_params->u.ofdm.bandwidth) {
543 case BANDWIDTH_6_MHZ:
544 // 6 MHz isn't supported directly, but set this to
545 // the 8 MHz setting in case we can fiddle it later
549 case BANDWIDTH_7_MHZ:
553 case BANDWIDTH_8_MHZ:
561 // calculate tuner parameters
563 (((fe_params->frequency / 1000) * 6) + 217280) / 1000;
564 tuner_buf[0] = tuner_frequency >> 8;
565 tuner_buf[1] = tuner_frequency & 0xff;
567 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
570 tda1004x_enable_tuner_i2c(i2c, tda_state);
571 tuner_msg.addr = tda_state->tuner_address;
573 if (i2c->xfer(i2c, &tuner_msg, 1) != 1) {
577 tda1004x_disable_tuner_i2c(i2c, tda_state);
584 dprintk("%s: success\n", __FUNCTION__);
590 static int tda1004x_set_fe(struct dvb_i2c_bus *i2c,
591 struct tda1004x_state *tda_state,
592 struct dvb_frontend_parameters *fe_params)
596 dprintk("%s\n", __FUNCTION__);
600 tmp = tda1004x_set_frequency(i2c, tda_state, fe_params);
604 // hardcoded to use auto as much as possible
605 fe_params->u.ofdm.code_rate_HP = FEC_AUTO;
606 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
607 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;
609 // Set standard params.. or put them to auto
610 if ((fe_params->u.ofdm.code_rate_HP == FEC_AUTO) ||
611 (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) ||
612 (fe_params->u.ofdm.constellation == QAM_AUTO) ||
613 (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) {
614 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 1); // enable auto
615 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x03, 0); // turn off constellation bits
616 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0); // turn off hierarchy bits
617 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x3f, 0); // turn off FEC bits
619 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 0); // disable auto
622 tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_HP);
623 if (tmp < 0) return tmp;
624 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 7, tmp);
627 if (fe_params->u.ofdm.code_rate_LP != FEC_NONE) {
628 tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_LP);
629 if (tmp < 0) return tmp;
630 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x38, tmp << 3);
634 switch (fe_params->u.ofdm.constellation) {
636 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 0);
640 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 1);
644 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 2);
652 switch (fe_params->u.ofdm.hierarchy_information) {
654 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0 << 5);
658 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 1 << 5);
662 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 2 << 5);
666 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 3 << 5);
675 switch(tda_state->tda1004x_address) {
676 case TDA10045H_ADDRESS:
677 tda10045h_set_bandwidth(i2c, tda_state, fe_params->u.ofdm.bandwidth);
682 switch (fe_params->inversion) {
684 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0);
688 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0x20);
695 // set guard interval
696 switch (fe_params->u.ofdm.guard_interval) {
697 case GUARD_INTERVAL_1_32:
698 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
699 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
702 case GUARD_INTERVAL_1_16:
703 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
704 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 1 << 2);
707 case GUARD_INTERVAL_1_8:
708 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
709 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 2 << 2);
712 case GUARD_INTERVAL_1_4:
713 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
714 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 3 << 2);
717 case GUARD_INTERVAL_AUTO:
718 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 2);
719 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
726 // set transmission mode
727 switch (fe_params->u.ofdm.transmission_mode) {
728 case TRANSMISSION_MODE_2K:
729 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
730 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0 << 4);
733 case TRANSMISSION_MODE_8K:
734 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
735 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 1 << 4);
738 case TRANSMISSION_MODE_AUTO:
739 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 4);
740 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0);
748 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 8);
749 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 0);
757 static int tda1004x_get_fe(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, struct dvb_frontend_parameters *fe_params)
760 dprintk("%s\n", __FUNCTION__);
763 fe_params->inversion = INVERSION_OFF;
764 if (tda1004x_read_byte(i2c, tda_state, TDA1004X_CONFC1) & 0x20) {
765 fe_params->inversion = INVERSION_ON;
769 switch (tda1004x_read_byte(i2c, tda_state, TDA1004X_WREF_LSB)) {
771 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
774 fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
777 fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
782 fe_params->u.ofdm.code_rate_HP =
783 tda1004x_decode_fec(tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) & 7);
784 fe_params->u.ofdm.code_rate_LP =
785 tda1004x_decode_fec((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) >> 3) & 7);
788 switch (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 3) {
790 fe_params->u.ofdm.constellation = QPSK;
793 fe_params->u.ofdm.constellation = QAM_16;
796 fe_params->u.ofdm.constellation = QAM_64;
801 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
802 if (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x10) {
803 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
807 switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x0c) >> 2) {
809 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
812 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
815 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
818 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
823 switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x60) >> 5) {
825 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE;
828 fe_params->u.ofdm.hierarchy_information = HIERARCHY_1;
831 fe_params->u.ofdm.hierarchy_information = HIERARCHY_2;
834 fe_params->u.ofdm.hierarchy_information = HIERARCHY_4;
843 static int tda1004x_read_status(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, fe_status_t * fe_status)
849 dprintk("%s\n", __FUNCTION__);
852 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_STATUS_CD);
859 if (status & 4) *fe_status |= FE_HAS_SIGNAL;
860 if (status & 2) *fe_status |= FE_HAS_CARRIER;
861 if (status & 8) *fe_status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
863 // if we don't already have VITERBI (i.e. not LOCKED), see if the viterbi
864 // is getting anything valid
865 if (!(*fe_status & FE_HAS_VITERBI)) {
867 cber = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_LSB);
868 if (cber == -1) return -EIO;
869 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_MSB);
870 if (status == -1) return -EIO;
871 cber |= (status << 8);
872 tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_RESET);
875 *fe_status |= FE_HAS_VITERBI;
879 // if we DO have some valid VITERBI output, but don't already have SYNC
880 // bytes (i.e. not LOCKED), see if the RS decoder is getting anything valid.
881 if ((*fe_status & FE_HAS_VITERBI) && (!(*fe_status & FE_HAS_SYNC))) {
883 vber = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_LSB);
884 if (vber == -1) return -EIO;
885 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_MID);
886 if (status == -1) return -EIO;
887 vber |= (status << 8);
888 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_MSB);
889 if (status == -1) return -EIO;
890 vber |= ((status << 16) & 0x0f);
891 tda1004x_read_byte(i2c, tda_state, TDA1004X_CVBER_LUT);
893 // if RS has passed some valid TS packets, then we must be
894 // getting some SYNC bytes
896 *fe_status |= FE_HAS_SYNC;
901 dprintk("%s: fe_status=0x%x\n", __FUNCTION__, *fe_status);
905 static int tda1004x_read_signal_strength(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u16 * signal)
909 dprintk("%s\n", __FUNCTION__);
912 tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_SIGNAL_STRENGTH);
917 *signal = (tmp << 8) | tmp;
918 dprintk("%s: signal=0x%x\n", __FUNCTION__, *signal);
923 static int tda1004x_read_snr(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u16 * snr)
927 dprintk("%s\n", __FUNCTION__);
930 tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_SNR);
938 *snr = ((tmp << 8) | tmp);
939 dprintk("%s: snr=0x%x\n", __FUNCTION__, *snr);
943 static int tda1004x_read_ucblocks(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u32* ucblocks)
949 dprintk("%s\n", __FUNCTION__);
951 // read the UCBLOCKS and reset
953 tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_UNCOR);
957 while (counter++ < 5) {
958 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
959 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
960 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
962 tmp2 = tda1004x_read_byte(i2c, tda_state, TDA1004X_UNCOR);
966 if ((tmp2 < tmp) || (tmp2 == 0))
974 *ucblocks = 0xffffffff;
976 dprintk("%s: ucblocks=0x%x\n", __FUNCTION__, *ucblocks);
980 static int tda1004x_read_ber(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u32* ber)
984 dprintk("%s\n", __FUNCTION__);
987 tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_LSB);
988 if (tmp < 0) return -EIO;
990 tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_MSB);
991 if (tmp < 0) return -EIO;
993 tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_RESET);
996 dprintk("%s: ber=0x%x\n", __FUNCTION__, *ber);
1001 static int tda1004x_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
1004 struct dvb_i2c_bus *i2c = fe->i2c;
1005 struct tda1004x_state *tda_state = (struct tda1004x_state *) &(fe->data);
1007 dprintk("%s: cmd=0x%x\n", __FUNCTION__, cmd);
1011 switch(tda_state->tda1004x_address) {
1012 case TDA10045H_ADDRESS:
1013 memcpy(arg, &tda10045h_info, sizeof(struct dvb_frontend_info));
1018 case FE_READ_STATUS:
1019 return tda1004x_read_status(i2c, tda_state, (fe_status_t *) arg);
1022 return tda1004x_read_ber(i2c, tda_state, (u32 *) arg);
1024 case FE_READ_SIGNAL_STRENGTH:
1025 return tda1004x_read_signal_strength(i2c, tda_state, (u16 *) arg);
1028 return tda1004x_read_snr(i2c, tda_state, (u16 *) arg);
1030 case FE_READ_UNCORRECTED_BLOCKS:
1031 return tda1004x_read_ucblocks(i2c, tda_state, (u32 *) arg);
1033 case FE_SET_FRONTEND:
1034 return tda1004x_set_fe(i2c, tda_state, (struct dvb_frontend_parameters*) arg);
1036 case FE_GET_FRONTEND:
1037 return tda1004x_get_fe(i2c, tda_state, (struct dvb_frontend_parameters*) arg);
1040 // don't bother reinitialising
1041 if (tda_state->initialised)
1044 // OK, perform initialisation
1045 status = tda1004x_init(i2c, tda_state);
1047 tda_state->initialised = 1;
1058 static int tda1004x_attach(struct dvb_i2c_bus *i2c, void **data)
1060 int tda1004x_address = -1;
1061 int tuner_address = -1;
1062 struct tda1004x_state tda_state;
1063 struct i2c_msg tuner_msg = {.addr=0, .flags=0, .buf=0, .len=0 };
1064 static u8 td1344_init[] = { 0x0b, 0xf5, 0x88, 0xab };
1065 static u8 tdm1316l_init[] = { 0x0b, 0xf5, 0x85, 0xab };
1067 dprintk("%s\n", __FUNCTION__);
1069 // probe for frontend
1070 tda_state.tda1004x_address = TDA10045H_ADDRESS;
1071 if (tda1004x_read_byte(i2c, &tda_state, TDA1004X_CHIPID) == 0x25) {
1072 tda1004x_address = TDA10045H_ADDRESS;
1073 printk("tda1004x: Detected Philips TDA10045H.\n");
1076 // did we find a frontend?
1077 if (tda1004x_address == -1) {
1082 tda1004x_enable_tuner_i2c(i2c, &tda_state);
1083 tuner_msg.addr = TD1344_ADDRESS;
1084 tuner_msg.buf = td1344_init;
1085 tuner_msg.len = sizeof(td1344_init);
1086 if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
1088 tuner_address = TD1344_ADDRESS;
1089 printk("tda1004x: Detected Philips TD1344 tuner. PLEASE CHECK THIS AND REPORT BACK!.\n");
1091 tuner_msg.addr = TDM1316L_ADDRESS;
1092 tuner_msg.buf = tdm1316l_init;
1093 tuner_msg.len = sizeof(tdm1316l_init);
1094 if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
1096 tuner_address = TDM1316L_ADDRESS;
1097 printk("tda1004x: Detected Philips TDM1316L tuner.\n");
1100 tda1004x_disable_tuner_i2c(i2c, &tda_state);
1102 // did we find a tuner?
1103 if (tuner_address == -1) {
1104 printk("tda1004x: Detected, but with unknown tuner.\n");
1109 tda_state.tda1004x_address = tda1004x_address;
1110 tda_state.tuner_address = tuner_address;
1111 tda_state.initialised = 0;
1114 switch(tda_state.tda1004x_address) {
1115 case TDA10045H_ADDRESS:
1116 return dvb_register_frontend(tda1004x_ioctl, i2c, (void *)(*((u32*) &tda_state)), &tda10045h_info);
1124 void tda1004x_detach(struct dvb_i2c_bus *i2c, void *data)
1126 dprintk("%s\n", __FUNCTION__);
1128 dvb_unregister_frontend(tda1004x_ioctl, i2c);
1133 int __init init_tda1004x(void)
1135 return dvb_register_i2c_device(THIS_MODULE, tda1004x_attach, tda1004x_detach);
1140 void __exit exit_tda1004x(void)
1142 dvb_unregister_i2c_device(tda1004x_attach);
1145 module_init(init_tda1004x);
1146 module_exit(exit_tda1004x);
1148 MODULE_DESCRIPTION("Philips TDA10045H DVB-T Frontend");
1149 MODULE_AUTHOR("Andrew de Quincey & Robert Schlabbach");
1150 MODULE_LICENSE("GPL");
1152 MODULE_PARM(tda1004x_debug, "i");
1153 MODULE_PARM_DESC(tda1004x_debug, "enable verbose debug messages");
1155 MODULE_PARM(tda1004x_firmware, "s");
1156 MODULE_PARM_DESC(tda1004x_firmware, "Where to find the firmware file");