- update to 2.6.1-rc2 -- first cut.
[linux-flexiantxendom0-3.2.10.git] / drivers / media / dvb / frontends / tda1004x.c
1   /*
2      Driver for Philips tda1004xh OFDM Frontend
3
4      This program is free software; you can redistribute it and/or modify
5      it under the terms of the GNU General Public License as published by
6      the Free Software Foundation; either version 2 of the License, or
7      (at your option) any later version.
8
9      This program is distributed in the hope that it will be useful,
10      but WITHOUT ANY WARRANTY; without even the implied warranty of
11      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12
13      GNU General Public License for more details.
14
15      You should have received a copy of the GNU General Public License
16      along with this program; if not, write to the Free Software
17      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
19    */
20
21 /*
22     This driver needs a copy of the DLL "ttlcdacc.dll" from the Haupauge or Technotrend
23     windows driver saved as '/etc/dvb/tda1004x.mc'.
24     You can also pass the complete file name with the module parameter 'tda1004x_firmware'.
25
26     Currently the DLL from v2.15a of the technotrend driver is supported. Other versions can
27     be added reasonably painlessly.
28
29     Windows driver URL: http://www.technotrend.de/
30  */
31
32
33 #define __KERNEL_SYSCALLS__
34 #include <linux/kernel.h>
35 #include <linux/vmalloc.h>
36 #include <linux/module.h>
37 #include <linux/init.h>
38 #include <linux/string.h>
39 #include <linux/slab.h>
40 #include <linux/fs.h>
41 #include <linux/unistd.h>
42 #include <linux/fcntl.h>
43 #include <linux/errno.h>
44 #include "dvb_frontend.h"
45 #include "dvb_functions.h"
46
47 #ifndef DVB_TDA1004X_FIRMWARE_FILE
48 #define DVB_TDA1004X_FIRMWARE_FILE "/etc/dvb/tda1004x.mc"
49 #endif
50
51 static int tda1004x_debug = 0;
52 static char *tda1004x_firmware = DVB_TDA1004X_FIRMWARE_FILE;
53
54
55 #define TDA10045H_ADDRESS        0x08
56 #define TD1344_ADDRESS           0x61
57 #define TDM1316L_ADDRESS         0x63
58 #define MC44BC374_ADDRESS        0x65
59
60 #define TDA1004X_CHIPID          0x00
61 #define TDA1004X_AUTO            0x01
62 #define TDA1004X_IN_CONF1        0x02
63 #define TDA1004X_IN_CONF2        0x03
64 #define TDA1004X_OUT_CONF1       0x04
65 #define TDA1004X_OUT_CONF2       0x05
66 #define TDA1004X_STATUS_CD       0x06
67 #define TDA1004X_CONFC4          0x07
68 #define TDA1004X_DSSPARE2        0x0C
69 #define TDA1004X_CODE_IN         0x0D
70 #define TDA1004X_FWPAGE          0x0E
71 #define TDA1004X_SCAN_CPT        0x10
72 #define TDA1004X_DSP_CMD         0x11
73 #define TDA1004X_DSP_ARG         0x12
74 #define TDA1004X_DSP_DATA1       0x13
75 #define TDA1004X_DSP_DATA2       0x14
76 #define TDA1004X_CONFADC1        0x15
77 #define TDA1004X_CONFC1          0x16
78 #define TDA1004X_SIGNAL_STRENGTH 0x1a
79 #define TDA1004X_SNR             0x1c
80 #define TDA1004X_REG1E           0x1e
81 #define TDA1004X_REG1F           0x1f
82 #define TDA1004X_CBER_RESET      0x20
83 #define TDA1004X_CBER_MSB        0x21
84 #define TDA1004X_CBER_LSB        0x22
85 #define TDA1004X_CVBER_LUT       0x23
86 #define TDA1004X_VBER_MSB        0x24
87 #define TDA1004X_VBER_MID        0x25
88 #define TDA1004X_VBER_LSB        0x26
89 #define TDA1004X_UNCOR           0x27
90 #define TDA1004X_CONFPLL_P       0x2D
91 #define TDA1004X_CONFPLL_M_MSB   0x2E
92 #define TDA1004X_CONFPLL_M_LSB   0x2F
93 #define TDA1004X_CONFPLL_N       0x30
94 #define TDA1004X_UNSURW_MSB      0x31
95 #define TDA1004X_UNSURW_LSB      0x32
96 #define TDA1004X_WREF_MSB        0x33
97 #define TDA1004X_WREF_MID        0x34
98 #define TDA1004X_WREF_LSB        0x35
99 #define TDA1004X_MUXOUT          0x36
100 #define TDA1004X_CONFADC2        0x37
101 #define TDA1004X_IOFFSET         0x38
102
103 #define dprintk if (tda1004x_debug) printk
104
105 static struct dvb_frontend_info tda10045h_info = {
106         .name = "Philips TDA10045H",
107         .type = FE_OFDM,
108         .frequency_min = 51000000,
109         .frequency_max = 858000000,
110         .frequency_stepsize = 166667,
111         .caps =
112             FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
113             FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
114             FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
115             FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO
116 };
117
118 #pragma pack(1)
119 struct tda1004x_state {
120         u8 tda1004x_address;
121         u8 tuner_address;
122         u8 initialised:1;
123 };
124 #pragma pack()
125
126 struct fwinfo {
127         int file_size;
128         int fw_offset;
129         int fw_size;
130 };
131 static struct fwinfo tda10045h_fwinfo[] = { {.file_size = 286720,.fw_offset = 0x34cc5,.fw_size = 30555} };
132 static int tda10045h_fwinfo_count = sizeof(tda10045h_fwinfo) / sizeof(struct fwinfo);
133
134 static int errno;
135
136
137 static int tda1004x_write_byte(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, int data)
138 {
139         int ret;
140         u8 buf[] = { reg, data };
141         struct i2c_msg msg = { .addr=0, .flags=0, .buf=buf, .len=2 };
142
143         dprintk("%s: reg=0x%x, data=0x%x\n", __FUNCTION__, reg, data);
144
145         msg.addr = tda_state->tda1004x_address;
146         ret = i2c->xfer(i2c, &msg, 1);
147
148         if (ret != 1)
149                 dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
150                        __FUNCTION__, reg, data, ret);
151
152         dprintk("%s: success reg=0x%x, data=0x%x, ret=%i\n", __FUNCTION__,
153                 reg, data, ret);
154         return (ret != 1) ? -1 : 0;
155 }
156
157 static int tda1004x_read_byte(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg)
158 {
159         int ret;
160         u8 b0[] = { reg };
161         u8 b1[] = { 0 };
162         struct i2c_msg msg[] = {{ .addr=0, .flags=0, .buf=b0, .len=1},
163                                 { .addr=0, .flags=I2C_M_RD, .buf=b1, .len = 1}};
164
165         dprintk("%s: reg=0x%x\n", __FUNCTION__, reg);
166
167         msg[0].addr = tda_state->tda1004x_address;
168         msg[1].addr = tda_state->tda1004x_address;
169         ret = i2c->xfer(i2c, msg, 2);
170
171         if (ret != 2) {
172                 dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
173                        ret);
174                 return -1;
175         }
176
177         dprintk("%s: success reg=0x%x, data=0x%x, ret=%i\n", __FUNCTION__,
178                 reg, b1[0], ret);
179         return b1[0];
180 }
181
182 static int tda1004x_write_mask(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, int mask, int data)
183 {
184         int val;
185         dprintk("%s: reg=0x%x, mask=0x%x, data=0x%x\n", __FUNCTION__, reg,
186                 mask, data);
187
188         // read a byte and check
189         val = tda1004x_read_byte(i2c, tda_state, reg);
190         if (val < 0)
191                 return val;
192
193         // mask if off
194         val = val & ~mask;
195         val |= data & 0xff;
196
197         // write it out again
198         return tda1004x_write_byte(i2c, tda_state, reg, val);
199 }
200
201 static int tda1004x_write_buf(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state, int reg, unsigned char *buf, int len)
202 {
203         int i;
204         int result;
205
206         dprintk("%s: reg=0x%x, len=0x%x\n", __FUNCTION__, reg, len);
207
208         result = 0;
209         for (i = 0; i < len; i++) {
210                 result = tda1004x_write_byte(i2c, tda_state, reg + i, buf[i]);
211                 if (result != 0)
212                         break;
213         }
214
215         return result;
216 }
217
218 static int tda1004x_enable_tuner_i2c(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
219 {
220         int result;
221         dprintk("%s\n", __FUNCTION__);
222
223         result = tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 2, 2);
224         dvb_delay(1);
225         return result;
226 }
227
228 static int tda1004x_disable_tuner_i2c(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
229 {
230
231         dprintk("%s\n", __FUNCTION__);
232
233         return tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 2, 0);
234 }
235
236
237 static int tda10045h_set_bandwidth(struct dvb_i2c_bus *i2c,
238                                    struct tda1004x_state *tda_state,
239                                    fe_bandwidth_t bandwidth)
240 {
241         static u8 bandwidth_6mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x60, 0x1e, 0xa7, 0x45, 0x4f };
242         static u8 bandwidth_7mhz[] = { 0x02, 0x00, 0x37, 0x00, 0x4a, 0x2f, 0x6d, 0x76, 0xdb };
243         static u8 bandwidth_8mhz[] = { 0x02, 0x00, 0x3d, 0x00, 0x48, 0x17, 0x89, 0xc7, 0x14 };
244
245         switch (bandwidth) {
246         case BANDWIDTH_6_MHZ:
247                 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x14);
248                 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_6mhz, sizeof(bandwidth_6mhz));
249                 break;
250
251         case BANDWIDTH_7_MHZ:
252                 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x80);
253                 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_7mhz, sizeof(bandwidth_7mhz));
254                 break;
255
256         case BANDWIDTH_8_MHZ:
257                 tda1004x_write_byte(i2c, tda_state, TDA1004X_DSSPARE2, 0x14);
258                 tda1004x_write_buf(i2c, tda_state, TDA1004X_CONFPLL_P, bandwidth_8mhz, sizeof(bandwidth_8mhz));
259                 break;
260
261         default:
262                 return -EINVAL;
263         }
264
265         tda1004x_write_byte(i2c, tda_state, TDA1004X_IOFFSET, 0);
266
267         // done
268         return 0;
269 }
270
271
272 static int tda1004x_init(struct dvb_i2c_bus *i2c, struct tda1004x_state *tda_state)
273 {
274         u8 fw_buf[65];
275         struct i2c_msg fw_msg = {.addr = 0,.flags = 0,.buf = fw_buf,.len = 0 };
276         struct i2c_msg tuner_msg = {.addr = 0,.flags = 0,.buf = 0,.len = 0 };
277         unsigned char *firmware = NULL;
278         int filesize;
279         int fd;
280         int fwinfo_idx;
281         int fw_size = 0;
282         int fw_pos;
283         int tx_size;
284         static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
285         mm_segment_t fs = get_fs();
286
287         dprintk("%s\n", __FUNCTION__);
288
289         // Load the firmware
290         set_fs(get_ds());
291         fd = open(tda1004x_firmware, 0, 0);
292         if (fd < 0) {
293                 printk("%s: Unable to open firmware %s\n", __FUNCTION__,
294                        tda1004x_firmware);
295                 return -EIO;
296         }
297         filesize = lseek(fd, 0L, 2);
298         if (filesize <= 0) {
299                 printk("%s: Firmware %s is empty\n", __FUNCTION__,
300                        tda1004x_firmware);
301                 sys_close(fd);
302                 return -EIO;
303         }
304
305         // find extraction parameters
306         for (fwinfo_idx = 0; fwinfo_idx < tda10045h_fwinfo_count; fwinfo_idx++) {
307                 if (tda10045h_fwinfo[fwinfo_idx].file_size == filesize)
308                         break;
309         }
310         if (fwinfo_idx >= tda10045h_fwinfo_count) {
311                 printk("%s: Unsupported firmware %s\n", __FUNCTION__, tda1004x_firmware);
312                 sys_close(fd);
313                 return -EIO;
314         }
315         fw_size = tda10045h_fwinfo[fwinfo_idx].fw_size;
316
317         // allocate buffer for it
318         firmware = vmalloc(fw_size);
319         if (firmware == NULL) {
320                 printk("%s: Out of memory loading firmware\n",
321                        __FUNCTION__);
322                 sys_close(fd);
323                 return -EIO;
324         }
325
326         // read it!
327         lseek(fd, tda10045h_fwinfo[fwinfo_idx].fw_offset, 0);
328         if (read(fd, firmware, fw_size) != fw_size) {
329                 printk("%s: Failed to read firmware\n", __FUNCTION__);
330                 vfree(firmware);
331                 sys_close(fd);
332                 return -EIO;
333         }
334         sys_close(fd);
335         set_fs(fs);
336
337         // Disable the MC44BC374C
338         tda1004x_enable_tuner_i2c(i2c, tda_state);
339         tuner_msg.addr = MC44BC374_ADDRESS;
340         tuner_msg.buf = disable_mc44BC374c;
341         tuner_msg.len = sizeof(disable_mc44BC374c);
342         if (i2c->xfer(i2c, &tuner_msg, 1) != 1) {
343                 i2c->xfer(i2c, &tuner_msg, 1);
344         }
345         tda1004x_disable_tuner_i2c(i2c, tda_state);
346
347         // set some valid bandwith parameters
348         switch(tda_state->tda1004x_address) {
349         case TDA10045H_ADDRESS:
350                 tda10045h_set_bandwidth(i2c, tda_state, BANDWIDTH_8_MHZ);
351                 break;
352         }
353         dvb_delay(500);
354
355         // do the firmware upload
356         tda1004x_write_byte(i2c, tda_state, TDA1004X_FWPAGE, 0);
357         fw_msg.addr = tda_state->tda1004x_address;
358         fw_pos = 0;
359         while (fw_pos != fw_size) {
360                 // work out how much to send this time
361                 tx_size = fw_size - fw_pos;
362                 if (tx_size > 64) {
363                         tx_size = 64;
364                 }
365                 // send the chunk
366                 fw_buf[0] = TDA1004X_CODE_IN;
367                 memcpy(fw_buf + 1, firmware + fw_pos, tx_size);
368                 fw_msg.len = tx_size + 1;
369                 if (i2c->xfer(i2c, &fw_msg, 1) != 1) {
370                         vfree(firmware);
371                         return -EIO;
372                 }
373                 fw_pos += tx_size;
374
375                 dprintk("%s: fw_pos=0x%x\n", __FUNCTION__, fw_pos);
376         }
377         dvb_delay(100);
378         vfree(firmware);
379
380         // Initialise the DSP and check upload was OK
381         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 0x10, 0);
382         tda1004x_write_byte(i2c, tda_state, TDA1004X_DSP_CMD, 0x67);
383         if ((tda1004x_read_byte(i2c, tda_state, TDA1004X_DSP_DATA1) != 0x67) ||
384             (tda1004x_read_byte(i2c, tda_state, TDA1004X_DSP_DATA2) != 0x2c)) {
385                 printk("%s: firmware upload failed!\n", __FUNCTION__);
386                 return -EIO;
387         }
388
389         // tda setup
390         tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 8, 0);
391         tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 0x10, 0x10);
392         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0xC0, 0x0);
393         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 0x20, 0);
394         tda1004x_write_byte(i2c, tda_state, TDA1004X_CONFADC1, 0x2e);
395         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x80, 0x80);
396         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x40, 0);
397         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x10, 0);
398         tda1004x_write_byte(i2c, tda_state, TDA1004X_REG1E, 0);
399         tda1004x_write_byte(i2c, tda_state, TDA1004X_REG1F, 0);
400         tda1004x_write_mask(i2c, tda_state, TDA1004X_VBER_MSB, 0xe0, 0xa0);
401
402         // done
403         return 0;
404 }
405
406 static int tda1004x_encode_fec(int fec)
407 {
408         // convert known FEC values
409         switch (fec) {
410         case FEC_1_2:
411                 return 0;
412         case FEC_2_3:
413                 return 1;
414         case FEC_3_4:
415                 return 2;
416         case FEC_5_6:
417                 return 3;
418         case FEC_7_8:
419                 return 4;
420         }
421
422         // unsupported
423         return -EINVAL;
424 }
425
426 static int tda1004x_decode_fec(int tdafec)
427 {
428         // convert known FEC values
429         switch (tdafec) {
430         case 0:
431                 return FEC_1_2;
432         case 1:
433                 return FEC_2_3;
434         case 2:
435                 return FEC_3_4;
436         case 3:
437                 return FEC_5_6;
438         case 4:
439                 return FEC_7_8;
440         }
441
442         // unsupported
443         return -1;
444 }
445
446 static int tda1004x_set_frequency(struct dvb_i2c_bus *i2c,
447                            struct tda1004x_state *tda_state,
448                            struct dvb_frontend_parameters *fe_params)
449 {
450         u8 tuner_buf[4];
451         struct i2c_msg tuner_msg = {.addr=0, .flags=0, .buf=tuner_buf, .len=sizeof(tuner_buf) };
452         int tuner_frequency;
453         u8 band, cp, filter;
454         int counter, counter2;
455
456         dprintk("%s\n", __FUNCTION__);
457
458         // setup the frequency buffer
459         switch (tda_state->tuner_address) {
460         case TD1344_ADDRESS:
461
462                 // setup tuner buffer
463                 tuner_frequency =
464                         (((fe_params->frequency / 1000) * 6) + 217502) / 1000;
465                 tuner_buf[0] = tuner_frequency >> 8;
466                 tuner_buf[1] = tuner_frequency & 0xff;
467                 tuner_buf[2] = 0x88;
468                 if (fe_params->frequency < 550000000) {
469                         tuner_buf[3] = 0xab;
470                 } else {
471                         tuner_buf[3] = 0xeb;
472                 }
473
474                 // tune it
475                 tda1004x_enable_tuner_i2c(i2c, tda_state);
476                 tuner_msg.addr = tda_state->tuner_address;
477                 tuner_msg.len = 4;
478                 i2c->xfer(i2c, &tuner_msg, 1);
479
480                 // wait for it to finish
481                 tuner_msg.len = 1;
482                 tuner_msg.flags = I2C_M_RD;
483                 counter = 0;
484                 counter2 = 0;
485                 while (counter++ < 100) {
486                         if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
487                                 if (tuner_buf[0] & 0x40) {
488                                         counter2++;
489                                 } else {
490                                         counter2 = 0;
491                                 }
492                         }
493
494                         if (counter2 > 10) {
495                                 break;
496                         }
497                 }
498                 tda1004x_disable_tuner_i2c(i2c, tda_state);
499                 break;
500
501         case TDM1316L_ADDRESS:
502                 // determine charge pump
503                 tuner_frequency = fe_params->frequency + 36130000;
504                 if (tuner_frequency < 87000000) {
505                         return -EINVAL;
506                 } else if (tuner_frequency < 130000000) {
507                         cp = 3;
508                 } else if (tuner_frequency < 160000000) {
509                         cp = 5;
510                 } else if (tuner_frequency < 200000000) {
511                         cp = 6;
512                 } else if (tuner_frequency < 290000000) {
513                         cp = 3;
514                 } else if (tuner_frequency < 420000000) {
515                         cp = 5;
516                 } else if (tuner_frequency < 480000000) {
517                         cp = 6;
518                 } else if (tuner_frequency < 620000000) {
519                         cp = 3;
520                 } else if (tuner_frequency < 830000000) {
521                         cp = 5;
522                 } else if (tuner_frequency < 895000000) {
523                         cp = 7;
524                 } else {
525                         return -EINVAL;
526                 }
527
528                 // determine band
529                 if (fe_params->frequency < 49000000) {
530                         return -EINVAL;
531                 } else if (fe_params->frequency < 159000000) {
532                         band = 1;
533                 } else if (fe_params->frequency < 444000000) {
534                         band = 2;
535                 } else if (fe_params->frequency < 861000000) {
536                         band = 4;
537                 } else {
538                         return -EINVAL;
539                 }
540
541                 // work out filter
542                 switch (fe_params->u.ofdm.bandwidth) {
543                 case BANDWIDTH_6_MHZ:
544                         // 6 MHz isn't supported directly, but set this to
545                         // the 8 MHz setting in case we can fiddle it later
546                         filter = 1;
547                         break;
548
549                 case BANDWIDTH_7_MHZ:
550                         filter = 0;
551                         break;
552
553                 case BANDWIDTH_8_MHZ:
554                         filter = 1;
555                         break;
556
557                 default:
558                         return -EINVAL;
559                 }
560
561                 // calculate tuner parameters
562                 tuner_frequency =
563                         (((fe_params->frequency / 1000) * 6) + 217280) / 1000;
564                 tuner_buf[0] = tuner_frequency >> 8;
565                 tuner_buf[1] = tuner_frequency & 0xff;
566                 tuner_buf[2] = 0xca;
567                 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
568
569                 // tune it
570                 tda1004x_enable_tuner_i2c(i2c, tda_state);
571                 tuner_msg.addr = tda_state->tuner_address;
572                 tuner_msg.len = 4;
573                 if (i2c->xfer(i2c, &tuner_msg, 1) != 1) {
574                         return -EIO;
575                 }
576                 dvb_delay(1);
577                 tda1004x_disable_tuner_i2c(i2c, tda_state);
578                 break;
579
580         default:
581                 return -EINVAL;
582         }
583
584         dprintk("%s: success\n", __FUNCTION__);
585
586         // done
587         return 0;
588 }
589
590 static int tda1004x_set_fe(struct dvb_i2c_bus *i2c,
591                            struct tda1004x_state *tda_state,
592                            struct dvb_frontend_parameters *fe_params)
593 {
594         int tmp;
595
596         dprintk("%s\n", __FUNCTION__);
597
598
599         // set frequency
600         tmp = tda1004x_set_frequency(i2c, tda_state, fe_params);
601         if (tmp < 0)
602                 return tmp;
603
604         // hardcoded to use auto as much as possible
605         fe_params->u.ofdm.code_rate_HP = FEC_AUTO;
606         fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_AUTO;
607         fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_AUTO;
608
609         // Set standard params.. or put them to auto
610         if ((fe_params->u.ofdm.code_rate_HP == FEC_AUTO) ||
611             (fe_params->u.ofdm.code_rate_LP == FEC_AUTO) ||
612             (fe_params->u.ofdm.constellation == QAM_AUTO) ||
613             (fe_params->u.ofdm.hierarchy_information == HIERARCHY_AUTO)) {
614                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 1);       // enable auto
615                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x03, 0);        // turn off constellation bits
616                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0);        // turn off hierarchy bits
617                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x3f, 0);        // turn off FEC bits
618         } else {
619                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 1, 0);       // disable auto
620
621                 // set HP FEC
622                 tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_HP);
623                 if (tmp < 0) return tmp;
624                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 7, tmp);
625
626                 // set LP FEC
627                 if (fe_params->u.ofdm.code_rate_LP != FEC_NONE) {
628                         tmp = tda1004x_encode_fec(fe_params->u.ofdm.code_rate_LP);
629                         if (tmp < 0) return tmp;
630                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF2, 0x38, tmp << 3);
631                 }
632
633                 // set constellation
634                 switch (fe_params->u.ofdm.constellation) {
635                 case QPSK:
636                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 0);
637                         break;
638
639                 case QAM_16:
640                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 1);
641                         break;
642
643                 case QAM_64:
644                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 3, 2);
645                         break;
646
647                 default:
648                         return -EINVAL;
649                 }
650
651                 // set hierarchy
652                 switch (fe_params->u.ofdm.hierarchy_information) {
653                 case HIERARCHY_NONE:
654                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 0 << 5);
655                         break;
656
657                 case HIERARCHY_1:
658                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 1 << 5);
659                         break;
660
661                 case HIERARCHY_2:
662                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 2 << 5);
663                         break;
664
665                 case HIERARCHY_4:
666                         tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x60, 3 << 5);
667                         break;
668
669                 default:
670                         return -EINVAL;
671                 }
672         }
673
674         // set bandwidth
675         switch(tda_state->tda1004x_address) {
676         case TDA10045H_ADDRESS:
677                 tda10045h_set_bandwidth(i2c, tda_state, fe_params->u.ofdm.bandwidth);
678                 break;
679         }
680
681         // set inversion
682         switch (fe_params->inversion) {
683         case INVERSION_OFF:
684                 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0);
685                 break;
686
687         case INVERSION_ON:
688                 tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC1, 0x20, 0x20);
689                 break;
690
691         default:
692                 return -EINVAL;
693         }
694
695         // set guard interval
696         switch (fe_params->u.ofdm.guard_interval) {
697         case GUARD_INTERVAL_1_32:
698                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
699                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
700                 break;
701
702         case GUARD_INTERVAL_1_16:
703                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
704                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 1 << 2);
705                 break;
706
707         case GUARD_INTERVAL_1_8:
708                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
709                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 2 << 2);
710                 break;
711
712         case GUARD_INTERVAL_1_4:
713                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 0);
714                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 3 << 2);
715                 break;
716
717         case GUARD_INTERVAL_AUTO:
718                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 2, 2);
719                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x0c, 0 << 2);
720                 break;
721
722         default:
723                 return -EINVAL;
724         }
725
726         // set transmission mode
727         switch (fe_params->u.ofdm.transmission_mode) {
728         case TRANSMISSION_MODE_2K:
729                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
730                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0 << 4);
731                 break;
732
733         case TRANSMISSION_MODE_8K:
734                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 0);
735                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 1 << 4);
736                 break;
737
738         case TRANSMISSION_MODE_AUTO:
739                 tda1004x_write_mask(i2c, tda_state, TDA1004X_AUTO, 4, 4);
740                 tda1004x_write_mask(i2c, tda_state, TDA1004X_IN_CONF1, 0x10, 0);
741                 break;
742
743         default:
744                 return -EINVAL;
745         }
746
747         // reset DSP
748         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 8);
749         tda1004x_write_mask(i2c, tda_state, TDA1004X_CONFC4, 8, 0);
750         dvb_delay(10);
751
752         // done
753         return 0;
754 }
755
756
757 static int tda1004x_get_fe(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, struct dvb_frontend_parameters *fe_params)
758 {
759
760         dprintk("%s\n", __FUNCTION__);
761
762         // inversion status
763         fe_params->inversion = INVERSION_OFF;
764         if (tda1004x_read_byte(i2c, tda_state, TDA1004X_CONFC1) & 0x20) {
765                 fe_params->inversion = INVERSION_ON;
766         }
767
768         // bandwidth
769         switch (tda1004x_read_byte(i2c, tda_state, TDA1004X_WREF_LSB)) {
770         case 0x14:
771                 fe_params->u.ofdm.bandwidth = BANDWIDTH_8_MHZ;
772                 break;
773         case 0xdb:
774                 fe_params->u.ofdm.bandwidth = BANDWIDTH_7_MHZ;
775                 break;
776         case 0x4f:
777                 fe_params->u.ofdm.bandwidth = BANDWIDTH_6_MHZ;
778                 break;
779         }
780
781         // FEC
782         fe_params->u.ofdm.code_rate_HP =
783             tda1004x_decode_fec(tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) & 7);
784         fe_params->u.ofdm.code_rate_LP =
785             tda1004x_decode_fec((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF2) >> 3) & 7);
786
787         // constellation
788         switch (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 3) {
789         case 0:
790                 fe_params->u.ofdm.constellation = QPSK;
791                 break;
792         case 1:
793                 fe_params->u.ofdm.constellation = QAM_16;
794                 break;
795         case 2:
796                 fe_params->u.ofdm.constellation = QAM_64;
797                 break;
798         }
799
800         // transmission mode
801         fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_2K;
802         if (tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x10) {
803                 fe_params->u.ofdm.transmission_mode = TRANSMISSION_MODE_8K;
804         }
805
806         // guard interval
807         switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x0c) >> 2) {
808         case 0:
809                 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_32;
810                 break;
811         case 1:
812                 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_16;
813                 break;
814         case 2:
815                 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_8;
816                 break;
817         case 3:
818                 fe_params->u.ofdm.guard_interval = GUARD_INTERVAL_1_4;
819                 break;
820         }
821
822         // hierarchy
823         switch ((tda1004x_read_byte(i2c, tda_state, TDA1004X_OUT_CONF1) & 0x60) >> 5) {
824         case 0:
825                 fe_params->u.ofdm.hierarchy_information = HIERARCHY_NONE;
826                 break;
827         case 1:
828                 fe_params->u.ofdm.hierarchy_information = HIERARCHY_1;
829                 break;
830         case 2:
831                 fe_params->u.ofdm.hierarchy_information = HIERARCHY_2;
832                 break;
833         case 3:
834                 fe_params->u.ofdm.hierarchy_information = HIERARCHY_4;
835                 break;
836         }
837
838         // done
839         return 0;
840 }
841
842
843 static int tda1004x_read_status(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, fe_status_t * fe_status)
844 {
845         int status;
846         int cber;
847         int vber;
848
849         dprintk("%s\n", __FUNCTION__);
850
851         // read status
852         status = tda1004x_read_byte(i2c, tda_state, TDA1004X_STATUS_CD);
853         if (status == -1) {
854                 return -EIO;
855         }
856
857         // decode
858         *fe_status = 0;
859         if (status & 4) *fe_status |= FE_HAS_SIGNAL;
860         if (status & 2) *fe_status |= FE_HAS_CARRIER;
861         if (status & 8) *fe_status |= FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
862
863         // if we don't already have VITERBI (i.e. not LOCKED), see if the viterbi
864         // is getting anything valid
865         if (!(*fe_status & FE_HAS_VITERBI)) {
866                 // read the CBER
867                 cber = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_LSB);
868                 if (cber == -1) return -EIO;
869                 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_MSB);
870                 if (status == -1) return -EIO;
871                 cber |= (status << 8);
872                 tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_RESET);
873
874                 if (cber != 65535) {
875                         *fe_status |= FE_HAS_VITERBI;
876                 }
877         }
878
879         // if we DO have some valid VITERBI output, but don't already have SYNC
880         // bytes (i.e. not LOCKED), see if the RS decoder is getting anything valid.
881         if ((*fe_status & FE_HAS_VITERBI) && (!(*fe_status & FE_HAS_SYNC))) {
882                 // read the VBER
883                 vber = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_LSB);
884                 if (vber == -1) return -EIO;
885                 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_MID);
886                 if (status == -1) return -EIO;
887                 vber |= (status << 8);
888                 status = tda1004x_read_byte(i2c, tda_state, TDA1004X_VBER_MSB);
889                 if (status == -1) return -EIO;
890                 vber |= ((status << 16) & 0x0f);
891                 tda1004x_read_byte(i2c, tda_state, TDA1004X_CVBER_LUT);
892
893                 // if RS has passed some valid TS packets, then we must be
894                 // getting some SYNC bytes
895                 if (vber < 16632) {
896                         *fe_status |= FE_HAS_SYNC;
897                 }
898         }
899
900         // success
901         dprintk("%s: fe_status=0x%x\n", __FUNCTION__, *fe_status);
902         return 0;
903 }
904
905 static int tda1004x_read_signal_strength(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u16 * signal)
906 {
907         int tmp;
908
909         dprintk("%s\n", __FUNCTION__);
910
911         // read it
912         tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_SIGNAL_STRENGTH);
913         if (tmp < 0)
914                 return -EIO;
915
916         // done
917         *signal = (tmp << 8) | tmp;
918         dprintk("%s: signal=0x%x\n", __FUNCTION__, *signal);
919         return 0;
920 }
921
922
923 static int tda1004x_read_snr(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u16 * snr)
924 {
925         int tmp;
926
927         dprintk("%s\n", __FUNCTION__);
928
929         // read it
930         tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_SNR);
931         if (tmp < 0)
932                 return -EIO;
933         if (tmp) {
934                 tmp = 255 - tmp;
935         }
936
937         // done
938         *snr = ((tmp << 8) | tmp);
939         dprintk("%s: snr=0x%x\n", __FUNCTION__, *snr);
940         return 0;
941 }
942
943 static int tda1004x_read_ucblocks(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u32* ucblocks)
944 {
945         int tmp;
946         int tmp2;
947         int counter;
948
949         dprintk("%s\n", __FUNCTION__);
950
951         // read the UCBLOCKS and reset
952         counter = 0;
953         tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_UNCOR);
954         if (tmp < 0)
955                 return -EIO;
956         tmp &= 0x7f;
957         while (counter++ < 5) {
958                 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
959                 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
960                 tda1004x_write_mask(i2c, tda_state, TDA1004X_UNCOR, 0x80, 0);
961
962                 tmp2 = tda1004x_read_byte(i2c, tda_state, TDA1004X_UNCOR);
963                 if (tmp2 < 0)
964                         return -EIO;
965                 tmp2 &= 0x7f;
966                 if ((tmp2 < tmp) || (tmp2 == 0))
967                         break;
968         }
969
970         // done
971         if (tmp != 0x7f) {
972                 *ucblocks = tmp;
973         } else {
974                 *ucblocks = 0xffffffff;
975         }
976         dprintk("%s: ucblocks=0x%x\n", __FUNCTION__, *ucblocks);
977         return 0;
978 }
979
980 static int tda1004x_read_ber(struct dvb_i2c_bus *i2c, struct tda1004x_state* tda_state, u32* ber)
981 {
982         int tmp;
983
984         dprintk("%s\n", __FUNCTION__);
985
986         // read it in
987         tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_LSB);
988         if (tmp < 0) return -EIO;
989         *ber = tmp << 1;
990         tmp = tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_MSB);
991         if (tmp < 0) return -EIO;
992         *ber |= (tmp << 9);
993         tda1004x_read_byte(i2c, tda_state, TDA1004X_CBER_RESET);
994
995         // done
996         dprintk("%s: ber=0x%x\n", __FUNCTION__, *ber);
997         return 0;
998 }
999
1000
1001 static int tda1004x_ioctl(struct dvb_frontend *fe, unsigned int cmd, void *arg)
1002 {
1003         int status = 0;
1004         struct dvb_i2c_bus *i2c = fe->i2c;
1005         struct tda1004x_state *tda_state = (struct tda1004x_state *) &(fe->data);
1006
1007         dprintk("%s: cmd=0x%x\n", __FUNCTION__, cmd);
1008
1009         switch (cmd) {
1010         case FE_GET_INFO:
1011                 switch(tda_state->tda1004x_address) {
1012                 case TDA10045H_ADDRESS:
1013                         memcpy(arg, &tda10045h_info, sizeof(struct dvb_frontend_info));
1014                         break;
1015                 }
1016                 break;
1017
1018         case FE_READ_STATUS:
1019                 return tda1004x_read_status(i2c, tda_state, (fe_status_t *) arg);
1020
1021         case FE_READ_BER:
1022                 return tda1004x_read_ber(i2c, tda_state, (u32 *) arg);
1023
1024         case FE_READ_SIGNAL_STRENGTH:
1025                 return tda1004x_read_signal_strength(i2c, tda_state, (u16 *) arg);
1026
1027         case FE_READ_SNR:
1028                 return tda1004x_read_snr(i2c, tda_state, (u16 *) arg);
1029
1030         case FE_READ_UNCORRECTED_BLOCKS:
1031                 return tda1004x_read_ucblocks(i2c, tda_state, (u32 *) arg);
1032
1033         case FE_SET_FRONTEND:
1034                 return tda1004x_set_fe(i2c, tda_state, (struct dvb_frontend_parameters*) arg);
1035
1036         case FE_GET_FRONTEND:
1037                 return tda1004x_get_fe(i2c, tda_state, (struct dvb_frontend_parameters*) arg);
1038
1039         case FE_INIT:
1040                 // don't bother reinitialising
1041                 if (tda_state->initialised)
1042                         return 0;
1043
1044                 // OK, perform initialisation
1045                 status = tda1004x_init(i2c, tda_state);
1046                 if (status == 0)
1047                         tda_state->initialised = 1;
1048                 return status;
1049
1050         default:
1051                 return -EOPNOTSUPP;
1052         }
1053
1054         return 0;
1055 }
1056
1057
1058 static int tda1004x_attach(struct dvb_i2c_bus *i2c, void **data)
1059 {
1060         int tda1004x_address = -1;
1061         int tuner_address = -1;
1062         struct tda1004x_state tda_state;
1063         struct i2c_msg tuner_msg = {.addr=0, .flags=0, .buf=0, .len=0 };
1064         static u8 td1344_init[] = { 0x0b, 0xf5, 0x88, 0xab };
1065         static u8 tdm1316l_init[] = { 0x0b, 0xf5, 0x85, 0xab };
1066
1067         dprintk("%s\n", __FUNCTION__);
1068
1069         // probe for frontend
1070         tda_state.tda1004x_address = TDA10045H_ADDRESS;
1071         if (tda1004x_read_byte(i2c, &tda_state, TDA1004X_CHIPID) == 0x25) {
1072                 tda1004x_address = TDA10045H_ADDRESS;
1073                 printk("tda1004x: Detected Philips TDA10045H.\n");
1074         }
1075
1076         // did we find a frontend?
1077         if (tda1004x_address == -1) {
1078                 return -ENODEV;
1079         }
1080
1081         // supported tuner?
1082         tda1004x_enable_tuner_i2c(i2c, &tda_state);
1083         tuner_msg.addr = TD1344_ADDRESS;
1084         tuner_msg.buf = td1344_init;
1085         tuner_msg.len = sizeof(td1344_init);
1086         if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
1087                 dvb_delay(1);
1088                 tuner_address = TD1344_ADDRESS;
1089                 printk("tda1004x: Detected Philips TD1344 tuner. PLEASE CHECK THIS AND REPORT BACK!.\n");
1090         } else {
1091                 tuner_msg.addr = TDM1316L_ADDRESS;
1092                 tuner_msg.buf = tdm1316l_init;
1093                 tuner_msg.len = sizeof(tdm1316l_init);
1094                 if (i2c->xfer(i2c, &tuner_msg, 1) == 1) {
1095                         dvb_delay(1);
1096                         tuner_address = TDM1316L_ADDRESS;
1097                         printk("tda1004x: Detected Philips TDM1316L tuner.\n");
1098                 }
1099         }
1100         tda1004x_disable_tuner_i2c(i2c, &tda_state);
1101
1102         // did we find a tuner?
1103         if (tuner_address == -1) {
1104                 printk("tda1004x: Detected, but with unknown tuner.\n");
1105                 return -ENODEV;
1106         }
1107
1108         // create state
1109         tda_state.tda1004x_address = tda1004x_address;
1110         tda_state.tuner_address = tuner_address;
1111         tda_state.initialised = 0;
1112
1113         // register
1114         switch(tda_state.tda1004x_address) {
1115         case TDA10045H_ADDRESS:
1116                 return dvb_register_frontend(tda1004x_ioctl, i2c, (void *)(*((u32*) &tda_state)), &tda10045h_info);
1117         default:
1118                 return -ENODEV;
1119         }
1120 }
1121
1122
1123 static
1124 void tda1004x_detach(struct dvb_i2c_bus *i2c, void *data)
1125 {
1126         dprintk("%s\n", __FUNCTION__);
1127
1128         dvb_unregister_frontend(tda1004x_ioctl, i2c);
1129 }
1130
1131
1132 static
1133 int __init init_tda1004x(void)
1134 {
1135         return dvb_register_i2c_device(THIS_MODULE, tda1004x_attach, tda1004x_detach);
1136 }
1137
1138
1139 static
1140 void __exit exit_tda1004x(void)
1141 {
1142         dvb_unregister_i2c_device(tda1004x_attach);
1143 }
1144
1145 module_init(init_tda1004x);
1146 module_exit(exit_tda1004x);
1147
1148 MODULE_DESCRIPTION("Philips TDA10045H DVB-T Frontend");
1149 MODULE_AUTHOR("Andrew de Quincey & Robert Schlabbach");
1150 MODULE_LICENSE("GPL");
1151
1152 MODULE_PARM(tda1004x_debug, "i");
1153 MODULE_PARM_DESC(tda1004x_debug, "enable verbose debug messages");
1154
1155 MODULE_PARM(tda1004x_firmware, "s");
1156 MODULE_PARM_DESC(tda1004x_firmware, "Where to find the firmware file");