arch/i386/kernel/cpu/cpufreq/speedstep-lib.c

   1 /*
   2  * (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   3  *
   4  *  Licensed under the terms of the GNU GPL License version 2.
   5  *
   6  *  Library for common functions for Intel SpeedStep v.1 and v.2 support
   7  *
   8  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/module.h>
  13 #include <linux/init.h>
  14 #include <linux/cpufreq.h>
  15 #include <linux/pci.h>
  16 #include <linux/slab.h>
  17
  18 #include <asm/msr.h>
  19 #include "speedstep-lib.h"
  20
  21
  22 /* DEBUG
  23  *   Define it if you want verbose debug output, e.g. for bug reporting
  24  */
  25 //#define SPEEDSTEP_DEBUG
  26
  27 #ifdef SPEEDSTEP_DEBUG
  28 #define dprintk(msg...) printk(msg)
  29 #else
  30 #define dprintk(msg...) do { } while(0)
  31 #endif
  32
  33 /*********************************************************************
  34  *                   GET PROCESSOR CORE SPEED IN KHZ                 *
  35  *********************************************************************/
  36
  37 static unsigned int pentium3_get_frequency (unsigned int processor)
  38 {
  39         /* See table 14 of p3_ds.pdf and table 22 of 29834003.pdf */
  40         struct {
  41                 unsigned int ratio;     /* Frequency Multiplier (x10) */
  42                 u8 bitmap;              /* power on configuration bits
  43                                            [27, 25:22] (in MSR 0x2a) */
  44         } msr_decode_mult [] = {
  45                 { 30, 0x01 },
  46                 { 35, 0x05 },
  47                 { 40, 0x02 },
  48                 { 45, 0x06 },
  49                 { 50, 0x00 },
  50                 { 55, 0x04 },
  51                 { 60, 0x0b },
  52                 { 65, 0x0f },
  53                 { 70, 0x09 },
  54                 { 75, 0x0d },
  55                 { 80, 0x0a },
  56                 { 85, 0x26 },
  57                 { 90, 0x20 },
  58                 { 100, 0x2b },
  59                 { 0, 0xff }     /* error or unknown value */
  60         };
  61
  62         /* PIII(-M) FSB settings: see table b1-b of 24547206.pdf */
  63         struct {
  64                 unsigned int value;     /* Front Side Bus speed in MHz */
  65                 u8 bitmap;              /* power on configuration bits [18: 19]
  66                                            (in MSR 0x2a) */
  67         } msr_decode_fsb [] = {
  68                 {  66, 0x0 },
  69                 { 100, 0x2 },
  70                 { 133, 0x1 },
  71                 {   0, 0xff}
  72         };
  73
  74         u32     msr_lo, msr_tmp;
  75         int     i = 0, j = 0;
  76
  77         /* read MSR 0x2a - we only need the low 32 bits */
  78         rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_tmp);
  79         dprintk(KERN_DEBUG "speedstep-lib: P3 - MSR_IA32_EBL_CR_POWERON: 0x%x 0x%x\n", msr_lo, msr_tmp);
  80         msr_tmp = msr_lo;
  81
  82         /* decode the FSB */
  83         msr_tmp &= 0x00c0000;
  84         msr_tmp >>= 18;
  85         while (msr_tmp != msr_decode_fsb[i].bitmap) {
  86                 if (msr_decode_fsb[i].bitmap == 0xff)
  87                         return 0;
  88                 i++;
  89         }
  90
  91         /* decode the multiplier */
  92         if (processor == SPEEDSTEP_PROCESSOR_PIII_C_EARLY)
  93                 msr_lo &= 0x03c00000;
  94         else
  95                 msr_lo &= 0x0bc00000;
  96         msr_lo >>= 22;
  97         while (msr_lo != msr_decode_mult[j].bitmap) {
  98                 if (msr_decode_mult[j].bitmap == 0xff)
  99                         return 0;
 100                 j++;
 101         }
 102
 103         return (msr_decode_mult[j].ratio * msr_decode_fsb[i].value * 100);
 104 }
 105
 106
 107 static unsigned int pentium4_get_frequency(void)
 108 {
 109         struct cpuinfo_x86 *c = &boot_cpu_data;
 110         u32 msr_lo, msr_hi, mult;
 111         unsigned int fsb = 0;
 112
 113         rdmsr(0x2c, msr_lo, msr_hi);
 114
 115         dprintk(KERN_DEBUG "speedstep-lib: P4 - MSR_EBC_FREQUENCY_ID: 0x%x 0x%x\n", msr_lo, msr_hi);
 116
 117         /* decode the FSB: see IA-32 Intel (C) Architecture Software
 118          * Developer's Manual, Volume 3: System Prgramming Guide,
 119          * revision #12 in Table B-1: MSRs in the Pentium 4 and
 120          * Intel Xeon Processors, on page B-4 and B-5.
 121          */
 122         if (c->x86_model < 2)
 123                 fsb = 100 * 1000;
 124         else {
 125                 u8 fsb_code = (msr_lo >> 16) & 0x7;
 126                 switch (fsb_code) {
 127                 case 0:
 128                         fsb = 100 * 1000;
 129                         break;
 130                 case 1:
 131                         fsb = 13333 * 10;
 132                         break;
 133                 case 2:
 134                         fsb = 200 * 1000;
 135                         break;
 136                 }
 137         }
 138
 139         if (!fsb)
 140                 printk(KERN_DEBUG "speedstep-lib: couldn't detect FSB speed. Please send an e-mail to <linux@brodo.de>\n");
 141
 142         /* Multiplier. */
 143         mult = msr_lo >> 24;
 144
 145         dprintk(KERN_DEBUG "speedstep-lib: P4 - FSB %u kHz; Multiplier %u\n", fsb, mult);
 146
 147         return (fsb * mult);
 148 }
 149
 150
 151 unsigned int speedstep_get_processor_frequency(unsigned int processor)
 152 {
 153         switch (processor) {
 154         case SPEEDSTEP_PROCESSOR_P4M:
 155                 return pentium4_get_frequency();
 156         case SPEEDSTEP_PROCESSOR_PIII_T:
 157         case SPEEDSTEP_PROCESSOR_PIII_C:
 158         case SPEEDSTEP_PROCESSOR_PIII_C_EARLY:
 159                 return pentium3_get_frequency(processor);
 160         default:
 161                 return 0;
 162         };
 163         return 0;
 164 }
 165 EXPORT_SYMBOL_GPL(speedstep_get_processor_frequency);
 166
 167
 168 /*********************************************************************
 169  *                 DETECT SPEEDSTEP-CAPABLE PROCESSOR                *
 170  *********************************************************************/
 171
 172 unsigned int speedstep_detect_processor (void)
 173 {
 174         struct cpuinfo_x86 *c = cpu_data;
 175         u32                     ebx, msr_lo, msr_hi;
 176
 177         if ((c->x86_vendor != X86_VENDOR_INTEL) ||
 178             ((c->x86 != 6) && (c->x86 != 0xF)))
 179                 return 0;
 180
 181         if (c->x86 == 0xF) {
 182                 /* Intel Mobile Pentium 4-M
 183                  * or Intel Mobile Pentium 4 with 533 MHz FSB */
 184                 if (c->x86_model != 2)
 185                         return 0;
 186
 187                 if ((c->x86_mask != 4) && /* B-stepping [M-P4-M] */
 188                         (c->x86_mask != 7) && /* C-stepping [M-P4-M] */
 189                         (c->x86_mask != 9))   /* D-stepping [M-P4-M or M-P4/533] */
 190                         return 0;
 191
 192                 ebx = cpuid_ebx(0x00000001);
 193                 ebx &= 0x000000FF;
 194                 if ((ebx != 0x0e) && (ebx != 0x0f))
 195                         return 0;
 196
 197                 return SPEEDSTEP_PROCESSOR_P4M;
 198         }
 199
 200         switch (c->x86_model) {
 201         case 0x0B: /* Intel PIII [Tualatin] */
 202                 /* cpuid_ebx(1) is 0x04 for desktop PIII,
 203                                    0x06 for mobile PIII-M */
 204                 ebx = cpuid_ebx(0x00000001);
 205
 206                 ebx &= 0x000000FF;
 207                 if (ebx != 0x06)
 208                         return 0;
 209
 210                 /* So far all PIII-M processors support SpeedStep. See
 211                  * Intel's 24540640.pdf of June 2003
 212                  */
 213
 214                 return SPEEDSTEP_PROCESSOR_PIII_T;
 215
 216         case 0x08: /* Intel PIII [Coppermine] */
 217
 218                 /* all mobile PIII Coppermines have FSB 100 MHz
 219                  * ==> sort out a few desktop PIIIs. */
 220                 rdmsr(MSR_IA32_EBL_CR_POWERON, msr_lo, msr_hi);
 221                 dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_EBL_CR_POWERON is 0x%x, 0x%x\n", msr_lo, msr_hi);
 222                 msr_lo &= 0x00c0000;
 223                 if (msr_lo != 0x0080000)
 224                         return 0;
 225
 226                 /*
 227                  * If the processor is a mobile version,
 228                  * platform ID has bit 50 set
 229                  * it has SpeedStep technology if either
 230                  * bit 56 or 57 is set
 231                  */
 232                 rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
 233                 dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
 234                 if ((msr_hi & (1<<18)) && (msr_hi & (3<<24))) {
 235                         if (c->x86_mask == 0x01)
 236                                 return SPEEDSTEP_PROCESSOR_PIII_C_EARLY;
 237                         else
 238                                 return SPEEDSTEP_PROCESSOR_PIII_C;
 239                 }
 240
 241         default:
 242                 return 0;
 243         }
 244 }
 245 EXPORT_SYMBOL_GPL(speedstep_detect_processor);
 246
 247
 248 /*********************************************************************
 249  *                     DETECT SPEEDSTEP SPEEDS                       *
 250  *********************************************************************/
 251
 252 unsigned int speedstep_get_freqs(unsigned int processor,
 253                                   unsigned int *low_speed,
 254                                   unsigned int *high_speed,
 255                                   void (*set_state) (unsigned int state,
 256                                                      unsigned int notify)
 257                                  )
 258 {
 259         unsigned int prev_speed;
 260         unsigned int ret = 0;
 261         unsigned long flags;
 262
 263         if ((!processor) || (!low_speed) || (!high_speed) || (!set_state))
 264                 return -EINVAL;
 265
 266         /* get current speed */
 267         prev_speed = speedstep_get_processor_frequency(processor);
 268         if (!prev_speed)
 269                 return -EIO;
 270
 271         local_irq_save(flags);
 272
 273         /* switch to low state */
 274         set_state(SPEEDSTEP_LOW, 0);
 275         *low_speed = speedstep_get_processor_frequency(processor);
 276         if (!*low_speed) {
 277                 ret = -EIO;
 278                 goto out;
 279         }
 280
 281         /* switch to high state */
 282         set_state(SPEEDSTEP_HIGH, 0);
 283         *high_speed = speedstep_get_processor_frequency(processor);
 284         if (!*high_speed) {
 285                 ret = -EIO;
 286                 goto out;
 287         }
 288
 289         if (*low_speed == *high_speed) {
 290                 ret = -ENODEV;
 291                 goto out;
 292         }
 293
 294         /* switch to previous state, if necessary */
 295         if (*high_speed != prev_speed)
 296                 set_state(SPEEDSTEP_LOW, 0);
 297
 298  out:
 299         local_irq_restore(flags);
 300         return (ret);
 301 }
 302 EXPORT_SYMBOL_GPL(speedstep_get_freqs);
 303
 304 MODULE_AUTHOR ("Dominik Brodowski <linux@brodo.de>");
 305 MODULE_DESCRIPTION ("Library for Intel SpeedStep 1 or 2 cpufreq drivers.");
 306 MODULE_LICENSE ("GPL");