2 * Dynamic DMA mapping support.
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 * Copyright (C) 2005 Keir Fraser <keir@xensource.com>
11 * 08/12/11 beckyb Add highmem support
14 #include <linux/cache.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/spinlock.h>
19 #include <linux/string.h>
20 #include <linux/swiotlb.h>
21 #include <linux/pfn.h>
22 #include <linux/types.h>
23 #include <linux/ctype.h>
24 #include <linux/init.h>
25 #include <linux/bootmem.h>
26 #include <linux/iommu-helper.h>
27 #include <linux/highmem.h>
28 #include <linux/gfp.h>
33 #include <asm/uaccess.h>
34 #include <xen/gnttab.h>
35 #include <xen/interface/memory.h>
36 #include <asm/gnttab_dma.h>
38 #define OFFSET(val,align) ((unsigned long)((val) & ( (align) - 1)))
44 * Used to do a quick range check in swiotlb_tbl_unmap_single and
45 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
48 static char *io_tlb_start, *io_tlb_end;
51 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
52 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
54 static unsigned long io_tlb_nslabs;
57 * When the IOMMU overflows we return a fallback buffer. This sets the size.
59 static unsigned long io_tlb_overflow = 32*1024;
61 static void *io_tlb_overflow_buffer;
64 * This is a free list describing the number of free entries available from
67 static unsigned int *io_tlb_list;
68 static unsigned int io_tlb_index;
71 * We need to save away the original address corresponding to a mapped entry
72 * for the sync operations.
74 static phys_addr_t *io_tlb_orig_addr;
77 * Protect the above data structures in the map and unmap calls
79 static DEFINE_SPINLOCK(io_tlb_lock);
81 static unsigned int dma_bits;
82 static unsigned int __initdata max_dma_bits = 32;
84 setup_dma_bits(char *str)
86 max_dma_bits = simple_strtoul(str, NULL, 0);
89 __setup("dma_bits=", setup_dma_bits);
92 setup_io_tlb_npages(char *str)
94 /* Unlike ia64, the size is aperture in megabytes, not 'slabs'! */
96 io_tlb_nslabs = simple_strtoul(str, &str, 0) <<
98 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
103 * NB. 'force' enables the swiotlb, but doesn't force its use for
104 * every DMA like it does on native Linux. 'off' forcibly disables
105 * use of the swiotlb.
107 if (!strcmp(str, "force"))
109 else if (!strcmp(str, "off"))
114 __setup("swiotlb=", setup_io_tlb_npages);
115 /* make io_tlb_overflow tunable too? */
117 /* Note that this doesn't work with highmem page */
118 static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
119 volatile void *address)
121 return phys_to_dma(hwdev, virt_to_phys(address));
124 void swiotlb_print_info(void)
126 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
128 printk(KERN_INFO "Software IO TLB enabled: \n"
129 " Aperture: %lu megabytes\n"
130 " Address size: %u bits\n"
131 " Kernel range: %p - %p\n",
132 bytes >> 20, dma_bits,
133 io_tlb_start, io_tlb_end);
136 void __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
138 unsigned long i, bytes;
141 bytes = nslabs << IO_TLB_SHIFT;
143 io_tlb_nslabs = nslabs;
145 dma_bits = get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT) + PAGE_SHIFT;
146 for (nslabs = 0; nslabs < io_tlb_nslabs; nslabs += IO_TLB_SEGSIZE) {
148 rc = xen_create_contiguous_region(
149 (unsigned long)io_tlb_start + (nslabs << IO_TLB_SHIFT),
150 get_order(IO_TLB_SEGSIZE << IO_TLB_SHIFT),
152 } while (rc && dma_bits++ < max_dma_bits);
155 panic("No suitable physical memory available for SWIOTLB buffer!\n"
156 "Use dom0_mem Xen boot parameter to reserve\n"
157 "some DMA memory (e.g., dom0_mem=-128M).\n");
158 io_tlb_nslabs = nslabs;
159 i = nslabs << IO_TLB_SHIFT;
160 free_bootmem(__pa(io_tlb_start + i), bytes - i);
162 for (dma_bits = 0; i > 0; i -= IO_TLB_SEGSIZE << IO_TLB_SHIFT) {
163 unsigned int bits = fls64(virt_to_bus(io_tlb_start + i - 1));
171 io_tlb_end = io_tlb_start + bytes;
174 * Allocate and initialize the free list array. This array is used
175 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE.
177 io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
178 for (i = 0; i < io_tlb_nslabs; i++)
179 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
181 io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
184 * Get the overflow emergency buffer
186 io_tlb_overflow_buffer = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_overflow));
187 if (!io_tlb_overflow_buffer)
188 panic("Cannot allocate SWIOTLB overflow buffer!\n");
191 rc = xen_create_contiguous_region(
192 (unsigned long)io_tlb_overflow_buffer,
193 get_order(io_tlb_overflow),
195 } while (rc && dma_bits++ < max_dma_bits);
197 panic("No suitable physical memory available for SWIOTLB overflow buffer!\n");
199 swiotlb_print_info();
203 * Statically reserve bounce buffer space and initialize bounce buffer data
204 * structures for the software IO TLB used to implement the DMA API.
207 swiotlb_init_with_default_size(size_t default_size, int verbose)
211 if (!io_tlb_nslabs) {
212 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
213 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
216 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
219 * Get IO TLB memory from the low pages
221 io_tlb_start = alloc_bootmem_pages(PAGE_ALIGN(bytes));
223 panic("Cannot allocate SWIOTLB buffer");
225 swiotlb_init_with_tbl(io_tlb_start, io_tlb_nslabs, verbose);
229 swiotlb_init(int verbose)
231 unsigned long ram_end;
232 size_t defsz = 64 << 20; /* 64MB default size */
234 if (swiotlb_force == 1) {
236 } else if ((swiotlb_force != -1) &&
237 is_running_on_xen() &&
238 is_initial_xendomain()) {
239 /* Domain 0 always has a swiotlb. */
240 ram_end = HYPERVISOR_memory_op(XENMEM_maximum_ram_page, NULL);
241 if (ram_end <= 0x1ffff)
242 defsz = 2 << 20; /* 2MB on <512MB systems. */
243 else if (ram_end <= 0x3ffff)
244 defsz = 4 << 20; /* 4MB on <1GB systems. */
245 else if (ram_end <= 0x7ffff)
246 defsz = 8 << 20; /* 8MB on <2GB systems. */
251 swiotlb_init_with_default_size(defsz, verbose);
253 printk(KERN_INFO "Software IO TLB disabled\n");
256 static inline int range_needs_mapping(phys_addr_t pa, size_t size)
258 return range_straddles_page_boundary(pa, size);
261 static int is_swiotlb_buffer(dma_addr_t addr)
263 unsigned long pfn = mfn_to_local_pfn(PFN_DOWN(addr));
264 phys_addr_t paddr = (phys_addr_t)pfn << PAGE_SHIFT;
266 return paddr >= virt_to_phys(io_tlb_start) &&
267 paddr < virt_to_phys(io_tlb_end);
271 * Bounce: copy the swiotlb buffer back to the original dma location
273 * We use __copy_to_user_inatomic to transfer to the host buffer because the
274 * buffer may be mapped read-only (e.g, in blkback driver) but lower-level
275 * drivers map the buffer for DMA_BIDIRECTIONAL access. This causes an
276 * unnecessary copy from the aperture to the host buffer, and a page fault.
278 void swiotlb_bounce(phys_addr_t phys, char *dma_addr, size_t size,
279 enum dma_data_direction dir)
281 unsigned long pfn = PFN_DOWN(phys);
283 if (PageHighMem(pfn_to_page(pfn))) {
284 /* The buffer does not have a mapping. Map it in and copy */
285 unsigned int offset = phys & ~PAGE_MASK;
291 sz = min_t(size_t, PAGE_SIZE - offset, size);
293 local_irq_save(flags);
294 buffer = kmap_atomic(pfn_to_page(pfn),
296 if (dir == DMA_TO_DEVICE)
297 memcpy(dma_addr, buffer + offset, sz);
298 else if (__copy_to_user_inatomic(buffer + offset,
301 kunmap_atomic(buffer, KM_BOUNCE_READ);
302 local_irq_restore(flags);
310 if (dir == DMA_TO_DEVICE)
311 memcpy(dma_addr, phys_to_virt(phys), size);
312 else if (__copy_to_user_inatomic(phys_to_virt(phys),
317 EXPORT_SYMBOL_GPL(swiotlb_bounce);
319 void *swiotlb_tbl_map_single(struct device *hwdev, dma_addr_t tbl_dma_addr,
320 phys_addr_t phys, size_t size,
321 enum dma_data_direction dir)
325 unsigned int nslots, stride, index, wrap;
328 unsigned long offset_slots;
329 unsigned long max_slots;
331 mask = dma_get_seg_boundary(hwdev);
332 offset_slots = -IO_TLB_SEGSIZE;
335 * Carefully handle integer overflow which can occur when mask == ~0UL.
338 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
339 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
342 * For mappings greater than a page, we limit the stride (and
343 * hence alignment) to a page size.
345 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
346 if (size > PAGE_SIZE)
347 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
354 * Find suitable number of IO TLB entries size that will fit this
355 * request and allocate a buffer from that IO TLB pool.
357 spin_lock_irqsave(&io_tlb_lock, flags);
358 index = ALIGN(io_tlb_index, stride);
359 if (index >= io_tlb_nslabs)
364 while (iommu_is_span_boundary(index, nslots, offset_slots,
367 if (index >= io_tlb_nslabs)
374 * If we find a slot that indicates we have 'nslots' number of
375 * contiguous buffers, we allocate the buffers from that slot
376 * and mark the entries as '0' indicating unavailable.
378 if (io_tlb_list[index] >= nslots) {
381 for (i = index; i < (int) (index + nslots); i++)
383 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
384 io_tlb_list[i] = ++count;
385 dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
388 * Update the indices to avoid searching in the next
391 io_tlb_index = ((index + nslots) < io_tlb_nslabs
392 ? (index + nslots) : 0);
397 if (index >= io_tlb_nslabs)
399 } while (index != wrap);
402 spin_unlock_irqrestore(&io_tlb_lock, flags);
405 spin_unlock_irqrestore(&io_tlb_lock, flags);
408 * Save away the mapping from the original address to the DMA address.
409 * This is needed when we sync the memory. Then we sync the buffer if
412 for (i = 0; i < nslots; i++)
413 io_tlb_orig_addr[index+i] = phys + (i << IO_TLB_SHIFT);
414 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
415 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
419 EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
422 * Allocates bounce buffer and returns its kernel virtual address.
426 map_single(struct device *hwdev, phys_addr_t phys, size_t size,
427 enum dma_data_direction dir)
429 dma_addr_t start_dma_addr = swiotlb_virt_to_bus(hwdev, io_tlb_start);
431 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
435 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
438 swiotlb_tbl_unmap_single(struct device *hwdev, char *dma_addr, size_t size,
439 enum dma_data_direction dir)
442 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
443 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
444 phys_addr_t phys = io_tlb_orig_addr[index];
447 * First, sync the memory before unmapping the entry
449 if (phys && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
450 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
453 * Return the buffer to the free list by setting the corresponding
454 * entries to indicate the number of contiguous entries available.
455 * While returning the entries to the free list, we merge the entries
456 * with slots below and above the pool being returned.
458 spin_lock_irqsave(&io_tlb_lock, flags);
460 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
461 io_tlb_list[index + nslots] : 0);
463 * Step 1: return the slots to the free list, merging the
464 * slots with superceeding slots
466 for (i = index + nslots - 1; i >= index; i--)
467 io_tlb_list[i] = ++count;
469 * Step 2: merge the returned slots with the preceding slots,
470 * if available (non zero)
473 (OFFSET(i, IO_TLB_SEGSIZE) !=
474 IO_TLB_SEGSIZE -1) && io_tlb_list[i];
476 io_tlb_list[i] = ++count;
478 spin_unlock_irqrestore(&io_tlb_lock, flags);
480 EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
483 swiotlb_tbl_sync_single(struct device *hwdev, char *dma_addr, size_t size,
484 enum dma_data_direction dir,
485 enum dma_sync_target target)
487 int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
488 phys_addr_t phys = io_tlb_orig_addr[index];
490 phys += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
494 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
495 swiotlb_bounce(phys, dma_addr, size, DMA_FROM_DEVICE);
497 BUG_ON(dir != DMA_TO_DEVICE);
499 case SYNC_FOR_DEVICE:
500 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
501 swiotlb_bounce(phys, dma_addr, size, DMA_TO_DEVICE);
503 BUG_ON(dir != DMA_FROM_DEVICE);
509 EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
512 swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
516 * Ran out of IOMMU space for this operation. This is very bad.
517 * Unfortunately the drivers cannot handle this operation properly.
518 * unless they check for pci_dma_mapping_error (most don't)
519 * When the mapping is small enough return a static buffer to limit
520 * the damage, or panic when the transfer is too big.
522 printk(KERN_ERR "PCI-DMA: Out of SW-IOMMU space for %zu bytes at "
523 "device %s\n", size, dev ? dev_name(dev) : "?");
525 if (size <= io_tlb_overflow || !do_panic)
528 if (dir == DMA_BIDIRECTIONAL)
529 panic("DMA: Random memory could be DMA accessed\n");
530 if (dir == DMA_FROM_DEVICE)
531 panic("DMA: Random memory could be DMA written\n");
532 if (dir == DMA_TO_DEVICE)
533 panic("DMA: Random memory could be DMA read\n");
537 * Map a single buffer of the indicated size for DMA in streaming mode. The
538 * PCI address to use is returned.
540 * Once the device is given the dma address, the device owns this memory until
541 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
543 dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
544 unsigned long offset, size_t size,
545 enum dma_data_direction dir,
546 struct dma_attrs *attrs)
548 phys_addr_t phys = page_to_pseudophys(page) + offset;
549 dma_addr_t dev_addr = gnttab_dma_map_page(page) + offset;
552 BUG_ON(dir == DMA_NONE);
555 * If the address happens to be in the device's DMA window,
556 * we can safely return the device addr and not worry about bounce
559 if (dma_capable(dev, dev_addr, size) &&
560 !range_needs_mapping(phys, size))
564 * Oh well, have to allocate and map a bounce buffer.
566 gnttab_dma_unmap_page(dev_addr);
567 map = map_single(dev, phys, size, dir);
569 swiotlb_full(dev, size, dir, 1);
570 map = io_tlb_overflow_buffer;
573 dev_addr = swiotlb_virt_to_bus(dev, map);
576 EXPORT_SYMBOL_GPL(swiotlb_map_page);
579 * Unmap a single streaming mode DMA translation. The dma_addr and size must
580 * match what was provided for in a previous swiotlb_map_page call. All
581 * other usages are undefined.
583 * After this call, reads by the cpu to the buffer are guaranteed to see
584 * whatever the device wrote there.
586 static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
587 size_t size, enum dma_data_direction dir)
589 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
591 BUG_ON(dir == DMA_NONE);
593 if (is_swiotlb_buffer(dev_addr)) {
594 swiotlb_tbl_unmap_single(hwdev, phys_to_virt(paddr), size, dir);
598 gnttab_dma_unmap_page(dev_addr);
601 void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
602 size_t size, enum dma_data_direction dir,
603 struct dma_attrs *attrs)
605 unmap_single(hwdev, dev_addr, size, dir);
607 EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
610 * Make physical memory consistent for a single streaming mode DMA translation
613 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
614 * using the cpu, yet do not wish to teardown the PCI dma mapping, you must
615 * call this function before doing so. At the next point you give the PCI dma
616 * address back to the card, you must first perform a
617 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
620 swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
621 size_t size, enum dma_data_direction dir,
622 enum dma_sync_target target)
624 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
626 BUG_ON(dir == DMA_NONE);
628 if (is_swiotlb_buffer(dev_addr))
629 swiotlb_tbl_sync_single(hwdev, phys_to_virt(paddr), size, dir,
634 swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
635 size_t size, enum dma_data_direction dir)
637 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
639 EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
642 swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
643 size_t size, enum dma_data_direction dir)
645 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
647 EXPORT_SYMBOL(swiotlb_sync_single_for_device);
650 * Map a set of buffers described by scatterlist in streaming mode for DMA.
651 * This is the scatter-gather version of the above swiotlb_map_page
652 * interface. Here the scatter gather list elements are each tagged with the
653 * appropriate dma address and length. They are obtained via
654 * sg_dma_{address,length}(SG).
656 * NOTE: An implementation may be able to use a smaller number of
657 * DMA address/length pairs than there are SG table elements.
658 * (for example via virtual mapping capabilities)
659 * The routine returns the number of addr/length pairs actually
660 * used, at most nents.
662 * Device ownership issues as mentioned above for swiotlb_map_page are the
666 swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
667 enum dma_data_direction dir, struct dma_attrs *attrs)
669 struct scatterlist *sg;
672 BUG_ON(dir == DMA_NONE);
674 for_each_sg(sgl, sg, nelems, i) {
675 dma_addr_t dev_addr = gnttab_dma_map_page(sg_page(sg))
677 phys_addr_t paddr = page_to_pseudophys(sg_page(sg))
680 if (range_needs_mapping(paddr, sg->length) ||
681 !dma_capable(hwdev, dev_addr, sg->length)) {
684 gnttab_dma_unmap_page(dev_addr);
685 map = map_single(hwdev, paddr,
688 /* Don't panic here, we expect map_sg users
689 to do proper error handling. */
690 swiotlb_full(hwdev, sg->length, dir, 0);
691 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
693 sgl[0].dma_length = 0;
696 sg->dma_address = swiotlb_virt_to_bus(hwdev, map);
698 sg->dma_address = dev_addr;
699 sg->dma_length = sg->length;
703 EXPORT_SYMBOL(swiotlb_map_sg_attrs);
706 swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
707 enum dma_data_direction dir)
709 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
711 EXPORT_SYMBOL(swiotlb_map_sg);
714 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
715 * concerning calls here are the same as for swiotlb_unmap_page() above.
718 swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
719 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
721 struct scatterlist *sg;
724 BUG_ON(dir == DMA_NONE);
726 for_each_sg(sgl, sg, nelems, i)
727 unmap_single(hwdev, sg->dma_address, sg->dma_length, dir);
730 EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
733 swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
734 enum dma_data_direction dir)
736 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
738 EXPORT_SYMBOL(swiotlb_unmap_sg);
741 * Make physical memory consistent for a set of streaming mode DMA translations
744 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
748 swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
749 int nelems, enum dma_data_direction dir,
750 enum dma_sync_target target)
752 struct scatterlist *sg;
755 for_each_sg(sgl, sg, nelems, i)
756 swiotlb_sync_single(hwdev, sg->dma_address,
757 sg->dma_length, dir, target);
761 swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
762 int nelems, enum dma_data_direction dir)
764 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
766 EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
769 swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
770 int nelems, enum dma_data_direction dir)
772 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
774 EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
777 swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
779 return (dma_addr == swiotlb_virt_to_bus(hwdev, io_tlb_overflow_buffer));
781 EXPORT_SYMBOL(swiotlb_dma_mapping_error);
784 * Return whether the given PCI device DMA address mask can be supported
785 * properly. For example, if your device can only drive the low 24-bits
786 * during PCI bus mastering, then you would pass 0x00ffffff as the mask to
790 swiotlb_dma_supported (struct device *hwdev, u64 mask)
792 return (mask >= ((1UL << dma_bits) - 1));
794 EXPORT_SYMBOL(swiotlb_dma_supported);