arch/x86/mm/pageattr-xen.c

   1 /*
   2  * Copyright 2002 Andi Kleen, SuSE Labs.
   3  * Thanks to Ben LaHaise for precious feedback.
   4  */
   5 #include <linux/highmem.h>
   6 #include <linux/bootmem.h>
   7 #include <linux/module.h>
   8 #include <linux/sched.h>
   9 #include <linux/mm.h>
  10 #include <linux/interrupt.h>
  11 #include <linux/seq_file.h>
  12 #include <linux/debugfs.h>
  13 #include <linux/pfn.h>
  14 #include <linux/percpu.h>
  15 #include <linux/gfp.h>
  16 #include <linux/pci.h>
  17
  18 #include <asm/e820.h>
  19 #include <asm/processor.h>
  20 #include <asm/tlbflush.h>
  21 #include <asm/sections.h>
  22 #include <asm/setup.h>
  23 #include <asm/uaccess.h>
  24 #include <asm/pgalloc.h>
  25 #include <asm/proto.h>
  26 #include <asm/pat.h>
  27
  28 /*
  29  * The current flushing context - we pass it instead of 5 arguments:
  30  */
  31 struct cpa_data {
  32         unsigned long   *vaddr;
  33         pgprot_t        mask_set;
  34         pgprot_t        mask_clr;
  35         int             numpages;
  36         int             flags;
  37         unsigned long   pfn;
  38         unsigned        force_split : 1;
  39         int             curpage;
  40         struct page     **pages;
  41 };
  42
  43 /*
  44  * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
  45  * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
  46  * entries change the page attribute in parallel to some other cpu
  47  * splitting a large page entry along with changing the attribute.
  48  */
  49 static DEFINE_SPINLOCK(cpa_lock);
  50
  51 #define CPA_FLUSHTLB 1
  52 #define CPA_ARRAY 2
  53 #define CPA_PAGES_ARRAY 4
  54
  55 #ifdef CONFIG_PROC_FS
  56 static unsigned long direct_pages_count[PG_LEVEL_NUM];
  57
  58 void update_page_count(int level, unsigned long pages)
  59 {
  60         /* Protect against CPA */
  61         spin_lock(&pgd_lock);
  62         direct_pages_count[level] += pages;
  63         spin_unlock(&pgd_lock);
  64 }
  65
  66 static void split_page_count(int level)
  67 {
  68         direct_pages_count[level]--;
  69         direct_pages_count[level - 1] += PTRS_PER_PTE;
  70 }
  71
  72 void arch_report_meminfo(struct seq_file *m)
  73 {
  74         seq_printf(m, "DirectMap4k:    %8lu kB\n",
  75                         direct_pages_count[PG_LEVEL_4K] << 2);
  76 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
  77         seq_printf(m, "DirectMap2M:    %8lu kB\n",
  78                         direct_pages_count[PG_LEVEL_2M] << 11);
  79 #else
  80         seq_printf(m, "DirectMap4M:    %8lu kB\n",
  81                         direct_pages_count[PG_LEVEL_2M] << 12);
  82 #endif
  83 #ifdef CONFIG_X86_64
  84         if (direct_gbpages)
  85                 seq_printf(m, "DirectMap1G:    %8lu kB\n",
  86                         direct_pages_count[PG_LEVEL_1G] << 20);
  87 #endif
  88 }
  89 #else
  90 static inline void split_page_count(int level) { }
  91 #endif
  92
  93 #ifdef CONFIG_X86_64
  94
  95 static inline unsigned long highmap_start_pfn(void)
  96 {
  97         return __pa(_text) >> PAGE_SHIFT;
  98 }
  99
 100 static inline unsigned long highmap_end_pfn(void)
 101 {
 102         return __pa(roundup(_brk_end, PMD_SIZE)) >> PAGE_SHIFT;
 103 }
 104
 105 #endif
 106
 107 #ifdef CONFIG_DEBUG_PAGEALLOC
 108 # define debug_pagealloc 1
 109 #else
 110 # define debug_pagealloc 0
 111 #endif
 112
 113 static inline int
 114 within(unsigned long addr, unsigned long start, unsigned long end)
 115 {
 116         return addr >= start && addr < end;
 117 }
 118
 119 /*
 120  * Flushing functions
 121  */
 122
 123 /**
 124  * clflush_cache_range - flush a cache range with clflush
 125  * @addr:       virtual start address
 126  * @size:       number of bytes to flush
 127  *
 128  * clflush is an unordered instruction which needs fencing with mfence
 129  * to avoid ordering issues.
 130  */
 131 void clflush_cache_range(void *vaddr, unsigned int size)
 132 {
 133         void *vend = vaddr + size - 1;
 134
 135         mb();
 136
 137         for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
 138                 clflush(vaddr);
 139         /*
 140          * Flush any possible final partial cacheline:
 141          */
 142         clflush(vend);
 143
 144         mb();
 145 }
 146 EXPORT_SYMBOL_GPL(clflush_cache_range);
 147
 148 static void __cpa_flush_all(void *arg)
 149 {
 150         unsigned long cache = (unsigned long)arg;
 151
 152         /*
 153          * Flush all to work around Errata in early athlons regarding
 154          * large page flushing.
 155          */
 156         __flush_tlb_all();
 157
 158         if (cache && boot_cpu_data.x86 >= 4)
 159                 wbinvd();
 160 }
 161
 162 static void cpa_flush_all(unsigned long cache)
 163 {
 164         BUG_ON(irqs_disabled());
 165
 166         on_each_cpu(__cpa_flush_all, (void *) cache, 1);
 167 }
 168
 169 static void __cpa_flush_range(void *arg)
 170 {
 171         /*
 172          * We could optimize that further and do individual per page
 173          * tlb invalidates for a low number of pages. Caveat: we must
 174          * flush the high aliases on 64bit as well.
 175          */
 176         __flush_tlb_all();
 177 }
 178
 179 static void cpa_flush_range(unsigned long start, int numpages, int cache)
 180 {
 181         unsigned int i, level;
 182         unsigned long addr;
 183
 184         BUG_ON(irqs_disabled());
 185         WARN_ON(PAGE_ALIGN(start) != start);
 186
 187         on_each_cpu(__cpa_flush_range, NULL, 1);
 188
 189         if (!cache)
 190                 return;
 191
 192         /*
 193          * We only need to flush on one CPU,
 194          * clflush is a MESI-coherent instruction that
 195          * will cause all other CPUs to flush the same
 196          * cachelines:
 197          */
 198         for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
 199                 pte_t *pte = lookup_address(addr, &level);
 200
 201                 /*
 202                  * Only flush present addresses:
 203                  */
 204                 if (pte && (__pte_val(*pte) & _PAGE_PRESENT))
 205                         clflush_cache_range((void *) addr, PAGE_SIZE);
 206         }
 207 }
 208
 209 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
 210                             int in_flags, struct page **pages)
 211 {
 212         unsigned int i, level;
 213         unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
 214
 215         BUG_ON(irqs_disabled());
 216
 217         on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
 218
 219         if (!cache || do_wbinvd)
 220                 return;
 221
 222         /*
 223          * We only need to flush on one CPU,
 224          * clflush is a MESI-coherent instruction that
 225          * will cause all other CPUs to flush the same
 226          * cachelines:
 227          */
 228         for (i = 0; i < numpages; i++) {
 229                 unsigned long addr;
 230                 pte_t *pte;
 231
 232                 if (in_flags & CPA_PAGES_ARRAY)
 233                         addr = (unsigned long)page_address(pages[i]);
 234                 else
 235                         addr = start[i];
 236
 237                 pte = lookup_address(addr, &level);
 238
 239                 /*
 240                  * Only flush present addresses:
 241                  */
 242                 if (pte && (__pte_val(*pte) & _PAGE_PRESENT))
 243                         clflush_cache_range((void *)addr, PAGE_SIZE);
 244         }
 245 }
 246
 247 /*
 248  * Certain areas of memory on x86 require very specific protection flags,
 249  * for example the BIOS area or kernel text. Callers don't always get this
 250  * right (again, ioremap() on BIOS memory is not uncommon) so this function
 251  * checks and fixes these known static required protection bits.
 252  */
 253 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
 254                                    unsigned long pfn)
 255 {
 256         pgprot_t forbidden = __pgprot(0);
 257
 258         /*
 259          * The BIOS area between 640k and 1Mb needs to be executable for
 260          * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
 261          */
 262 #ifdef CONFIG_PCI_BIOS
 263         if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
 264                 pgprot_val(forbidden) |= _PAGE_NX;
 265 #endif
 266
 267         /*
 268          * The kernel text needs to be executable for obvious reasons
 269          * Does not cover __inittext since that is gone later on. On
 270          * 64bit we do not enforce !NX on the low mapping
 271          */
 272         if (within(address, (unsigned long)_text, (unsigned long)_etext))
 273                 pgprot_val(forbidden) |= _PAGE_NX;
 274
 275         /*
 276          * The .rodata section needs to be read-only. Using the pfn
 277          * catches all aliases.
 278          */
 279         if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
 280                    __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
 281                 pgprot_val(forbidden) |= _PAGE_RW;
 282
 283 #if defined(CONFIG_X86_64) && defined(CONFIG_DEBUG_RODATA) && !defined(CONFIG_XEN)
 284         /*
 285          * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
 286          * kernel text mappings for the large page aligned text, rodata sections
 287          * will be always read-only. For the kernel identity mappings covering
 288          * the holes caused by this alignment can be anything that user asks.
 289          *
 290          * This will preserve the large page mappings for kernel text/data
 291          * at no extra cost.
 292          */
 293         if (kernel_set_to_readonly &&
 294             within(address, (unsigned long)_text,
 295                    (unsigned long)__end_rodata_hpage_align)) {
 296                 unsigned int level;
 297
 298                 /*
 299                  * Don't enforce the !RW mapping for the kernel text mapping,
 300                  * if the current mapping is already using small page mapping.
 301                  * No need to work hard to preserve large page mappings in this
 302                  * case.
 303                  *
 304                  * This also fixes the Linux Xen paravirt guest boot failure
 305                  * (because of unexpected read-only mappings for kernel identity
 306                  * mappings). In this paravirt guest case, the kernel text
 307                  * mapping and the kernel identity mapping share the same
 308                  * page-table pages. Thus we can't really use different
 309                  * protections for the kernel text and identity mappings. Also,
 310                  * these shared mappings are made of small page mappings.
 311                  * Thus this don't enforce !RW mapping for small page kernel
 312                  * text mapping logic will help Linux Xen parvirt guest boot
 313                  * as well.
 314                  */
 315                 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
 316                         pgprot_val(forbidden) |= _PAGE_RW;
 317         }
 318 #endif
 319
 320         prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
 321
 322         return prot;
 323 }
 324
 325 /*
 326  * Lookup the page table entry for a virtual address. Return a pointer
 327  * to the entry and the level of the mapping.
 328  *
 329  * Note: We return pud and pmd either when the entry is marked large
 330  * or when the present bit is not set. Otherwise we would return a
 331  * pointer to a nonexisting mapping.
 332  */
 333 pte_t *lookup_address(unsigned long address, unsigned int *level)
 334 {
 335         pgd_t *pgd = pgd_offset_k(address);
 336         pud_t *pud;
 337         pmd_t *pmd;
 338
 339         *level = PG_LEVEL_NONE;
 340
 341         if (pgd_none(*pgd))
 342                 return NULL;
 343
 344         pud = pud_offset(pgd, address);
 345         if (pud_none(*pud))
 346                 return NULL;
 347
 348         *level = PG_LEVEL_1G;
 349         if (pud_large(*pud) || !pud_present(*pud))
 350                 return (pte_t *)pud;
 351
 352         pmd = pmd_offset(pud, address);
 353         if (pmd_none(*pmd))
 354                 return NULL;
 355
 356         *level = PG_LEVEL_2M;
 357         if (pmd_large(*pmd) || !pmd_present(*pmd))
 358                 return (pte_t *)pmd;
 359
 360         *level = PG_LEVEL_4K;
 361
 362         return pte_offset_kernel(pmd, address);
 363 }
 364 EXPORT_SYMBOL_GPL(lookup_address);
 365
 366 /*
 367  * Set the new pmd in all the pgds we know about:
 368  */
 369 static void __set_pmd_pte(pte_t *kpte, unsigned long address,
 370                           unsigned int level, pte_t pte)
 371 {
 372         /* change init_mm */
 373         switch(level) {
 374         case PG_LEVEL_2M:
 375                 xen_l2_entry_update((pmd_t *)kpte, __pmd_ma(__pte_val(pte)));
 376                 break;
 377 #ifdef CONFIG_X86_64
 378         case PG_LEVEL_1G:
 379                 xen_l3_entry_update((pud_t *)kpte, __pud_ma(__pte_val(pte)));
 380                 break;
 381 #endif
 382         default:
 383                 BUG();
 384         }
 385 #ifdef CONFIG_X86_32
 386         if (!SHARED_KERNEL_PMD) {
 387                 struct page *page;
 388
 389                 list_for_each_entry(page, &pgd_list, lru) {
 390                         pgd_t *pgd;
 391                         pud_t *pud;
 392                         pmd_t *pmd;
 393
 394                         pgd = (pgd_t *)page_address(page) + pgd_index(address);
 395                         pud = pud_offset(pgd, address);
 396                         pmd = pmd_offset(pud, address);
 397                         xen_l2_entry_update(pmd, __pmd_ma(__pte_val(pte)));
 398                 }
 399         }
 400 #endif
 401 }
 402
 403 static int
 404 try_preserve_large_page(pte_t *kpte, unsigned long address,
 405                         struct cpa_data *cpa)
 406 {
 407         unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn;
 408         pte_t new_pte, old_pte, *tmp;
 409         pgprot_t old_prot, new_prot, req_prot;
 410         int i, do_split = 1;
 411         unsigned int level;
 412
 413         if (cpa->force_split)
 414                 return 1;
 415
 416         spin_lock(&pgd_lock);
 417         /*
 418          * Check for races, another CPU might have split this page
 419          * up already:
 420          */
 421         tmp = lookup_address(address, &level);
 422         if (tmp != kpte)
 423                 goto out_unlock;
 424
 425         switch (level) {
 426         case PG_LEVEL_2M:
 427                 psize = PMD_PAGE_SIZE;
 428                 pmask = PMD_PAGE_MASK;
 429                 break;
 430 #ifdef CONFIG_X86_64
 431         case PG_LEVEL_1G:
 432                 psize = PUD_PAGE_SIZE;
 433                 pmask = PUD_PAGE_MASK;
 434                 break;
 435 #endif
 436         default:
 437                 do_split = -EINVAL;
 438                 goto out_unlock;
 439         }
 440
 441         /*
 442          * Calculate the number of pages, which fit into this large
 443          * page starting at address:
 444          */
 445         nextpage_addr = (address + psize) & pmask;
 446         numpages = (nextpage_addr - address) >> PAGE_SHIFT;
 447         if (numpages < cpa->numpages)
 448                 cpa->numpages = numpages;
 449
 450         /*
 451          * We are safe now. Check whether the new pgprot is the same:
 452          */
 453         old_pte = *kpte;
 454         old_prot = new_prot = req_prot = pte_pgprot(old_pte);
 455
 456         pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
 457         pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
 458
 459         /*
 460          * old_pte points to the large page base address. So we need
 461          * to add the offset of the virtual address:
 462          */
 463         pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
 464         cpa->pfn = pfn;
 465
 466         new_prot = static_protections(req_prot, address, pfn);
 467
 468         /*
 469          * We need to check the full range, whether
 470          * static_protection() requires a different pgprot for one of
 471          * the pages in the range we try to preserve:
 472          */
 473         addr = address & pmask;
 474         pfn = pte_pfn(old_pte);
 475         for (i = 0; i < (psize >> PAGE_SHIFT) && pfn < max_mapnr;
 476              i++, addr += PAGE_SIZE, pfn++) {
 477                 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
 478
 479                 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
 480                         goto out_unlock;
 481         }
 482
 483         /*
 484          * If there are no changes, return. maxpages has been updated
 485          * above:
 486          */
 487         if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
 488                 do_split = 0;
 489                 goto out_unlock;
 490         }
 491
 492         /*
 493          * We need to change the attributes. Check, whether we can
 494          * change the large page in one go. We request a split, when
 495          * the address is not aligned and the number of pages is
 496          * smaller than the number of pages in the large page. Note
 497          * that we limited the number of possible pages already to
 498          * the number of pages in the large page.
 499          */
 500         if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
 501                 /*
 502                  * The address is aligned and the number of pages
 503                  * covers the full page.
 504                  */
 505                 new_pte = pfn_pte_ma(__pte_mfn(old_pte), canon_pgprot(new_prot));
 506                 __set_pmd_pte(kpte, address, level, new_pte);
 507                 cpa->flags |= CPA_FLUSHTLB;
 508                 do_split = 0;
 509         }
 510
 511 out_unlock:
 512         spin_unlock(&pgd_lock);
 513
 514         return do_split;
 515 }
 516
 517 static int split_large_page(pte_t *kpte, unsigned long address)
 518 {
 519         unsigned long mfn, mfninc = 1;
 520         unsigned int i, level;
 521         pte_t *pbase, *tmp;
 522         pgprot_t ref_prot;
 523         struct page *base;
 524
 525         if (!debug_pagealloc)
 526                 spin_unlock(&cpa_lock);
 527         base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
 528         if (!debug_pagealloc)
 529                 spin_lock(&cpa_lock);
 530         if (!base)
 531                 return -ENOMEM;
 532
 533         spin_lock(&pgd_lock);
 534         /*
 535          * Check for races, another CPU might have split this page
 536          * up for us already:
 537          */
 538         tmp = lookup_address(address, &level);
 539         if (tmp != kpte)
 540                 goto out_unlock;
 541
 542         pbase = (pte_t *)page_address(base);
 543         paravirt_alloc_pte(&init_mm, page_to_pfn(base));
 544         ref_prot = pte_pgprot(pte_clrhuge(*kpte));
 545         /*
 546          * If we ever want to utilize the PAT bit, we need to
 547          * update this function to make sure it's converted from
 548          * bit 12 to bit 7 when we cross from the 2MB level to
 549          * the 4K level:
 550          */
 551         WARN_ON_ONCE(pgprot_val(ref_prot) & _PAGE_PAT_LARGE);
 552
 553 #ifdef CONFIG_X86_64
 554         if (level == PG_LEVEL_1G) {
 555                 mfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
 556                 pgprot_val(ref_prot) |= _PAGE_PSE;
 557         }
 558 #endif
 559
 560         if (address >= (unsigned long)__va(0) &&
 561                 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
 562                 split_page_count(level);
 563
 564 #ifdef CONFIG_X86_64
 565         if (address >= (unsigned long)__va(1UL<<32) &&
 566                 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
 567                 split_page_count(level);
 568 #endif
 569
 570         /*
 571          * Get the target mfn from the original entry:
 572          */
 573         mfn = __pte_mfn(*kpte);
 574         for (i = 0; i < PTRS_PER_PTE; i++, mfn += mfninc)
 575                 set_pte(&pbase[i], pfn_pte_ma(mfn, ref_prot));
 576
 577         /*
 578          * Install the new, split up pagetable.
 579          *
 580          * We use the standard kernel pagetable protections for the new
 581          * pagetable protections, the actual ptes set above control the
 582          * primary protection behavior:
 583          */
 584         if (!xen_feature(XENFEAT_writable_page_tables) &&
 585             HYPERVISOR_update_va_mapping((unsigned long)pbase,
 586                                          mk_pte(base, PAGE_KERNEL_RO), 0))
 587                 BUG();
 588         __set_pmd_pte(kpte, address, level, mk_pte(base, __pgprot(_KERNPG_TABLE)));
 589
 590         /*
 591          * Intel Atom errata AAH41 workaround.
 592          *
 593          * The real fix should be in hw or in a microcode update, but
 594          * we also probabilistically try to reduce the window of having
 595          * a large TLB mixed with 4K TLBs while instruction fetches are
 596          * going on.
 597          */
 598         __flush_tlb_all();
 599
 600         base = NULL;
 601
 602 out_unlock:
 603         /*
 604          * If we dropped out via the lookup_address check under
 605          * pgd_lock then stick the page back into the pool:
 606          */
 607         if (base)
 608                 __free_page(base);
 609         spin_unlock(&pgd_lock);
 610
 611         return 0;
 612 }
 613
 614 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
 615                                int primary)
 616 {
 617         /*
 618          * Ignore all non primary paths.
 619          */
 620         if (!primary)
 621                 return 0;
 622
 623         /*
 624          * Ignore the NULL PTE for kernel identity mapping, as it is expected
 625          * to have holes.
 626          * Also set numpages to '1' indicating that we processed cpa req for
 627          * one virtual address page and its pfn. TBD: numpages can be set based
 628          * on the initial value and the level returned by lookup_address().
 629          */
 630         if (within(vaddr, PAGE_OFFSET,
 631                    PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
 632                 cpa->numpages = 1;
 633                 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
 634                 return 0;
 635         } else {
 636                 WARN(1, KERN_WARNING "CPA: called for zero pte. "
 637                         "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
 638                         *cpa->vaddr);
 639
 640                 return -EFAULT;
 641         }
 642 }
 643
 644 static int __change_page_attr(struct cpa_data *cpa, int primary)
 645 {
 646         unsigned long address;
 647         int do_split, err;
 648         unsigned int level;
 649         pte_t *kpte, old_pte;
 650
 651         if (cpa->flags & CPA_PAGES_ARRAY) {
 652                 struct page *page = cpa->pages[cpa->curpage];
 653                 if (unlikely(PageHighMem(page)))
 654                         return 0;
 655                 address = (unsigned long)page_address(page);
 656         } else if (cpa->flags & CPA_ARRAY)
 657                 address = cpa->vaddr[cpa->curpage];
 658         else
 659                 address = *cpa->vaddr;
 660 repeat:
 661         kpte = lookup_address(address, &level);
 662         if (!kpte)
 663                 return __cpa_process_fault(cpa, address, primary);
 664
 665         old_pte = *kpte;
 666         if (!__pte_val(old_pte))
 667                 return __cpa_process_fault(cpa, address, primary);
 668
 669         if (level == PG_LEVEL_4K) {
 670                 pte_t new_pte;
 671                 pgprot_t new_prot = pte_pgprot(old_pte);
 672                 unsigned long mfn = __pte_mfn(old_pte);
 673
 674                 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
 675                 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
 676
 677                 new_prot = static_protections(new_prot, address,
 678                                               mfn_to_local_pfn(mfn));
 679
 680                 /*
 681                  * We need to keep the mfn from the existing PTE,
 682                  * after all we're only going to change it's attributes
 683                  * not the memory it points to
 684                  */
 685                 new_pte = pfn_pte_ma(mfn, canon_pgprot(new_prot));
 686                 cpa->pfn = mfn_to_local_pfn(mfn);
 687                 /*
 688                  * Do we really change anything ?
 689                  */
 690                 if (__pte_val(old_pte) != __pte_val(new_pte)) {
 691                         mmu_update_t u;
 692
 693                         u.ptr = virt_to_machine(kpte);
 694                         u.val = __pte_val(new_pte);
 695                         WARN_ON_ONCE(arch_use_lazy_mmu_mode());
 696                         do {
 697                                 err = HYPERVISOR_mmu_update(&u, 1, NULL,
 698                                                             DOMID_SELF);
 699                                 switch (err) {
 700                                 case 0:
 701                                         break;
 702                                 case -ENOMEM:
 703                                         BUG_ON(!primary);
 704                                         BUG_ON(!((pgprot_val(cpa->mask_set) |
 705                                                   pgprot_val(cpa->mask_clr)) &
 706                                                  _PAGE_CACHE_MASK));
 707                                         if (hypervisor_oom())
 708                                                 continue;
 709                                         /* fall through */
 710                                 default:
 711                                         return err;
 712                                 }
 713                         } while (err);
 714                         cpa->flags |= CPA_FLUSHTLB;
 715                 }
 716                 cpa->numpages = 1;
 717                 return 0;
 718         }
 719
 720         /*
 721          * Check, whether we can keep the large page intact
 722          * and just change the pte:
 723          */
 724         do_split = try_preserve_large_page(kpte, address, cpa);
 725         /*
 726          * When the range fits into the existing large page,
 727          * return. cp->numpages and cpa->tlbflush have been updated in
 728          * try_large_page:
 729          */
 730         if (do_split <= 0)
 731                 return do_split;
 732
 733         /*
 734          * We have to split the large page:
 735          */
 736         err = split_large_page(kpte, address);
 737         if (!err) {
 738                 /*
 739                  * Do a global flush tlb after splitting the large page
 740                  * and before we do the actual change page attribute in the PTE.
 741                  *
 742                  * With out this, we violate the TLB application note, that says
 743                  * "The TLBs may contain both ordinary and large-page
 744                  *  translations for a 4-KByte range of linear addresses. This
 745                  *  may occur if software modifies the paging structures so that
 746                  *  the page size used for the address range changes. If the two
 747                  *  translations differ with respect to page frame or attributes
 748                  *  (e.g., permissions), processor behavior is undefined and may
 749                  *  be implementation-specific."
 750                  *
 751                  * We do this global tlb flush inside the cpa_lock, so that we
 752                  * don't allow any other cpu, with stale tlb entries change the
 753                  * page attribute in parallel, that also falls into the
 754                  * just split large page entry.
 755                  */
 756                 flush_tlb_all();
 757                 goto repeat;
 758         }
 759
 760         return err;
 761 }
 762
 763 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
 764
 765 static int cpa_process_alias(struct cpa_data *cpa)
 766 {
 767         struct cpa_data alias_cpa;
 768         unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
 769         unsigned long vaddr;
 770         int ret;
 771
 772         if (cpa->pfn >= max_pfn_mapped)
 773                 return 0;
 774
 775 #ifdef CONFIG_X86_64
 776         if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
 777                 return 0;
 778 #endif
 779         /*
 780          * No need to redo, when the primary call touched the direct
 781          * mapping already:
 782          */
 783         if (cpa->flags & CPA_PAGES_ARRAY) {
 784                 struct page *page = cpa->pages[cpa->curpage];
 785                 if (unlikely(PageHighMem(page)))
 786                         return 0;
 787                 vaddr = (unsigned long)page_address(page);
 788         } else if (cpa->flags & CPA_ARRAY)
 789                 vaddr = cpa->vaddr[cpa->curpage];
 790         else
 791                 vaddr = *cpa->vaddr;
 792
 793         if (!(within(vaddr, PAGE_OFFSET,
 794                     PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
 795
 796                 alias_cpa = *cpa;
 797                 alias_cpa.vaddr = &laddr;
 798                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 799
 800                 ret = __change_page_attr_set_clr(&alias_cpa, 0);
 801                 if (ret)
 802                         return ret;
 803         }
 804
 805 #ifdef CONFIG_X86_64
 806         /*
 807          * If the primary call didn't touch the high mapping already
 808          * and the physical address is inside the kernel map, we need
 809          * to touch the high mapped kernel as well:
 810          */
 811         if (!within(vaddr, (unsigned long)_text, _brk_end) &&
 812             within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn())) {
 813                 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
 814                                                __START_KERNEL_map;
 815                 alias_cpa = *cpa;
 816                 alias_cpa.vaddr = &temp_cpa_vaddr;
 817                 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
 818
 819                 /*
 820                  * The high mapping range is imprecise, so ignore the
 821                  * return value.
 822                  */
 823                 __change_page_attr_set_clr(&alias_cpa, 0);
 824         }
 825 #endif
 826
 827         return 0;
 828 }
 829
 830 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
 831 {
 832         int ret, numpages = cpa->numpages;
 833
 834         while (numpages) {
 835                 /*
 836                  * Store the remaining nr of pages for the large page
 837                  * preservation check.
 838                  */
 839                 cpa->numpages = numpages;
 840                 /* for array changes, we can't use large page */
 841                 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
 842                         cpa->numpages = 1;
 843
 844                 if (!debug_pagealloc)
 845                         spin_lock(&cpa_lock);
 846                 ret = __change_page_attr(cpa, checkalias);
 847                 if (!debug_pagealloc)
 848                         spin_unlock(&cpa_lock);
 849                 if (ret)
 850                         return ret;
 851
 852                 if (checkalias) {
 853                         ret = cpa_process_alias(cpa);
 854                         if (ret)
 855                                 return ret;
 856                 }
 857
 858                 /*
 859                  * Adjust the number of pages with the result of the
 860                  * CPA operation. Either a large page has been
 861                  * preserved or a single page update happened.
 862                  */
 863                 BUG_ON(cpa->numpages > numpages);
 864                 numpages -= cpa->numpages;
 865                 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
 866                         cpa->curpage++;
 867                 else
 868                         *cpa->vaddr += cpa->numpages * PAGE_SIZE;
 869
 870         }
 871         return 0;
 872 }
 873
 874 static inline int cache_attr(pgprot_t attr)
 875 {
 876         return pgprot_val(attr) &
 877                 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
 878 }
 879
 880 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
 881                                     pgprot_t mask_set, pgprot_t mask_clr,
 882                                     int force_split, int in_flag,
 883                                     struct page **pages)
 884 {
 885         struct cpa_data cpa;
 886         int ret, cache, checkalias;
 887         unsigned long baddr = 0;
 888
 889         /*
 890          * Check, if we are requested to change a not supported
 891          * feature:
 892          */
 893         mask_set = canon_pgprot(mask_set);
 894         mask_clr = canon_pgprot(mask_clr);
 895         if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
 896                 return 0;
 897
 898         /* Ensure we are PAGE_SIZE aligned */
 899         if (in_flag & CPA_ARRAY) {
 900                 int i;
 901                 for (i = 0; i < numpages; i++) {
 902                         if (addr[i] & ~PAGE_MASK) {
 903                                 addr[i] &= PAGE_MASK;
 904                                 WARN_ON_ONCE(1);
 905                         }
 906                 }
 907         } else if (!(in_flag & CPA_PAGES_ARRAY)) {
 908                 /*
 909                  * in_flag of CPA_PAGES_ARRAY implies it is aligned.
 910                  * No need to cehck in that case
 911                  */
 912                 if (*addr & ~PAGE_MASK) {
 913                         *addr &= PAGE_MASK;
 914                         /*
 915                          * People should not be passing in unaligned addresses:
 916                          */
 917                         WARN_ON_ONCE(1);
 918                 }
 919                 /*
 920                  * Save address for cache flush. *addr is modified in the call
 921                  * to __change_page_attr_set_clr() below.
 922                  */
 923                 baddr = *addr;
 924         }
 925
 926         /* Must avoid aliasing mappings in the highmem code */
 927         kmap_flush_unused();
 928
 929         vm_unmap_aliases();
 930
 931         cpa.vaddr = addr;
 932         cpa.pages = pages;
 933         cpa.numpages = numpages;
 934         cpa.mask_set = mask_set;
 935         cpa.mask_clr = mask_clr;
 936         cpa.flags = 0;
 937         cpa.curpage = 0;
 938         cpa.force_split = force_split;
 939
 940         if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
 941                 cpa.flags |= in_flag;
 942
 943         /* No alias checking for _NX bit modifications */
 944         checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
 945
 946         ret = __change_page_attr_set_clr(&cpa, checkalias);
 947
 948         /*
 949          * Check whether we really changed something:
 950          */
 951         if (!(cpa.flags & CPA_FLUSHTLB))
 952                 goto out;
 953
 954         /*
 955          * No need to flush, when we did not set any of the caching
 956          * attributes:
 957          */
 958         cache = cache_attr(mask_set);
 959
 960         /*
 961          * On success we use clflush, when the CPU supports it to
 962          * avoid the wbindv. If the CPU does not support it and in the
 963          * error case we fall back to cpa_flush_all (which uses
 964          * wbindv):
 965          */
 966         if (!ret && cpu_has_clflush) {
 967                 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
 968                         cpa_flush_array(addr, numpages, cache,
 969                                         cpa.flags, pages);
 970                 } else
 971                         cpa_flush_range(baddr, numpages, cache);
 972         } else
 973                 cpa_flush_all(cache);
 974
 975 out:
 976         return ret;
 977 }
 978
 979 static inline int change_page_attr_set(unsigned long *addr, int numpages,
 980                                        pgprot_t mask, int array)
 981 {
 982         return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
 983                 (array ? CPA_ARRAY : 0), NULL);
 984 }
 985
 986 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
 987                                          pgprot_t mask, int array)
 988 {
 989         return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
 990                 (array ? CPA_ARRAY : 0), NULL);
 991 }
 992
 993 static inline int cpa_set_pages_array(struct page **pages, int numpages,
 994                                        pgprot_t mask)
 995 {
 996         return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
 997                 CPA_PAGES_ARRAY, pages);
 998 }
 999
1000 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1001                                          pgprot_t mask)
1002 {
1003         return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1004                 CPA_PAGES_ARRAY, pages);
1005 }
1006
1007 #ifdef CONFIG_XEN
1008 static void _free_memtype(u64 pstart, u64 pend)
1009 {
1010         u64 pa = pstart &= __PHYSICAL_MASK;
1011         u64 ma = phys_to_machine(pa);
1012
1013         while ((pa += PAGE_SIZE) < pend) {
1014                 if (phys_to_machine(pa) != ma + (pa - pstart)) {
1015                         free_memtype(ma, ma + (pa - pstart));
1016                         pstart = pa;
1017                         ma = phys_to_machine(pa);
1018                 }
1019         }
1020         free_memtype(ma, ma + (pend - pstart));
1021 }
1022 #define free_memtype _free_memtype
1023
1024 static int _reserve_memtype(u64 pstart, u64 pend, unsigned long req_type)
1025 {
1026         u64 pcur = pstart &= __PHYSICAL_MASK, pa = pcur;
1027         u64 ma = phys_to_machine(pa);
1028         int rc = 0;
1029
1030         while ((pa += PAGE_SIZE) < pend) {
1031                 if (phys_to_machine(pa) != ma + (pa - pcur)) {
1032                         rc = reserve_memtype(ma, ma + (pa - pcur),
1033                                              req_type, NULL);
1034                         if (rc)
1035                                 break;
1036                         pcur = pa;
1037                         ma = phys_to_machine(pa);
1038                 }
1039         }
1040         if (likely(!rc))
1041                 rc = reserve_memtype(ma, ma + (pend - pcur), req_type, NULL);
1042
1043         if (unlikely(!rc) && pstart < pcur)
1044                 _free_memtype(pstart, pcur);
1045
1046         return rc;
1047 }
1048 #define reserve_memtype(s, e, r, n) \
1049         _reserve_memtype(s, e, BUILD_BUG_ON_ZERO(n) ?: (r))
1050 #endif
1051
1052 int _set_memory_uc(unsigned long addr, int numpages)
1053 {
1054         /*
1055          * for now UC MINUS. see comments in ioremap_nocache()
1056          */
1057         return change_page_attr_set(&addr, numpages,
1058                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1059 }
1060
1061 int set_memory_uc(unsigned long addr, int numpages)
1062 {
1063         int ret;
1064
1065         /*
1066          * for now UC MINUS. see comments in ioremap_nocache()
1067          */
1068         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1069                             _PAGE_CACHE_UC_MINUS, NULL);
1070         if (ret)
1071                 goto out_err;
1072
1073         ret = _set_memory_uc(addr, numpages);
1074         if (ret)
1075                 goto out_free;
1076
1077         return 0;
1078
1079 out_free:
1080         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1081 out_err:
1082         return ret;
1083 }
1084 EXPORT_SYMBOL(set_memory_uc);
1085
1086 static int _set_memory_array(unsigned long *addr, int addrinarray,
1087                 unsigned long new_type)
1088 {
1089         int i, j;
1090         int ret;
1091
1092         /*
1093          * for now UC MINUS. see comments in ioremap_nocache()
1094          */
1095         for (i = 0; i < addrinarray; i++) {
1096                 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1097                                         new_type, NULL);
1098                 if (ret)
1099                         goto out_free;
1100         }
1101
1102         ret = change_page_attr_set(addr, addrinarray,
1103                                     __pgprot(_PAGE_CACHE_UC_MINUS), 1);
1104
1105         if (!ret && new_type == _PAGE_CACHE_WC)
1106                 ret = change_page_attr_set_clr(addr, addrinarray,
1107                                                __pgprot(_PAGE_CACHE_WC),
1108                                                __pgprot(_PAGE_CACHE_MASK),
1109                                                0, CPA_ARRAY, NULL);
1110         if (ret)
1111                 goto out_free;
1112
1113         return 0;
1114
1115 out_free:
1116         for (j = 0; j < i; j++)
1117                 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1118
1119         return ret;
1120 }
1121
1122 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1123 {
1124         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_UC_MINUS);
1125 }
1126 EXPORT_SYMBOL(set_memory_array_uc);
1127
1128 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1129 {
1130         return _set_memory_array(addr, addrinarray, _PAGE_CACHE_WC);
1131 }
1132 EXPORT_SYMBOL(set_memory_array_wc);
1133
1134 int _set_memory_wc(unsigned long addr, int numpages)
1135 {
1136         int ret;
1137         unsigned long addr_copy = addr;
1138
1139         ret = change_page_attr_set(&addr, numpages,
1140                                     __pgprot(_PAGE_CACHE_UC_MINUS), 0);
1141         if (!ret) {
1142                 ret = change_page_attr_set_clr(&addr_copy, numpages,
1143                                                __pgprot(_PAGE_CACHE_WC),
1144                                                __pgprot(_PAGE_CACHE_MASK),
1145                                                0, 0, NULL);
1146         }
1147         return ret;
1148 }
1149
1150 int set_memory_wc(unsigned long addr, int numpages)
1151 {
1152         int ret;
1153
1154         if (!pat_enabled)
1155                 return set_memory_uc(addr, numpages);
1156
1157         ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1158                 _PAGE_CACHE_WC, NULL);
1159         if (ret)
1160                 goto out_err;
1161
1162         ret = _set_memory_wc(addr, numpages);
1163         if (ret)
1164                 goto out_free;
1165
1166         return 0;
1167
1168 out_free:
1169         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1170 out_err:
1171         return ret;
1172 }
1173 EXPORT_SYMBOL(set_memory_wc);
1174
1175 int _set_memory_wb(unsigned long addr, int numpages)
1176 {
1177         return change_page_attr_clear(&addr, numpages,
1178                                       __pgprot(_PAGE_CACHE_MASK), 0);
1179 }
1180
1181 int set_memory_wb(unsigned long addr, int numpages)
1182 {
1183         int ret;
1184
1185         ret = _set_memory_wb(addr, numpages);
1186         if (ret)
1187                 return ret;
1188
1189         free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1190         return 0;
1191 }
1192 EXPORT_SYMBOL(set_memory_wb);
1193
1194 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1195 {
1196         int i;
1197         int ret;
1198
1199         ret = change_page_attr_clear(addr, addrinarray,
1200                                       __pgprot(_PAGE_CACHE_MASK), 1);
1201         if (ret)
1202                 return ret;
1203
1204         for (i = 0; i < addrinarray; i++)
1205                 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1206
1207         return 0;
1208 }
1209 EXPORT_SYMBOL(set_memory_array_wb);
1210
1211 int set_memory_x(unsigned long addr, int numpages)
1212 {
1213         if (!(__supported_pte_mask & _PAGE_NX))
1214                 return 0;
1215
1216         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1217 }
1218 EXPORT_SYMBOL(set_memory_x);
1219
1220 int set_memory_nx(unsigned long addr, int numpages)
1221 {
1222         if (!(__supported_pte_mask & _PAGE_NX))
1223                 return 0;
1224
1225         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1226 }
1227 EXPORT_SYMBOL(set_memory_nx);
1228
1229 int set_memory_ro(unsigned long addr, int numpages)
1230 {
1231         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1232 }
1233 EXPORT_SYMBOL_GPL(set_memory_ro);
1234
1235 int set_memory_rw(unsigned long addr, int numpages)
1236 {
1237         return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1238 }
1239 EXPORT_SYMBOL_GPL(set_memory_rw);
1240
1241 int set_memory_np(unsigned long addr, int numpages)
1242 {
1243         return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1244 }
1245
1246 int set_memory_4k(unsigned long addr, int numpages)
1247 {
1248         return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1249                                         __pgprot(0), 1, 0, NULL);
1250 }
1251
1252 int set_pages_uc(struct page *page, int numpages)
1253 {
1254         unsigned long addr = (unsigned long)page_address(page);
1255
1256         return set_memory_uc(addr, numpages);
1257 }
1258 EXPORT_SYMBOL(set_pages_uc);
1259
1260 static int _set_pages_array(struct page **pages, int addrinarray,
1261                 unsigned long new_type)
1262 {
1263         unsigned long start;
1264         unsigned long end;
1265         int i;
1266         int free_idx;
1267         int ret;
1268
1269         for (i = 0; i < addrinarray; i++) {
1270                 if (PageHighMem(pages[i]))
1271                         continue;
1272                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1273                 end = start + PAGE_SIZE;
1274                 if (reserve_memtype(start, end, new_type, NULL))
1275                         goto err_out;
1276         }
1277
1278         ret = cpa_set_pages_array(pages, addrinarray,
1279                         __pgprot(_PAGE_CACHE_UC_MINUS));
1280         if (!ret && new_type == _PAGE_CACHE_WC)
1281                 ret = change_page_attr_set_clr(NULL, addrinarray,
1282                                                __pgprot(_PAGE_CACHE_WC),
1283                                                __pgprot(_PAGE_CACHE_MASK),
1284                                                0, CPA_PAGES_ARRAY, pages);
1285         if (ret)
1286                 goto err_out;
1287         return 0; /* Success */
1288 err_out:
1289         free_idx = i;
1290         for (i = 0; i < free_idx; i++) {
1291                 if (PageHighMem(pages[i]))
1292                         continue;
1293                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1294                 end = start + PAGE_SIZE;
1295                 free_memtype(start, end);
1296         }
1297         return -EINVAL;
1298 }
1299
1300 int set_pages_array_uc(struct page **pages, int addrinarray)
1301 {
1302         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_UC_MINUS);
1303 }
1304 EXPORT_SYMBOL(set_pages_array_uc);
1305
1306 int set_pages_array_wc(struct page **pages, int addrinarray)
1307 {
1308         return _set_pages_array(pages, addrinarray, _PAGE_CACHE_WC);
1309 }
1310 EXPORT_SYMBOL(set_pages_array_wc);
1311
1312 int set_pages_wb(struct page *page, int numpages)
1313 {
1314         unsigned long addr = (unsigned long)page_address(page);
1315
1316         return set_memory_wb(addr, numpages);
1317 }
1318 EXPORT_SYMBOL(set_pages_wb);
1319
1320 int set_pages_array_wb(struct page **pages, int addrinarray)
1321 {
1322         int retval;
1323         unsigned long start;
1324         unsigned long end;
1325         int i;
1326
1327         retval = cpa_clear_pages_array(pages, addrinarray,
1328                         __pgprot(_PAGE_CACHE_MASK));
1329         if (retval)
1330                 return retval;
1331
1332         for (i = 0; i < addrinarray; i++) {
1333                 if (PageHighMem(pages[i]))
1334                         continue;
1335                 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1336                 end = start + PAGE_SIZE;
1337                 free_memtype(start, end);
1338         }
1339
1340         return 0;
1341 }
1342 EXPORT_SYMBOL(set_pages_array_wb);
1343
1344 int set_pages_x(struct page *page, int numpages)
1345 {
1346         unsigned long addr = (unsigned long)page_address(page);
1347
1348         return set_memory_x(addr, numpages);
1349 }
1350 EXPORT_SYMBOL(set_pages_x);
1351
1352 int set_pages_nx(struct page *page, int numpages)
1353 {
1354         unsigned long addr = (unsigned long)page_address(page);
1355
1356         return set_memory_nx(addr, numpages);
1357 }
1358 EXPORT_SYMBOL(set_pages_nx);
1359
1360 int set_pages_ro(struct page *page, int numpages)
1361 {
1362         unsigned long addr = (unsigned long)page_address(page);
1363
1364         return set_memory_ro(addr, numpages);
1365 }
1366
1367 int set_pages_rw(struct page *page, int numpages)
1368 {
1369         unsigned long addr = (unsigned long)page_address(page);
1370
1371         return set_memory_rw(addr, numpages);
1372 }
1373
1374 #ifdef CONFIG_DEBUG_PAGEALLOC
1375
1376 static int __set_pages_p(struct page *page, int numpages)
1377 {
1378         unsigned long tempaddr = (unsigned long) page_address(page);
1379         struct cpa_data cpa = { .vaddr = &tempaddr,
1380                                 .numpages = numpages,
1381                                 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1382                                 .mask_clr = __pgprot(0),
1383                                 .flags = 0};
1384
1385         /*
1386          * No alias checking needed for setting present flag. otherwise,
1387          * we may need to break large pages for 64-bit kernel text
1388          * mappings (this adds to complexity if we want to do this from
1389          * atomic context especially). Let's keep it simple!
1390          */
1391         return __change_page_attr_set_clr(&cpa, 0);
1392 }
1393
1394 static int __set_pages_np(struct page *page, int numpages)
1395 {
1396         unsigned long tempaddr = (unsigned long) page_address(page);
1397         struct cpa_data cpa = { .vaddr = &tempaddr,
1398                                 .numpages = numpages,
1399                                 .mask_set = __pgprot(0),
1400                                 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1401                                 .flags = 0};
1402
1403         /*
1404          * No alias checking needed for setting not present flag. otherwise,
1405          * we may need to break large pages for 64-bit kernel text
1406          * mappings (this adds to complexity if we want to do this from
1407          * atomic context especially). Let's keep it simple!
1408          */
1409         return __change_page_attr_set_clr(&cpa, 0);
1410 }
1411
1412 void kernel_map_pages(struct page *page, int numpages, int enable)
1413 {
1414         if (PageHighMem(page))
1415                 return;
1416         if (!enable) {
1417                 debug_check_no_locks_freed(page_address(page),
1418                                            numpages * PAGE_SIZE);
1419         }
1420
1421         /*
1422          * The return value is ignored as the calls cannot fail.
1423          * Large pages for identity mappings are not used at boot time
1424          * and hence no memory allocations during large page split.
1425          */
1426         if (enable)
1427                 __set_pages_p(page, numpages);
1428         else
1429                 __set_pages_np(page, numpages);
1430
1431         /*
1432          * We should perform an IPI and flush all tlbs,
1433          * but that can deadlock->flush only current cpu:
1434          */
1435         __flush_tlb_all();
1436 }
1437
1438 #ifdef CONFIG_HIBERNATION
1439
1440 bool kernel_page_present(struct page *page)
1441 {
1442         unsigned int level;
1443         pte_t *pte;
1444
1445         if (PageHighMem(page))
1446                 return false;
1447
1448         pte = lookup_address((unsigned long)page_address(page), &level);
1449         return (__pte_val(*pte) & _PAGE_PRESENT);
1450 }
1451
1452 #endif /* CONFIG_HIBERNATION */
1453
1454 #endif /* CONFIG_DEBUG_PAGEALLOC */
1455
1456 static inline int in_secondary_range(unsigned long va)
1457 {
1458 #ifdef CONFIG_X86_64
1459         return va >= VMALLOC_START && va < VMALLOC_END;
1460 #else
1461         return va >= (unsigned long)high_memory;
1462 #endif
1463 }
1464
1465 static void __make_page_readonly(unsigned long va)
1466 {
1467         pte_t *pte;
1468         unsigned int level;
1469
1470         pte = lookup_address(va, &level);
1471         BUG_ON(!pte || level != PG_LEVEL_4K);
1472         if (HYPERVISOR_update_va_mapping(va, pte_wrprotect(*pte), 0))
1473                 BUG();
1474         if (in_secondary_range(va)) {
1475                 unsigned long pfn = pte_pfn(*pte);
1476
1477 #ifdef CONFIG_HIGHMEM
1478                 if (pfn >= highstart_pfn)
1479                         kmap_flush_unused(); /* flush stale writable kmaps */
1480                 else
1481 #endif
1482                         __make_page_readonly((unsigned long)__va(pfn << PAGE_SHIFT));
1483         }
1484 }
1485
1486 static void __make_page_writable(unsigned long va)
1487 {
1488         pte_t *pte;
1489         unsigned int level;
1490
1491         pte = lookup_address(va, &level);
1492         BUG_ON(!pte || level != PG_LEVEL_4K);
1493         if (HYPERVISOR_update_va_mapping(va, pte_mkwrite(*pte), UVMF_INVLPG))
1494                 BUG();
1495         if (in_secondary_range(va)) {
1496                 unsigned long pfn = pte_pfn(*pte);
1497
1498 #ifdef CONFIG_HIGHMEM
1499                 if (pfn < highstart_pfn)
1500 #endif
1501                         __make_page_writable((unsigned long)__va(pfn << PAGE_SHIFT));
1502         }
1503 }
1504
1505 void make_page_readonly(void *va, unsigned int feature)
1506 {
1507         if (!xen_feature(feature))
1508                 __make_page_readonly((unsigned long)va);
1509 }
1510
1511 void make_page_writable(void *va, unsigned int feature)
1512 {
1513         if (!xen_feature(feature))
1514                 __make_page_writable((unsigned long)va);
1515 }
1516
1517 void make_pages_readonly(void *va, unsigned int nr, unsigned int feature)
1518 {
1519         unsigned long addr;
1520
1521         if (xen_feature(feature))
1522                 return;
1523
1524         for (addr = (unsigned long)va; nr--; addr += PAGE_SIZE)
1525                 __make_page_readonly(addr);
1526 }
1527
1528 void make_pages_writable(void *va, unsigned int nr, unsigned int feature)
1529 {
1530         unsigned long addr;
1531
1532         if (xen_feature(feature))
1533                 return;
1534
1535         for (addr = (unsigned long)va; nr--; addr += PAGE_SIZE)
1536                 __make_page_writable(addr);
1537 }
1538
1539 /*
1540  * The testcases use internal knowledge of the implementation that shouldn't
1541  * be exposed to the rest of the kernel. Include these directly here.
1542  */
1543 #ifdef CONFIG_CPA_DEBUG
1544 #include "pageattr-test.c"
1545 #endif