arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30
  31 #include <linux/clocksource.h>
  32 #include <linux/interrupt.h>
  33 #include <linux/kvm.h>
  34 #include <linux/fs.h>
  35 #include <linux/vmalloc.h>
  36 #include <linux/module.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <trace/events/kvm.h>
  50
  51 #define CREATE_TRACE_POINTS
  52 #include "trace.h"
  53
  54 #include <asm/debugreg.h>
  55 #include <asm/msr.h>
  56 #include <asm/desc.h>
  57 #include <asm/mtrr.h>
  58 #include <asm/mce.h>
  59 #include <asm/i387.h>
  60 #include <asm/xcr.h>
  61 #include <asm/pvclock.h>
  62 #include <asm/div64.h>
  63
  64 #define MAX_IO_MSRS 256
  65 #define KVM_MAX_MCE_BANKS 32
  66 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  67
  68 #define emul_to_vcpu(ctxt) \
  69         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  70
  71 /* EFER defaults:
  72  * - enable syscall per default because its emulated by KVM
  73  * - enable LME and LMA per default on 64 bit KVM
  74  */
  75 #ifdef CONFIG_X86_64
  76 static
  77 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  78 #else
  79 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  80 #endif
  81
  82 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  83 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  84
  85 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  86 static void process_nmi(struct kvm_vcpu *vcpu);
  87
  88 struct kvm_x86_ops *kvm_x86_ops;
  89 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  90
  91 static bool ignore_msrs = 0;
  92 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  93
  94 bool kvm_has_tsc_control;
  95 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  96 u32  kvm_max_guest_tsc_khz;
  97 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  98
  99 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 100 static u32 tsc_tolerance_ppm = 250;
 101 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 161
 162 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 163 {
 164         int i;
 165         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 166                 vcpu->arch.apf.gfns[i] = ~0;
 167 }
 168
 169 static void kvm_on_user_return(struct user_return_notifier *urn)
 170 {
 171         unsigned slot;
 172         struct kvm_shared_msrs *locals
 173                 = container_of(urn, struct kvm_shared_msrs, urn);
 174         struct kvm_shared_msr_values *values;
 175
 176         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 177                 values = &locals->values[slot];
 178                 if (values->host != values->curr) {
 179                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 180                         values->curr = values->host;
 181                 }
 182         }
 183         locals->registered = false;
 184         user_return_notifier_unregister(urn);
 185 }
 186
 187 static void shared_msr_update(unsigned slot, u32 msr)
 188 {
 189         struct kvm_shared_msrs *smsr;
 190         u64 value;
 191
 192         smsr = &__get_cpu_var(shared_msrs);
 193         /* only read, and nobody should modify it at this time,
 194          * so don't need lock */
 195         if (slot >= shared_msrs_global.nr) {
 196                 printk(KERN_ERR "kvm: invalid MSR slot!");
 197                 return;
 198         }
 199         rdmsrl_safe(msr, &value);
 200         smsr->values[slot].host = value;
 201         smsr->values[slot].curr = value;
 202 }
 203
 204 void kvm_define_shared_msr(unsigned slot, u32 msr)
 205 {
 206         if (slot >= shared_msrs_global.nr)
 207                 shared_msrs_global.nr = slot + 1;
 208         shared_msrs_global.msrs[slot] = msr;
 209         /* we need ensured the shared_msr_global have been updated */
 210         smp_wmb();
 211 }
 212 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 213
 214 static void kvm_shared_msr_cpu_online(void)
 215 {
 216         unsigned i;
 217
 218         for (i = 0; i < shared_msrs_global.nr; ++i)
 219                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 220 }
 221
 222 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 223 {
 224         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 225
 226         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 227                 return;
 228         smsr->values[slot].curr = value;
 229         wrmsrl(shared_msrs_global.msrs[slot], value);
 230         if (!smsr->registered) {
 231                 smsr->urn.on_user_return = kvm_on_user_return;
 232                 user_return_notifier_register(&smsr->urn);
 233                 smsr->registered = true;
 234         }
 235 }
 236 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 237
 238 static void drop_user_return_notifiers(void *ignore)
 239 {
 240         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 241
 242         if (smsr->registered)
 243                 kvm_on_user_return(&smsr->urn);
 244 }
 245
 246 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 247 {
 248         if (irqchip_in_kernel(vcpu->kvm))
 249                 return vcpu->arch.apic_base;
 250         else
 251                 return vcpu->arch.apic_base;
 252 }
 253 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 254
 255 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 256 {
 257         /* TODO: reserve bits check */
 258         if (irqchip_in_kernel(vcpu->kvm))
 259                 kvm_lapic_set_base(vcpu, data);
 260         else
 261                 vcpu->arch.apic_base = data;
 262 }
 263 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 264
 265 #define EXCPT_BENIGN            0
 266 #define EXCPT_CONTRIBUTORY      1
 267 #define EXCPT_PF                2
 268
 269 static int exception_class(int vector)
 270 {
 271         switch (vector) {
 272         case PF_VECTOR:
 273                 return EXCPT_PF;
 274         case DE_VECTOR:
 275         case TS_VECTOR:
 276         case NP_VECTOR:
 277         case SS_VECTOR:
 278         case GP_VECTOR:
 279                 return EXCPT_CONTRIBUTORY;
 280         default:
 281                 break;
 282         }
 283         return EXCPT_BENIGN;
 284 }
 285
 286 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 287                 unsigned nr, bool has_error, u32 error_code,
 288                 bool reinject)
 289 {
 290         u32 prev_nr;
 291         int class1, class2;
 292
 293         kvm_make_request(KVM_REQ_EVENT, vcpu);
 294
 295         if (!vcpu->arch.exception.pending) {
 296         queue:
 297                 vcpu->arch.exception.pending = true;
 298                 vcpu->arch.exception.has_error_code = has_error;
 299                 vcpu->arch.exception.nr = nr;
 300                 vcpu->arch.exception.error_code = error_code;
 301                 vcpu->arch.exception.reinject = reinject;
 302                 return;
 303         }
 304
 305         /* to check exception */
 306         prev_nr = vcpu->arch.exception.nr;
 307         if (prev_nr == DF_VECTOR) {
 308                 /* triple fault -> shutdown */
 309                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 310                 return;
 311         }
 312         class1 = exception_class(prev_nr);
 313         class2 = exception_class(nr);
 314         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 315                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 316                 /* generate double fault per SDM Table 5-5 */
 317                 vcpu->arch.exception.pending = true;
 318                 vcpu->arch.exception.has_error_code = true;
 319                 vcpu->arch.exception.nr = DF_VECTOR;
 320                 vcpu->arch.exception.error_code = 0;
 321         } else
 322                 /* replace previous exception with a new one in a hope
 323                    that instruction re-execution will regenerate lost
 324                    exception */
 325                 goto queue;
 326 }
 327
 328 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 329 {
 330         kvm_multiple_exception(vcpu, nr, false, 0, false);
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 333
 334 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 335 {
 336         kvm_multiple_exception(vcpu, nr, false, 0, true);
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 339
 340 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 341 {
 342         if (err)
 343                 kvm_inject_gp(vcpu, 0);
 344         else
 345                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 346 }
 347 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 348
 349 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 350 {
 351         ++vcpu->stat.pf_guest;
 352         vcpu->arch.cr2 = fault->address;
 353         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 356
 357 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 358 {
 359         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 360                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 361         else
 362                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 363 }
 364
 365 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 366 {
 367         atomic_inc(&vcpu->arch.nmi_queued);
 368         kvm_make_request(KVM_REQ_NMI, vcpu);
 369 }
 370 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 371
 372 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 373 {
 374         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 375 }
 376 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 377
 378 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 379 {
 380         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 381 }
 382 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 383
 384 /*
 385  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 386  * a #GP and return false.
 387  */
 388 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 389 {
 390         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 391                 return true;
 392         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 393         return false;
 394 }
 395 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 396
 397 /*
 398  * This function will be used to read from the physical memory of the currently
 399  * running guest. The difference to kvm_read_guest_page is that this function
 400  * can read from guest physical or from the guest's guest physical memory.
 401  */
 402 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 403                             gfn_t ngfn, void *data, int offset, int len,
 404                             u32 access)
 405 {
 406         gfn_t real_gfn;
 407         gpa_t ngpa;
 408
 409         ngpa     = gfn_to_gpa(ngfn);
 410         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 411         if (real_gfn == UNMAPPED_GVA)
 412                 return -EFAULT;
 413
 414         real_gfn = gpa_to_gfn(real_gfn);
 415
 416         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 417 }
 418 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 419
 420 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 421                                void *data, int offset, int len, u32 access)
 422 {
 423         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 424                                        data, offset, len, access);
 425 }
 426
 427 /*
 428  * Load the pae pdptrs.  Return true is they are all valid.
 429  */
 430 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 431 {
 432         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 433         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 434         int i;
 435         int ret;
 436         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 437
 438         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 439                                       offset * sizeof(u64), sizeof(pdpte),
 440                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 441         if (ret < 0) {
 442                 ret = 0;
 443                 goto out;
 444         }
 445         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 446                 if (is_present_gpte(pdpte[i]) &&
 447                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 448                         ret = 0;
 449                         goto out;
 450                 }
 451         }
 452         ret = 1;
 453
 454         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 455         __set_bit(VCPU_EXREG_PDPTR,
 456                   (unsigned long *)&vcpu->arch.regs_avail);
 457         __set_bit(VCPU_EXREG_PDPTR,
 458                   (unsigned long *)&vcpu->arch.regs_dirty);
 459 out:
 460
 461         return ret;
 462 }
 463 EXPORT_SYMBOL_GPL(load_pdptrs);
 464
 465 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 466 {
 467         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 468         bool changed = true;
 469         int offset;
 470         gfn_t gfn;
 471         int r;
 472
 473         if (is_long_mode(vcpu) || !is_pae(vcpu))
 474                 return false;
 475
 476         if (!test_bit(VCPU_EXREG_PDPTR,
 477                       (unsigned long *)&vcpu->arch.regs_avail))
 478                 return true;
 479
 480         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 481         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 482         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 483                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 484         if (r < 0)
 485                 goto out;
 486         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 487 out:
 488
 489         return changed;
 490 }
 491
 492 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 493 {
 494         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 495         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 496                                     X86_CR0_CD | X86_CR0_NW;
 497
 498         cr0 |= X86_CR0_ET;
 499
 500 #ifdef CONFIG_X86_64
 501         if (cr0 & 0xffffffff00000000UL)
 502                 return 1;
 503 #endif
 504
 505         cr0 &= ~CR0_RESERVED_BITS;
 506
 507         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 508                 return 1;
 509
 510         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 511                 return 1;
 512
 513         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 514 #ifdef CONFIG_X86_64
 515                 if ((vcpu->arch.efer & EFER_LME)) {
 516                         int cs_db, cs_l;
 517
 518                         if (!is_pae(vcpu))
 519                                 return 1;
 520                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 521                         if (cs_l)
 522                                 return 1;
 523                 } else
 524 #endif
 525                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 526                                                  kvm_read_cr3(vcpu)))
 527                         return 1;
 528         }
 529
 530         kvm_x86_ops->set_cr0(vcpu, cr0);
 531
 532         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 533                 kvm_clear_async_pf_completion_queue(vcpu);
 534                 kvm_async_pf_hash_reset(vcpu);
 535         }
 536
 537         if ((cr0 ^ old_cr0) & update_bits)
 538                 kvm_mmu_reset_context(vcpu);
 539         return 0;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 542
 543 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 544 {
 545         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 546 }
 547 EXPORT_SYMBOL_GPL(kvm_lmsw);
 548
 549 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 550 {
 551         u64 xcr0;
 552
 553         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 554         if (index != XCR_XFEATURE_ENABLED_MASK)
 555                 return 1;
 556         xcr0 = xcr;
 557         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 558                 return 1;
 559         if (!(xcr0 & XSTATE_FP))
 560                 return 1;
 561         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 562                 return 1;
 563         if (xcr0 & ~host_xcr0)
 564                 return 1;
 565         vcpu->arch.xcr0 = xcr0;
 566         vcpu->guest_xcr0_loaded = 0;
 567         return 0;
 568 }
 569
 570 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 571 {
 572         if (__kvm_set_xcr(vcpu, index, xcr)) {
 573                 kvm_inject_gp(vcpu, 0);
 574                 return 1;
 575         }
 576         return 0;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 579
 580 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 581 {
 582         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 583         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 584                                    X86_CR4_PAE | X86_CR4_SMEP;
 585         if (cr4 & CR4_RESERVED_BITS)
 586                 return 1;
 587
 588         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 589                 return 1;
 590
 591         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 592                 return 1;
 593
 594         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 595                 return 1;
 596
 597         if (is_long_mode(vcpu)) {
 598                 if (!(cr4 & X86_CR4_PAE))
 599                         return 1;
 600         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 601                    && ((cr4 ^ old_cr4) & pdptr_bits)
 602                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 603                                    kvm_read_cr3(vcpu)))
 604                 return 1;
 605
 606         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 607                 return 1;
 608
 609         if ((cr4 ^ old_cr4) & pdptr_bits)
 610                 kvm_mmu_reset_context(vcpu);
 611
 612         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 613                 kvm_update_cpuid(vcpu);
 614
 615         return 0;
 616 }
 617 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 618
 619 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 620 {
 621         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 622                 kvm_mmu_sync_roots(vcpu);
 623                 kvm_mmu_flush_tlb(vcpu);
 624                 return 0;
 625         }
 626
 627         if (is_long_mode(vcpu)) {
 628                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 629                         return 1;
 630         } else {
 631                 if (is_pae(vcpu)) {
 632                         if (cr3 & CR3_PAE_RESERVED_BITS)
 633                                 return 1;
 634                         if (is_paging(vcpu) &&
 635                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 636                                 return 1;
 637                 }
 638                 /*
 639                  * We don't check reserved bits in nonpae mode, because
 640                  * this isn't enforced, and VMware depends on this.
 641                  */
 642         }
 643
 644         /*
 645          * Does the new cr3 value map to physical memory? (Note, we
 646          * catch an invalid cr3 even in real-mode, because it would
 647          * cause trouble later on when we turn on paging anyway.)
 648          *
 649          * A real CPU would silently accept an invalid cr3 and would
 650          * attempt to use it - with largely undefined (and often hard
 651          * to debug) behavior on the guest side.
 652          */
 653         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 654                 return 1;
 655         vcpu->arch.cr3 = cr3;
 656         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 657         vcpu->arch.mmu.new_cr3(vcpu);
 658         return 0;
 659 }
 660 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 661
 662 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 663 {
 664         if (cr8 & CR8_RESERVED_BITS)
 665                 return 1;
 666         if (irqchip_in_kernel(vcpu->kvm))
 667                 kvm_lapic_set_tpr(vcpu, cr8);
 668         else
 669                 vcpu->arch.cr8 = cr8;
 670         return 0;
 671 }
 672 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 673
 674 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 675 {
 676         if (irqchip_in_kernel(vcpu->kvm))
 677                 return kvm_lapic_get_cr8(vcpu);
 678         else
 679                 return vcpu->arch.cr8;
 680 }
 681 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 682
 683 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 684 {
 685         switch (dr) {
 686         case 0 ... 3:
 687                 vcpu->arch.db[dr] = val;
 688                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 689                         vcpu->arch.eff_db[dr] = val;
 690                 break;
 691         case 4:
 692                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 693                         return 1; /* #UD */
 694                 /* fall through */
 695         case 6:
 696                 if (val & 0xffffffff00000000ULL)
 697                         return -1; /* #GP */
 698                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 699                 break;
 700         case 5:
 701                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 702                         return 1; /* #UD */
 703                 /* fall through */
 704         default: /* 7 */
 705                 if (val & 0xffffffff00000000ULL)
 706                         return -1; /* #GP */
 707                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 708                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 709                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 710                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 711                 }
 712                 break;
 713         }
 714
 715         return 0;
 716 }
 717
 718 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 719 {
 720         int res;
 721
 722         res = __kvm_set_dr(vcpu, dr, val);
 723         if (res > 0)
 724                 kvm_queue_exception(vcpu, UD_VECTOR);
 725         else if (res < 0)
 726                 kvm_inject_gp(vcpu, 0);
 727
 728         return res;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_set_dr);
 731
 732 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 *val = vcpu->arch.db[dr];
 737                 break;
 738         case 4:
 739                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 740                         return 1;
 741                 /* fall through */
 742         case 6:
 743                 *val = vcpu->arch.dr6;
 744                 break;
 745         case 5:
 746                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 747                         return 1;
 748                 /* fall through */
 749         default: /* 7 */
 750                 *val = vcpu->arch.dr7;
 751                 break;
 752         }
 753
 754         return 0;
 755 }
 756
 757 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 758 {
 759         if (_kvm_get_dr(vcpu, dr, val)) {
 760                 kvm_queue_exception(vcpu, UD_VECTOR);
 761                 return 1;
 762         }
 763         return 0;
 764 }
 765 EXPORT_SYMBOL_GPL(kvm_get_dr);
 766
 767 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 768 {
 769         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 770         u64 data;
 771         int err;
 772
 773         err = kvm_pmu_read_pmc(vcpu, ecx, &data);
 774         if (err)
 775                 return err;
 776         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 777         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 778         return err;
 779 }
 780 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 781
 782 /*
 783  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 784  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 785  *
 786  * This list is modified at module load time to reflect the
 787  * capabilities of the host cpu. This capabilities test skips MSRs that are
 788  * kvm-specific. Those are put in the beginning of the list.
 789  */
 790
 791 #define KVM_SAVE_MSRS_BEGIN     9
 792 static u32 msrs_to_save[] = {
 793         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 794         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 795         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 796         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 797         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 798         MSR_STAR,
 799 #ifdef CONFIG_X86_64
 800         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 801 #endif
 802         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 803 };
 804
 805 static unsigned num_msrs_to_save;
 806
 807 static u32 emulated_msrs[] = {
 808         MSR_IA32_TSCDEADLINE,
 809         MSR_IA32_MISC_ENABLE,
 810         MSR_IA32_MCG_STATUS,
 811         MSR_IA32_MCG_CTL,
 812 };
 813
 814 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 815 {
 816         u64 old_efer = vcpu->arch.efer;
 817
 818         if (efer & efer_reserved_bits)
 819                 return 1;
 820
 821         if (is_paging(vcpu)
 822             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 823                 return 1;
 824
 825         if (efer & EFER_FFXSR) {
 826                 struct kvm_cpuid_entry2 *feat;
 827
 828                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 829                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 830                         return 1;
 831         }
 832
 833         if (efer & EFER_SVME) {
 834                 struct kvm_cpuid_entry2 *feat;
 835
 836                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 837                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 838                         return 1;
 839         }
 840
 841         efer &= ~EFER_LMA;
 842         efer |= vcpu->arch.efer & EFER_LMA;
 843
 844         kvm_x86_ops->set_efer(vcpu, efer);
 845
 846         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 847
 848         /* Update reserved bits */
 849         if ((efer ^ old_efer) & EFER_NX)
 850                 kvm_mmu_reset_context(vcpu);
 851
 852         return 0;
 853 }
 854
 855 void kvm_enable_efer_bits(u64 mask)
 856 {
 857        efer_reserved_bits &= ~mask;
 858 }
 859 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 860
 861
 862 /*
 863  * Writes msr value into into the appropriate "register".
 864  * Returns 0 on success, non-0 otherwise.
 865  * Assumes vcpu_load() was already called.
 866  */
 867 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 868 {
 869         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 870 }
 871
 872 /*
 873  * Adapt set_msr() to msr_io()'s calling convention
 874  */
 875 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 876 {
 877         return kvm_set_msr(vcpu, index, *data);
 878 }
 879
 880 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 881 {
 882         int version;
 883         int r;
 884         struct pvclock_wall_clock wc;
 885         struct timespec boot;
 886
 887         if (!wall_clock)
 888                 return;
 889
 890         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 891         if (r)
 892                 return;
 893
 894         if (version & 1)
 895                 ++version;  /* first time write, random junk */
 896
 897         ++version;
 898
 899         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 900
 901         /*
 902          * The guest calculates current wall clock time by adding
 903          * system time (updated by kvm_guest_time_update below) to the
 904          * wall clock specified here.  guest system time equals host
 905          * system time for us, thus we must fill in host boot time here.
 906          */
 907         getboottime(&boot);
 908
 909         wc.sec = boot.tv_sec;
 910         wc.nsec = boot.tv_nsec;
 911         wc.version = version;
 912
 913         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 914
 915         version++;
 916         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 917 }
 918
 919 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 920 {
 921         uint32_t quotient, remainder;
 922
 923         /* Don't try to replace with do_div(), this one calculates
 924          * "(dividend << 32) / divisor" */
 925         __asm__ ( "divl %4"
 926                   : "=a" (quotient), "=d" (remainder)
 927                   : "0" (0), "1" (dividend), "r" (divisor) );
 928         return quotient;
 929 }
 930
 931 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 932                                s8 *pshift, u32 *pmultiplier)
 933 {
 934         uint64_t scaled64;
 935         int32_t  shift = 0;
 936         uint64_t tps64;
 937         uint32_t tps32;
 938
 939         tps64 = base_khz * 1000LL;
 940         scaled64 = scaled_khz * 1000LL;
 941         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 942                 tps64 >>= 1;
 943                 shift--;
 944         }
 945
 946         tps32 = (uint32_t)tps64;
 947         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 948                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 949                         scaled64 >>= 1;
 950                 else
 951                         tps32 <<= 1;
 952                 shift++;
 953         }
 954
 955         *pshift = shift;
 956         *pmultiplier = div_frac(scaled64, tps32);
 957
 958         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 959                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 960 }
 961
 962 static inline u64 get_kernel_ns(void)
 963 {
 964         struct timespec ts;
 965
 966         WARN_ON(preemptible());
 967         ktime_get_ts(&ts);
 968         monotonic_to_bootbased(&ts);
 969         return timespec_to_ns(&ts);
 970 }
 971
 972 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 973 unsigned long max_tsc_khz;
 974
 975 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
 976 {
 977         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
 978                                    vcpu->arch.virtual_tsc_shift);
 979 }
 980
 981 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
 982 {
 983         u64 v = (u64)khz * (1000000 + ppm);
 984         do_div(v, 1000000);
 985         return v;
 986 }
 987
 988 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
 989 {
 990         u32 thresh_lo, thresh_hi;
 991         int use_scaling = 0;
 992
 993         /* Compute a scale to convert nanoseconds in TSC cycles */
 994         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
 995                            &vcpu->arch.virtual_tsc_shift,
 996                            &vcpu->arch.virtual_tsc_mult);
 997         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
 998
 999         /*
1000          * Compute the variation in TSC rate which is acceptable
1001          * within the range of tolerance and decide if the
1002          * rate being applied is within that bounds of the hardware
1003          * rate.  If so, no scaling or compensation need be done.
1004          */
1005         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1006         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1007         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1008                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1009                 use_scaling = 1;
1010         }
1011         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1012 }
1013
1014 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1015 {
1016         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1017                                       vcpu->arch.virtual_tsc_mult,
1018                                       vcpu->arch.virtual_tsc_shift);
1019         tsc += vcpu->arch.last_tsc_write;
1020         return tsc;
1021 }
1022
1023 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1024 {
1025         struct kvm *kvm = vcpu->kvm;
1026         u64 offset, ns, elapsed;
1027         unsigned long flags;
1028         s64 nsdiff;
1029
1030         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1031         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1032         ns = get_kernel_ns();
1033         elapsed = ns - kvm->arch.last_tsc_nsec;
1034
1035         /* n.b - signed multiplication and division required */
1036         nsdiff = data - kvm->arch.last_tsc_write;
1037 #ifdef CONFIG_X86_64
1038         nsdiff = (nsdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1039 #else
1040         /* do_div() only does unsigned */
1041         asm("idivl %2; xor %%edx, %%edx"
1042             : "=A"(nsdiff)
1043             : "A"(nsdiff * 1000), "rm"(vcpu->arch.virtual_tsc_khz));
1044 #endif
1045         nsdiff -= elapsed;
1046         if (nsdiff < 0)
1047                 nsdiff = -nsdiff;
1048
1049         /*
1050          * Special case: TSC write with a small delta (1 second) of virtual
1051          * cycle time against real time is interpreted as an attempt to
1052          * synchronize the CPU.
1053          *
1054          * For a reliable TSC, we can match TSC offsets, and for an unstable
1055          * TSC, we add elapsed time in this computation.  We could let the
1056          * compensation code attempt to catch up if we fall behind, but
1057          * it's better to try to match offsets from the beginning.
1058          */
1059         if (nsdiff < NSEC_PER_SEC &&
1060             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1061                 if (!check_tsc_unstable()) {
1062                         offset = kvm->arch.last_tsc_offset;
1063                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1064                 } else {
1065                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1066                         data += delta;
1067                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1068                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1069                 }
1070         }
1071         kvm->arch.last_tsc_nsec = ns;
1072         kvm->arch.last_tsc_write = data;
1073         kvm->arch.last_tsc_offset = offset;
1074         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1075         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1076         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1077
1078         /* Reset of TSC must disable overshoot protection below */
1079         vcpu->arch.hv_clock.tsc_timestamp = 0;
1080         vcpu->arch.last_tsc_write = data;
1081         vcpu->arch.last_tsc_nsec = ns;
1082         vcpu->arch.last_guest_tsc = data;
1083 }
1084 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1085
1086 static int kvm_guest_time_update(struct kvm_vcpu *v)
1087 {
1088         unsigned long flags;
1089         struct kvm_vcpu_arch *vcpu = &v->arch;
1090         void *shared_kaddr;
1091         unsigned long this_tsc_khz;
1092         s64 kernel_ns, max_kernel_ns;
1093         u64 tsc_timestamp;
1094
1095         /* Keep irq disabled to prevent changes to the clock */
1096         local_irq_save(flags);
1097         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1098         kernel_ns = get_kernel_ns();
1099         this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1100         if (unlikely(this_tsc_khz == 0)) {
1101                 local_irq_restore(flags);
1102                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1103                 return 1;
1104         }
1105
1106         /*
1107          * We may have to catch up the TSC to match elapsed wall clock
1108          * time for two reasons, even if kvmclock is used.
1109          *   1) CPU could have been running below the maximum TSC rate
1110          *   2) Broken TSC compensation resets the base at each VCPU
1111          *      entry to avoid unknown leaps of TSC even when running
1112          *      again on the same CPU.  This may cause apparent elapsed
1113          *      time to disappear, and the guest to stand still or run
1114          *      very slowly.
1115          */
1116         if (vcpu->tsc_catchup) {
1117                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1118                 if (tsc > tsc_timestamp) {
1119                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1120                         tsc_timestamp = tsc;
1121                 }
1122         }
1123
1124         local_irq_restore(flags);
1125
1126         if (!vcpu->time_page)
1127                 return 0;
1128
1129         /*
1130          * Time as measured by the TSC may go backwards when resetting the base
1131          * tsc_timestamp.  The reason for this is that the TSC resolution is
1132          * higher than the resolution of the other clock scales.  Thus, many
1133          * possible measurments of the TSC correspond to one measurement of any
1134          * other clock, and so a spread of values is possible.  This is not a
1135          * problem for the computation of the nanosecond clock; with TSC rates
1136          * around 1GHZ, there can only be a few cycles which correspond to one
1137          * nanosecond value, and any path through this code will inevitably
1138          * take longer than that.  However, with the kernel_ns value itself,
1139          * the precision may be much lower, down to HZ granularity.  If the
1140          * first sampling of TSC against kernel_ns ends in the low part of the
1141          * range, and the second in the high end of the range, we can get:
1142          *
1143          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1144          *
1145          * As the sampling errors potentially range in the thousands of cycles,
1146          * it is possible such a time value has already been observed by the
1147          * guest.  To protect against this, we must compute the system time as
1148          * observed by the guest and ensure the new system time is greater.
1149          */
1150         max_kernel_ns = 0;
1151         if (vcpu->hv_clock.tsc_timestamp) {
1152                 max_kernel_ns = vcpu->last_guest_tsc -
1153                                 vcpu->hv_clock.tsc_timestamp;
1154                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1155                                     vcpu->hv_clock.tsc_to_system_mul,
1156                                     vcpu->hv_clock.tsc_shift);
1157                 max_kernel_ns += vcpu->last_kernel_ns;
1158         }
1159
1160         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1161                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1162                                    &vcpu->hv_clock.tsc_shift,
1163                                    &vcpu->hv_clock.tsc_to_system_mul);
1164                 vcpu->hw_tsc_khz = this_tsc_khz;
1165         }
1166
1167         if (max_kernel_ns > kernel_ns)
1168                 kernel_ns = max_kernel_ns;
1169
1170         /* With all the info we got, fill in the values */
1171         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1172         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1173         vcpu->last_kernel_ns = kernel_ns;
1174         vcpu->last_guest_tsc = tsc_timestamp;
1175         vcpu->hv_clock.flags = 0;
1176
1177         /*
1178          * The interface expects us to write an even number signaling that the
1179          * update is finished. Since the guest won't see the intermediate
1180          * state, we just increase by 2 at the end.
1181          */
1182         vcpu->hv_clock.version += 2;
1183
1184         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1185
1186         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1187                sizeof(vcpu->hv_clock));
1188
1189         kunmap_atomic(shared_kaddr, KM_USER0);
1190
1191         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1192         return 0;
1193 }
1194
1195 static bool msr_mtrr_valid(unsigned msr)
1196 {
1197         switch (msr) {
1198         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1199         case MSR_MTRRfix64K_00000:
1200         case MSR_MTRRfix16K_80000:
1201         case MSR_MTRRfix16K_A0000:
1202         case MSR_MTRRfix4K_C0000:
1203         case MSR_MTRRfix4K_C8000:
1204         case MSR_MTRRfix4K_D0000:
1205         case MSR_MTRRfix4K_D8000:
1206         case MSR_MTRRfix4K_E0000:
1207         case MSR_MTRRfix4K_E8000:
1208         case MSR_MTRRfix4K_F0000:
1209         case MSR_MTRRfix4K_F8000:
1210         case MSR_MTRRdefType:
1211         case MSR_IA32_CR_PAT:
1212                 return true;
1213         case 0x2f8:
1214                 return true;
1215         }
1216         return false;
1217 }
1218
1219 static bool valid_pat_type(unsigned t)
1220 {
1221         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1222 }
1223
1224 static bool valid_mtrr_type(unsigned t)
1225 {
1226         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1227 }
1228
1229 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1230 {
1231         int i;
1232
1233         if (!msr_mtrr_valid(msr))
1234                 return false;
1235
1236         if (msr == MSR_IA32_CR_PAT) {
1237                 for (i = 0; i < 8; i++)
1238                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1239                                 return false;
1240                 return true;
1241         } else if (msr == MSR_MTRRdefType) {
1242                 if (data & ~0xcff)
1243                         return false;
1244                 return valid_mtrr_type(data & 0xff);
1245         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1246                 for (i = 0; i < 8 ; i++)
1247                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1248                                 return false;
1249                 return true;
1250         }
1251
1252         /* variable MTRRs */
1253         return valid_mtrr_type(data & 0xff);
1254 }
1255
1256 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1257 {
1258         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1259
1260         if (!mtrr_valid(vcpu, msr, data))
1261                 return 1;
1262
1263         if (msr == MSR_MTRRdefType) {
1264                 vcpu->arch.mtrr_state.def_type = data;
1265                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1266         } else if (msr == MSR_MTRRfix64K_00000)
1267                 p[0] = data;
1268         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1269                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1270         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1271                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1272         else if (msr == MSR_IA32_CR_PAT)
1273                 vcpu->arch.pat = data;
1274         else {  /* Variable MTRRs */
1275                 int idx, is_mtrr_mask;
1276                 u64 *pt;
1277
1278                 idx = (msr - 0x200) / 2;
1279                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1280                 if (!is_mtrr_mask)
1281                         pt =
1282                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1283                 else
1284                         pt =
1285                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1286                 *pt = data;
1287         }
1288
1289         kvm_mmu_reset_context(vcpu);
1290         return 0;
1291 }
1292
1293 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1294 {
1295         u64 mcg_cap = vcpu->arch.mcg_cap;
1296         unsigned bank_num = mcg_cap & 0xff;
1297
1298         switch (msr) {
1299         case MSR_IA32_MCG_STATUS:
1300                 vcpu->arch.mcg_status = data;
1301                 break;
1302         case MSR_IA32_MCG_CTL:
1303                 if (!(mcg_cap & MCG_CTL_P))
1304                         return 1;
1305                 if (data != 0 && data != ~(u64)0)
1306                         return -1;
1307                 vcpu->arch.mcg_ctl = data;
1308                 break;
1309         default:
1310                 if (msr >= MSR_IA32_MC0_CTL &&
1311                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1312                         u32 offset = msr - MSR_IA32_MC0_CTL;
1313                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1314                          * some Linux kernels though clear bit 10 in bank 4 to
1315                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1316                          * this to avoid an uncatched #GP in the guest
1317                          */
1318                         if ((offset & 0x3) == 0 &&
1319                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1320                                 return -1;
1321                         vcpu->arch.mce_banks[offset] = data;
1322                         break;
1323                 }
1324                 return 1;
1325         }
1326         return 0;
1327 }
1328
1329 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1330 {
1331         struct kvm *kvm = vcpu->kvm;
1332         int lm = is_long_mode(vcpu);
1333         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1334                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1335         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1336                 : kvm->arch.xen_hvm_config.blob_size_32;
1337         u32 page_num = data & ~PAGE_MASK;
1338         u64 page_addr = data & PAGE_MASK;
1339         u8 *page;
1340         int r;
1341
1342         r = -E2BIG;
1343         if (page_num >= blob_size)
1344                 goto out;
1345         r = -ENOMEM;
1346         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1347         if (IS_ERR(page)) {
1348                 r = PTR_ERR(page);
1349                 goto out;
1350         }
1351         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1352                 goto out_free;
1353         r = 0;
1354 out_free:
1355         kfree(page);
1356 out:
1357         return r;
1358 }
1359
1360 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1361 {
1362         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1363 }
1364
1365 static bool kvm_hv_msr_partition_wide(u32 msr)
1366 {
1367         bool r = false;
1368         switch (msr) {
1369         case HV_X64_MSR_GUEST_OS_ID:
1370         case HV_X64_MSR_HYPERCALL:
1371                 r = true;
1372                 break;
1373         }
1374
1375         return r;
1376 }
1377
1378 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1379 {
1380         struct kvm *kvm = vcpu->kvm;
1381
1382         switch (msr) {
1383         case HV_X64_MSR_GUEST_OS_ID:
1384                 kvm->arch.hv_guest_os_id = data;
1385                 /* setting guest os id to zero disables hypercall page */
1386                 if (!kvm->arch.hv_guest_os_id)
1387                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1388                 break;
1389         case HV_X64_MSR_HYPERCALL: {
1390                 u64 gfn;
1391                 unsigned long addr;
1392                 u8 instructions[4];
1393
1394                 /* if guest os id is not set hypercall should remain disabled */
1395                 if (!kvm->arch.hv_guest_os_id)
1396                         break;
1397                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1398                         kvm->arch.hv_hypercall = data;
1399                         break;
1400                 }
1401                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1402                 addr = gfn_to_hva(kvm, gfn);
1403                 if (kvm_is_error_hva(addr))
1404                         return 1;
1405                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1406                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1407                 if (__copy_to_user((void __user *)addr, instructions, 4))
1408                         return 1;
1409                 kvm->arch.hv_hypercall = data;
1410                 break;
1411         }
1412         default:
1413                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1414                           "data 0x%llx\n", msr, data);
1415                 return 1;
1416         }
1417         return 0;
1418 }
1419
1420 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1421 {
1422         switch (msr) {
1423         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1424                 unsigned long addr;
1425
1426                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1427                         vcpu->arch.hv_vapic = data;
1428                         break;
1429                 }
1430                 addr = gfn_to_hva(vcpu->kvm, data >>
1431                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1432                 if (kvm_is_error_hva(addr))
1433                         return 1;
1434                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1435                         return 1;
1436                 vcpu->arch.hv_vapic = data;
1437                 break;
1438         }
1439         case HV_X64_MSR_EOI:
1440                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1441         case HV_X64_MSR_ICR:
1442                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1443         case HV_X64_MSR_TPR:
1444                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1445         default:
1446                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1447                           "data 0x%llx\n", msr, data);
1448                 return 1;
1449         }
1450
1451         return 0;
1452 }
1453
1454 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1455 {
1456         gpa_t gpa = data & ~0x3f;
1457
1458         /* Bits 2:5 are resrved, Should be zero */
1459         if (data & 0x3c)
1460                 return 1;
1461
1462         vcpu->arch.apf.msr_val = data;
1463
1464         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1465                 kvm_clear_async_pf_completion_queue(vcpu);
1466                 kvm_async_pf_hash_reset(vcpu);
1467                 return 0;
1468         }
1469
1470         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1471                 return 1;
1472
1473         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1474         kvm_async_pf_wakeup_all(vcpu);
1475         return 0;
1476 }
1477
1478 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1479 {
1480         if (vcpu->arch.time_page) {
1481                 kvm_release_page_dirty(vcpu->arch.time_page);
1482                 vcpu->arch.time_page = NULL;
1483         }
1484 }
1485
1486 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1487 {
1488         u64 delta;
1489
1490         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1491                 return;
1492
1493         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1494         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1495         vcpu->arch.st.accum_steal = delta;
1496 }
1497
1498 static void record_steal_time(struct kvm_vcpu *vcpu)
1499 {
1500         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1501                 return;
1502
1503         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1504                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1505                 return;
1506
1507         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1508         vcpu->arch.st.steal.version += 2;
1509         vcpu->arch.st.accum_steal = 0;
1510
1511         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1512                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1513 }
1514
1515 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1516 {
1517         bool pr = false;
1518
1519         switch (msr) {
1520         case MSR_EFER:
1521                 return set_efer(vcpu, data);
1522         case MSR_K7_HWCR:
1523                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1524                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1525                 if (data != 0) {
1526                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1527                                 data);
1528                         return 1;
1529                 }
1530                 break;
1531         case MSR_FAM10H_MMIO_CONF_BASE:
1532                 if (data != 0) {
1533                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1534                                 "0x%llx\n", data);
1535                         return 1;
1536                 }
1537                 break;
1538         case MSR_AMD64_NB_CFG:
1539                 break;
1540         case MSR_IA32_DEBUGCTLMSR:
1541                 if (!data) {
1542                         /* We support the non-activated case already */
1543                         break;
1544                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1545                         /* Values other than LBR and BTF are vendor-specific,
1546                            thus reserved and should throw a #GP */
1547                         return 1;
1548                 }
1549                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1550                         __func__, data);
1551                 break;
1552         case MSR_IA32_UCODE_REV:
1553         case MSR_IA32_UCODE_WRITE:
1554         case MSR_VM_HSAVE_PA:
1555         case MSR_AMD64_PATCH_LOADER:
1556                 break;
1557         case 0x200 ... 0x2ff:
1558                 return set_msr_mtrr(vcpu, msr, data);
1559         case MSR_IA32_APICBASE:
1560                 kvm_set_apic_base(vcpu, data);
1561                 break;
1562         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1563                 return kvm_x2apic_msr_write(vcpu, msr, data);
1564         case MSR_IA32_TSCDEADLINE:
1565                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1566                 break;
1567         case MSR_IA32_MISC_ENABLE:
1568                 vcpu->arch.ia32_misc_enable_msr = data;
1569                 break;
1570         case MSR_KVM_WALL_CLOCK_NEW:
1571         case MSR_KVM_WALL_CLOCK:
1572                 vcpu->kvm->arch.wall_clock = data;
1573                 kvm_write_wall_clock(vcpu->kvm, data);
1574                 break;
1575         case MSR_KVM_SYSTEM_TIME_NEW:
1576         case MSR_KVM_SYSTEM_TIME: {
1577                 kvmclock_reset(vcpu);
1578
1579                 vcpu->arch.time = data;
1580                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1581
1582                 /* we verify if the enable bit is set... */
1583                 if (!(data & 1))
1584                         break;
1585
1586                 /* ...but clean it before doing the actual write */
1587                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1588
1589                 vcpu->arch.time_page =
1590                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1591
1592                 if (is_error_page(vcpu->arch.time_page)) {
1593                         kvm_release_page_clean(vcpu->arch.time_page);
1594                         vcpu->arch.time_page = NULL;
1595                 }
1596                 break;
1597         }
1598         case MSR_KVM_ASYNC_PF_EN:
1599                 if (kvm_pv_enable_async_pf(vcpu, data))
1600                         return 1;
1601                 break;
1602         case MSR_KVM_STEAL_TIME:
1603
1604                 if (unlikely(!sched_info_on()))
1605                         return 1;
1606
1607                 if (data & KVM_STEAL_RESERVED_MASK)
1608                         return 1;
1609
1610                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1611                                                         data & KVM_STEAL_VALID_BITS))
1612                         return 1;
1613
1614                 vcpu->arch.st.msr_val = data;
1615
1616                 if (!(data & KVM_MSR_ENABLED))
1617                         break;
1618
1619                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1620
1621                 preempt_disable();
1622                 accumulate_steal_time(vcpu);
1623                 preempt_enable();
1624
1625                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1626
1627                 break;
1628
1629         case MSR_IA32_MCG_CTL:
1630         case MSR_IA32_MCG_STATUS:
1631         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1632                 return set_msr_mce(vcpu, msr, data);
1633
1634         /* Performance counters are not protected by a CPUID bit,
1635          * so we should check all of them in the generic path for the sake of
1636          * cross vendor migration.
1637          * Writing a zero into the event select MSRs disables them,
1638          * which we perfectly emulate ;-). Any other value should be at least
1639          * reported, some guests depend on them.
1640          */
1641         case MSR_K7_EVNTSEL0:
1642         case MSR_K7_EVNTSEL1:
1643         case MSR_K7_EVNTSEL2:
1644         case MSR_K7_EVNTSEL3:
1645                 if (data != 0)
1646                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1647                                 "0x%x data 0x%llx\n", msr, data);
1648                 break;
1649         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1650          * so we ignore writes to make it happy.
1651          */
1652         case MSR_K7_PERFCTR0:
1653         case MSR_K7_PERFCTR1:
1654         case MSR_K7_PERFCTR2:
1655         case MSR_K7_PERFCTR3:
1656                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1657                         "0x%x data 0x%llx\n", msr, data);
1658                 break;
1659         case MSR_P6_PERFCTR0:
1660         case MSR_P6_PERFCTR1:
1661                 pr = true;
1662         case MSR_P6_EVNTSEL0:
1663         case MSR_P6_EVNTSEL1:
1664                 if (kvm_pmu_msr(vcpu, msr))
1665                         return kvm_pmu_set_msr(vcpu, msr, data);
1666
1667                 if (pr || data != 0)
1668                         pr_unimpl(vcpu, "disabled perfctr wrmsr: "
1669                                 "0x%x data 0x%llx\n", msr, data);
1670                 break;
1671         case MSR_K7_CLK_CTL:
1672                 /*
1673                  * Ignore all writes to this no longer documented MSR.
1674                  * Writes are only relevant for old K7 processors,
1675                  * all pre-dating SVM, but a recommended workaround from
1676                  * AMD for these chips. It is possible to speicify the
1677                  * affected processor models on the command line, hence
1678                  * the need to ignore the workaround.
1679                  */
1680                 break;
1681         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1682                 if (kvm_hv_msr_partition_wide(msr)) {
1683                         int r;
1684                         mutex_lock(&vcpu->kvm->lock);
1685                         r = set_msr_hyperv_pw(vcpu, msr, data);
1686                         mutex_unlock(&vcpu->kvm->lock);
1687                         return r;
1688                 } else
1689                         return set_msr_hyperv(vcpu, msr, data);
1690                 break;
1691         case MSR_IA32_BBL_CR_CTL3:
1692                 /* Drop writes to this legacy MSR -- see rdmsr
1693                  * counterpart for further detail.
1694                  */
1695                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1696                 break;
1697         case MSR_AMD64_OSVW_ID_LENGTH:
1698                 if (!guest_cpuid_has_osvw(vcpu))
1699                         return 1;
1700                 vcpu->arch.osvw.length = data;
1701                 break;
1702         case MSR_AMD64_OSVW_STATUS:
1703                 if (!guest_cpuid_has_osvw(vcpu))
1704                         return 1;
1705                 vcpu->arch.osvw.status = data;
1706                 break;
1707         default:
1708                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1709                         return xen_hvm_config(vcpu, data);
1710                 if (kvm_pmu_msr(vcpu, msr))
1711                         return kvm_pmu_set_msr(vcpu, msr, data);
1712                 if (!ignore_msrs) {
1713                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1714                                 msr, data);
1715                         return 1;
1716                 } else {
1717                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1718                                 msr, data);
1719                         break;
1720                 }
1721         }
1722         return 0;
1723 }
1724 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1725
1726
1727 /*
1728  * Reads an msr value (of 'msr_index') into 'pdata'.
1729  * Returns 0 on success, non-0 otherwise.
1730  * Assumes vcpu_load() was already called.
1731  */
1732 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1733 {
1734         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1735 }
1736
1737 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1738 {
1739         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1740
1741         if (!msr_mtrr_valid(msr))
1742                 return 1;
1743
1744         if (msr == MSR_MTRRdefType)
1745                 *pdata = vcpu->arch.mtrr_state.def_type +
1746                          (vcpu->arch.mtrr_state.enabled << 10);
1747         else if (msr == MSR_MTRRfix64K_00000)
1748                 *pdata = p[0];
1749         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1750                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1751         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1752                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1753         else if (msr == MSR_IA32_CR_PAT)
1754                 *pdata = vcpu->arch.pat;
1755         else {  /* Variable MTRRs */
1756                 int idx, is_mtrr_mask;
1757                 u64 *pt;
1758
1759                 idx = (msr - 0x200) / 2;
1760                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1761                 if (!is_mtrr_mask)
1762                         pt =
1763                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1764                 else
1765                         pt =
1766                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1767                 *pdata = *pt;
1768         }
1769
1770         return 0;
1771 }
1772
1773 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1774 {
1775         u64 data;
1776         u64 mcg_cap = vcpu->arch.mcg_cap;
1777         unsigned bank_num = mcg_cap & 0xff;
1778
1779         switch (msr) {
1780         case MSR_IA32_P5_MC_ADDR:
1781         case MSR_IA32_P5_MC_TYPE:
1782                 data = 0;
1783                 break;
1784         case MSR_IA32_MCG_CAP:
1785                 data = vcpu->arch.mcg_cap;
1786                 break;
1787         case MSR_IA32_MCG_CTL:
1788                 if (!(mcg_cap & MCG_CTL_P))
1789                         return 1;
1790                 data = vcpu->arch.mcg_ctl;
1791                 break;
1792         case MSR_IA32_MCG_STATUS:
1793                 data = vcpu->arch.mcg_status;
1794                 break;
1795         default:
1796                 if (msr >= MSR_IA32_MC0_CTL &&
1797                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1798                         u32 offset = msr - MSR_IA32_MC0_CTL;
1799                         data = vcpu->arch.mce_banks[offset];
1800                         break;
1801                 }
1802                 return 1;
1803         }
1804         *pdata = data;
1805         return 0;
1806 }
1807
1808 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1809 {
1810         u64 data = 0;
1811         struct kvm *kvm = vcpu->kvm;
1812
1813         switch (msr) {
1814         case HV_X64_MSR_GUEST_OS_ID:
1815                 data = kvm->arch.hv_guest_os_id;
1816                 break;
1817         case HV_X64_MSR_HYPERCALL:
1818                 data = kvm->arch.hv_hypercall;
1819                 break;
1820         default:
1821                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1822                 return 1;
1823         }
1824
1825         *pdata = data;
1826         return 0;
1827 }
1828
1829 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1830 {
1831         u64 data = 0;
1832
1833         switch (msr) {
1834         case HV_X64_MSR_VP_INDEX: {
1835                 int r;
1836                 struct kvm_vcpu *v;
1837                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1838                         if (v == vcpu)
1839                                 data = r;
1840                 break;
1841         }
1842         case HV_X64_MSR_EOI:
1843                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1844         case HV_X64_MSR_ICR:
1845                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1846         case HV_X64_MSR_TPR:
1847                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1848         case HV_X64_MSR_APIC_ASSIST_PAGE:
1849                 data = vcpu->arch.hv_vapic;
1850                 break;
1851         default:
1852                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1853                 return 1;
1854         }
1855         *pdata = data;
1856         return 0;
1857 }
1858
1859 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1860 {
1861         u64 data;
1862
1863         switch (msr) {
1864         case MSR_IA32_PLATFORM_ID:
1865         case MSR_IA32_EBL_CR_POWERON:
1866         case MSR_IA32_DEBUGCTLMSR:
1867         case MSR_IA32_LASTBRANCHFROMIP:
1868         case MSR_IA32_LASTBRANCHTOIP:
1869         case MSR_IA32_LASTINTFROMIP:
1870         case MSR_IA32_LASTINTTOIP:
1871         case MSR_K8_SYSCFG:
1872         case MSR_K7_HWCR:
1873         case MSR_VM_HSAVE_PA:
1874         case MSR_K7_EVNTSEL0:
1875         case MSR_K7_PERFCTR0:
1876         case MSR_K8_INT_PENDING_MSG:
1877         case MSR_AMD64_NB_CFG:
1878         case MSR_FAM10H_MMIO_CONF_BASE:
1879                 data = 0;
1880                 break;
1881         case MSR_P6_PERFCTR0:
1882         case MSR_P6_PERFCTR1:
1883         case MSR_P6_EVNTSEL0:
1884         case MSR_P6_EVNTSEL1:
1885                 if (kvm_pmu_msr(vcpu, msr))
1886                         return kvm_pmu_get_msr(vcpu, msr, pdata);
1887                 data = 0;
1888                 break;
1889         case MSR_IA32_UCODE_REV:
1890                 data = 0x100000000ULL;
1891                 break;
1892         case MSR_MTRRcap:
1893                 data = 0x500 | KVM_NR_VAR_MTRR;
1894                 break;
1895         case 0x200 ... 0x2ff:
1896                 return get_msr_mtrr(vcpu, msr, pdata);
1897         case 0xcd: /* fsb frequency */
1898                 data = 3;
1899                 break;
1900                 /*
1901                  * MSR_EBC_FREQUENCY_ID
1902                  * Conservative value valid for even the basic CPU models.
1903                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1904                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1905                  * and 266MHz for model 3, or 4. Set Core Clock
1906                  * Frequency to System Bus Frequency Ratio to 1 (bits
1907                  * 31:24) even though these are only valid for CPU
1908                  * models > 2, however guests may end up dividing or
1909                  * multiplying by zero otherwise.
1910                  */
1911         case MSR_EBC_FREQUENCY_ID:
1912                 data = 1 << 24;
1913                 break;
1914         case MSR_IA32_APICBASE:
1915                 data = kvm_get_apic_base(vcpu);
1916                 break;
1917         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1918                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1919                 break;
1920         case MSR_IA32_TSCDEADLINE:
1921                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1922                 break;
1923         case MSR_IA32_MISC_ENABLE:
1924                 data = vcpu->arch.ia32_misc_enable_msr;
1925                 break;
1926         case MSR_IA32_PERF_STATUS:
1927                 /* TSC increment by tick */
1928                 data = 1000ULL;
1929                 /* CPU multiplier */
1930                 data |= (((uint64_t)4ULL) << 40);
1931                 break;
1932         case MSR_EFER:
1933                 data = vcpu->arch.efer;
1934                 break;
1935         case MSR_KVM_WALL_CLOCK:
1936         case MSR_KVM_WALL_CLOCK_NEW:
1937                 data = vcpu->kvm->arch.wall_clock;
1938                 break;
1939         case MSR_KVM_SYSTEM_TIME:
1940         case MSR_KVM_SYSTEM_TIME_NEW:
1941                 data = vcpu->arch.time;
1942                 break;
1943         case MSR_KVM_ASYNC_PF_EN:
1944                 data = vcpu->arch.apf.msr_val;
1945                 break;
1946         case MSR_KVM_STEAL_TIME:
1947                 data = vcpu->arch.st.msr_val;
1948                 break;
1949         case MSR_IA32_P5_MC_ADDR:
1950         case MSR_IA32_P5_MC_TYPE:
1951         case MSR_IA32_MCG_CAP:
1952         case MSR_IA32_MCG_CTL:
1953         case MSR_IA32_MCG_STATUS:
1954         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1955                 return get_msr_mce(vcpu, msr, pdata);
1956         case MSR_K7_CLK_CTL:
1957                 /*
1958                  * Provide expected ramp-up count for K7. All other
1959                  * are set to zero, indicating minimum divisors for
1960                  * every field.
1961                  *
1962                  * This prevents guest kernels on AMD host with CPU
1963                  * type 6, model 8 and higher from exploding due to
1964                  * the rdmsr failing.
1965                  */
1966                 data = 0x20000000;
1967                 break;
1968         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1969                 if (kvm_hv_msr_partition_wide(msr)) {
1970                         int r;
1971                         mutex_lock(&vcpu->kvm->lock);
1972                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1973                         mutex_unlock(&vcpu->kvm->lock);
1974                         return r;
1975                 } else
1976                         return get_msr_hyperv(vcpu, msr, pdata);
1977                 break;
1978         case MSR_IA32_BBL_CR_CTL3:
1979                 /* This legacy MSR exists but isn't fully documented in current
1980                  * silicon.  It is however accessed by winxp in very narrow
1981                  * scenarios where it sets bit #19, itself documented as
1982                  * a "reserved" bit.  Best effort attempt to source coherent
1983                  * read data here should the balance of the register be
1984                  * interpreted by the guest:
1985                  *
1986                  * L2 cache control register 3: 64GB range, 256KB size,
1987                  * enabled, latency 0x1, configured
1988                  */
1989                 data = 0xbe702111;
1990                 break;
1991         case MSR_AMD64_OSVW_ID_LENGTH:
1992                 if (!guest_cpuid_has_osvw(vcpu))
1993                         return 1;
1994                 data = vcpu->arch.osvw.length;
1995                 break;
1996         case MSR_AMD64_OSVW_STATUS:
1997                 if (!guest_cpuid_has_osvw(vcpu))
1998                         return 1;
1999                 data = vcpu->arch.osvw.status;
2000                 break;
2001         default:
2002                 if (kvm_pmu_msr(vcpu, msr))
2003                         return kvm_pmu_get_msr(vcpu, msr, pdata);
2004                 if (!ignore_msrs) {
2005                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
2006                         return 1;
2007                 } else {
2008                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
2009                         data = 0;
2010                 }
2011                 break;
2012         }
2013         *pdata = data;
2014         return 0;
2015 }
2016 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2017
2018 /*
2019  * Read or write a bunch of msrs. All parameters are kernel addresses.
2020  *
2021  * @return number of msrs set successfully.
2022  */
2023 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2024                     struct kvm_msr_entry *entries,
2025                     int (*do_msr)(struct kvm_vcpu *vcpu,
2026                                   unsigned index, u64 *data))
2027 {
2028         int i, idx;
2029
2030         idx = srcu_read_lock(&vcpu->kvm->srcu);
2031         for (i = 0; i < msrs->nmsrs; ++i)
2032                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2033                         break;
2034         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2035
2036         return i;
2037 }
2038
2039 /*
2040  * Read or write a bunch of msrs. Parameters are user addresses.
2041  *
2042  * @return number of msrs set successfully.
2043  */
2044 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2045                   int (*do_msr)(struct kvm_vcpu *vcpu,
2046                                 unsigned index, u64 *data),
2047                   int writeback)
2048 {
2049         struct kvm_msrs msrs;
2050         struct kvm_msr_entry *entries;
2051         int r, n;
2052         unsigned size;
2053
2054         r = -EFAULT;
2055         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2056                 goto out;
2057
2058         r = -E2BIG;
2059         if (msrs.nmsrs >= MAX_IO_MSRS)
2060                 goto out;
2061
2062         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2063         entries = memdup_user(user_msrs->entries, size);
2064         if (IS_ERR(entries)) {
2065                 r = PTR_ERR(entries);
2066                 goto out;
2067         }
2068
2069         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2070         if (r < 0)
2071                 goto out_free;
2072
2073         r = -EFAULT;
2074         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2075                 goto out_free;
2076
2077         r = n;
2078
2079 out_free:
2080         kfree(entries);
2081 out:
2082         return r;
2083 }
2084
2085 int kvm_dev_ioctl_check_extension(long ext)
2086 {
2087         int r;
2088
2089         switch (ext) {
2090         case KVM_CAP_IRQCHIP:
2091         case KVM_CAP_HLT:
2092         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2093         case KVM_CAP_SET_TSS_ADDR:
2094         case KVM_CAP_EXT_CPUID:
2095         case KVM_CAP_CLOCKSOURCE:
2096         case KVM_CAP_PIT:
2097         case KVM_CAP_NOP_IO_DELAY:
2098         case KVM_CAP_MP_STATE:
2099         case KVM_CAP_SYNC_MMU:
2100         case KVM_CAP_USER_NMI:
2101         case KVM_CAP_REINJECT_CONTROL:
2102         case KVM_CAP_IRQ_INJECT_STATUS:
2103         case KVM_CAP_ASSIGN_DEV_IRQ:
2104         case KVM_CAP_IRQFD:
2105         case KVM_CAP_IOEVENTFD:
2106         case KVM_CAP_PIT2:
2107         case KVM_CAP_PIT_STATE2:
2108         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2109         case KVM_CAP_XEN_HVM:
2110         case KVM_CAP_ADJUST_CLOCK:
2111         case KVM_CAP_VCPU_EVENTS:
2112         case KVM_CAP_HYPERV:
2113         case KVM_CAP_HYPERV_VAPIC:
2114         case KVM_CAP_HYPERV_SPIN:
2115         case KVM_CAP_PCI_SEGMENT:
2116         case KVM_CAP_DEBUGREGS:
2117         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2118         case KVM_CAP_XSAVE:
2119         case KVM_CAP_ASYNC_PF:
2120         case KVM_CAP_GET_TSC_KHZ:
2121                 r = 1;
2122                 break;
2123         case KVM_CAP_COALESCED_MMIO:
2124                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2125                 break;
2126         case KVM_CAP_VAPIC:
2127                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2128                 break;
2129         case KVM_CAP_NR_VCPUS:
2130                 r = KVM_SOFT_MAX_VCPUS;
2131                 break;
2132         case KVM_CAP_MAX_VCPUS:
2133                 r = KVM_MAX_VCPUS;
2134                 break;
2135         case KVM_CAP_NR_MEMSLOTS:
2136                 r = KVM_MEMORY_SLOTS;
2137                 break;
2138         case KVM_CAP_PV_MMU:    /* obsolete */
2139                 r = 0;
2140                 break;
2141         case KVM_CAP_IOMMU:
2142                 r = iommu_present(&pci_bus_type);
2143                 break;
2144         case KVM_CAP_MCE:
2145                 r = KVM_MAX_MCE_BANKS;
2146                 break;
2147         case KVM_CAP_XCRS:
2148                 r = cpu_has_xsave;
2149                 break;
2150         case KVM_CAP_TSC_CONTROL:
2151                 r = kvm_has_tsc_control;
2152                 break;
2153         case KVM_CAP_TSC_DEADLINE_TIMER:
2154                 r = boot_cpu_has(X86_FEATURE_TSC_DEADLINE_TIMER);
2155                 break;
2156         default:
2157                 r = 0;
2158                 break;
2159         }
2160         return r;
2161
2162 }
2163
2164 long kvm_arch_dev_ioctl(struct file *filp,
2165                         unsigned int ioctl, unsigned long arg)
2166 {
2167         void __user *argp = (void __user *)arg;
2168         long r;
2169
2170         switch (ioctl) {
2171         case KVM_GET_MSR_INDEX_LIST: {
2172                 struct kvm_msr_list __user *user_msr_list = argp;
2173                 struct kvm_msr_list msr_list;
2174                 unsigned n;
2175
2176                 r = -EFAULT;
2177                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2178                         goto out;
2179                 n = msr_list.nmsrs;
2180                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2181                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2182                         goto out;
2183                 r = -E2BIG;
2184                 if (n < msr_list.nmsrs)
2185                         goto out;
2186                 r = -EFAULT;
2187                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2188                                  num_msrs_to_save * sizeof(u32)))
2189                         goto out;
2190                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2191                                  &emulated_msrs,
2192                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2193                         goto out;
2194                 r = 0;
2195                 break;
2196         }
2197         case KVM_GET_SUPPORTED_CPUID: {
2198                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2199                 struct kvm_cpuid2 cpuid;
2200
2201                 r = -EFAULT;
2202                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2203                         goto out;
2204                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2205                                                       cpuid_arg->entries);
2206                 if (r)
2207                         goto out;
2208
2209                 r = -EFAULT;
2210                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2211                         goto out;
2212                 r = 0;
2213                 break;
2214         }
2215         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2216                 u64 mce_cap;
2217
2218                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2219                 r = -EFAULT;
2220                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2221                         goto out;
2222                 r = 0;
2223                 break;
2224         }
2225         default:
2226                 r = -EINVAL;
2227         }
2228 out:
2229         return r;
2230 }
2231
2232 static void wbinvd_ipi(void *garbage)
2233 {
2234         wbinvd();
2235 }
2236
2237 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2238 {
2239         return vcpu->kvm->arch.iommu_domain &&
2240                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2241 }
2242
2243 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2244 {
2245         /* Address WBINVD may be executed by guest */
2246         if (need_emulate_wbinvd(vcpu)) {
2247                 if (kvm_x86_ops->has_wbinvd_exit())
2248                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2249                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2250                         smp_call_function_single(vcpu->cpu,
2251                                         wbinvd_ipi, NULL, 1);
2252         }
2253
2254         kvm_x86_ops->vcpu_load(vcpu, cpu);
2255         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2256                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2257                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2258                 if (tsc_delta < 0)
2259                         mark_tsc_unstable("KVM discovered backwards TSC");
2260                 if (check_tsc_unstable()) {
2261                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2262                                                 vcpu->arch.last_guest_tsc);
2263                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2264                         vcpu->arch.tsc_catchup = 1;
2265                 }
2266                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2267                 if (vcpu->cpu != cpu)
2268                         kvm_migrate_timers(vcpu);
2269                 vcpu->cpu = cpu;
2270         }
2271
2272         accumulate_steal_time(vcpu);
2273         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2274 }
2275
2276 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2277 {
2278         kvm_x86_ops->vcpu_put(vcpu);
2279         kvm_put_guest_fpu(vcpu);
2280         vcpu->arch.last_host_tsc = native_read_tsc();
2281 }
2282
2283 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2284                                     struct kvm_lapic_state *s)
2285 {
2286         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2287
2288         return 0;
2289 }
2290
2291 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2292                                     struct kvm_lapic_state *s)
2293 {
2294         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2295         kvm_apic_post_state_restore(vcpu);
2296         update_cr8_intercept(vcpu);
2297
2298         return 0;
2299 }
2300
2301 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2302                                     struct kvm_interrupt *irq)
2303 {
2304         if (irq->irq < 0 || irq->irq >= 256)
2305                 return -EINVAL;
2306         if (irqchip_in_kernel(vcpu->kvm))
2307                 return -ENXIO;
2308
2309         kvm_queue_interrupt(vcpu, irq->irq, false);
2310         kvm_make_request(KVM_REQ_EVENT, vcpu);
2311
2312         return 0;
2313 }
2314
2315 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2316 {
2317         kvm_inject_nmi(vcpu);
2318
2319         return 0;
2320 }
2321
2322 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2323                                            struct kvm_tpr_access_ctl *tac)
2324 {
2325         if (tac->flags)
2326                 return -EINVAL;
2327         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2328         return 0;
2329 }
2330
2331 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2332                                         u64 mcg_cap)
2333 {
2334         int r;
2335         unsigned bank_num = mcg_cap & 0xff, bank;
2336
2337         r = -EINVAL;
2338         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2339                 goto out;
2340         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2341                 goto out;
2342         r = 0;
2343         vcpu->arch.mcg_cap = mcg_cap;
2344         /* Init IA32_MCG_CTL to all 1s */
2345         if (mcg_cap & MCG_CTL_P)
2346                 vcpu->arch.mcg_ctl = ~(u64)0;
2347         /* Init IA32_MCi_CTL to all 1s */
2348         for (bank = 0; bank < bank_num; bank++)
2349                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2350 out:
2351         return r;
2352 }
2353
2354 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2355                                       struct kvm_x86_mce *mce)
2356 {
2357         u64 mcg_cap = vcpu->arch.mcg_cap;
2358         unsigned bank_num = mcg_cap & 0xff;
2359         u64 *banks = vcpu->arch.mce_banks;
2360
2361         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2362                 return -EINVAL;
2363         /*
2364          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2365          * reporting is disabled
2366          */
2367         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2368             vcpu->arch.mcg_ctl != ~(u64)0)
2369                 return 0;
2370         banks += 4 * mce->bank;
2371         /*
2372          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2373          * reporting is disabled for the bank
2374          */
2375         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2376                 return 0;
2377         if (mce->status & MCI_STATUS_UC) {
2378                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2379                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2380                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2381                         return 0;
2382                 }
2383                 if (banks[1] & MCI_STATUS_VAL)
2384                         mce->status |= MCI_STATUS_OVER;
2385                 banks[2] = mce->addr;
2386                 banks[3] = mce->misc;
2387                 vcpu->arch.mcg_status = mce->mcg_status;
2388                 banks[1] = mce->status;
2389                 kvm_queue_exception(vcpu, MC_VECTOR);
2390         } else if (!(banks[1] & MCI_STATUS_VAL)
2391                    || !(banks[1] & MCI_STATUS_UC)) {
2392                 if (banks[1] & MCI_STATUS_VAL)
2393                         mce->status |= MCI_STATUS_OVER;
2394                 banks[2] = mce->addr;
2395                 banks[3] = mce->misc;
2396                 banks[1] = mce->status;
2397         } else
2398                 banks[1] |= MCI_STATUS_OVER;
2399         return 0;
2400 }
2401
2402 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2403                                                struct kvm_vcpu_events *events)
2404 {
2405         process_nmi(vcpu);
2406         events->exception.injected =
2407                 vcpu->arch.exception.pending &&
2408                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2409         events->exception.nr = vcpu->arch.exception.nr;
2410         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2411         events->exception.pad = 0;
2412         events->exception.error_code = vcpu->arch.exception.error_code;
2413
2414         events->interrupt.injected =
2415                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2416         events->interrupt.nr = vcpu->arch.interrupt.nr;
2417         events->interrupt.soft = 0;
2418         events->interrupt.shadow =
2419                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2420                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2421
2422         events->nmi.injected = vcpu->arch.nmi_injected;
2423         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2424         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2425         events->nmi.pad = 0;
2426
2427         events->sipi_vector = vcpu->arch.sipi_vector;
2428
2429         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2430                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2431                          | KVM_VCPUEVENT_VALID_SHADOW);
2432         memset(&events->reserved, 0, sizeof(events->reserved));
2433 }
2434
2435 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2436                                               struct kvm_vcpu_events *events)
2437 {
2438         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2439                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2440                               | KVM_VCPUEVENT_VALID_SHADOW))
2441                 return -EINVAL;
2442
2443         process_nmi(vcpu);
2444         vcpu->arch.exception.pending = events->exception.injected;
2445         vcpu->arch.exception.nr = events->exception.nr;
2446         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2447         vcpu->arch.exception.error_code = events->exception.error_code;
2448
2449         vcpu->arch.interrupt.pending = events->interrupt.injected;
2450         vcpu->arch.interrupt.nr = events->interrupt.nr;
2451         vcpu->arch.interrupt.soft = events->interrupt.soft;
2452         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2453                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2454                                                   events->interrupt.shadow);
2455
2456         vcpu->arch.nmi_injected = events->nmi.injected;
2457         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2458                 vcpu->arch.nmi_pending = events->nmi.pending;
2459         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2460
2461         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2462                 vcpu->arch.sipi_vector = events->sipi_vector;
2463
2464         kvm_make_request(KVM_REQ_EVENT, vcpu);
2465
2466         return 0;
2467 }
2468
2469 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2470                                              struct kvm_debugregs *dbgregs)
2471 {
2472         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2473         dbgregs->dr6 = vcpu->arch.dr6;
2474         dbgregs->dr7 = vcpu->arch.dr7;
2475         dbgregs->flags = 0;
2476         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2477 }
2478
2479 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2480                                             struct kvm_debugregs *dbgregs)
2481 {
2482         if (dbgregs->flags)
2483                 return -EINVAL;
2484
2485         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2486         vcpu->arch.dr6 = dbgregs->dr6;
2487         vcpu->arch.dr7 = dbgregs->dr7;
2488
2489         return 0;
2490 }
2491
2492 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2493                                          struct kvm_xsave *guest_xsave)
2494 {
2495         if (cpu_has_xsave)
2496                 memcpy(guest_xsave->region,
2497                         &vcpu->arch.guest_fpu.state->xsave,
2498                         xstate_size);
2499         else {
2500                 memcpy(guest_xsave->region,
2501                         &vcpu->arch.guest_fpu.state->fxsave,
2502                         sizeof(struct i387_fxsave_struct));
2503                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2504                         XSTATE_FPSSE;
2505         }
2506 }
2507
2508 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2509                                         struct kvm_xsave *guest_xsave)
2510 {
2511         u64 xstate_bv =
2512                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2513
2514         if (cpu_has_xsave)
2515                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2516                         guest_xsave->region, xstate_size);
2517         else {
2518                 if (xstate_bv & ~XSTATE_FPSSE)
2519                         return -EINVAL;
2520                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2521                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2522         }
2523         return 0;
2524 }
2525
2526 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2527                                         struct kvm_xcrs *guest_xcrs)
2528 {
2529         if (!cpu_has_xsave) {
2530                 guest_xcrs->nr_xcrs = 0;
2531                 return;
2532         }
2533
2534         guest_xcrs->nr_xcrs = 1;
2535         guest_xcrs->flags = 0;
2536         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2537         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2538 }
2539
2540 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2541                                        struct kvm_xcrs *guest_xcrs)
2542 {
2543         int i, r = 0;
2544
2545         if (!cpu_has_xsave)
2546                 return -EINVAL;
2547
2548         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2549                 return -EINVAL;
2550
2551         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2552                 /* Only support XCR0 currently */
2553                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2554                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2555                                 guest_xcrs->xcrs[0].value);
2556                         break;
2557                 }
2558         if (r)
2559                 r = -EINVAL;
2560         return r;
2561 }
2562
2563 long kvm_arch_vcpu_ioctl(struct file *filp,
2564                          unsigned int ioctl, unsigned long arg)
2565 {
2566         struct kvm_vcpu *vcpu = filp->private_data;
2567         void __user *argp = (void __user *)arg;
2568         int r;
2569         union {
2570                 struct kvm_lapic_state *lapic;
2571                 struct kvm_xsave *xsave;
2572                 struct kvm_xcrs *xcrs;
2573                 void *buffer;
2574         } u;
2575
2576         u.buffer = NULL;
2577         switch (ioctl) {
2578         case KVM_GET_LAPIC: {
2579                 r = -EINVAL;
2580                 if (!vcpu->arch.apic)
2581                         goto out;
2582                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2583
2584                 r = -ENOMEM;
2585                 if (!u.lapic)
2586                         goto out;
2587                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2588                 if (r)
2589                         goto out;
2590                 r = -EFAULT;
2591                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2592                         goto out;
2593                 r = 0;
2594                 break;
2595         }
2596         case KVM_SET_LAPIC: {
2597                 r = -EINVAL;
2598                 if (!vcpu->arch.apic)
2599                         goto out;
2600                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
2601                 if (IS_ERR(u.lapic)) {
2602                         r = PTR_ERR(u.lapic);
2603                         goto out;
2604                 }
2605
2606                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2607                 if (r)
2608                         goto out;
2609                 r = 0;
2610                 break;
2611         }
2612         case KVM_INTERRUPT: {
2613                 struct kvm_interrupt irq;
2614
2615                 r = -EFAULT;
2616                 if (copy_from_user(&irq, argp, sizeof irq))
2617                         goto out;
2618                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2619                 if (r)
2620                         goto out;
2621                 r = 0;
2622                 break;
2623         }
2624         case KVM_NMI: {
2625                 r = kvm_vcpu_ioctl_nmi(vcpu);
2626                 if (r)
2627                         goto out;
2628                 r = 0;
2629                 break;
2630         }
2631         case KVM_SET_CPUID: {
2632                 struct kvm_cpuid __user *cpuid_arg = argp;
2633                 struct kvm_cpuid cpuid;
2634
2635                 r = -EFAULT;
2636                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2637                         goto out;
2638                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2639                 if (r)
2640                         goto out;
2641                 break;
2642         }
2643         case KVM_SET_CPUID2: {
2644                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2645                 struct kvm_cpuid2 cpuid;
2646
2647                 r = -EFAULT;
2648                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2649                         goto out;
2650                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2651                                               cpuid_arg->entries);
2652                 if (r)
2653                         goto out;
2654                 break;
2655         }
2656         case KVM_GET_CPUID2: {
2657                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2658                 struct kvm_cpuid2 cpuid;
2659
2660                 r = -EFAULT;
2661                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2662                         goto out;
2663                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2664                                               cpuid_arg->entries);
2665                 if (r)
2666                         goto out;
2667                 r = -EFAULT;
2668                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2669                         goto out;
2670                 r = 0;
2671                 break;
2672         }
2673         case KVM_GET_MSRS:
2674                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2675                 break;
2676         case KVM_SET_MSRS:
2677                 r = msr_io(vcpu, argp, do_set_msr, 0);
2678                 break;
2679         case KVM_TPR_ACCESS_REPORTING: {
2680                 struct kvm_tpr_access_ctl tac;
2681
2682                 r = -EFAULT;
2683                 if (copy_from_user(&tac, argp, sizeof tac))
2684                         goto out;
2685                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2686                 if (r)
2687                         goto out;
2688                 r = -EFAULT;
2689                 if (copy_to_user(argp, &tac, sizeof tac))
2690                         goto out;
2691                 r = 0;
2692                 break;
2693         };
2694         case KVM_SET_VAPIC_ADDR: {
2695                 struct kvm_vapic_addr va;
2696
2697                 r = -EINVAL;
2698                 if (!irqchip_in_kernel(vcpu->kvm))
2699                         goto out;
2700                 r = -EFAULT;
2701                 if (copy_from_user(&va, argp, sizeof va))
2702                         goto out;
2703                 r = 0;
2704                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2705                 break;
2706         }
2707         case KVM_X86_SETUP_MCE: {
2708                 u64 mcg_cap;
2709
2710                 r = -EFAULT;
2711                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2712                         goto out;
2713                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2714                 break;
2715         }
2716         case KVM_X86_SET_MCE: {
2717                 struct kvm_x86_mce mce;
2718
2719                 r = -EFAULT;
2720                 if (copy_from_user(&mce, argp, sizeof mce))
2721                         goto out;
2722                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2723                 break;
2724         }
2725         case KVM_GET_VCPU_EVENTS: {
2726                 struct kvm_vcpu_events events;
2727
2728                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2729
2730                 r = -EFAULT;
2731                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2732                         break;
2733                 r = 0;
2734                 break;
2735         }
2736         case KVM_SET_VCPU_EVENTS: {
2737                 struct kvm_vcpu_events events;
2738
2739                 r = -EFAULT;
2740                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2741                         break;
2742
2743                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2744                 break;
2745         }
2746         case KVM_GET_DEBUGREGS: {
2747                 struct kvm_debugregs dbgregs;
2748
2749                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2750
2751                 r = -EFAULT;
2752                 if (copy_to_user(argp, &dbgregs,
2753                                  sizeof(struct kvm_debugregs)))
2754                         break;
2755                 r = 0;
2756                 break;
2757         }
2758         case KVM_SET_DEBUGREGS: {
2759                 struct kvm_debugregs dbgregs;
2760
2761                 r = -EFAULT;
2762                 if (copy_from_user(&dbgregs, argp,
2763                                    sizeof(struct kvm_debugregs)))
2764                         break;
2765
2766                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2767                 break;
2768         }
2769         case KVM_GET_XSAVE: {
2770                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2771                 r = -ENOMEM;
2772                 if (!u.xsave)
2773                         break;
2774
2775                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2776
2777                 r = -EFAULT;
2778                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2779                         break;
2780                 r = 0;
2781                 break;
2782         }
2783         case KVM_SET_XSAVE: {
2784                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
2785                 if (IS_ERR(u.xsave)) {
2786                         r = PTR_ERR(u.xsave);
2787                         goto out;
2788                 }
2789
2790                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2791                 break;
2792         }
2793         case KVM_GET_XCRS: {
2794                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2795                 r = -ENOMEM;
2796                 if (!u.xcrs)
2797                         break;
2798
2799                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2800
2801                 r = -EFAULT;
2802                 if (copy_to_user(argp, u.xcrs,
2803                                  sizeof(struct kvm_xcrs)))
2804                         break;
2805                 r = 0;
2806                 break;
2807         }
2808         case KVM_SET_XCRS: {
2809                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
2810                 if (IS_ERR(u.xcrs)) {
2811                         r = PTR_ERR(u.xcrs);
2812                         goto out;
2813                 }
2814
2815                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2816                 break;
2817         }
2818         case KVM_SET_TSC_KHZ: {
2819                 u32 user_tsc_khz;
2820
2821                 r = -EINVAL;
2822                 user_tsc_khz = (u32)arg;
2823
2824                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
2825                         goto out;
2826
2827                 if (user_tsc_khz == 0)
2828                         user_tsc_khz = tsc_khz;
2829
2830                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
2831
2832                 r = 0;
2833                 goto out;
2834         }
2835         case KVM_GET_TSC_KHZ: {
2836                 r = vcpu->arch.virtual_tsc_khz;
2837                 goto out;
2838         }
2839         default:
2840                 r = -EINVAL;
2841         }
2842 out:
2843         kfree(u.buffer);
2844         return r;
2845 }
2846
2847 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
2848 {
2849         return VM_FAULT_SIGBUS;
2850 }
2851
2852 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2853 {
2854         int ret;
2855
2856         if (addr > (unsigned int)(-3 * PAGE_SIZE))
2857                 return -1;
2858         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2859         return ret;
2860 }
2861
2862 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2863                                               u64 ident_addr)
2864 {
2865         kvm->arch.ept_identity_map_addr = ident_addr;
2866         return 0;
2867 }
2868
2869 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
2870                                           u32 kvm_nr_mmu_pages)
2871 {
2872         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
2873                 return -EINVAL;
2874
2875         mutex_lock(&kvm->slots_lock);
2876         spin_lock(&kvm->mmu_lock);
2877
2878         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
2879         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
2880
2881         spin_unlock(&kvm->mmu_lock);
2882         mutex_unlock(&kvm->slots_lock);
2883         return 0;
2884 }
2885
2886 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
2887 {
2888         return kvm->arch.n_max_mmu_pages;
2889 }
2890
2891 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2892 {
2893         int r;
2894
2895         r = 0;
2896         switch (chip->chip_id) {
2897         case KVM_IRQCHIP_PIC_MASTER:
2898                 memcpy(&chip->chip.pic,
2899                         &pic_irqchip(kvm)->pics[0],
2900                         sizeof(struct kvm_pic_state));
2901                 break;
2902         case KVM_IRQCHIP_PIC_SLAVE:
2903                 memcpy(&chip->chip.pic,
2904                         &pic_irqchip(kvm)->pics[1],
2905                         sizeof(struct kvm_pic_state));
2906                 break;
2907         case KVM_IRQCHIP_IOAPIC:
2908                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
2909                 break;
2910         default:
2911                 r = -EINVAL;
2912                 break;
2913         }
2914         return r;
2915 }
2916
2917 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
2918 {
2919         int r;
2920
2921         r = 0;
2922         switch (chip->chip_id) {
2923         case KVM_IRQCHIP_PIC_MASTER:
2924                 spin_lock(&pic_irqchip(kvm)->lock);
2925                 memcpy(&pic_irqchip(kvm)->pics[0],
2926                         &chip->chip.pic,
2927                         sizeof(struct kvm_pic_state));
2928                 spin_unlock(&pic_irqchip(kvm)->lock);
2929                 break;
2930         case KVM_IRQCHIP_PIC_SLAVE:
2931                 spin_lock(&pic_irqchip(kvm)->lock);
2932                 memcpy(&pic_irqchip(kvm)->pics[1],
2933                         &chip->chip.pic,
2934                         sizeof(struct kvm_pic_state));
2935                 spin_unlock(&pic_irqchip(kvm)->lock);
2936                 break;
2937         case KVM_IRQCHIP_IOAPIC:
2938                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
2939                 break;
2940         default:
2941                 r = -EINVAL;
2942                 break;
2943         }
2944         kvm_pic_update_irq(pic_irqchip(kvm));
2945         return r;
2946 }
2947
2948 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2949 {
2950         int r = 0;
2951
2952         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2953         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
2954         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2955         return r;
2956 }
2957
2958 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
2959 {
2960         int r = 0;
2961
2962         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2963         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
2964         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
2965         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2966         return r;
2967 }
2968
2969 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2970 {
2971         int r = 0;
2972
2973         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2974         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
2975                 sizeof(ps->channels));
2976         ps->flags = kvm->arch.vpit->pit_state.flags;
2977         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2978         memset(&ps->reserved, 0, sizeof(ps->reserved));
2979         return r;
2980 }
2981
2982 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
2983 {
2984         int r = 0, start = 0;
2985         u32 prev_legacy, cur_legacy;
2986         mutex_lock(&kvm->arch.vpit->pit_state.lock);
2987         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
2988         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
2989         if (!prev_legacy && cur_legacy)
2990                 start = 1;
2991         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
2992                sizeof(kvm->arch.vpit->pit_state.channels));
2993         kvm->arch.vpit->pit_state.flags = ps->flags;
2994         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
2995         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
2996         return r;
2997 }
2998
2999 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3000                                  struct kvm_reinject_control *control)
3001 {
3002         if (!kvm->arch.vpit)
3003                 return -ENXIO;
3004         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3005         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3006         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3007         return 0;
3008 }
3009
3010 /**
3011  * write_protect_slot - write protect a slot for dirty logging
3012  * @kvm: the kvm instance
3013  * @memslot: the slot we protect
3014  * @dirty_bitmap: the bitmap indicating which pages are dirty
3015  * @nr_dirty_pages: the number of dirty pages
3016  *
3017  * We have two ways to find all sptes to protect:
3018  * 1. Use kvm_mmu_slot_remove_write_access() which walks all shadow pages and
3019  *    checks ones that have a spte mapping a page in the slot.
3020  * 2. Use kvm_mmu_rmap_write_protect() for each gfn found in the bitmap.
3021  *
3022  * Generally speaking, if there are not so many dirty pages compared to the
3023  * number of shadow pages, we should use the latter.
3024  *
3025  * Note that letting others write into a page marked dirty in the old bitmap
3026  * by using the remaining tlb entry is not a problem.  That page will become
3027  * write protected again when we flush the tlb and then be reported dirty to
3028  * the user space by copying the old bitmap.
3029  */
3030 static void write_protect_slot(struct kvm *kvm,
3031                                struct kvm_memory_slot *memslot,
3032                                unsigned long *dirty_bitmap,
3033                                unsigned long nr_dirty_pages)
3034 {
3035         /* Not many dirty pages compared to # of shadow pages. */
3036         if (nr_dirty_pages < kvm->arch.n_used_mmu_pages) {
3037                 unsigned long gfn_offset;
3038
3039                 for_each_set_bit(gfn_offset, dirty_bitmap, memslot->npages) {
3040                         unsigned long gfn = memslot->base_gfn + gfn_offset;
3041
3042                         spin_lock(&kvm->mmu_lock);
3043                         kvm_mmu_rmap_write_protect(kvm, gfn, memslot);
3044                         spin_unlock(&kvm->mmu_lock);
3045                 }
3046                 kvm_flush_remote_tlbs(kvm);
3047         } else {
3048                 spin_lock(&kvm->mmu_lock);
3049                 kvm_mmu_slot_remove_write_access(kvm, memslot->id);
3050                 spin_unlock(&kvm->mmu_lock);
3051         }
3052 }
3053
3054 /*
3055  * Get (and clear) the dirty memory log for a memory slot.
3056  */
3057 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3058                                       struct kvm_dirty_log *log)
3059 {
3060         int r;
3061         struct kvm_memory_slot *memslot;
3062         unsigned long n, nr_dirty_pages;
3063
3064         mutex_lock(&kvm->slots_lock);
3065
3066         r = -EINVAL;
3067         if (log->slot >= KVM_MEMORY_SLOTS)
3068                 goto out;
3069
3070         memslot = id_to_memslot(kvm->memslots, log->slot);
3071         r = -ENOENT;
3072         if (!memslot->dirty_bitmap)
3073                 goto out;
3074
3075         n = kvm_dirty_bitmap_bytes(memslot);
3076         nr_dirty_pages = memslot->nr_dirty_pages;
3077
3078         /* If nothing is dirty, don't bother messing with page tables. */
3079         if (nr_dirty_pages) {
3080                 struct kvm_memslots *slots, *old_slots;
3081                 unsigned long *dirty_bitmap, *dirty_bitmap_head;
3082
3083                 dirty_bitmap = memslot->dirty_bitmap;
3084                 dirty_bitmap_head = memslot->dirty_bitmap_head;
3085                 if (dirty_bitmap == dirty_bitmap_head)
3086                         dirty_bitmap_head += n / sizeof(long);
3087                 memset(dirty_bitmap_head, 0, n);
3088
3089                 r = -ENOMEM;
3090                 slots = kmemdup(kvm->memslots, sizeof(*kvm->memslots), GFP_KERNEL);
3091                 if (!slots)
3092                         goto out;
3093
3094                 memslot = id_to_memslot(slots, log->slot);
3095                 memslot->nr_dirty_pages = 0;
3096                 memslot->dirty_bitmap = dirty_bitmap_head;
3097                 update_memslots(slots, NULL);
3098
3099                 old_slots = kvm->memslots;
3100                 rcu_assign_pointer(kvm->memslots, slots);
3101                 synchronize_srcu_expedited(&kvm->srcu);
3102                 kfree(old_slots);
3103
3104                 write_protect_slot(kvm, memslot, dirty_bitmap, nr_dirty_pages);
3105
3106                 r = -EFAULT;
3107                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3108                         goto out;
3109         } else {
3110                 r = -EFAULT;
3111                 if (clear_user(log->dirty_bitmap, n))
3112                         goto out;
3113         }
3114
3115         r = 0;
3116 out:
3117         mutex_unlock(&kvm->slots_lock);
3118         return r;
3119 }
3120
3121 long kvm_arch_vm_ioctl(struct file *filp,
3122                        unsigned int ioctl, unsigned long arg)
3123 {
3124         struct kvm *kvm = filp->private_data;
3125         void __user *argp = (void __user *)arg;
3126         int r = -ENOTTY;
3127         /*
3128          * This union makes it completely explicit to gcc-3.x
3129          * that these two variables' stack usage should be
3130          * combined, not added together.
3131          */
3132         union {
3133                 struct kvm_pit_state ps;
3134                 struct kvm_pit_state2 ps2;
3135                 struct kvm_pit_config pit_config;
3136         } u;
3137
3138         switch (ioctl) {
3139         case KVM_SET_TSS_ADDR:
3140                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3141                 if (r < 0)
3142                         goto out;
3143                 break;
3144         case KVM_SET_IDENTITY_MAP_ADDR: {
3145                 u64 ident_addr;
3146
3147                 r = -EFAULT;
3148                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3149                         goto out;
3150                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3151                 if (r < 0)
3152                         goto out;
3153                 break;
3154         }
3155         case KVM_SET_NR_MMU_PAGES:
3156                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3157                 if (r)
3158                         goto out;
3159                 break;
3160         case KVM_GET_NR_MMU_PAGES:
3161                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3162                 break;
3163         case KVM_CREATE_IRQCHIP: {
3164                 struct kvm_pic *vpic;
3165
3166                 mutex_lock(&kvm->lock);
3167                 r = -EEXIST;
3168                 if (kvm->arch.vpic)
3169                         goto create_irqchip_unlock;
3170                 r = -ENOMEM;
3171                 vpic = kvm_create_pic(kvm);
3172                 if (vpic) {
3173                         r = kvm_ioapic_init(kvm);
3174                         if (r) {
3175                                 mutex_lock(&kvm->slots_lock);
3176                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3177                                                           &vpic->dev_master);
3178                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3179                                                           &vpic->dev_slave);
3180                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3181                                                           &vpic->dev_eclr);
3182                                 mutex_unlock(&kvm->slots_lock);
3183                                 kfree(vpic);
3184                                 goto create_irqchip_unlock;
3185                         }
3186                 } else
3187                         goto create_irqchip_unlock;
3188                 smp_wmb();
3189                 kvm->arch.vpic = vpic;
3190                 smp_wmb();
3191                 r = kvm_setup_default_irq_routing(kvm);
3192                 if (r) {
3193                         mutex_lock(&kvm->slots_lock);
3194                         mutex_lock(&kvm->irq_lock);
3195                         kvm_ioapic_destroy(kvm);
3196                         kvm_destroy_pic(kvm);
3197                         mutex_unlock(&kvm->irq_lock);
3198                         mutex_unlock(&kvm->slots_lock);
3199                 }
3200         create_irqchip_unlock:
3201                 mutex_unlock(&kvm->lock);
3202                 break;
3203         }
3204         case KVM_CREATE_PIT:
3205                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3206                 goto create_pit;
3207         case KVM_CREATE_PIT2:
3208                 r = -EFAULT;
3209                 if (copy_from_user(&u.pit_config, argp,
3210                                    sizeof(struct kvm_pit_config)))
3211                         goto out;
3212         create_pit:
3213                 mutex_lock(&kvm->slots_lock);
3214                 r = -EEXIST;
3215                 if (kvm->arch.vpit)
3216                         goto create_pit_unlock;
3217                 r = -ENOMEM;
3218                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3219                 if (kvm->arch.vpit)
3220                         r = 0;
3221         create_pit_unlock:
3222                 mutex_unlock(&kvm->slots_lock);
3223                 break;
3224         case KVM_IRQ_LINE_STATUS:
3225         case KVM_IRQ_LINE: {
3226                 struct kvm_irq_level irq_event;
3227
3228                 r = -EFAULT;
3229                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3230                         goto out;
3231                 r = -ENXIO;
3232                 if (irqchip_in_kernel(kvm)) {
3233                         __s32 status;
3234                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3235                                         irq_event.irq, irq_event.level);
3236                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3237                                 r = -EFAULT;
3238                                 irq_event.status = status;
3239                                 if (copy_to_user(argp, &irq_event,
3240                                                         sizeof irq_event))
3241                                         goto out;
3242                         }
3243                         r = 0;
3244                 }
3245                 break;
3246         }
3247         case KVM_GET_IRQCHIP: {
3248                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3249                 struct kvm_irqchip *chip;
3250
3251                 chip = memdup_user(argp, sizeof(*chip));
3252                 if (IS_ERR(chip)) {
3253                         r = PTR_ERR(chip);
3254                         goto out;
3255                 }
3256
3257                 r = -ENXIO;
3258                 if (!irqchip_in_kernel(kvm))
3259                         goto get_irqchip_out;
3260                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3261                 if (r)
3262                         goto get_irqchip_out;
3263                 r = -EFAULT;
3264                 if (copy_to_user(argp, chip, sizeof *chip))
3265                         goto get_irqchip_out;
3266                 r = 0;
3267         get_irqchip_out:
3268                 kfree(chip);
3269                 if (r)
3270                         goto out;
3271                 break;
3272         }
3273         case KVM_SET_IRQCHIP: {
3274                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3275                 struct kvm_irqchip *chip;
3276
3277                 chip = memdup_user(argp, sizeof(*chip));
3278                 if (IS_ERR(chip)) {
3279                         r = PTR_ERR(chip);
3280                         goto out;
3281                 }
3282
3283                 r = -ENXIO;
3284                 if (!irqchip_in_kernel(kvm))
3285                         goto set_irqchip_out;
3286                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3287                 if (r)
3288                         goto set_irqchip_out;
3289                 r = 0;
3290         set_irqchip_out:
3291                 kfree(chip);
3292                 if (r)
3293                         goto out;
3294                 break;
3295         }
3296         case KVM_GET_PIT: {
3297                 r = -EFAULT;
3298                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3299                         goto out;
3300                 r = -ENXIO;
3301                 if (!kvm->arch.vpit)
3302                         goto out;
3303                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3304                 if (r)
3305                         goto out;
3306                 r = -EFAULT;
3307                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3308                         goto out;
3309                 r = 0;
3310                 break;
3311         }
3312         case KVM_SET_PIT: {
3313                 r = -EFAULT;
3314                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3315                         goto out;
3316                 r = -ENXIO;
3317                 if (!kvm->arch.vpit)
3318                         goto out;
3319                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3320                 if (r)
3321                         goto out;
3322                 r = 0;
3323                 break;
3324         }
3325         case KVM_GET_PIT2: {
3326                 r = -ENXIO;
3327                 if (!kvm->arch.vpit)
3328                         goto out;
3329                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3330                 if (r)
3331                         goto out;
3332                 r = -EFAULT;
3333                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3334                         goto out;
3335                 r = 0;
3336                 break;
3337         }
3338         case KVM_SET_PIT2: {
3339                 r = -EFAULT;
3340                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3341                         goto out;
3342                 r = -ENXIO;
3343                 if (!kvm->arch.vpit)
3344                         goto out;
3345                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3346                 if (r)
3347                         goto out;
3348                 r = 0;
3349                 break;
3350         }
3351         case KVM_REINJECT_CONTROL: {
3352                 struct kvm_reinject_control control;
3353                 r =  -EFAULT;
3354                 if (copy_from_user(&control, argp, sizeof(control)))
3355                         goto out;
3356                 r = kvm_vm_ioctl_reinject(kvm, &control);
3357                 if (r)
3358                         goto out;
3359                 r = 0;
3360                 break;
3361         }
3362         case KVM_XEN_HVM_CONFIG: {
3363                 r = -EFAULT;
3364                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3365                                    sizeof(struct kvm_xen_hvm_config)))
3366                         goto out;
3367                 r = -EINVAL;
3368                 if (kvm->arch.xen_hvm_config.flags)
3369                         goto out;
3370                 r = 0;
3371                 break;
3372         }
3373         case KVM_SET_CLOCK: {
3374                 struct kvm_clock_data user_ns;
3375                 u64 now_ns;
3376                 s64 delta;
3377
3378                 r = -EFAULT;
3379                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3380                         goto out;
3381
3382                 r = -EINVAL;
3383                 if (user_ns.flags)
3384                         goto out;
3385
3386                 r = 0;
3387                 local_irq_disable();
3388                 now_ns = get_kernel_ns();
3389                 delta = user_ns.clock - now_ns;
3390                 local_irq_enable();
3391                 kvm->arch.kvmclock_offset = delta;
3392                 break;
3393         }
3394         case KVM_GET_CLOCK: {
3395                 struct kvm_clock_data user_ns;
3396                 u64 now_ns;
3397
3398                 local_irq_disable();
3399                 now_ns = get_kernel_ns();
3400                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3401                 local_irq_enable();
3402                 user_ns.flags = 0;
3403                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3404
3405                 r = -EFAULT;
3406                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3407                         goto out;
3408                 r = 0;
3409                 break;
3410         }
3411
3412         default:
3413                 ;
3414         }
3415 out:
3416         return r;
3417 }
3418
3419 static void kvm_init_msr_list(void)
3420 {
3421         u32 dummy[2];
3422         unsigned i, j;
3423
3424         /* skip the first msrs in the list. KVM-specific */
3425         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3426                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3427                         continue;
3428                 if (j < i)
3429                         msrs_to_save[j] = msrs_to_save[i];
3430                 j++;
3431         }
3432         num_msrs_to_save = j;
3433 }
3434
3435 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3436                            const void *v)
3437 {
3438         int handled = 0;
3439         int n;
3440
3441         do {
3442                 n = min(len, 8);
3443                 if (!(vcpu->arch.apic &&
3444                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3445                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3446                         break;
3447                 handled += n;
3448                 addr += n;
3449                 len -= n;
3450                 v += n;
3451         } while (len);
3452
3453         return handled;
3454 }
3455
3456 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3457 {
3458         int handled = 0;
3459         int n;
3460
3461         do {
3462                 n = min(len, 8);
3463                 if (!(vcpu->arch.apic &&
3464                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3465                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3466                         break;
3467                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3468                 handled += n;
3469                 addr += n;
3470                 len -= n;
3471                 v += n;
3472         } while (len);
3473
3474         return handled;
3475 }
3476
3477 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3478                         struct kvm_segment *var, int seg)
3479 {
3480         kvm_x86_ops->set_segment(vcpu, var, seg);
3481 }
3482
3483 void kvm_get_segment(struct kvm_vcpu *vcpu,
3484                      struct kvm_segment *var, int seg)
3485 {
3486         kvm_x86_ops->get_segment(vcpu, var, seg);
3487 }
3488
3489 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3490 {
3491         gpa_t t_gpa;
3492         struct x86_exception exception;
3493
3494         BUG_ON(!mmu_is_nested(vcpu));
3495
3496         /* NPT walks are always user-walks */
3497         access |= PFERR_USER_MASK;
3498         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3499
3500         return t_gpa;
3501 }
3502
3503 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3504                               struct x86_exception *exception)
3505 {
3506         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3507         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3508 }
3509
3510  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3511                                 struct x86_exception *exception)
3512 {
3513         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3514         access |= PFERR_FETCH_MASK;
3515         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3516 }
3517
3518 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3519                                struct x86_exception *exception)
3520 {
3521         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3522         access |= PFERR_WRITE_MASK;
3523         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3524 }
3525
3526 /* uses this to access any guest's mapped memory without checking CPL */
3527 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3528                                 struct x86_exception *exception)
3529 {
3530         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3531 }
3532
3533 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3534                                       struct kvm_vcpu *vcpu, u32 access,
3535                                       struct x86_exception *exception)
3536 {
3537         void *data = val;
3538         int r = X86EMUL_CONTINUE;
3539
3540         while (bytes) {
3541                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3542                                                             exception);
3543                 unsigned offset = addr & (PAGE_SIZE-1);
3544                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3545                 int ret;
3546
3547                 if (gpa == UNMAPPED_GVA)
3548                         return X86EMUL_PROPAGATE_FAULT;
3549                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3550                 if (ret < 0) {
3551                         r = X86EMUL_IO_NEEDED;
3552                         goto out;
3553                 }
3554
3555                 bytes -= toread;
3556                 data += toread;
3557                 addr += toread;
3558         }
3559 out:
3560         return r;
3561 }
3562
3563 /* used for instruction fetching */
3564 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3565                                 gva_t addr, void *val, unsigned int bytes,
3566                                 struct x86_exception *exception)
3567 {
3568         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3569         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3570
3571         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3572                                           access | PFERR_FETCH_MASK,
3573                                           exception);
3574 }
3575
3576 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3577                                gva_t addr, void *val, unsigned int bytes,
3578                                struct x86_exception *exception)
3579 {
3580         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3581         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3582
3583         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3584                                           exception);
3585 }
3586 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
3587
3588 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3589                                       gva_t addr, void *val, unsigned int bytes,
3590                                       struct x86_exception *exception)
3591 {
3592         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3593         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3594 }
3595
3596 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
3597                                        gva_t addr, void *val,
3598                                        unsigned int bytes,
3599                                        struct x86_exception *exception)
3600 {
3601         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3602         void *data = val;
3603         int r = X86EMUL_CONTINUE;
3604
3605         while (bytes) {
3606                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3607                                                              PFERR_WRITE_MASK,
3608                                                              exception);
3609                 unsigned offset = addr & (PAGE_SIZE-1);
3610                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3611                 int ret;
3612
3613                 if (gpa == UNMAPPED_GVA)
3614                         return X86EMUL_PROPAGATE_FAULT;
3615                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3616                 if (ret < 0) {
3617                         r = X86EMUL_IO_NEEDED;
3618                         goto out;
3619                 }
3620
3621                 bytes -= towrite;
3622                 data += towrite;
3623                 addr += towrite;
3624         }
3625 out:
3626         return r;
3627 }
3628 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
3629
3630 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
3631                                 gpa_t *gpa, struct x86_exception *exception,
3632                                 bool write)
3633 {
3634         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3635
3636         if (vcpu_match_mmio_gva(vcpu, gva) &&
3637                   check_write_user_access(vcpu, write, access,
3638                   vcpu->arch.access)) {
3639                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
3640                                         (gva & (PAGE_SIZE - 1));
3641                 trace_vcpu_match_mmio(gva, *gpa, write, false);
3642                 return 1;
3643         }
3644
3645         if (write)
3646                 access |= PFERR_WRITE_MASK;
3647
3648         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3649
3650         if (*gpa == UNMAPPED_GVA)
3651                 return -1;
3652
3653         /* For APIC access vmexit */
3654         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3655                 return 1;
3656
3657         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
3658                 trace_vcpu_match_mmio(gva, *gpa, write, true);
3659                 return 1;
3660         }
3661
3662         return 0;
3663 }
3664
3665 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3666                         const void *val, int bytes)
3667 {
3668         int ret;
3669
3670         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3671         if (ret < 0)
3672                 return 0;
3673         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
3674         return 1;
3675 }
3676
3677 struct read_write_emulator_ops {
3678         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
3679                                   int bytes);
3680         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
3681                                   void *val, int bytes);
3682         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3683                                int bytes, void *val);
3684         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
3685                                     void *val, int bytes);
3686         bool write;
3687 };
3688
3689 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
3690 {
3691         if (vcpu->mmio_read_completed) {
3692                 memcpy(val, vcpu->mmio_data, bytes);
3693                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3694                                vcpu->mmio_phys_addr, *(u64 *)val);
3695                 vcpu->mmio_read_completed = 0;
3696                 return 1;
3697         }
3698
3699         return 0;
3700 }
3701
3702 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3703                         void *val, int bytes)
3704 {
3705         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
3706 }
3707
3708 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
3709                          void *val, int bytes)
3710 {
3711         return emulator_write_phys(vcpu, gpa, val, bytes);
3712 }
3713
3714 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
3715 {
3716         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3717         return vcpu_mmio_write(vcpu, gpa, bytes, val);
3718 }
3719
3720 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3721                           void *val, int bytes)
3722 {
3723         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3724         return X86EMUL_IO_NEEDED;
3725 }
3726
3727 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
3728                            void *val, int bytes)
3729 {
3730         memcpy(vcpu->mmio_data, val, bytes);
3731         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
3732         return X86EMUL_CONTINUE;
3733 }
3734
3735 static struct read_write_emulator_ops read_emultor = {
3736         .read_write_prepare = read_prepare,
3737         .read_write_emulate = read_emulate,
3738         .read_write_mmio = vcpu_mmio_read,
3739         .read_write_exit_mmio = read_exit_mmio,
3740 };
3741
3742 static struct read_write_emulator_ops write_emultor = {
3743         .read_write_emulate = write_emulate,
3744         .read_write_mmio = write_mmio,
3745         .read_write_exit_mmio = write_exit_mmio,
3746         .write = true,
3747 };
3748
3749 static int emulator_read_write_onepage(unsigned long addr, void *val,
3750                                        unsigned int bytes,
3751                                        struct x86_exception *exception,
3752                                        struct kvm_vcpu *vcpu,
3753                                        struct read_write_emulator_ops *ops)
3754 {
3755         gpa_t gpa;
3756         int handled, ret;
3757         bool write = ops->write;
3758
3759         if (ops->read_write_prepare &&
3760                   ops->read_write_prepare(vcpu, val, bytes))
3761                 return X86EMUL_CONTINUE;
3762
3763         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
3764
3765         if (ret < 0)
3766                 return X86EMUL_PROPAGATE_FAULT;
3767
3768         /* For APIC access vmexit */
3769         if (ret)
3770                 goto mmio;
3771
3772         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
3773                 return X86EMUL_CONTINUE;
3774
3775 mmio:
3776         /*
3777          * Is this MMIO handled locally?
3778          */
3779         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
3780         if (handled == bytes)
3781                 return X86EMUL_CONTINUE;
3782
3783         gpa += handled;
3784         bytes -= handled;
3785         val += handled;
3786
3787         vcpu->mmio_needed = 1;
3788         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3789         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3790         vcpu->mmio_size = bytes;
3791         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
3792         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
3793         vcpu->mmio_index = 0;
3794
3795         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
3796 }
3797
3798 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
3799                         void *val, unsigned int bytes,
3800                         struct x86_exception *exception,
3801                         struct read_write_emulator_ops *ops)
3802 {
3803         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3804
3805         /* Crossing a page boundary? */
3806         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3807                 int rc, now;
3808
3809                 now = -addr & ~PAGE_MASK;
3810                 rc = emulator_read_write_onepage(addr, val, now, exception,
3811                                                  vcpu, ops);
3812
3813                 if (rc != X86EMUL_CONTINUE)
3814                         return rc;
3815                 addr += now;
3816                 val += now;
3817                 bytes -= now;
3818         }
3819
3820         return emulator_read_write_onepage(addr, val, bytes, exception,
3821                                            vcpu, ops);
3822 }
3823
3824 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
3825                                   unsigned long addr,
3826                                   void *val,
3827                                   unsigned int bytes,
3828                                   struct x86_exception *exception)
3829 {
3830         return emulator_read_write(ctxt, addr, val, bytes,
3831                                    exception, &read_emultor);
3832 }
3833
3834 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
3835                             unsigned long addr,
3836                             const void *val,
3837                             unsigned int bytes,
3838                             struct x86_exception *exception)
3839 {
3840         return emulator_read_write(ctxt, addr, (void *)val, bytes,
3841                                    exception, &write_emultor);
3842 }
3843
3844 #define CMPXCHG_TYPE(t, ptr, old, new) \
3845         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3846
3847 #ifdef CONFIG_X86_64
3848 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3849 #else
3850 #  define CMPXCHG64(ptr, old, new) \
3851         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3852 #endif
3853
3854 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
3855                                      unsigned long addr,
3856                                      const void *old,
3857                                      const void *new,
3858                                      unsigned int bytes,
3859                                      struct x86_exception *exception)
3860 {
3861         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3862         gpa_t gpa;
3863         struct page *page;
3864         char *kaddr;
3865         bool exchanged;
3866
3867         /* guests cmpxchg8b have to be emulated atomically */
3868         if (bytes > 8 || (bytes & (bytes - 1)))
3869                 goto emul_write;
3870
3871         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3872
3873         if (gpa == UNMAPPED_GVA ||
3874             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3875                 goto emul_write;
3876
3877         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3878                 goto emul_write;
3879
3880         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3881         if (is_error_page(page)) {
3882                 kvm_release_page_clean(page);
3883                 goto emul_write;
3884         }
3885
3886         kaddr = kmap_atomic(page, KM_USER0);
3887         kaddr += offset_in_page(gpa);
3888         switch (bytes) {
3889         case 1:
3890                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3891                 break;
3892         case 2:
3893                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3894                 break;
3895         case 4:
3896                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3897                 break;
3898         case 8:
3899                 exchanged = CMPXCHG64(kaddr, old, new);
3900                 break;
3901         default:
3902                 BUG();
3903         }
3904         kunmap_atomic(kaddr, KM_USER0);
3905         kvm_release_page_dirty(page);
3906
3907         if (!exchanged)
3908                 return X86EMUL_CMPXCHG_FAILED;
3909
3910         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
3911
3912         return X86EMUL_CONTINUE;
3913
3914 emul_write:
3915         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3916
3917         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
3918 }
3919
3920 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3921 {
3922         /* TODO: String I/O for in kernel device */
3923         int r;
3924
3925         if (vcpu->arch.pio.in)
3926                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3927                                     vcpu->arch.pio.size, pd);
3928         else
3929                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3930                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3931                                      pd);
3932         return r;
3933 }
3934
3935 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
3936                                unsigned short port, void *val,
3937                                unsigned int count, bool in)
3938 {
3939         trace_kvm_pio(!in, port, size, count);
3940
3941         vcpu->arch.pio.port = port;
3942         vcpu->arch.pio.in = in;
3943         vcpu->arch.pio.count  = count;
3944         vcpu->arch.pio.size = size;
3945
3946         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3947                 vcpu->arch.pio.count = 0;
3948                 return 1;
3949         }
3950
3951         vcpu->run->exit_reason = KVM_EXIT_IO;
3952         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
3953         vcpu->run->io.size = size;
3954         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3955         vcpu->run->io.count = count;
3956         vcpu->run->io.port = port;
3957
3958         return 0;
3959 }
3960
3961 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
3962                                     int size, unsigned short port, void *val,
3963                                     unsigned int count)
3964 {
3965         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3966         int ret;
3967
3968         if (vcpu->arch.pio.count)
3969                 goto data_avail;
3970
3971         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
3972         if (ret) {
3973 data_avail:
3974                 memcpy(val, vcpu->arch.pio_data, size * count);
3975                 vcpu->arch.pio.count = 0;
3976                 return 1;
3977         }
3978
3979         return 0;
3980 }
3981
3982 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
3983                                      int size, unsigned short port,
3984                                      const void *val, unsigned int count)
3985 {
3986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3987
3988         memcpy(vcpu->arch.pio_data, val, size * count);
3989         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
3990 }
3991
3992 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3993 {
3994         return kvm_x86_ops->get_segment_base(vcpu, seg);
3995 }
3996
3997 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
3998 {
3999         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4000 }
4001
4002 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4003 {
4004         if (!need_emulate_wbinvd(vcpu))
4005                 return X86EMUL_CONTINUE;
4006
4007         if (kvm_x86_ops->has_wbinvd_exit()) {
4008                 int cpu = get_cpu();
4009
4010                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4011                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4012                                 wbinvd_ipi, NULL, 1);
4013                 put_cpu();
4014                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4015         } else
4016                 wbinvd();
4017         return X86EMUL_CONTINUE;
4018 }
4019 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4020
4021 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4022 {
4023         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4024 }
4025
4026 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4027 {
4028         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4029 }
4030
4031 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4032 {
4033
4034         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4035 }
4036
4037 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4038 {
4039         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4040 }
4041
4042 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4043 {
4044         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4045         unsigned long value;
4046
4047         switch (cr) {
4048         case 0:
4049                 value = kvm_read_cr0(vcpu);
4050                 break;
4051         case 2:
4052                 value = vcpu->arch.cr2;
4053                 break;
4054         case 3:
4055                 value = kvm_read_cr3(vcpu);
4056                 break;
4057         case 4:
4058                 value = kvm_read_cr4(vcpu);
4059                 break;
4060         case 8:
4061                 value = kvm_get_cr8(vcpu);
4062                 break;
4063         default:
4064                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4065                 return 0;
4066         }
4067
4068         return value;
4069 }
4070
4071 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4072 {
4073         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4074         int res = 0;
4075
4076         switch (cr) {
4077         case 0:
4078                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4079                 break;
4080         case 2:
4081                 vcpu->arch.cr2 = val;
4082                 break;
4083         case 3:
4084                 res = kvm_set_cr3(vcpu, val);
4085                 break;
4086         case 4:
4087                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4088                 break;
4089         case 8:
4090                 res = kvm_set_cr8(vcpu, val);
4091                 break;
4092         default:
4093                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4094                 res = -1;
4095         }
4096
4097         return res;
4098 }
4099
4100 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4101 {
4102         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4103 }
4104
4105 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4106 {
4107         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4108 }
4109
4110 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4111 {
4112         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4113 }
4114
4115 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4116 {
4117         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4118 }
4119
4120 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4121 {
4122         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4123 }
4124
4125 static unsigned long emulator_get_cached_segment_base(
4126         struct x86_emulate_ctxt *ctxt, int seg)
4127 {
4128         return get_segment_base(emul_to_vcpu(ctxt), seg);
4129 }
4130
4131 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4132                                  struct desc_struct *desc, u32 *base3,
4133                                  int seg)
4134 {
4135         struct kvm_segment var;
4136
4137         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4138         *selector = var.selector;
4139
4140         if (var.unusable)
4141                 return false;
4142
4143         if (var.g)
4144                 var.limit >>= 12;
4145         set_desc_limit(desc, var.limit);
4146         set_desc_base(desc, (unsigned long)var.base);
4147 #ifdef CONFIG_X86_64
4148         if (base3)
4149                 *base3 = var.base >> 32;
4150 #endif
4151         desc->type = var.type;
4152         desc->s = var.s;
4153         desc->dpl = var.dpl;
4154         desc->p = var.present;
4155         desc->avl = var.avl;
4156         desc->l = var.l;
4157         desc->d = var.db;
4158         desc->g = var.g;
4159
4160         return true;
4161 }
4162
4163 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4164                                  struct desc_struct *desc, u32 base3,
4165                                  int seg)
4166 {
4167         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4168         struct kvm_segment var;
4169
4170         var.selector = selector;
4171         var.base = get_desc_base(desc);
4172 #ifdef CONFIG_X86_64
4173         var.base |= ((u64)base3) << 32;
4174 #endif
4175         var.limit = get_desc_limit(desc);
4176         if (desc->g)
4177                 var.limit = (var.limit << 12) | 0xfff;
4178         var.type = desc->type;
4179         var.present = desc->p;
4180         var.dpl = desc->dpl;
4181         var.db = desc->d;
4182         var.s = desc->s;
4183         var.l = desc->l;
4184         var.g = desc->g;
4185         var.avl = desc->avl;
4186         var.present = desc->p;
4187         var.unusable = !var.present;
4188         var.padding = 0;
4189
4190         kvm_set_segment(vcpu, &var, seg);
4191         return;
4192 }
4193
4194 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4195                             u32 msr_index, u64 *pdata)
4196 {
4197         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4198 }
4199
4200 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4201                             u32 msr_index, u64 data)
4202 {
4203         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4204 }
4205
4206 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4207                              u32 pmc, u64 *pdata)
4208 {
4209         return kvm_pmu_read_pmc(emul_to_vcpu(ctxt), pmc, pdata);
4210 }
4211
4212 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4213 {
4214         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4215 }
4216
4217 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4218 {
4219         preempt_disable();
4220         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4221         /*
4222          * CR0.TS may reference the host fpu state, not the guest fpu state,
4223          * so it may be clear at this point.
4224          */
4225         clts();
4226 }
4227
4228 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4229 {
4230         preempt_enable();
4231 }
4232
4233 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4234                               struct x86_instruction_info *info,
4235                               enum x86_intercept_stage stage)
4236 {
4237         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4238 }
4239
4240 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4241                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4242 {
4243         struct kvm_cpuid_entry2 *cpuid = NULL;
4244
4245         if (eax && ecx)
4246                 cpuid = kvm_find_cpuid_entry(emul_to_vcpu(ctxt),
4247                                             *eax, *ecx);
4248
4249         if (cpuid) {
4250                 *eax = cpuid->eax;
4251                 *ecx = cpuid->ecx;
4252                 if (ebx)
4253                         *ebx = cpuid->ebx;
4254                 if (edx)
4255                         *edx = cpuid->edx;
4256                 return true;
4257         }
4258
4259         return false;
4260 }
4261
4262 static struct x86_emulate_ops emulate_ops = {
4263         .read_std            = kvm_read_guest_virt_system,
4264         .write_std           = kvm_write_guest_virt_system,
4265         .fetch               = kvm_fetch_guest_virt,
4266         .read_emulated       = emulator_read_emulated,
4267         .write_emulated      = emulator_write_emulated,
4268         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4269         .invlpg              = emulator_invlpg,
4270         .pio_in_emulated     = emulator_pio_in_emulated,
4271         .pio_out_emulated    = emulator_pio_out_emulated,
4272         .get_segment         = emulator_get_segment,
4273         .set_segment         = emulator_set_segment,
4274         .get_cached_segment_base = emulator_get_cached_segment_base,
4275         .get_gdt             = emulator_get_gdt,
4276         .get_idt             = emulator_get_idt,
4277         .set_gdt             = emulator_set_gdt,
4278         .set_idt             = emulator_set_idt,
4279         .get_cr              = emulator_get_cr,
4280         .set_cr              = emulator_set_cr,
4281         .cpl                 = emulator_get_cpl,
4282         .get_dr              = emulator_get_dr,
4283         .set_dr              = emulator_set_dr,
4284         .set_msr             = emulator_set_msr,
4285         .get_msr             = emulator_get_msr,
4286         .read_pmc            = emulator_read_pmc,
4287         .halt                = emulator_halt,
4288         .wbinvd              = emulator_wbinvd,
4289         .fix_hypercall       = emulator_fix_hypercall,
4290         .get_fpu             = emulator_get_fpu,
4291         .put_fpu             = emulator_put_fpu,
4292         .intercept           = emulator_intercept,
4293         .get_cpuid           = emulator_get_cpuid,
4294 };
4295
4296 static void cache_all_regs(struct kvm_vcpu *vcpu)
4297 {
4298         kvm_register_read(vcpu, VCPU_REGS_RAX);
4299         kvm_register_read(vcpu, VCPU_REGS_RSP);
4300         kvm_register_read(vcpu, VCPU_REGS_RIP);
4301         vcpu->arch.regs_dirty = ~0;
4302 }
4303
4304 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4305 {
4306         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4307         /*
4308          * an sti; sti; sequence only disable interrupts for the first
4309          * instruction. So, if the last instruction, be it emulated or
4310          * not, left the system with the INT_STI flag enabled, it
4311          * means that the last instruction is an sti. We should not
4312          * leave the flag on in this case. The same goes for mov ss
4313          */
4314         if (!(int_shadow & mask))
4315                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4316 }
4317
4318 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4319 {
4320         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4321         if (ctxt->exception.vector == PF_VECTOR)
4322                 kvm_propagate_fault(vcpu, &ctxt->exception);
4323         else if (ctxt->exception.error_code_valid)
4324                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4325                                       ctxt->exception.error_code);
4326         else
4327                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4328 }
4329
4330 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4331                               const unsigned long *regs)
4332 {
4333         memset(&ctxt->twobyte, 0,
4334                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4335         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4336
4337         ctxt->fetch.start = 0;
4338         ctxt->fetch.end = 0;
4339         ctxt->io_read.pos = 0;
4340         ctxt->io_read.end = 0;
4341         ctxt->mem_read.pos = 0;
4342         ctxt->mem_read.end = 0;
4343 }
4344
4345 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4346 {
4347         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4348         int cs_db, cs_l;
4349
4350         /*
4351          * TODO: fix emulate.c to use guest_read/write_register
4352          * instead of direct ->regs accesses, can save hundred cycles
4353          * on Intel for instructions that don't read/change RSP, for
4354          * for example.
4355          */
4356         cache_all_regs(vcpu);
4357
4358         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4359
4360         ctxt->eflags = kvm_get_rflags(vcpu);
4361         ctxt->eip = kvm_rip_read(vcpu);
4362         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4363                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4364                      cs_l                               ? X86EMUL_MODE_PROT64 :
4365                      cs_db                              ? X86EMUL_MODE_PROT32 :
4366                                                           X86EMUL_MODE_PROT16;
4367         ctxt->guest_mode = is_guest_mode(vcpu);
4368
4369         init_decode_cache(ctxt, vcpu->arch.regs);
4370         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4371 }
4372
4373 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4374 {
4375         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4376         int ret;
4377
4378         init_emulate_ctxt(vcpu);
4379
4380         ctxt->op_bytes = 2;
4381         ctxt->ad_bytes = 2;
4382         ctxt->_eip = ctxt->eip + inc_eip;
4383         ret = emulate_int_real(ctxt, irq);
4384
4385         if (ret != X86EMUL_CONTINUE)
4386                 return EMULATE_FAIL;
4387
4388         ctxt->eip = ctxt->_eip;
4389         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4390         kvm_rip_write(vcpu, ctxt->eip);
4391         kvm_set_rflags(vcpu, ctxt->eflags);
4392
4393         if (irq == NMI_VECTOR)
4394                 vcpu->arch.nmi_pending = 0;
4395         else
4396                 vcpu->arch.interrupt.pending = false;
4397
4398         return EMULATE_DONE;
4399 }
4400 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4401
4402 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4403 {
4404         int r = EMULATE_DONE;
4405
4406         ++vcpu->stat.insn_emulation_fail;
4407         trace_kvm_emulate_insn_failed(vcpu);
4408         if (!is_guest_mode(vcpu)) {
4409                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4410                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4411                 vcpu->run->internal.ndata = 0;
4412                 r = EMULATE_FAIL;
4413         }
4414         kvm_queue_exception(vcpu, UD_VECTOR);
4415
4416         return r;
4417 }
4418
4419 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4420 {
4421         gpa_t gpa;
4422
4423         if (tdp_enabled)
4424                 return false;
4425
4426         /*
4427          * if emulation was due to access to shadowed page table
4428          * and it failed try to unshadow page and re-entetr the
4429          * guest to let CPU execute the instruction.
4430          */
4431         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4432                 return true;
4433
4434         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4435
4436         if (gpa == UNMAPPED_GVA)
4437                 return true; /* let cpu generate fault */
4438
4439         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4440                 return true;
4441
4442         return false;
4443 }
4444
4445 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
4446                               unsigned long cr2,  int emulation_type)
4447 {
4448         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4449         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
4450
4451         last_retry_eip = vcpu->arch.last_retry_eip;
4452         last_retry_addr = vcpu->arch.last_retry_addr;
4453
4454         /*
4455          * If the emulation is caused by #PF and it is non-page_table
4456          * writing instruction, it means the VM-EXIT is caused by shadow
4457          * page protected, we can zap the shadow page and retry this
4458          * instruction directly.
4459          *
4460          * Note: if the guest uses a non-page-table modifying instruction
4461          * on the PDE that points to the instruction, then we will unmap
4462          * the instruction and go to an infinite loop. So, we cache the
4463          * last retried eip and the last fault address, if we meet the eip
4464          * and the address again, we can break out of the potential infinite
4465          * loop.
4466          */
4467         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
4468
4469         if (!(emulation_type & EMULTYPE_RETRY))
4470                 return false;
4471
4472         if (x86_page_table_writing_insn(ctxt))
4473                 return false;
4474
4475         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
4476                 return false;
4477
4478         vcpu->arch.last_retry_eip = ctxt->eip;
4479         vcpu->arch.last_retry_addr = cr2;
4480
4481         if (!vcpu->arch.mmu.direct_map)
4482                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4483
4484         kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4485
4486         return true;
4487 }
4488
4489 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4490                             unsigned long cr2,
4491                             int emulation_type,
4492                             void *insn,
4493                             int insn_len)
4494 {
4495         int r;
4496         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4497         bool writeback = true;
4498
4499         kvm_clear_exception_queue(vcpu);
4500
4501         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4502                 init_emulate_ctxt(vcpu);
4503                 ctxt->interruptibility = 0;
4504                 ctxt->have_exception = false;
4505                 ctxt->perm_ok = false;
4506
4507                 ctxt->only_vendor_specific_insn
4508                         = emulation_type & EMULTYPE_TRAP_UD;
4509
4510                 r = x86_decode_insn(ctxt, insn, insn_len);
4511
4512                 trace_kvm_emulate_insn_start(vcpu);
4513                 ++vcpu->stat.insn_emulation;
4514                 if (r != EMULATION_OK)  {
4515                         if (emulation_type & EMULTYPE_TRAP_UD)
4516                                 return EMULATE_FAIL;
4517                         if (reexecute_instruction(vcpu, cr2))
4518                                 return EMULATE_DONE;
4519                         if (emulation_type & EMULTYPE_SKIP)
4520                                 return EMULATE_FAIL;
4521                         return handle_emulation_failure(vcpu);
4522                 }
4523         }
4524
4525         if (emulation_type & EMULTYPE_SKIP) {
4526                 kvm_rip_write(vcpu, ctxt->_eip);
4527                 return EMULATE_DONE;
4528         }
4529
4530         if (retry_instruction(ctxt, cr2, emulation_type))
4531                 return EMULATE_DONE;
4532
4533         /* this is needed for vmware backdoor interface to work since it
4534            changes registers values  during IO operation */
4535         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4536                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4537                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4538         }
4539
4540 restart:
4541         r = x86_emulate_insn(ctxt);
4542
4543         if (r == EMULATION_INTERCEPTED)
4544                 return EMULATE_DONE;
4545
4546         if (r == EMULATION_FAILED) {
4547                 if (reexecute_instruction(vcpu, cr2))
4548                         return EMULATE_DONE;
4549
4550                 return handle_emulation_failure(vcpu);
4551         }
4552
4553         if (ctxt->have_exception) {
4554                 inject_emulated_exception(vcpu);
4555                 r = EMULATE_DONE;
4556         } else if (vcpu->arch.pio.count) {
4557                 if (!vcpu->arch.pio.in)
4558                         vcpu->arch.pio.count = 0;
4559                 else
4560                         writeback = false;
4561                 r = EMULATE_DO_MMIO;
4562         } else if (vcpu->mmio_needed) {
4563                 if (!vcpu->mmio_is_write)
4564                         writeback = false;
4565                 r = EMULATE_DO_MMIO;
4566         } else if (r == EMULATION_RESTART)
4567                 goto restart;
4568         else
4569                 r = EMULATE_DONE;
4570
4571         if (writeback) {
4572                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4573                 kvm_set_rflags(vcpu, ctxt->eflags);
4574                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4575                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4576                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4577                 kvm_rip_write(vcpu, ctxt->eip);
4578         } else
4579                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4580
4581         return r;
4582 }
4583 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4584
4585 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4586 {
4587         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4588         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4589                                             size, port, &val, 1);
4590         /* do not return to emulator after return from userspace */
4591         vcpu->arch.pio.count = 0;
4592         return ret;
4593 }
4594 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4595
4596 static void tsc_bad(void *info)
4597 {
4598         __this_cpu_write(cpu_tsc_khz, 0);
4599 }
4600
4601 static void tsc_khz_changed(void *data)
4602 {
4603         struct cpufreq_freqs *freq = data;
4604         unsigned long khz = 0;
4605
4606         if (data)
4607                 khz = freq->new;
4608         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4609                 khz = cpufreq_quick_get(raw_smp_processor_id());
4610         if (!khz)
4611                 khz = tsc_khz;
4612         __this_cpu_write(cpu_tsc_khz, khz);
4613 }
4614
4615 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4616                                      void *data)
4617 {
4618         struct cpufreq_freqs *freq = data;
4619         struct kvm *kvm;
4620         struct kvm_vcpu *vcpu;
4621         int i, send_ipi = 0;
4622
4623         /*
4624          * We allow guests to temporarily run on slowing clocks,
4625          * provided we notify them after, or to run on accelerating
4626          * clocks, provided we notify them before.  Thus time never
4627          * goes backwards.
4628          *
4629          * However, we have a problem.  We can't atomically update
4630          * the frequency of a given CPU from this function; it is
4631          * merely a notifier, which can be called from any CPU.
4632          * Changing the TSC frequency at arbitrary points in time
4633          * requires a recomputation of local variables related to
4634          * the TSC for each VCPU.  We must flag these local variables
4635          * to be updated and be sure the update takes place with the
4636          * new frequency before any guests proceed.
4637          *
4638          * Unfortunately, the combination of hotplug CPU and frequency
4639          * change creates an intractable locking scenario; the order
4640          * of when these callouts happen is undefined with respect to
4641          * CPU hotplug, and they can race with each other.  As such,
4642          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4643          * undefined; you can actually have a CPU frequency change take
4644          * place in between the computation of X and the setting of the
4645          * variable.  To protect against this problem, all updates of
4646          * the per_cpu tsc_khz variable are done in an interrupt
4647          * protected IPI, and all callers wishing to update the value
4648          * must wait for a synchronous IPI to complete (which is trivial
4649          * if the caller is on the CPU already).  This establishes the
4650          * necessary total order on variable updates.
4651          *
4652          * Note that because a guest time update may take place
4653          * anytime after the setting of the VCPU's request bit, the
4654          * correct TSC value must be set before the request.  However,
4655          * to ensure the update actually makes it to any guest which
4656          * starts running in hardware virtualization between the set
4657          * and the acquisition of the spinlock, we must also ping the
4658          * CPU after setting the request bit.
4659          *
4660          */
4661
4662         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4663                 return 0;
4664         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4665                 return 0;
4666
4667         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4668
4669         raw_spin_lock(&kvm_lock);
4670         list_for_each_entry(kvm, &vm_list, vm_list) {
4671                 kvm_for_each_vcpu(i, vcpu, kvm) {
4672                         if (vcpu->cpu != freq->cpu)
4673                                 continue;
4674                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4675                         if (vcpu->cpu != smp_processor_id())
4676                                 send_ipi = 1;
4677                 }
4678         }
4679         raw_spin_unlock(&kvm_lock);
4680
4681         if (freq->old < freq->new && send_ipi) {
4682                 /*
4683                  * We upscale the frequency.  Must make the guest
4684                  * doesn't see old kvmclock values while running with
4685                  * the new frequency, otherwise we risk the guest sees
4686                  * time go backwards.
4687                  *
4688                  * In case we update the frequency for another cpu
4689                  * (which might be in guest context) send an interrupt
4690                  * to kick the cpu out of guest context.  Next time
4691                  * guest context is entered kvmclock will be updated,
4692                  * so the guest will not see stale values.
4693                  */
4694                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4695         }
4696         return 0;
4697 }
4698
4699 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4700         .notifier_call  = kvmclock_cpufreq_notifier
4701 };
4702
4703 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4704                                         unsigned long action, void *hcpu)
4705 {
4706         unsigned int cpu = (unsigned long)hcpu;
4707
4708         switch (action) {
4709                 case CPU_ONLINE:
4710                 case CPU_DOWN_FAILED:
4711                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4712                         break;
4713                 case CPU_DOWN_PREPARE:
4714                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4715                         break;
4716         }
4717         return NOTIFY_OK;
4718 }
4719
4720 static struct notifier_block kvmclock_cpu_notifier_block = {
4721         .notifier_call  = kvmclock_cpu_notifier,
4722         .priority = -INT_MAX
4723 };
4724
4725 static void kvm_timer_init(void)
4726 {
4727         int cpu;
4728
4729         max_tsc_khz = tsc_khz;
4730         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4731         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4732 #ifdef CONFIG_CPU_FREQ
4733                 struct cpufreq_policy policy;
4734                 memset(&policy, 0, sizeof(policy));
4735                 cpu = get_cpu();
4736                 cpufreq_get_policy(&policy, cpu);
4737                 if (policy.cpuinfo.max_freq)
4738                         max_tsc_khz = policy.cpuinfo.max_freq;
4739                 put_cpu();
4740 #endif
4741                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4742                                           CPUFREQ_TRANSITION_NOTIFIER);
4743         }
4744         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4745         for_each_online_cpu(cpu)
4746                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4747 }
4748
4749 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4750
4751 int kvm_is_in_guest(void)
4752 {
4753         return __this_cpu_read(current_vcpu) != NULL;
4754 }
4755
4756 static int kvm_is_user_mode(void)
4757 {
4758         int user_mode = 3;
4759
4760         if (__this_cpu_read(current_vcpu))
4761                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
4762
4763         return user_mode != 0;
4764 }
4765
4766 static unsigned long kvm_get_guest_ip(void)
4767 {
4768         unsigned long ip = 0;
4769
4770         if (__this_cpu_read(current_vcpu))
4771                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
4772
4773         return ip;
4774 }
4775
4776 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4777         .is_in_guest            = kvm_is_in_guest,
4778         .is_user_mode           = kvm_is_user_mode,
4779         .get_guest_ip           = kvm_get_guest_ip,
4780 };
4781
4782 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4783 {
4784         __this_cpu_write(current_vcpu, vcpu);
4785 }
4786 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4787
4788 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4789 {
4790         __this_cpu_write(current_vcpu, NULL);
4791 }
4792 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4793
4794 static void kvm_set_mmio_spte_mask(void)
4795 {
4796         u64 mask;
4797         int maxphyaddr = boot_cpu_data.x86_phys_bits;
4798
4799         /*
4800          * Set the reserved bits and the present bit of an paging-structure
4801          * entry to generate page fault with PFER.RSV = 1.
4802          */
4803         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
4804         mask |= 1ull;
4805
4806 #ifdef CONFIG_X86_64
4807         /*
4808          * If reserved bit is not supported, clear the present bit to disable
4809          * mmio page fault.
4810          */
4811         if (maxphyaddr == 52)
4812                 mask &= ~1ull;
4813 #endif
4814
4815         kvm_mmu_set_mmio_spte_mask(mask);
4816 }
4817
4818 int kvm_arch_init(void *opaque)
4819 {
4820         int r;
4821         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4822
4823         if (kvm_x86_ops) {
4824                 printk(KERN_ERR "kvm: already loaded the other module\n");
4825                 r = -EEXIST;
4826                 goto out;
4827         }
4828
4829         if (!ops->cpu_has_kvm_support()) {
4830                 printk(KERN_ERR "kvm: no hardware support\n");
4831                 r = -EOPNOTSUPP;
4832                 goto out;
4833         }
4834         if (ops->disabled_by_bios()) {
4835                 printk(KERN_ERR "kvm: disabled by bios\n");
4836                 r = -EOPNOTSUPP;
4837                 goto out;
4838         }
4839
4840         r = kvm_mmu_module_init();
4841         if (r)
4842                 goto out;
4843
4844         kvm_set_mmio_spte_mask();
4845         kvm_init_msr_list();
4846
4847         kvm_x86_ops = ops;
4848         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4849                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4850
4851         kvm_timer_init();
4852
4853         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4854
4855         if (cpu_has_xsave)
4856                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4857
4858         return 0;
4859
4860 out:
4861         return r;
4862 }
4863
4864 void kvm_arch_exit(void)
4865 {
4866         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4867
4868         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4869                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4870                                             CPUFREQ_TRANSITION_NOTIFIER);
4871         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4872         kvm_x86_ops = NULL;
4873         kvm_mmu_module_exit();
4874 }
4875
4876 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4877 {
4878         ++vcpu->stat.halt_exits;
4879         if (irqchip_in_kernel(vcpu->kvm)) {
4880                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4881                 return 1;
4882         } else {
4883                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4884                 return 0;
4885         }
4886 }
4887 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4888
4889 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4890 {
4891         u64 param, ingpa, outgpa, ret;
4892         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4893         bool fast, longmode;
4894         int cs_db, cs_l;
4895
4896         /*
4897          * hypercall generates UD from non zero cpl and real mode
4898          * per HYPER-V spec
4899          */
4900         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4901                 kvm_queue_exception(vcpu, UD_VECTOR);
4902                 return 0;
4903         }
4904
4905         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4906         longmode = is_long_mode(vcpu) && cs_l == 1;
4907
4908         if (!longmode) {
4909                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4910                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4911                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4912                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4913                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4914                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4915         }
4916 #ifdef CONFIG_X86_64
4917         else {
4918                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4919                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4920                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4921         }
4922 #endif
4923
4924         code = param & 0xffff;
4925         fast = (param >> 16) & 0x1;
4926         rep_cnt = (param >> 32) & 0xfff;
4927         rep_idx = (param >> 48) & 0xfff;
4928
4929         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4930
4931         switch (code) {
4932         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4933                 kvm_vcpu_on_spin(vcpu);
4934                 break;
4935         default:
4936                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4937                 break;
4938         }
4939
4940         ret = res | (((u64)rep_done & 0xfff) << 32);
4941         if (longmode) {
4942                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4943         } else {
4944                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4945                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4946         }
4947
4948         return 1;
4949 }
4950
4951 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4952 {
4953         unsigned long nr, a0, a1, a2, a3, ret;
4954         int r = 1;
4955
4956         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4957                 return kvm_hv_hypercall(vcpu);
4958
4959         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4960         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4961         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4962         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4963         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4964
4965         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4966
4967         if (!is_long_mode(vcpu)) {
4968                 nr &= 0xFFFFFFFF;
4969                 a0 &= 0xFFFFFFFF;
4970                 a1 &= 0xFFFFFFFF;
4971                 a2 &= 0xFFFFFFFF;
4972                 a3 &= 0xFFFFFFFF;
4973         }
4974
4975         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4976                 ret = -KVM_EPERM;
4977                 goto out;
4978         }
4979
4980         switch (nr) {
4981         case KVM_HC_VAPIC_POLL_IRQ:
4982                 ret = 0;
4983                 break;
4984         default:
4985                 ret = -KVM_ENOSYS;
4986                 break;
4987         }
4988 out:
4989         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4990         ++vcpu->stat.hypercalls;
4991         return r;
4992 }
4993 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4994
4995 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
4996 {
4997         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4998         char instruction[3];
4999         unsigned long rip = kvm_rip_read(vcpu);
5000
5001         /*
5002          * Blow out the MMU to ensure that no other VCPU has an active mapping
5003          * to ensure that the updated hypercall appears atomically across all
5004          * VCPUs.
5005          */
5006         kvm_mmu_zap_all(vcpu->kvm);
5007
5008         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5009
5010         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5011 }
5012
5013 /*
5014  * Check if userspace requested an interrupt window, and that the
5015  * interrupt window is open.
5016  *
5017  * No need to exit to userspace if we already have an interrupt queued.
5018  */
5019 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5020 {
5021         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5022                 vcpu->run->request_interrupt_window &&
5023                 kvm_arch_interrupt_allowed(vcpu));
5024 }
5025
5026 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5027 {
5028         struct kvm_run *kvm_run = vcpu->run;
5029
5030         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5031         kvm_run->cr8 = kvm_get_cr8(vcpu);
5032         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5033         if (irqchip_in_kernel(vcpu->kvm))
5034                 kvm_run->ready_for_interrupt_injection = 1;
5035         else
5036                 kvm_run->ready_for_interrupt_injection =
5037                         kvm_arch_interrupt_allowed(vcpu) &&
5038                         !kvm_cpu_has_interrupt(vcpu) &&
5039                         !kvm_event_needs_reinjection(vcpu);
5040 }
5041
5042 static void vapic_enter(struct kvm_vcpu *vcpu)
5043 {
5044         struct kvm_lapic *apic = vcpu->arch.apic;
5045         struct page *page;
5046
5047         if (!apic || !apic->vapic_addr)
5048                 return;
5049
5050         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5051
5052         vcpu->arch.apic->vapic_page = page;
5053 }
5054
5055 static void vapic_exit(struct kvm_vcpu *vcpu)
5056 {
5057         struct kvm_lapic *apic = vcpu->arch.apic;
5058         int idx;
5059
5060         if (!apic || !apic->vapic_addr)
5061                 return;
5062
5063         idx = srcu_read_lock(&vcpu->kvm->srcu);
5064         kvm_release_page_dirty(apic->vapic_page);
5065         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5066         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5067 }
5068
5069 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5070 {
5071         int max_irr, tpr;
5072
5073         if (!kvm_x86_ops->update_cr8_intercept)
5074                 return;
5075
5076         if (!vcpu->arch.apic)
5077                 return;
5078
5079         if (!vcpu->arch.apic->vapic_addr)
5080                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5081         else
5082                 max_irr = -1;
5083
5084         if (max_irr != -1)
5085                 max_irr >>= 4;
5086
5087         tpr = kvm_lapic_get_cr8(vcpu);
5088
5089         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5090 }
5091
5092 static void inject_pending_event(struct kvm_vcpu *vcpu)
5093 {
5094         /* try to reinject previous events if any */
5095         if (vcpu->arch.exception.pending) {
5096                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5097                                         vcpu->arch.exception.has_error_code,
5098                                         vcpu->arch.exception.error_code);
5099                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5100                                           vcpu->arch.exception.has_error_code,
5101                                           vcpu->arch.exception.error_code,
5102                                           vcpu->arch.exception.reinject);
5103                 return;
5104         }
5105
5106         if (vcpu->arch.nmi_injected) {
5107                 kvm_x86_ops->set_nmi(vcpu);
5108                 return;
5109         }
5110
5111         if (vcpu->arch.interrupt.pending) {
5112                 kvm_x86_ops->set_irq(vcpu);
5113                 return;
5114         }
5115
5116         /* try to inject new event if pending */
5117         if (vcpu->arch.nmi_pending) {
5118                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5119                         --vcpu->arch.nmi_pending;
5120                         vcpu->arch.nmi_injected = true;
5121                         kvm_x86_ops->set_nmi(vcpu);
5122                 }
5123         } else if (kvm_cpu_has_interrupt(vcpu)) {
5124                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5125                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5126                                             false);
5127                         kvm_x86_ops->set_irq(vcpu);
5128                 }
5129         }
5130 }
5131
5132 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5133 {
5134         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5135                         !vcpu->guest_xcr0_loaded) {
5136                 /* kvm_set_xcr() also depends on this */
5137                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5138                 vcpu->guest_xcr0_loaded = 1;
5139         }
5140 }
5141
5142 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5143 {
5144         if (vcpu->guest_xcr0_loaded) {
5145                 if (vcpu->arch.xcr0 != host_xcr0)
5146                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5147                 vcpu->guest_xcr0_loaded = 0;
5148         }
5149 }
5150
5151 static void process_nmi(struct kvm_vcpu *vcpu)
5152 {
5153         unsigned limit = 2;
5154
5155         /*
5156          * x86 is limited to one NMI running, and one NMI pending after it.
5157          * If an NMI is already in progress, limit further NMIs to just one.
5158          * Otherwise, allow two (and we'll inject the first one immediately).
5159          */
5160         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5161                 limit = 1;
5162
5163         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5164         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5165         kvm_make_request(KVM_REQ_EVENT, vcpu);
5166 }
5167
5168 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5169 {
5170         int r;
5171         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5172                 vcpu->run->request_interrupt_window;
5173         bool req_immediate_exit = 0;
5174
5175         if (vcpu->requests) {
5176                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5177                         kvm_mmu_unload(vcpu);
5178                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5179                         __kvm_migrate_timers(vcpu);
5180                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5181                         r = kvm_guest_time_update(vcpu);
5182                         if (unlikely(r))
5183                                 goto out;
5184                 }
5185                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5186                         kvm_mmu_sync_roots(vcpu);
5187                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5188                         kvm_x86_ops->tlb_flush(vcpu);
5189                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5190                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5191                         r = 0;
5192                         goto out;
5193                 }
5194                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5195                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5196                         r = 0;
5197                         goto out;
5198                 }
5199                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5200                         vcpu->fpu_active = 0;
5201                         kvm_x86_ops->fpu_deactivate(vcpu);
5202                 }
5203                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5204                         /* Page is swapped out. Do synthetic halt */
5205                         vcpu->arch.apf.halted = true;
5206                         r = 1;
5207                         goto out;
5208                 }
5209                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5210                         record_steal_time(vcpu);
5211                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5212                         process_nmi(vcpu);
5213                 req_immediate_exit =
5214                         kvm_check_request(KVM_REQ_IMMEDIATE_EXIT, vcpu);
5215                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
5216                         kvm_handle_pmu_event(vcpu);
5217                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
5218                         kvm_deliver_pmi(vcpu);
5219         }
5220
5221         r = kvm_mmu_reload(vcpu);
5222         if (unlikely(r))
5223                 goto out;
5224
5225         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5226                 inject_pending_event(vcpu);
5227
5228                 /* enable NMI/IRQ window open exits if needed */
5229                 if (vcpu->arch.nmi_pending)
5230                         kvm_x86_ops->enable_nmi_window(vcpu);
5231                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5232                         kvm_x86_ops->enable_irq_window(vcpu);
5233
5234                 if (kvm_lapic_enabled(vcpu)) {
5235                         update_cr8_intercept(vcpu);
5236                         kvm_lapic_sync_to_vapic(vcpu);
5237                 }
5238         }
5239
5240         preempt_disable();
5241
5242         kvm_x86_ops->prepare_guest_switch(vcpu);
5243         if (vcpu->fpu_active)
5244                 kvm_load_guest_fpu(vcpu);
5245         kvm_load_guest_xcr0(vcpu);
5246
5247         vcpu->mode = IN_GUEST_MODE;
5248
5249         /* We should set ->mode before check ->requests,
5250          * see the comment in make_all_cpus_request.
5251          */
5252         smp_mb();
5253
5254         local_irq_disable();
5255
5256         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5257             || need_resched() || signal_pending(current)) {
5258                 vcpu->mode = OUTSIDE_GUEST_MODE;
5259                 smp_wmb();
5260                 local_irq_enable();
5261                 preempt_enable();
5262                 kvm_x86_ops->cancel_injection(vcpu);
5263                 r = 1;
5264                 goto out;
5265         }
5266
5267         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5268
5269         if (req_immediate_exit)
5270                 smp_send_reschedule(vcpu->cpu);
5271
5272         kvm_guest_enter();
5273
5274         if (unlikely(vcpu->arch.switch_db_regs)) {
5275                 set_debugreg(0, 7);
5276                 set_debugreg(vcpu->arch.eff_db[0], 0);
5277                 set_debugreg(vcpu->arch.eff_db[1], 1);
5278                 set_debugreg(vcpu->arch.eff_db[2], 2);
5279                 set_debugreg(vcpu->arch.eff_db[3], 3);
5280         }
5281
5282         trace_kvm_entry(vcpu->vcpu_id);
5283         kvm_x86_ops->run(vcpu);
5284
5285         /*
5286          * If the guest has used debug registers, at least dr7
5287          * will be disabled while returning to the host.
5288          * If we don't have active breakpoints in the host, we don't
5289          * care about the messed up debug address registers. But if
5290          * we have some of them active, restore the old state.
5291          */
5292         if (hw_breakpoint_active())
5293                 hw_breakpoint_restore();
5294
5295         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5296
5297         vcpu->mode = OUTSIDE_GUEST_MODE;
5298         smp_wmb();
5299         local_irq_enable();
5300
5301         ++vcpu->stat.exits;
5302
5303         /*
5304          * We must have an instruction between local_irq_enable() and
5305          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5306          * the interrupt shadow.  The stat.exits increment will do nicely.
5307          * But we need to prevent reordering, hence this barrier():
5308          */
5309         barrier();
5310
5311         kvm_guest_exit();
5312
5313         preempt_enable();
5314
5315         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5316
5317         /*
5318          * Profile KVM exit RIPs:
5319          */
5320         if (unlikely(prof_on == KVM_PROFILING)) {
5321                 unsigned long rip = kvm_rip_read(vcpu);
5322                 profile_hit(KVM_PROFILING, (void *)rip);
5323         }
5324
5325         if (unlikely(vcpu->arch.tsc_always_catchup))
5326                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5327
5328         kvm_lapic_sync_from_vapic(vcpu);
5329
5330         r = kvm_x86_ops->handle_exit(vcpu);
5331 out:
5332         return r;
5333 }
5334
5335
5336 static int __vcpu_run(struct kvm_vcpu *vcpu)
5337 {
5338         int r;
5339         struct kvm *kvm = vcpu->kvm;
5340
5341         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5342                 pr_debug("vcpu %d received sipi with vector # %x\n",
5343                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5344                 kvm_lapic_reset(vcpu);
5345                 r = kvm_arch_vcpu_reset(vcpu);
5346                 if (r)
5347                         return r;
5348                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5349         }
5350
5351         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5352         vapic_enter(vcpu);
5353
5354         r = 1;
5355         while (r > 0) {
5356                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5357                     !vcpu->arch.apf.halted)
5358                         r = vcpu_enter_guest(vcpu);
5359                 else {
5360                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5361                         kvm_vcpu_block(vcpu);
5362                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5363                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5364                         {
5365                                 switch(vcpu->arch.mp_state) {
5366                                 case KVM_MP_STATE_HALTED:
5367                                         vcpu->arch.mp_state =
5368                                                 KVM_MP_STATE_RUNNABLE;
5369                                 case KVM_MP_STATE_RUNNABLE:
5370                                         vcpu->arch.apf.halted = false;
5371                                         break;
5372                                 case KVM_MP_STATE_SIPI_RECEIVED:
5373                                 default:
5374                                         r = -EINTR;
5375                                         break;
5376                                 }
5377                         }
5378                 }
5379
5380                 if (r <= 0)
5381                         break;
5382
5383                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5384                 if (kvm_cpu_has_pending_timer(vcpu))
5385                         kvm_inject_pending_timer_irqs(vcpu);
5386
5387                 if (dm_request_for_irq_injection(vcpu)) {
5388                         r = -EINTR;
5389                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5390                         ++vcpu->stat.request_irq_exits;
5391                 }
5392
5393                 kvm_check_async_pf_completion(vcpu);
5394
5395                 if (signal_pending(current)) {
5396                         r = -EINTR;
5397                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5398                         ++vcpu->stat.signal_exits;
5399                 }
5400                 if (need_resched()) {
5401                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5402                         kvm_resched(vcpu);
5403                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5404                 }
5405         }
5406
5407         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5408
5409         vapic_exit(vcpu);
5410
5411         return r;
5412 }
5413
5414 static int complete_mmio(struct kvm_vcpu *vcpu)
5415 {
5416         struct kvm_run *run = vcpu->run;
5417         int r;
5418
5419         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5420                 return 1;
5421
5422         if (vcpu->mmio_needed) {
5423                 vcpu->mmio_needed = 0;
5424                 if (!vcpu->mmio_is_write)
5425                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5426                                run->mmio.data, 8);
5427                 vcpu->mmio_index += 8;
5428                 if (vcpu->mmio_index < vcpu->mmio_size) {
5429                         run->exit_reason = KVM_EXIT_MMIO;
5430                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5431                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5432                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5433                         run->mmio.is_write = vcpu->mmio_is_write;
5434                         vcpu->mmio_needed = 1;
5435                         return 0;
5436                 }
5437                 if (vcpu->mmio_is_write)
5438                         return 1;
5439                 vcpu->mmio_read_completed = 1;
5440         }
5441         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5442         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5443         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5444         if (r != EMULATE_DONE)
5445                 return 0;
5446         return 1;
5447 }
5448
5449 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5450 {
5451         int r;
5452         sigset_t sigsaved;
5453
5454         if (!tsk_used_math(current) && init_fpu(current))
5455                 return -ENOMEM;
5456
5457         if (vcpu->sigset_active)
5458                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5459
5460         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5461                 kvm_vcpu_block(vcpu);
5462                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5463                 r = -EAGAIN;
5464                 goto out;
5465         }
5466
5467         /* re-sync apic's tpr */
5468         if (!irqchip_in_kernel(vcpu->kvm)) {
5469                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5470                         r = -EINVAL;
5471                         goto out;
5472                 }
5473         }
5474
5475         r = complete_mmio(vcpu);
5476         if (r <= 0)
5477                 goto out;
5478
5479         r = __vcpu_run(vcpu);
5480
5481 out:
5482         post_kvm_run_save(vcpu);
5483         if (vcpu->sigset_active)
5484                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5485
5486         return r;
5487 }
5488
5489 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5490 {
5491         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5492                 /*
5493                  * We are here if userspace calls get_regs() in the middle of
5494                  * instruction emulation. Registers state needs to be copied
5495                  * back from emulation context to vcpu. Usrapace shouldn't do
5496                  * that usually, but some bad designed PV devices (vmware
5497                  * backdoor interface) need this to work
5498                  */
5499                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5500                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5501                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5502         }
5503         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5504         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5505         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5506         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5507         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5508         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5509         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5510         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5511 #ifdef CONFIG_X86_64
5512         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5513         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5514         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5515         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5516         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5517         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5518         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5519         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5520 #endif
5521
5522         regs->rip = kvm_rip_read(vcpu);
5523         regs->rflags = kvm_get_rflags(vcpu);
5524
5525         return 0;
5526 }
5527
5528 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5529 {
5530         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
5531         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5532
5533         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5534         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5535         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5536         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5537         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5538         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5539         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5540         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5541 #ifdef CONFIG_X86_64
5542         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5543         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5544         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5545         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5546         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5547         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5548         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5549         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5550 #endif
5551
5552         kvm_rip_write(vcpu, regs->rip);
5553         kvm_set_rflags(vcpu, regs->rflags);
5554
5555         vcpu->arch.exception.pending = false;
5556
5557         kvm_make_request(KVM_REQ_EVENT, vcpu);
5558
5559         return 0;
5560 }
5561
5562 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5563 {
5564         struct kvm_segment cs;
5565
5566         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5567         *db = cs.db;
5568         *l = cs.l;
5569 }
5570 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5571
5572 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5573                                   struct kvm_sregs *sregs)
5574 {
5575         struct desc_ptr dt;
5576
5577         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5578         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5579         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5580         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5581         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5582         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5583
5584         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5585         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5586
5587         kvm_x86_ops->get_idt(vcpu, &dt);
5588         sregs->idt.limit = dt.size;
5589         sregs->idt.base = dt.address;
5590         kvm_x86_ops->get_gdt(vcpu, &dt);
5591         sregs->gdt.limit = dt.size;
5592         sregs->gdt.base = dt.address;
5593
5594         sregs->cr0 = kvm_read_cr0(vcpu);
5595         sregs->cr2 = vcpu->arch.cr2;
5596         sregs->cr3 = kvm_read_cr3(vcpu);
5597         sregs->cr4 = kvm_read_cr4(vcpu);
5598         sregs->cr8 = kvm_get_cr8(vcpu);
5599         sregs->efer = vcpu->arch.efer;
5600         sregs->apic_base = kvm_get_apic_base(vcpu);
5601
5602         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5603
5604         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5605                 set_bit(vcpu->arch.interrupt.nr,
5606                         (unsigned long *)sregs->interrupt_bitmap);
5607
5608         return 0;
5609 }
5610
5611 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5612                                     struct kvm_mp_state *mp_state)
5613 {
5614         mp_state->mp_state = vcpu->arch.mp_state;
5615         return 0;
5616 }
5617
5618 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5619                                     struct kvm_mp_state *mp_state)
5620 {
5621         vcpu->arch.mp_state = mp_state->mp_state;
5622         kvm_make_request(KVM_REQ_EVENT, vcpu);
5623         return 0;
5624 }
5625
5626 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5627                     bool has_error_code, u32 error_code)
5628 {
5629         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5630         int ret;
5631
5632         init_emulate_ctxt(vcpu);
5633
5634         ret = emulator_task_switch(ctxt, tss_selector, reason,
5635                                    has_error_code, error_code);
5636
5637         if (ret)
5638                 return EMULATE_FAIL;
5639
5640         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5641         kvm_rip_write(vcpu, ctxt->eip);
5642         kvm_set_rflags(vcpu, ctxt->eflags);
5643         kvm_make_request(KVM_REQ_EVENT, vcpu);
5644         return EMULATE_DONE;
5645 }
5646 EXPORT_SYMBOL_GPL(kvm_task_switch);
5647
5648 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5649                                   struct kvm_sregs *sregs)
5650 {
5651         int mmu_reset_needed = 0;
5652         int pending_vec, max_bits, idx;
5653         struct desc_ptr dt;
5654
5655         dt.size = sregs->idt.limit;
5656         dt.address = sregs->idt.base;
5657         kvm_x86_ops->set_idt(vcpu, &dt);
5658         dt.size = sregs->gdt.limit;
5659         dt.address = sregs->gdt.base;
5660         kvm_x86_ops->set_gdt(vcpu, &dt);
5661
5662         vcpu->arch.cr2 = sregs->cr2;
5663         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5664         vcpu->arch.cr3 = sregs->cr3;
5665         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5666
5667         kvm_set_cr8(vcpu, sregs->cr8);
5668
5669         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5670         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5671         kvm_set_apic_base(vcpu, sregs->apic_base);
5672
5673         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5674         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5675         vcpu->arch.cr0 = sregs->cr0;
5676
5677         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5678         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5679         if (sregs->cr4 & X86_CR4_OSXSAVE)
5680                 kvm_update_cpuid(vcpu);
5681
5682         idx = srcu_read_lock(&vcpu->kvm->srcu);
5683         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5684                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5685                 mmu_reset_needed = 1;
5686         }
5687         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5688
5689         if (mmu_reset_needed)
5690                 kvm_mmu_reset_context(vcpu);
5691
5692         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5693         pending_vec = find_first_bit(
5694                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5695         if (pending_vec < max_bits) {
5696                 kvm_queue_interrupt(vcpu, pending_vec, false);
5697                 pr_debug("Set back pending irq %d\n", pending_vec);
5698         }
5699
5700         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5701         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5702         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5703         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5704         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5705         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5706
5707         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5708         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5709
5710         update_cr8_intercept(vcpu);
5711
5712         /* Older userspace won't unhalt the vcpu on reset. */
5713         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5714             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5715             !is_protmode(vcpu))
5716                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5717
5718         kvm_make_request(KVM_REQ_EVENT, vcpu);
5719
5720         return 0;
5721 }
5722
5723 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5724                                         struct kvm_guest_debug *dbg)
5725 {
5726         unsigned long rflags;
5727         int i, r;
5728
5729         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5730                 r = -EBUSY;
5731                 if (vcpu->arch.exception.pending)
5732                         goto out;
5733                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5734                         kvm_queue_exception(vcpu, DB_VECTOR);
5735                 else
5736                         kvm_queue_exception(vcpu, BP_VECTOR);
5737         }
5738
5739         /*
5740          * Read rflags as long as potentially injected trace flags are still
5741          * filtered out.
5742          */
5743         rflags = kvm_get_rflags(vcpu);
5744
5745         vcpu->guest_debug = dbg->control;
5746         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5747                 vcpu->guest_debug = 0;
5748
5749         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5750                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5751                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5752                 vcpu->arch.switch_db_regs =
5753                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5754         } else {
5755                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5756                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5757                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5758         }
5759
5760         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5761                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5762                         get_segment_base(vcpu, VCPU_SREG_CS);
5763
5764         /*
5765          * Trigger an rflags update that will inject or remove the trace
5766          * flags.
5767          */
5768         kvm_set_rflags(vcpu, rflags);
5769
5770         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5771
5772         r = 0;
5773
5774 out:
5775
5776         return r;
5777 }
5778
5779 /*
5780  * Translate a guest virtual address to a guest physical address.
5781  */
5782 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5783                                     struct kvm_translation *tr)
5784 {
5785         unsigned long vaddr = tr->linear_address;
5786         gpa_t gpa;
5787         int idx;
5788
5789         idx = srcu_read_lock(&vcpu->kvm->srcu);
5790         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5791         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5792         tr->physical_address = gpa;
5793         tr->valid = gpa != UNMAPPED_GVA;
5794         tr->writeable = 1;
5795         tr->usermode = 0;
5796
5797         return 0;
5798 }
5799
5800 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5801 {
5802         struct i387_fxsave_struct *fxsave =
5803                         &vcpu->arch.guest_fpu.state->fxsave;
5804
5805         memcpy(fpu->fpr, fxsave->st_space, 128);
5806         fpu->fcw = fxsave->cwd;
5807         fpu->fsw = fxsave->swd;
5808         fpu->ftwx = fxsave->twd;
5809         fpu->last_opcode = fxsave->fop;
5810         fpu->last_ip = fxsave->rip;
5811         fpu->last_dp = fxsave->rdp;
5812         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5813
5814         return 0;
5815 }
5816
5817 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5818 {
5819         struct i387_fxsave_struct *fxsave =
5820                         &vcpu->arch.guest_fpu.state->fxsave;
5821
5822         memcpy(fxsave->st_space, fpu->fpr, 128);
5823         fxsave->cwd = fpu->fcw;
5824         fxsave->swd = fpu->fsw;
5825         fxsave->twd = fpu->ftwx;
5826         fxsave->fop = fpu->last_opcode;
5827         fxsave->rip = fpu->last_ip;
5828         fxsave->rdp = fpu->last_dp;
5829         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5830
5831         return 0;
5832 }
5833
5834 int fx_init(struct kvm_vcpu *vcpu)
5835 {
5836         int err;
5837
5838         err = fpu_alloc(&vcpu->arch.guest_fpu);
5839         if (err)
5840                 return err;
5841
5842         fpu_finit(&vcpu->arch.guest_fpu);
5843
5844         /*
5845          * Ensure guest xcr0 is valid for loading
5846          */
5847         vcpu->arch.xcr0 = XSTATE_FP;
5848
5849         vcpu->arch.cr0 |= X86_CR0_ET;
5850
5851         return 0;
5852 }
5853 EXPORT_SYMBOL_GPL(fx_init);
5854
5855 static void fx_free(struct kvm_vcpu *vcpu)
5856 {
5857         fpu_free(&vcpu->arch.guest_fpu);
5858 }
5859
5860 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5861 {
5862         if (vcpu->guest_fpu_loaded)
5863                 return;
5864
5865         /*
5866          * Restore all possible states in the guest,
5867          * and assume host would use all available bits.
5868          * Guest xcr0 would be loaded later.
5869          */
5870         kvm_put_guest_xcr0(vcpu);
5871         vcpu->guest_fpu_loaded = 1;
5872         unlazy_fpu(current);
5873         fpu_restore_checking(&vcpu->arch.guest_fpu);
5874         trace_kvm_fpu(1);
5875 }
5876
5877 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5878 {
5879         kvm_put_guest_xcr0(vcpu);
5880
5881         if (!vcpu->guest_fpu_loaded)
5882                 return;
5883
5884         vcpu->guest_fpu_loaded = 0;
5885         fpu_save_init(&vcpu->arch.guest_fpu);
5886         ++vcpu->stat.fpu_reload;
5887         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5888         trace_kvm_fpu(0);
5889 }
5890
5891 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5892 {
5893         kvmclock_reset(vcpu);
5894
5895         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5896         fx_free(vcpu);
5897         kvm_x86_ops->vcpu_free(vcpu);
5898 }
5899
5900 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5901                                                 unsigned int id)
5902 {
5903         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5904                 printk_once(KERN_WARNING
5905                 "kvm: SMP vm created on host with unstable TSC; "
5906                 "guest TSC will not be reliable\n");
5907         return kvm_x86_ops->vcpu_create(kvm, id);
5908 }
5909
5910 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5911 {
5912         int r;
5913
5914         vcpu->arch.mtrr_state.have_fixed = 1;
5915         vcpu_load(vcpu);
5916         r = kvm_arch_vcpu_reset(vcpu);
5917         if (r == 0)
5918                 r = kvm_mmu_setup(vcpu);
5919         vcpu_put(vcpu);
5920
5921         return r;
5922 }
5923
5924 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5925 {
5926         vcpu->arch.apf.msr_val = 0;
5927
5928         vcpu_load(vcpu);
5929         kvm_mmu_unload(vcpu);
5930         vcpu_put(vcpu);
5931
5932         fx_free(vcpu);
5933         kvm_x86_ops->vcpu_free(vcpu);
5934 }
5935
5936 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5937 {
5938         atomic_set(&vcpu->arch.nmi_queued, 0);
5939         vcpu->arch.nmi_pending = 0;
5940         vcpu->arch.nmi_injected = false;
5941
5942         vcpu->arch.switch_db_regs = 0;
5943         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5944         vcpu->arch.dr6 = DR6_FIXED_1;
5945         vcpu->arch.dr7 = DR7_FIXED_1;
5946
5947         kvm_make_request(KVM_REQ_EVENT, vcpu);
5948         vcpu->arch.apf.msr_val = 0;
5949         vcpu->arch.st.msr_val = 0;
5950
5951         kvmclock_reset(vcpu);
5952
5953         kvm_clear_async_pf_completion_queue(vcpu);
5954         kvm_async_pf_hash_reset(vcpu);
5955         vcpu->arch.apf.halted = false;
5956
5957         kvm_pmu_reset(vcpu);
5958
5959         return kvm_x86_ops->vcpu_reset(vcpu);
5960 }
5961
5962 int kvm_arch_hardware_enable(void *garbage)
5963 {
5964         struct kvm *kvm;
5965         struct kvm_vcpu *vcpu;
5966         int i;
5967
5968         kvm_shared_msr_cpu_online();
5969         list_for_each_entry(kvm, &vm_list, vm_list)
5970                 kvm_for_each_vcpu(i, vcpu, kvm)
5971                         if (vcpu->cpu == smp_processor_id())
5972                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5973         return kvm_x86_ops->hardware_enable(garbage);
5974 }
5975
5976 void kvm_arch_hardware_disable(void *garbage)
5977 {
5978         kvm_x86_ops->hardware_disable(garbage);
5979         drop_user_return_notifiers(garbage);
5980 }
5981
5982 int kvm_arch_hardware_setup(void)
5983 {
5984         return kvm_x86_ops->hardware_setup();
5985 }
5986
5987 void kvm_arch_hardware_unsetup(void)
5988 {
5989         kvm_x86_ops->hardware_unsetup();
5990 }
5991
5992 void kvm_arch_check_processor_compat(void *rtn)
5993 {
5994         kvm_x86_ops->check_processor_compatibility(rtn);
5995 }
5996
5997 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5998 {
5999         struct page *page;
6000         struct kvm *kvm;
6001         int r;
6002
6003         BUG_ON(vcpu->kvm == NULL);
6004         kvm = vcpu->kvm;
6005
6006         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6007         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6008                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6009         else
6010                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6011
6012         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6013         if (!page) {
6014                 r = -ENOMEM;
6015                 goto fail;
6016         }
6017         vcpu->arch.pio_data = page_address(page);
6018
6019         kvm_set_tsc_khz(vcpu, max_tsc_khz);
6020
6021         r = kvm_mmu_create(vcpu);
6022         if (r < 0)
6023                 goto fail_free_pio_data;
6024
6025         if (irqchip_in_kernel(kvm)) {
6026                 r = kvm_create_lapic(vcpu);
6027                 if (r < 0)
6028                         goto fail_mmu_destroy;
6029         }
6030
6031         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6032                                        GFP_KERNEL);
6033         if (!vcpu->arch.mce_banks) {
6034                 r = -ENOMEM;
6035                 goto fail_free_lapic;
6036         }
6037         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6038
6039         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6040                 goto fail_free_mce_banks;
6041
6042         kvm_async_pf_hash_reset(vcpu);
6043         kvm_pmu_init(vcpu);
6044
6045         return 0;
6046 fail_free_mce_banks:
6047         kfree(vcpu->arch.mce_banks);
6048 fail_free_lapic:
6049         kvm_free_lapic(vcpu);
6050 fail_mmu_destroy:
6051         kvm_mmu_destroy(vcpu);
6052 fail_free_pio_data:
6053         free_page((unsigned long)vcpu->arch.pio_data);
6054 fail:
6055         return r;
6056 }
6057
6058 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6059 {
6060         int idx;
6061
6062         kvm_pmu_destroy(vcpu);
6063         kfree(vcpu->arch.mce_banks);
6064         kvm_free_lapic(vcpu);
6065         idx = srcu_read_lock(&vcpu->kvm->srcu);
6066         kvm_mmu_destroy(vcpu);
6067         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6068         free_page((unsigned long)vcpu->arch.pio_data);
6069 }
6070
6071 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
6072 {
6073         if (type)
6074                 return -EINVAL;
6075
6076         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6077         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6078
6079         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6080         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6081
6082         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6083
6084         return 0;
6085 }
6086
6087 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6088 {
6089         vcpu_load(vcpu);
6090         kvm_mmu_unload(vcpu);
6091         vcpu_put(vcpu);
6092 }
6093
6094 static void kvm_free_vcpus(struct kvm *kvm)
6095 {
6096         unsigned int i;
6097         struct kvm_vcpu *vcpu;
6098
6099         /*
6100          * Unpin any mmu pages first.
6101          */
6102         kvm_for_each_vcpu(i, vcpu, kvm) {
6103                 kvm_clear_async_pf_completion_queue(vcpu);
6104                 kvm_unload_vcpu_mmu(vcpu);
6105         }
6106         kvm_for_each_vcpu(i, vcpu, kvm)
6107                 kvm_arch_vcpu_free(vcpu);
6108
6109         mutex_lock(&kvm->lock);
6110         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6111                 kvm->vcpus[i] = NULL;
6112
6113         atomic_set(&kvm->online_vcpus, 0);
6114         mutex_unlock(&kvm->lock);
6115 }
6116
6117 void kvm_arch_sync_events(struct kvm *kvm)
6118 {
6119         kvm_free_all_assigned_devices(kvm);
6120         kvm_free_pit(kvm);
6121 }
6122
6123 void kvm_arch_destroy_vm(struct kvm *kvm)
6124 {
6125         kvm_iommu_unmap_guest(kvm);
6126         kfree(kvm->arch.vpic);
6127         kfree(kvm->arch.vioapic);
6128         kvm_free_vcpus(kvm);
6129         if (kvm->arch.apic_access_page)
6130                 put_page(kvm->arch.apic_access_page);
6131         if (kvm->arch.ept_identity_pagetable)
6132                 put_page(kvm->arch.ept_identity_pagetable);
6133 }
6134
6135 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6136                                 struct kvm_memory_slot *memslot,
6137                                 struct kvm_memory_slot old,
6138                                 struct kvm_userspace_memory_region *mem,
6139                                 int user_alloc)
6140 {
6141         int npages = memslot->npages;
6142         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6143
6144         /* Prevent internal slot pages from being moved by fork()/COW. */
6145         if (memslot->id >= KVM_MEMORY_SLOTS)
6146                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6147
6148         /*To keep backward compatibility with older userspace,
6149          *x86 needs to hanlde !user_alloc case.
6150          */
6151         if (!user_alloc) {
6152                 if (npages && !old.rmap) {
6153                         unsigned long userspace_addr;
6154
6155                         down_write(&current->mm->mmap_sem);
6156                         userspace_addr = do_mmap(NULL, 0,
6157                                                  npages * PAGE_SIZE,
6158                                                  PROT_READ | PROT_WRITE,
6159                                                  map_flags,
6160                                                  0);
6161                         up_write(&current->mm->mmap_sem);
6162
6163                         if (IS_ERR((void *)userspace_addr))
6164                                 return PTR_ERR((void *)userspace_addr);
6165
6166                         memslot->userspace_addr = userspace_addr;
6167                 }
6168         }
6169
6170
6171         return 0;
6172 }
6173
6174 void kvm_arch_commit_memory_region(struct kvm *kvm,
6175                                 struct kvm_userspace_memory_region *mem,
6176                                 struct kvm_memory_slot old,
6177                                 int user_alloc)
6178 {
6179
6180         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6181
6182         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6183                 int ret;
6184
6185                 down_write(&current->mm->mmap_sem);
6186                 ret = do_munmap(current->mm, old.userspace_addr,
6187                                 old.npages * PAGE_SIZE);
6188                 up_write(&current->mm->mmap_sem);
6189                 if (ret < 0)
6190                         printk(KERN_WARNING
6191                                "kvm_vm_ioctl_set_memory_region: "
6192                                "failed to munmap memory\n");
6193         }
6194
6195         if (!kvm->arch.n_requested_mmu_pages)
6196                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6197
6198         spin_lock(&kvm->mmu_lock);
6199         if (nr_mmu_pages)
6200                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6201         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6202         spin_unlock(&kvm->mmu_lock);
6203 }
6204
6205 void kvm_arch_flush_shadow(struct kvm *kvm)
6206 {
6207         kvm_mmu_zap_all(kvm);
6208         kvm_reload_remote_mmus(kvm);
6209 }
6210
6211 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6212 {
6213         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6214                 !vcpu->arch.apf.halted)
6215                 || !list_empty_careful(&vcpu->async_pf.done)
6216                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6217                 || atomic_read(&vcpu->arch.nmi_queued) ||
6218                 (kvm_arch_interrupt_allowed(vcpu) &&
6219                  kvm_cpu_has_interrupt(vcpu));
6220 }
6221
6222 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6223 {
6224         int me;
6225         int cpu = vcpu->cpu;
6226
6227         if (waitqueue_active(&vcpu->wq)) {
6228                 wake_up_interruptible(&vcpu->wq);
6229                 ++vcpu->stat.halt_wakeup;
6230         }
6231
6232         me = get_cpu();
6233         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6234                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6235                         smp_send_reschedule(cpu);
6236         put_cpu();
6237 }
6238
6239 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6240 {
6241         return kvm_x86_ops->interrupt_allowed(vcpu);
6242 }
6243
6244 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6245 {
6246         unsigned long current_rip = kvm_rip_read(vcpu) +
6247                 get_segment_base(vcpu, VCPU_SREG_CS);
6248
6249         return current_rip == linear_rip;
6250 }
6251 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6252
6253 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6254 {
6255         unsigned long rflags;
6256
6257         rflags = kvm_x86_ops->get_rflags(vcpu);
6258         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6259                 rflags &= ~X86_EFLAGS_TF;
6260         return rflags;
6261 }
6262 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6263
6264 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6265 {
6266         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6267             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6268                 rflags |= X86_EFLAGS_TF;
6269         kvm_x86_ops->set_rflags(vcpu, rflags);
6270         kvm_make_request(KVM_REQ_EVENT, vcpu);
6271 }
6272 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6273
6274 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6275 {
6276         int r;
6277
6278         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6279               is_error_page(work->page))
6280                 return;
6281
6282         r = kvm_mmu_reload(vcpu);
6283         if (unlikely(r))
6284                 return;
6285
6286         if (!vcpu->arch.mmu.direct_map &&
6287               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6288                 return;
6289
6290         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6291 }
6292
6293 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6294 {
6295         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6296 }
6297
6298 static inline u32 kvm_async_pf_next_probe(u32 key)
6299 {
6300         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6301 }
6302
6303 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6304 {
6305         u32 key = kvm_async_pf_hash_fn(gfn);
6306
6307         while (vcpu->arch.apf.gfns[key] != ~0)
6308                 key = kvm_async_pf_next_probe(key);
6309
6310         vcpu->arch.apf.gfns[key] = gfn;
6311 }
6312
6313 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6314 {
6315         int i;
6316         u32 key = kvm_async_pf_hash_fn(gfn);
6317
6318         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6319                      (vcpu->arch.apf.gfns[key] != gfn &&
6320                       vcpu->arch.apf.gfns[key] != ~0); i++)
6321                 key = kvm_async_pf_next_probe(key);
6322
6323         return key;
6324 }
6325
6326 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6327 {
6328         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6329 }
6330
6331 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6332 {
6333         u32 i, j, k;
6334
6335         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6336         while (true) {
6337                 vcpu->arch.apf.gfns[i] = ~0;
6338                 do {
6339                         j = kvm_async_pf_next_probe(j);
6340                         if (vcpu->arch.apf.gfns[j] == ~0)
6341                                 return;
6342                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6343                         /*
6344                          * k lies cyclically in ]i,j]
6345                          * |    i.k.j |
6346                          * |....j i.k.| or  |.k..j i...|
6347                          */
6348                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6349                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6350                 i = j;
6351         }
6352 }
6353
6354 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6355 {
6356
6357         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6358                                       sizeof(val));
6359 }
6360
6361 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6362                                      struct kvm_async_pf *work)
6363 {
6364         struct x86_exception fault;
6365
6366         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6367         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6368
6369         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6370             (vcpu->arch.apf.send_user_only &&
6371              kvm_x86_ops->get_cpl(vcpu) == 0))
6372                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6373         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6374                 fault.vector = PF_VECTOR;
6375                 fault.error_code_valid = true;
6376                 fault.error_code = 0;
6377                 fault.nested_page_fault = false;
6378                 fault.address = work->arch.token;
6379                 kvm_inject_page_fault(vcpu, &fault);
6380         }
6381 }
6382
6383 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6384                                  struct kvm_async_pf *work)
6385 {
6386         struct x86_exception fault;
6387
6388         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6389         if (is_error_page(work->page))
6390                 work->arch.token = ~0; /* broadcast wakeup */
6391         else
6392                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6393
6394         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6395             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6396                 fault.vector = PF_VECTOR;
6397                 fault.error_code_valid = true;
6398                 fault.error_code = 0;
6399                 fault.nested_page_fault = false;
6400                 fault.address = work->arch.token;
6401                 kvm_inject_page_fault(vcpu, &fault);
6402         }
6403         vcpu->arch.apf.halted = false;
6404 }
6405
6406 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6407 {
6408         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6409                 return true;
6410         else
6411                 return !kvm_event_needs_reinjection(vcpu) &&
6412                         kvm_x86_ops->interrupt_allowed(vcpu);
6413 }
6414
6415 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6416 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6417 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6418 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6419 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6420 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6421 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6422 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6423 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6424 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6425 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6426 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);