2 * @file op_model_ppro.h
3 * pentium pro / P6 model-specific MSR operations
5 * @remark Copyright 2002 OProfile authors
6 * @remark Read the file COPYING
9 * @author Philippe Elie
10 * @author Graydon Hoare
13 #include <linux/oprofile.h>
14 #include <asm/ptrace.h>
17 #include "op_x86_model.h"
18 #include "op_counter.h"
20 #define NUM_COUNTERS 2
21 #define NUM_CONTROLS 2
23 #define CTR_READ(l,h,msrs,c) do {rdmsr(msrs->counters[(c)].addr, (l), (h));} while (0)
24 #define CTR_WRITE(l,msrs,c) do {wrmsr(msrs->counters[(c)].addr, -(u32)(l), -1);} while (0)
25 #define CTR_OVERFLOWED(n) (!((n) & (1U<<31)))
27 #define CTRL_READ(l,h,msrs,c) do {rdmsr((msrs->controls[(c)].addr), (l), (h));} while (0)
28 #define CTRL_WRITE(l,h,msrs,c) do {wrmsr((msrs->controls[(c)].addr), (l), (h));} while (0)
29 #define CTRL_SET_ACTIVE(n) (n |= (1<<22))
30 #define CTRL_SET_INACTIVE(n) (n &= ~(1<<22))
31 #define CTRL_CLEAR(x) (x &= (1<<21))
32 #define CTRL_SET_ENABLE(val) (val |= 1<<20)
33 #define CTRL_SET_USR(val,u) (val |= ((u & 1) << 16))
34 #define CTRL_SET_KERN(val,k) (val |= ((k & 1) << 17))
35 #define CTRL_SET_UM(val, m) (val |= (m << 8))
36 #define CTRL_SET_EVENT(val, e) (val |= e)
38 static unsigned long reset_value[NUM_COUNTERS];
40 static void ppro_fill_in_addresses(struct op_msrs * const msrs)
42 msrs->counters[0].addr = MSR_P6_PERFCTR0;
43 msrs->counters[1].addr = MSR_P6_PERFCTR1;
45 msrs->controls[0].addr = MSR_P6_EVNTSEL0;
46 msrs->controls[1].addr = MSR_P6_EVNTSEL1;
50 static void ppro_setup_ctrs(struct op_msrs const * const msrs)
52 unsigned int low, high;
55 /* clear all counters */
56 for (i = 0 ; i < NUM_CONTROLS; ++i) {
57 CTRL_READ(low, high, msrs, i);
59 CTRL_WRITE(low, high, msrs, i);
62 /* avoid a false detection of ctr overflows in NMI handler */
63 for (i = 0; i < NUM_COUNTERS; ++i) {
64 CTR_WRITE(1, msrs, i);
67 /* enable active counters */
68 for (i = 0; i < NUM_COUNTERS; ++i) {
69 if (counter_config[i].event) {
70 reset_value[i] = counter_config[i].count;
72 CTR_WRITE(counter_config[i].count, msrs, i);
74 CTRL_READ(low, high, msrs, i);
77 CTRL_SET_USR(low, counter_config[i].user);
78 CTRL_SET_KERN(low, counter_config[i].kernel);
79 CTRL_SET_UM(low, counter_config[i].unit_mask);
80 CTRL_SET_EVENT(low, counter_config[i].event);
81 CTRL_WRITE(low, high, msrs, i);
87 static int ppro_check_ctrs(unsigned int const cpu,
88 struct op_msrs const * const msrs,
89 struct pt_regs * const regs)
91 unsigned int low, high;
93 unsigned long eip = instruction_pointer(regs);
94 int is_kernel = !user_mode(regs);
96 for (i = 0 ; i < NUM_COUNTERS; ++i) {
97 CTR_READ(low, high, msrs, i);
98 if (CTR_OVERFLOWED(low)) {
99 oprofile_add_sample(eip, is_kernel, i, cpu);
100 CTR_WRITE(reset_value[i], msrs, i);
104 /* We can't work out if we really handled an interrupt. We
105 * might have caught a *second* counter just after overflowing
106 * the interrupt for this counter then arrives
107 * and we don't find a counter that's overflowed, so we
108 * would return 0 and get dazed + confused. Instead we always
109 * assume we found an overflow. This sucks.
115 static void ppro_start(struct op_msrs const * const msrs)
117 unsigned int low,high;
118 CTRL_READ(low, high, msrs, 0);
119 CTRL_SET_ACTIVE(low);
120 CTRL_WRITE(low, high, msrs, 0);
124 static void ppro_stop(struct op_msrs const * const msrs)
126 unsigned int low,high;
127 CTRL_READ(low, high, msrs, 0);
128 CTRL_SET_INACTIVE(low);
129 CTRL_WRITE(low, high, msrs, 0);
133 struct op_x86_model_spec const op_ppro_spec = {
134 .num_counters = NUM_COUNTERS,
135 .num_controls = NUM_CONTROLS,
136 .fill_in_addresses = &ppro_fill_in_addresses,
137 .setup_ctrs = &ppro_setup_ctrs,
138 .check_ctrs = &ppro_check_ctrs,
139 .start = &ppro_start,