arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <linux/pci.h>
  48 #include <trace/events/kvm.h>
  49
  50 #define CREATE_TRACE_POINTS
  51 #include "trace.h"
  52
  53 #include <asm/debugreg.h>
  54 #include <asm/msr.h>
  55 #include <asm/desc.h>
  56 #include <asm/mtrr.h>
  57 #include <asm/mce.h>
  58 #include <asm/i387.h>
  59 #include <asm/xcr.h>
  60 #include <asm/pvclock.h>
  61 #include <asm/div64.h>
  62
  63 #define MAX_IO_MSRS 256
  64 #define KVM_MAX_MCE_BANKS 32
  65 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  66
  67 #define emul_to_vcpu(ctxt) \
  68         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  69
  70 /* EFER defaults:
  71  * - enable syscall per default because its emulated by KVM
  72  * - enable LME and LMA per default on 64 bit KVM
  73  */
  74 #ifdef CONFIG_X86_64
  75 static
  76 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  77 #else
  78 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  79 #endif
  80
  81 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  82 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  83
  84 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  85 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  86                                     struct kvm_cpuid_entry2 __user *entries);
  87 static void process_nmi(struct kvm_vcpu *vcpu);
  88
  89 struct kvm_x86_ops *kvm_x86_ops;
  90 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  91
  92 int ignore_msrs = 0;
  93 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
  94
  95 bool kvm_has_tsc_control;
  96 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
  97 u32  kvm_max_guest_tsc_khz;
  98 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
  99
 100 #define KVM_NR_SHARED_MSRS 16
 101
 102 struct kvm_shared_msrs_global {
 103         int nr;
 104         u32 msrs[KVM_NR_SHARED_MSRS];
 105 };
 106
 107 struct kvm_shared_msrs {
 108         struct user_return_notifier urn;
 109         bool registered;
 110         struct kvm_shared_msr_values {
 111                 u64 host;
 112                 u64 curr;
 113         } values[KVM_NR_SHARED_MSRS];
 114 };
 115
 116 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 117 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 118
 119 struct kvm_stats_debugfs_item debugfs_entries[] = {
 120         { "pf_fixed", VCPU_STAT(pf_fixed) },
 121         { "pf_guest", VCPU_STAT(pf_guest) },
 122         { "tlb_flush", VCPU_STAT(tlb_flush) },
 123         { "invlpg", VCPU_STAT(invlpg) },
 124         { "exits", VCPU_STAT(exits) },
 125         { "io_exits", VCPU_STAT(io_exits) },
 126         { "mmio_exits", VCPU_STAT(mmio_exits) },
 127         { "signal_exits", VCPU_STAT(signal_exits) },
 128         { "irq_window", VCPU_STAT(irq_window_exits) },
 129         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 130         { "halt_exits", VCPU_STAT(halt_exits) },
 131         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 132         { "hypercalls", VCPU_STAT(hypercalls) },
 133         { "request_irq", VCPU_STAT(request_irq_exits) },
 134         { "irq_exits", VCPU_STAT(irq_exits) },
 135         { "host_state_reload", VCPU_STAT(host_state_reload) },
 136         { "efer_reload", VCPU_STAT(efer_reload) },
 137         { "fpu_reload", VCPU_STAT(fpu_reload) },
 138         { "insn_emulation", VCPU_STAT(insn_emulation) },
 139         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 140         { "irq_injections", VCPU_STAT(irq_injections) },
 141         { "nmi_injections", VCPU_STAT(nmi_injections) },
 142         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 143         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 144         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 145         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 146         { "mmu_flooded", VM_STAT(mmu_flooded) },
 147         { "mmu_recycled", VM_STAT(mmu_recycled) },
 148         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 149         { "mmu_unsync", VM_STAT(mmu_unsync) },
 150         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 151         { "largepages", VM_STAT(lpages) },
 152         { NULL }
 153 };
 154
 155 u64 __read_mostly host_xcr0;
 156
 157 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 158
 159 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 160 {
 161         int i;
 162         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 163                 vcpu->arch.apf.gfns[i] = ~0;
 164 }
 165
 166 static void kvm_on_user_return(struct user_return_notifier *urn)
 167 {
 168         unsigned slot;
 169         struct kvm_shared_msrs *locals
 170                 = container_of(urn, struct kvm_shared_msrs, urn);
 171         struct kvm_shared_msr_values *values;
 172
 173         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 174                 values = &locals->values[slot];
 175                 if (values->host != values->curr) {
 176                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 177                         values->curr = values->host;
 178                 }
 179         }
 180         locals->registered = false;
 181         user_return_notifier_unregister(urn);
 182 }
 183
 184 static void shared_msr_update(unsigned slot, u32 msr)
 185 {
 186         struct kvm_shared_msrs *smsr;
 187         u64 value;
 188
 189         smsr = &__get_cpu_var(shared_msrs);
 190         /* only read, and nobody should modify it at this time,
 191          * so don't need lock */
 192         if (slot >= shared_msrs_global.nr) {
 193                 printk(KERN_ERR "kvm: invalid MSR slot!");
 194                 return;
 195         }
 196         rdmsrl_safe(msr, &value);
 197         smsr->values[slot].host = value;
 198         smsr->values[slot].curr = value;
 199 }
 200
 201 void kvm_define_shared_msr(unsigned slot, u32 msr)
 202 {
 203         if (slot >= shared_msrs_global.nr)
 204                 shared_msrs_global.nr = slot + 1;
 205         shared_msrs_global.msrs[slot] = msr;
 206         /* we need ensured the shared_msr_global have been updated */
 207         smp_wmb();
 208 }
 209 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 210
 211 static void kvm_shared_msr_cpu_online(void)
 212 {
 213         unsigned i;
 214
 215         for (i = 0; i < shared_msrs_global.nr; ++i)
 216                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 217 }
 218
 219 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 220 {
 221         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 222
 223         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 224                 return;
 225         smsr->values[slot].curr = value;
 226         wrmsrl(shared_msrs_global.msrs[slot], value);
 227         if (!smsr->registered) {
 228                 smsr->urn.on_user_return = kvm_on_user_return;
 229                 user_return_notifier_register(&smsr->urn);
 230                 smsr->registered = true;
 231         }
 232 }
 233 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 234
 235 static void drop_user_return_notifiers(void *ignore)
 236 {
 237         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 238
 239         if (smsr->registered)
 240                 kvm_on_user_return(&smsr->urn);
 241 }
 242
 243 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 244 {
 245         if (irqchip_in_kernel(vcpu->kvm))
 246                 return vcpu->arch.apic_base;
 247         else
 248                 return vcpu->arch.apic_base;
 249 }
 250 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 251
 252 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 253 {
 254         /* TODO: reserve bits check */
 255         if (irqchip_in_kernel(vcpu->kvm))
 256                 kvm_lapic_set_base(vcpu, data);
 257         else
 258                 vcpu->arch.apic_base = data;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 261
 262 #define EXCPT_BENIGN            0
 263 #define EXCPT_CONTRIBUTORY      1
 264 #define EXCPT_PF                2
 265
 266 static int exception_class(int vector)
 267 {
 268         switch (vector) {
 269         case PF_VECTOR:
 270                 return EXCPT_PF;
 271         case DE_VECTOR:
 272         case TS_VECTOR:
 273         case NP_VECTOR:
 274         case SS_VECTOR:
 275         case GP_VECTOR:
 276                 return EXCPT_CONTRIBUTORY;
 277         default:
 278                 break;
 279         }
 280         return EXCPT_BENIGN;
 281 }
 282
 283 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 284                 unsigned nr, bool has_error, u32 error_code,
 285                 bool reinject)
 286 {
 287         u32 prev_nr;
 288         int class1, class2;
 289
 290         kvm_make_request(KVM_REQ_EVENT, vcpu);
 291
 292         if (!vcpu->arch.exception.pending) {
 293         queue:
 294                 vcpu->arch.exception.pending = true;
 295                 vcpu->arch.exception.has_error_code = has_error;
 296                 vcpu->arch.exception.nr = nr;
 297                 vcpu->arch.exception.error_code = error_code;
 298                 vcpu->arch.exception.reinject = reinject;
 299                 return;
 300         }
 301
 302         /* to check exception */
 303         prev_nr = vcpu->arch.exception.nr;
 304         if (prev_nr == DF_VECTOR) {
 305                 /* triple fault -> shutdown */
 306                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 307                 return;
 308         }
 309         class1 = exception_class(prev_nr);
 310         class2 = exception_class(nr);
 311         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 312                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 313                 /* generate double fault per SDM Table 5-5 */
 314                 vcpu->arch.exception.pending = true;
 315                 vcpu->arch.exception.has_error_code = true;
 316                 vcpu->arch.exception.nr = DF_VECTOR;
 317                 vcpu->arch.exception.error_code = 0;
 318         } else
 319                 /* replace previous exception with a new one in a hope
 320                    that instruction re-execution will regenerate lost
 321                    exception */
 322                 goto queue;
 323 }
 324
 325 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 326 {
 327         kvm_multiple_exception(vcpu, nr, false, 0, false);
 328 }
 329 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 330
 331 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 332 {
 333         kvm_multiple_exception(vcpu, nr, false, 0, true);
 334 }
 335 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 336
 337 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 338 {
 339         if (err)
 340                 kvm_inject_gp(vcpu, 0);
 341         else
 342                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 343 }
 344 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 345
 346 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 347 {
 348         ++vcpu->stat.pf_guest;
 349         vcpu->arch.cr2 = fault->address;
 350         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 351 }
 352 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         atomic_inc(&vcpu->arch.nmi_queued);
 365         kvm_make_request(KVM_REQ_NMI, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 583 }
 584
 585 static bool guest_cpuid_has_smep(struct kvm_vcpu *vcpu)
 586 {
 587         struct kvm_cpuid_entry2 *best;
 588
 589         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 590         return best && (best->ebx & bit(X86_FEATURE_SMEP));
 591 }
 592
 593 static bool guest_cpuid_has_fsgsbase(struct kvm_vcpu *vcpu)
 594 {
 595         struct kvm_cpuid_entry2 *best;
 596
 597         best = kvm_find_cpuid_entry(vcpu, 7, 0);
 598         return best && (best->ebx & bit(X86_FEATURE_FSGSBASE));
 599 }
 600
 601 static void update_cpuid(struct kvm_vcpu *vcpu)
 602 {
 603         struct kvm_cpuid_entry2 *best;
 604         struct kvm_lapic *apic = vcpu->arch.apic;
 605         u32 timer_mode_mask;
 606
 607         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 608         if (!best)
 609                 return;
 610
 611         /* Update OSXSAVE bit */
 612         if (cpu_has_xsave && best->function == 0x1) {
 613                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 614                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 615                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 616         }
 617
 618         if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
 619                 best->function == 0x1) {
 620                 best->ecx |= bit(X86_FEATURE_TSC_DEADLINE_TIMER);
 621                 timer_mode_mask = 3 << 17;
 622         } else
 623                 timer_mode_mask = 1 << 17;
 624
 625         if (apic)
 626                 apic->lapic_timer.timer_mode_mask = timer_mode_mask;
 627 }
 628
 629 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 630 {
 631         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 632         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE |
 633                                    X86_CR4_PAE | X86_CR4_SMEP;
 634         if (cr4 & CR4_RESERVED_BITS)
 635                 return 1;
 636
 637         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 638                 return 1;
 639
 640         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 641                 return 1;
 642
 643         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_RDWRGSFS))
 644                 return 1;
 645
 646         if (is_long_mode(vcpu)) {
 647                 if (!(cr4 & X86_CR4_PAE))
 648                         return 1;
 649         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 650                    && ((cr4 ^ old_cr4) & pdptr_bits)
 651                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 652                                    kvm_read_cr3(vcpu)))
 653                 return 1;
 654
 655         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 656                 return 1;
 657
 658         if ((cr4 ^ old_cr4) & pdptr_bits)
 659                 kvm_mmu_reset_context(vcpu);
 660
 661         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 662                 update_cpuid(vcpu);
 663
 664         return 0;
 665 }
 666 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 667
 668 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 669 {
 670         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 671                 kvm_mmu_sync_roots(vcpu);
 672                 kvm_mmu_flush_tlb(vcpu);
 673                 return 0;
 674         }
 675
 676         if (is_long_mode(vcpu)) {
 677                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 678                         return 1;
 679         } else {
 680                 if (is_pae(vcpu)) {
 681                         if (cr3 & CR3_PAE_RESERVED_BITS)
 682                                 return 1;
 683                         if (is_paging(vcpu) &&
 684                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 685                                 return 1;
 686                 }
 687                 /*
 688                  * We don't check reserved bits in nonpae mode, because
 689                  * this isn't enforced, and VMware depends on this.
 690                  */
 691         }
 692
 693         /*
 694          * Does the new cr3 value map to physical memory? (Note, we
 695          * catch an invalid cr3 even in real-mode, because it would
 696          * cause trouble later on when we turn on paging anyway.)
 697          *
 698          * A real CPU would silently accept an invalid cr3 and would
 699          * attempt to use it - with largely undefined (and often hard
 700          * to debug) behavior on the guest side.
 701          */
 702         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 703                 return 1;
 704         vcpu->arch.cr3 = cr3;
 705         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 706         vcpu->arch.mmu.new_cr3(vcpu);
 707         return 0;
 708 }
 709 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 710
 711 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 712 {
 713         if (cr8 & CR8_RESERVED_BITS)
 714                 return 1;
 715         if (irqchip_in_kernel(vcpu->kvm))
 716                 kvm_lapic_set_tpr(vcpu, cr8);
 717         else
 718                 vcpu->arch.cr8 = cr8;
 719         return 0;
 720 }
 721 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 722
 723 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 724 {
 725         if (irqchip_in_kernel(vcpu->kvm))
 726                 return kvm_lapic_get_cr8(vcpu);
 727         else
 728                 return vcpu->arch.cr8;
 729 }
 730 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 731
 732 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 733 {
 734         switch (dr) {
 735         case 0 ... 3:
 736                 vcpu->arch.db[dr] = val;
 737                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 738                         vcpu->arch.eff_db[dr] = val;
 739                 break;
 740         case 4:
 741                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 742                         return 1; /* #UD */
 743                 /* fall through */
 744         case 6:
 745                 if (val & 0xffffffff00000000ULL)
 746                         return -1; /* #GP */
 747                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 748                 break;
 749         case 5:
 750                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 751                         return 1; /* #UD */
 752                 /* fall through */
 753         default: /* 7 */
 754                 if (val & 0xffffffff00000000ULL)
 755                         return -1; /* #GP */
 756                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 757                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 758                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 759                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 760                 }
 761                 break;
 762         }
 763
 764         return 0;
 765 }
 766
 767 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 768 {
 769         int res;
 770
 771         res = __kvm_set_dr(vcpu, dr, val);
 772         if (res > 0)
 773                 kvm_queue_exception(vcpu, UD_VECTOR);
 774         else if (res < 0)
 775                 kvm_inject_gp(vcpu, 0);
 776
 777         return res;
 778 }
 779 EXPORT_SYMBOL_GPL(kvm_set_dr);
 780
 781 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 782 {
 783         switch (dr) {
 784         case 0 ... 3:
 785                 *val = vcpu->arch.db[dr];
 786                 break;
 787         case 4:
 788                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 789                         return 1;
 790                 /* fall through */
 791         case 6:
 792                 *val = vcpu->arch.dr6;
 793                 break;
 794         case 5:
 795                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 796                         return 1;
 797                 /* fall through */
 798         default: /* 7 */
 799                 *val = vcpu->arch.dr7;
 800                 break;
 801         }
 802
 803         return 0;
 804 }
 805
 806 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 807 {
 808         if (_kvm_get_dr(vcpu, dr, val)) {
 809                 kvm_queue_exception(vcpu, UD_VECTOR);
 810                 return 1;
 811         }
 812         return 0;
 813 }
 814 EXPORT_SYMBOL_GPL(kvm_get_dr);
 815
 816 /*
 817  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 818  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 819  *
 820  * This list is modified at module load time to reflect the
 821  * capabilities of the host cpu. This capabilities test skips MSRs that are
 822  * kvm-specific. Those are put in the beginning of the list.
 823  */
 824
 825 #define KVM_SAVE_MSRS_BEGIN     9
 826 static u32 msrs_to_save[] = {
 827         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 828         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 829         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 830         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 831         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 832         MSR_STAR,
 833 #ifdef CONFIG_X86_64
 834         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 835 #endif
 836         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 837 };
 838
 839 static unsigned num_msrs_to_save;
 840
 841 static u32 emulated_msrs[] = {
 842         MSR_IA32_TSCDEADLINE,
 843         MSR_IA32_MISC_ENABLE,
 844         MSR_IA32_MCG_STATUS,
 845         MSR_IA32_MCG_CTL,
 846 };
 847
 848 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 849 {
 850         u64 old_efer = vcpu->arch.efer;
 851
 852         if (efer & efer_reserved_bits)
 853                 return 1;
 854
 855         if (is_paging(vcpu)
 856             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 857                 return 1;
 858
 859         if (efer & EFER_FFXSR) {
 860                 struct kvm_cpuid_entry2 *feat;
 861
 862                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 863                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 864                         return 1;
 865         }
 866
 867         if (efer & EFER_SVME) {
 868                 struct kvm_cpuid_entry2 *feat;
 869
 870                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 871                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 872                         return 1;
 873         }
 874
 875         efer &= ~EFER_LMA;
 876         efer |= vcpu->arch.efer & EFER_LMA;
 877
 878         kvm_x86_ops->set_efer(vcpu, efer);
 879
 880         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 881
 882         /* Update reserved bits */
 883         if ((efer ^ old_efer) & EFER_NX)
 884                 kvm_mmu_reset_context(vcpu);
 885
 886         return 0;
 887 }
 888
 889 void kvm_enable_efer_bits(u64 mask)
 890 {
 891        efer_reserved_bits &= ~mask;
 892 }
 893 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 894
 895
 896 /*
 897  * Writes msr value into into the appropriate "register".
 898  * Returns 0 on success, non-0 otherwise.
 899  * Assumes vcpu_load() was already called.
 900  */
 901 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 902 {
 903         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 904 }
 905
 906 /*
 907  * Adapt set_msr() to msr_io()'s calling convention
 908  */
 909 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 910 {
 911         return kvm_set_msr(vcpu, index, *data);
 912 }
 913
 914 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 915 {
 916         int version;
 917         int r;
 918         struct pvclock_wall_clock wc;
 919         struct timespec boot;
 920
 921         if (!wall_clock)
 922                 return;
 923
 924         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 925         if (r)
 926                 return;
 927
 928         if (version & 1)
 929                 ++version;  /* first time write, random junk */
 930
 931         ++version;
 932
 933         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 934
 935         /*
 936          * The guest calculates current wall clock time by adding
 937          * system time (updated by kvm_guest_time_update below) to the
 938          * wall clock specified here.  guest system time equals host
 939          * system time for us, thus we must fill in host boot time here.
 940          */
 941         getboottime(&boot);
 942
 943         wc.sec = boot.tv_sec;
 944         wc.nsec = boot.tv_nsec;
 945         wc.version = version;
 946
 947         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 948
 949         version++;
 950         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 951 }
 952
 953 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 954 {
 955         uint32_t quotient, remainder;
 956
 957         /* Don't try to replace with do_div(), this one calculates
 958          * "(dividend << 32) / divisor" */
 959         __asm__ ( "divl %4"
 960                   : "=a" (quotient), "=d" (remainder)
 961                   : "0" (0), "1" (dividend), "r" (divisor) );
 962         return quotient;
 963 }
 964
 965 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 966                                s8 *pshift, u32 *pmultiplier)
 967 {
 968         uint64_t scaled64;
 969         int32_t  shift = 0;
 970         uint64_t tps64;
 971         uint32_t tps32;
 972
 973         tps64 = base_khz * 1000LL;
 974         scaled64 = scaled_khz * 1000LL;
 975         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 976                 tps64 >>= 1;
 977                 shift--;
 978         }
 979
 980         tps32 = (uint32_t)tps64;
 981         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 982                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 983                         scaled64 >>= 1;
 984                 else
 985                         tps32 <<= 1;
 986                 shift++;
 987         }
 988
 989         *pshift = shift;
 990         *pmultiplier = div_frac(scaled64, tps32);
 991
 992         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 993                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 994 }
 995
 996 static inline u64 get_kernel_ns(void)
 997 {
 998         struct timespec ts;
 999
1000         WARN_ON(preemptible());
1001         ktime_get_ts(&ts);
1002         monotonic_to_bootbased(&ts);
1003         return timespec_to_ns(&ts);
1004 }
1005
1006 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1007 unsigned long max_tsc_khz;
1008
1009 static inline int kvm_tsc_changes_freq(void)
1010 {
1011         int cpu = get_cpu();
1012         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
1013                   cpufreq_quick_get(cpu) != 0;
1014         put_cpu();
1015         return ret;
1016 }
1017
1018 u64 vcpu_tsc_khz(struct kvm_vcpu *vcpu)
1019 {
1020         if (vcpu->arch.virtual_tsc_khz)
1021                 return vcpu->arch.virtual_tsc_khz;
1022         else
1023                 return __this_cpu_read(cpu_tsc_khz);
1024 }
1025
1026 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1027 {
1028         u64 ret;
1029
1030         WARN_ON(preemptible());
1031         if (kvm_tsc_changes_freq())
1032                 printk_once(KERN_WARNING
1033                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
1034         ret = nsec * vcpu_tsc_khz(vcpu);
1035         do_div(ret, USEC_PER_SEC);
1036         return ret;
1037 }
1038
1039 static void kvm_init_tsc_catchup(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1040 {
1041         /* Compute a scale to convert nanoseconds in TSC cycles */
1042         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1043                            &vcpu->arch.tsc_catchup_shift,
1044                            &vcpu->arch.tsc_catchup_mult);
1045 }
1046
1047 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1048 {
1049         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1050                                       vcpu->arch.tsc_catchup_mult,
1051                                       vcpu->arch.tsc_catchup_shift);
1052         tsc += vcpu->arch.last_tsc_write;
1053         return tsc;
1054 }
1055
1056 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1057 {
1058         struct kvm *kvm = vcpu->kvm;
1059         u64 offset, ns, elapsed;
1060         unsigned long flags;
1061         s64 sdiff;
1062
1063         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1064         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1065         ns = get_kernel_ns();
1066         elapsed = ns - kvm->arch.last_tsc_nsec;
1067         sdiff = data - kvm->arch.last_tsc_write;
1068         if (sdiff < 0)
1069                 sdiff = -sdiff;
1070
1071         /*
1072          * Special case: close write to TSC within 5 seconds of
1073          * another CPU is interpreted as an attempt to synchronize
1074          * The 5 seconds is to accommodate host load / swapping as
1075          * well as any reset of TSC during the boot process.
1076          *
1077          * In that case, for a reliable TSC, we can match TSC offsets,
1078          * or make a best guest using elapsed value.
1079          */
1080         if (sdiff < nsec_to_cycles(vcpu, 5ULL * NSEC_PER_SEC) &&
1081             elapsed < 5ULL * NSEC_PER_SEC) {
1082                 if (!check_tsc_unstable()) {
1083                         offset = kvm->arch.last_tsc_offset;
1084                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1085                 } else {
1086                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1087                         offset += delta;
1088                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1089                 }
1090                 ns = kvm->arch.last_tsc_nsec;
1091         }
1092         kvm->arch.last_tsc_nsec = ns;
1093         kvm->arch.last_tsc_write = data;
1094         kvm->arch.last_tsc_offset = offset;
1095         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1096         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1097
1098         /* Reset of TSC must disable overshoot protection below */
1099         vcpu->arch.hv_clock.tsc_timestamp = 0;
1100         vcpu->arch.last_tsc_write = data;
1101         vcpu->arch.last_tsc_nsec = ns;
1102 }
1103 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1104
1105 static int kvm_guest_time_update(struct kvm_vcpu *v)
1106 {
1107         unsigned long flags;
1108         struct kvm_vcpu_arch *vcpu = &v->arch;
1109         void *shared_kaddr;
1110         unsigned long this_tsc_khz;
1111         s64 kernel_ns, max_kernel_ns;
1112         u64 tsc_timestamp;
1113
1114         /* Keep irq disabled to prevent changes to the clock */
1115         local_irq_save(flags);
1116         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v);
1117         kernel_ns = get_kernel_ns();
1118         this_tsc_khz = vcpu_tsc_khz(v);
1119         if (unlikely(this_tsc_khz == 0)) {
1120                 local_irq_restore(flags);
1121                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1122                 return 1;
1123         }
1124
1125         /*
1126          * We may have to catch up the TSC to match elapsed wall clock
1127          * time for two reasons, even if kvmclock is used.
1128          *   1) CPU could have been running below the maximum TSC rate
1129          *   2) Broken TSC compensation resets the base at each VCPU
1130          *      entry to avoid unknown leaps of TSC even when running
1131          *      again on the same CPU.  This may cause apparent elapsed
1132          *      time to disappear, and the guest to stand still or run
1133          *      very slowly.
1134          */
1135         if (vcpu->tsc_catchup) {
1136                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1137                 if (tsc > tsc_timestamp) {
1138                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1139                         tsc_timestamp = tsc;
1140                 }
1141         }
1142
1143         local_irq_restore(flags);
1144
1145         if (!vcpu->time_page)
1146                 return 0;
1147
1148         /*
1149          * Time as measured by the TSC may go backwards when resetting the base
1150          * tsc_timestamp.  The reason for this is that the TSC resolution is
1151          * higher than the resolution of the other clock scales.  Thus, many
1152          * possible measurments of the TSC correspond to one measurement of any
1153          * other clock, and so a spread of values is possible.  This is not a
1154          * problem for the computation of the nanosecond clock; with TSC rates
1155          * around 1GHZ, there can only be a few cycles which correspond to one
1156          * nanosecond value, and any path through this code will inevitably
1157          * take longer than that.  However, with the kernel_ns value itself,
1158          * the precision may be much lower, down to HZ granularity.  If the
1159          * first sampling of TSC against kernel_ns ends in the low part of the
1160          * range, and the second in the high end of the range, we can get:
1161          *
1162          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1163          *
1164          * As the sampling errors potentially range in the thousands of cycles,
1165          * it is possible such a time value has already been observed by the
1166          * guest.  To protect against this, we must compute the system time as
1167          * observed by the guest and ensure the new system time is greater.
1168          */
1169         max_kernel_ns = 0;
1170         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1171                 max_kernel_ns = vcpu->last_guest_tsc -
1172                                 vcpu->hv_clock.tsc_timestamp;
1173                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1174                                     vcpu->hv_clock.tsc_to_system_mul,
1175                                     vcpu->hv_clock.tsc_shift);
1176                 max_kernel_ns += vcpu->last_kernel_ns;
1177         }
1178
1179         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1180                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1181                                    &vcpu->hv_clock.tsc_shift,
1182                                    &vcpu->hv_clock.tsc_to_system_mul);
1183                 vcpu->hw_tsc_khz = this_tsc_khz;
1184         }
1185
1186         if (max_kernel_ns > kernel_ns)
1187                 kernel_ns = max_kernel_ns;
1188
1189         /* With all the info we got, fill in the values */
1190         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1191         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1192         vcpu->last_kernel_ns = kernel_ns;
1193         vcpu->last_guest_tsc = tsc_timestamp;
1194         vcpu->hv_clock.flags = 0;
1195
1196         /*
1197          * The interface expects us to write an even number signaling that the
1198          * update is finished. Since the guest won't see the intermediate
1199          * state, we just increase by 2 at the end.
1200          */
1201         vcpu->hv_clock.version += 2;
1202
1203         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1204
1205         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1206                sizeof(vcpu->hv_clock));
1207
1208         kunmap_atomic(shared_kaddr, KM_USER0);
1209
1210         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1211         return 0;
1212 }
1213
1214 static bool msr_mtrr_valid(unsigned msr)
1215 {
1216         switch (msr) {
1217         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1218         case MSR_MTRRfix64K_00000:
1219         case MSR_MTRRfix16K_80000:
1220         case MSR_MTRRfix16K_A0000:
1221         case MSR_MTRRfix4K_C0000:
1222         case MSR_MTRRfix4K_C8000:
1223         case MSR_MTRRfix4K_D0000:
1224         case MSR_MTRRfix4K_D8000:
1225         case MSR_MTRRfix4K_E0000:
1226         case MSR_MTRRfix4K_E8000:
1227         case MSR_MTRRfix4K_F0000:
1228         case MSR_MTRRfix4K_F8000:
1229         case MSR_MTRRdefType:
1230         case MSR_IA32_CR_PAT:
1231                 return true;
1232         case 0x2f8:
1233                 return true;
1234         }
1235         return false;
1236 }
1237
1238 static bool valid_pat_type(unsigned t)
1239 {
1240         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1241 }
1242
1243 static bool valid_mtrr_type(unsigned t)
1244 {
1245         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1246 }
1247
1248 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1249 {
1250         int i;
1251
1252         if (!msr_mtrr_valid(msr))
1253                 return false;
1254
1255         if (msr == MSR_IA32_CR_PAT) {
1256                 for (i = 0; i < 8; i++)
1257                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1258                                 return false;
1259                 return true;
1260         } else if (msr == MSR_MTRRdefType) {
1261                 if (data & ~0xcff)
1262                         return false;
1263                 return valid_mtrr_type(data & 0xff);
1264         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1265                 for (i = 0; i < 8 ; i++)
1266                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1267                                 return false;
1268                 return true;
1269         }
1270
1271         /* variable MTRRs */
1272         return valid_mtrr_type(data & 0xff);
1273 }
1274
1275 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1276 {
1277         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1278
1279         if (!mtrr_valid(vcpu, msr, data))
1280                 return 1;
1281
1282         if (msr == MSR_MTRRdefType) {
1283                 vcpu->arch.mtrr_state.def_type = data;
1284                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1285         } else if (msr == MSR_MTRRfix64K_00000)
1286                 p[0] = data;
1287         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1288                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1289         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1290                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1291         else if (msr == MSR_IA32_CR_PAT)
1292                 vcpu->arch.pat = data;
1293         else {  /* Variable MTRRs */
1294                 int idx, is_mtrr_mask;
1295                 u64 *pt;
1296
1297                 idx = (msr - 0x200) / 2;
1298                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1299                 if (!is_mtrr_mask)
1300                         pt =
1301                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1302                 else
1303                         pt =
1304                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1305                 *pt = data;
1306         }
1307
1308         kvm_mmu_reset_context(vcpu);
1309         return 0;
1310 }
1311
1312 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1313 {
1314         u64 mcg_cap = vcpu->arch.mcg_cap;
1315         unsigned bank_num = mcg_cap & 0xff;
1316
1317         switch (msr) {
1318         case MSR_IA32_MCG_STATUS:
1319                 vcpu->arch.mcg_status = data;
1320                 break;
1321         case MSR_IA32_MCG_CTL:
1322                 if (!(mcg_cap & MCG_CTL_P))
1323                         return 1;
1324                 if (data != 0 && data != ~(u64)0)
1325                         return -1;
1326                 vcpu->arch.mcg_ctl = data;
1327                 break;
1328         default:
1329                 if (msr >= MSR_IA32_MC0_CTL &&
1330                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1331                         u32 offset = msr - MSR_IA32_MC0_CTL;
1332                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1333                          * some Linux kernels though clear bit 10 in bank 4 to
1334                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1335                          * this to avoid an uncatched #GP in the guest
1336                          */
1337                         if ((offset & 0x3) == 0 &&
1338                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1339                                 return -1;
1340                         vcpu->arch.mce_banks[offset] = data;
1341                         break;
1342                 }
1343                 return 1;
1344         }
1345         return 0;
1346 }
1347
1348 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1349 {
1350         struct kvm *kvm = vcpu->kvm;
1351         int lm = is_long_mode(vcpu);
1352         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1353                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1354         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1355                 : kvm->arch.xen_hvm_config.blob_size_32;
1356         u32 page_num = data & ~PAGE_MASK;
1357         u64 page_addr = data & PAGE_MASK;
1358         u8 *page;
1359         int r;
1360
1361         r = -E2BIG;
1362         if (page_num >= blob_size)
1363                 goto out;
1364         r = -ENOMEM;
1365         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1366         if (!page)
1367                 goto out;
1368         r = -EFAULT;
1369         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1370                 goto out_free;
1371         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1372                 goto out_free;
1373         r = 0;
1374 out_free:
1375         kfree(page);
1376 out:
1377         return r;
1378 }
1379
1380 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1381 {
1382         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1383 }
1384
1385 static bool kvm_hv_msr_partition_wide(u32 msr)
1386 {
1387         bool r = false;
1388         switch (msr) {
1389         case HV_X64_MSR_GUEST_OS_ID:
1390         case HV_X64_MSR_HYPERCALL:
1391                 r = true;
1392                 break;
1393         }
1394
1395         return r;
1396 }
1397
1398 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1399 {
1400         struct kvm *kvm = vcpu->kvm;
1401
1402         switch (msr) {
1403         case HV_X64_MSR_GUEST_OS_ID:
1404                 kvm->arch.hv_guest_os_id = data;
1405                 /* setting guest os id to zero disables hypercall page */
1406                 if (!kvm->arch.hv_guest_os_id)
1407                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1408                 break;
1409         case HV_X64_MSR_HYPERCALL: {
1410                 u64 gfn;
1411                 unsigned long addr;
1412                 u8 instructions[4];
1413
1414                 /* if guest os id is not set hypercall should remain disabled */
1415                 if (!kvm->arch.hv_guest_os_id)
1416                         break;
1417                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1418                         kvm->arch.hv_hypercall = data;
1419                         break;
1420                 }
1421                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1422                 addr = gfn_to_hva(kvm, gfn);
1423                 if (kvm_is_error_hva(addr))
1424                         return 1;
1425                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1426                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1427                 if (__copy_to_user((void __user *)addr, instructions, 4))
1428                         return 1;
1429                 kvm->arch.hv_hypercall = data;
1430                 break;
1431         }
1432         default:
1433                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1434                           "data 0x%llx\n", msr, data);
1435                 return 1;
1436         }
1437         return 0;
1438 }
1439
1440 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1441 {
1442         switch (msr) {
1443         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1444                 unsigned long addr;
1445
1446                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1447                         vcpu->arch.hv_vapic = data;
1448                         break;
1449                 }
1450                 addr = gfn_to_hva(vcpu->kvm, data >>
1451                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1452                 if (kvm_is_error_hva(addr))
1453                         return 1;
1454                 if (__clear_user((void __user *)addr, PAGE_SIZE))
1455                         return 1;
1456                 vcpu->arch.hv_vapic = data;
1457                 break;
1458         }
1459         case HV_X64_MSR_EOI:
1460                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1461         case HV_X64_MSR_ICR:
1462                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1463         case HV_X64_MSR_TPR:
1464                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1465         default:
1466                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1467                           "data 0x%llx\n", msr, data);
1468                 return 1;
1469         }
1470
1471         return 0;
1472 }
1473
1474 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1475 {
1476         gpa_t gpa = data & ~0x3f;
1477
1478         /* Bits 2:5 are resrved, Should be zero */
1479         if (data & 0x3c)
1480                 return 1;
1481
1482         vcpu->arch.apf.msr_val = data;
1483
1484         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1485                 kvm_clear_async_pf_completion_queue(vcpu);
1486                 kvm_async_pf_hash_reset(vcpu);
1487                 return 0;
1488         }
1489
1490         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1491                 return 1;
1492
1493         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1494         kvm_async_pf_wakeup_all(vcpu);
1495         return 0;
1496 }
1497
1498 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1499 {
1500         if (vcpu->arch.time_page) {
1501                 kvm_release_page_dirty(vcpu->arch.time_page);
1502                 vcpu->arch.time_page = NULL;
1503         }
1504 }
1505
1506 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1507 {
1508         u64 delta;
1509
1510         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1511                 return;
1512
1513         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1514         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1515         vcpu->arch.st.accum_steal = delta;
1516 }
1517
1518 static void record_steal_time(struct kvm_vcpu *vcpu)
1519 {
1520         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1521                 return;
1522
1523         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1524                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1525                 return;
1526
1527         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1528         vcpu->arch.st.steal.version += 2;
1529         vcpu->arch.st.accum_steal = 0;
1530
1531         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1532                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1533 }
1534
1535 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1536 {
1537         switch (msr) {
1538         case MSR_EFER:
1539                 return set_efer(vcpu, data);
1540         case MSR_K7_HWCR:
1541                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1542                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1543                 if (data != 0) {
1544                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1545                                 data);
1546                         return 1;
1547                 }
1548                 break;
1549         case MSR_FAM10H_MMIO_CONF_BASE:
1550                 if (data != 0) {
1551                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1552                                 "0x%llx\n", data);
1553                         return 1;
1554                 }
1555                 break;
1556         case MSR_AMD64_NB_CFG:
1557                 break;
1558         case MSR_IA32_DEBUGCTLMSR:
1559                 if (!data) {
1560                         /* We support the non-activated case already */
1561                         break;
1562                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1563                         /* Values other than LBR and BTF are vendor-specific,
1564                            thus reserved and should throw a #GP */
1565                         return 1;
1566                 }
1567                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1568                         __func__, data);
1569                 break;
1570         case MSR_IA32_UCODE_REV:
1571         case MSR_IA32_UCODE_WRITE:
1572         case MSR_VM_HSAVE_PA:
1573         case MSR_AMD64_PATCH_LOADER:
1574                 break;
1575         case MSR_NHM_SNB_PKG_CST_CFG_CTL: /* 0xe2 */
1576         case 0x200 ... 0x2ff:
1577                 return set_msr_mtrr(vcpu, msr, data);
1578         case MSR_IA32_APICBASE:
1579                 kvm_set_apic_base(vcpu, data);
1580                 break;
1581         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1582                 return kvm_x2apic_msr_write(vcpu, msr, data);
1583         case MSR_IA32_TSCDEADLINE:
1584                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1585                 break;
1586         case MSR_IA32_MISC_ENABLE:
1587                 vcpu->arch.ia32_misc_enable_msr = data;
1588                 break;
1589         case MSR_KVM_WALL_CLOCK_NEW:
1590         case MSR_KVM_WALL_CLOCK:
1591                 vcpu->kvm->arch.wall_clock = data;
1592                 kvm_write_wall_clock(vcpu->kvm, data);
1593                 break;
1594         case MSR_KVM_SYSTEM_TIME_NEW:
1595         case MSR_KVM_SYSTEM_TIME: {
1596                 kvmclock_reset(vcpu);
1597
1598                 vcpu->arch.time = data;
1599                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1600
1601                 /* we verify if the enable bit is set... */
1602                 if (!(data & 1))
1603                         break;
1604
1605                 /* ...but clean it before doing the actual write */
1606                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1607
1608                 vcpu->arch.time_page =
1609                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1610
1611                 if (is_error_page(vcpu->arch.time_page)) {
1612                         kvm_release_page_clean(vcpu->arch.time_page);
1613                         vcpu->arch.time_page = NULL;
1614                 }
1615                 break;
1616         }
1617         case MSR_KVM_ASYNC_PF_EN:
1618                 if (kvm_pv_enable_async_pf(vcpu, data))
1619                         return 1;
1620                 break;
1621         case MSR_KVM_STEAL_TIME:
1622
1623                 if (unlikely(!sched_info_on()))
1624                         return 1;
1625
1626                 if (data & KVM_STEAL_RESERVED_MASK)
1627                         return 1;
1628
1629                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
1630                                                         data & KVM_STEAL_VALID_BITS))
1631                         return 1;
1632
1633                 vcpu->arch.st.msr_val = data;
1634
1635                 if (!(data & KVM_MSR_ENABLED))
1636                         break;
1637
1638                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
1639
1640                 preempt_disable();
1641                 accumulate_steal_time(vcpu);
1642                 preempt_enable();
1643
1644                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
1645
1646                 break;
1647
1648         case MSR_IA32_MCG_CTL:
1649         case MSR_IA32_MCG_STATUS:
1650         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1651                 return set_msr_mce(vcpu, msr, data);
1652
1653         /* Performance counters are not protected by a CPUID bit,
1654          * so we should check all of them in the generic path for the sake of
1655          * cross vendor migration.
1656          * Writing a zero into the event select MSRs disables them,
1657          * which we perfectly emulate ;-). Any other value should be at least
1658          * reported, some guests depend on them.
1659          */
1660         case MSR_P6_EVNTSEL0:
1661         case MSR_P6_EVNTSEL1:
1662         case MSR_K7_EVNTSEL0:
1663         case MSR_K7_EVNTSEL1:
1664         case MSR_K7_EVNTSEL2:
1665         case MSR_K7_EVNTSEL3:
1666                 if (data != 0)
1667                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1668                                 "0x%x data 0x%llx\n", msr, data);
1669                 break;
1670         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1671          * so we ignore writes to make it happy.
1672          */
1673         case MSR_P6_PERFCTR0:
1674         case MSR_P6_PERFCTR1:
1675         case MSR_K7_PERFCTR0:
1676         case MSR_K7_PERFCTR1:
1677         case MSR_K7_PERFCTR2:
1678         case MSR_K7_PERFCTR3:
1679                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1680                         "0x%x data 0x%llx\n", msr, data);
1681                 break;
1682         case MSR_K7_CLK_CTL:
1683                 /*
1684                  * Ignore all writes to this no longer documented MSR.
1685                  * Writes are only relevant for old K7 processors,
1686                  * all pre-dating SVM, but a recommended workaround from
1687                  * AMD for these chips. It is possible to speicify the
1688                  * affected processor models on the command line, hence
1689                  * the need to ignore the workaround.
1690                  */
1691                 break;
1692         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1693                 if (kvm_hv_msr_partition_wide(msr)) {
1694                         int r;
1695                         mutex_lock(&vcpu->kvm->lock);
1696                         r = set_msr_hyperv_pw(vcpu, msr, data);
1697                         mutex_unlock(&vcpu->kvm->lock);
1698                         return r;
1699                 } else
1700                         return set_msr_hyperv(vcpu, msr, data);
1701                 break;
1702         case MSR_IA32_BBL_CR_CTL3:
1703                 /* Drop writes to this legacy MSR -- see rdmsr
1704                  * counterpart for further detail.
1705                  */
1706                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1707                 break;
1708         default:
1709                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1710                         return xen_hvm_config(vcpu, data);
1711                 if (!ignore_msrs) {
1712                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1713                                 msr, data);
1714                         return 1;
1715                 } else {
1716                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1717                                 msr, data);
1718                         break;
1719                 }
1720         }
1721         return 0;
1722 }
1723 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1724
1725
1726 /*
1727  * Reads an msr value (of 'msr_index') into 'pdata'.
1728  * Returns 0 on success, non-0 otherwise.
1729  * Assumes vcpu_load() was already called.
1730  */
1731 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1732 {
1733         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1734 }
1735
1736 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1737 {
1738         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1739
1740         if (!msr_mtrr_valid(msr))
1741                 return 1;
1742
1743         if (msr == MSR_MTRRdefType)
1744                 *pdata = vcpu->arch.mtrr_state.def_type +
1745                          (vcpu->arch.mtrr_state.enabled << 10);
1746         else if (msr == MSR_MTRRfix64K_00000)
1747                 *pdata = p[0];
1748         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1749                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1750         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1751                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1752         else if (msr == MSR_IA32_CR_PAT)
1753                 *pdata = vcpu->arch.pat;
1754         else {  /* Variable MTRRs */
1755                 int idx, is_mtrr_mask;
1756                 u64 *pt;
1757
1758                 idx = (msr - 0x200) / 2;
1759                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1760                 if (!is_mtrr_mask)
1761                         pt =
1762                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1763                 else
1764                         pt =
1765                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1766                 *pdata = *pt;
1767         }
1768
1769         return 0;
1770 }
1771
1772 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1773 {
1774         u64 data;
1775         u64 mcg_cap = vcpu->arch.mcg_cap;
1776         unsigned bank_num = mcg_cap & 0xff;
1777
1778         switch (msr) {
1779         case MSR_IA32_P5_MC_ADDR:
1780         case MSR_IA32_P5_MC_TYPE:
1781                 data = 0;
1782                 break;
1783         case MSR_IA32_MCG_CAP:
1784                 data = vcpu->arch.mcg_cap;
1785                 break;
1786         case MSR_IA32_MCG_CTL:
1787                 if (!(mcg_cap & MCG_CTL_P))
1788                         return 1;
1789                 data = vcpu->arch.mcg_ctl;
1790                 break;
1791         case MSR_IA32_MCG_STATUS:
1792                 data = vcpu->arch.mcg_status;
1793                 break;
1794         default:
1795                 if (msr >= MSR_IA32_MC0_CTL &&
1796                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1797                         u32 offset = msr - MSR_IA32_MC0_CTL;
1798                         data = vcpu->arch.mce_banks[offset];
1799                         break;
1800                 }
1801                 return 1;
1802         }
1803         *pdata = data;
1804         return 0;
1805 }
1806
1807 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1808 {
1809         u64 data = 0;
1810         struct kvm *kvm = vcpu->kvm;
1811
1812         switch (msr) {
1813         case HV_X64_MSR_GUEST_OS_ID:
1814                 data = kvm->arch.hv_guest_os_id;
1815                 break;
1816         case HV_X64_MSR_HYPERCALL:
1817                 data = kvm->arch.hv_hypercall;
1818                 break;
1819         default:
1820                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1821                 return 1;
1822         }
1823
1824         *pdata = data;
1825         return 0;
1826 }
1827
1828 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1829 {
1830         u64 data = 0;
1831
1832         switch (msr) {
1833         case HV_X64_MSR_VP_INDEX: {
1834                 int r;
1835                 struct kvm_vcpu *v;
1836                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1837                         if (v == vcpu)
1838                                 data = r;
1839                 break;
1840         }
1841         case HV_X64_MSR_EOI:
1842                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1843         case HV_X64_MSR_ICR:
1844                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1845         case HV_X64_MSR_TPR:
1846                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1847         case HV_X64_MSR_APIC_ASSIST_PAGE:
1848                 data = vcpu->arch.hv_vapic;
1849                 break;
1850         default:
1851                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1852                 return 1;
1853         }
1854         *pdata = data;
1855         return 0;
1856 }
1857
1858 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1859 {
1860         u64 data;
1861
1862         switch (msr) {
1863         case MSR_IA32_PLATFORM_ID:
1864         case MSR_IA32_EBL_CR_POWERON:
1865         case MSR_IA32_DEBUGCTLMSR:
1866         case MSR_IA32_LASTBRANCHFROMIP:
1867         case MSR_IA32_LASTBRANCHTOIP:
1868         case MSR_IA32_LASTINTFROMIP:
1869         case MSR_IA32_LASTINTTOIP:
1870         case MSR_K8_SYSCFG:
1871         case MSR_K7_HWCR:
1872         case MSR_VM_HSAVE_PA:
1873         case MSR_P6_PERFCTR0:
1874         case MSR_P6_PERFCTR1:
1875         case MSR_P6_EVNTSEL0:
1876         case MSR_P6_EVNTSEL1:
1877         case MSR_K7_EVNTSEL0:
1878         case MSR_K7_PERFCTR0:
1879         case MSR_K8_INT_PENDING_MSG:
1880         case MSR_AMD64_NB_CFG:
1881         case MSR_FAM10H_MMIO_CONF_BASE:
1882         case MSR_NHM_SNB_PKG_CST_CFG_CTL: /* 0xe2 */
1883                 data = 0;
1884                 break;
1885         case MSR_IA32_UCODE_REV:
1886                 data = 0x100000000ULL;
1887                 break;
1888         case MSR_MTRRcap:
1889                 data = 0x500 | KVM_NR_VAR_MTRR;
1890                 break;
1891         case 0x200 ... 0x2ff:
1892                 return get_msr_mtrr(vcpu, msr, pdata);
1893         case 0xcd: /* fsb frequency */
1894                 data = 3;
1895                 break;
1896                 /*
1897                  * MSR_EBC_FREQUENCY_ID
1898                  * Conservative value valid for even the basic CPU models.
1899                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1900                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1901                  * and 266MHz for model 3, or 4. Set Core Clock
1902                  * Frequency to System Bus Frequency Ratio to 1 (bits
1903                  * 31:24) even though these are only valid for CPU
1904                  * models > 2, however guests may end up dividing or
1905                  * multiplying by zero otherwise.
1906                  */
1907         case MSR_EBC_FREQUENCY_ID:
1908                 data = 1 << 24;
1909                 break;
1910         case MSR_IA32_APICBASE:
1911                 data = kvm_get_apic_base(vcpu);
1912                 break;
1913         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1914                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1915                 break;
1916         case MSR_IA32_TSCDEADLINE:
1917                 data = kvm_get_lapic_tscdeadline_msr(vcpu);
1918                 break;
1919         case MSR_IA32_MISC_ENABLE:
1920                 data = vcpu->arch.ia32_misc_enable_msr;
1921                 break;
1922         case MSR_IA32_PERF_STATUS:
1923                 /* TSC increment by tick */
1924                 data = 1000ULL;
1925                 /* CPU multiplier */
1926                 data |= (((uint64_t)4ULL) << 40);
1927                 break;
1928         case MSR_EFER:
1929                 data = vcpu->arch.efer;
1930                 break;
1931         case MSR_KVM_WALL_CLOCK:
1932         case MSR_KVM_WALL_CLOCK_NEW:
1933                 data = vcpu->kvm->arch.wall_clock;
1934                 break;
1935         case MSR_KVM_SYSTEM_TIME:
1936         case MSR_KVM_SYSTEM_TIME_NEW:
1937                 data = vcpu->arch.time;
1938                 break;
1939         case MSR_KVM_ASYNC_PF_EN:
1940                 data = vcpu->arch.apf.msr_val;
1941                 break;
1942         case MSR_KVM_STEAL_TIME:
1943                 data = vcpu->arch.st.msr_val;
1944                 break;
1945         case MSR_IA32_P5_MC_ADDR:
1946         case MSR_IA32_P5_MC_TYPE:
1947         case MSR_IA32_MCG_CAP:
1948         case MSR_IA32_MCG_CTL:
1949         case MSR_IA32_MCG_STATUS:
1950         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1951                 return get_msr_mce(vcpu, msr, pdata);
1952         case MSR_K7_CLK_CTL:
1953                 /*
1954                  * Provide expected ramp-up count for K7. All other
1955                  * are set to zero, indicating minimum divisors for
1956                  * every field.
1957                  *
1958                  * This prevents guest kernels on AMD host with CPU
1959                  * type 6, model 8 and higher from exploding due to
1960                  * the rdmsr failing.
1961                  */
1962                 data = 0x20000000;
1963                 break;
1964         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1965                 if (kvm_hv_msr_partition_wide(msr)) {
1966                         int r;
1967                         mutex_lock(&vcpu->kvm->lock);
1968                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1969                         mutex_unlock(&vcpu->kvm->lock);
1970                         return r;
1971                 } else
1972                         return get_msr_hyperv(vcpu, msr, pdata);
1973                 break;
1974         case MSR_IA32_BBL_CR_CTL3:
1975                 /* This legacy MSR exists but isn't fully documented in current
1976                  * silicon.  It is however accessed by winxp in very narrow
1977                  * scenarios where it sets bit #19, itself documented as
1978                  * a "reserved" bit.  Best effort attempt to source coherent
1979                  * read data here should the balance of the register be
1980                  * interpreted by the guest:
1981                  *
1982                  * L2 cache control register 3: 64GB range, 256KB size,
1983                  * enabled, latency 0x1, configured
1984                  */
1985                 data = 0xbe702111;
1986                 break;
1987         default:
1988                 if (!ignore_msrs) {
1989                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1990                         return 1;
1991                 } else {
1992                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1993                         data = 0;
1994                 }
1995                 break;
1996         }
1997         *pdata = data;
1998         return 0;
1999 }
2000 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2001
2002 /*
2003  * Read or write a bunch of msrs. All parameters are kernel addresses.
2004  *
2005  * @return number of msrs set successfully.
2006  */
2007 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2008                     struct kvm_msr_entry *entries,
2009                     int (*do_msr)(struct kvm_vcpu *vcpu,
2010                                   unsigned index, u64 *data))
2011 {
2012         int i, idx;
2013
2014         idx = srcu_read_lock(&vcpu->kvm->srcu);
2015         for (i = 0; i < msrs->nmsrs; ++i)
2016                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2017                         break;
2018         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2019
2020         return i;
2021 }
2022
2023 /*
2024  * Read or write a bunch of msrs. Parameters are user addresses.
2025  *
2026  * @return number of msrs set successfully.
2027  */
2028 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2029                   int (*do_msr)(struct kvm_vcpu *vcpu,
2030                                 unsigned index, u64 *data),
2031                   int writeback)
2032 {
2033         struct kvm_msrs msrs;
2034         struct kvm_msr_entry *entries;
2035         int r, n;
2036         unsigned size;
2037
2038         r = -EFAULT;
2039         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2040                 goto out;
2041
2042         r = -E2BIG;
2043         if (msrs.nmsrs >= MAX_IO_MSRS)
2044                 goto out;
2045
2046         r = -ENOMEM;
2047         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2048         entries = kmalloc(size, GFP_KERNEL);
2049         if (!entries)
2050                 goto out;
2051
2052         r = -EFAULT;
2053         if (copy_from_user(entries, user_msrs->entries, size))
2054                 goto out_free;
2055
2056         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2057         if (r < 0)
2058                 goto out_free;
2059
2060         r = -EFAULT;
2061         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2062                 goto out_free;
2063
2064         r = n;
2065
2066 out_free:
2067         kfree(entries);
2068 out:
2069         return r;
2070 }
2071
2072 int kvm_dev_ioctl_check_extension(long ext)
2073 {
2074         int r;
2075
2076         switch (ext) {
2077         case KVM_CAP_IRQCHIP:
2078         case KVM_CAP_HLT:
2079         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2080         case KVM_CAP_SET_TSS_ADDR:
2081         case KVM_CAP_EXT_CPUID:
2082         case KVM_CAP_CLOCKSOURCE:
2083         case KVM_CAP_PIT:
2084         case KVM_CAP_NOP_IO_DELAY:
2085         case KVM_CAP_MP_STATE:
2086         case KVM_CAP_SYNC_MMU:
2087         case KVM_CAP_USER_NMI:
2088         case KVM_CAP_REINJECT_CONTROL:
2089         case KVM_CAP_IRQ_INJECT_STATUS:
2090         case KVM_CAP_ASSIGN_DEV_IRQ:
2091         case KVM_CAP_IRQFD:
2092         case KVM_CAP_IOEVENTFD:
2093         case KVM_CAP_PIT2:
2094         case KVM_CAP_PIT_STATE2:
2095         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2096         case KVM_CAP_XEN_HVM:
2097         case KVM_CAP_ADJUST_CLOCK:
2098         case KVM_CAP_VCPU_EVENTS:
2099         case KVM_CAP_HYPERV:
2100         case KVM_CAP_HYPERV_VAPIC:
2101         case KVM_CAP_HYPERV_SPIN:
2102         case KVM_CAP_PCI_SEGMENT:
2103         case KVM_CAP_DEBUGREGS:
2104         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2105         case KVM_CAP_XSAVE:
2106         case KVM_CAP_ASYNC_PF:
2107         case KVM_CAP_GET_TSC_KHZ:
2108                 r = 1;
2109                 break;
2110         case KVM_CAP_COALESCED_MMIO:
2111                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2112                 break;
2113         case KVM_CAP_VAPIC:
2114                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2115                 break;
2116         case KVM_CAP_NR_VCPUS:
2117                 r = KVM_SOFT_MAX_VCPUS;
2118                 break;
2119         case KVM_CAP_MAX_VCPUS:
2120                 r = KVM_MAX_VCPUS;
2121                 break;
2122         case KVM_CAP_NR_MEMSLOTS:
2123                 r = KVM_MEMORY_SLOTS;
2124                 break;
2125         case KVM_CAP_PV_MMU:    /* obsolete */
2126                 r = 0;
2127                 break;
2128         case KVM_CAP_IOMMU:
2129                 r = iommu_present(&pci_bus_type);
2130                 break;
2131         case KVM_CAP_MCE:
2132                 r = KVM_MAX_MCE_BANKS;
2133                 break;
2134         case KVM_CAP_XCRS:
2135                 r = cpu_has_xsave;
2136                 break;
2137         case KVM_CAP_TSC_CONTROL:
2138                 r = kvm_has_tsc_control;
2139                 break;
2140         default:
2141                 r = 0;
2142                 break;
2143         }
2144         return r;
2145
2146 }
2147
2148 long kvm_arch_dev_ioctl(struct file *filp,
2149                         unsigned int ioctl, unsigned long arg)
2150 {
2151         void __user *argp = (void __user *)arg;
2152         long r;
2153
2154         switch (ioctl) {
2155         case KVM_GET_MSR_INDEX_LIST: {
2156                 struct kvm_msr_list __user *user_msr_list = argp;
2157                 struct kvm_msr_list msr_list;
2158                 unsigned n;
2159
2160                 r = -EFAULT;
2161                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2162                         goto out;
2163                 n = msr_list.nmsrs;
2164                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2165                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2166                         goto out;
2167                 r = -E2BIG;
2168                 if (n < msr_list.nmsrs)
2169                         goto out;
2170                 r = -EFAULT;
2171                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2172                                  num_msrs_to_save * sizeof(u32)))
2173                         goto out;
2174                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2175                                  &emulated_msrs,
2176                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2177                         goto out;
2178                 r = 0;
2179                 break;
2180         }
2181         case KVM_GET_SUPPORTED_CPUID: {
2182                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2183                 struct kvm_cpuid2 cpuid;
2184
2185                 r = -EFAULT;
2186                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2187                         goto out;
2188                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2189                                                       cpuid_arg->entries);
2190                 if (r)
2191                         goto out;
2192
2193                 r = -EFAULT;
2194                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2195                         goto out;
2196                 r = 0;
2197                 break;
2198         }
2199         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2200                 u64 mce_cap;
2201
2202                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2203                 r = -EFAULT;
2204                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2205                         goto out;
2206                 r = 0;
2207                 break;
2208         }
2209         default:
2210                 r = -EINVAL;
2211         }
2212 out:
2213         return r;
2214 }
2215
2216 static void wbinvd_ipi(void *garbage)
2217 {
2218         wbinvd();
2219 }
2220
2221 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2222 {
2223         return vcpu->kvm->arch.iommu_domain &&
2224                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2225 }
2226
2227 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2228 {
2229         /* Address WBINVD may be executed by guest */
2230         if (need_emulate_wbinvd(vcpu)) {
2231                 if (kvm_x86_ops->has_wbinvd_exit())
2232                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2233                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2234                         smp_call_function_single(vcpu->cpu,
2235                                         wbinvd_ipi, NULL, 1);
2236         }
2237
2238         kvm_x86_ops->vcpu_load(vcpu, cpu);
2239         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2240                 /* Make sure TSC doesn't go backwards */
2241                 s64 tsc_delta;
2242                 u64 tsc;
2243
2244                 tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2245                 tsc_delta = !vcpu->arch.last_guest_tsc ? 0 :
2246                              tsc - vcpu->arch.last_guest_tsc;
2247
2248                 if (tsc_delta < 0)
2249                         mark_tsc_unstable("KVM discovered backwards TSC");
2250                 if (check_tsc_unstable()) {
2251                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2252                         vcpu->arch.tsc_catchup = 1;
2253                 }
2254                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2255                 if (vcpu->cpu != cpu)
2256                         kvm_migrate_timers(vcpu);
2257                 vcpu->cpu = cpu;
2258         }
2259
2260         accumulate_steal_time(vcpu);
2261         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2262 }
2263
2264 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2265 {
2266         kvm_x86_ops->vcpu_put(vcpu);
2267         kvm_put_guest_fpu(vcpu);
2268         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
2269 }
2270
2271 static int is_efer_nx(void)
2272 {
2273         unsigned long long efer = 0;
2274
2275         rdmsrl_safe(MSR_EFER, &efer);
2276         return efer & EFER_NX;
2277 }
2278
2279 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2280 {
2281         int i;
2282         struct kvm_cpuid_entry2 *e, *entry;
2283
2284         entry = NULL;
2285         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2286                 e = &vcpu->arch.cpuid_entries[i];
2287                 if (e->function == 0x80000001) {
2288                         entry = e;
2289                         break;
2290                 }
2291         }
2292         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2293                 entry->edx &= ~(1 << 20);
2294                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2295         }
2296 }
2297
2298 /* when an old userspace process fills a new kernel module */
2299 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2300                                     struct kvm_cpuid *cpuid,
2301                                     struct kvm_cpuid_entry __user *entries)
2302 {
2303         int r, i;
2304         struct kvm_cpuid_entry *cpuid_entries;
2305
2306         r = -E2BIG;
2307         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2308                 goto out;
2309         r = -ENOMEM;
2310         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2311         if (!cpuid_entries)
2312                 goto out;
2313         r = -EFAULT;
2314         if (copy_from_user(cpuid_entries, entries,
2315                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2316                 goto out_free;
2317         for (i = 0; i < cpuid->nent; i++) {
2318                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2319                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2320                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2321                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2322                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2323                 vcpu->arch.cpuid_entries[i].index = 0;
2324                 vcpu->arch.cpuid_entries[i].flags = 0;
2325                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2326                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2327                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2328         }
2329         vcpu->arch.cpuid_nent = cpuid->nent;
2330         cpuid_fix_nx_cap(vcpu);
2331         r = 0;
2332         kvm_apic_set_version(vcpu);
2333         kvm_x86_ops->cpuid_update(vcpu);
2334         update_cpuid(vcpu);
2335
2336 out_free:
2337         vfree(cpuid_entries);
2338 out:
2339         return r;
2340 }
2341
2342 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2343                                      struct kvm_cpuid2 *cpuid,
2344                                      struct kvm_cpuid_entry2 __user *entries)
2345 {
2346         int r;
2347
2348         r = -E2BIG;
2349         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2350                 goto out;
2351         r = -EFAULT;
2352         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2353                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2354                 goto out;
2355         vcpu->arch.cpuid_nent = cpuid->nent;
2356         kvm_apic_set_version(vcpu);
2357         kvm_x86_ops->cpuid_update(vcpu);
2358         update_cpuid(vcpu);
2359         return 0;
2360
2361 out:
2362         return r;
2363 }
2364
2365 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2366                                      struct kvm_cpuid2 *cpuid,
2367                                      struct kvm_cpuid_entry2 __user *entries)
2368 {
2369         int r;
2370
2371         r = -E2BIG;
2372         if (cpuid->nent < vcpu->arch.cpuid_nent)
2373                 goto out;
2374         r = -EFAULT;
2375         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2376                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2377                 goto out;
2378         return 0;
2379
2380 out:
2381         cpuid->nent = vcpu->arch.cpuid_nent;
2382         return r;
2383 }
2384
2385 static void cpuid_mask(u32 *word, int wordnum)
2386 {
2387         *word &= boot_cpu_data.x86_capability[wordnum];
2388 }
2389
2390 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2391                            u32 index)
2392 {
2393         entry->function = function;
2394         entry->index = index;
2395         cpuid_count(entry->function, entry->index,
2396                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2397         entry->flags = 0;
2398 }
2399
2400 static bool supported_xcr0_bit(unsigned bit)
2401 {
2402         u64 mask = ((u64)1 << bit);
2403
2404         return mask & (XSTATE_FP | XSTATE_SSE | XSTATE_YMM) & host_xcr0;
2405 }
2406
2407 #define F(x) bit(X86_FEATURE_##x)
2408
2409 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2410                          u32 index, int *nent, int maxnent)
2411 {
2412         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2413 #ifdef CONFIG_X86_64
2414         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2415                                 ? F(GBPAGES) : 0;
2416         unsigned f_lm = F(LM);
2417 #else
2418         unsigned f_gbpages = 0;
2419         unsigned f_lm = 0;
2420 #endif
2421         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2422
2423         /* cpuid 1.edx */
2424         const u32 kvm_supported_word0_x86_features =
2425                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2426                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2427                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2428                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2429                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2430                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2431                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2432                 0 /* HTT, TM, Reserved, PBE */;
2433         /* cpuid 0x80000001.edx */
2434         const u32 kvm_supported_word1_x86_features =
2435                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2436                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2437                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2438                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2439                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2440                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2441                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2442                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2443         /* cpuid 1.ecx */
2444         const u32 kvm_supported_word4_x86_features =
2445                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64 */ | F(MWAIT) |
2446                 0 /* DS-CPL, VMX, SMX, EST */ |
2447                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2448                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2449                 0 /* Reserved, DCA */ | F(XMM4_1) |
2450                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2451                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2452                 F(F16C) | F(RDRAND);
2453         /* cpuid 0x80000001.ecx */
2454         const u32 kvm_supported_word6_x86_features =
2455                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2456                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2457                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2458                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2459
2460         /* cpuid 0xC0000001.edx */
2461         const u32 kvm_supported_word5_x86_features =
2462                 F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) |
2463                 F(ACE2) | F(ACE2_EN) | F(PHE) | F(PHE_EN) |
2464                 F(PMM) | F(PMM_EN);
2465
2466         /* cpuid 7.0.ebx */
2467         const u32 kvm_supported_word9_x86_features =
2468                 F(SMEP) | F(FSGSBASE) | F(ERMS);
2469
2470         /* all calls to cpuid_count() should be made on the same cpu */
2471         get_cpu();
2472         do_cpuid_1_ent(entry, function, index);
2473         ++*nent;
2474
2475         switch (function) {
2476         case 0:
2477                 entry->eax = min(entry->eax, (u32)0xd);
2478                 break;
2479         case 1:
2480                 entry->edx &= kvm_supported_word0_x86_features;
2481                 cpuid_mask(&entry->edx, 0);
2482                 entry->ecx &= kvm_supported_word4_x86_features;
2483                 cpuid_mask(&entry->ecx, 4);
2484                 /* we support x2apic emulation even if host does not support
2485                  * it since we emulate x2apic in software */
2486                 entry->ecx |= F(X2APIC);
2487                 break;
2488         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2489          * may return different values. This forces us to get_cpu() before
2490          * issuing the first command, and also to emulate this annoying behavior
2491          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2492         case 2: {
2493                 int t, times = entry->eax & 0xff;
2494
2495                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2496                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2497                 for (t = 1; t < times && *nent < maxnent; ++t) {
2498                         do_cpuid_1_ent(&entry[t], function, 0);
2499                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2500                         ++*nent;
2501                 }
2502                 break;
2503         }
2504         /* function 4 has additional index. */
2505         case 4: {
2506                 int i, cache_type;
2507
2508                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2509                 /* read more entries until cache_type is zero */
2510                 for (i = 1; *nent < maxnent; ++i) {
2511                         cache_type = entry[i - 1].eax & 0x1f;
2512                         if (!cache_type)
2513                                 break;
2514                         do_cpuid_1_ent(&entry[i], function, i);
2515                         entry[i].flags |=
2516                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2517                         ++*nent;
2518                 }
2519                 break;
2520         }
2521         case 7: {
2522                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2523                 /* Mask ebx against host capbability word 9 */
2524                 if (index == 0) {
2525                         entry->ebx &= kvm_supported_word9_x86_features;
2526                         cpuid_mask(&entry->ebx, 9);
2527                 } else
2528                         entry->ebx = 0;
2529                 entry->eax = 0;
2530                 entry->ecx = 0;
2531                 entry->edx = 0;
2532                 break;
2533         }
2534         case 9:
2535                 break;
2536         /* function 0xb has additional index. */
2537         case 0xb: {
2538                 int i, level_type;
2539
2540                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2541                 /* read more entries until level_type is zero */
2542                 for (i = 1; *nent < maxnent; ++i) {
2543                         level_type = entry[i - 1].ecx & 0xff00;
2544                         if (!level_type)
2545                                 break;
2546                         do_cpuid_1_ent(&entry[i], function, i);
2547                         entry[i].flags |=
2548                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2549                         ++*nent;
2550                 }
2551                 break;
2552         }
2553         case 0xd: {
2554                 int idx, i;
2555
2556                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2557                 for (idx = 1, i = 1; *nent < maxnent && idx < 64; ++idx) {
2558                         do_cpuid_1_ent(&entry[i], function, idx);
2559                         if (entry[i].eax == 0 || !supported_xcr0_bit(idx))
2560                                 continue;
2561                         entry[i].flags |=
2562                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2563                         ++*nent;
2564                         ++i;
2565                 }
2566                 break;
2567         }
2568         case KVM_CPUID_SIGNATURE: {
2569                 char signature[12] = "KVMKVMKVM\0\0";
2570                 u32 *sigptr = (u32 *)signature;
2571                 entry->eax = 0;
2572                 entry->ebx = sigptr[0];
2573                 entry->ecx = sigptr[1];
2574                 entry->edx = sigptr[2];
2575                 break;
2576         }
2577         case KVM_CPUID_FEATURES:
2578                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2579                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2580                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2581                              (1 << KVM_FEATURE_ASYNC_PF) |
2582                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2583
2584                 if (sched_info_on())
2585                         entry->eax |= (1 << KVM_FEATURE_STEAL_TIME);
2586
2587                 entry->ebx = 0;
2588                 entry->ecx = 0;
2589                 entry->edx = 0;
2590                 break;
2591         case 0x80000000:
2592                 entry->eax = min(entry->eax, 0x8000001a);
2593                 break;
2594         case 0x80000001:
2595                 entry->edx &= kvm_supported_word1_x86_features;
2596                 cpuid_mask(&entry->edx, 1);
2597                 entry->ecx &= kvm_supported_word6_x86_features;
2598                 cpuid_mask(&entry->ecx, 6);
2599                 break;
2600         case 0x80000008: {
2601                 unsigned g_phys_as = (entry->eax >> 16) & 0xff;
2602                 unsigned virt_as = max((entry->eax >> 8) & 0xff, 48U);
2603                 unsigned phys_as = entry->eax & 0xff;
2604
2605                 if (!g_phys_as)
2606                         g_phys_as = phys_as;
2607                 entry->eax = g_phys_as | (virt_as << 8);
2608                 entry->ebx = entry->edx = 0;
2609                 break;
2610         }
2611         case 0x80000019:
2612                 entry->ecx = entry->edx = 0;
2613                 break;
2614         case 0x8000001a:
2615                 break;
2616         case 0x8000001d:
2617                 break;
2618         /*Add support for Centaur's CPUID instruction*/
2619         case 0xC0000000:
2620                 /*Just support up to 0xC0000004 now*/
2621                 entry->eax = min(entry->eax, 0xC0000004);
2622                 break;
2623         case 0xC0000001:
2624                 entry->edx &= kvm_supported_word5_x86_features;
2625                 cpuid_mask(&entry->edx, 5);
2626                 break;
2627         case 3: /* Processor serial number */
2628         case 5: /* MONITOR/MWAIT */
2629         case 6: /* Thermal management */
2630         case 0xA: /* Architectural Performance Monitoring */
2631         case 0x80000007: /* Advanced power management */
2632         case 0xC0000002:
2633         case 0xC0000003:
2634         case 0xC0000004:
2635         default:
2636                 entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
2637                 break;
2638         }
2639
2640         kvm_x86_ops->set_supported_cpuid(function, entry);
2641
2642         put_cpu();
2643 }
2644
2645 #undef F
2646
2647 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2648                                      struct kvm_cpuid_entry2 __user *entries)
2649 {
2650         struct kvm_cpuid_entry2 *cpuid_entries;
2651         int limit, nent = 0, r = -E2BIG;
2652         u32 func;
2653
2654         if (cpuid->nent < 1)
2655                 goto out;
2656         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2657                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2658         r = -ENOMEM;
2659         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2660         if (!cpuid_entries)
2661                 goto out;
2662
2663         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2664         limit = cpuid_entries[0].eax;
2665         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2666                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2667                              &nent, cpuid->nent);
2668         r = -E2BIG;
2669         if (nent >= cpuid->nent)
2670                 goto out_free;
2671
2672         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2673         limit = cpuid_entries[nent - 1].eax;
2674         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2675                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2676                              &nent, cpuid->nent);
2677
2678
2679
2680         r = -E2BIG;
2681         if (nent >= cpuid->nent)
2682                 goto out_free;
2683
2684         /* Add support for Centaur's CPUID instruction. */
2685         if (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR) {
2686                 do_cpuid_ent(&cpuid_entries[nent], 0xC0000000, 0,
2687                                 &nent, cpuid->nent);
2688
2689                 r = -E2BIG;
2690                 if (nent >= cpuid->nent)
2691                         goto out_free;
2692
2693                 limit = cpuid_entries[nent - 1].eax;
2694                 for (func = 0xC0000001;
2695                         func <= limit && nent < cpuid->nent; ++func)
2696                         do_cpuid_ent(&cpuid_entries[nent], func, 0,
2697                                         &nent, cpuid->nent);
2698
2699                 r = -E2BIG;
2700                 if (nent >= cpuid->nent)
2701                         goto out_free;
2702         }
2703
2704         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2705                      cpuid->nent);
2706
2707         r = -E2BIG;
2708         if (nent >= cpuid->nent)
2709                 goto out_free;
2710
2711         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2712                      cpuid->nent);
2713
2714         r = -E2BIG;
2715         if (nent >= cpuid->nent)
2716                 goto out_free;
2717
2718         r = -EFAULT;
2719         if (copy_to_user(entries, cpuid_entries,
2720                          nent * sizeof(struct kvm_cpuid_entry2)))
2721                 goto out_free;
2722         cpuid->nent = nent;
2723         r = 0;
2724
2725 out_free:
2726         vfree(cpuid_entries);
2727 out:
2728         return r;
2729 }
2730
2731 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2732                                     struct kvm_lapic_state *s)
2733 {
2734         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2735
2736         return 0;
2737 }
2738
2739 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2740                                     struct kvm_lapic_state *s)
2741 {
2742         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2743         kvm_apic_post_state_restore(vcpu);
2744         update_cr8_intercept(vcpu);
2745
2746         return 0;
2747 }
2748
2749 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2750                                     struct kvm_interrupt *irq)
2751 {
2752         if (irq->irq < 0 || irq->irq >= 256)
2753                 return -EINVAL;
2754         if (irqchip_in_kernel(vcpu->kvm))
2755                 return -ENXIO;
2756
2757         kvm_queue_interrupt(vcpu, irq->irq, false);
2758         kvm_make_request(KVM_REQ_EVENT, vcpu);
2759
2760         return 0;
2761 }
2762
2763 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2764 {
2765         kvm_inject_nmi(vcpu);
2766
2767         return 0;
2768 }
2769
2770 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2771                                            struct kvm_tpr_access_ctl *tac)
2772 {
2773         if (tac->flags)
2774                 return -EINVAL;
2775         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2776         return 0;
2777 }
2778
2779 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2780                                         u64 mcg_cap)
2781 {
2782         int r;
2783         unsigned bank_num = mcg_cap & 0xff, bank;
2784
2785         r = -EINVAL;
2786         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2787                 goto out;
2788         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2789                 goto out;
2790         r = 0;
2791         vcpu->arch.mcg_cap = mcg_cap;
2792         /* Init IA32_MCG_CTL to all 1s */
2793         if (mcg_cap & MCG_CTL_P)
2794                 vcpu->arch.mcg_ctl = ~(u64)0;
2795         /* Init IA32_MCi_CTL to all 1s */
2796         for (bank = 0; bank < bank_num; bank++)
2797                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2798 out:
2799         return r;
2800 }
2801
2802 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2803                                       struct kvm_x86_mce *mce)
2804 {
2805         u64 mcg_cap = vcpu->arch.mcg_cap;
2806         unsigned bank_num = mcg_cap & 0xff;
2807         u64 *banks = vcpu->arch.mce_banks;
2808
2809         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2810                 return -EINVAL;
2811         /*
2812          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2813          * reporting is disabled
2814          */
2815         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2816             vcpu->arch.mcg_ctl != ~(u64)0)
2817                 return 0;
2818         banks += 4 * mce->bank;
2819         /*
2820          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2821          * reporting is disabled for the bank
2822          */
2823         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2824                 return 0;
2825         if (mce->status & MCI_STATUS_UC) {
2826                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2827                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2828                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2829                         return 0;
2830                 }
2831                 if (banks[1] & MCI_STATUS_VAL)
2832                         mce->status |= MCI_STATUS_OVER;
2833                 banks[2] = mce->addr;
2834                 banks[3] = mce->misc;
2835                 vcpu->arch.mcg_status = mce->mcg_status;
2836                 banks[1] = mce->status;
2837                 kvm_queue_exception(vcpu, MC_VECTOR);
2838         } else if (!(banks[1] & MCI_STATUS_VAL)
2839                    || !(banks[1] & MCI_STATUS_UC)) {
2840                 if (banks[1] & MCI_STATUS_VAL)
2841                         mce->status |= MCI_STATUS_OVER;
2842                 banks[2] = mce->addr;
2843                 banks[3] = mce->misc;
2844                 banks[1] = mce->status;
2845         } else
2846                 banks[1] |= MCI_STATUS_OVER;
2847         return 0;
2848 }
2849
2850 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2851                                                struct kvm_vcpu_events *events)
2852 {
2853         process_nmi(vcpu);
2854         events->exception.injected =
2855                 vcpu->arch.exception.pending &&
2856                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2857         events->exception.nr = vcpu->arch.exception.nr;
2858         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2859         events->exception.pad = 0;
2860         events->exception.error_code = vcpu->arch.exception.error_code;
2861
2862         events->interrupt.injected =
2863                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2864         events->interrupt.nr = vcpu->arch.interrupt.nr;
2865         events->interrupt.soft = 0;
2866         events->interrupt.shadow =
2867                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2868                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2869
2870         events->nmi.injected = vcpu->arch.nmi_injected;
2871         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2872         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2873         events->nmi.pad = 0;
2874
2875         events->sipi_vector = vcpu->arch.sipi_vector;
2876
2877         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2878                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2879                          | KVM_VCPUEVENT_VALID_SHADOW);
2880         memset(&events->reserved, 0, sizeof(events->reserved));
2881 }
2882
2883 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2884                                               struct kvm_vcpu_events *events)
2885 {
2886         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2887                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2888                               | KVM_VCPUEVENT_VALID_SHADOW))
2889                 return -EINVAL;
2890
2891         process_nmi(vcpu);
2892         vcpu->arch.exception.pending = events->exception.injected;
2893         vcpu->arch.exception.nr = events->exception.nr;
2894         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2895         vcpu->arch.exception.error_code = events->exception.error_code;
2896
2897         vcpu->arch.interrupt.pending = events->interrupt.injected;
2898         vcpu->arch.interrupt.nr = events->interrupt.nr;
2899         vcpu->arch.interrupt.soft = events->interrupt.soft;
2900         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2901                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2902                                                   events->interrupt.shadow);
2903
2904         vcpu->arch.nmi_injected = events->nmi.injected;
2905         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2906                 vcpu->arch.nmi_pending = events->nmi.pending;
2907         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2908
2909         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2910                 vcpu->arch.sipi_vector = events->sipi_vector;
2911
2912         kvm_make_request(KVM_REQ_EVENT, vcpu);
2913
2914         return 0;
2915 }
2916
2917 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2918                                              struct kvm_debugregs *dbgregs)
2919 {
2920         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2921         dbgregs->dr6 = vcpu->arch.dr6;
2922         dbgregs->dr7 = vcpu->arch.dr7;
2923         dbgregs->flags = 0;
2924         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2925 }
2926
2927 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2928                                             struct kvm_debugregs *dbgregs)
2929 {
2930         if (dbgregs->flags)
2931                 return -EINVAL;
2932
2933         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2934         vcpu->arch.dr6 = dbgregs->dr6;
2935         vcpu->arch.dr7 = dbgregs->dr7;
2936
2937         return 0;
2938 }
2939
2940 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2941                                          struct kvm_xsave *guest_xsave)
2942 {
2943         if (cpu_has_xsave)
2944                 memcpy(guest_xsave->region,
2945                         &vcpu->arch.guest_fpu.state->xsave,
2946                         xstate_size);
2947         else {
2948                 memcpy(guest_xsave->region,
2949                         &vcpu->arch.guest_fpu.state->fxsave,
2950                         sizeof(struct i387_fxsave_struct));
2951                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2952                         XSTATE_FPSSE;
2953         }
2954 }
2955
2956 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2957                                         struct kvm_xsave *guest_xsave)
2958 {
2959         u64 xstate_bv =
2960                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2961
2962         if (cpu_has_xsave)
2963                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2964                         guest_xsave->region, xstate_size);
2965         else {
2966                 if (xstate_bv & ~XSTATE_FPSSE)
2967                         return -EINVAL;
2968                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2969                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2970         }
2971         return 0;
2972 }
2973
2974 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2975                                         struct kvm_xcrs *guest_xcrs)
2976 {
2977         if (!cpu_has_xsave) {
2978                 guest_xcrs->nr_xcrs = 0;
2979                 return;
2980         }
2981
2982         guest_xcrs->nr_xcrs = 1;
2983         guest_xcrs->flags = 0;
2984         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2985         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2986 }
2987
2988 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2989                                        struct kvm_xcrs *guest_xcrs)
2990 {
2991         int i, r = 0;
2992
2993         if (!cpu_has_xsave)
2994                 return -EINVAL;
2995
2996         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2997                 return -EINVAL;
2998
2999         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3000                 /* Only support XCR0 currently */
3001                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
3002                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3003                                 guest_xcrs->xcrs[0].value);
3004                         break;
3005                 }
3006         if (r)
3007                 r = -EINVAL;
3008         return r;
3009 }
3010
3011 long kvm_arch_vcpu_ioctl(struct file *filp,
3012                          unsigned int ioctl, unsigned long arg)
3013 {
3014         struct kvm_vcpu *vcpu = filp->private_data;
3015         void __user *argp = (void __user *)arg;
3016         int r;
3017         union {
3018                 struct kvm_lapic_state *lapic;
3019                 struct kvm_xsave *xsave;
3020                 struct kvm_xcrs *xcrs;
3021                 void *buffer;
3022         } u;
3023
3024         u.buffer = NULL;
3025         switch (ioctl) {
3026         case KVM_GET_LAPIC: {
3027                 r = -EINVAL;
3028                 if (!vcpu->arch.apic)
3029                         goto out;
3030                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3031
3032                 r = -ENOMEM;
3033                 if (!u.lapic)
3034                         goto out;
3035                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3036                 if (r)
3037                         goto out;
3038                 r = -EFAULT;
3039                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3040                         goto out;
3041                 r = 0;
3042                 break;
3043         }
3044         case KVM_SET_LAPIC: {
3045                 r = -EINVAL;
3046                 if (!vcpu->arch.apic)
3047                         goto out;
3048                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3049                 r = -ENOMEM;
3050                 if (!u.lapic)
3051                         goto out;
3052                 r = -EFAULT;
3053                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
3054                         goto out;
3055                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3056                 if (r)
3057                         goto out;
3058                 r = 0;
3059                 break;
3060         }
3061         case KVM_INTERRUPT: {
3062                 struct kvm_interrupt irq;
3063
3064                 r = -EFAULT;
3065                 if (copy_from_user(&irq, argp, sizeof irq))
3066                         goto out;
3067                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3068                 if (r)
3069                         goto out;
3070                 r = 0;
3071                 break;
3072         }
3073         case KVM_NMI: {
3074                 r = kvm_vcpu_ioctl_nmi(vcpu);
3075                 if (r)
3076                         goto out;
3077                 r = 0;
3078                 break;
3079         }
3080         case KVM_SET_CPUID: {
3081                 struct kvm_cpuid __user *cpuid_arg = argp;
3082                 struct kvm_cpuid cpuid;
3083
3084                 r = -EFAULT;
3085                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3086                         goto out;
3087                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3088                 if (r)
3089                         goto out;
3090                 break;
3091         }
3092         case KVM_SET_CPUID2: {
3093                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3094                 struct kvm_cpuid2 cpuid;
3095
3096                 r = -EFAULT;
3097                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3098                         goto out;
3099                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3100                                               cpuid_arg->entries);
3101                 if (r)
3102                         goto out;
3103                 break;
3104         }
3105         case KVM_GET_CPUID2: {
3106                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3107                 struct kvm_cpuid2 cpuid;
3108
3109                 r = -EFAULT;
3110                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3111                         goto out;
3112                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3113                                               cpuid_arg->entries);
3114                 if (r)
3115                         goto out;
3116                 r = -EFAULT;
3117                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3118                         goto out;
3119                 r = 0;
3120                 break;
3121         }
3122         case KVM_GET_MSRS:
3123                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
3124                 break;
3125         case KVM_SET_MSRS:
3126                 r = msr_io(vcpu, argp, do_set_msr, 0);
3127                 break;
3128         case KVM_TPR_ACCESS_REPORTING: {
3129                 struct kvm_tpr_access_ctl tac;
3130
3131                 r = -EFAULT;
3132                 if (copy_from_user(&tac, argp, sizeof tac))
3133                         goto out;
3134                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3135                 if (r)
3136                         goto out;
3137                 r = -EFAULT;
3138                 if (copy_to_user(argp, &tac, sizeof tac))
3139                         goto out;
3140                 r = 0;
3141                 break;
3142         };
3143         case KVM_SET_VAPIC_ADDR: {
3144                 struct kvm_vapic_addr va;
3145
3146                 r = -EINVAL;
3147                 if (!irqchip_in_kernel(vcpu->kvm))
3148                         goto out;
3149                 r = -EFAULT;
3150                 if (copy_from_user(&va, argp, sizeof va))
3151                         goto out;
3152                 r = 0;
3153                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3154                 break;
3155         }
3156         case KVM_X86_SETUP_MCE: {
3157                 u64 mcg_cap;
3158
3159                 r = -EFAULT;
3160                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3161                         goto out;
3162                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3163                 break;
3164         }
3165         case KVM_X86_SET_MCE: {
3166                 struct kvm_x86_mce mce;
3167
3168                 r = -EFAULT;
3169                 if (copy_from_user(&mce, argp, sizeof mce))
3170                         goto out;
3171                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3172                 break;
3173         }
3174         case KVM_GET_VCPU_EVENTS: {
3175                 struct kvm_vcpu_events events;
3176
3177                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3178
3179                 r = -EFAULT;
3180                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3181                         break;
3182                 r = 0;
3183                 break;
3184         }
3185         case KVM_SET_VCPU_EVENTS: {
3186                 struct kvm_vcpu_events events;
3187
3188                 r = -EFAULT;
3189                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3190                         break;
3191
3192                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3193                 break;
3194         }
3195         case KVM_GET_DEBUGREGS: {
3196                 struct kvm_debugregs dbgregs;
3197
3198                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3199
3200                 r = -EFAULT;
3201                 if (copy_to_user(argp, &dbgregs,
3202                                  sizeof(struct kvm_debugregs)))
3203                         break;
3204                 r = 0;
3205                 break;
3206         }
3207         case KVM_SET_DEBUGREGS: {
3208                 struct kvm_debugregs dbgregs;
3209
3210                 r = -EFAULT;
3211                 if (copy_from_user(&dbgregs, argp,
3212                                    sizeof(struct kvm_debugregs)))
3213                         break;
3214
3215                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3216                 break;
3217         }
3218         case KVM_GET_XSAVE: {
3219                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3220                 r = -ENOMEM;
3221                 if (!u.xsave)
3222                         break;
3223
3224                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3225
3226                 r = -EFAULT;
3227                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3228                         break;
3229                 r = 0;
3230                 break;
3231         }
3232         case KVM_SET_XSAVE: {
3233                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3234                 r = -ENOMEM;
3235                 if (!u.xsave)
3236                         break;
3237
3238                 r = -EFAULT;
3239                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3240                         break;
3241
3242                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3243                 break;
3244         }
3245         case KVM_GET_XCRS: {
3246                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3247                 r = -ENOMEM;
3248                 if (!u.xcrs)
3249                         break;
3250
3251                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3252
3253                 r = -EFAULT;
3254                 if (copy_to_user(argp, u.xcrs,
3255                                  sizeof(struct kvm_xcrs)))
3256                         break;
3257                 r = 0;
3258                 break;
3259         }
3260         case KVM_SET_XCRS: {
3261                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3262                 r = -ENOMEM;
3263                 if (!u.xcrs)
3264                         break;
3265
3266                 r = -EFAULT;
3267                 if (copy_from_user(u.xcrs, argp,
3268                                    sizeof(struct kvm_xcrs)))
3269                         break;
3270
3271                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3272                 break;
3273         }
3274         case KVM_SET_TSC_KHZ: {
3275                 u32 user_tsc_khz;
3276
3277                 r = -EINVAL;
3278                 if (!kvm_has_tsc_control)
3279                         break;
3280
3281                 user_tsc_khz = (u32)arg;
3282
3283                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3284                         goto out;
3285
3286                 kvm_x86_ops->set_tsc_khz(vcpu, user_tsc_khz);
3287
3288                 r = 0;
3289                 goto out;
3290         }
3291         case KVM_GET_TSC_KHZ: {
3292                 r = -EIO;
3293                 if (check_tsc_unstable())
3294                         goto out;
3295
3296                 r = vcpu_tsc_khz(vcpu);
3297
3298                 goto out;
3299         }
3300         default:
3301                 r = -EINVAL;
3302         }
3303 out:
3304         kfree(u.buffer);
3305         return r;
3306 }
3307
3308 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3309 {
3310         int ret;
3311
3312         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3313                 return -1;
3314         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3315         return ret;
3316 }
3317
3318 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3319                                               u64 ident_addr)
3320 {
3321         kvm->arch.ept_identity_map_addr = ident_addr;
3322         return 0;
3323 }
3324
3325 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3326                                           u32 kvm_nr_mmu_pages)
3327 {
3328         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3329                 return -EINVAL;
3330
3331         mutex_lock(&kvm->slots_lock);
3332         spin_lock(&kvm->mmu_lock);
3333
3334         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3335         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3336
3337         spin_unlock(&kvm->mmu_lock);
3338         mutex_unlock(&kvm->slots_lock);
3339         return 0;
3340 }
3341
3342 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3343 {
3344         return kvm->arch.n_max_mmu_pages;
3345 }
3346
3347 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3348 {
3349         int r;
3350
3351         r = 0;
3352         switch (chip->chip_id) {
3353         case KVM_IRQCHIP_PIC_MASTER:
3354                 memcpy(&chip->chip.pic,
3355                         &pic_irqchip(kvm)->pics[0],
3356                         sizeof(struct kvm_pic_state));
3357                 break;
3358         case KVM_IRQCHIP_PIC_SLAVE:
3359                 memcpy(&chip->chip.pic,
3360                         &pic_irqchip(kvm)->pics[1],
3361                         sizeof(struct kvm_pic_state));
3362                 break;
3363         case KVM_IRQCHIP_IOAPIC:
3364                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3365                 break;
3366         default:
3367                 r = -EINVAL;
3368                 break;
3369         }
3370         return r;
3371 }
3372
3373 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3374 {
3375         int r;
3376
3377         r = 0;
3378         switch (chip->chip_id) {
3379         case KVM_IRQCHIP_PIC_MASTER:
3380                 spin_lock(&pic_irqchip(kvm)->lock);
3381                 memcpy(&pic_irqchip(kvm)->pics[0],
3382                         &chip->chip.pic,
3383                         sizeof(struct kvm_pic_state));
3384                 spin_unlock(&pic_irqchip(kvm)->lock);
3385                 break;
3386         case KVM_IRQCHIP_PIC_SLAVE:
3387                 spin_lock(&pic_irqchip(kvm)->lock);
3388                 memcpy(&pic_irqchip(kvm)->pics[1],
3389                         &chip->chip.pic,
3390                         sizeof(struct kvm_pic_state));
3391                 spin_unlock(&pic_irqchip(kvm)->lock);
3392                 break;
3393         case KVM_IRQCHIP_IOAPIC:
3394                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3395                 break;
3396         default:
3397                 r = -EINVAL;
3398                 break;
3399         }
3400         kvm_pic_update_irq(pic_irqchip(kvm));
3401         return r;
3402 }
3403
3404 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3405 {
3406         int r = 0;
3407
3408         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3409         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3410         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3411         return r;
3412 }
3413
3414 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3415 {
3416         int r = 0;
3417
3418         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3419         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3420         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3421         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3422         return r;
3423 }
3424
3425 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3426 {
3427         int r = 0;
3428
3429         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3430         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3431                 sizeof(ps->channels));
3432         ps->flags = kvm->arch.vpit->pit_state.flags;
3433         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3434         memset(&ps->reserved, 0, sizeof(ps->reserved));
3435         return r;
3436 }
3437
3438 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3439 {
3440         int r = 0, start = 0;
3441         u32 prev_legacy, cur_legacy;
3442         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3443         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3444         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3445         if (!prev_legacy && cur_legacy)
3446                 start = 1;
3447         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3448                sizeof(kvm->arch.vpit->pit_state.channels));
3449         kvm->arch.vpit->pit_state.flags = ps->flags;
3450         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3451         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3452         return r;
3453 }
3454
3455 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3456                                  struct kvm_reinject_control *control)
3457 {
3458         if (!kvm->arch.vpit)
3459                 return -ENXIO;
3460         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3461         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3462         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3463         return 0;
3464 }
3465
3466 /*
3467  * Get (and clear) the dirty memory log for a memory slot.
3468  */
3469 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3470                                       struct kvm_dirty_log *log)
3471 {
3472         int r, i;
3473         struct kvm_memory_slot *memslot;
3474         unsigned long n;
3475         unsigned long is_dirty = 0;
3476
3477         mutex_lock(&kvm->slots_lock);
3478
3479         r = -EINVAL;
3480         if (log->slot >= KVM_MEMORY_SLOTS)
3481                 goto out;
3482
3483         memslot = &kvm->memslots->memslots[log->slot];
3484         r = -ENOENT;
3485         if (!memslot->dirty_bitmap)
3486                 goto out;
3487
3488         n = kvm_dirty_bitmap_bytes(memslot);
3489
3490         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3491                 is_dirty = memslot->dirty_bitmap[i];
3492
3493         /* If nothing is dirty, don't bother messing with page tables. */
3494         if (is_dirty) {
3495                 struct kvm_memslots *slots, *old_slots;
3496                 unsigned long *dirty_bitmap;
3497
3498                 dirty_bitmap = memslot->dirty_bitmap_head;
3499                 if (memslot->dirty_bitmap == dirty_bitmap)
3500                         dirty_bitmap += n / sizeof(long);
3501                 memset(dirty_bitmap, 0, n);
3502
3503                 r = -ENOMEM;
3504                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3505                 if (!slots)
3506                         goto out;
3507                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3508                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3509                 slots->generation++;
3510
3511                 old_slots = kvm->memslots;
3512                 rcu_assign_pointer(kvm->memslots, slots);
3513                 synchronize_srcu_expedited(&kvm->srcu);
3514                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3515                 kfree(old_slots);
3516
3517                 spin_lock(&kvm->mmu_lock);
3518                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3519                 spin_unlock(&kvm->mmu_lock);
3520
3521                 r = -EFAULT;
3522                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3523                         goto out;
3524         } else {
3525                 r = -EFAULT;
3526                 if (clear_user(log->dirty_bitmap, n))
3527                         goto out;
3528         }
3529
3530         r = 0;
3531 out:
3532         mutex_unlock(&kvm->slots_lock);
3533         return r;
3534 }
3535
3536 long kvm_arch_vm_ioctl(struct file *filp,
3537                        unsigned int ioctl, unsigned long arg)
3538 {
3539         struct kvm *kvm = filp->private_data;
3540         void __user *argp = (void __user *)arg;
3541         int r = -ENOTTY;
3542         /*
3543          * This union makes it completely explicit to gcc-3.x
3544          * that these two variables' stack usage should be
3545          * combined, not added together.
3546          */
3547         union {
3548                 struct kvm_pit_state ps;
3549                 struct kvm_pit_state2 ps2;
3550                 struct kvm_pit_config pit_config;
3551         } u;
3552
3553         switch (ioctl) {
3554         case KVM_SET_TSS_ADDR:
3555                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3556                 if (r < 0)
3557                         goto out;
3558                 break;
3559         case KVM_SET_IDENTITY_MAP_ADDR: {
3560                 u64 ident_addr;
3561
3562                 r = -EFAULT;
3563                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3564                         goto out;
3565                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3566                 if (r < 0)
3567                         goto out;
3568                 break;
3569         }
3570         case KVM_SET_NR_MMU_PAGES:
3571                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3572                 if (r)
3573                         goto out;
3574                 break;
3575         case KVM_GET_NR_MMU_PAGES:
3576                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3577                 break;
3578         case KVM_CREATE_IRQCHIP: {
3579                 struct kvm_pic *vpic;
3580
3581                 mutex_lock(&kvm->lock);
3582                 r = -EEXIST;
3583                 if (kvm->arch.vpic)
3584                         goto create_irqchip_unlock;
3585                 r = -ENOMEM;
3586                 vpic = kvm_create_pic(kvm);
3587                 if (vpic) {
3588                         r = kvm_ioapic_init(kvm);
3589                         if (r) {
3590                                 mutex_lock(&kvm->slots_lock);
3591                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3592                                                           &vpic->dev_master);
3593                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3594                                                           &vpic->dev_slave);
3595                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3596                                                           &vpic->dev_eclr);
3597                                 mutex_unlock(&kvm->slots_lock);
3598                                 kfree(vpic);
3599                                 goto create_irqchip_unlock;
3600                         }
3601                 } else
3602                         goto create_irqchip_unlock;
3603                 smp_wmb();
3604                 kvm->arch.vpic = vpic;
3605                 smp_wmb();
3606                 r = kvm_setup_default_irq_routing(kvm);
3607                 if (r) {
3608                         mutex_lock(&kvm->slots_lock);
3609                         mutex_lock(&kvm->irq_lock);
3610                         kvm_ioapic_destroy(kvm);
3611                         kvm_destroy_pic(kvm);
3612                         mutex_unlock(&kvm->irq_lock);
3613                         mutex_unlock(&kvm->slots_lock);
3614                 }
3615         create_irqchip_unlock:
3616                 mutex_unlock(&kvm->lock);
3617                 break;
3618         }
3619         case KVM_CREATE_PIT:
3620                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3621                 goto create_pit;
3622         case KVM_CREATE_PIT2:
3623                 r = -EFAULT;
3624                 if (copy_from_user(&u.pit_config, argp,
3625                                    sizeof(struct kvm_pit_config)))
3626                         goto out;
3627         create_pit:
3628                 mutex_lock(&kvm->slots_lock);
3629                 r = -EEXIST;
3630                 if (kvm->arch.vpit)
3631                         goto create_pit_unlock;
3632                 r = -ENOMEM;
3633                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3634                 if (kvm->arch.vpit)
3635                         r = 0;
3636         create_pit_unlock:
3637                 mutex_unlock(&kvm->slots_lock);
3638                 break;
3639         case KVM_IRQ_LINE_STATUS:
3640         case KVM_IRQ_LINE: {
3641                 struct kvm_irq_level irq_event;
3642
3643                 r = -EFAULT;
3644                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3645                         goto out;
3646                 r = -ENXIO;
3647                 if (irqchip_in_kernel(kvm)) {
3648                         __s32 status;
3649                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3650                                         irq_event.irq, irq_event.level);
3651                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3652                                 r = -EFAULT;
3653                                 irq_event.status = status;
3654                                 if (copy_to_user(argp, &irq_event,
3655                                                         sizeof irq_event))
3656                                         goto out;
3657                         }
3658                         r = 0;
3659                 }
3660                 break;
3661         }
3662         case KVM_GET_IRQCHIP: {
3663                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3664                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3665
3666                 r = -ENOMEM;
3667                 if (!chip)
3668                         goto out;
3669                 r = -EFAULT;
3670                 if (copy_from_user(chip, argp, sizeof *chip))
3671                         goto get_irqchip_out;
3672                 r = -ENXIO;
3673                 if (!irqchip_in_kernel(kvm))
3674                         goto get_irqchip_out;
3675                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3676                 if (r)
3677                         goto get_irqchip_out;
3678                 r = -EFAULT;
3679                 if (copy_to_user(argp, chip, sizeof *chip))
3680                         goto get_irqchip_out;
3681                 r = 0;
3682         get_irqchip_out:
3683                 kfree(chip);
3684                 if (r)
3685                         goto out;
3686                 break;
3687         }
3688         case KVM_SET_IRQCHIP: {
3689                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3690                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3691
3692                 r = -ENOMEM;
3693                 if (!chip)
3694                         goto out;
3695                 r = -EFAULT;
3696                 if (copy_from_user(chip, argp, sizeof *chip))
3697                         goto set_irqchip_out;
3698                 r = -ENXIO;
3699                 if (!irqchip_in_kernel(kvm))
3700                         goto set_irqchip_out;
3701                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3702                 if (r)
3703                         goto set_irqchip_out;
3704                 r = 0;
3705         set_irqchip_out:
3706                 kfree(chip);
3707                 if (r)
3708                         goto out;
3709                 break;
3710         }
3711         case KVM_GET_PIT: {
3712                 r = -EFAULT;
3713                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3714                         goto out;
3715                 r = -ENXIO;
3716                 if (!kvm->arch.vpit)
3717                         goto out;
3718                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3719                 if (r)
3720                         goto out;
3721                 r = -EFAULT;
3722                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3723                         goto out;
3724                 r = 0;
3725                 break;
3726         }
3727         case KVM_SET_PIT: {
3728                 r = -EFAULT;
3729                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3730                         goto out;
3731                 r = -ENXIO;
3732                 if (!kvm->arch.vpit)
3733                         goto out;
3734                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3735                 if (r)
3736                         goto out;
3737                 r = 0;
3738                 break;
3739         }
3740         case KVM_GET_PIT2: {
3741                 r = -ENXIO;
3742                 if (!kvm->arch.vpit)
3743                         goto out;
3744                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3745                 if (r)
3746                         goto out;
3747                 r = -EFAULT;
3748                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3749                         goto out;
3750                 r = 0;
3751                 break;
3752         }
3753         case KVM_SET_PIT2: {
3754                 r = -EFAULT;
3755                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3756                         goto out;
3757                 r = -ENXIO;
3758                 if (!kvm->arch.vpit)
3759                         goto out;
3760                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3761                 if (r)
3762                         goto out;
3763                 r = 0;
3764                 break;
3765         }
3766         case KVM_REINJECT_CONTROL: {
3767                 struct kvm_reinject_control control;
3768                 r =  -EFAULT;
3769                 if (copy_from_user(&control, argp, sizeof(control)))
3770                         goto out;
3771                 r = kvm_vm_ioctl_reinject(kvm, &control);
3772                 if (r)
3773                         goto out;
3774                 r = 0;
3775                 break;
3776         }
3777         case KVM_XEN_HVM_CONFIG: {
3778                 r = -EFAULT;
3779                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3780                                    sizeof(struct kvm_xen_hvm_config)))
3781                         goto out;
3782                 r = -EINVAL;
3783                 if (kvm->arch.xen_hvm_config.flags)
3784                         goto out;
3785                 r = 0;
3786                 break;
3787         }
3788         case KVM_SET_CLOCK: {
3789                 struct kvm_clock_data user_ns;
3790                 u64 now_ns;
3791                 s64 delta;
3792
3793                 r = -EFAULT;
3794                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3795                         goto out;
3796
3797                 r = -EINVAL;
3798                 if (user_ns.flags)
3799                         goto out;
3800
3801                 r = 0;
3802                 local_irq_disable();
3803                 now_ns = get_kernel_ns();
3804                 delta = user_ns.clock - now_ns;
3805                 local_irq_enable();
3806                 kvm->arch.kvmclock_offset = delta;
3807                 break;
3808         }
3809         case KVM_GET_CLOCK: {
3810                 struct kvm_clock_data user_ns;
3811                 u64 now_ns;
3812
3813                 local_irq_disable();
3814                 now_ns = get_kernel_ns();
3815                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3816                 local_irq_enable();
3817                 user_ns.flags = 0;
3818                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3819
3820                 r = -EFAULT;
3821                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3822                         goto out;
3823                 r = 0;
3824                 break;
3825         }
3826
3827         default:
3828                 ;
3829         }
3830 out:
3831         return r;
3832 }
3833
3834 static void kvm_init_msr_list(void)
3835 {
3836         u32 dummy[2];
3837         unsigned i, j;
3838
3839         /* skip the first msrs in the list. KVM-specific */
3840         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3841                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3842                         continue;
3843                 if (j < i)
3844                         msrs_to_save[j] = msrs_to_save[i];
3845                 j++;
3846         }
3847         num_msrs_to_save = j;
3848 }
3849
3850 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3851                            const void *v)
3852 {
3853         int handled = 0;
3854         int n;
3855
3856         do {
3857                 n = min(len, 8);
3858                 if (!(vcpu->arch.apic &&
3859                       !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, n, v))
3860                     && kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3861                         break;
3862                 handled += n;
3863                 addr += n;
3864                 len -= n;
3865                 v += n;
3866         } while (len);
3867
3868         return handled;
3869 }
3870
3871 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3872 {
3873         int handled = 0;
3874         int n;
3875
3876         do {
3877                 n = min(len, 8);
3878                 if (!(vcpu->arch.apic &&
3879                       !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, n, v))
3880                     && kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, n, v))
3881                         break;
3882                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3883                 handled += n;
3884                 addr += n;
3885                 len -= n;
3886                 v += n;
3887         } while (len);
3888
3889         return handled;
3890 }
3891
3892 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3893                         struct kvm_segment *var, int seg)
3894 {
3895         kvm_x86_ops->set_segment(vcpu, var, seg);
3896 }
3897
3898 void kvm_get_segment(struct kvm_vcpu *vcpu,
3899                      struct kvm_segment *var, int seg)
3900 {
3901         kvm_x86_ops->get_segment(vcpu, var, seg);
3902 }
3903
3904 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3905 {
3906         return gpa;
3907 }
3908
3909 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3910 {
3911         gpa_t t_gpa;
3912         struct x86_exception exception;
3913
3914         BUG_ON(!mmu_is_nested(vcpu));
3915
3916         /* NPT walks are always user-walks */
3917         access |= PFERR_USER_MASK;
3918         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3919
3920         return t_gpa;
3921 }
3922
3923 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3924                               struct x86_exception *exception)
3925 {
3926         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3927         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3928 }
3929
3930  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3931                                 struct x86_exception *exception)
3932 {
3933         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3934         access |= PFERR_FETCH_MASK;
3935         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3936 }
3937
3938 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3939                                struct x86_exception *exception)
3940 {
3941         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3942         access |= PFERR_WRITE_MASK;
3943         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3944 }
3945
3946 /* uses this to access any guest's mapped memory without checking CPL */
3947 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3948                                 struct x86_exception *exception)
3949 {
3950         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3951 }
3952
3953 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3954                                       struct kvm_vcpu *vcpu, u32 access,
3955                                       struct x86_exception *exception)
3956 {
3957         void *data = val;
3958         int r = X86EMUL_CONTINUE;
3959
3960         while (bytes) {
3961                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3962                                                             exception);
3963                 unsigned offset = addr & (PAGE_SIZE-1);
3964                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3965                 int ret;
3966
3967                 if (gpa == UNMAPPED_GVA)
3968                         return X86EMUL_PROPAGATE_FAULT;
3969                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3970                 if (ret < 0) {
3971                         r = X86EMUL_IO_NEEDED;
3972                         goto out;
3973                 }
3974
3975                 bytes -= toread;
3976                 data += toread;
3977                 addr += toread;
3978         }
3979 out:
3980         return r;
3981 }
3982
3983 /* used for instruction fetching */
3984 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
3985                                 gva_t addr, void *val, unsigned int bytes,
3986                                 struct x86_exception *exception)
3987 {
3988         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
3989         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3990
3991         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3992                                           access | PFERR_FETCH_MASK,
3993                                           exception);
3994 }
3995
3996 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
3997                                gva_t addr, void *val, unsigned int bytes,
3998                                struct x86_exception *exception)
3999 {
4000         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4001         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4002
4003         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4004                                           exception);
4005 }
4006 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4007
4008 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4009                                       gva_t addr, void *val, unsigned int bytes,
4010                                       struct x86_exception *exception)
4011 {
4012         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4013         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4014 }
4015
4016 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4017                                        gva_t addr, void *val,
4018                                        unsigned int bytes,
4019                                        struct x86_exception *exception)
4020 {
4021         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4022         void *data = val;
4023         int r = X86EMUL_CONTINUE;
4024
4025         while (bytes) {
4026                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4027                                                              PFERR_WRITE_MASK,
4028                                                              exception);
4029                 unsigned offset = addr & (PAGE_SIZE-1);
4030                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4031                 int ret;
4032
4033                 if (gpa == UNMAPPED_GVA)
4034                         return X86EMUL_PROPAGATE_FAULT;
4035                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
4036                 if (ret < 0) {
4037                         r = X86EMUL_IO_NEEDED;
4038                         goto out;
4039                 }
4040
4041                 bytes -= towrite;
4042                 data += towrite;
4043                 addr += towrite;
4044         }
4045 out:
4046         return r;
4047 }
4048 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4049
4050 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4051                                 gpa_t *gpa, struct x86_exception *exception,
4052                                 bool write)
4053 {
4054         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4055
4056         if (vcpu_match_mmio_gva(vcpu, gva) &&
4057                   check_write_user_access(vcpu, write, access,
4058                   vcpu->arch.access)) {
4059                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4060                                         (gva & (PAGE_SIZE - 1));
4061                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4062                 return 1;
4063         }
4064
4065         if (write)
4066                 access |= PFERR_WRITE_MASK;
4067
4068         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4069
4070         if (*gpa == UNMAPPED_GVA)
4071                 return -1;
4072
4073         /* For APIC access vmexit */
4074         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4075                 return 1;
4076
4077         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4078                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4079                 return 1;
4080         }
4081
4082         return 0;
4083 }
4084
4085 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4086                         const void *val, int bytes)
4087 {
4088         int ret;
4089
4090         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
4091         if (ret < 0)
4092                 return 0;
4093         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
4094         return 1;
4095 }
4096
4097 struct read_write_emulator_ops {
4098         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4099                                   int bytes);
4100         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4101                                   void *val, int bytes);
4102         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4103                                int bytes, void *val);
4104         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4105                                     void *val, int bytes);
4106         bool write;
4107 };
4108
4109 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4110 {
4111         if (vcpu->mmio_read_completed) {
4112                 memcpy(val, vcpu->mmio_data, bytes);
4113                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4114                                vcpu->mmio_phys_addr, *(u64 *)val);
4115                 vcpu->mmio_read_completed = 0;
4116                 return 1;
4117         }
4118
4119         return 0;
4120 }
4121
4122 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4123                         void *val, int bytes)
4124 {
4125         return !kvm_read_guest(vcpu->kvm, gpa, val, bytes);
4126 }
4127
4128 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4129                          void *val, int bytes)
4130 {
4131         return emulator_write_phys(vcpu, gpa, val, bytes);
4132 }
4133
4134 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4135 {
4136         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4137         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4138 }
4139
4140 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4141                           void *val, int bytes)
4142 {
4143         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4144         return X86EMUL_IO_NEEDED;
4145 }
4146
4147 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4148                            void *val, int bytes)
4149 {
4150         memcpy(vcpu->mmio_data, val, bytes);
4151         memcpy(vcpu->run->mmio.data, vcpu->mmio_data, 8);
4152         return X86EMUL_CONTINUE;
4153 }
4154
4155 static struct read_write_emulator_ops read_emultor = {
4156         .read_write_prepare = read_prepare,
4157         .read_write_emulate = read_emulate,
4158         .read_write_mmio = vcpu_mmio_read,
4159         .read_write_exit_mmio = read_exit_mmio,
4160 };
4161
4162 static struct read_write_emulator_ops write_emultor = {
4163         .read_write_emulate = write_emulate,
4164         .read_write_mmio = write_mmio,
4165         .read_write_exit_mmio = write_exit_mmio,
4166         .write = true,
4167 };
4168
4169 static int emulator_read_write_onepage(unsigned long addr, void *val,
4170                                        unsigned int bytes,
4171                                        struct x86_exception *exception,
4172                                        struct kvm_vcpu *vcpu,
4173                                        struct read_write_emulator_ops *ops)
4174 {
4175         gpa_t gpa;
4176         int handled, ret;
4177         bool write = ops->write;
4178
4179         if (ops->read_write_prepare &&
4180                   ops->read_write_prepare(vcpu, val, bytes))
4181                 return X86EMUL_CONTINUE;
4182
4183         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4184
4185         if (ret < 0)
4186                 return X86EMUL_PROPAGATE_FAULT;
4187
4188         /* For APIC access vmexit */
4189         if (ret)
4190                 goto mmio;
4191
4192         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4193                 return X86EMUL_CONTINUE;
4194
4195 mmio:
4196         /*
4197          * Is this MMIO handled locally?
4198          */
4199         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4200         if (handled == bytes)
4201                 return X86EMUL_CONTINUE;
4202
4203         gpa += handled;
4204         bytes -= handled;
4205         val += handled;
4206
4207         vcpu->mmio_needed = 1;
4208         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4209         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
4210         vcpu->mmio_size = bytes;
4211         vcpu->run->mmio.len = min(vcpu->mmio_size, 8);
4212         vcpu->run->mmio.is_write = vcpu->mmio_is_write = write;
4213         vcpu->mmio_index = 0;
4214
4215         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4216 }
4217
4218 int emulator_read_write(struct x86_emulate_ctxt *ctxt, unsigned long addr,
4219                         void *val, unsigned int bytes,
4220                         struct x86_exception *exception,
4221                         struct read_write_emulator_ops *ops)
4222 {
4223         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4224
4225         /* Crossing a page boundary? */
4226         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4227                 int rc, now;
4228
4229                 now = -addr & ~PAGE_MASK;
4230                 rc = emulator_read_write_onepage(addr, val, now, exception,
4231                                                  vcpu, ops);
4232
4233                 if (rc != X86EMUL_CONTINUE)
4234                         return rc;
4235                 addr += now;
4236                 val += now;
4237                 bytes -= now;
4238         }
4239
4240         return emulator_read_write_onepage(addr, val, bytes, exception,
4241                                            vcpu, ops);
4242 }
4243
4244 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4245                                   unsigned long addr,
4246                                   void *val,
4247                                   unsigned int bytes,
4248                                   struct x86_exception *exception)
4249 {
4250         return emulator_read_write(ctxt, addr, val, bytes,
4251                                    exception, &read_emultor);
4252 }
4253
4254 int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4255                             unsigned long addr,
4256                             const void *val,
4257                             unsigned int bytes,
4258                             struct x86_exception *exception)
4259 {
4260         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4261                                    exception, &write_emultor);
4262 }
4263
4264 #define CMPXCHG_TYPE(t, ptr, old, new) \
4265         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4266
4267 #ifdef CONFIG_X86_64
4268 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4269 #else
4270 #  define CMPXCHG64(ptr, old, new) \
4271         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4272 #endif
4273
4274 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4275                                      unsigned long addr,
4276                                      const void *old,
4277                                      const void *new,
4278                                      unsigned int bytes,
4279                                      struct x86_exception *exception)
4280 {
4281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4282         gpa_t gpa;
4283         struct page *page;
4284         char *kaddr;
4285         bool exchanged;
4286
4287         /* guests cmpxchg8b have to be emulated atomically */
4288         if (bytes > 8 || (bytes & (bytes - 1)))
4289                 goto emul_write;
4290
4291         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4292
4293         if (gpa == UNMAPPED_GVA ||
4294             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4295                 goto emul_write;
4296
4297         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4298                 goto emul_write;
4299
4300         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
4301         if (is_error_page(page)) {
4302                 kvm_release_page_clean(page);
4303                 goto emul_write;
4304         }
4305
4306         kaddr = kmap_atomic(page, KM_USER0);
4307         kaddr += offset_in_page(gpa);
4308         switch (bytes) {
4309         case 1:
4310                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4311                 break;
4312         case 2:
4313                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4314                 break;
4315         case 4:
4316                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4317                 break;
4318         case 8:
4319                 exchanged = CMPXCHG64(kaddr, old, new);
4320                 break;
4321         default:
4322                 BUG();
4323         }
4324         kunmap_atomic(kaddr, KM_USER0);
4325         kvm_release_page_dirty(page);
4326
4327         if (!exchanged)
4328                 return X86EMUL_CMPXCHG_FAILED;
4329
4330         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
4331
4332         return X86EMUL_CONTINUE;
4333
4334 emul_write:
4335         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4336
4337         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4338 }
4339
4340 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4341 {
4342         /* TODO: String I/O for in kernel device */
4343         int r;
4344
4345         if (vcpu->arch.pio.in)
4346                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
4347                                     vcpu->arch.pio.size, pd);
4348         else
4349                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
4350                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4351                                      pd);
4352         return r;
4353 }
4354
4355
4356 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4357                                     int size, unsigned short port, void *val,
4358                                     unsigned int count)
4359 {
4360         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4361
4362         if (vcpu->arch.pio.count)
4363                 goto data_avail;
4364
4365         trace_kvm_pio(0, port, size, count);
4366
4367         vcpu->arch.pio.port = port;
4368         vcpu->arch.pio.in = 1;
4369         vcpu->arch.pio.count  = count;
4370         vcpu->arch.pio.size = size;
4371
4372         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4373         data_avail:
4374                 memcpy(val, vcpu->arch.pio_data, size * count);
4375                 vcpu->arch.pio.count = 0;
4376                 return 1;
4377         }
4378
4379         vcpu->run->exit_reason = KVM_EXIT_IO;
4380         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4381         vcpu->run->io.size = size;
4382         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4383         vcpu->run->io.count = count;
4384         vcpu->run->io.port = port;
4385
4386         return 0;
4387 }
4388
4389 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4390                                      int size, unsigned short port,
4391                                      const void *val, unsigned int count)
4392 {
4393         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4394
4395         trace_kvm_pio(1, port, size, count);
4396
4397         vcpu->arch.pio.port = port;
4398         vcpu->arch.pio.in = 0;
4399         vcpu->arch.pio.count = count;
4400         vcpu->arch.pio.size = size;
4401
4402         memcpy(vcpu->arch.pio_data, val, size * count);
4403
4404         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4405                 vcpu->arch.pio.count = 0;
4406                 return 1;
4407         }
4408
4409         vcpu->run->exit_reason = KVM_EXIT_IO;
4410         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4411         vcpu->run->io.size = size;
4412         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4413         vcpu->run->io.count = count;
4414         vcpu->run->io.port = port;
4415
4416         return 0;
4417 }
4418
4419 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4420 {
4421         return kvm_x86_ops->get_segment_base(vcpu, seg);
4422 }
4423
4424 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4425 {
4426         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4427 }
4428
4429 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4430 {
4431         if (!need_emulate_wbinvd(vcpu))
4432                 return X86EMUL_CONTINUE;
4433
4434         if (kvm_x86_ops->has_wbinvd_exit()) {
4435                 int cpu = get_cpu();
4436
4437                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4438                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4439                                 wbinvd_ipi, NULL, 1);
4440                 put_cpu();
4441                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4442         } else
4443                 wbinvd();
4444         return X86EMUL_CONTINUE;
4445 }
4446 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4447
4448 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4449 {
4450         kvm_emulate_wbinvd(emul_to_vcpu(ctxt));
4451 }
4452
4453 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
4454 {
4455         return _kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4456 }
4457
4458 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
4459 {
4460
4461         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4462 }
4463
4464 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4465 {
4466         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4467 }
4468
4469 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4470 {
4471         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4472         unsigned long value;
4473
4474         switch (cr) {
4475         case 0:
4476                 value = kvm_read_cr0(vcpu);
4477                 break;
4478         case 2:
4479                 value = vcpu->arch.cr2;
4480                 break;
4481         case 3:
4482                 value = kvm_read_cr3(vcpu);
4483                 break;
4484         case 4:
4485                 value = kvm_read_cr4(vcpu);
4486                 break;
4487         case 8:
4488                 value = kvm_get_cr8(vcpu);
4489                 break;
4490         default:
4491                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4492                 return 0;
4493         }
4494
4495         return value;
4496 }
4497
4498 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4499 {
4500         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4501         int res = 0;
4502
4503         switch (cr) {
4504         case 0:
4505                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4506                 break;
4507         case 2:
4508                 vcpu->arch.cr2 = val;
4509                 break;
4510         case 3:
4511                 res = kvm_set_cr3(vcpu, val);
4512                 break;
4513         case 4:
4514                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4515                 break;
4516         case 8:
4517                 res = kvm_set_cr8(vcpu, val);
4518                 break;
4519         default:
4520                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4521                 res = -1;
4522         }
4523
4524         return res;
4525 }
4526
4527 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4528 {
4529         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4530 }
4531
4532 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4533 {
4534         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4535 }
4536
4537 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4538 {
4539         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4540 }
4541
4542 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4543 {
4544         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4545 }
4546
4547 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4548 {
4549         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4550 }
4551
4552 static unsigned long emulator_get_cached_segment_base(
4553         struct x86_emulate_ctxt *ctxt, int seg)
4554 {
4555         return get_segment_base(emul_to_vcpu(ctxt), seg);
4556 }
4557
4558 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4559                                  struct desc_struct *desc, u32 *base3,
4560                                  int seg)
4561 {
4562         struct kvm_segment var;
4563
4564         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4565         *selector = var.selector;
4566
4567         if (var.unusable)
4568                 return false;
4569
4570         if (var.g)
4571                 var.limit >>= 12;
4572         set_desc_limit(desc, var.limit);
4573         set_desc_base(desc, (unsigned long)var.base);
4574 #ifdef CONFIG_X86_64
4575         if (base3)
4576                 *base3 = var.base >> 32;
4577 #endif
4578         desc->type = var.type;
4579         desc->s = var.s;
4580         desc->dpl = var.dpl;
4581         desc->p = var.present;
4582         desc->avl = var.avl;
4583         desc->l = var.l;
4584         desc->d = var.db;
4585         desc->g = var.g;
4586
4587         return true;
4588 }
4589
4590 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4591                                  struct desc_struct *desc, u32 base3,
4592                                  int seg)
4593 {
4594         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4595         struct kvm_segment var;
4596
4597         var.selector = selector;
4598         var.base = get_desc_base(desc);
4599 #ifdef CONFIG_X86_64
4600         var.base |= ((u64)base3) << 32;
4601 #endif
4602         var.limit = get_desc_limit(desc);
4603         if (desc->g)
4604                 var.limit = (var.limit << 12) | 0xfff;
4605         var.type = desc->type;
4606         var.present = desc->p;
4607         var.dpl = desc->dpl;
4608         var.db = desc->d;
4609         var.s = desc->s;
4610         var.l = desc->l;
4611         var.g = desc->g;
4612         var.avl = desc->avl;
4613         var.present = desc->p;
4614         var.unusable = !var.present;
4615         var.padding = 0;
4616
4617         kvm_set_segment(vcpu, &var, seg);
4618         return;
4619 }
4620
4621 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4622                             u32 msr_index, u64 *pdata)
4623 {
4624         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
4625 }
4626
4627 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4628                             u32 msr_index, u64 data)
4629 {
4630         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
4631 }
4632
4633 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4634 {
4635         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4636 }
4637
4638 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4639 {
4640         preempt_disable();
4641         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4642         /*
4643          * CR0.TS may reference the host fpu state, not the guest fpu state,
4644          * so it may be clear at this point.
4645          */
4646         clts();
4647 }
4648
4649 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4650 {
4651         preempt_enable();
4652 }
4653
4654 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4655                               struct x86_instruction_info *info,
4656                               enum x86_intercept_stage stage)
4657 {
4658         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4659 }
4660
4661 static struct x86_emulate_ops emulate_ops = {
4662         .read_std            = kvm_read_guest_virt_system,
4663         .write_std           = kvm_write_guest_virt_system,
4664         .fetch               = kvm_fetch_guest_virt,
4665         .read_emulated       = emulator_read_emulated,
4666         .write_emulated      = emulator_write_emulated,
4667         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4668         .invlpg              = emulator_invlpg,
4669         .pio_in_emulated     = emulator_pio_in_emulated,
4670         .pio_out_emulated    = emulator_pio_out_emulated,
4671         .get_segment         = emulator_get_segment,
4672         .set_segment         = emulator_set_segment,
4673         .get_cached_segment_base = emulator_get_cached_segment_base,
4674         .get_gdt             = emulator_get_gdt,
4675         .get_idt             = emulator_get_idt,
4676         .set_gdt             = emulator_set_gdt,
4677         .set_idt             = emulator_set_idt,
4678         .get_cr              = emulator_get_cr,
4679         .set_cr              = emulator_set_cr,
4680         .cpl                 = emulator_get_cpl,
4681         .get_dr              = emulator_get_dr,
4682         .set_dr              = emulator_set_dr,
4683         .set_msr             = emulator_set_msr,
4684         .get_msr             = emulator_get_msr,
4685         .halt                = emulator_halt,
4686         .wbinvd              = emulator_wbinvd,
4687         .fix_hypercall       = emulator_fix_hypercall,
4688         .get_fpu             = emulator_get_fpu,
4689         .put_fpu             = emulator_put_fpu,
4690         .intercept           = emulator_intercept,
4691 };
4692
4693 static void cache_all_regs(struct kvm_vcpu *vcpu)
4694 {
4695         kvm_register_read(vcpu, VCPU_REGS_RAX);
4696         kvm_register_read(vcpu, VCPU_REGS_RSP);
4697         kvm_register_read(vcpu, VCPU_REGS_RIP);
4698         vcpu->arch.regs_dirty = ~0;
4699 }
4700
4701 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4702 {
4703         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4704         /*
4705          * an sti; sti; sequence only disable interrupts for the first
4706          * instruction. So, if the last instruction, be it emulated or
4707          * not, left the system with the INT_STI flag enabled, it
4708          * means that the last instruction is an sti. We should not
4709          * leave the flag on in this case. The same goes for mov ss
4710          */
4711         if (!(int_shadow & mask))
4712                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4713 }
4714
4715 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4716 {
4717         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4718         if (ctxt->exception.vector == PF_VECTOR)
4719                 kvm_propagate_fault(vcpu, &ctxt->exception);
4720         else if (ctxt->exception.error_code_valid)
4721                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4722                                       ctxt->exception.error_code);
4723         else
4724                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4725 }
4726
4727 static void init_decode_cache(struct x86_emulate_ctxt *ctxt,
4728                               const unsigned long *regs)
4729 {
4730         memset(&ctxt->twobyte, 0,
4731                (void *)&ctxt->regs - (void *)&ctxt->twobyte);
4732         memcpy(ctxt->regs, regs, sizeof(ctxt->regs));
4733
4734         ctxt->fetch.start = 0;
4735         ctxt->fetch.end = 0;
4736         ctxt->io_read.pos = 0;
4737         ctxt->io_read.end = 0;
4738         ctxt->mem_read.pos = 0;
4739         ctxt->mem_read.end = 0;
4740 }
4741
4742 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4743 {
4744         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4745         int cs_db, cs_l;
4746
4747         /*
4748          * TODO: fix emulate.c to use guest_read/write_register
4749          * instead of direct ->regs accesses, can save hundred cycles
4750          * on Intel for instructions that don't read/change RSP, for
4751          * for example.
4752          */
4753         cache_all_regs(vcpu);
4754
4755         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4756
4757         ctxt->eflags = kvm_get_rflags(vcpu);
4758         ctxt->eip = kvm_rip_read(vcpu);
4759         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4760                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4761                      cs_l                               ? X86EMUL_MODE_PROT64 :
4762                      cs_db                              ? X86EMUL_MODE_PROT32 :
4763                                                           X86EMUL_MODE_PROT16;
4764         ctxt->guest_mode = is_guest_mode(vcpu);
4765
4766         init_decode_cache(ctxt, vcpu->arch.regs);
4767         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4768 }
4769
4770 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4771 {
4772         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4773         int ret;
4774
4775         init_emulate_ctxt(vcpu);
4776
4777         ctxt->op_bytes = 2;
4778         ctxt->ad_bytes = 2;
4779         ctxt->_eip = ctxt->eip + inc_eip;
4780         ret = emulate_int_real(ctxt, irq);
4781
4782         if (ret != X86EMUL_CONTINUE)
4783                 return EMULATE_FAIL;
4784
4785         ctxt->eip = ctxt->_eip;
4786         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4787         kvm_rip_write(vcpu, ctxt->eip);
4788         kvm_set_rflags(vcpu, ctxt->eflags);
4789
4790         if (irq == NMI_VECTOR)
4791                 vcpu->arch.nmi_pending = 0;
4792         else
4793                 vcpu->arch.interrupt.pending = false;
4794
4795         return EMULATE_DONE;
4796 }
4797 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4798
4799 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4800 {
4801         int r = EMULATE_DONE;
4802
4803         ++vcpu->stat.insn_emulation_fail;
4804         trace_kvm_emulate_insn_failed(vcpu);
4805         if (!is_guest_mode(vcpu)) {
4806                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4807                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4808                 vcpu->run->internal.ndata = 0;
4809                 r = EMULATE_FAIL;
4810         }
4811         kvm_queue_exception(vcpu, UD_VECTOR);
4812
4813         return r;
4814 }
4815
4816 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4817 {
4818         gpa_t gpa;
4819
4820         if (tdp_enabled)
4821                 return false;
4822
4823         /*
4824          * if emulation was due to access to shadowed page table
4825          * and it failed try to unshadow page and re-entetr the
4826          * guest to let CPU execute the instruction.
4827          */
4828         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4829                 return true;
4830
4831         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4832
4833         if (gpa == UNMAPPED_GVA)
4834                 return true; /* let cpu generate fault */
4835
4836         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4837                 return true;
4838
4839         return false;
4840 }
4841
4842 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4843                             unsigned long cr2,
4844                             int emulation_type,
4845                             void *insn,
4846                             int insn_len)
4847 {
4848         int r;
4849         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4850         bool writeback = true;
4851
4852         kvm_clear_exception_queue(vcpu);
4853
4854         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4855                 init_emulate_ctxt(vcpu);
4856                 ctxt->interruptibility = 0;
4857                 ctxt->have_exception = false;
4858                 ctxt->perm_ok = false;
4859
4860                 ctxt->only_vendor_specific_insn
4861                         = emulation_type & EMULTYPE_TRAP_UD;
4862
4863                 r = x86_decode_insn(ctxt, insn, insn_len);
4864
4865                 trace_kvm_emulate_insn_start(vcpu);
4866                 ++vcpu->stat.insn_emulation;
4867                 if (r != EMULATION_OK)  {
4868                         if (emulation_type & EMULTYPE_TRAP_UD)
4869                                 return EMULATE_FAIL;
4870                         if (reexecute_instruction(vcpu, cr2))
4871                                 return EMULATE_DONE;
4872                         if (emulation_type & EMULTYPE_SKIP)
4873                                 return EMULATE_FAIL;
4874                         return handle_emulation_failure(vcpu);
4875                 }
4876         }
4877
4878         if (emulation_type & EMULTYPE_SKIP) {
4879                 kvm_rip_write(vcpu, ctxt->_eip);
4880                 return EMULATE_DONE;
4881         }
4882
4883         /* this is needed for vmware backdoor interface to work since it
4884            changes registers values  during IO operation */
4885         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
4886                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4887                 memcpy(ctxt->regs, vcpu->arch.regs, sizeof ctxt->regs);
4888         }
4889
4890 restart:
4891         r = x86_emulate_insn(ctxt);
4892
4893         if (r == EMULATION_INTERCEPTED)
4894                 return EMULATE_DONE;
4895
4896         if (r == EMULATION_FAILED) {
4897                 if (reexecute_instruction(vcpu, cr2))
4898                         return EMULATE_DONE;
4899
4900                 return handle_emulation_failure(vcpu);
4901         }
4902
4903         if (ctxt->have_exception) {
4904                 inject_emulated_exception(vcpu);
4905                 r = EMULATE_DONE;
4906         } else if (vcpu->arch.pio.count) {
4907                 if (!vcpu->arch.pio.in)
4908                         vcpu->arch.pio.count = 0;
4909                 else
4910                         writeback = false;
4911                 r = EMULATE_DO_MMIO;
4912         } else if (vcpu->mmio_needed) {
4913                 if (!vcpu->mmio_is_write)
4914                         writeback = false;
4915                 r = EMULATE_DO_MMIO;
4916         } else if (r == EMULATION_RESTART)
4917                 goto restart;
4918         else
4919                 r = EMULATE_DONE;
4920
4921         if (writeback) {
4922                 toggle_interruptibility(vcpu, ctxt->interruptibility);
4923                 kvm_set_rflags(vcpu, ctxt->eflags);
4924                 kvm_make_request(KVM_REQ_EVENT, vcpu);
4925                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
4926                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
4927                 kvm_rip_write(vcpu, ctxt->eip);
4928         } else
4929                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
4930
4931         return r;
4932 }
4933 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4934
4935 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4936 {
4937         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4938         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
4939                                             size, port, &val, 1);
4940         /* do not return to emulator after return from userspace */
4941         vcpu->arch.pio.count = 0;
4942         return ret;
4943 }
4944 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4945
4946 static void tsc_bad(void *info)
4947 {
4948         __this_cpu_write(cpu_tsc_khz, 0);
4949 }
4950
4951 static void tsc_khz_changed(void *data)
4952 {
4953         struct cpufreq_freqs *freq = data;
4954         unsigned long khz = 0;
4955
4956         if (data)
4957                 khz = freq->new;
4958         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4959                 khz = cpufreq_quick_get(raw_smp_processor_id());
4960         if (!khz)
4961                 khz = tsc_khz;
4962         __this_cpu_write(cpu_tsc_khz, khz);
4963 }
4964
4965 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4966                                      void *data)
4967 {
4968         struct cpufreq_freqs *freq = data;
4969         struct kvm *kvm;
4970         struct kvm_vcpu *vcpu;
4971         int i, send_ipi = 0;
4972
4973         /*
4974          * We allow guests to temporarily run on slowing clocks,
4975          * provided we notify them after, or to run on accelerating
4976          * clocks, provided we notify them before.  Thus time never
4977          * goes backwards.
4978          *
4979          * However, we have a problem.  We can't atomically update
4980          * the frequency of a given CPU from this function; it is
4981          * merely a notifier, which can be called from any CPU.
4982          * Changing the TSC frequency at arbitrary points in time
4983          * requires a recomputation of local variables related to
4984          * the TSC for each VCPU.  We must flag these local variables
4985          * to be updated and be sure the update takes place with the
4986          * new frequency before any guests proceed.
4987          *
4988          * Unfortunately, the combination of hotplug CPU and frequency
4989          * change creates an intractable locking scenario; the order
4990          * of when these callouts happen is undefined with respect to
4991          * CPU hotplug, and they can race with each other.  As such,
4992          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4993          * undefined; you can actually have a CPU frequency change take
4994          * place in between the computation of X and the setting of the
4995          * variable.  To protect against this problem, all updates of
4996          * the per_cpu tsc_khz variable are done in an interrupt
4997          * protected IPI, and all callers wishing to update the value
4998          * must wait for a synchronous IPI to complete (which is trivial
4999          * if the caller is on the CPU already).  This establishes the
5000          * necessary total order on variable updates.
5001          *
5002          * Note that because a guest time update may take place
5003          * anytime after the setting of the VCPU's request bit, the
5004          * correct TSC value must be set before the request.  However,
5005          * to ensure the update actually makes it to any guest which
5006          * starts running in hardware virtualization between the set
5007          * and the acquisition of the spinlock, we must also ping the
5008          * CPU after setting the request bit.
5009          *
5010          */
5011
5012         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5013                 return 0;
5014         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5015                 return 0;
5016
5017         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5018
5019         raw_spin_lock(&kvm_lock);
5020         list_for_each_entry(kvm, &vm_list, vm_list) {
5021                 kvm_for_each_vcpu(i, vcpu, kvm) {
5022                         if (vcpu->cpu != freq->cpu)
5023                                 continue;
5024                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5025                         if (vcpu->cpu != smp_processor_id())
5026                                 send_ipi = 1;
5027                 }
5028         }
5029         raw_spin_unlock(&kvm_lock);
5030
5031         if (freq->old < freq->new && send_ipi) {
5032                 /*
5033                  * We upscale the frequency.  Must make the guest
5034                  * doesn't see old kvmclock values while running with
5035                  * the new frequency, otherwise we risk the guest sees
5036                  * time go backwards.
5037                  *
5038                  * In case we update the frequency for another cpu
5039                  * (which might be in guest context) send an interrupt
5040                  * to kick the cpu out of guest context.  Next time
5041                  * guest context is entered kvmclock will be updated,
5042                  * so the guest will not see stale values.
5043                  */
5044                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5045         }
5046         return 0;
5047 }
5048
5049 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5050         .notifier_call  = kvmclock_cpufreq_notifier
5051 };
5052
5053 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5054                                         unsigned long action, void *hcpu)
5055 {
5056         unsigned int cpu = (unsigned long)hcpu;
5057
5058         switch (action) {
5059                 case CPU_ONLINE:
5060                 case CPU_DOWN_FAILED:
5061                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5062                         break;
5063                 case CPU_DOWN_PREPARE:
5064                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5065                         break;
5066         }
5067         return NOTIFY_OK;
5068 }
5069
5070 static struct notifier_block kvmclock_cpu_notifier_block = {
5071         .notifier_call  = kvmclock_cpu_notifier,
5072         .priority = -INT_MAX
5073 };
5074
5075 static void kvm_timer_init(void)
5076 {
5077         int cpu;
5078
5079         max_tsc_khz = tsc_khz;
5080         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5081         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5082 #ifdef CONFIG_CPU_FREQ
5083                 struct cpufreq_policy policy;
5084                 memset(&policy, 0, sizeof(policy));
5085                 cpu = get_cpu();
5086                 cpufreq_get_policy(&policy, cpu);
5087                 if (policy.cpuinfo.max_freq)
5088                         max_tsc_khz = policy.cpuinfo.max_freq;
5089                 put_cpu();
5090 #endif
5091                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5092                                           CPUFREQ_TRANSITION_NOTIFIER);
5093         }
5094         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5095         for_each_online_cpu(cpu)
5096                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5097 }
5098
5099 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5100
5101 static int kvm_is_in_guest(void)
5102 {
5103         return percpu_read(current_vcpu) != NULL;
5104 }
5105
5106 static int kvm_is_user_mode(void)
5107 {
5108         int user_mode = 3;
5109
5110         if (percpu_read(current_vcpu))
5111                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
5112
5113         return user_mode != 0;
5114 }
5115
5116 static unsigned long kvm_get_guest_ip(void)
5117 {
5118         unsigned long ip = 0;
5119
5120         if (percpu_read(current_vcpu))
5121                 ip = kvm_rip_read(percpu_read(current_vcpu));
5122
5123         return ip;
5124 }
5125
5126 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5127         .is_in_guest            = kvm_is_in_guest,
5128         .is_user_mode           = kvm_is_user_mode,
5129         .get_guest_ip           = kvm_get_guest_ip,
5130 };
5131
5132 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5133 {
5134         percpu_write(current_vcpu, vcpu);
5135 }
5136 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5137
5138 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5139 {
5140         percpu_write(current_vcpu, NULL);
5141 }
5142 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5143
5144 static void kvm_set_mmio_spte_mask(void)
5145 {
5146         u64 mask;
5147         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5148
5149         /*
5150          * Set the reserved bits and the present bit of an paging-structure
5151          * entry to generate page fault with PFER.RSV = 1.
5152          */
5153         mask = ((1ull << (62 - maxphyaddr + 1)) - 1) << maxphyaddr;
5154         mask |= 1ull;
5155
5156 #ifdef CONFIG_X86_64
5157         /*
5158          * If reserved bit is not supported, clear the present bit to disable
5159          * mmio page fault.
5160          */
5161         if (maxphyaddr == 52)
5162                 mask &= ~1ull;
5163 #endif
5164
5165         kvm_mmu_set_mmio_spte_mask(mask);
5166 }
5167
5168 int kvm_arch_init(void *opaque)
5169 {
5170         int r;
5171         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
5172
5173         if (kvm_x86_ops) {
5174                 printk(KERN_ERR "kvm: already loaded the other module\n");
5175                 r = -EEXIST;
5176                 goto out;
5177         }
5178
5179         if (!ops->cpu_has_kvm_support()) {
5180                 printk(KERN_ERR "kvm: no hardware support\n");
5181                 r = -EOPNOTSUPP;
5182                 goto out;
5183         }
5184         if (ops->disabled_by_bios()) {
5185                 printk(KERN_ERR "kvm: disabled by bios\n");
5186                 r = -EOPNOTSUPP;
5187                 goto out;
5188         }
5189
5190         r = kvm_mmu_module_init();
5191         if (r)
5192                 goto out;
5193
5194         kvm_set_mmio_spte_mask();
5195         kvm_init_msr_list();
5196
5197         kvm_x86_ops = ops;
5198         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5199                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5200
5201         kvm_timer_init();
5202
5203         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5204
5205         if (cpu_has_xsave)
5206                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5207
5208         return 0;
5209
5210 out:
5211         return r;
5212 }
5213
5214 void kvm_arch_exit(void)
5215 {
5216         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5217
5218         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5219                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5220                                             CPUFREQ_TRANSITION_NOTIFIER);
5221         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5222         kvm_x86_ops = NULL;
5223         kvm_mmu_module_exit();
5224 }
5225
5226 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5227 {
5228         ++vcpu->stat.halt_exits;
5229         if (irqchip_in_kernel(vcpu->kvm)) {
5230                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5231                 return 1;
5232         } else {
5233                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5234                 return 0;
5235         }
5236 }
5237 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5238
5239 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
5240                            unsigned long a1)
5241 {
5242         if (is_long_mode(vcpu))
5243                 return a0;
5244         else
5245                 return a0 | ((gpa_t)a1 << 32);
5246 }
5247
5248 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
5249 {
5250         u64 param, ingpa, outgpa, ret;
5251         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
5252         bool fast, longmode;
5253         int cs_db, cs_l;
5254
5255         /*
5256          * hypercall generates UD from non zero cpl and real mode
5257          * per HYPER-V spec
5258          */
5259         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
5260                 kvm_queue_exception(vcpu, UD_VECTOR);
5261                 return 0;
5262         }
5263
5264         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5265         longmode = is_long_mode(vcpu) && cs_l == 1;
5266
5267         if (!longmode) {
5268                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
5269                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
5270                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
5271                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
5272                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
5273                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
5274         }
5275 #ifdef CONFIG_X86_64
5276         else {
5277                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
5278                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
5279                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
5280         }
5281 #endif
5282
5283         code = param & 0xffff;
5284         fast = (param >> 16) & 0x1;
5285         rep_cnt = (param >> 32) & 0xfff;
5286         rep_idx = (param >> 48) & 0xfff;
5287
5288         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
5289
5290         switch (code) {
5291         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
5292                 kvm_vcpu_on_spin(vcpu);
5293                 break;
5294         default:
5295                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
5296                 break;
5297         }
5298
5299         ret = res | (((u64)rep_done & 0xfff) << 32);
5300         if (longmode) {
5301                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5302         } else {
5303                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
5304                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
5305         }
5306
5307         return 1;
5308 }
5309
5310 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5311 {
5312         unsigned long nr, a0, a1, a2, a3, ret;
5313         int r = 1;
5314
5315         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5316                 return kvm_hv_hypercall(vcpu);
5317
5318         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5319         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5320         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5321         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5322         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5323
5324         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5325
5326         if (!is_long_mode(vcpu)) {
5327                 nr &= 0xFFFFFFFF;
5328                 a0 &= 0xFFFFFFFF;
5329                 a1 &= 0xFFFFFFFF;
5330                 a2 &= 0xFFFFFFFF;
5331                 a3 &= 0xFFFFFFFF;
5332         }
5333
5334         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5335                 ret = -KVM_EPERM;
5336                 goto out;
5337         }
5338
5339         switch (nr) {
5340         case KVM_HC_VAPIC_POLL_IRQ:
5341                 ret = 0;
5342                 break;
5343         case KVM_HC_MMU_OP:
5344                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
5345                 break;
5346         default:
5347                 ret = -KVM_ENOSYS;
5348                 break;
5349         }
5350 out:
5351         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5352         ++vcpu->stat.hypercalls;
5353         return r;
5354 }
5355 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5356
5357 int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5358 {
5359         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5360         char instruction[3];
5361         unsigned long rip = kvm_rip_read(vcpu);
5362
5363         /*
5364          * Blow out the MMU to ensure that no other VCPU has an active mapping
5365          * to ensure that the updated hypercall appears atomically across all
5366          * VCPUs.
5367          */
5368         kvm_mmu_zap_all(vcpu->kvm);
5369
5370         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5371
5372         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5373 }
5374
5375 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
5376 {
5377         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
5378         int j, nent = vcpu->arch.cpuid_nent;
5379
5380         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
5381         /* when no next entry is found, the current entry[i] is reselected */
5382         for (j = i + 1; ; j = (j + 1) % nent) {
5383                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
5384                 if (ej->function == e->function) {
5385                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
5386                         return j;
5387                 }
5388         }
5389         return 0; /* silence gcc, even though control never reaches here */
5390 }
5391
5392 /* find an entry with matching function, matching index (if needed), and that
5393  * should be read next (if it's stateful) */
5394 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
5395         u32 function, u32 index)
5396 {
5397         if (e->function != function)
5398                 return 0;
5399         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
5400                 return 0;
5401         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
5402             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
5403                 return 0;
5404         return 1;
5405 }
5406
5407 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
5408                                               u32 function, u32 index)
5409 {
5410         int i;
5411         struct kvm_cpuid_entry2 *best = NULL;
5412
5413         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
5414                 struct kvm_cpuid_entry2 *e;
5415
5416                 e = &vcpu->arch.cpuid_entries[i];
5417                 if (is_matching_cpuid_entry(e, function, index)) {
5418                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
5419                                 move_to_next_stateful_cpuid_entry(vcpu, i);
5420                         best = e;
5421                         break;
5422                 }
5423         }
5424         return best;
5425 }
5426 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
5427
5428 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
5429 {
5430         struct kvm_cpuid_entry2 *best;
5431
5432         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
5433         if (!best || best->eax < 0x80000008)
5434                 goto not_found;
5435         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
5436         if (best)
5437                 return best->eax & 0xff;
5438 not_found:
5439         return 36;
5440 }
5441
5442 /*
5443  * If no match is found, check whether we exceed the vCPU's limit
5444  * and return the content of the highest valid _standard_ leaf instead.
5445  * This is to satisfy the CPUID specification.
5446  */
5447 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
5448                                                   u32 function, u32 index)
5449 {
5450         struct kvm_cpuid_entry2 *maxlevel;
5451
5452         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
5453         if (!maxlevel || maxlevel->eax >= function)
5454                 return NULL;
5455         if (function & 0x80000000) {
5456                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
5457                 if (!maxlevel)
5458                         return NULL;
5459         }
5460         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5461 }
5462
5463 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5464 {
5465         u32 function, index;
5466         struct kvm_cpuid_entry2 *best;
5467
5468         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5469         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5470         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5471         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5472         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5473         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5474         best = kvm_find_cpuid_entry(vcpu, function, index);
5475
5476         if (!best)
5477                 best = check_cpuid_limit(vcpu, function, index);
5478
5479         if (best) {
5480                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5481                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5482                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5483                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5484         }
5485         kvm_x86_ops->skip_emulated_instruction(vcpu);
5486         trace_kvm_cpuid(function,
5487                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5488                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5489                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5490                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5491 }
5492 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5493
5494 /*
5495  * Check if userspace requested an interrupt window, and that the
5496  * interrupt window is open.
5497  *
5498  * No need to exit to userspace if we already have an interrupt queued.
5499  */
5500 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5501 {
5502         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5503                 vcpu->run->request_interrupt_window &&
5504                 kvm_arch_interrupt_allowed(vcpu));
5505 }
5506
5507 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5508 {
5509         struct kvm_run *kvm_run = vcpu->run;
5510
5511         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5512         kvm_run->cr8 = kvm_get_cr8(vcpu);
5513         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5514         if (irqchip_in_kernel(vcpu->kvm))
5515                 kvm_run->ready_for_interrupt_injection = 1;
5516         else
5517                 kvm_run->ready_for_interrupt_injection =
5518                         kvm_arch_interrupt_allowed(vcpu) &&
5519                         !kvm_cpu_has_interrupt(vcpu) &&
5520                         !kvm_event_needs_reinjection(vcpu);
5521 }
5522
5523 static void vapic_enter(struct kvm_vcpu *vcpu)
5524 {
5525         struct kvm_lapic *apic = vcpu->arch.apic;
5526         struct page *page;
5527
5528         if (!apic || !apic->vapic_addr)
5529                 return;
5530
5531         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5532
5533         vcpu->arch.apic->vapic_page = page;
5534 }
5535
5536 static void vapic_exit(struct kvm_vcpu *vcpu)
5537 {
5538         struct kvm_lapic *apic = vcpu->arch.apic;
5539         int idx;
5540
5541         if (!apic || !apic->vapic_addr)
5542                 return;
5543
5544         idx = srcu_read_lock(&vcpu->kvm->srcu);
5545         kvm_release_page_dirty(apic->vapic_page);
5546         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5547         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5548 }
5549
5550 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5551 {
5552         int max_irr, tpr;
5553
5554         if (!kvm_x86_ops->update_cr8_intercept)
5555                 return;
5556
5557         if (!vcpu->arch.apic)
5558                 return;
5559
5560         if (!vcpu->arch.apic->vapic_addr)
5561                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5562         else
5563                 max_irr = -1;
5564
5565         if (max_irr != -1)
5566                 max_irr >>= 4;
5567
5568         tpr = kvm_lapic_get_cr8(vcpu);
5569
5570         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5571 }
5572
5573 static void inject_pending_event(struct kvm_vcpu *vcpu)
5574 {
5575         /* try to reinject previous events if any */
5576         if (vcpu->arch.exception.pending) {
5577                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5578                                         vcpu->arch.exception.has_error_code,
5579                                         vcpu->arch.exception.error_code);
5580                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5581                                           vcpu->arch.exception.has_error_code,
5582                                           vcpu->arch.exception.error_code,
5583                                           vcpu->arch.exception.reinject);
5584                 return;
5585         }
5586
5587         if (vcpu->arch.nmi_injected) {
5588                 kvm_x86_ops->set_nmi(vcpu);
5589                 return;
5590         }
5591
5592         if (vcpu->arch.interrupt.pending) {
5593                 kvm_x86_ops->set_irq(vcpu);
5594                 return;
5595         }
5596
5597         /* try to inject new event if pending */
5598         if (vcpu->arch.nmi_pending) {
5599                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5600                         --vcpu->arch.nmi_pending;
5601                         vcpu->arch.nmi_injected = true;
5602                         kvm_x86_ops->set_nmi(vcpu);
5603                 }
5604         } else if (kvm_cpu_has_interrupt(vcpu)) {
5605                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5606                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5607                                             false);
5608                         kvm_x86_ops->set_irq(vcpu);
5609                 }
5610         }
5611 }
5612
5613 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5614 {
5615         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5616                         !vcpu->guest_xcr0_loaded) {
5617                 /* kvm_set_xcr() also depends on this */
5618                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5619                 vcpu->guest_xcr0_loaded = 1;
5620         }
5621 }
5622
5623 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5624 {
5625         if (vcpu->guest_xcr0_loaded) {
5626                 if (vcpu->arch.xcr0 != host_xcr0)
5627                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5628                 vcpu->guest_xcr0_loaded = 0;
5629         }
5630 }
5631
5632 static void process_nmi(struct kvm_vcpu *vcpu)
5633 {
5634         unsigned limit = 2;
5635
5636         /*
5637          * x86 is limited to one NMI running, and one NMI pending after it.
5638          * If an NMI is already in progress, limit further NMIs to just one.
5639          * Otherwise, allow two (and we'll inject the first one immediately).
5640          */
5641         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5642                 limit = 1;
5643
5644         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5645         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5646         kvm_make_request(KVM_REQ_EVENT, vcpu);
5647 }
5648
5649 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5650 {
5651         int r;
5652         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5653                 vcpu->run->request_interrupt_window;
5654
5655         if (vcpu->requests) {
5656                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5657                         kvm_mmu_unload(vcpu);
5658                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5659                         __kvm_migrate_timers(vcpu);
5660                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5661                         r = kvm_guest_time_update(vcpu);
5662                         if (unlikely(r))
5663                                 goto out;
5664                 }
5665                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5666                         kvm_mmu_sync_roots(vcpu);
5667                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5668                         kvm_x86_ops->tlb_flush(vcpu);
5669                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5670                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5671                         r = 0;
5672                         goto out;
5673                 }
5674                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5675                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5676                         r = 0;
5677                         goto out;
5678                 }
5679                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5680                         vcpu->fpu_active = 0;
5681                         kvm_x86_ops->fpu_deactivate(vcpu);
5682                 }
5683                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5684                         /* Page is swapped out. Do synthetic halt */
5685                         vcpu->arch.apf.halted = true;
5686                         r = 1;
5687                         goto out;
5688                 }
5689                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
5690                         record_steal_time(vcpu);
5691                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5692                         process_nmi(vcpu);
5693
5694         }
5695
5696         r = kvm_mmu_reload(vcpu);
5697         if (unlikely(r))
5698                 goto out;
5699
5700         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5701                 inject_pending_event(vcpu);
5702
5703                 /* enable NMI/IRQ window open exits if needed */
5704                 if (vcpu->arch.nmi_pending)
5705                         kvm_x86_ops->enable_nmi_window(vcpu);
5706                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5707                         kvm_x86_ops->enable_irq_window(vcpu);
5708
5709                 if (kvm_lapic_enabled(vcpu)) {
5710                         update_cr8_intercept(vcpu);
5711                         kvm_lapic_sync_to_vapic(vcpu);
5712                 }
5713         }
5714
5715         preempt_disable();
5716
5717         kvm_x86_ops->prepare_guest_switch(vcpu);
5718         if (vcpu->fpu_active)
5719                 kvm_load_guest_fpu(vcpu);
5720         kvm_load_guest_xcr0(vcpu);
5721
5722         vcpu->mode = IN_GUEST_MODE;
5723
5724         /* We should set ->mode before check ->requests,
5725          * see the comment in make_all_cpus_request.
5726          */
5727         smp_mb();
5728
5729         local_irq_disable();
5730
5731         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5732             || need_resched() || signal_pending(current)) {
5733                 vcpu->mode = OUTSIDE_GUEST_MODE;
5734                 smp_wmb();
5735                 local_irq_enable();
5736                 preempt_enable();
5737                 kvm_x86_ops->cancel_injection(vcpu);
5738                 r = 1;
5739                 goto out;
5740         }
5741
5742         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5743
5744         kvm_guest_enter();
5745
5746         if (unlikely(vcpu->arch.switch_db_regs)) {
5747                 set_debugreg(0, 7);
5748                 set_debugreg(vcpu->arch.eff_db[0], 0);
5749                 set_debugreg(vcpu->arch.eff_db[1], 1);
5750                 set_debugreg(vcpu->arch.eff_db[2], 2);
5751                 set_debugreg(vcpu->arch.eff_db[3], 3);
5752         }
5753
5754         trace_kvm_entry(vcpu->vcpu_id);
5755         kvm_x86_ops->run(vcpu);
5756
5757         /*
5758          * If the guest has used debug registers, at least dr7
5759          * will be disabled while returning to the host.
5760          * If we don't have active breakpoints in the host, we don't
5761          * care about the messed up debug address registers. But if
5762          * we have some of them active, restore the old state.
5763          */
5764         if (hw_breakpoint_active())
5765                 hw_breakpoint_restore();
5766
5767         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu);
5768
5769         vcpu->mode = OUTSIDE_GUEST_MODE;
5770         smp_wmb();
5771         local_irq_enable();
5772
5773         ++vcpu->stat.exits;
5774
5775         /*
5776          * We must have an instruction between local_irq_enable() and
5777          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5778          * the interrupt shadow.  The stat.exits increment will do nicely.
5779          * But we need to prevent reordering, hence this barrier():
5780          */
5781         barrier();
5782
5783         kvm_guest_exit();
5784
5785         preempt_enable();
5786
5787         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5788
5789         /*
5790          * Profile KVM exit RIPs:
5791          */
5792         if (unlikely(prof_on == KVM_PROFILING)) {
5793                 unsigned long rip = kvm_rip_read(vcpu);
5794                 profile_hit(KVM_PROFILING, (void *)rip);
5795         }
5796
5797
5798         kvm_lapic_sync_from_vapic(vcpu);
5799
5800         r = kvm_x86_ops->handle_exit(vcpu);
5801 out:
5802         return r;
5803 }
5804
5805
5806 static int __vcpu_run(struct kvm_vcpu *vcpu)
5807 {
5808         int r;
5809         struct kvm *kvm = vcpu->kvm;
5810
5811         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5812                 pr_debug("vcpu %d received sipi with vector # %x\n",
5813                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5814                 kvm_lapic_reset(vcpu);
5815                 r = kvm_arch_vcpu_reset(vcpu);
5816                 if (r)
5817                         return r;
5818                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5819         }
5820
5821         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5822         vapic_enter(vcpu);
5823
5824         r = 1;
5825         while (r > 0) {
5826                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5827                     !vcpu->arch.apf.halted)
5828                         r = vcpu_enter_guest(vcpu);
5829                 else {
5830                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5831                         kvm_vcpu_block(vcpu);
5832                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5833                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5834                         {
5835                                 switch(vcpu->arch.mp_state) {
5836                                 case KVM_MP_STATE_HALTED:
5837                                         vcpu->arch.mp_state =
5838                                                 KVM_MP_STATE_RUNNABLE;
5839                                 case KVM_MP_STATE_RUNNABLE:
5840                                         vcpu->arch.apf.halted = false;
5841                                         break;
5842                                 case KVM_MP_STATE_SIPI_RECEIVED:
5843                                 default:
5844                                         r = -EINTR;
5845                                         break;
5846                                 }
5847                         }
5848                 }
5849
5850                 if (r <= 0)
5851                         break;
5852
5853                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5854                 if (kvm_cpu_has_pending_timer(vcpu))
5855                         kvm_inject_pending_timer_irqs(vcpu);
5856
5857                 if (dm_request_for_irq_injection(vcpu)) {
5858                         r = -EINTR;
5859                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5860                         ++vcpu->stat.request_irq_exits;
5861                 }
5862
5863                 kvm_check_async_pf_completion(vcpu);
5864
5865                 if (signal_pending(current)) {
5866                         r = -EINTR;
5867                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5868                         ++vcpu->stat.signal_exits;
5869                 }
5870                 if (need_resched()) {
5871                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5872                         kvm_resched(vcpu);
5873                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5874                 }
5875         }
5876
5877         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5878
5879         vapic_exit(vcpu);
5880
5881         return r;
5882 }
5883
5884 static int complete_mmio(struct kvm_vcpu *vcpu)
5885 {
5886         struct kvm_run *run = vcpu->run;
5887         int r;
5888
5889         if (!(vcpu->arch.pio.count || vcpu->mmio_needed))
5890                 return 1;
5891
5892         if (vcpu->mmio_needed) {
5893                 vcpu->mmio_needed = 0;
5894                 if (!vcpu->mmio_is_write)
5895                         memcpy(vcpu->mmio_data + vcpu->mmio_index,
5896                                run->mmio.data, 8);
5897                 vcpu->mmio_index += 8;
5898                 if (vcpu->mmio_index < vcpu->mmio_size) {
5899                         run->exit_reason = KVM_EXIT_MMIO;
5900                         run->mmio.phys_addr = vcpu->mmio_phys_addr + vcpu->mmio_index;
5901                         memcpy(run->mmio.data, vcpu->mmio_data + vcpu->mmio_index, 8);
5902                         run->mmio.len = min(vcpu->mmio_size - vcpu->mmio_index, 8);
5903                         run->mmio.is_write = vcpu->mmio_is_write;
5904                         vcpu->mmio_needed = 1;
5905                         return 0;
5906                 }
5907                 if (vcpu->mmio_is_write)
5908                         return 1;
5909                 vcpu->mmio_read_completed = 1;
5910         }
5911         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5912         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5913         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5914         if (r != EMULATE_DONE)
5915                 return 0;
5916         return 1;
5917 }
5918
5919 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5920 {
5921         int r;
5922         sigset_t sigsaved;
5923
5924         if (!tsk_used_math(current) && init_fpu(current))
5925                 return -ENOMEM;
5926
5927         if (vcpu->sigset_active)
5928                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5929
5930         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5931                 kvm_vcpu_block(vcpu);
5932                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5933                 r = -EAGAIN;
5934                 goto out;
5935         }
5936
5937         /* re-sync apic's tpr */
5938         if (!irqchip_in_kernel(vcpu->kvm)) {
5939                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5940                         r = -EINVAL;
5941                         goto out;
5942                 }
5943         }
5944
5945         r = complete_mmio(vcpu);
5946         if (r <= 0)
5947                 goto out;
5948
5949         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5950                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5951                                      kvm_run->hypercall.ret);
5952
5953         r = __vcpu_run(vcpu);
5954
5955 out:
5956         post_kvm_run_save(vcpu);
5957         if (vcpu->sigset_active)
5958                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5959
5960         return r;
5961 }
5962
5963 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5964 {
5965         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
5966                 /*
5967                  * We are here if userspace calls get_regs() in the middle of
5968                  * instruction emulation. Registers state needs to be copied
5969                  * back from emulation context to vcpu. Usrapace shouldn't do
5970                  * that usually, but some bad designed PV devices (vmware
5971                  * backdoor interface) need this to work
5972                  */
5973                 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5974                 memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
5975                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5976         }
5977         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5978         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5979         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5980         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5981         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5982         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5983         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5984         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5985 #ifdef CONFIG_X86_64
5986         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5987         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5988         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5989         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5990         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5991         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5992         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5993         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5994 #endif
5995
5996         regs->rip = kvm_rip_read(vcpu);
5997         regs->rflags = kvm_get_rflags(vcpu);
5998
5999         return 0;
6000 }
6001
6002 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6003 {
6004         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6005         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6006
6007         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6008         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6009         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6010         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6011         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6012         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6013         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6014         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6015 #ifdef CONFIG_X86_64
6016         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6017         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6018         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6019         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6020         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6021         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6022         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6023         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6024 #endif
6025
6026         kvm_rip_write(vcpu, regs->rip);
6027         kvm_set_rflags(vcpu, regs->rflags);
6028
6029         vcpu->arch.exception.pending = false;
6030
6031         kvm_make_request(KVM_REQ_EVENT, vcpu);
6032
6033         return 0;
6034 }
6035
6036 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6037 {
6038         struct kvm_segment cs;
6039
6040         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6041         *db = cs.db;
6042         *l = cs.l;
6043 }
6044 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6045
6046 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6047                                   struct kvm_sregs *sregs)
6048 {
6049         struct desc_ptr dt;
6050
6051         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6052         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6053         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6054         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6055         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6056         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6057
6058         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6059         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6060
6061         kvm_x86_ops->get_idt(vcpu, &dt);
6062         sregs->idt.limit = dt.size;
6063         sregs->idt.base = dt.address;
6064         kvm_x86_ops->get_gdt(vcpu, &dt);
6065         sregs->gdt.limit = dt.size;
6066         sregs->gdt.base = dt.address;
6067
6068         sregs->cr0 = kvm_read_cr0(vcpu);
6069         sregs->cr2 = vcpu->arch.cr2;
6070         sregs->cr3 = kvm_read_cr3(vcpu);
6071         sregs->cr4 = kvm_read_cr4(vcpu);
6072         sregs->cr8 = kvm_get_cr8(vcpu);
6073         sregs->efer = vcpu->arch.efer;
6074         sregs->apic_base = kvm_get_apic_base(vcpu);
6075
6076         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6077
6078         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6079                 set_bit(vcpu->arch.interrupt.nr,
6080                         (unsigned long *)sregs->interrupt_bitmap);
6081
6082         return 0;
6083 }
6084
6085 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6086                                     struct kvm_mp_state *mp_state)
6087 {
6088         mp_state->mp_state = vcpu->arch.mp_state;
6089         return 0;
6090 }
6091
6092 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6093                                     struct kvm_mp_state *mp_state)
6094 {
6095         vcpu->arch.mp_state = mp_state->mp_state;
6096         kvm_make_request(KVM_REQ_EVENT, vcpu);
6097         return 0;
6098 }
6099
6100 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
6101                     bool has_error_code, u32 error_code)
6102 {
6103         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6104         int ret;
6105
6106         init_emulate_ctxt(vcpu);
6107
6108         ret = emulator_task_switch(ctxt, tss_selector, reason,
6109                                    has_error_code, error_code);
6110
6111         if (ret)
6112                 return EMULATE_FAIL;
6113
6114         memcpy(vcpu->arch.regs, ctxt->regs, sizeof ctxt->regs);
6115         kvm_rip_write(vcpu, ctxt->eip);
6116         kvm_set_rflags(vcpu, ctxt->eflags);
6117         kvm_make_request(KVM_REQ_EVENT, vcpu);
6118         return EMULATE_DONE;
6119 }
6120 EXPORT_SYMBOL_GPL(kvm_task_switch);
6121
6122 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6123                                   struct kvm_sregs *sregs)
6124 {
6125         int mmu_reset_needed = 0;
6126         int pending_vec, max_bits, idx;
6127         struct desc_ptr dt;
6128
6129         dt.size = sregs->idt.limit;
6130         dt.address = sregs->idt.base;
6131         kvm_x86_ops->set_idt(vcpu, &dt);
6132         dt.size = sregs->gdt.limit;
6133         dt.address = sregs->gdt.base;
6134         kvm_x86_ops->set_gdt(vcpu, &dt);
6135
6136         vcpu->arch.cr2 = sregs->cr2;
6137         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6138         vcpu->arch.cr3 = sregs->cr3;
6139         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6140
6141         kvm_set_cr8(vcpu, sregs->cr8);
6142
6143         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6144         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6145         kvm_set_apic_base(vcpu, sregs->apic_base);
6146
6147         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6148         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6149         vcpu->arch.cr0 = sregs->cr0;
6150
6151         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6152         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6153         if (sregs->cr4 & X86_CR4_OSXSAVE)
6154                 update_cpuid(vcpu);
6155
6156         idx = srcu_read_lock(&vcpu->kvm->srcu);
6157         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6158                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6159                 mmu_reset_needed = 1;
6160         }
6161         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6162
6163         if (mmu_reset_needed)
6164                 kvm_mmu_reset_context(vcpu);
6165
6166         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
6167         pending_vec = find_first_bit(
6168                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6169         if (pending_vec < max_bits) {
6170                 kvm_queue_interrupt(vcpu, pending_vec, false);
6171                 pr_debug("Set back pending irq %d\n", pending_vec);
6172         }
6173
6174         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6175         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6176         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6177         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6178         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6179         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6180
6181         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6182         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6183
6184         update_cr8_intercept(vcpu);
6185
6186         /* Older userspace won't unhalt the vcpu on reset. */
6187         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6188             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6189             !is_protmode(vcpu))
6190                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6191
6192         kvm_make_request(KVM_REQ_EVENT, vcpu);
6193
6194         return 0;
6195 }
6196
6197 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6198                                         struct kvm_guest_debug *dbg)
6199 {
6200         unsigned long rflags;
6201         int i, r;
6202
6203         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6204                 r = -EBUSY;
6205                 if (vcpu->arch.exception.pending)
6206                         goto out;
6207                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6208                         kvm_queue_exception(vcpu, DB_VECTOR);
6209                 else
6210                         kvm_queue_exception(vcpu, BP_VECTOR);
6211         }
6212
6213         /*
6214          * Read rflags as long as potentially injected trace flags are still
6215          * filtered out.
6216          */
6217         rflags = kvm_get_rflags(vcpu);
6218
6219         vcpu->guest_debug = dbg->control;
6220         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6221                 vcpu->guest_debug = 0;
6222
6223         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6224                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6225                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6226                 vcpu->arch.switch_db_regs =
6227                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
6228         } else {
6229                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6230                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6231                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
6232         }
6233
6234         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6235                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6236                         get_segment_base(vcpu, VCPU_SREG_CS);
6237
6238         /*
6239          * Trigger an rflags update that will inject or remove the trace
6240          * flags.
6241          */
6242         kvm_set_rflags(vcpu, rflags);
6243
6244         kvm_x86_ops->set_guest_debug(vcpu, dbg);
6245
6246         r = 0;
6247
6248 out:
6249
6250         return r;
6251 }
6252
6253 /*
6254  * Translate a guest virtual address to a guest physical address.
6255  */
6256 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6257                                     struct kvm_translation *tr)
6258 {
6259         unsigned long vaddr = tr->linear_address;
6260         gpa_t gpa;
6261         int idx;
6262
6263         idx = srcu_read_lock(&vcpu->kvm->srcu);
6264         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6265         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6266         tr->physical_address = gpa;
6267         tr->valid = gpa != UNMAPPED_GVA;
6268         tr->writeable = 1;
6269         tr->usermode = 0;
6270
6271         return 0;
6272 }
6273
6274 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6275 {
6276         struct i387_fxsave_struct *fxsave =
6277                         &vcpu->arch.guest_fpu.state->fxsave;
6278
6279         memcpy(fpu->fpr, fxsave->st_space, 128);
6280         fpu->fcw = fxsave->cwd;
6281         fpu->fsw = fxsave->swd;
6282         fpu->ftwx = fxsave->twd;
6283         fpu->last_opcode = fxsave->fop;
6284         fpu->last_ip = fxsave->rip;
6285         fpu->last_dp = fxsave->rdp;
6286         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6287
6288         return 0;
6289 }
6290
6291 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6292 {
6293         struct i387_fxsave_struct *fxsave =
6294                         &vcpu->arch.guest_fpu.state->fxsave;
6295
6296         memcpy(fxsave->st_space, fpu->fpr, 128);
6297         fxsave->cwd = fpu->fcw;
6298         fxsave->swd = fpu->fsw;
6299         fxsave->twd = fpu->ftwx;
6300         fxsave->fop = fpu->last_opcode;
6301         fxsave->rip = fpu->last_ip;
6302         fxsave->rdp = fpu->last_dp;
6303         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
6304
6305         return 0;
6306 }
6307
6308 int fx_init(struct kvm_vcpu *vcpu)
6309 {
6310         int err;
6311
6312         err = fpu_alloc(&vcpu->arch.guest_fpu);
6313         if (err)
6314                 return err;
6315
6316         fpu_finit(&vcpu->arch.guest_fpu);
6317
6318         /*
6319          * Ensure guest xcr0 is valid for loading
6320          */
6321         vcpu->arch.xcr0 = XSTATE_FP;
6322
6323         vcpu->arch.cr0 |= X86_CR0_ET;
6324
6325         return 0;
6326 }
6327 EXPORT_SYMBOL_GPL(fx_init);
6328
6329 static void fx_free(struct kvm_vcpu *vcpu)
6330 {
6331         fpu_free(&vcpu->arch.guest_fpu);
6332 }
6333
6334 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
6335 {
6336         if (vcpu->guest_fpu_loaded)
6337                 return;
6338
6339         /*
6340          * Restore all possible states in the guest,
6341          * and assume host would use all available bits.
6342          * Guest xcr0 would be loaded later.
6343          */
6344         kvm_put_guest_xcr0(vcpu);
6345         vcpu->guest_fpu_loaded = 1;
6346         unlazy_fpu(current);
6347         fpu_restore_checking(&vcpu->arch.guest_fpu);
6348         trace_kvm_fpu(1);
6349 }
6350
6351 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
6352 {
6353         kvm_put_guest_xcr0(vcpu);
6354
6355         if (!vcpu->guest_fpu_loaded)
6356                 return;
6357
6358         vcpu->guest_fpu_loaded = 0;
6359         fpu_save_init(&vcpu->arch.guest_fpu);
6360         ++vcpu->stat.fpu_reload;
6361         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
6362         trace_kvm_fpu(0);
6363 }
6364
6365 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
6366 {
6367         kvmclock_reset(vcpu);
6368
6369         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
6370         fx_free(vcpu);
6371         kvm_x86_ops->vcpu_free(vcpu);
6372 }
6373
6374 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
6375                                                 unsigned int id)
6376 {
6377         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
6378                 printk_once(KERN_WARNING
6379                 "kvm: SMP vm created on host with unstable TSC; "
6380                 "guest TSC will not be reliable\n");
6381         return kvm_x86_ops->vcpu_create(kvm, id);
6382 }
6383
6384 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
6385 {
6386         int r;
6387
6388         vcpu->arch.mtrr_state.have_fixed = 1;
6389         vcpu_load(vcpu);
6390         r = kvm_arch_vcpu_reset(vcpu);
6391         if (r == 0)
6392                 r = kvm_mmu_setup(vcpu);
6393         vcpu_put(vcpu);
6394
6395         return r;
6396 }
6397
6398 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
6399 {
6400         vcpu->arch.apf.msr_val = 0;
6401
6402         vcpu_load(vcpu);
6403         kvm_mmu_unload(vcpu);
6404         vcpu_put(vcpu);
6405
6406         fx_free(vcpu);
6407         kvm_x86_ops->vcpu_free(vcpu);
6408 }
6409
6410 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
6411 {
6412         atomic_set(&vcpu->arch.nmi_queued, 0);
6413         vcpu->arch.nmi_pending = 0;
6414         vcpu->arch.nmi_injected = false;
6415
6416         vcpu->arch.switch_db_regs = 0;
6417         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
6418         vcpu->arch.dr6 = DR6_FIXED_1;
6419         vcpu->arch.dr7 = DR7_FIXED_1;
6420
6421         kvm_make_request(KVM_REQ_EVENT, vcpu);
6422         vcpu->arch.apf.msr_val = 0;
6423         vcpu->arch.st.msr_val = 0;
6424
6425         kvmclock_reset(vcpu);
6426
6427         kvm_clear_async_pf_completion_queue(vcpu);
6428         kvm_async_pf_hash_reset(vcpu);
6429         vcpu->arch.apf.halted = false;
6430
6431         return kvm_x86_ops->vcpu_reset(vcpu);
6432 }
6433
6434 int kvm_arch_hardware_enable(void *garbage)
6435 {
6436         struct kvm *kvm;
6437         struct kvm_vcpu *vcpu;
6438         int i;
6439
6440         kvm_shared_msr_cpu_online();
6441         list_for_each_entry(kvm, &vm_list, vm_list)
6442                 kvm_for_each_vcpu(i, vcpu, kvm)
6443                         if (vcpu->cpu == smp_processor_id())
6444                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6445         return kvm_x86_ops->hardware_enable(garbage);
6446 }
6447
6448 void kvm_arch_hardware_disable(void *garbage)
6449 {
6450         kvm_x86_ops->hardware_disable(garbage);
6451         drop_user_return_notifiers(garbage);
6452 }
6453
6454 int kvm_arch_hardware_setup(void)
6455 {
6456         return kvm_x86_ops->hardware_setup();
6457 }
6458
6459 void kvm_arch_hardware_unsetup(void)
6460 {
6461         kvm_x86_ops->hardware_unsetup();
6462 }
6463
6464 void kvm_arch_check_processor_compat(void *rtn)
6465 {
6466         kvm_x86_ops->check_processor_compatibility(rtn);
6467 }
6468
6469 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
6470 {
6471         struct page *page;
6472         struct kvm *kvm;
6473         int r;
6474
6475         BUG_ON(vcpu->kvm == NULL);
6476         kvm = vcpu->kvm;
6477
6478         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
6479         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
6480         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
6481         vcpu->arch.mmu.translate_gpa = translate_gpa;
6482         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
6483         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
6484                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6485         else
6486                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
6487
6488         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
6489         if (!page) {
6490                 r = -ENOMEM;
6491                 goto fail;
6492         }
6493         vcpu->arch.pio_data = page_address(page);
6494
6495         kvm_init_tsc_catchup(vcpu, max_tsc_khz);
6496
6497         r = kvm_mmu_create(vcpu);
6498         if (r < 0)
6499                 goto fail_free_pio_data;
6500
6501         if (irqchip_in_kernel(kvm)) {
6502                 r = kvm_create_lapic(vcpu);
6503                 if (r < 0)
6504                         goto fail_mmu_destroy;
6505         }
6506
6507         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
6508                                        GFP_KERNEL);
6509         if (!vcpu->arch.mce_banks) {
6510                 r = -ENOMEM;
6511                 goto fail_free_lapic;
6512         }
6513         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
6514
6515         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6516                 goto fail_free_mce_banks;
6517
6518         kvm_async_pf_hash_reset(vcpu);
6519
6520         return 0;
6521 fail_free_mce_banks:
6522         kfree(vcpu->arch.mce_banks);
6523 fail_free_lapic:
6524         kvm_free_lapic(vcpu);
6525 fail_mmu_destroy:
6526         kvm_mmu_destroy(vcpu);
6527 fail_free_pio_data:
6528         free_page((unsigned long)vcpu->arch.pio_data);
6529 fail:
6530         return r;
6531 }
6532
6533 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6534 {
6535         int idx;
6536
6537         kfree(vcpu->arch.mce_banks);
6538         kvm_free_lapic(vcpu);
6539         idx = srcu_read_lock(&vcpu->kvm->srcu);
6540         kvm_mmu_destroy(vcpu);
6541         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6542         free_page((unsigned long)vcpu->arch.pio_data);
6543 }
6544
6545 int kvm_arch_init_vm(struct kvm *kvm)
6546 {
6547         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6548         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6549
6550         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6551         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6552
6553         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6554
6555         return 0;
6556 }
6557
6558 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6559 {
6560         vcpu_load(vcpu);
6561         kvm_mmu_unload(vcpu);
6562         vcpu_put(vcpu);
6563 }
6564
6565 static void kvm_free_vcpus(struct kvm *kvm)
6566 {
6567         unsigned int i;
6568         struct kvm_vcpu *vcpu;
6569
6570         /*
6571          * Unpin any mmu pages first.
6572          */
6573         kvm_for_each_vcpu(i, vcpu, kvm) {
6574                 kvm_clear_async_pf_completion_queue(vcpu);
6575                 kvm_unload_vcpu_mmu(vcpu);
6576         }
6577         kvm_for_each_vcpu(i, vcpu, kvm)
6578                 kvm_arch_vcpu_free(vcpu);
6579
6580         mutex_lock(&kvm->lock);
6581         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6582                 kvm->vcpus[i] = NULL;
6583
6584         atomic_set(&kvm->online_vcpus, 0);
6585         mutex_unlock(&kvm->lock);
6586 }
6587
6588 void kvm_arch_sync_events(struct kvm *kvm)
6589 {
6590         kvm_free_all_assigned_devices(kvm);
6591         kvm_free_pit(kvm);
6592 }
6593
6594 void kvm_arch_destroy_vm(struct kvm *kvm)
6595 {
6596         kvm_iommu_unmap_guest(kvm);
6597         kfree(kvm->arch.vpic);
6598         kfree(kvm->arch.vioapic);
6599         kvm_free_vcpus(kvm);
6600         if (kvm->arch.apic_access_page)
6601                 put_page(kvm->arch.apic_access_page);
6602         if (kvm->arch.ept_identity_pagetable)
6603                 put_page(kvm->arch.ept_identity_pagetable);
6604 }
6605
6606 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6607                                 struct kvm_memory_slot *memslot,
6608                                 struct kvm_memory_slot old,
6609                                 struct kvm_userspace_memory_region *mem,
6610                                 int user_alloc)
6611 {
6612         int npages = memslot->npages;
6613         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6614
6615         /* Prevent internal slot pages from being moved by fork()/COW. */
6616         if (memslot->id >= KVM_MEMORY_SLOTS)
6617                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6618
6619         /*To keep backward compatibility with older userspace,
6620          *x86 needs to hanlde !user_alloc case.
6621          */
6622         if (!user_alloc) {
6623                 if (npages && !old.rmap) {
6624                         unsigned long userspace_addr;
6625
6626                         down_write(&current->mm->mmap_sem);
6627                         userspace_addr = do_mmap(NULL, 0,
6628                                                  npages * PAGE_SIZE,
6629                                                  PROT_READ | PROT_WRITE,
6630                                                  map_flags,
6631                                                  0);
6632                         up_write(&current->mm->mmap_sem);
6633
6634                         if (IS_ERR((void *)userspace_addr))
6635                                 return PTR_ERR((void *)userspace_addr);
6636
6637                         memslot->userspace_addr = userspace_addr;
6638                 }
6639         }
6640
6641
6642         return 0;
6643 }
6644
6645 void kvm_arch_commit_memory_region(struct kvm *kvm,
6646                                 struct kvm_userspace_memory_region *mem,
6647                                 struct kvm_memory_slot old,
6648                                 int user_alloc)
6649 {
6650
6651         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6652
6653         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6654                 int ret;
6655
6656                 down_write(&current->mm->mmap_sem);
6657                 ret = do_munmap(current->mm, old.userspace_addr,
6658                                 old.npages * PAGE_SIZE);
6659                 up_write(&current->mm->mmap_sem);
6660                 if (ret < 0)
6661                         printk(KERN_WARNING
6662                                "kvm_vm_ioctl_set_memory_region: "
6663                                "failed to munmap memory\n");
6664         }
6665
6666         if (!kvm->arch.n_requested_mmu_pages)
6667                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6668
6669         spin_lock(&kvm->mmu_lock);
6670         if (nr_mmu_pages)
6671                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6672         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6673         spin_unlock(&kvm->mmu_lock);
6674 }
6675
6676 void kvm_arch_flush_shadow(struct kvm *kvm)
6677 {
6678         kvm_mmu_zap_all(kvm);
6679         kvm_reload_remote_mmus(kvm);
6680 }
6681
6682 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6683 {
6684         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6685                 !vcpu->arch.apf.halted)
6686                 || !list_empty_careful(&vcpu->async_pf.done)
6687                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6688                 || atomic_read(&vcpu->arch.nmi_queued) ||
6689                 (kvm_arch_interrupt_allowed(vcpu) &&
6690                  kvm_cpu_has_interrupt(vcpu));
6691 }
6692
6693 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6694 {
6695         int me;
6696         int cpu = vcpu->cpu;
6697
6698         if (waitqueue_active(&vcpu->wq)) {
6699                 wake_up_interruptible(&vcpu->wq);
6700                 ++vcpu->stat.halt_wakeup;
6701         }
6702
6703         me = get_cpu();
6704         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6705                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6706                         smp_send_reschedule(cpu);
6707         put_cpu();
6708 }
6709
6710 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6711 {
6712         return kvm_x86_ops->interrupt_allowed(vcpu);
6713 }
6714
6715 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6716 {
6717         unsigned long current_rip = kvm_rip_read(vcpu) +
6718                 get_segment_base(vcpu, VCPU_SREG_CS);
6719
6720         return current_rip == linear_rip;
6721 }
6722 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6723
6724 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6725 {
6726         unsigned long rflags;
6727
6728         rflags = kvm_x86_ops->get_rflags(vcpu);
6729         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6730                 rflags &= ~X86_EFLAGS_TF;
6731         return rflags;
6732 }
6733 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6734
6735 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6736 {
6737         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6738             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6739                 rflags |= X86_EFLAGS_TF;
6740         kvm_x86_ops->set_rflags(vcpu, rflags);
6741         kvm_make_request(KVM_REQ_EVENT, vcpu);
6742 }
6743 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6744
6745 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6746 {
6747         int r;
6748
6749         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6750               is_error_page(work->page))
6751                 return;
6752
6753         r = kvm_mmu_reload(vcpu);
6754         if (unlikely(r))
6755                 return;
6756
6757         if (!vcpu->arch.mmu.direct_map &&
6758               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6759                 return;
6760
6761         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6762 }
6763
6764 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6765 {
6766         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6767 }
6768
6769 static inline u32 kvm_async_pf_next_probe(u32 key)
6770 {
6771         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6772 }
6773
6774 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6775 {
6776         u32 key = kvm_async_pf_hash_fn(gfn);
6777
6778         while (vcpu->arch.apf.gfns[key] != ~0)
6779                 key = kvm_async_pf_next_probe(key);
6780
6781         vcpu->arch.apf.gfns[key] = gfn;
6782 }
6783
6784 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6785 {
6786         int i;
6787         u32 key = kvm_async_pf_hash_fn(gfn);
6788
6789         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6790                      (vcpu->arch.apf.gfns[key] != gfn &&
6791                       vcpu->arch.apf.gfns[key] != ~0); i++)
6792                 key = kvm_async_pf_next_probe(key);
6793
6794         return key;
6795 }
6796
6797 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6798 {
6799         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6800 }
6801
6802 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6803 {
6804         u32 i, j, k;
6805
6806         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6807         while (true) {
6808                 vcpu->arch.apf.gfns[i] = ~0;
6809                 do {
6810                         j = kvm_async_pf_next_probe(j);
6811                         if (vcpu->arch.apf.gfns[j] == ~0)
6812                                 return;
6813                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6814                         /*
6815                          * k lies cyclically in ]i,j]
6816                          * |    i.k.j |
6817                          * |....j i.k.| or  |.k..j i...|
6818                          */
6819                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6820                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6821                 i = j;
6822         }
6823 }
6824
6825 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6826 {
6827
6828         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6829                                       sizeof(val));
6830 }
6831
6832 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6833                                      struct kvm_async_pf *work)
6834 {
6835         struct x86_exception fault;
6836
6837         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6838         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6839
6840         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6841             (vcpu->arch.apf.send_user_only &&
6842              kvm_x86_ops->get_cpl(vcpu) == 0))
6843                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6844         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6845                 fault.vector = PF_VECTOR;
6846                 fault.error_code_valid = true;
6847                 fault.error_code = 0;
6848                 fault.nested_page_fault = false;
6849                 fault.address = work->arch.token;
6850                 kvm_inject_page_fault(vcpu, &fault);
6851         }
6852 }
6853
6854 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6855                                  struct kvm_async_pf *work)
6856 {
6857         struct x86_exception fault;
6858
6859         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6860         if (is_error_page(work->page))
6861                 work->arch.token = ~0; /* broadcast wakeup */
6862         else
6863                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6864
6865         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6866             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6867                 fault.vector = PF_VECTOR;
6868                 fault.error_code_valid = true;
6869                 fault.error_code = 0;
6870                 fault.nested_page_fault = false;
6871                 fault.address = work->arch.token;
6872                 kvm_inject_page_fault(vcpu, &fault);
6873         }
6874         vcpu->arch.apf.halted = false;
6875 }
6876
6877 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6878 {
6879         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6880                 return true;
6881         else
6882                 return !kvm_event_needs_reinjection(vcpu) &&
6883                         kvm_x86_ops->interrupt_allowed(vcpu);
6884 }
6885
6886 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6887 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6888 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6889 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6890 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6891 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6892 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6893 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6894 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6895 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6896 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6897 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);