arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/module.h>
  36 #include <linux/mman.h>
  37 #include <linux/highmem.h>
  38 #include <linux/iommu.h>
  39 #include <linux/intel-iommu.h>
  40 #include <linux/cpufreq.h>
  41 #include <linux/user-return-notifier.h>
  42 #include <linux/srcu.h>
  43 #include <linux/slab.h>
  44 #include <linux/perf_event.h>
  45 #include <linux/uaccess.h>
  46 #include <linux/hash.h>
  47 #include <trace/events/kvm.h>
  48
  49 #define CREATE_TRACE_POINTS
  50 #include "trace.h"
  51
  52 #include <asm/debugreg.h>
  53 #include <asm/msr.h>
  54 #include <asm/desc.h>
  55 #include <asm/mtrr.h>
  56 #include <asm/mce.h>
  57 #include <asm/i387.h>
  58 #include <asm/xcr.h>
  59 #include <asm/pvclock.h>
  60 #include <asm/div64.h>
  61
  62 #define MAX_IO_MSRS 256
  63 #define CR0_RESERVED_BITS                                               \
  64         (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
  65                           | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
  66                           | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
  67 #define CR4_RESERVED_BITS                                               \
  68         (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
  69                           | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE     \
  70                           | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR  \
  71                           | X86_CR4_OSXSAVE \
  72                           | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
  73
  74 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
  75
  76 #define KVM_MAX_MCE_BANKS 32
  77 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  78
  79 /* EFER defaults:
  80  * - enable syscall per default because its emulated by KVM
  81  * - enable LME and LMA per default on 64 bit KVM
  82  */
  83 #ifdef CONFIG_X86_64
  84 static
  85 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  86 #else
  87 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  88 #endif
  89
  90 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  91 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  92
  93 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  94 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
  95                                     struct kvm_cpuid_entry2 __user *entries);
  96
  97 struct kvm_x86_ops *kvm_x86_ops;
  98 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  99
 100 int ignore_msrs = 0;
 101 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
 102
 103 #define KVM_NR_SHARED_MSRS 16
 104
 105 struct kvm_shared_msrs_global {
 106         int nr;
 107         u32 msrs[KVM_NR_SHARED_MSRS];
 108 };
 109
 110 struct kvm_shared_msrs {
 111         struct user_return_notifier urn;
 112         bool registered;
 113         struct kvm_shared_msr_values {
 114                 u64 host;
 115                 u64 curr;
 116         } values[KVM_NR_SHARED_MSRS];
 117 };
 118
 119 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 120 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
 121
 122 struct kvm_stats_debugfs_item debugfs_entries[] = {
 123         { "pf_fixed", VCPU_STAT(pf_fixed) },
 124         { "pf_guest", VCPU_STAT(pf_guest) },
 125         { "tlb_flush", VCPU_STAT(tlb_flush) },
 126         { "invlpg", VCPU_STAT(invlpg) },
 127         { "exits", VCPU_STAT(exits) },
 128         { "io_exits", VCPU_STAT(io_exits) },
 129         { "mmio_exits", VCPU_STAT(mmio_exits) },
 130         { "signal_exits", VCPU_STAT(signal_exits) },
 131         { "irq_window", VCPU_STAT(irq_window_exits) },
 132         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 133         { "halt_exits", VCPU_STAT(halt_exits) },
 134         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 135         { "hypercalls", VCPU_STAT(hypercalls) },
 136         { "request_irq", VCPU_STAT(request_irq_exits) },
 137         { "irq_exits", VCPU_STAT(irq_exits) },
 138         { "host_state_reload", VCPU_STAT(host_state_reload) },
 139         { "efer_reload", VCPU_STAT(efer_reload) },
 140         { "fpu_reload", VCPU_STAT(fpu_reload) },
 141         { "insn_emulation", VCPU_STAT(insn_emulation) },
 142         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 143         { "irq_injections", VCPU_STAT(irq_injections) },
 144         { "nmi_injections", VCPU_STAT(nmi_injections) },
 145         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 146         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 147         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 148         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 149         { "mmu_flooded", VM_STAT(mmu_flooded) },
 150         { "mmu_recycled", VM_STAT(mmu_recycled) },
 151         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 152         { "mmu_unsync", VM_STAT(mmu_unsync) },
 153         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 154         { "largepages", VM_STAT(lpages) },
 155         { NULL }
 156 };
 157
 158 u64 __read_mostly host_xcr0;
 159
 160 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 161 {
 162         int i;
 163         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 164                 vcpu->arch.apf.gfns[i] = ~0;
 165 }
 166
 167 static void kvm_on_user_return(struct user_return_notifier *urn)
 168 {
 169         unsigned slot;
 170         struct kvm_shared_msrs *locals
 171                 = container_of(urn, struct kvm_shared_msrs, urn);
 172         struct kvm_shared_msr_values *values;
 173
 174         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 175                 values = &locals->values[slot];
 176                 if (values->host != values->curr) {
 177                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 178                         values->curr = values->host;
 179                 }
 180         }
 181         locals->registered = false;
 182         user_return_notifier_unregister(urn);
 183 }
 184
 185 static void shared_msr_update(unsigned slot, u32 msr)
 186 {
 187         struct kvm_shared_msrs *smsr;
 188         u64 value;
 189
 190         smsr = &__get_cpu_var(shared_msrs);
 191         /* only read, and nobody should modify it at this time,
 192          * so don't need lock */
 193         if (slot >= shared_msrs_global.nr) {
 194                 printk(KERN_ERR "kvm: invalid MSR slot!");
 195                 return;
 196         }
 197         rdmsrl_safe(msr, &value);
 198         smsr->values[slot].host = value;
 199         smsr->values[slot].curr = value;
 200 }
 201
 202 void kvm_define_shared_msr(unsigned slot, u32 msr)
 203 {
 204         if (slot >= shared_msrs_global.nr)
 205                 shared_msrs_global.nr = slot + 1;
 206         shared_msrs_global.msrs[slot] = msr;
 207         /* we need ensured the shared_msr_global have been updated */
 208         smp_wmb();
 209 }
 210 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 211
 212 static void kvm_shared_msr_cpu_online(void)
 213 {
 214         unsigned i;
 215
 216         for (i = 0; i < shared_msrs_global.nr; ++i)
 217                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 218 }
 219
 220 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 221 {
 222         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 223
 224         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 225                 return;
 226         smsr->values[slot].curr = value;
 227         wrmsrl(shared_msrs_global.msrs[slot], value);
 228         if (!smsr->registered) {
 229                 smsr->urn.on_user_return = kvm_on_user_return;
 230                 user_return_notifier_register(&smsr->urn);
 231                 smsr->registered = true;
 232         }
 233 }
 234 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 235
 236 static void drop_user_return_notifiers(void *ignore)
 237 {
 238         struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
 239
 240         if (smsr->registered)
 241                 kvm_on_user_return(&smsr->urn);
 242 }
 243
 244 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 245 {
 246         if (irqchip_in_kernel(vcpu->kvm))
 247                 return vcpu->arch.apic_base;
 248         else
 249                 return vcpu->arch.apic_base;
 250 }
 251 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 252
 253 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
 254 {
 255         /* TODO: reserve bits check */
 256         if (irqchip_in_kernel(vcpu->kvm))
 257                 kvm_lapic_set_base(vcpu, data);
 258         else
 259                 vcpu->arch.apic_base = data;
 260 }
 261 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 262
 263 #define EXCPT_BENIGN            0
 264 #define EXCPT_CONTRIBUTORY      1
 265 #define EXCPT_PF                2
 266
 267 static int exception_class(int vector)
 268 {
 269         switch (vector) {
 270         case PF_VECTOR:
 271                 return EXCPT_PF;
 272         case DE_VECTOR:
 273         case TS_VECTOR:
 274         case NP_VECTOR:
 275         case SS_VECTOR:
 276         case GP_VECTOR:
 277                 return EXCPT_CONTRIBUTORY;
 278         default:
 279                 break;
 280         }
 281         return EXCPT_BENIGN;
 282 }
 283
 284 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 285                 unsigned nr, bool has_error, u32 error_code,
 286                 bool reinject)
 287 {
 288         u32 prev_nr;
 289         int class1, class2;
 290
 291         kvm_make_request(KVM_REQ_EVENT, vcpu);
 292
 293         if (!vcpu->arch.exception.pending) {
 294         queue:
 295                 vcpu->arch.exception.pending = true;
 296                 vcpu->arch.exception.has_error_code = has_error;
 297                 vcpu->arch.exception.nr = nr;
 298                 vcpu->arch.exception.error_code = error_code;
 299                 vcpu->arch.exception.reinject = reinject;
 300                 return;
 301         }
 302
 303         /* to check exception */
 304         prev_nr = vcpu->arch.exception.nr;
 305         if (prev_nr == DF_VECTOR) {
 306                 /* triple fault -> shutdown */
 307                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 308                 return;
 309         }
 310         class1 = exception_class(prev_nr);
 311         class2 = exception_class(nr);
 312         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 313                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 314                 /* generate double fault per SDM Table 5-5 */
 315                 vcpu->arch.exception.pending = true;
 316                 vcpu->arch.exception.has_error_code = true;
 317                 vcpu->arch.exception.nr = DF_VECTOR;
 318                 vcpu->arch.exception.error_code = 0;
 319         } else
 320                 /* replace previous exception with a new one in a hope
 321                    that instruction re-execution will regenerate lost
 322                    exception */
 323                 goto queue;
 324 }
 325
 326 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 327 {
 328         kvm_multiple_exception(vcpu, nr, false, 0, false);
 329 }
 330 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 331
 332 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 333 {
 334         kvm_multiple_exception(vcpu, nr, false, 0, true);
 335 }
 336 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 337
 338 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 339 {
 340         if (err)
 341                 kvm_inject_gp(vcpu, 0);
 342         else
 343                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 344 }
 345 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 346
 347 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 348 {
 349         ++vcpu->stat.pf_guest;
 350         vcpu->arch.cr2 = fault->address;
 351         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 352 }
 353
 354 void kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 355 {
 356         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 357                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 358         else
 359                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 360 }
 361
 362 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 363 {
 364         kvm_make_request(KVM_REQ_NMI, vcpu);
 365         kvm_make_request(KVM_REQ_EVENT, vcpu);
 366 }
 367 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 368
 369 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 370 {
 371         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 372 }
 373 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 374
 375 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 376 {
 377         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 378 }
 379 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 380
 381 /*
 382  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 383  * a #GP and return false.
 384  */
 385 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 386 {
 387         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 388                 return true;
 389         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 390         return false;
 391 }
 392 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 393
 394 /*
 395  * This function will be used to read from the physical memory of the currently
 396  * running guest. The difference to kvm_read_guest_page is that this function
 397  * can read from guest physical or from the guest's guest physical memory.
 398  */
 399 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 400                             gfn_t ngfn, void *data, int offset, int len,
 401                             u32 access)
 402 {
 403         gfn_t real_gfn;
 404         gpa_t ngpa;
 405
 406         ngpa     = gfn_to_gpa(ngfn);
 407         real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
 408         if (real_gfn == UNMAPPED_GVA)
 409                 return -EFAULT;
 410
 411         real_gfn = gpa_to_gfn(real_gfn);
 412
 413         return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
 414 }
 415 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 416
 417 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 418                                void *data, int offset, int len, u32 access)
 419 {
 420         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 421                                        data, offset, len, access);
 422 }
 423
 424 /*
 425  * Load the pae pdptrs.  Return true is they are all valid.
 426  */
 427 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 428 {
 429         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 430         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 431         int i;
 432         int ret;
 433         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 434
 435         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 436                                       offset * sizeof(u64), sizeof(pdpte),
 437                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 438         if (ret < 0) {
 439                 ret = 0;
 440                 goto out;
 441         }
 442         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 443                 if (is_present_gpte(pdpte[i]) &&
 444                     (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
 445                         ret = 0;
 446                         goto out;
 447                 }
 448         }
 449         ret = 1;
 450
 451         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 452         __set_bit(VCPU_EXREG_PDPTR,
 453                   (unsigned long *)&vcpu->arch.regs_avail);
 454         __set_bit(VCPU_EXREG_PDPTR,
 455                   (unsigned long *)&vcpu->arch.regs_dirty);
 456 out:
 457
 458         return ret;
 459 }
 460 EXPORT_SYMBOL_GPL(load_pdptrs);
 461
 462 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 463 {
 464         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 465         bool changed = true;
 466         int offset;
 467         gfn_t gfn;
 468         int r;
 469
 470         if (is_long_mode(vcpu) || !is_pae(vcpu))
 471                 return false;
 472
 473         if (!test_bit(VCPU_EXREG_PDPTR,
 474                       (unsigned long *)&vcpu->arch.regs_avail))
 475                 return true;
 476
 477         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 478         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 479         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 480                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 481         if (r < 0)
 482                 goto out;
 483         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 484 out:
 485
 486         return changed;
 487 }
 488
 489 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 490 {
 491         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 492         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
 493                                     X86_CR0_CD | X86_CR0_NW;
 494
 495         cr0 |= X86_CR0_ET;
 496
 497 #ifdef CONFIG_X86_64
 498         if (cr0 & 0xffffffff00000000UL)
 499                 return 1;
 500 #endif
 501
 502         cr0 &= ~CR0_RESERVED_BITS;
 503
 504         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 505                 return 1;
 506
 507         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 508                 return 1;
 509
 510         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 511 #ifdef CONFIG_X86_64
 512                 if ((vcpu->arch.efer & EFER_LME)) {
 513                         int cs_db, cs_l;
 514
 515                         if (!is_pae(vcpu))
 516                                 return 1;
 517                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 518                         if (cs_l)
 519                                 return 1;
 520                 } else
 521 #endif
 522                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 523                                                  kvm_read_cr3(vcpu)))
 524                         return 1;
 525         }
 526
 527         kvm_x86_ops->set_cr0(vcpu, cr0);
 528
 529         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 530                 kvm_clear_async_pf_completion_queue(vcpu);
 531                 kvm_async_pf_hash_reset(vcpu);
 532         }
 533
 534         if ((cr0 ^ old_cr0) & update_bits)
 535                 kvm_mmu_reset_context(vcpu);
 536         return 0;
 537 }
 538 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 539
 540 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 541 {
 542         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 543 }
 544 EXPORT_SYMBOL_GPL(kvm_lmsw);
 545
 546 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 547 {
 548         u64 xcr0;
 549
 550         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 551         if (index != XCR_XFEATURE_ENABLED_MASK)
 552                 return 1;
 553         xcr0 = xcr;
 554         if (kvm_x86_ops->get_cpl(vcpu) != 0)
 555                 return 1;
 556         if (!(xcr0 & XSTATE_FP))
 557                 return 1;
 558         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 559                 return 1;
 560         if (xcr0 & ~host_xcr0)
 561                 return 1;
 562         vcpu->arch.xcr0 = xcr0;
 563         vcpu->guest_xcr0_loaded = 0;
 564         return 0;
 565 }
 566
 567 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 568 {
 569         if (__kvm_set_xcr(vcpu, index, xcr)) {
 570                 kvm_inject_gp(vcpu, 0);
 571                 return 1;
 572         }
 573         return 0;
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 576
 577 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
 578 {
 579         struct kvm_cpuid_entry2 *best;
 580
 581         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 582         return best && (best->ecx & bit(X86_FEATURE_XSAVE));
 583 }
 584
 585 static void update_cpuid(struct kvm_vcpu *vcpu)
 586 {
 587         struct kvm_cpuid_entry2 *best;
 588
 589         best = kvm_find_cpuid_entry(vcpu, 1, 0);
 590         if (!best)
 591                 return;
 592
 593         /* Update OSXSAVE bit */
 594         if (cpu_has_xsave && best->function == 0x1) {
 595                 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
 596                 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
 597                         best->ecx |= bit(X86_FEATURE_OSXSAVE);
 598         }
 599 }
 600
 601 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 602 {
 603         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 604         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
 605
 606         if (cr4 & CR4_RESERVED_BITS)
 607                 return 1;
 608
 609         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 610                 return 1;
 611
 612         if (is_long_mode(vcpu)) {
 613                 if (!(cr4 & X86_CR4_PAE))
 614                         return 1;
 615         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 616                    && ((cr4 ^ old_cr4) & pdptr_bits)
 617                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 618                                    kvm_read_cr3(vcpu)))
 619                 return 1;
 620
 621         if (cr4 & X86_CR4_VMXE)
 622                 return 1;
 623
 624         kvm_x86_ops->set_cr4(vcpu, cr4);
 625
 626         if ((cr4 ^ old_cr4) & pdptr_bits)
 627                 kvm_mmu_reset_context(vcpu);
 628
 629         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 630                 update_cpuid(vcpu);
 631
 632         return 0;
 633 }
 634 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 635
 636 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 637 {
 638         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 639                 kvm_mmu_sync_roots(vcpu);
 640                 kvm_mmu_flush_tlb(vcpu);
 641                 return 0;
 642         }
 643
 644         if (is_long_mode(vcpu)) {
 645                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 646                         return 1;
 647         } else {
 648                 if (is_pae(vcpu)) {
 649                         if (cr3 & CR3_PAE_RESERVED_BITS)
 650                                 return 1;
 651                         if (is_paging(vcpu) &&
 652                             !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 653                                 return 1;
 654                 }
 655                 /*
 656                  * We don't check reserved bits in nonpae mode, because
 657                  * this isn't enforced, and VMware depends on this.
 658                  */
 659         }
 660
 661         /*
 662          * Does the new cr3 value map to physical memory? (Note, we
 663          * catch an invalid cr3 even in real-mode, because it would
 664          * cause trouble later on when we turn on paging anyway.)
 665          *
 666          * A real CPU would silently accept an invalid cr3 and would
 667          * attempt to use it - with largely undefined (and often hard
 668          * to debug) behavior on the guest side.
 669          */
 670         if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
 671                 return 1;
 672         vcpu->arch.cr3 = cr3;
 673         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 674         vcpu->arch.mmu.new_cr3(vcpu);
 675         return 0;
 676 }
 677 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 678
 679 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 680 {
 681         if (cr8 & CR8_RESERVED_BITS)
 682                 return 1;
 683         if (irqchip_in_kernel(vcpu->kvm))
 684                 kvm_lapic_set_tpr(vcpu, cr8);
 685         else
 686                 vcpu->arch.cr8 = cr8;
 687         return 0;
 688 }
 689 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 690
 691 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 692 {
 693         if (irqchip_in_kernel(vcpu->kvm))
 694                 return kvm_lapic_get_cr8(vcpu);
 695         else
 696                 return vcpu->arch.cr8;
 697 }
 698 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 699
 700 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 701 {
 702         switch (dr) {
 703         case 0 ... 3:
 704                 vcpu->arch.db[dr] = val;
 705                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 706                         vcpu->arch.eff_db[dr] = val;
 707                 break;
 708         case 4:
 709                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 710                         return 1; /* #UD */
 711                 /* fall through */
 712         case 6:
 713                 if (val & 0xffffffff00000000ULL)
 714                         return -1; /* #GP */
 715                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
 716                 break;
 717         case 5:
 718                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 719                         return 1; /* #UD */
 720                 /* fall through */
 721         default: /* 7 */
 722                 if (val & 0xffffffff00000000ULL)
 723                         return -1; /* #GP */
 724                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 725                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 726                         kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
 727                         vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
 728                 }
 729                 break;
 730         }
 731
 732         return 0;
 733 }
 734
 735 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 736 {
 737         int res;
 738
 739         res = __kvm_set_dr(vcpu, dr, val);
 740         if (res > 0)
 741                 kvm_queue_exception(vcpu, UD_VECTOR);
 742         else if (res < 0)
 743                 kvm_inject_gp(vcpu, 0);
 744
 745         return res;
 746 }
 747 EXPORT_SYMBOL_GPL(kvm_set_dr);
 748
 749 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 750 {
 751         switch (dr) {
 752         case 0 ... 3:
 753                 *val = vcpu->arch.db[dr];
 754                 break;
 755         case 4:
 756                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 757                         return 1;
 758                 /* fall through */
 759         case 6:
 760                 *val = vcpu->arch.dr6;
 761                 break;
 762         case 5:
 763                 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 764                         return 1;
 765                 /* fall through */
 766         default: /* 7 */
 767                 *val = vcpu->arch.dr7;
 768                 break;
 769         }
 770
 771         return 0;
 772 }
 773
 774 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 775 {
 776         if (_kvm_get_dr(vcpu, dr, val)) {
 777                 kvm_queue_exception(vcpu, UD_VECTOR);
 778                 return 1;
 779         }
 780         return 0;
 781 }
 782 EXPORT_SYMBOL_GPL(kvm_get_dr);
 783
 784 /*
 785  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 786  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 787  *
 788  * This list is modified at module load time to reflect the
 789  * capabilities of the host cpu. This capabilities test skips MSRs that are
 790  * kvm-specific. Those are put in the beginning of the list.
 791  */
 792
 793 #define KVM_SAVE_MSRS_BEGIN     8
 794 static u32 msrs_to_save[] = {
 795         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 796         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 797         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 798         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN,
 799         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 800         MSR_STAR,
 801 #ifdef CONFIG_X86_64
 802         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 803 #endif
 804         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
 805 };
 806
 807 static unsigned num_msrs_to_save;
 808
 809 static u32 emulated_msrs[] = {
 810         MSR_IA32_MISC_ENABLE,
 811         MSR_IA32_MCG_STATUS,
 812         MSR_IA32_MCG_CTL,
 813 };
 814
 815 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 816 {
 817         u64 old_efer = vcpu->arch.efer;
 818
 819         if (efer & efer_reserved_bits)
 820                 return 1;
 821
 822         if (is_paging(vcpu)
 823             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
 824                 return 1;
 825
 826         if (efer & EFER_FFXSR) {
 827                 struct kvm_cpuid_entry2 *feat;
 828
 829                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 830                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 831                         return 1;
 832         }
 833
 834         if (efer & EFER_SVME) {
 835                 struct kvm_cpuid_entry2 *feat;
 836
 837                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 838                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 839                         return 1;
 840         }
 841
 842         efer &= ~EFER_LMA;
 843         efer |= vcpu->arch.efer & EFER_LMA;
 844
 845         kvm_x86_ops->set_efer(vcpu, efer);
 846
 847         vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
 848
 849         /* Update reserved bits */
 850         if ((efer ^ old_efer) & EFER_NX)
 851                 kvm_mmu_reset_context(vcpu);
 852
 853         return 0;
 854 }
 855
 856 void kvm_enable_efer_bits(u64 mask)
 857 {
 858        efer_reserved_bits &= ~mask;
 859 }
 860 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
 861
 862
 863 /*
 864  * Writes msr value into into the appropriate "register".
 865  * Returns 0 on success, non-0 otherwise.
 866  * Assumes vcpu_load() was already called.
 867  */
 868 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
 869 {
 870         return kvm_x86_ops->set_msr(vcpu, msr_index, data);
 871 }
 872
 873 /*
 874  * Adapt set_msr() to msr_io()'s calling convention
 875  */
 876 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
 877 {
 878         return kvm_set_msr(vcpu, index, *data);
 879 }
 880
 881 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
 882 {
 883         int version;
 884         int r;
 885         struct pvclock_wall_clock wc;
 886         struct timespec boot;
 887
 888         if (!wall_clock)
 889                 return;
 890
 891         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
 892         if (r)
 893                 return;
 894
 895         if (version & 1)
 896                 ++version;  /* first time write, random junk */
 897
 898         ++version;
 899
 900         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 901
 902         /*
 903          * The guest calculates current wall clock time by adding
 904          * system time (updated by kvm_guest_time_update below) to the
 905          * wall clock specified here.  guest system time equals host
 906          * system time for us, thus we must fill in host boot time here.
 907          */
 908         getboottime(&boot);
 909
 910         wc.sec = boot.tv_sec;
 911         wc.nsec = boot.tv_nsec;
 912         wc.version = version;
 913
 914         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
 915
 916         version++;
 917         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
 918 }
 919
 920 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
 921 {
 922         uint32_t quotient, remainder;
 923
 924         /* Don't try to replace with do_div(), this one calculates
 925          * "(dividend << 32) / divisor" */
 926         __asm__ ( "divl %4"
 927                   : "=a" (quotient), "=d" (remainder)
 928                   : "0" (0), "1" (dividend), "r" (divisor) );
 929         return quotient;
 930 }
 931
 932 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
 933                                s8 *pshift, u32 *pmultiplier)
 934 {
 935         uint64_t scaled64;
 936         int32_t  shift = 0;
 937         uint64_t tps64;
 938         uint32_t tps32;
 939
 940         tps64 = base_khz * 1000LL;
 941         scaled64 = scaled_khz * 1000LL;
 942         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
 943                 tps64 >>= 1;
 944                 shift--;
 945         }
 946
 947         tps32 = (uint32_t)tps64;
 948         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
 949                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
 950                         scaled64 >>= 1;
 951                 else
 952                         tps32 <<= 1;
 953                 shift++;
 954         }
 955
 956         *pshift = shift;
 957         *pmultiplier = div_frac(scaled64, tps32);
 958
 959         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
 960                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
 961 }
 962
 963 static inline u64 get_kernel_ns(void)
 964 {
 965         struct timespec ts;
 966
 967         WARN_ON(preemptible());
 968         ktime_get_ts(&ts);
 969         monotonic_to_bootbased(&ts);
 970         return timespec_to_ns(&ts);
 971 }
 972
 973 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
 974 unsigned long max_tsc_khz;
 975
 976 static inline int kvm_tsc_changes_freq(void)
 977 {
 978         int cpu = get_cpu();
 979         int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
 980                   cpufreq_quick_get(cpu) != 0;
 981         put_cpu();
 982         return ret;
 983 }
 984
 985 static inline u64 nsec_to_cycles(u64 nsec)
 986 {
 987         u64 ret;
 988
 989         WARN_ON(preemptible());
 990         if (kvm_tsc_changes_freq())
 991                 printk_once(KERN_WARNING
 992                  "kvm: unreliable cycle conversion on adjustable rate TSC\n");
 993         ret = nsec * __this_cpu_read(cpu_tsc_khz);
 994         do_div(ret, USEC_PER_SEC);
 995         return ret;
 996 }
 997
 998 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
 999 {
1000         /* Compute a scale to convert nanoseconds in TSC cycles */
1001         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1002                            &kvm->arch.virtual_tsc_shift,
1003                            &kvm->arch.virtual_tsc_mult);
1004         kvm->arch.virtual_tsc_khz = this_tsc_khz;
1005 }
1006
1007 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1008 {
1009         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
1010                                       vcpu->kvm->arch.virtual_tsc_mult,
1011                                       vcpu->kvm->arch.virtual_tsc_shift);
1012         tsc += vcpu->arch.last_tsc_write;
1013         return tsc;
1014 }
1015
1016 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1017 {
1018         struct kvm *kvm = vcpu->kvm;
1019         u64 offset, ns, elapsed;
1020         unsigned long flags;
1021         s64 sdiff;
1022
1023         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1024         offset = data - native_read_tsc();
1025         ns = get_kernel_ns();
1026         elapsed = ns - kvm->arch.last_tsc_nsec;
1027         sdiff = data - kvm->arch.last_tsc_write;
1028         if (sdiff < 0)
1029                 sdiff = -sdiff;
1030
1031         /*
1032          * Special case: close write to TSC within 5 seconds of
1033          * another CPU is interpreted as an attempt to synchronize
1034          * The 5 seconds is to accommodate host load / swapping as
1035          * well as any reset of TSC during the boot process.
1036          *
1037          * In that case, for a reliable TSC, we can match TSC offsets,
1038          * or make a best guest using elapsed value.
1039          */
1040         if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1041             elapsed < 5ULL * NSEC_PER_SEC) {
1042                 if (!check_tsc_unstable()) {
1043                         offset = kvm->arch.last_tsc_offset;
1044                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1045                 } else {
1046                         u64 delta = nsec_to_cycles(elapsed);
1047                         offset += delta;
1048                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1049                 }
1050                 ns = kvm->arch.last_tsc_nsec;
1051         }
1052         kvm->arch.last_tsc_nsec = ns;
1053         kvm->arch.last_tsc_write = data;
1054         kvm->arch.last_tsc_offset = offset;
1055         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1056         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1057
1058         /* Reset of TSC must disable overshoot protection below */
1059         vcpu->arch.hv_clock.tsc_timestamp = 0;
1060         vcpu->arch.last_tsc_write = data;
1061         vcpu->arch.last_tsc_nsec = ns;
1062 }
1063 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1064
1065 static int kvm_guest_time_update(struct kvm_vcpu *v)
1066 {
1067         unsigned long flags;
1068         struct kvm_vcpu_arch *vcpu = &v->arch;
1069         void *shared_kaddr;
1070         unsigned long this_tsc_khz;
1071         s64 kernel_ns, max_kernel_ns;
1072         u64 tsc_timestamp;
1073
1074         /* Keep irq disabled to prevent changes to the clock */
1075         local_irq_save(flags);
1076         kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1077         kernel_ns = get_kernel_ns();
1078         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1079
1080         if (unlikely(this_tsc_khz == 0)) {
1081                 local_irq_restore(flags);
1082                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1083                 return 1;
1084         }
1085
1086         /*
1087          * We may have to catch up the TSC to match elapsed wall clock
1088          * time for two reasons, even if kvmclock is used.
1089          *   1) CPU could have been running below the maximum TSC rate
1090          *   2) Broken TSC compensation resets the base at each VCPU
1091          *      entry to avoid unknown leaps of TSC even when running
1092          *      again on the same CPU.  This may cause apparent elapsed
1093          *      time to disappear, and the guest to stand still or run
1094          *      very slowly.
1095          */
1096         if (vcpu->tsc_catchup) {
1097                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1098                 if (tsc > tsc_timestamp) {
1099                         kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1100                         tsc_timestamp = tsc;
1101                 }
1102         }
1103
1104         local_irq_restore(flags);
1105
1106         if (!vcpu->time_page)
1107                 return 0;
1108
1109         /*
1110          * Time as measured by the TSC may go backwards when resetting the base
1111          * tsc_timestamp.  The reason for this is that the TSC resolution is
1112          * higher than the resolution of the other clock scales.  Thus, many
1113          * possible measurments of the TSC correspond to one measurement of any
1114          * other clock, and so a spread of values is possible.  This is not a
1115          * problem for the computation of the nanosecond clock; with TSC rates
1116          * around 1GHZ, there can only be a few cycles which correspond to one
1117          * nanosecond value, and any path through this code will inevitably
1118          * take longer than that.  However, with the kernel_ns value itself,
1119          * the precision may be much lower, down to HZ granularity.  If the
1120          * first sampling of TSC against kernel_ns ends in the low part of the
1121          * range, and the second in the high end of the range, we can get:
1122          *
1123          * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1124          *
1125          * As the sampling errors potentially range in the thousands of cycles,
1126          * it is possible such a time value has already been observed by the
1127          * guest.  To protect against this, we must compute the system time as
1128          * observed by the guest and ensure the new system time is greater.
1129          */
1130         max_kernel_ns = 0;
1131         if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1132                 max_kernel_ns = vcpu->last_guest_tsc -
1133                                 vcpu->hv_clock.tsc_timestamp;
1134                 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1135                                     vcpu->hv_clock.tsc_to_system_mul,
1136                                     vcpu->hv_clock.tsc_shift);
1137                 max_kernel_ns += vcpu->last_kernel_ns;
1138         }
1139
1140         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1141                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1142                                    &vcpu->hv_clock.tsc_shift,
1143                                    &vcpu->hv_clock.tsc_to_system_mul);
1144                 vcpu->hw_tsc_khz = this_tsc_khz;
1145         }
1146
1147         if (max_kernel_ns > kernel_ns)
1148                 kernel_ns = max_kernel_ns;
1149
1150         /* With all the info we got, fill in the values */
1151         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1152         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1153         vcpu->last_kernel_ns = kernel_ns;
1154         vcpu->last_guest_tsc = tsc_timestamp;
1155         vcpu->hv_clock.flags = 0;
1156
1157         /*
1158          * The interface expects us to write an even number signaling that the
1159          * update is finished. Since the guest won't see the intermediate
1160          * state, we just increase by 2 at the end.
1161          */
1162         vcpu->hv_clock.version += 2;
1163
1164         shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1165
1166         memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1167                sizeof(vcpu->hv_clock));
1168
1169         kunmap_atomic(shared_kaddr, KM_USER0);
1170
1171         mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1172         return 0;
1173 }
1174
1175 static bool msr_mtrr_valid(unsigned msr)
1176 {
1177         switch (msr) {
1178         case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1179         case MSR_MTRRfix64K_00000:
1180         case MSR_MTRRfix16K_80000:
1181         case MSR_MTRRfix16K_A0000:
1182         case MSR_MTRRfix4K_C0000:
1183         case MSR_MTRRfix4K_C8000:
1184         case MSR_MTRRfix4K_D0000:
1185         case MSR_MTRRfix4K_D8000:
1186         case MSR_MTRRfix4K_E0000:
1187         case MSR_MTRRfix4K_E8000:
1188         case MSR_MTRRfix4K_F0000:
1189         case MSR_MTRRfix4K_F8000:
1190         case MSR_MTRRdefType:
1191         case MSR_IA32_CR_PAT:
1192                 return true;
1193         case 0x2f8:
1194                 return true;
1195         }
1196         return false;
1197 }
1198
1199 static bool valid_pat_type(unsigned t)
1200 {
1201         return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1202 }
1203
1204 static bool valid_mtrr_type(unsigned t)
1205 {
1206         return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1207 }
1208
1209 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1210 {
1211         int i;
1212
1213         if (!msr_mtrr_valid(msr))
1214                 return false;
1215
1216         if (msr == MSR_IA32_CR_PAT) {
1217                 for (i = 0; i < 8; i++)
1218                         if (!valid_pat_type((data >> (i * 8)) & 0xff))
1219                                 return false;
1220                 return true;
1221         } else if (msr == MSR_MTRRdefType) {
1222                 if (data & ~0xcff)
1223                         return false;
1224                 return valid_mtrr_type(data & 0xff);
1225         } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1226                 for (i = 0; i < 8 ; i++)
1227                         if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1228                                 return false;
1229                 return true;
1230         }
1231
1232         /* variable MTRRs */
1233         return valid_mtrr_type(data & 0xff);
1234 }
1235
1236 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1237 {
1238         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1239
1240         if (!mtrr_valid(vcpu, msr, data))
1241                 return 1;
1242
1243         if (msr == MSR_MTRRdefType) {
1244                 vcpu->arch.mtrr_state.def_type = data;
1245                 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1246         } else if (msr == MSR_MTRRfix64K_00000)
1247                 p[0] = data;
1248         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1249                 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1250         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1251                 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1252         else if (msr == MSR_IA32_CR_PAT)
1253                 vcpu->arch.pat = data;
1254         else {  /* Variable MTRRs */
1255                 int idx, is_mtrr_mask;
1256                 u64 *pt;
1257
1258                 idx = (msr - 0x200) / 2;
1259                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1260                 if (!is_mtrr_mask)
1261                         pt =
1262                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1263                 else
1264                         pt =
1265                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1266                 *pt = data;
1267         }
1268
1269         kvm_mmu_reset_context(vcpu);
1270         return 0;
1271 }
1272
1273 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1274 {
1275         u64 mcg_cap = vcpu->arch.mcg_cap;
1276         unsigned bank_num = mcg_cap & 0xff;
1277
1278         switch (msr) {
1279         case MSR_IA32_MCG_STATUS:
1280                 vcpu->arch.mcg_status = data;
1281                 break;
1282         case MSR_IA32_MCG_CTL:
1283                 if (!(mcg_cap & MCG_CTL_P))
1284                         return 1;
1285                 if (data != 0 && data != ~(u64)0)
1286                         return -1;
1287                 vcpu->arch.mcg_ctl = data;
1288                 break;
1289         default:
1290                 if (msr >= MSR_IA32_MC0_CTL &&
1291                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1292                         u32 offset = msr - MSR_IA32_MC0_CTL;
1293                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1294                          * some Linux kernels though clear bit 10 in bank 4 to
1295                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1296                          * this to avoid an uncatched #GP in the guest
1297                          */
1298                         if ((offset & 0x3) == 0 &&
1299                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1300                                 return -1;
1301                         vcpu->arch.mce_banks[offset] = data;
1302                         break;
1303                 }
1304                 return 1;
1305         }
1306         return 0;
1307 }
1308
1309 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1310 {
1311         struct kvm *kvm = vcpu->kvm;
1312         int lm = is_long_mode(vcpu);
1313         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1314                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1315         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1316                 : kvm->arch.xen_hvm_config.blob_size_32;
1317         u32 page_num = data & ~PAGE_MASK;
1318         u64 page_addr = data & PAGE_MASK;
1319         u8 *page;
1320         int r;
1321
1322         r = -E2BIG;
1323         if (page_num >= blob_size)
1324                 goto out;
1325         r = -ENOMEM;
1326         page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1327         if (!page)
1328                 goto out;
1329         r = -EFAULT;
1330         if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1331                 goto out_free;
1332         if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1333                 goto out_free;
1334         r = 0;
1335 out_free:
1336         kfree(page);
1337 out:
1338         return r;
1339 }
1340
1341 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1342 {
1343         return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1344 }
1345
1346 static bool kvm_hv_msr_partition_wide(u32 msr)
1347 {
1348         bool r = false;
1349         switch (msr) {
1350         case HV_X64_MSR_GUEST_OS_ID:
1351         case HV_X64_MSR_HYPERCALL:
1352                 r = true;
1353                 break;
1354         }
1355
1356         return r;
1357 }
1358
1359 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1360 {
1361         struct kvm *kvm = vcpu->kvm;
1362
1363         switch (msr) {
1364         case HV_X64_MSR_GUEST_OS_ID:
1365                 kvm->arch.hv_guest_os_id = data;
1366                 /* setting guest os id to zero disables hypercall page */
1367                 if (!kvm->arch.hv_guest_os_id)
1368                         kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1369                 break;
1370         case HV_X64_MSR_HYPERCALL: {
1371                 u64 gfn;
1372                 unsigned long addr;
1373                 u8 instructions[4];
1374
1375                 /* if guest os id is not set hypercall should remain disabled */
1376                 if (!kvm->arch.hv_guest_os_id)
1377                         break;
1378                 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1379                         kvm->arch.hv_hypercall = data;
1380                         break;
1381                 }
1382                 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1383                 addr = gfn_to_hva(kvm, gfn);
1384                 if (kvm_is_error_hva(addr))
1385                         return 1;
1386                 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1387                 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1388                 if (copy_to_user((void __user *)addr, instructions, 4))
1389                         return 1;
1390                 kvm->arch.hv_hypercall = data;
1391                 break;
1392         }
1393         default:
1394                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1395                           "data 0x%llx\n", msr, data);
1396                 return 1;
1397         }
1398         return 0;
1399 }
1400
1401 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1402 {
1403         switch (msr) {
1404         case HV_X64_MSR_APIC_ASSIST_PAGE: {
1405                 unsigned long addr;
1406
1407                 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1408                         vcpu->arch.hv_vapic = data;
1409                         break;
1410                 }
1411                 addr = gfn_to_hva(vcpu->kvm, data >>
1412                                   HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1413                 if (kvm_is_error_hva(addr))
1414                         return 1;
1415                 if (clear_user((void __user *)addr, PAGE_SIZE))
1416                         return 1;
1417                 vcpu->arch.hv_vapic = data;
1418                 break;
1419         }
1420         case HV_X64_MSR_EOI:
1421                 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1422         case HV_X64_MSR_ICR:
1423                 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1424         case HV_X64_MSR_TPR:
1425                 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1426         default:
1427                 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1428                           "data 0x%llx\n", msr, data);
1429                 return 1;
1430         }
1431
1432         return 0;
1433 }
1434
1435 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1436 {
1437         gpa_t gpa = data & ~0x3f;
1438
1439         /* Bits 2:5 are resrved, Should be zero */
1440         if (data & 0x3c)
1441                 return 1;
1442
1443         vcpu->arch.apf.msr_val = data;
1444
1445         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1446                 kvm_clear_async_pf_completion_queue(vcpu);
1447                 kvm_async_pf_hash_reset(vcpu);
1448                 return 0;
1449         }
1450
1451         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa))
1452                 return 1;
1453
1454         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1455         kvm_async_pf_wakeup_all(vcpu);
1456         return 0;
1457 }
1458
1459 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1460 {
1461         if (vcpu->arch.time_page) {
1462                 kvm_release_page_dirty(vcpu->arch.time_page);
1463                 vcpu->arch.time_page = NULL;
1464         }
1465 }
1466
1467 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1468 {
1469         switch (msr) {
1470         case MSR_EFER:
1471                 return set_efer(vcpu, data);
1472         case MSR_K7_HWCR:
1473                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1474                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1475                 if (data != 0) {
1476                         pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1477                                 data);
1478                         return 1;
1479                 }
1480                 break;
1481         case MSR_FAM10H_MMIO_CONF_BASE:
1482                 if (data != 0) {
1483                         pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1484                                 "0x%llx\n", data);
1485                         return 1;
1486                 }
1487                 break;
1488         case MSR_AMD64_NB_CFG:
1489                 break;
1490         case MSR_IA32_DEBUGCTLMSR:
1491                 if (!data) {
1492                         /* We support the non-activated case already */
1493                         break;
1494                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1495                         /* Values other than LBR and BTF are vendor-specific,
1496                            thus reserved and should throw a #GP */
1497                         return 1;
1498                 }
1499                 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1500                         __func__, data);
1501                 break;
1502         case MSR_IA32_UCODE_REV:
1503         case MSR_IA32_UCODE_WRITE:
1504         case MSR_VM_HSAVE_PA:
1505         case MSR_AMD64_PATCH_LOADER:
1506                 break;
1507         case 0xe2:
1508         case 0x200 ... 0x2ff:
1509                 return set_msr_mtrr(vcpu, msr, data);
1510         case MSR_IA32_APICBASE:
1511                 kvm_set_apic_base(vcpu, data);
1512                 break;
1513         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1514                 return kvm_x2apic_msr_write(vcpu, msr, data);
1515         case MSR_IA32_MISC_ENABLE:
1516                 vcpu->arch.ia32_misc_enable_msr = data;
1517                 break;
1518         case MSR_KVM_WALL_CLOCK_NEW:
1519         case MSR_KVM_WALL_CLOCK:
1520                 vcpu->kvm->arch.wall_clock = data;
1521                 kvm_write_wall_clock(vcpu->kvm, data);
1522                 break;
1523         case MSR_KVM_SYSTEM_TIME_NEW:
1524         case MSR_KVM_SYSTEM_TIME: {
1525                 kvmclock_reset(vcpu);
1526
1527                 vcpu->arch.time = data;
1528                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1529
1530                 /* we verify if the enable bit is set... */
1531                 if (!(data & 1))
1532                         break;
1533
1534                 /* ...but clean it before doing the actual write */
1535                 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1536
1537                 vcpu->arch.time_page =
1538                                 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1539
1540                 if (is_error_page(vcpu->arch.time_page)) {
1541                         kvm_release_page_clean(vcpu->arch.time_page);
1542                         vcpu->arch.time_page = NULL;
1543                 }
1544                 break;
1545         }
1546         case MSR_KVM_ASYNC_PF_EN:
1547                 if (kvm_pv_enable_async_pf(vcpu, data))
1548                         return 1;
1549                 break;
1550         case MSR_IA32_MCG_CTL:
1551         case MSR_IA32_MCG_STATUS:
1552         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1553                 return set_msr_mce(vcpu, msr, data);
1554
1555         /* Performance counters are not protected by a CPUID bit,
1556          * so we should check all of them in the generic path for the sake of
1557          * cross vendor migration.
1558          * Writing a zero into the event select MSRs disables them,
1559          * which we perfectly emulate ;-). Any other value should be at least
1560          * reported, some guests depend on them.
1561          */
1562         case MSR_P6_EVNTSEL0:
1563         case MSR_P6_EVNTSEL1:
1564         case MSR_K7_EVNTSEL0:
1565         case MSR_K7_EVNTSEL1:
1566         case MSR_K7_EVNTSEL2:
1567         case MSR_K7_EVNTSEL3:
1568                 if (data != 0)
1569                         pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1570                                 "0x%x data 0x%llx\n", msr, data);
1571                 break;
1572         /* at least RHEL 4 unconditionally writes to the perfctr registers,
1573          * so we ignore writes to make it happy.
1574          */
1575         case MSR_P6_PERFCTR0:
1576         case MSR_P6_PERFCTR1:
1577         case MSR_K7_PERFCTR0:
1578         case MSR_K7_PERFCTR1:
1579         case MSR_K7_PERFCTR2:
1580         case MSR_K7_PERFCTR3:
1581                 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1582                         "0x%x data 0x%llx\n", msr, data);
1583                 break;
1584         case MSR_K7_CLK_CTL:
1585                 /*
1586                  * Ignore all writes to this no longer documented MSR.
1587                  * Writes are only relevant for old K7 processors,
1588                  * all pre-dating SVM, but a recommended workaround from
1589                  * AMD for these chips. It is possible to speicify the
1590                  * affected processor models on the command line, hence
1591                  * the need to ignore the workaround.
1592                  */
1593                 break;
1594         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1595                 if (kvm_hv_msr_partition_wide(msr)) {
1596                         int r;
1597                         mutex_lock(&vcpu->kvm->lock);
1598                         r = set_msr_hyperv_pw(vcpu, msr, data);
1599                         mutex_unlock(&vcpu->kvm->lock);
1600                         return r;
1601                 } else
1602                         return set_msr_hyperv(vcpu, msr, data);
1603                 break;
1604         case MSR_IA32_BBL_CR_CTL3:
1605                 /* Drop writes to this legacy MSR -- see rdmsr
1606                  * counterpart for further detail.
1607                  */
1608                 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
1609                 break;
1610         default:
1611                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1612                         return xen_hvm_config(vcpu, data);
1613                 if (!ignore_msrs) {
1614                         pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1615                                 msr, data);
1616                         return 1;
1617                 } else {
1618                         pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1619                                 msr, data);
1620                         break;
1621                 }
1622         }
1623         return 0;
1624 }
1625 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1626
1627
1628 /*
1629  * Reads an msr value (of 'msr_index') into 'pdata'.
1630  * Returns 0 on success, non-0 otherwise.
1631  * Assumes vcpu_load() was already called.
1632  */
1633 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1634 {
1635         return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1636 }
1637
1638 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1639 {
1640         u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1641
1642         if (!msr_mtrr_valid(msr))
1643                 return 1;
1644
1645         if (msr == MSR_MTRRdefType)
1646                 *pdata = vcpu->arch.mtrr_state.def_type +
1647                          (vcpu->arch.mtrr_state.enabled << 10);
1648         else if (msr == MSR_MTRRfix64K_00000)
1649                 *pdata = p[0];
1650         else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1651                 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1652         else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1653                 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1654         else if (msr == MSR_IA32_CR_PAT)
1655                 *pdata = vcpu->arch.pat;
1656         else {  /* Variable MTRRs */
1657                 int idx, is_mtrr_mask;
1658                 u64 *pt;
1659
1660                 idx = (msr - 0x200) / 2;
1661                 is_mtrr_mask = msr - 0x200 - 2 * idx;
1662                 if (!is_mtrr_mask)
1663                         pt =
1664                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1665                 else
1666                         pt =
1667                           (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1668                 *pdata = *pt;
1669         }
1670
1671         return 0;
1672 }
1673
1674 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1675 {
1676         u64 data;
1677         u64 mcg_cap = vcpu->arch.mcg_cap;
1678         unsigned bank_num = mcg_cap & 0xff;
1679
1680         switch (msr) {
1681         case MSR_IA32_P5_MC_ADDR:
1682         case MSR_IA32_P5_MC_TYPE:
1683                 data = 0;
1684                 break;
1685         case MSR_IA32_MCG_CAP:
1686                 data = vcpu->arch.mcg_cap;
1687                 break;
1688         case MSR_IA32_MCG_CTL:
1689                 if (!(mcg_cap & MCG_CTL_P))
1690                         return 1;
1691                 data = vcpu->arch.mcg_ctl;
1692                 break;
1693         case MSR_IA32_MCG_STATUS:
1694                 data = vcpu->arch.mcg_status;
1695                 break;
1696         default:
1697                 if (msr >= MSR_IA32_MC0_CTL &&
1698                     msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1699                         u32 offset = msr - MSR_IA32_MC0_CTL;
1700                         data = vcpu->arch.mce_banks[offset];
1701                         break;
1702                 }
1703                 return 1;
1704         }
1705         *pdata = data;
1706         return 0;
1707 }
1708
1709 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1710 {
1711         u64 data = 0;
1712         struct kvm *kvm = vcpu->kvm;
1713
1714         switch (msr) {
1715         case HV_X64_MSR_GUEST_OS_ID:
1716                 data = kvm->arch.hv_guest_os_id;
1717                 break;
1718         case HV_X64_MSR_HYPERCALL:
1719                 data = kvm->arch.hv_hypercall;
1720                 break;
1721         default:
1722                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1723                 return 1;
1724         }
1725
1726         *pdata = data;
1727         return 0;
1728 }
1729
1730 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1731 {
1732         u64 data = 0;
1733
1734         switch (msr) {
1735         case HV_X64_MSR_VP_INDEX: {
1736                 int r;
1737                 struct kvm_vcpu *v;
1738                 kvm_for_each_vcpu(r, v, vcpu->kvm)
1739                         if (v == vcpu)
1740                                 data = r;
1741                 break;
1742         }
1743         case HV_X64_MSR_EOI:
1744                 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1745         case HV_X64_MSR_ICR:
1746                 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1747         case HV_X64_MSR_TPR:
1748                 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1749         default:
1750                 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1751                 return 1;
1752         }
1753         *pdata = data;
1754         return 0;
1755 }
1756
1757 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1758 {
1759         u64 data;
1760
1761         switch (msr) {
1762         case MSR_IA32_PLATFORM_ID:
1763         case MSR_IA32_UCODE_REV:
1764         case MSR_IA32_EBL_CR_POWERON:
1765         case MSR_IA32_DEBUGCTLMSR:
1766         case MSR_IA32_LASTBRANCHFROMIP:
1767         case MSR_IA32_LASTBRANCHTOIP:
1768         case MSR_IA32_LASTINTFROMIP:
1769         case MSR_IA32_LASTINTTOIP:
1770         case MSR_K8_SYSCFG:
1771         case MSR_K7_HWCR:
1772         case MSR_VM_HSAVE_PA:
1773         case MSR_P6_PERFCTR0:
1774         case MSR_P6_PERFCTR1:
1775         case MSR_P6_EVNTSEL0:
1776         case MSR_P6_EVNTSEL1:
1777         case MSR_K7_EVNTSEL0:
1778         case MSR_K7_PERFCTR0:
1779         case MSR_K8_INT_PENDING_MSG:
1780         case MSR_AMD64_NB_CFG:
1781         case MSR_FAM10H_MMIO_CONF_BASE:
1782         case 0xe2:
1783                 data = 0;
1784                 break;
1785         case MSR_MTRRcap:
1786                 data = 0x500 | KVM_NR_VAR_MTRR;
1787                 break;
1788         case 0x200 ... 0x2ff:
1789                 return get_msr_mtrr(vcpu, msr, pdata);
1790         case 0xcd: /* fsb frequency */
1791                 data = 3;
1792                 break;
1793                 /*
1794                  * MSR_EBC_FREQUENCY_ID
1795                  * Conservative value valid for even the basic CPU models.
1796                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1797                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1798                  * and 266MHz for model 3, or 4. Set Core Clock
1799                  * Frequency to System Bus Frequency Ratio to 1 (bits
1800                  * 31:24) even though these are only valid for CPU
1801                  * models > 2, however guests may end up dividing or
1802                  * multiplying by zero otherwise.
1803                  */
1804         case MSR_EBC_FREQUENCY_ID:
1805                 data = 1 << 24;
1806                 break;
1807         case MSR_IA32_APICBASE:
1808                 data = kvm_get_apic_base(vcpu);
1809                 break;
1810         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1811                 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1812                 break;
1813         case MSR_IA32_MISC_ENABLE:
1814                 data = vcpu->arch.ia32_misc_enable_msr;
1815                 break;
1816         case MSR_IA32_PERF_STATUS:
1817                 /* TSC increment by tick */
1818                 data = 1000ULL;
1819                 /* CPU multiplier */
1820                 data |= (((uint64_t)4ULL) << 40);
1821                 break;
1822         case MSR_EFER:
1823                 data = vcpu->arch.efer;
1824                 break;
1825         case MSR_KVM_WALL_CLOCK:
1826         case MSR_KVM_WALL_CLOCK_NEW:
1827                 data = vcpu->kvm->arch.wall_clock;
1828                 break;
1829         case MSR_KVM_SYSTEM_TIME:
1830         case MSR_KVM_SYSTEM_TIME_NEW:
1831                 data = vcpu->arch.time;
1832                 break;
1833         case MSR_KVM_ASYNC_PF_EN:
1834                 data = vcpu->arch.apf.msr_val;
1835                 break;
1836         case MSR_IA32_P5_MC_ADDR:
1837         case MSR_IA32_P5_MC_TYPE:
1838         case MSR_IA32_MCG_CAP:
1839         case MSR_IA32_MCG_CTL:
1840         case MSR_IA32_MCG_STATUS:
1841         case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1842                 return get_msr_mce(vcpu, msr, pdata);
1843         case MSR_K7_CLK_CTL:
1844                 /*
1845                  * Provide expected ramp-up count for K7. All other
1846                  * are set to zero, indicating minimum divisors for
1847                  * every field.
1848                  *
1849                  * This prevents guest kernels on AMD host with CPU
1850                  * type 6, model 8 and higher from exploding due to
1851                  * the rdmsr failing.
1852                  */
1853                 data = 0x20000000;
1854                 break;
1855         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1856                 if (kvm_hv_msr_partition_wide(msr)) {
1857                         int r;
1858                         mutex_lock(&vcpu->kvm->lock);
1859                         r = get_msr_hyperv_pw(vcpu, msr, pdata);
1860                         mutex_unlock(&vcpu->kvm->lock);
1861                         return r;
1862                 } else
1863                         return get_msr_hyperv(vcpu, msr, pdata);
1864                 break;
1865         case MSR_IA32_BBL_CR_CTL3:
1866                 /* This legacy MSR exists but isn't fully documented in current
1867                  * silicon.  It is however accessed by winxp in very narrow
1868                  * scenarios where it sets bit #19, itself documented as
1869                  * a "reserved" bit.  Best effort attempt to source coherent
1870                  * read data here should the balance of the register be
1871                  * interpreted by the guest:
1872                  *
1873                  * L2 cache control register 3: 64GB range, 256KB size,
1874                  * enabled, latency 0x1, configured
1875                  */
1876                 data = 0xbe702111;
1877                 break;
1878         default:
1879                 if (!ignore_msrs) {
1880                         pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1881                         return 1;
1882                 } else {
1883                         pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1884                         data = 0;
1885                 }
1886                 break;
1887         }
1888         *pdata = data;
1889         return 0;
1890 }
1891 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1892
1893 /*
1894  * Read or write a bunch of msrs. All parameters are kernel addresses.
1895  *
1896  * @return number of msrs set successfully.
1897  */
1898 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1899                     struct kvm_msr_entry *entries,
1900                     int (*do_msr)(struct kvm_vcpu *vcpu,
1901                                   unsigned index, u64 *data))
1902 {
1903         int i, idx;
1904
1905         idx = srcu_read_lock(&vcpu->kvm->srcu);
1906         for (i = 0; i < msrs->nmsrs; ++i)
1907                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1908                         break;
1909         srcu_read_unlock(&vcpu->kvm->srcu, idx);
1910
1911         return i;
1912 }
1913
1914 /*
1915  * Read or write a bunch of msrs. Parameters are user addresses.
1916  *
1917  * @return number of msrs set successfully.
1918  */
1919 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1920                   int (*do_msr)(struct kvm_vcpu *vcpu,
1921                                 unsigned index, u64 *data),
1922                   int writeback)
1923 {
1924         struct kvm_msrs msrs;
1925         struct kvm_msr_entry *entries;
1926         int r, n;
1927         unsigned size;
1928
1929         r = -EFAULT;
1930         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1931                 goto out;
1932
1933         r = -E2BIG;
1934         if (msrs.nmsrs >= MAX_IO_MSRS)
1935                 goto out;
1936
1937         r = -ENOMEM;
1938         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1939         entries = kmalloc(size, GFP_KERNEL);
1940         if (!entries)
1941                 goto out;
1942
1943         r = -EFAULT;
1944         if (copy_from_user(entries, user_msrs->entries, size))
1945                 goto out_free;
1946
1947         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1948         if (r < 0)
1949                 goto out_free;
1950
1951         r = -EFAULT;
1952         if (writeback && copy_to_user(user_msrs->entries, entries, size))
1953                 goto out_free;
1954
1955         r = n;
1956
1957 out_free:
1958         kfree(entries);
1959 out:
1960         return r;
1961 }
1962
1963 int kvm_dev_ioctl_check_extension(long ext)
1964 {
1965         int r;
1966
1967         switch (ext) {
1968         case KVM_CAP_IRQCHIP:
1969         case KVM_CAP_HLT:
1970         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1971         case KVM_CAP_SET_TSS_ADDR:
1972         case KVM_CAP_EXT_CPUID:
1973         case KVM_CAP_CLOCKSOURCE:
1974         case KVM_CAP_PIT:
1975         case KVM_CAP_NOP_IO_DELAY:
1976         case KVM_CAP_MP_STATE:
1977         case KVM_CAP_SYNC_MMU:
1978         case KVM_CAP_USER_NMI:
1979         case KVM_CAP_REINJECT_CONTROL:
1980         case KVM_CAP_IRQ_INJECT_STATUS:
1981         case KVM_CAP_ASSIGN_DEV_IRQ:
1982         case KVM_CAP_IRQFD:
1983         case KVM_CAP_IOEVENTFD:
1984         case KVM_CAP_PIT2:
1985         case KVM_CAP_PIT_STATE2:
1986         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1987         case KVM_CAP_XEN_HVM:
1988         case KVM_CAP_ADJUST_CLOCK:
1989         case KVM_CAP_VCPU_EVENTS:
1990         case KVM_CAP_HYPERV:
1991         case KVM_CAP_HYPERV_VAPIC:
1992         case KVM_CAP_HYPERV_SPIN:
1993         case KVM_CAP_PCI_SEGMENT:
1994         case KVM_CAP_DEBUGREGS:
1995         case KVM_CAP_X86_ROBUST_SINGLESTEP:
1996         case KVM_CAP_XSAVE:
1997         case KVM_CAP_ASYNC_PF:
1998                 r = 1;
1999                 break;
2000         case KVM_CAP_COALESCED_MMIO:
2001                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2002                 break;
2003         case KVM_CAP_VAPIC:
2004                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2005                 break;
2006         case KVM_CAP_NR_VCPUS:
2007                 r = KVM_MAX_VCPUS;
2008                 break;
2009         case KVM_CAP_NR_MEMSLOTS:
2010                 r = KVM_MEMORY_SLOTS;
2011                 break;
2012         case KVM_CAP_PV_MMU:    /* obsolete */
2013                 r = 0;
2014                 break;
2015         case KVM_CAP_IOMMU:
2016                 r = iommu_found();
2017                 break;
2018         case KVM_CAP_MCE:
2019                 r = KVM_MAX_MCE_BANKS;
2020                 break;
2021         case KVM_CAP_XCRS:
2022                 r = cpu_has_xsave;
2023                 break;
2024         default:
2025                 r = 0;
2026                 break;
2027         }
2028         return r;
2029
2030 }
2031
2032 long kvm_arch_dev_ioctl(struct file *filp,
2033                         unsigned int ioctl, unsigned long arg)
2034 {
2035         void __user *argp = (void __user *)arg;
2036         long r;
2037
2038         switch (ioctl) {
2039         case KVM_GET_MSR_INDEX_LIST: {
2040                 struct kvm_msr_list __user *user_msr_list = argp;
2041                 struct kvm_msr_list msr_list;
2042                 unsigned n;
2043
2044                 r = -EFAULT;
2045                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2046                         goto out;
2047                 n = msr_list.nmsrs;
2048                 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
2049                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2050                         goto out;
2051                 r = -E2BIG;
2052                 if (n < msr_list.nmsrs)
2053                         goto out;
2054                 r = -EFAULT;
2055                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2056                                  num_msrs_to_save * sizeof(u32)))
2057                         goto out;
2058                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2059                                  &emulated_msrs,
2060                                  ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
2061                         goto out;
2062                 r = 0;
2063                 break;
2064         }
2065         case KVM_GET_SUPPORTED_CPUID: {
2066                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2067                 struct kvm_cpuid2 cpuid;
2068
2069                 r = -EFAULT;
2070                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2071                         goto out;
2072                 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2073                                                       cpuid_arg->entries);
2074                 if (r)
2075                         goto out;
2076
2077                 r = -EFAULT;
2078                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2079                         goto out;
2080                 r = 0;
2081                 break;
2082         }
2083         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2084                 u64 mce_cap;
2085
2086                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2087                 r = -EFAULT;
2088                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2089                         goto out;
2090                 r = 0;
2091                 break;
2092         }
2093         default:
2094                 r = -EINVAL;
2095         }
2096 out:
2097         return r;
2098 }
2099
2100 static void wbinvd_ipi(void *garbage)
2101 {
2102         wbinvd();
2103 }
2104
2105 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2106 {
2107         return vcpu->kvm->arch.iommu_domain &&
2108                 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2109 }
2110
2111 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2112 {
2113         /* Address WBINVD may be executed by guest */
2114         if (need_emulate_wbinvd(vcpu)) {
2115                 if (kvm_x86_ops->has_wbinvd_exit())
2116                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2117                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2118                         smp_call_function_single(vcpu->cpu,
2119                                         wbinvd_ipi, NULL, 1);
2120         }
2121
2122         kvm_x86_ops->vcpu_load(vcpu, cpu);
2123         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2124                 /* Make sure TSC doesn't go backwards */
2125                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2126                                 native_read_tsc() - vcpu->arch.last_host_tsc;
2127                 if (tsc_delta < 0)
2128                         mark_tsc_unstable("KVM discovered backwards TSC");
2129                 if (check_tsc_unstable()) {
2130                         kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2131                         vcpu->arch.tsc_catchup = 1;
2132                 }
2133                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2134                 if (vcpu->cpu != cpu)
2135                         kvm_migrate_timers(vcpu);
2136                 vcpu->cpu = cpu;
2137         }
2138 }
2139
2140 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2141 {
2142         kvm_x86_ops->vcpu_put(vcpu);
2143         kvm_put_guest_fpu(vcpu);
2144         vcpu->arch.last_host_tsc = native_read_tsc();
2145 }
2146
2147 static int is_efer_nx(void)
2148 {
2149         unsigned long long efer = 0;
2150
2151         rdmsrl_safe(MSR_EFER, &efer);
2152         return efer & EFER_NX;
2153 }
2154
2155 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2156 {
2157         int i;
2158         struct kvm_cpuid_entry2 *e, *entry;
2159
2160         entry = NULL;
2161         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2162                 e = &vcpu->arch.cpuid_entries[i];
2163                 if (e->function == 0x80000001) {
2164                         entry = e;
2165                         break;
2166                 }
2167         }
2168         if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2169                 entry->edx &= ~(1 << 20);
2170                 printk(KERN_INFO "kvm: guest NX capability removed\n");
2171         }
2172 }
2173
2174 /* when an old userspace process fills a new kernel module */
2175 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2176                                     struct kvm_cpuid *cpuid,
2177                                     struct kvm_cpuid_entry __user *entries)
2178 {
2179         int r, i;
2180         struct kvm_cpuid_entry *cpuid_entries;
2181
2182         r = -E2BIG;
2183         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2184                 goto out;
2185         r = -ENOMEM;
2186         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2187         if (!cpuid_entries)
2188                 goto out;
2189         r = -EFAULT;
2190         if (copy_from_user(cpuid_entries, entries,
2191                            cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2192                 goto out_free;
2193         for (i = 0; i < cpuid->nent; i++) {
2194                 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2195                 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2196                 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2197                 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2198                 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2199                 vcpu->arch.cpuid_entries[i].index = 0;
2200                 vcpu->arch.cpuid_entries[i].flags = 0;
2201                 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2202                 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2203                 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2204         }
2205         vcpu->arch.cpuid_nent = cpuid->nent;
2206         cpuid_fix_nx_cap(vcpu);
2207         r = 0;
2208         kvm_apic_set_version(vcpu);
2209         kvm_x86_ops->cpuid_update(vcpu);
2210         update_cpuid(vcpu);
2211
2212 out_free:
2213         vfree(cpuid_entries);
2214 out:
2215         return r;
2216 }
2217
2218 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2219                                      struct kvm_cpuid2 *cpuid,
2220                                      struct kvm_cpuid_entry2 __user *entries)
2221 {
2222         int r;
2223
2224         r = -E2BIG;
2225         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2226                 goto out;
2227         r = -EFAULT;
2228         if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2229                            cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2230                 goto out;
2231         vcpu->arch.cpuid_nent = cpuid->nent;
2232         kvm_apic_set_version(vcpu);
2233         kvm_x86_ops->cpuid_update(vcpu);
2234         update_cpuid(vcpu);
2235         return 0;
2236
2237 out:
2238         return r;
2239 }
2240
2241 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2242                                      struct kvm_cpuid2 *cpuid,
2243                                      struct kvm_cpuid_entry2 __user *entries)
2244 {
2245         int r;
2246
2247         r = -E2BIG;
2248         if (cpuid->nent < vcpu->arch.cpuid_nent)
2249                 goto out;
2250         r = -EFAULT;
2251         if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2252                          vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2253                 goto out;
2254         return 0;
2255
2256 out:
2257         cpuid->nent = vcpu->arch.cpuid_nent;
2258         return r;
2259 }
2260
2261 static void cpuid_mask(u32 *word, int wordnum)
2262 {
2263         *word &= boot_cpu_data.x86_capability[wordnum];
2264 }
2265
2266 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2267                            u32 index)
2268 {
2269         entry->function = function;
2270         entry->index = index;
2271         cpuid_count(entry->function, entry->index,
2272                     &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2273         entry->flags = 0;
2274 }
2275
2276 #define F(x) bit(X86_FEATURE_##x)
2277
2278 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2279                          u32 index, int *nent, int maxnent)
2280 {
2281         unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2282 #ifdef CONFIG_X86_64
2283         unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2284                                 ? F(GBPAGES) : 0;
2285         unsigned f_lm = F(LM);
2286 #else
2287         unsigned f_gbpages = 0;
2288         unsigned f_lm = 0;
2289 #endif
2290         unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2291
2292         /* cpuid 1.edx */
2293         const u32 kvm_supported_word0_x86_features =
2294                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2295                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2296                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2297                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2298                 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2299                 0 /* Reserved, DS, ACPI */ | F(MMX) |
2300                 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2301                 0 /* HTT, TM, Reserved, PBE */;
2302         /* cpuid 0x80000001.edx */
2303         const u32 kvm_supported_word1_x86_features =
2304                 F(FPU) | F(VME) | F(DE) | F(PSE) |
2305                 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2306                 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2307                 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2308                 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2309                 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2310                 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2311                 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2312         /* cpuid 1.ecx */
2313         const u32 kvm_supported_word4_x86_features =
2314                 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64 */ | F(MWAIT) |
2315                 0 /* DS-CPL, VMX, SMX, EST */ |
2316                 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2317                 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2318                 0 /* Reserved, DCA */ | F(XMM4_1) |
2319                 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2320                 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2321                 F(F16C);
2322         /* cpuid 0x80000001.ecx */
2323         const u32 kvm_supported_word6_x86_features =
2324                 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2325                 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2326                 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2327                 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2328
2329         /* all calls to cpuid_count() should be made on the same cpu */
2330         get_cpu();
2331         do_cpuid_1_ent(entry, function, index);
2332         ++*nent;
2333
2334         switch (function) {
2335         case 0:
2336                 entry->eax = min(entry->eax, (u32)0xd);
2337                 break;
2338         case 1:
2339                 entry->edx &= kvm_supported_word0_x86_features;
2340                 cpuid_mask(&entry->edx, 0);
2341                 entry->ecx &= kvm_supported_word4_x86_features;
2342                 cpuid_mask(&entry->ecx, 4);
2343                 /* we support x2apic emulation even if host does not support
2344                  * it since we emulate x2apic in software */
2345                 entry->ecx |= F(X2APIC);
2346                 break;
2347         /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2348          * may return different values. This forces us to get_cpu() before
2349          * issuing the first command, and also to emulate this annoying behavior
2350          * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2351         case 2: {
2352                 int t, times = entry->eax & 0xff;
2353
2354                 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2355                 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2356                 for (t = 1; t < times && *nent < maxnent; ++t) {
2357                         do_cpuid_1_ent(&entry[t], function, 0);
2358                         entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2359                         ++*nent;
2360                 }
2361                 break;
2362         }
2363         /* function 4 and 0xb have additional index. */
2364         case 4: {
2365                 int i, cache_type;
2366
2367                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2368                 /* read more entries until cache_type is zero */
2369                 for (i = 1; *nent < maxnent; ++i) {
2370                         cache_type = entry[i - 1].eax & 0x1f;
2371                         if (!cache_type)
2372                                 break;
2373                         do_cpuid_1_ent(&entry[i], function, i);
2374                         entry[i].flags |=
2375                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2376                         ++*nent;
2377                 }
2378                 break;
2379         }
2380         case 0xb: {
2381                 int i, level_type;
2382
2383                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2384                 /* read more entries until level_type is zero */
2385                 for (i = 1; *nent < maxnent; ++i) {
2386                         level_type = entry[i - 1].ecx & 0xff00;
2387                         if (!level_type)
2388                                 break;
2389                         do_cpuid_1_ent(&entry[i], function, i);
2390                         entry[i].flags |=
2391                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2392                         ++*nent;
2393                 }
2394                 break;
2395         }
2396         case 0xd: {
2397                 int i;
2398
2399                 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2400                 for (i = 1; *nent < maxnent && i < 64; ++i) {
2401                         if (entry[i].eax == 0)
2402                                 continue;
2403                         do_cpuid_1_ent(&entry[i], function, i);
2404                         entry[i].flags |=
2405                                KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2406                         ++*nent;
2407                 }
2408                 break;
2409         }
2410         case KVM_CPUID_SIGNATURE: {
2411                 char signature[12] = "KVMKVMKVM\0\0";
2412                 u32 *sigptr = (u32 *)signature;
2413                 entry->eax = 0;
2414                 entry->ebx = sigptr[0];
2415                 entry->ecx = sigptr[1];
2416                 entry->edx = sigptr[2];
2417                 break;
2418         }
2419         case KVM_CPUID_FEATURES:
2420                 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2421                              (1 << KVM_FEATURE_NOP_IO_DELAY) |
2422                              (1 << KVM_FEATURE_CLOCKSOURCE2) |
2423                              (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2424                 entry->ebx = 0;
2425                 entry->ecx = 0;
2426                 entry->edx = 0;
2427                 break;
2428         case 0x80000000:
2429                 entry->eax = min(entry->eax, 0x8000001a);
2430                 break;
2431         case 0x80000001:
2432                 entry->edx &= kvm_supported_word1_x86_features;
2433                 cpuid_mask(&entry->edx, 1);
2434                 entry->ecx &= kvm_supported_word6_x86_features;
2435                 cpuid_mask(&entry->ecx, 6);
2436                 break;
2437         }
2438
2439         kvm_x86_ops->set_supported_cpuid(function, entry);
2440
2441         put_cpu();
2442 }
2443
2444 #undef F
2445
2446 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2447                                      struct kvm_cpuid_entry2 __user *entries)
2448 {
2449         struct kvm_cpuid_entry2 *cpuid_entries;
2450         int limit, nent = 0, r = -E2BIG;
2451         u32 func;
2452
2453         if (cpuid->nent < 1)
2454                 goto out;
2455         if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2456                 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2457         r = -ENOMEM;
2458         cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2459         if (!cpuid_entries)
2460                 goto out;
2461
2462         do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2463         limit = cpuid_entries[0].eax;
2464         for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2465                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2466                              &nent, cpuid->nent);
2467         r = -E2BIG;
2468         if (nent >= cpuid->nent)
2469                 goto out_free;
2470
2471         do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2472         limit = cpuid_entries[nent - 1].eax;
2473         for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2474                 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2475                              &nent, cpuid->nent);
2476
2477
2478
2479         r = -E2BIG;
2480         if (nent >= cpuid->nent)
2481                 goto out_free;
2482
2483         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2484                      cpuid->nent);
2485
2486         r = -E2BIG;
2487         if (nent >= cpuid->nent)
2488                 goto out_free;
2489
2490         do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2491                      cpuid->nent);
2492
2493         r = -E2BIG;
2494         if (nent >= cpuid->nent)
2495                 goto out_free;
2496
2497         r = -EFAULT;
2498         if (copy_to_user(entries, cpuid_entries,
2499                          nent * sizeof(struct kvm_cpuid_entry2)))
2500                 goto out_free;
2501         cpuid->nent = nent;
2502         r = 0;
2503
2504 out_free:
2505         vfree(cpuid_entries);
2506 out:
2507         return r;
2508 }
2509
2510 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2511                                     struct kvm_lapic_state *s)
2512 {
2513         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2514
2515         return 0;
2516 }
2517
2518 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2519                                     struct kvm_lapic_state *s)
2520 {
2521         memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2522         kvm_apic_post_state_restore(vcpu);
2523         update_cr8_intercept(vcpu);
2524
2525         return 0;
2526 }
2527
2528 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2529                                     struct kvm_interrupt *irq)
2530 {
2531         if (irq->irq < 0 || irq->irq >= 256)
2532                 return -EINVAL;
2533         if (irqchip_in_kernel(vcpu->kvm))
2534                 return -ENXIO;
2535
2536         kvm_queue_interrupt(vcpu, irq->irq, false);
2537         kvm_make_request(KVM_REQ_EVENT, vcpu);
2538
2539         return 0;
2540 }
2541
2542 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2543 {
2544         kvm_inject_nmi(vcpu);
2545
2546         return 0;
2547 }
2548
2549 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2550                                            struct kvm_tpr_access_ctl *tac)
2551 {
2552         if (tac->flags)
2553                 return -EINVAL;
2554         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2555         return 0;
2556 }
2557
2558 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2559                                         u64 mcg_cap)
2560 {
2561         int r;
2562         unsigned bank_num = mcg_cap & 0xff, bank;
2563
2564         r = -EINVAL;
2565         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2566                 goto out;
2567         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2568                 goto out;
2569         r = 0;
2570         vcpu->arch.mcg_cap = mcg_cap;
2571         /* Init IA32_MCG_CTL to all 1s */
2572         if (mcg_cap & MCG_CTL_P)
2573                 vcpu->arch.mcg_ctl = ~(u64)0;
2574         /* Init IA32_MCi_CTL to all 1s */
2575         for (bank = 0; bank < bank_num; bank++)
2576                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2577 out:
2578         return r;
2579 }
2580
2581 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2582                                       struct kvm_x86_mce *mce)
2583 {
2584         u64 mcg_cap = vcpu->arch.mcg_cap;
2585         unsigned bank_num = mcg_cap & 0xff;
2586         u64 *banks = vcpu->arch.mce_banks;
2587
2588         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2589                 return -EINVAL;
2590         /*
2591          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2592          * reporting is disabled
2593          */
2594         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2595             vcpu->arch.mcg_ctl != ~(u64)0)
2596                 return 0;
2597         banks += 4 * mce->bank;
2598         /*
2599          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2600          * reporting is disabled for the bank
2601          */
2602         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2603                 return 0;
2604         if (mce->status & MCI_STATUS_UC) {
2605                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2606                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2607                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2608                         return 0;
2609                 }
2610                 if (banks[1] & MCI_STATUS_VAL)
2611                         mce->status |= MCI_STATUS_OVER;
2612                 banks[2] = mce->addr;
2613                 banks[3] = mce->misc;
2614                 vcpu->arch.mcg_status = mce->mcg_status;
2615                 banks[1] = mce->status;
2616                 kvm_queue_exception(vcpu, MC_VECTOR);
2617         } else if (!(banks[1] & MCI_STATUS_VAL)
2618                    || !(banks[1] & MCI_STATUS_UC)) {
2619                 if (banks[1] & MCI_STATUS_VAL)
2620                         mce->status |= MCI_STATUS_OVER;
2621                 banks[2] = mce->addr;
2622                 banks[3] = mce->misc;
2623                 banks[1] = mce->status;
2624         } else
2625                 banks[1] |= MCI_STATUS_OVER;
2626         return 0;
2627 }
2628
2629 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2630                                                struct kvm_vcpu_events *events)
2631 {
2632         events->exception.injected =
2633                 vcpu->arch.exception.pending &&
2634                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2635         events->exception.nr = vcpu->arch.exception.nr;
2636         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2637         events->exception.pad = 0;
2638         events->exception.error_code = vcpu->arch.exception.error_code;
2639
2640         events->interrupt.injected =
2641                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2642         events->interrupt.nr = vcpu->arch.interrupt.nr;
2643         events->interrupt.soft = 0;
2644         events->interrupt.shadow =
2645                 kvm_x86_ops->get_interrupt_shadow(vcpu,
2646                         KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2647
2648         events->nmi.injected = vcpu->arch.nmi_injected;
2649         events->nmi.pending = vcpu->arch.nmi_pending;
2650         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2651         events->nmi.pad = 0;
2652
2653         events->sipi_vector = vcpu->arch.sipi_vector;
2654
2655         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2656                          | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2657                          | KVM_VCPUEVENT_VALID_SHADOW);
2658         memset(&events->reserved, 0, sizeof(events->reserved));
2659 }
2660
2661 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2662                                               struct kvm_vcpu_events *events)
2663 {
2664         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2665                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2666                               | KVM_VCPUEVENT_VALID_SHADOW))
2667                 return -EINVAL;
2668
2669         vcpu->arch.exception.pending = events->exception.injected;
2670         vcpu->arch.exception.nr = events->exception.nr;
2671         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2672         vcpu->arch.exception.error_code = events->exception.error_code;
2673
2674         vcpu->arch.interrupt.pending = events->interrupt.injected;
2675         vcpu->arch.interrupt.nr = events->interrupt.nr;
2676         vcpu->arch.interrupt.soft = events->interrupt.soft;
2677         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2678                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2679                                                   events->interrupt.shadow);
2680
2681         vcpu->arch.nmi_injected = events->nmi.injected;
2682         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2683                 vcpu->arch.nmi_pending = events->nmi.pending;
2684         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2685
2686         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2687                 vcpu->arch.sipi_vector = events->sipi_vector;
2688
2689         kvm_make_request(KVM_REQ_EVENT, vcpu);
2690
2691         return 0;
2692 }
2693
2694 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2695                                              struct kvm_debugregs *dbgregs)
2696 {
2697         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2698         dbgregs->dr6 = vcpu->arch.dr6;
2699         dbgregs->dr7 = vcpu->arch.dr7;
2700         dbgregs->flags = 0;
2701         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2702 }
2703
2704 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2705                                             struct kvm_debugregs *dbgregs)
2706 {
2707         if (dbgregs->flags)
2708                 return -EINVAL;
2709
2710         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2711         vcpu->arch.dr6 = dbgregs->dr6;
2712         vcpu->arch.dr7 = dbgregs->dr7;
2713
2714         return 0;
2715 }
2716
2717 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2718                                          struct kvm_xsave *guest_xsave)
2719 {
2720         if (cpu_has_xsave)
2721                 memcpy(guest_xsave->region,
2722                         &vcpu->arch.guest_fpu.state->xsave,
2723                         xstate_size);
2724         else {
2725                 memcpy(guest_xsave->region,
2726                         &vcpu->arch.guest_fpu.state->fxsave,
2727                         sizeof(struct i387_fxsave_struct));
2728                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2729                         XSTATE_FPSSE;
2730         }
2731 }
2732
2733 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2734                                         struct kvm_xsave *guest_xsave)
2735 {
2736         u64 xstate_bv =
2737                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2738
2739         if (cpu_has_xsave)
2740                 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2741                         guest_xsave->region, xstate_size);
2742         else {
2743                 if (xstate_bv & ~XSTATE_FPSSE)
2744                         return -EINVAL;
2745                 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2746                         guest_xsave->region, sizeof(struct i387_fxsave_struct));
2747         }
2748         return 0;
2749 }
2750
2751 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2752                                         struct kvm_xcrs *guest_xcrs)
2753 {
2754         if (!cpu_has_xsave) {
2755                 guest_xcrs->nr_xcrs = 0;
2756                 return;
2757         }
2758
2759         guest_xcrs->nr_xcrs = 1;
2760         guest_xcrs->flags = 0;
2761         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2762         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2763 }
2764
2765 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2766                                        struct kvm_xcrs *guest_xcrs)
2767 {
2768         int i, r = 0;
2769
2770         if (!cpu_has_xsave)
2771                 return -EINVAL;
2772
2773         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2774                 return -EINVAL;
2775
2776         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2777                 /* Only support XCR0 currently */
2778                 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2779                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2780                                 guest_xcrs->xcrs[0].value);
2781                         break;
2782                 }
2783         if (r)
2784                 r = -EINVAL;
2785         return r;
2786 }
2787
2788 long kvm_arch_vcpu_ioctl(struct file *filp,
2789                          unsigned int ioctl, unsigned long arg)
2790 {
2791         struct kvm_vcpu *vcpu = filp->private_data;
2792         void __user *argp = (void __user *)arg;
2793         int r;
2794         union {
2795                 struct kvm_lapic_state *lapic;
2796                 struct kvm_xsave *xsave;
2797                 struct kvm_xcrs *xcrs;
2798                 void *buffer;
2799         } u;
2800
2801         u.buffer = NULL;
2802         switch (ioctl) {
2803         case KVM_GET_LAPIC: {
2804                 r = -EINVAL;
2805                 if (!vcpu->arch.apic)
2806                         goto out;
2807                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2808
2809                 r = -ENOMEM;
2810                 if (!u.lapic)
2811                         goto out;
2812                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2813                 if (r)
2814                         goto out;
2815                 r = -EFAULT;
2816                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2817                         goto out;
2818                 r = 0;
2819                 break;
2820         }
2821         case KVM_SET_LAPIC: {
2822                 r = -EINVAL;
2823                 if (!vcpu->arch.apic)
2824                         goto out;
2825                 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2826                 r = -ENOMEM;
2827                 if (!u.lapic)
2828                         goto out;
2829                 r = -EFAULT;
2830                 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2831                         goto out;
2832                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2833                 if (r)
2834                         goto out;
2835                 r = 0;
2836                 break;
2837         }
2838         case KVM_INTERRUPT: {
2839                 struct kvm_interrupt irq;
2840
2841                 r = -EFAULT;
2842                 if (copy_from_user(&irq, argp, sizeof irq))
2843                         goto out;
2844                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2845                 if (r)
2846                         goto out;
2847                 r = 0;
2848                 break;
2849         }
2850         case KVM_NMI: {
2851                 r = kvm_vcpu_ioctl_nmi(vcpu);
2852                 if (r)
2853                         goto out;
2854                 r = 0;
2855                 break;
2856         }
2857         case KVM_SET_CPUID: {
2858                 struct kvm_cpuid __user *cpuid_arg = argp;
2859                 struct kvm_cpuid cpuid;
2860
2861                 r = -EFAULT;
2862                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2863                         goto out;
2864                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2865                 if (r)
2866                         goto out;
2867                 break;
2868         }
2869         case KVM_SET_CPUID2: {
2870                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2871                 struct kvm_cpuid2 cpuid;
2872
2873                 r = -EFAULT;
2874                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2875                         goto out;
2876                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2877                                               cpuid_arg->entries);
2878                 if (r)
2879                         goto out;
2880                 break;
2881         }
2882         case KVM_GET_CPUID2: {
2883                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2884                 struct kvm_cpuid2 cpuid;
2885
2886                 r = -EFAULT;
2887                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2888                         goto out;
2889                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2890                                               cpuid_arg->entries);
2891                 if (r)
2892                         goto out;
2893                 r = -EFAULT;
2894                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2895                         goto out;
2896                 r = 0;
2897                 break;
2898         }
2899         case KVM_GET_MSRS:
2900                 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2901                 break;
2902         case KVM_SET_MSRS:
2903                 r = msr_io(vcpu, argp, do_set_msr, 0);
2904                 break;
2905         case KVM_TPR_ACCESS_REPORTING: {
2906                 struct kvm_tpr_access_ctl tac;
2907
2908                 r = -EFAULT;
2909                 if (copy_from_user(&tac, argp, sizeof tac))
2910                         goto out;
2911                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2912                 if (r)
2913                         goto out;
2914                 r = -EFAULT;
2915                 if (copy_to_user(argp, &tac, sizeof tac))
2916                         goto out;
2917                 r = 0;
2918                 break;
2919         };
2920         case KVM_SET_VAPIC_ADDR: {
2921                 struct kvm_vapic_addr va;
2922
2923                 r = -EINVAL;
2924                 if (!irqchip_in_kernel(vcpu->kvm))
2925                         goto out;
2926                 r = -EFAULT;
2927                 if (copy_from_user(&va, argp, sizeof va))
2928                         goto out;
2929                 r = 0;
2930                 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2931                 break;
2932         }
2933         case KVM_X86_SETUP_MCE: {
2934                 u64 mcg_cap;
2935
2936                 r = -EFAULT;
2937                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2938                         goto out;
2939                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2940                 break;
2941         }
2942         case KVM_X86_SET_MCE: {
2943                 struct kvm_x86_mce mce;
2944
2945                 r = -EFAULT;
2946                 if (copy_from_user(&mce, argp, sizeof mce))
2947                         goto out;
2948                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2949                 break;
2950         }
2951         case KVM_GET_VCPU_EVENTS: {
2952                 struct kvm_vcpu_events events;
2953
2954                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2955
2956                 r = -EFAULT;
2957                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2958                         break;
2959                 r = 0;
2960                 break;
2961         }
2962         case KVM_SET_VCPU_EVENTS: {
2963                 struct kvm_vcpu_events events;
2964
2965                 r = -EFAULT;
2966                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2967                         break;
2968
2969                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2970                 break;
2971         }
2972         case KVM_GET_DEBUGREGS: {
2973                 struct kvm_debugregs dbgregs;
2974
2975                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2976
2977                 r = -EFAULT;
2978                 if (copy_to_user(argp, &dbgregs,
2979                                  sizeof(struct kvm_debugregs)))
2980                         break;
2981                 r = 0;
2982                 break;
2983         }
2984         case KVM_SET_DEBUGREGS: {
2985                 struct kvm_debugregs dbgregs;
2986
2987                 r = -EFAULT;
2988                 if (copy_from_user(&dbgregs, argp,
2989                                    sizeof(struct kvm_debugregs)))
2990                         break;
2991
2992                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2993                 break;
2994         }
2995         case KVM_GET_XSAVE: {
2996                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2997                 r = -ENOMEM;
2998                 if (!u.xsave)
2999                         break;
3000
3001                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3002
3003                 r = -EFAULT;
3004                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3005                         break;
3006                 r = 0;
3007                 break;
3008         }
3009         case KVM_SET_XSAVE: {
3010                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3011                 r = -ENOMEM;
3012                 if (!u.xsave)
3013                         break;
3014
3015                 r = -EFAULT;
3016                 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
3017                         break;
3018
3019                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3020                 break;
3021         }
3022         case KVM_GET_XCRS: {
3023                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3024                 r = -ENOMEM;
3025                 if (!u.xcrs)
3026                         break;
3027
3028                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3029
3030                 r = -EFAULT;
3031                 if (copy_to_user(argp, u.xcrs,
3032                                  sizeof(struct kvm_xcrs)))
3033                         break;
3034                 r = 0;
3035                 break;
3036         }
3037         case KVM_SET_XCRS: {
3038                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3039                 r = -ENOMEM;
3040                 if (!u.xcrs)
3041                         break;
3042
3043                 r = -EFAULT;
3044                 if (copy_from_user(u.xcrs, argp,
3045                                    sizeof(struct kvm_xcrs)))
3046                         break;
3047
3048                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3049                 break;
3050         }
3051         default:
3052                 r = -EINVAL;
3053         }
3054 out:
3055         kfree(u.buffer);
3056         return r;
3057 }
3058
3059 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3060 {
3061         int ret;
3062
3063         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3064                 return -1;
3065         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3066         return ret;
3067 }
3068
3069 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3070                                               u64 ident_addr)
3071 {
3072         kvm->arch.ept_identity_map_addr = ident_addr;
3073         return 0;
3074 }
3075
3076 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3077                                           u32 kvm_nr_mmu_pages)
3078 {
3079         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3080                 return -EINVAL;
3081
3082         mutex_lock(&kvm->slots_lock);
3083         spin_lock(&kvm->mmu_lock);
3084
3085         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3086         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3087
3088         spin_unlock(&kvm->mmu_lock);
3089         mutex_unlock(&kvm->slots_lock);
3090         return 0;
3091 }
3092
3093 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3094 {
3095         return kvm->arch.n_max_mmu_pages;
3096 }
3097
3098 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3099 {
3100         int r;
3101
3102         r = 0;
3103         switch (chip->chip_id) {
3104         case KVM_IRQCHIP_PIC_MASTER:
3105                 memcpy(&chip->chip.pic,
3106                         &pic_irqchip(kvm)->pics[0],
3107                         sizeof(struct kvm_pic_state));
3108                 break;
3109         case KVM_IRQCHIP_PIC_SLAVE:
3110                 memcpy(&chip->chip.pic,
3111                         &pic_irqchip(kvm)->pics[1],
3112                         sizeof(struct kvm_pic_state));
3113                 break;
3114         case KVM_IRQCHIP_IOAPIC:
3115                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3116                 break;
3117         default:
3118                 r = -EINVAL;
3119                 break;
3120         }
3121         return r;
3122 }
3123
3124 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3125 {
3126         int r;
3127
3128         r = 0;
3129         switch (chip->chip_id) {
3130         case KVM_IRQCHIP_PIC_MASTER:
3131                 spin_lock(&pic_irqchip(kvm)->lock);
3132                 memcpy(&pic_irqchip(kvm)->pics[0],
3133                         &chip->chip.pic,
3134                         sizeof(struct kvm_pic_state));
3135                 spin_unlock(&pic_irqchip(kvm)->lock);
3136                 break;
3137         case KVM_IRQCHIP_PIC_SLAVE:
3138                 spin_lock(&pic_irqchip(kvm)->lock);
3139                 memcpy(&pic_irqchip(kvm)->pics[1],
3140                         &chip->chip.pic,
3141                         sizeof(struct kvm_pic_state));
3142                 spin_unlock(&pic_irqchip(kvm)->lock);
3143                 break;
3144         case KVM_IRQCHIP_IOAPIC:
3145                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3146                 break;
3147         default:
3148                 r = -EINVAL;
3149                 break;
3150         }
3151         kvm_pic_update_irq(pic_irqchip(kvm));
3152         return r;
3153 }
3154
3155 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3156 {
3157         int r = 0;
3158
3159         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3160         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3161         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3162         return r;
3163 }
3164
3165 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3166 {
3167         int r = 0;
3168
3169         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3170         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3171         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3172         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3173         return r;
3174 }
3175
3176 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3177 {
3178         int r = 0;
3179
3180         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3181         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3182                 sizeof(ps->channels));
3183         ps->flags = kvm->arch.vpit->pit_state.flags;
3184         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3185         memset(&ps->reserved, 0, sizeof(ps->reserved));
3186         return r;
3187 }
3188
3189 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3190 {
3191         int r = 0, start = 0;
3192         u32 prev_legacy, cur_legacy;
3193         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3194         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3195         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3196         if (!prev_legacy && cur_legacy)
3197                 start = 1;
3198         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3199                sizeof(kvm->arch.vpit->pit_state.channels));
3200         kvm->arch.vpit->pit_state.flags = ps->flags;
3201         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3202         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3203         return r;
3204 }
3205
3206 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3207                                  struct kvm_reinject_control *control)
3208 {
3209         if (!kvm->arch.vpit)
3210                 return -ENXIO;
3211         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3212         kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3213         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3214         return 0;
3215 }
3216
3217 /*
3218  * Get (and clear) the dirty memory log for a memory slot.
3219  */
3220 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3221                                       struct kvm_dirty_log *log)
3222 {
3223         int r, i;
3224         struct kvm_memory_slot *memslot;
3225         unsigned long n;
3226         unsigned long is_dirty = 0;
3227
3228         mutex_lock(&kvm->slots_lock);
3229
3230         r = -EINVAL;
3231         if (log->slot >= KVM_MEMORY_SLOTS)
3232                 goto out;
3233
3234         memslot = &kvm->memslots->memslots[log->slot];
3235         r = -ENOENT;
3236         if (!memslot->dirty_bitmap)
3237                 goto out;
3238
3239         n = kvm_dirty_bitmap_bytes(memslot);
3240
3241         for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3242                 is_dirty = memslot->dirty_bitmap[i];
3243
3244         /* If nothing is dirty, don't bother messing with page tables. */
3245         if (is_dirty) {
3246                 struct kvm_memslots *slots, *old_slots;
3247                 unsigned long *dirty_bitmap;
3248
3249                 dirty_bitmap = memslot->dirty_bitmap_head;
3250                 if (memslot->dirty_bitmap == dirty_bitmap)
3251                         dirty_bitmap += n / sizeof(long);
3252                 memset(dirty_bitmap, 0, n);
3253
3254                 r = -ENOMEM;
3255                 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3256                 if (!slots)
3257                         goto out;
3258                 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3259                 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3260                 slots->generation++;
3261
3262                 old_slots = kvm->memslots;
3263                 rcu_assign_pointer(kvm->memslots, slots);
3264                 synchronize_srcu_expedited(&kvm->srcu);
3265                 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3266                 kfree(old_slots);
3267
3268                 spin_lock(&kvm->mmu_lock);
3269                 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3270                 spin_unlock(&kvm->mmu_lock);
3271
3272                 r = -EFAULT;
3273                 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n))
3274                         goto out;
3275         } else {
3276                 r = -EFAULT;
3277                 if (clear_user(log->dirty_bitmap, n))
3278                         goto out;
3279         }
3280
3281         r = 0;
3282 out:
3283         mutex_unlock(&kvm->slots_lock);
3284         return r;
3285 }
3286
3287 long kvm_arch_vm_ioctl(struct file *filp,
3288                        unsigned int ioctl, unsigned long arg)
3289 {
3290         struct kvm *kvm = filp->private_data;
3291         void __user *argp = (void __user *)arg;
3292         int r = -ENOTTY;
3293         /*
3294          * This union makes it completely explicit to gcc-3.x
3295          * that these two variables' stack usage should be
3296          * combined, not added together.
3297          */
3298         union {
3299                 struct kvm_pit_state ps;
3300                 struct kvm_pit_state2 ps2;
3301                 struct kvm_pit_config pit_config;
3302         } u;
3303
3304         switch (ioctl) {
3305         case KVM_SET_TSS_ADDR:
3306                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3307                 if (r < 0)
3308                         goto out;
3309                 break;
3310         case KVM_SET_IDENTITY_MAP_ADDR: {
3311                 u64 ident_addr;
3312
3313                 r = -EFAULT;
3314                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3315                         goto out;
3316                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3317                 if (r < 0)
3318                         goto out;
3319                 break;
3320         }
3321         case KVM_SET_NR_MMU_PAGES:
3322                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3323                 if (r)
3324                         goto out;
3325                 break;
3326         case KVM_GET_NR_MMU_PAGES:
3327                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3328                 break;
3329         case KVM_CREATE_IRQCHIP: {
3330                 struct kvm_pic *vpic;
3331
3332                 mutex_lock(&kvm->lock);
3333                 r = -EEXIST;
3334                 if (kvm->arch.vpic)
3335                         goto create_irqchip_unlock;
3336                 r = -ENOMEM;
3337                 vpic = kvm_create_pic(kvm);
3338                 if (vpic) {
3339                         r = kvm_ioapic_init(kvm);
3340                         if (r) {
3341                                 mutex_lock(&kvm->slots_lock);
3342                                 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3343                                                           &vpic->dev);
3344                                 mutex_unlock(&kvm->slots_lock);
3345                                 kfree(vpic);
3346                                 goto create_irqchip_unlock;
3347                         }
3348                 } else
3349                         goto create_irqchip_unlock;
3350                 smp_wmb();
3351                 kvm->arch.vpic = vpic;
3352                 smp_wmb();
3353                 r = kvm_setup_default_irq_routing(kvm);
3354                 if (r) {
3355                         mutex_lock(&kvm->slots_lock);
3356                         mutex_lock(&kvm->irq_lock);
3357                         kvm_ioapic_destroy(kvm);
3358                         kvm_destroy_pic(kvm);
3359                         mutex_unlock(&kvm->irq_lock);
3360                         mutex_unlock(&kvm->slots_lock);
3361                 }
3362         create_irqchip_unlock:
3363                 mutex_unlock(&kvm->lock);
3364                 break;
3365         }
3366         case KVM_CREATE_PIT:
3367                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3368                 goto create_pit;
3369         case KVM_CREATE_PIT2:
3370                 r = -EFAULT;
3371                 if (copy_from_user(&u.pit_config, argp,
3372                                    sizeof(struct kvm_pit_config)))
3373                         goto out;
3374         create_pit:
3375                 mutex_lock(&kvm->slots_lock);
3376                 r = -EEXIST;
3377                 if (kvm->arch.vpit)
3378                         goto create_pit_unlock;
3379                 r = -ENOMEM;
3380                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3381                 if (kvm->arch.vpit)
3382                         r = 0;
3383         create_pit_unlock:
3384                 mutex_unlock(&kvm->slots_lock);
3385                 break;
3386         case KVM_IRQ_LINE_STATUS:
3387         case KVM_IRQ_LINE: {
3388                 struct kvm_irq_level irq_event;
3389
3390                 r = -EFAULT;
3391                 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3392                         goto out;
3393                 r = -ENXIO;
3394                 if (irqchip_in_kernel(kvm)) {
3395                         __s32 status;
3396                         status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3397                                         irq_event.irq, irq_event.level);
3398                         if (ioctl == KVM_IRQ_LINE_STATUS) {
3399                                 r = -EFAULT;
3400                                 irq_event.status = status;
3401                                 if (copy_to_user(argp, &irq_event,
3402                                                         sizeof irq_event))
3403                                         goto out;
3404                         }
3405                         r = 0;
3406                 }
3407                 break;
3408         }
3409         case KVM_GET_IRQCHIP: {
3410                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3411                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3412
3413                 r = -ENOMEM;
3414                 if (!chip)
3415                         goto out;
3416                 r = -EFAULT;
3417                 if (copy_from_user(chip, argp, sizeof *chip))
3418                         goto get_irqchip_out;
3419                 r = -ENXIO;
3420                 if (!irqchip_in_kernel(kvm))
3421                         goto get_irqchip_out;
3422                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3423                 if (r)
3424                         goto get_irqchip_out;
3425                 r = -EFAULT;
3426                 if (copy_to_user(argp, chip, sizeof *chip))
3427                         goto get_irqchip_out;
3428                 r = 0;
3429         get_irqchip_out:
3430                 kfree(chip);
3431                 if (r)
3432                         goto out;
3433                 break;
3434         }
3435         case KVM_SET_IRQCHIP: {
3436                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3437                 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3438
3439                 r = -ENOMEM;
3440                 if (!chip)
3441                         goto out;
3442                 r = -EFAULT;
3443                 if (copy_from_user(chip, argp, sizeof *chip))
3444                         goto set_irqchip_out;
3445                 r = -ENXIO;
3446                 if (!irqchip_in_kernel(kvm))
3447                         goto set_irqchip_out;
3448                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3449                 if (r)
3450                         goto set_irqchip_out;
3451                 r = 0;
3452         set_irqchip_out:
3453                 kfree(chip);
3454                 if (r)
3455                         goto out;
3456                 break;
3457         }
3458         case KVM_GET_PIT: {
3459                 r = -EFAULT;
3460                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3461                         goto out;
3462                 r = -ENXIO;
3463                 if (!kvm->arch.vpit)
3464                         goto out;
3465                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3466                 if (r)
3467                         goto out;
3468                 r = -EFAULT;
3469                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3470                         goto out;
3471                 r = 0;
3472                 break;
3473         }
3474         case KVM_SET_PIT: {
3475                 r = -EFAULT;
3476                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3477                         goto out;
3478                 r = -ENXIO;
3479                 if (!kvm->arch.vpit)
3480                         goto out;
3481                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3482                 if (r)
3483                         goto out;
3484                 r = 0;
3485                 break;
3486         }
3487         case KVM_GET_PIT2: {
3488                 r = -ENXIO;
3489                 if (!kvm->arch.vpit)
3490                         goto out;
3491                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3492                 if (r)
3493                         goto out;
3494                 r = -EFAULT;
3495                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3496                         goto out;
3497                 r = 0;
3498                 break;
3499         }
3500         case KVM_SET_PIT2: {
3501                 r = -EFAULT;
3502                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3503                         goto out;
3504                 r = -ENXIO;
3505                 if (!kvm->arch.vpit)
3506                         goto out;
3507                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3508                 if (r)
3509                         goto out;
3510                 r = 0;
3511                 break;
3512         }
3513         case KVM_REINJECT_CONTROL: {
3514                 struct kvm_reinject_control control;
3515                 r =  -EFAULT;
3516                 if (copy_from_user(&control, argp, sizeof(control)))
3517                         goto out;
3518                 r = kvm_vm_ioctl_reinject(kvm, &control);
3519                 if (r)
3520                         goto out;
3521                 r = 0;
3522                 break;
3523         }
3524         case KVM_XEN_HVM_CONFIG: {
3525                 r = -EFAULT;
3526                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3527                                    sizeof(struct kvm_xen_hvm_config)))
3528                         goto out;
3529                 r = -EINVAL;
3530                 if (kvm->arch.xen_hvm_config.flags)
3531                         goto out;
3532                 r = 0;
3533                 break;
3534         }
3535         case KVM_SET_CLOCK: {
3536                 struct kvm_clock_data user_ns;
3537                 u64 now_ns;
3538                 s64 delta;
3539
3540                 r = -EFAULT;
3541                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3542                         goto out;
3543
3544                 r = -EINVAL;
3545                 if (user_ns.flags)
3546                         goto out;
3547
3548                 r = 0;
3549                 local_irq_disable();
3550                 now_ns = get_kernel_ns();
3551                 delta = user_ns.clock - now_ns;
3552                 local_irq_enable();
3553                 kvm->arch.kvmclock_offset = delta;
3554                 break;
3555         }
3556         case KVM_GET_CLOCK: {
3557                 struct kvm_clock_data user_ns;
3558                 u64 now_ns;
3559
3560                 local_irq_disable();
3561                 now_ns = get_kernel_ns();
3562                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3563                 local_irq_enable();
3564                 user_ns.flags = 0;
3565                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3566
3567                 r = -EFAULT;
3568                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3569                         goto out;
3570                 r = 0;
3571                 break;
3572         }
3573
3574         default:
3575                 ;
3576         }
3577 out:
3578         return r;
3579 }
3580
3581 static void kvm_init_msr_list(void)
3582 {
3583         u32 dummy[2];
3584         unsigned i, j;
3585
3586         /* skip the first msrs in the list. KVM-specific */
3587         for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3588                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3589                         continue;
3590                 if (j < i)
3591                         msrs_to_save[j] = msrs_to_save[i];
3592                 j++;
3593         }
3594         num_msrs_to_save = j;
3595 }
3596
3597 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3598                            const void *v)
3599 {
3600         if (vcpu->arch.apic &&
3601             !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3602                 return 0;
3603
3604         return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3605 }
3606
3607 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3608 {
3609         if (vcpu->arch.apic &&
3610             !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3611                 return 0;
3612
3613         return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3614 }
3615
3616 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3617                         struct kvm_segment *var, int seg)
3618 {
3619         kvm_x86_ops->set_segment(vcpu, var, seg);
3620 }
3621
3622 void kvm_get_segment(struct kvm_vcpu *vcpu,
3623                      struct kvm_segment *var, int seg)
3624 {
3625         kvm_x86_ops->get_segment(vcpu, var, seg);
3626 }
3627
3628 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3629 {
3630         return gpa;
3631 }
3632
3633 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3634 {
3635         gpa_t t_gpa;
3636         struct x86_exception exception;
3637
3638         BUG_ON(!mmu_is_nested(vcpu));
3639
3640         /* NPT walks are always user-walks */
3641         access |= PFERR_USER_MASK;
3642         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &exception);
3643
3644         return t_gpa;
3645 }
3646
3647 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3648                               struct x86_exception *exception)
3649 {
3650         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3651         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3652 }
3653
3654  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3655                                 struct x86_exception *exception)
3656 {
3657         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3658         access |= PFERR_FETCH_MASK;
3659         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3660 }
3661
3662 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3663                                struct x86_exception *exception)
3664 {
3665         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3666         access |= PFERR_WRITE_MASK;
3667         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3668 }
3669
3670 /* uses this to access any guest's mapped memory without checking CPL */
3671 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3672                                 struct x86_exception *exception)
3673 {
3674         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
3675 }
3676
3677 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3678                                       struct kvm_vcpu *vcpu, u32 access,
3679                                       struct x86_exception *exception)
3680 {
3681         void *data = val;
3682         int r = X86EMUL_CONTINUE;
3683
3684         while (bytes) {
3685                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3686                                                             exception);
3687                 unsigned offset = addr & (PAGE_SIZE-1);
3688                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3689                 int ret;
3690
3691                 if (gpa == UNMAPPED_GVA)
3692                         return X86EMUL_PROPAGATE_FAULT;
3693                 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3694                 if (ret < 0) {
3695                         r = X86EMUL_IO_NEEDED;
3696                         goto out;
3697                 }
3698
3699                 bytes -= toread;
3700                 data += toread;
3701                 addr += toread;
3702         }
3703 out:
3704         return r;
3705 }
3706
3707 /* used for instruction fetching */
3708 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3709                                 struct kvm_vcpu *vcpu,
3710                                 struct x86_exception *exception)
3711 {
3712         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3713         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3714                                           access | PFERR_FETCH_MASK,
3715                                           exception);
3716 }
3717
3718 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3719                                struct kvm_vcpu *vcpu,
3720                                struct x86_exception *exception)
3721 {
3722         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3723         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3724                                           exception);
3725 }
3726
3727 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3728                                       struct kvm_vcpu *vcpu,
3729                                       struct x86_exception *exception)
3730 {
3731         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
3732 }
3733
3734 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3735                                        unsigned int bytes,
3736                                        struct kvm_vcpu *vcpu,
3737                                        struct x86_exception *exception)
3738 {
3739         void *data = val;
3740         int r = X86EMUL_CONTINUE;
3741
3742         while (bytes) {
3743                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3744                                                              PFERR_WRITE_MASK,
3745                                                              exception);
3746                 unsigned offset = addr & (PAGE_SIZE-1);
3747                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3748                 int ret;
3749
3750                 if (gpa == UNMAPPED_GVA)
3751                         return X86EMUL_PROPAGATE_FAULT;
3752                 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3753                 if (ret < 0) {
3754                         r = X86EMUL_IO_NEEDED;
3755                         goto out;
3756                 }
3757
3758                 bytes -= towrite;
3759                 data += towrite;
3760                 addr += towrite;
3761         }
3762 out:
3763         return r;
3764 }
3765
3766 static int emulator_read_emulated(unsigned long addr,
3767                                   void *val,
3768                                   unsigned int bytes,
3769                                   struct x86_exception *exception,
3770                                   struct kvm_vcpu *vcpu)
3771 {
3772         gpa_t                 gpa;
3773
3774         if (vcpu->mmio_read_completed) {
3775                 memcpy(val, vcpu->mmio_data, bytes);
3776                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3777                                vcpu->mmio_phys_addr, *(u64 *)val);
3778                 vcpu->mmio_read_completed = 0;
3779                 return X86EMUL_CONTINUE;
3780         }
3781
3782         gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, exception);
3783
3784         if (gpa == UNMAPPED_GVA)
3785                 return X86EMUL_PROPAGATE_FAULT;
3786
3787         /* For APIC access vmexit */
3788         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3789                 goto mmio;
3790
3791         if (kvm_read_guest_virt(addr, val, bytes, vcpu, exception)
3792             == X86EMUL_CONTINUE)
3793                 return X86EMUL_CONTINUE;
3794
3795 mmio:
3796         /*
3797          * Is this MMIO handled locally?
3798          */
3799         if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3800                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3801                 return X86EMUL_CONTINUE;
3802         }
3803
3804         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3805
3806         vcpu->mmio_needed = 1;
3807         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3808         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3809         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3810         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3811
3812         return X86EMUL_IO_NEEDED;
3813 }
3814
3815 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3816                         const void *val, int bytes)
3817 {
3818         int ret;
3819
3820         ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3821         if (ret < 0)
3822                 return 0;
3823         kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3824         return 1;
3825 }
3826
3827 static int emulator_write_emulated_onepage(unsigned long addr,
3828                                            const void *val,
3829                                            unsigned int bytes,
3830                                            struct x86_exception *exception,
3831                                            struct kvm_vcpu *vcpu)
3832 {
3833         gpa_t                 gpa;
3834
3835         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, exception);
3836
3837         if (gpa == UNMAPPED_GVA)
3838                 return X86EMUL_PROPAGATE_FAULT;
3839
3840         /* For APIC access vmexit */
3841         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3842                 goto mmio;
3843
3844         if (emulator_write_phys(vcpu, gpa, val, bytes))
3845                 return X86EMUL_CONTINUE;
3846
3847 mmio:
3848         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3849         /*
3850          * Is this MMIO handled locally?
3851          */
3852         if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3853                 return X86EMUL_CONTINUE;
3854
3855         vcpu->mmio_needed = 1;
3856         vcpu->run->exit_reason = KVM_EXIT_MMIO;
3857         vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3858         vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3859         vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3860         memcpy(vcpu->run->mmio.data, val, bytes);
3861
3862         return X86EMUL_CONTINUE;
3863 }
3864
3865 int emulator_write_emulated(unsigned long addr,
3866                             const void *val,
3867                             unsigned int bytes,
3868                             struct x86_exception *exception,
3869                             struct kvm_vcpu *vcpu)
3870 {
3871         /* Crossing a page boundary? */
3872         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3873                 int rc, now;
3874
3875                 now = -addr & ~PAGE_MASK;
3876                 rc = emulator_write_emulated_onepage(addr, val, now, exception,
3877                                                      vcpu);
3878                 if (rc != X86EMUL_CONTINUE)
3879                         return rc;
3880                 addr += now;
3881                 val += now;
3882                 bytes -= now;
3883         }
3884         return emulator_write_emulated_onepage(addr, val, bytes, exception,
3885                                                vcpu);
3886 }
3887
3888 #define CMPXCHG_TYPE(t, ptr, old, new) \
3889         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3890
3891 #ifdef CONFIG_X86_64
3892 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3893 #else
3894 #  define CMPXCHG64(ptr, old, new) \
3895         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3896 #endif
3897
3898 static int emulator_cmpxchg_emulated(unsigned long addr,
3899                                      const void *old,
3900                                      const void *new,
3901                                      unsigned int bytes,
3902                                      struct x86_exception *exception,
3903                                      struct kvm_vcpu *vcpu)
3904 {
3905         gpa_t gpa;
3906         struct page *page;
3907         char *kaddr;
3908         bool exchanged;
3909
3910         /* guests cmpxchg8b have to be emulated atomically */
3911         if (bytes > 8 || (bytes & (bytes - 1)))
3912                 goto emul_write;
3913
3914         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3915
3916         if (gpa == UNMAPPED_GVA ||
3917             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3918                 goto emul_write;
3919
3920         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3921                 goto emul_write;
3922
3923         page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3924         if (is_error_page(page)) {
3925                 kvm_release_page_clean(page);
3926                 goto emul_write;
3927         }
3928
3929         kaddr = kmap_atomic(page, KM_USER0);
3930         kaddr += offset_in_page(gpa);
3931         switch (bytes) {
3932         case 1:
3933                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3934                 break;
3935         case 2:
3936                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3937                 break;
3938         case 4:
3939                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3940                 break;
3941         case 8:
3942                 exchanged = CMPXCHG64(kaddr, old, new);
3943                 break;
3944         default:
3945                 BUG();
3946         }
3947         kunmap_atomic(kaddr, KM_USER0);
3948         kvm_release_page_dirty(page);
3949
3950         if (!exchanged)
3951                 return X86EMUL_CMPXCHG_FAILED;
3952
3953         kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3954
3955         return X86EMUL_CONTINUE;
3956
3957 emul_write:
3958         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3959
3960         return emulator_write_emulated(addr, new, bytes, exception, vcpu);
3961 }
3962
3963 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3964 {
3965         /* TODO: String I/O for in kernel device */
3966         int r;
3967
3968         if (vcpu->arch.pio.in)
3969                 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3970                                     vcpu->arch.pio.size, pd);
3971         else
3972                 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3973                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
3974                                      pd);
3975         return r;
3976 }
3977
3978
3979 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3980                              unsigned int count, struct kvm_vcpu *vcpu)
3981 {
3982         if (vcpu->arch.pio.count)
3983                 goto data_avail;
3984
3985         trace_kvm_pio(0, port, size, count);
3986
3987         vcpu->arch.pio.port = port;
3988         vcpu->arch.pio.in = 1;
3989         vcpu->arch.pio.count  = count;
3990         vcpu->arch.pio.size = size;
3991
3992         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3993         data_avail:
3994                 memcpy(val, vcpu->arch.pio_data, size * count);
3995                 vcpu->arch.pio.count = 0;
3996                 return 1;
3997         }
3998
3999         vcpu->run->exit_reason = KVM_EXIT_IO;
4000         vcpu->run->io.direction = KVM_EXIT_IO_IN;
4001         vcpu->run->io.size = size;
4002         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4003         vcpu->run->io.count = count;
4004         vcpu->run->io.port = port;
4005
4006         return 0;
4007 }
4008
4009 static int emulator_pio_out_emulated(int size, unsigned short port,
4010                               const void *val, unsigned int count,
4011                               struct kvm_vcpu *vcpu)
4012 {
4013         trace_kvm_pio(1, port, size, count);
4014
4015         vcpu->arch.pio.port = port;
4016         vcpu->arch.pio.in = 0;
4017         vcpu->arch.pio.count = count;
4018         vcpu->arch.pio.size = size;
4019
4020         memcpy(vcpu->arch.pio_data, val, size * count);
4021
4022         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4023                 vcpu->arch.pio.count = 0;
4024                 return 1;
4025         }
4026
4027         vcpu->run->exit_reason = KVM_EXIT_IO;
4028         vcpu->run->io.direction = KVM_EXIT_IO_OUT;
4029         vcpu->run->io.size = size;
4030         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4031         vcpu->run->io.count = count;
4032         vcpu->run->io.port = port;
4033
4034         return 0;
4035 }
4036
4037 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4038 {
4039         return kvm_x86_ops->get_segment_base(vcpu, seg);
4040 }
4041
4042 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
4043 {
4044         kvm_mmu_invlpg(vcpu, address);
4045         return X86EMUL_CONTINUE;
4046 }
4047
4048 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4049 {
4050         if (!need_emulate_wbinvd(vcpu))
4051                 return X86EMUL_CONTINUE;
4052
4053         if (kvm_x86_ops->has_wbinvd_exit()) {
4054                 int cpu = get_cpu();
4055
4056                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4057                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4058                                 wbinvd_ipi, NULL, 1);
4059                 put_cpu();
4060                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4061         } else
4062                 wbinvd();
4063         return X86EMUL_CONTINUE;
4064 }
4065 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4066
4067 int emulate_clts(struct kvm_vcpu *vcpu)
4068 {
4069         kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
4070         kvm_x86_ops->fpu_activate(vcpu);
4071         return X86EMUL_CONTINUE;
4072 }
4073
4074 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
4075 {
4076         return _kvm_get_dr(vcpu, dr, dest);
4077 }
4078
4079 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4080 {
4081
4082         return __kvm_set_dr(vcpu, dr, value);
4083 }
4084
4085 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4086 {
4087         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4088 }
4089
4090 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4091 {
4092         unsigned long value;
4093
4094         switch (cr) {
4095         case 0:
4096                 value = kvm_read_cr0(vcpu);
4097                 break;
4098         case 2:
4099                 value = vcpu->arch.cr2;
4100                 break;
4101         case 3:
4102                 value = kvm_read_cr3(vcpu);
4103                 break;
4104         case 4:
4105                 value = kvm_read_cr4(vcpu);
4106                 break;
4107         case 8:
4108                 value = kvm_get_cr8(vcpu);
4109                 break;
4110         default:
4111                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4112                 return 0;
4113         }
4114
4115         return value;
4116 }
4117
4118 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4119 {
4120         int res = 0;
4121
4122         switch (cr) {
4123         case 0:
4124                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4125                 break;
4126         case 2:
4127                 vcpu->arch.cr2 = val;
4128                 break;
4129         case 3:
4130                 res = kvm_set_cr3(vcpu, val);
4131                 break;
4132         case 4:
4133                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4134                 break;
4135         case 8:
4136                 res = kvm_set_cr8(vcpu, val);
4137                 break;
4138         default:
4139                 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4140                 res = -1;
4141         }
4142
4143         return res;
4144 }
4145
4146 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4147 {
4148         return kvm_x86_ops->get_cpl(vcpu);
4149 }
4150
4151 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4152 {
4153         kvm_x86_ops->get_gdt(vcpu, dt);
4154 }
4155
4156 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4157 {
4158         kvm_x86_ops->get_idt(vcpu, dt);
4159 }
4160
4161 static unsigned long emulator_get_cached_segment_base(int seg,
4162                                                       struct kvm_vcpu *vcpu)
4163 {
4164         return get_segment_base(vcpu, seg);
4165 }
4166
4167 static bool emulator_get_cached_descriptor(struct desc_struct *desc, u32 *base3,
4168                                            int seg, struct kvm_vcpu *vcpu)
4169 {
4170         struct kvm_segment var;
4171
4172         kvm_get_segment(vcpu, &var, seg);
4173
4174         if (var.unusable)
4175                 return false;
4176
4177         if (var.g)
4178                 var.limit >>= 12;
4179         set_desc_limit(desc, var.limit);
4180         set_desc_base(desc, (unsigned long)var.base);
4181 #ifdef CONFIG_X86_64
4182         if (base3)
4183                 *base3 = var.base >> 32;
4184 #endif
4185         desc->type = var.type;
4186         desc->s = var.s;
4187         desc->dpl = var.dpl;
4188         desc->p = var.present;
4189         desc->avl = var.avl;
4190         desc->l = var.l;
4191         desc->d = var.db;
4192         desc->g = var.g;
4193
4194         return true;
4195 }
4196
4197 static void emulator_set_cached_descriptor(struct desc_struct *desc, u32 base3,
4198                                            int seg, struct kvm_vcpu *vcpu)
4199 {
4200         struct kvm_segment var;
4201
4202         /* needed to preserve selector */
4203         kvm_get_segment(vcpu, &var, seg);
4204
4205         var.base = get_desc_base(desc);
4206 #ifdef CONFIG_X86_64
4207         var.base |= ((u64)base3) << 32;
4208 #endif
4209         var.limit = get_desc_limit(desc);
4210         if (desc->g)
4211                 var.limit = (var.limit << 12) | 0xfff;
4212         var.type = desc->type;
4213         var.present = desc->p;
4214         var.dpl = desc->dpl;
4215         var.db = desc->d;
4216         var.s = desc->s;
4217         var.l = desc->l;
4218         var.g = desc->g;
4219         var.avl = desc->avl;
4220         var.present = desc->p;
4221         var.unusable = !var.present;
4222         var.padding = 0;
4223
4224         kvm_set_segment(vcpu, &var, seg);
4225         return;
4226 }
4227
4228 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4229 {
4230         struct kvm_segment kvm_seg;
4231
4232         kvm_get_segment(vcpu, &kvm_seg, seg);
4233         return kvm_seg.selector;
4234 }
4235
4236 static void emulator_set_segment_selector(u16 sel, int seg,
4237                                           struct kvm_vcpu *vcpu)
4238 {
4239         struct kvm_segment kvm_seg;
4240
4241         kvm_get_segment(vcpu, &kvm_seg, seg);
4242         kvm_seg.selector = sel;
4243         kvm_set_segment(vcpu, &kvm_seg, seg);
4244 }
4245
4246 static struct x86_emulate_ops emulate_ops = {
4247         .read_std            = kvm_read_guest_virt_system,
4248         .write_std           = kvm_write_guest_virt_system,
4249         .fetch               = kvm_fetch_guest_virt,
4250         .read_emulated       = emulator_read_emulated,
4251         .write_emulated      = emulator_write_emulated,
4252         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4253         .pio_in_emulated     = emulator_pio_in_emulated,
4254         .pio_out_emulated    = emulator_pio_out_emulated,
4255         .get_cached_descriptor = emulator_get_cached_descriptor,
4256         .set_cached_descriptor = emulator_set_cached_descriptor,
4257         .get_segment_selector = emulator_get_segment_selector,
4258         .set_segment_selector = emulator_set_segment_selector,
4259         .get_cached_segment_base = emulator_get_cached_segment_base,
4260         .get_gdt             = emulator_get_gdt,
4261         .get_idt             = emulator_get_idt,
4262         .get_cr              = emulator_get_cr,
4263         .set_cr              = emulator_set_cr,
4264         .cpl                 = emulator_get_cpl,
4265         .get_dr              = emulator_get_dr,
4266         .set_dr              = emulator_set_dr,
4267         .set_msr             = kvm_set_msr,
4268         .get_msr             = kvm_get_msr,
4269 };
4270
4271 static void cache_all_regs(struct kvm_vcpu *vcpu)
4272 {
4273         kvm_register_read(vcpu, VCPU_REGS_RAX);
4274         kvm_register_read(vcpu, VCPU_REGS_RSP);
4275         kvm_register_read(vcpu, VCPU_REGS_RIP);
4276         vcpu->arch.regs_dirty = ~0;
4277 }
4278
4279 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4280 {
4281         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4282         /*
4283          * an sti; sti; sequence only disable interrupts for the first
4284          * instruction. So, if the last instruction, be it emulated or
4285          * not, left the system with the INT_STI flag enabled, it
4286          * means that the last instruction is an sti. We should not
4287          * leave the flag on in this case. The same goes for mov ss
4288          */
4289         if (!(int_shadow & mask))
4290                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4291 }
4292
4293 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4294 {
4295         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4296         if (ctxt->exception.vector == PF_VECTOR)
4297                 kvm_propagate_fault(vcpu, &ctxt->exception);
4298         else if (ctxt->exception.error_code_valid)
4299                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4300                                       ctxt->exception.error_code);
4301         else
4302                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4303 }
4304
4305 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4306 {
4307         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4308         int cs_db, cs_l;
4309
4310         cache_all_regs(vcpu);
4311
4312         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4313
4314         vcpu->arch.emulate_ctxt.vcpu = vcpu;
4315         vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4316         vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4317         vcpu->arch.emulate_ctxt.mode =
4318                 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4319                 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4320                 ? X86EMUL_MODE_VM86 : cs_l
4321                 ? X86EMUL_MODE_PROT64 : cs_db
4322                 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4323         memset(c, 0, sizeof(struct decode_cache));
4324         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4325 }
4326
4327 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4328 {
4329         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4330         int ret;
4331
4332         init_emulate_ctxt(vcpu);
4333
4334         vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4335         vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4336         vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4337         ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4338
4339         if (ret != X86EMUL_CONTINUE)
4340                 return EMULATE_FAIL;
4341
4342         vcpu->arch.emulate_ctxt.eip = c->eip;
4343         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4344         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4345         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4346
4347         if (irq == NMI_VECTOR)
4348                 vcpu->arch.nmi_pending = false;
4349         else
4350                 vcpu->arch.interrupt.pending = false;
4351
4352         return EMULATE_DONE;
4353 }
4354 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4355
4356 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4357 {
4358         int r = EMULATE_DONE;
4359
4360         ++vcpu->stat.insn_emulation_fail;
4361         trace_kvm_emulate_insn_failed(vcpu);
4362         if (!is_guest_mode(vcpu)) {
4363                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4364                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4365                 vcpu->run->internal.ndata = 0;
4366                 r = EMULATE_FAIL;
4367         }
4368         kvm_queue_exception(vcpu, UD_VECTOR);
4369
4370         return r;
4371 }
4372
4373 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4374 {
4375         gpa_t gpa;
4376
4377         if (tdp_enabled)
4378                 return false;
4379
4380         /*
4381          * if emulation was due to access to shadowed page table
4382          * and it failed try to unshadow page and re-entetr the
4383          * guest to let CPU execute the instruction.
4384          */
4385         if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4386                 return true;
4387
4388         gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4389
4390         if (gpa == UNMAPPED_GVA)
4391                 return true; /* let cpu generate fault */
4392
4393         if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4394                 return true;
4395
4396         return false;
4397 }
4398
4399 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
4400                             unsigned long cr2,
4401                             int emulation_type,
4402                             void *insn,
4403                             int insn_len)
4404 {
4405         int r;
4406         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4407
4408         kvm_clear_exception_queue(vcpu);
4409         vcpu->arch.mmio_fault_cr2 = cr2;
4410         /*
4411          * TODO: fix emulate.c to use guest_read/write_register
4412          * instead of direct ->regs accesses, can save hundred cycles
4413          * on Intel for instructions that don't read/change RSP, for
4414          * for example.
4415          */
4416         cache_all_regs(vcpu);
4417
4418         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4419                 init_emulate_ctxt(vcpu);
4420                 vcpu->arch.emulate_ctxt.interruptibility = 0;
4421                 vcpu->arch.emulate_ctxt.have_exception = false;
4422                 vcpu->arch.emulate_ctxt.perm_ok = false;
4423
4424                 vcpu->arch.emulate_ctxt.only_vendor_specific_insn
4425                         = emulation_type & EMULTYPE_TRAP_UD;
4426
4427                 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, insn, insn_len);
4428
4429                 trace_kvm_emulate_insn_start(vcpu);
4430                 ++vcpu->stat.insn_emulation;
4431                 if (r)  {
4432                         if (emulation_type & EMULTYPE_TRAP_UD)
4433                                 return EMULATE_FAIL;
4434                         if (reexecute_instruction(vcpu, cr2))
4435                                 return EMULATE_DONE;
4436                         if (emulation_type & EMULTYPE_SKIP)
4437                                 return EMULATE_FAIL;
4438                         return handle_emulation_failure(vcpu);
4439                 }
4440         }
4441
4442         if (emulation_type & EMULTYPE_SKIP) {
4443                 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4444                 return EMULATE_DONE;
4445         }
4446
4447         /* this is needed for vmware backdor interface to work since it
4448            changes registers values  during IO operation */
4449         memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4450
4451 restart:
4452         r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4453
4454         if (r == EMULATION_FAILED) {
4455                 if (reexecute_instruction(vcpu, cr2))
4456                         return EMULATE_DONE;
4457
4458                 return handle_emulation_failure(vcpu);
4459         }
4460
4461         if (vcpu->arch.emulate_ctxt.have_exception) {
4462                 inject_emulated_exception(vcpu);
4463                 r = EMULATE_DONE;
4464         } else if (vcpu->arch.pio.count) {
4465                 if (!vcpu->arch.pio.in)
4466                         vcpu->arch.pio.count = 0;
4467                 r = EMULATE_DO_MMIO;
4468         } else if (vcpu->mmio_needed) {
4469                 if (vcpu->mmio_is_write)
4470                         vcpu->mmio_needed = 0;
4471                 r = EMULATE_DO_MMIO;
4472         } else if (r == EMULATION_RESTART)
4473                 goto restart;
4474         else
4475                 r = EMULATE_DONE;
4476
4477         toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4478         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4479         kvm_make_request(KVM_REQ_EVENT, vcpu);
4480         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4481         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4482
4483         return r;
4484 }
4485 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
4486
4487 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4488 {
4489         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4490         int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4491         /* do not return to emulator after return from userspace */
4492         vcpu->arch.pio.count = 0;
4493         return ret;
4494 }
4495 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4496
4497 static void tsc_bad(void *info)
4498 {
4499         __this_cpu_write(cpu_tsc_khz, 0);
4500 }
4501
4502 static void tsc_khz_changed(void *data)
4503 {
4504         struct cpufreq_freqs *freq = data;
4505         unsigned long khz = 0;
4506
4507         if (data)
4508                 khz = freq->new;
4509         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4510                 khz = cpufreq_quick_get(raw_smp_processor_id());
4511         if (!khz)
4512                 khz = tsc_khz;
4513         __this_cpu_write(cpu_tsc_khz, khz);
4514 }
4515
4516 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4517                                      void *data)
4518 {
4519         struct cpufreq_freqs *freq = data;
4520         struct kvm *kvm;
4521         struct kvm_vcpu *vcpu;
4522         int i, send_ipi = 0;
4523
4524         /*
4525          * We allow guests to temporarily run on slowing clocks,
4526          * provided we notify them after, or to run on accelerating
4527          * clocks, provided we notify them before.  Thus time never
4528          * goes backwards.
4529          *
4530          * However, we have a problem.  We can't atomically update
4531          * the frequency of a given CPU from this function; it is
4532          * merely a notifier, which can be called from any CPU.
4533          * Changing the TSC frequency at arbitrary points in time
4534          * requires a recomputation of local variables related to
4535          * the TSC for each VCPU.  We must flag these local variables
4536          * to be updated and be sure the update takes place with the
4537          * new frequency before any guests proceed.
4538          *
4539          * Unfortunately, the combination of hotplug CPU and frequency
4540          * change creates an intractable locking scenario; the order
4541          * of when these callouts happen is undefined with respect to
4542          * CPU hotplug, and they can race with each other.  As such,
4543          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4544          * undefined; you can actually have a CPU frequency change take
4545          * place in between the computation of X and the setting of the
4546          * variable.  To protect against this problem, all updates of
4547          * the per_cpu tsc_khz variable are done in an interrupt
4548          * protected IPI, and all callers wishing to update the value
4549          * must wait for a synchronous IPI to complete (which is trivial
4550          * if the caller is on the CPU already).  This establishes the
4551          * necessary total order on variable updates.
4552          *
4553          * Note that because a guest time update may take place
4554          * anytime after the setting of the VCPU's request bit, the
4555          * correct TSC value must be set before the request.  However,
4556          * to ensure the update actually makes it to any guest which
4557          * starts running in hardware virtualization between the set
4558          * and the acquisition of the spinlock, we must also ping the
4559          * CPU after setting the request bit.
4560          *
4561          */
4562
4563         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4564                 return 0;
4565         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4566                 return 0;
4567
4568         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4569
4570         raw_spin_lock(&kvm_lock);
4571         list_for_each_entry(kvm, &vm_list, vm_list) {
4572                 kvm_for_each_vcpu(i, vcpu, kvm) {
4573                         if (vcpu->cpu != freq->cpu)
4574                                 continue;
4575                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4576                         if (vcpu->cpu != smp_processor_id())
4577                                 send_ipi = 1;
4578                 }
4579         }
4580         raw_spin_unlock(&kvm_lock);
4581
4582         if (freq->old < freq->new && send_ipi) {
4583                 /*
4584                  * We upscale the frequency.  Must make the guest
4585                  * doesn't see old kvmclock values while running with
4586                  * the new frequency, otherwise we risk the guest sees
4587                  * time go backwards.
4588                  *
4589                  * In case we update the frequency for another cpu
4590                  * (which might be in guest context) send an interrupt
4591                  * to kick the cpu out of guest context.  Next time
4592                  * guest context is entered kvmclock will be updated,
4593                  * so the guest will not see stale values.
4594                  */
4595                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4596         }
4597         return 0;
4598 }
4599
4600 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4601         .notifier_call  = kvmclock_cpufreq_notifier
4602 };
4603
4604 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4605                                         unsigned long action, void *hcpu)
4606 {
4607         unsigned int cpu = (unsigned long)hcpu;
4608
4609         switch (action) {
4610                 case CPU_ONLINE:
4611                 case CPU_DOWN_FAILED:
4612                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4613                         break;
4614                 case CPU_DOWN_PREPARE:
4615                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
4616                         break;
4617         }
4618         return NOTIFY_OK;
4619 }
4620
4621 static struct notifier_block kvmclock_cpu_notifier_block = {
4622         .notifier_call  = kvmclock_cpu_notifier,
4623         .priority = -INT_MAX
4624 };
4625
4626 static void kvm_timer_init(void)
4627 {
4628         int cpu;
4629
4630         max_tsc_khz = tsc_khz;
4631         register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4632         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4633 #ifdef CONFIG_CPU_FREQ
4634                 struct cpufreq_policy policy;
4635                 memset(&policy, 0, sizeof(policy));
4636                 cpu = get_cpu();
4637                 cpufreq_get_policy(&policy, cpu);
4638                 if (policy.cpuinfo.max_freq)
4639                         max_tsc_khz = policy.cpuinfo.max_freq;
4640                 put_cpu();
4641 #endif
4642                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4643                                           CPUFREQ_TRANSITION_NOTIFIER);
4644         }
4645         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4646         for_each_online_cpu(cpu)
4647                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4648 }
4649
4650 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4651
4652 static int kvm_is_in_guest(void)
4653 {
4654         return percpu_read(current_vcpu) != NULL;
4655 }
4656
4657 static int kvm_is_user_mode(void)
4658 {
4659         int user_mode = 3;
4660
4661         if (percpu_read(current_vcpu))
4662                 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4663
4664         return user_mode != 0;
4665 }
4666
4667 static unsigned long kvm_get_guest_ip(void)
4668 {
4669         unsigned long ip = 0;
4670
4671         if (percpu_read(current_vcpu))
4672                 ip = kvm_rip_read(percpu_read(current_vcpu));
4673
4674         return ip;
4675 }
4676
4677 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4678         .is_in_guest            = kvm_is_in_guest,
4679         .is_user_mode           = kvm_is_user_mode,
4680         .get_guest_ip           = kvm_get_guest_ip,
4681 };
4682
4683 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4684 {
4685         percpu_write(current_vcpu, vcpu);
4686 }
4687 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4688
4689 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4690 {
4691         percpu_write(current_vcpu, NULL);
4692 }
4693 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4694
4695 int kvm_arch_init(void *opaque)
4696 {
4697         int r;
4698         struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4699
4700         if (kvm_x86_ops) {
4701                 printk(KERN_ERR "kvm: already loaded the other module\n");
4702                 r = -EEXIST;
4703                 goto out;
4704         }
4705
4706         if (!ops->cpu_has_kvm_support()) {
4707                 printk(KERN_ERR "kvm: no hardware support\n");
4708                 r = -EOPNOTSUPP;
4709                 goto out;
4710         }
4711         if (ops->disabled_by_bios()) {
4712                 printk(KERN_ERR "kvm: disabled by bios\n");
4713                 r = -EOPNOTSUPP;
4714                 goto out;
4715         }
4716
4717         r = kvm_mmu_module_init();
4718         if (r)
4719                 goto out;
4720
4721         kvm_init_msr_list();
4722
4723         kvm_x86_ops = ops;
4724         kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4725         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4726                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
4727
4728         kvm_timer_init();
4729
4730         perf_register_guest_info_callbacks(&kvm_guest_cbs);
4731
4732         if (cpu_has_xsave)
4733                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4734
4735         return 0;
4736
4737 out:
4738         return r;
4739 }
4740
4741 void kvm_arch_exit(void)
4742 {
4743         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4744
4745         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4746                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4747                                             CPUFREQ_TRANSITION_NOTIFIER);
4748         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4749         kvm_x86_ops = NULL;
4750         kvm_mmu_module_exit();
4751 }
4752
4753 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4754 {
4755         ++vcpu->stat.halt_exits;
4756         if (irqchip_in_kernel(vcpu->kvm)) {
4757                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4758                 return 1;
4759         } else {
4760                 vcpu->run->exit_reason = KVM_EXIT_HLT;
4761                 return 0;
4762         }
4763 }
4764 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4765
4766 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4767                            unsigned long a1)
4768 {
4769         if (is_long_mode(vcpu))
4770                 return a0;
4771         else
4772                 return a0 | ((gpa_t)a1 << 32);
4773 }
4774
4775 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4776 {
4777         u64 param, ingpa, outgpa, ret;
4778         uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4779         bool fast, longmode;
4780         int cs_db, cs_l;
4781
4782         /*
4783          * hypercall generates UD from non zero cpl and real mode
4784          * per HYPER-V spec
4785          */
4786         if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4787                 kvm_queue_exception(vcpu, UD_VECTOR);
4788                 return 0;
4789         }
4790
4791         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4792         longmode = is_long_mode(vcpu) && cs_l == 1;
4793
4794         if (!longmode) {
4795                 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4796                         (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4797                 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4798                         (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4799                 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4800                         (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4801         }
4802 #ifdef CONFIG_X86_64
4803         else {
4804                 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4805                 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4806                 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4807         }
4808 #endif
4809
4810         code = param & 0xffff;
4811         fast = (param >> 16) & 0x1;
4812         rep_cnt = (param >> 32) & 0xfff;
4813         rep_idx = (param >> 48) & 0xfff;
4814
4815         trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4816
4817         switch (code) {
4818         case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4819                 kvm_vcpu_on_spin(vcpu);
4820                 break;
4821         default:
4822                 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4823                 break;
4824         }
4825
4826         ret = res | (((u64)rep_done & 0xfff) << 32);
4827         if (longmode) {
4828                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4829         } else {
4830                 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4831                 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4832         }
4833
4834         return 1;
4835 }
4836
4837 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4838 {
4839         unsigned long nr, a0, a1, a2, a3, ret;
4840         int r = 1;
4841
4842         if (kvm_hv_hypercall_enabled(vcpu->kvm))
4843                 return kvm_hv_hypercall(vcpu);
4844
4845         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4846         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4847         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4848         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4849         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4850
4851         trace_kvm_hypercall(nr, a0, a1, a2, a3);
4852
4853         if (!is_long_mode(vcpu)) {
4854                 nr &= 0xFFFFFFFF;
4855                 a0 &= 0xFFFFFFFF;
4856                 a1 &= 0xFFFFFFFF;
4857                 a2 &= 0xFFFFFFFF;
4858                 a3 &= 0xFFFFFFFF;
4859         }
4860
4861         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4862                 ret = -KVM_EPERM;
4863                 goto out;
4864         }
4865
4866         switch (nr) {
4867         case KVM_HC_VAPIC_POLL_IRQ:
4868                 ret = 0;
4869                 break;
4870         case KVM_HC_MMU_OP:
4871                 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4872                 break;
4873         default:
4874                 ret = -KVM_ENOSYS;
4875                 break;
4876         }
4877 out:
4878         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4879         ++vcpu->stat.hypercalls;
4880         return r;
4881 }
4882 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4883
4884 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4885 {
4886         char instruction[3];
4887         unsigned long rip = kvm_rip_read(vcpu);
4888
4889         /*
4890          * Blow out the MMU to ensure that no other VCPU has an active mapping
4891          * to ensure that the updated hypercall appears atomically across all
4892          * VCPUs.
4893          */
4894         kvm_mmu_zap_all(vcpu->kvm);
4895
4896         kvm_x86_ops->patch_hypercall(vcpu, instruction);
4897
4898         return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4899 }
4900
4901 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4902 {
4903         struct desc_ptr dt = { limit, base };
4904
4905         kvm_x86_ops->set_gdt(vcpu, &dt);
4906 }
4907
4908 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4909 {
4910         struct desc_ptr dt = { limit, base };
4911
4912         kvm_x86_ops->set_idt(vcpu, &dt);
4913 }
4914
4915 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4916 {
4917         struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4918         int j, nent = vcpu->arch.cpuid_nent;
4919
4920         e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4921         /* when no next entry is found, the current entry[i] is reselected */
4922         for (j = i + 1; ; j = (j + 1) % nent) {
4923                 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4924                 if (ej->function == e->function) {
4925                         ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4926                         return j;
4927                 }
4928         }
4929         return 0; /* silence gcc, even though control never reaches here */
4930 }
4931
4932 /* find an entry with matching function, matching index (if needed), and that
4933  * should be read next (if it's stateful) */
4934 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4935         u32 function, u32 index)
4936 {
4937         if (e->function != function)
4938                 return 0;
4939         if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4940                 return 0;
4941         if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4942             !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4943                 return 0;
4944         return 1;
4945 }
4946
4947 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4948                                               u32 function, u32 index)
4949 {
4950         int i;
4951         struct kvm_cpuid_entry2 *best = NULL;
4952
4953         for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4954                 struct kvm_cpuid_entry2 *e;
4955
4956                 e = &vcpu->arch.cpuid_entries[i];
4957                 if (is_matching_cpuid_entry(e, function, index)) {
4958                         if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4959                                 move_to_next_stateful_cpuid_entry(vcpu, i);
4960                         best = e;
4961                         break;
4962                 }
4963         }
4964         return best;
4965 }
4966 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4967
4968 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4969 {
4970         struct kvm_cpuid_entry2 *best;
4971
4972         best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4973         if (!best || best->eax < 0x80000008)
4974                 goto not_found;
4975         best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4976         if (best)
4977                 return best->eax & 0xff;
4978 not_found:
4979         return 36;
4980 }
4981
4982 /*
4983  * If no match is found, check whether we exceed the vCPU's limit
4984  * and return the content of the highest valid _standard_ leaf instead.
4985  * This is to satisfy the CPUID specification.
4986  */
4987 static struct kvm_cpuid_entry2* check_cpuid_limit(struct kvm_vcpu *vcpu,
4988                                                   u32 function, u32 index)
4989 {
4990         struct kvm_cpuid_entry2 *maxlevel;
4991
4992         maxlevel = kvm_find_cpuid_entry(vcpu, function & 0x80000000, 0);
4993         if (!maxlevel || maxlevel->eax >= function)
4994                 return NULL;
4995         if (function & 0x80000000) {
4996                 maxlevel = kvm_find_cpuid_entry(vcpu, 0, 0);
4997                 if (!maxlevel)
4998                         return NULL;
4999         }
5000         return kvm_find_cpuid_entry(vcpu, maxlevel->eax, index);
5001 }
5002
5003 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
5004 {
5005         u32 function, index;
5006         struct kvm_cpuid_entry2 *best;
5007
5008         function = kvm_register_read(vcpu, VCPU_REGS_RAX);
5009         index = kvm_register_read(vcpu, VCPU_REGS_RCX);
5010         kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
5011         kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
5012         kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
5013         kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
5014         best = kvm_find_cpuid_entry(vcpu, function, index);
5015
5016         if (!best)
5017                 best = check_cpuid_limit(vcpu, function, index);
5018
5019         if (best) {
5020                 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
5021                 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
5022                 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
5023                 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
5024         }
5025         kvm_x86_ops->skip_emulated_instruction(vcpu);
5026         trace_kvm_cpuid(function,
5027                         kvm_register_read(vcpu, VCPU_REGS_RAX),
5028                         kvm_register_read(vcpu, VCPU_REGS_RBX),
5029                         kvm_register_read(vcpu, VCPU_REGS_RCX),
5030                         kvm_register_read(vcpu, VCPU_REGS_RDX));
5031 }
5032 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
5033
5034 /*
5035  * Check if userspace requested an interrupt window, and that the
5036  * interrupt window is open.
5037  *
5038  * No need to exit to userspace if we already have an interrupt queued.
5039  */
5040 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5041 {
5042         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5043                 vcpu->run->request_interrupt_window &&
5044                 kvm_arch_interrupt_allowed(vcpu));
5045 }
5046
5047 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5048 {
5049         struct kvm_run *kvm_run = vcpu->run;
5050
5051         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5052         kvm_run->cr8 = kvm_get_cr8(vcpu);
5053         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5054         if (irqchip_in_kernel(vcpu->kvm))
5055                 kvm_run->ready_for_interrupt_injection = 1;
5056         else
5057                 kvm_run->ready_for_interrupt_injection =
5058                         kvm_arch_interrupt_allowed(vcpu) &&
5059                         !kvm_cpu_has_interrupt(vcpu) &&
5060                         !kvm_event_needs_reinjection(vcpu);
5061 }
5062
5063 static void vapic_enter(struct kvm_vcpu *vcpu)
5064 {
5065         struct kvm_lapic *apic = vcpu->arch.apic;
5066         struct page *page;
5067
5068         if (!apic || !apic->vapic_addr)
5069                 return;
5070
5071         page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5072
5073         vcpu->arch.apic->vapic_page = page;
5074 }
5075
5076 static void vapic_exit(struct kvm_vcpu *vcpu)
5077 {
5078         struct kvm_lapic *apic = vcpu->arch.apic;
5079         int idx;
5080
5081         if (!apic || !apic->vapic_addr)
5082                 return;
5083
5084         idx = srcu_read_lock(&vcpu->kvm->srcu);
5085         kvm_release_page_dirty(apic->vapic_page);
5086         mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5087         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5088 }
5089
5090 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5091 {
5092         int max_irr, tpr;
5093
5094         if (!kvm_x86_ops->update_cr8_intercept)
5095                 return;
5096
5097         if (!vcpu->arch.apic)
5098                 return;
5099
5100         if (!vcpu->arch.apic->vapic_addr)
5101                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5102         else
5103                 max_irr = -1;
5104
5105         if (max_irr != -1)
5106                 max_irr >>= 4;
5107
5108         tpr = kvm_lapic_get_cr8(vcpu);
5109
5110         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5111 }
5112
5113 static void inject_pending_event(struct kvm_vcpu *vcpu)
5114 {
5115         /* try to reinject previous events if any */
5116         if (vcpu->arch.exception.pending) {
5117                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5118                                         vcpu->arch.exception.has_error_code,
5119                                         vcpu->arch.exception.error_code);
5120                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5121                                           vcpu->arch.exception.has_error_code,
5122                                           vcpu->arch.exception.error_code,
5123                                           vcpu->arch.exception.reinject);
5124                 return;
5125         }
5126
5127         if (vcpu->arch.nmi_injected) {
5128                 kvm_x86_ops->set_nmi(vcpu);
5129                 return;
5130         }
5131
5132         if (vcpu->arch.interrupt.pending) {
5133                 kvm_x86_ops->set_irq(vcpu);
5134                 return;
5135         }
5136
5137         /* try to inject new event if pending */
5138         if (vcpu->arch.nmi_pending) {
5139                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5140                         vcpu->arch.nmi_pending = false;
5141                         vcpu->arch.nmi_injected = true;
5142                         kvm_x86_ops->set_nmi(vcpu);
5143                 }
5144         } else if (kvm_cpu_has_interrupt(vcpu)) {
5145                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5146                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5147                                             false);
5148                         kvm_x86_ops->set_irq(vcpu);
5149                 }
5150         }
5151 }
5152
5153 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5154 {
5155         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5156                         !vcpu->guest_xcr0_loaded) {
5157                 /* kvm_set_xcr() also depends on this */
5158                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5159                 vcpu->guest_xcr0_loaded = 1;
5160         }
5161 }
5162
5163 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5164 {
5165         if (vcpu->guest_xcr0_loaded) {
5166                 if (vcpu->arch.xcr0 != host_xcr0)
5167                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5168                 vcpu->guest_xcr0_loaded = 0;
5169         }
5170 }
5171
5172 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5173 {
5174         int r;
5175         bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5176                 vcpu->run->request_interrupt_window;
5177
5178         if (vcpu->requests) {
5179                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5180                         kvm_mmu_unload(vcpu);
5181                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5182                         __kvm_migrate_timers(vcpu);
5183                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5184                         r = kvm_guest_time_update(vcpu);
5185                         if (unlikely(r))
5186                                 goto out;
5187                 }
5188                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5189                         kvm_mmu_sync_roots(vcpu);
5190                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5191                         kvm_x86_ops->tlb_flush(vcpu);
5192                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5193                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5194                         r = 0;
5195                         goto out;
5196                 }
5197                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5198                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5199                         r = 0;
5200                         goto out;
5201                 }
5202                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5203                         vcpu->fpu_active = 0;
5204                         kvm_x86_ops->fpu_deactivate(vcpu);
5205                 }
5206                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
5207                         /* Page is swapped out. Do synthetic halt */
5208                         vcpu->arch.apf.halted = true;
5209                         r = 1;
5210                         goto out;
5211                 }
5212                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
5213                         vcpu->arch.nmi_pending = true;
5214         }
5215
5216         r = kvm_mmu_reload(vcpu);
5217         if (unlikely(r))
5218                 goto out;
5219
5220         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5221                 inject_pending_event(vcpu);
5222
5223                 /* enable NMI/IRQ window open exits if needed */
5224                 if (vcpu->arch.nmi_pending)
5225                         kvm_x86_ops->enable_nmi_window(vcpu);
5226                 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5227                         kvm_x86_ops->enable_irq_window(vcpu);
5228
5229                 if (kvm_lapic_enabled(vcpu)) {
5230                         update_cr8_intercept(vcpu);
5231                         kvm_lapic_sync_to_vapic(vcpu);
5232                 }
5233         }
5234
5235         preempt_disable();
5236
5237         kvm_x86_ops->prepare_guest_switch(vcpu);
5238         if (vcpu->fpu_active)
5239                 kvm_load_guest_fpu(vcpu);
5240         kvm_load_guest_xcr0(vcpu);
5241
5242         vcpu->mode = IN_GUEST_MODE;
5243
5244         /* We should set ->mode before check ->requests,
5245          * see the comment in make_all_cpus_request.
5246          */
5247         smp_mb();
5248
5249         local_irq_disable();
5250
5251         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
5252             || need_resched() || signal_pending(current)) {
5253                 vcpu->mode = OUTSIDE_GUEST_MODE;
5254                 smp_wmb();
5255                 local_irq_enable();
5256                 preempt_enable();
5257                 kvm_x86_ops->cancel_injection(vcpu);
5258                 r = 1;
5259                 goto out;
5260         }
5261
5262         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5263
5264         kvm_guest_enter();
5265
5266         if (unlikely(vcpu->arch.switch_db_regs)) {
5267                 set_debugreg(0, 7);
5268                 set_debugreg(vcpu->arch.eff_db[0], 0);
5269                 set_debugreg(vcpu->arch.eff_db[1], 1);
5270                 set_debugreg(vcpu->arch.eff_db[2], 2);
5271                 set_debugreg(vcpu->arch.eff_db[3], 3);
5272         }
5273
5274         trace_kvm_entry(vcpu->vcpu_id);
5275         kvm_x86_ops->run(vcpu);
5276
5277         /*
5278          * If the guest has used debug registers, at least dr7
5279          * will be disabled while returning to the host.
5280          * If we don't have active breakpoints in the host, we don't
5281          * care about the messed up debug address registers. But if
5282          * we have some of them active, restore the old state.
5283          */
5284         if (hw_breakpoint_active())
5285                 hw_breakpoint_restore();
5286
5287         kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5288
5289         vcpu->mode = OUTSIDE_GUEST_MODE;
5290         smp_wmb();
5291         local_irq_enable();
5292
5293         ++vcpu->stat.exits;
5294
5295         /*
5296          * We must have an instruction between local_irq_enable() and
5297          * kvm_guest_exit(), so the timer interrupt isn't delayed by
5298          * the interrupt shadow.  The stat.exits increment will do nicely.
5299          * But we need to prevent reordering, hence this barrier():
5300          */
5301         barrier();
5302
5303         kvm_guest_exit();
5304
5305         preempt_enable();
5306
5307         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5308
5309         /*
5310          * Profile KVM exit RIPs:
5311          */
5312         if (unlikely(prof_on == KVM_PROFILING)) {
5313                 unsigned long rip = kvm_rip_read(vcpu);
5314                 profile_hit(KVM_PROFILING, (void *)rip);
5315         }
5316
5317
5318         kvm_lapic_sync_from_vapic(vcpu);
5319
5320         r = kvm_x86_ops->handle_exit(vcpu);
5321 out:
5322         return r;
5323 }
5324
5325
5326 static int __vcpu_run(struct kvm_vcpu *vcpu)
5327 {
5328         int r;
5329         struct kvm *kvm = vcpu->kvm;
5330
5331         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5332                 pr_debug("vcpu %d received sipi with vector # %x\n",
5333                          vcpu->vcpu_id, vcpu->arch.sipi_vector);
5334                 kvm_lapic_reset(vcpu);
5335                 r = kvm_arch_vcpu_reset(vcpu);
5336                 if (r)
5337                         return r;
5338                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5339         }
5340
5341         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5342         vapic_enter(vcpu);
5343
5344         r = 1;
5345         while (r > 0) {
5346                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
5347                     !vcpu->arch.apf.halted)
5348                         r = vcpu_enter_guest(vcpu);
5349                 else {
5350                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5351                         kvm_vcpu_block(vcpu);
5352                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5353                         if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5354                         {
5355                                 switch(vcpu->arch.mp_state) {
5356                                 case KVM_MP_STATE_HALTED:
5357                                         vcpu->arch.mp_state =
5358                                                 KVM_MP_STATE_RUNNABLE;
5359                                 case KVM_MP_STATE_RUNNABLE:
5360                                         vcpu->arch.apf.halted = false;
5361                                         break;
5362                                 case KVM_MP_STATE_SIPI_RECEIVED:
5363                                 default:
5364                                         r = -EINTR;
5365                                         break;
5366                                 }
5367                         }
5368                 }
5369
5370                 if (r <= 0)
5371                         break;
5372
5373                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5374                 if (kvm_cpu_has_pending_timer(vcpu))
5375                         kvm_inject_pending_timer_irqs(vcpu);
5376
5377                 if (dm_request_for_irq_injection(vcpu)) {
5378                         r = -EINTR;
5379                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5380                         ++vcpu->stat.request_irq_exits;
5381                 }
5382
5383                 kvm_check_async_pf_completion(vcpu);
5384
5385                 if (signal_pending(current)) {
5386                         r = -EINTR;
5387                         vcpu->run->exit_reason = KVM_EXIT_INTR;
5388                         ++vcpu->stat.signal_exits;
5389                 }
5390                 if (need_resched()) {
5391                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5392                         kvm_resched(vcpu);
5393                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5394                 }
5395         }
5396
5397         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5398
5399         vapic_exit(vcpu);
5400
5401         return r;
5402 }
5403
5404 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5405 {
5406         int r;
5407         sigset_t sigsaved;
5408
5409         if (!tsk_used_math(current) && init_fpu(current))
5410                 return -ENOMEM;
5411
5412         if (vcpu->sigset_active)
5413                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5414
5415         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5416                 kvm_vcpu_block(vcpu);
5417                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5418                 r = -EAGAIN;
5419                 goto out;
5420         }
5421
5422         /* re-sync apic's tpr */
5423         if (!irqchip_in_kernel(vcpu->kvm)) {
5424                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
5425                         r = -EINVAL;
5426                         goto out;
5427                 }
5428         }
5429
5430         if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5431                 if (vcpu->mmio_needed) {
5432                         memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5433                         vcpu->mmio_read_completed = 1;
5434                         vcpu->mmio_needed = 0;
5435                 }
5436                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5437                 r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
5438                 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5439                 if (r != EMULATE_DONE) {
5440                         r = 0;
5441                         goto out;
5442                 }
5443         }
5444         if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5445                 kvm_register_write(vcpu, VCPU_REGS_RAX,
5446                                      kvm_run->hypercall.ret);
5447
5448         r = __vcpu_run(vcpu);
5449
5450 out:
5451         post_kvm_run_save(vcpu);
5452         if (vcpu->sigset_active)
5453                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5454
5455         return r;
5456 }
5457
5458 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5459 {
5460         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5461         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5462         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5463         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5464         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5465         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5466         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5467         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5468 #ifdef CONFIG_X86_64
5469         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5470         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5471         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5472         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5473         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5474         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5475         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5476         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5477 #endif
5478
5479         regs->rip = kvm_rip_read(vcpu);
5480         regs->rflags = kvm_get_rflags(vcpu);
5481
5482         return 0;
5483 }
5484
5485 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5486 {
5487         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5488         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5489         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5490         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5491         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5492         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5493         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5494         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5495 #ifdef CONFIG_X86_64
5496         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5497         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5498         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5499         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5500         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5501         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5502         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5503         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5504 #endif
5505
5506         kvm_rip_write(vcpu, regs->rip);
5507         kvm_set_rflags(vcpu, regs->rflags);
5508
5509         vcpu->arch.exception.pending = false;
5510
5511         kvm_make_request(KVM_REQ_EVENT, vcpu);
5512
5513         return 0;
5514 }
5515
5516 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5517 {
5518         struct kvm_segment cs;
5519
5520         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5521         *db = cs.db;
5522         *l = cs.l;
5523 }
5524 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5525
5526 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5527                                   struct kvm_sregs *sregs)
5528 {
5529         struct desc_ptr dt;
5530
5531         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5532         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5533         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5534         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5535         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5536         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5537
5538         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5539         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5540
5541         kvm_x86_ops->get_idt(vcpu, &dt);
5542         sregs->idt.limit = dt.size;
5543         sregs->idt.base = dt.address;
5544         kvm_x86_ops->get_gdt(vcpu, &dt);
5545         sregs->gdt.limit = dt.size;
5546         sregs->gdt.base = dt.address;
5547
5548         sregs->cr0 = kvm_read_cr0(vcpu);
5549         sregs->cr2 = vcpu->arch.cr2;
5550         sregs->cr3 = kvm_read_cr3(vcpu);
5551         sregs->cr4 = kvm_read_cr4(vcpu);
5552         sregs->cr8 = kvm_get_cr8(vcpu);
5553         sregs->efer = vcpu->arch.efer;
5554         sregs->apic_base = kvm_get_apic_base(vcpu);
5555
5556         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5557
5558         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5559                 set_bit(vcpu->arch.interrupt.nr,
5560                         (unsigned long *)sregs->interrupt_bitmap);
5561
5562         return 0;
5563 }
5564
5565 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5566                                     struct kvm_mp_state *mp_state)
5567 {
5568         mp_state->mp_state = vcpu->arch.mp_state;
5569         return 0;
5570 }
5571
5572 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5573                                     struct kvm_mp_state *mp_state)
5574 {
5575         vcpu->arch.mp_state = mp_state->mp_state;
5576         kvm_make_request(KVM_REQ_EVENT, vcpu);
5577         return 0;
5578 }
5579
5580 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5581                     bool has_error_code, u32 error_code)
5582 {
5583         struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5584         int ret;
5585
5586         init_emulate_ctxt(vcpu);
5587
5588         ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5589                                    tss_selector, reason, has_error_code,
5590                                    error_code);
5591
5592         if (ret)
5593                 return EMULATE_FAIL;
5594
5595         memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5596         kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5597         kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5598         kvm_make_request(KVM_REQ_EVENT, vcpu);
5599         return EMULATE_DONE;
5600 }
5601 EXPORT_SYMBOL_GPL(kvm_task_switch);
5602
5603 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5604                                   struct kvm_sregs *sregs)
5605 {
5606         int mmu_reset_needed = 0;
5607         int pending_vec, max_bits, idx;
5608         struct desc_ptr dt;
5609
5610         dt.size = sregs->idt.limit;
5611         dt.address = sregs->idt.base;
5612         kvm_x86_ops->set_idt(vcpu, &dt);
5613         dt.size = sregs->gdt.limit;
5614         dt.address = sregs->gdt.base;
5615         kvm_x86_ops->set_gdt(vcpu, &dt);
5616
5617         vcpu->arch.cr2 = sregs->cr2;
5618         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
5619         vcpu->arch.cr3 = sregs->cr3;
5620         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
5621
5622         kvm_set_cr8(vcpu, sregs->cr8);
5623
5624         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5625         kvm_x86_ops->set_efer(vcpu, sregs->efer);
5626         kvm_set_apic_base(vcpu, sregs->apic_base);
5627
5628         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5629         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5630         vcpu->arch.cr0 = sregs->cr0;
5631
5632         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5633         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5634         if (sregs->cr4 & X86_CR4_OSXSAVE)
5635                 update_cpuid(vcpu);
5636
5637         idx = srcu_read_lock(&vcpu->kvm->srcu);
5638         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5639                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
5640                 mmu_reset_needed = 1;
5641         }
5642         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5643
5644         if (mmu_reset_needed)
5645                 kvm_mmu_reset_context(vcpu);
5646
5647         max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5648         pending_vec = find_first_bit(
5649                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5650         if (pending_vec < max_bits) {
5651                 kvm_queue_interrupt(vcpu, pending_vec, false);
5652                 pr_debug("Set back pending irq %d\n", pending_vec);
5653         }
5654
5655         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5656         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5657         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5658         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5659         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5660         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5661
5662         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5663         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5664
5665         update_cr8_intercept(vcpu);
5666
5667         /* Older userspace won't unhalt the vcpu on reset. */
5668         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5669             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5670             !is_protmode(vcpu))
5671                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5672
5673         kvm_make_request(KVM_REQ_EVENT, vcpu);
5674
5675         return 0;
5676 }
5677
5678 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5679                                         struct kvm_guest_debug *dbg)
5680 {
5681         unsigned long rflags;
5682         int i, r;
5683
5684         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5685                 r = -EBUSY;
5686                 if (vcpu->arch.exception.pending)
5687                         goto out;
5688                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5689                         kvm_queue_exception(vcpu, DB_VECTOR);
5690                 else
5691                         kvm_queue_exception(vcpu, BP_VECTOR);
5692         }
5693
5694         /*
5695          * Read rflags as long as potentially injected trace flags are still
5696          * filtered out.
5697          */
5698         rflags = kvm_get_rflags(vcpu);
5699
5700         vcpu->guest_debug = dbg->control;
5701         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5702                 vcpu->guest_debug = 0;
5703
5704         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5705                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5706                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5707                 vcpu->arch.switch_db_regs =
5708                         (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5709         } else {
5710                 for (i = 0; i < KVM_NR_DB_REGS; i++)
5711                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5712                 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5713         }
5714
5715         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5716                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5717                         get_segment_base(vcpu, VCPU_SREG_CS);
5718
5719         /*
5720          * Trigger an rflags update that will inject or remove the trace
5721          * flags.
5722          */
5723         kvm_set_rflags(vcpu, rflags);
5724
5725         kvm_x86_ops->set_guest_debug(vcpu, dbg);
5726
5727         r = 0;
5728
5729 out:
5730
5731         return r;
5732 }
5733
5734 /*
5735  * Translate a guest virtual address to a guest physical address.
5736  */
5737 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5738                                     struct kvm_translation *tr)
5739 {
5740         unsigned long vaddr = tr->linear_address;
5741         gpa_t gpa;
5742         int idx;
5743
5744         idx = srcu_read_lock(&vcpu->kvm->srcu);
5745         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5746         srcu_read_unlock(&vcpu->kvm->srcu, idx);
5747         tr->physical_address = gpa;
5748         tr->valid = gpa != UNMAPPED_GVA;
5749         tr->writeable = 1;
5750         tr->usermode = 0;
5751
5752         return 0;
5753 }
5754
5755 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5756 {
5757         struct i387_fxsave_struct *fxsave =
5758                         &vcpu->arch.guest_fpu.state->fxsave;
5759
5760         memcpy(fpu->fpr, fxsave->st_space, 128);
5761         fpu->fcw = fxsave->cwd;
5762         fpu->fsw = fxsave->swd;
5763         fpu->ftwx = fxsave->twd;
5764         fpu->last_opcode = fxsave->fop;
5765         fpu->last_ip = fxsave->rip;
5766         fpu->last_dp = fxsave->rdp;
5767         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5768
5769         return 0;
5770 }
5771
5772 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5773 {
5774         struct i387_fxsave_struct *fxsave =
5775                         &vcpu->arch.guest_fpu.state->fxsave;
5776
5777         memcpy(fxsave->st_space, fpu->fpr, 128);
5778         fxsave->cwd = fpu->fcw;
5779         fxsave->swd = fpu->fsw;
5780         fxsave->twd = fpu->ftwx;
5781         fxsave->fop = fpu->last_opcode;
5782         fxsave->rip = fpu->last_ip;
5783         fxsave->rdp = fpu->last_dp;
5784         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5785
5786         return 0;
5787 }
5788
5789 int fx_init(struct kvm_vcpu *vcpu)
5790 {
5791         int err;
5792
5793         err = fpu_alloc(&vcpu->arch.guest_fpu);
5794         if (err)
5795                 return err;
5796
5797         fpu_finit(&vcpu->arch.guest_fpu);
5798
5799         /*
5800          * Ensure guest xcr0 is valid for loading
5801          */
5802         vcpu->arch.xcr0 = XSTATE_FP;
5803
5804         vcpu->arch.cr0 |= X86_CR0_ET;
5805
5806         return 0;
5807 }
5808 EXPORT_SYMBOL_GPL(fx_init);
5809
5810 static void fx_free(struct kvm_vcpu *vcpu)
5811 {
5812         fpu_free(&vcpu->arch.guest_fpu);
5813 }
5814
5815 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5816 {
5817         if (vcpu->guest_fpu_loaded)
5818                 return;
5819
5820         /*
5821          * Restore all possible states in the guest,
5822          * and assume host would use all available bits.
5823          * Guest xcr0 would be loaded later.
5824          */
5825         kvm_put_guest_xcr0(vcpu);
5826         vcpu->guest_fpu_loaded = 1;
5827         unlazy_fpu(current);
5828         fpu_restore_checking(&vcpu->arch.guest_fpu);
5829         trace_kvm_fpu(1);
5830 }
5831
5832 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5833 {
5834         kvm_put_guest_xcr0(vcpu);
5835
5836         if (!vcpu->guest_fpu_loaded)
5837                 return;
5838
5839         vcpu->guest_fpu_loaded = 0;
5840         fpu_save_init(&vcpu->arch.guest_fpu);
5841         ++vcpu->stat.fpu_reload;
5842         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5843         trace_kvm_fpu(0);
5844 }
5845
5846 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5847 {
5848         kvmclock_reset(vcpu);
5849
5850         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5851         fx_free(vcpu);
5852         kvm_x86_ops->vcpu_free(vcpu);
5853 }
5854
5855 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5856                                                 unsigned int id)
5857 {
5858         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5859                 printk_once(KERN_WARNING
5860                 "kvm: SMP vm created on host with unstable TSC; "
5861                 "guest TSC will not be reliable\n");
5862         return kvm_x86_ops->vcpu_create(kvm, id);
5863 }
5864
5865 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5866 {
5867         int r;
5868
5869         vcpu->arch.mtrr_state.have_fixed = 1;
5870         vcpu_load(vcpu);
5871         r = kvm_arch_vcpu_reset(vcpu);
5872         if (r == 0)
5873                 r = kvm_mmu_setup(vcpu);
5874         vcpu_put(vcpu);
5875         if (r < 0)
5876                 goto free_vcpu;
5877
5878         return 0;
5879 free_vcpu:
5880         kvm_x86_ops->vcpu_free(vcpu);
5881         return r;
5882 }
5883
5884 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5885 {
5886         vcpu->arch.apf.msr_val = 0;
5887
5888         vcpu_load(vcpu);
5889         kvm_mmu_unload(vcpu);
5890         vcpu_put(vcpu);
5891
5892         fx_free(vcpu);
5893         kvm_x86_ops->vcpu_free(vcpu);
5894 }
5895
5896 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5897 {
5898         vcpu->arch.nmi_pending = false;
5899         vcpu->arch.nmi_injected = false;
5900
5901         vcpu->arch.switch_db_regs = 0;
5902         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5903         vcpu->arch.dr6 = DR6_FIXED_1;
5904         vcpu->arch.dr7 = DR7_FIXED_1;
5905
5906         kvm_make_request(KVM_REQ_EVENT, vcpu);
5907         vcpu->arch.apf.msr_val = 0;
5908
5909         kvmclock_reset(vcpu);
5910
5911         kvm_clear_async_pf_completion_queue(vcpu);
5912         kvm_async_pf_hash_reset(vcpu);
5913         vcpu->arch.apf.halted = false;
5914
5915         return kvm_x86_ops->vcpu_reset(vcpu);
5916 }
5917
5918 int kvm_arch_hardware_enable(void *garbage)
5919 {
5920         struct kvm *kvm;
5921         struct kvm_vcpu *vcpu;
5922         int i;
5923
5924         kvm_shared_msr_cpu_online();
5925         list_for_each_entry(kvm, &vm_list, vm_list)
5926                 kvm_for_each_vcpu(i, vcpu, kvm)
5927                         if (vcpu->cpu == smp_processor_id())
5928                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5929         return kvm_x86_ops->hardware_enable(garbage);
5930 }
5931
5932 void kvm_arch_hardware_disable(void *garbage)
5933 {
5934         kvm_x86_ops->hardware_disable(garbage);
5935         drop_user_return_notifiers(garbage);
5936 }
5937
5938 int kvm_arch_hardware_setup(void)
5939 {
5940         return kvm_x86_ops->hardware_setup();
5941 }
5942
5943 void kvm_arch_hardware_unsetup(void)
5944 {
5945         kvm_x86_ops->hardware_unsetup();
5946 }
5947
5948 void kvm_arch_check_processor_compat(void *rtn)
5949 {
5950         kvm_x86_ops->check_processor_compatibility(rtn);
5951 }
5952
5953 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5954 {
5955         struct page *page;
5956         struct kvm *kvm;
5957         int r;
5958
5959         BUG_ON(vcpu->kvm == NULL);
5960         kvm = vcpu->kvm;
5961
5962         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5963         vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5964         vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5965         vcpu->arch.mmu.translate_gpa = translate_gpa;
5966         vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5967         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5968                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5969         else
5970                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5971
5972         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5973         if (!page) {
5974                 r = -ENOMEM;
5975                 goto fail;
5976         }
5977         vcpu->arch.pio_data = page_address(page);
5978
5979         if (!kvm->arch.virtual_tsc_khz)
5980                 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5981
5982         r = kvm_mmu_create(vcpu);
5983         if (r < 0)
5984                 goto fail_free_pio_data;
5985
5986         if (irqchip_in_kernel(kvm)) {
5987                 r = kvm_create_lapic(vcpu);
5988                 if (r < 0)
5989                         goto fail_mmu_destroy;
5990         }
5991
5992         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5993                                        GFP_KERNEL);
5994         if (!vcpu->arch.mce_banks) {
5995                 r = -ENOMEM;
5996                 goto fail_free_lapic;
5997         }
5998         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5999
6000         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
6001                 goto fail_free_mce_banks;
6002
6003         kvm_async_pf_hash_reset(vcpu);
6004
6005         return 0;
6006 fail_free_mce_banks:
6007         kfree(vcpu->arch.mce_banks);
6008 fail_free_lapic:
6009         kvm_free_lapic(vcpu);
6010 fail_mmu_destroy:
6011         kvm_mmu_destroy(vcpu);
6012 fail_free_pio_data:
6013         free_page((unsigned long)vcpu->arch.pio_data);
6014 fail:
6015         return r;
6016 }
6017
6018 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
6019 {
6020         int idx;
6021
6022         kfree(vcpu->arch.mce_banks);
6023         kvm_free_lapic(vcpu);
6024         idx = srcu_read_lock(&vcpu->kvm->srcu);
6025         kvm_mmu_destroy(vcpu);
6026         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6027         free_page((unsigned long)vcpu->arch.pio_data);
6028 }
6029
6030 int kvm_arch_init_vm(struct kvm *kvm)
6031 {
6032         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
6033         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
6034
6035         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
6036         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
6037
6038         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
6039
6040         return 0;
6041 }
6042
6043 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
6044 {
6045         vcpu_load(vcpu);
6046         kvm_mmu_unload(vcpu);
6047         vcpu_put(vcpu);
6048 }
6049
6050 static void kvm_free_vcpus(struct kvm *kvm)
6051 {
6052         unsigned int i;
6053         struct kvm_vcpu *vcpu;
6054
6055         /*
6056          * Unpin any mmu pages first.
6057          */
6058         kvm_for_each_vcpu(i, vcpu, kvm) {
6059                 kvm_clear_async_pf_completion_queue(vcpu);
6060                 kvm_unload_vcpu_mmu(vcpu);
6061         }
6062         kvm_for_each_vcpu(i, vcpu, kvm)
6063                 kvm_arch_vcpu_free(vcpu);
6064
6065         mutex_lock(&kvm->lock);
6066         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
6067                 kvm->vcpus[i] = NULL;
6068
6069         atomic_set(&kvm->online_vcpus, 0);
6070         mutex_unlock(&kvm->lock);
6071 }
6072
6073 void kvm_arch_sync_events(struct kvm *kvm)
6074 {
6075         kvm_free_all_assigned_devices(kvm);
6076         kvm_free_pit(kvm);
6077 }
6078
6079 void kvm_arch_destroy_vm(struct kvm *kvm)
6080 {
6081         kvm_iommu_unmap_guest(kvm);
6082         kfree(kvm->arch.vpic);
6083         kfree(kvm->arch.vioapic);
6084         kvm_free_vcpus(kvm);
6085         if (kvm->arch.apic_access_page)
6086                 put_page(kvm->arch.apic_access_page);
6087         if (kvm->arch.ept_identity_pagetable)
6088                 put_page(kvm->arch.ept_identity_pagetable);
6089 }
6090
6091 int kvm_arch_prepare_memory_region(struct kvm *kvm,
6092                                 struct kvm_memory_slot *memslot,
6093                                 struct kvm_memory_slot old,
6094                                 struct kvm_userspace_memory_region *mem,
6095                                 int user_alloc)
6096 {
6097         int npages = memslot->npages;
6098         int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
6099
6100         /* Prevent internal slot pages from being moved by fork()/COW. */
6101         if (memslot->id >= KVM_MEMORY_SLOTS)
6102                 map_flags = MAP_SHARED | MAP_ANONYMOUS;
6103
6104         /*To keep backward compatibility with older userspace,
6105          *x86 needs to hanlde !user_alloc case.
6106          */
6107         if (!user_alloc) {
6108                 if (npages && !old.rmap) {
6109                         unsigned long userspace_addr;
6110
6111                         down_write(&current->mm->mmap_sem);
6112                         userspace_addr = do_mmap(NULL, 0,
6113                                                  npages * PAGE_SIZE,
6114                                                  PROT_READ | PROT_WRITE,
6115                                                  map_flags,
6116                                                  0);
6117                         up_write(&current->mm->mmap_sem);
6118
6119                         if (IS_ERR((void *)userspace_addr))
6120                                 return PTR_ERR((void *)userspace_addr);
6121
6122                         memslot->userspace_addr = userspace_addr;
6123                 }
6124         }
6125
6126
6127         return 0;
6128 }
6129
6130 void kvm_arch_commit_memory_region(struct kvm *kvm,
6131                                 struct kvm_userspace_memory_region *mem,
6132                                 struct kvm_memory_slot old,
6133                                 int user_alloc)
6134 {
6135
6136         int nr_mmu_pages = 0, npages = mem->memory_size >> PAGE_SHIFT;
6137
6138         if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6139                 int ret;
6140
6141                 down_write(&current->mm->mmap_sem);
6142                 ret = do_munmap(current->mm, old.userspace_addr,
6143                                 old.npages * PAGE_SIZE);
6144                 up_write(&current->mm->mmap_sem);
6145                 if (ret < 0)
6146                         printk(KERN_WARNING
6147                                "kvm_vm_ioctl_set_memory_region: "
6148                                "failed to munmap memory\n");
6149         }
6150
6151         if (!kvm->arch.n_requested_mmu_pages)
6152                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6153
6154         spin_lock(&kvm->mmu_lock);
6155         if (nr_mmu_pages)
6156                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6157         kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6158         spin_unlock(&kvm->mmu_lock);
6159 }
6160
6161 void kvm_arch_flush_shadow(struct kvm *kvm)
6162 {
6163         kvm_mmu_zap_all(kvm);
6164         kvm_reload_remote_mmus(kvm);
6165 }
6166
6167 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6168 {
6169         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6170                 !vcpu->arch.apf.halted)
6171                 || !list_empty_careful(&vcpu->async_pf.done)
6172                 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6173                 || vcpu->arch.nmi_pending ||
6174                 (kvm_arch_interrupt_allowed(vcpu) &&
6175                  kvm_cpu_has_interrupt(vcpu));
6176 }
6177
6178 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6179 {
6180         int me;
6181         int cpu = vcpu->cpu;
6182
6183         if (waitqueue_active(&vcpu->wq)) {
6184                 wake_up_interruptible(&vcpu->wq);
6185                 ++vcpu->stat.halt_wakeup;
6186         }
6187
6188         me = get_cpu();
6189         if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6190                 if (kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE)
6191                         smp_send_reschedule(cpu);
6192         put_cpu();
6193 }
6194
6195 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6196 {
6197         return kvm_x86_ops->interrupt_allowed(vcpu);
6198 }
6199
6200 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6201 {
6202         unsigned long current_rip = kvm_rip_read(vcpu) +
6203                 get_segment_base(vcpu, VCPU_SREG_CS);
6204
6205         return current_rip == linear_rip;
6206 }
6207 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6208
6209 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6210 {
6211         unsigned long rflags;
6212
6213         rflags = kvm_x86_ops->get_rflags(vcpu);
6214         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6215                 rflags &= ~X86_EFLAGS_TF;
6216         return rflags;
6217 }
6218 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6219
6220 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6221 {
6222         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6223             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6224                 rflags |= X86_EFLAGS_TF;
6225         kvm_x86_ops->set_rflags(vcpu, rflags);
6226         kvm_make_request(KVM_REQ_EVENT, vcpu);
6227 }
6228 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6229
6230 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
6231 {
6232         int r;
6233
6234         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
6235               is_error_page(work->page))
6236                 return;
6237
6238         r = kvm_mmu_reload(vcpu);
6239         if (unlikely(r))
6240                 return;
6241
6242         if (!vcpu->arch.mmu.direct_map &&
6243               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
6244                 return;
6245
6246         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
6247 }
6248
6249 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
6250 {
6251         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
6252 }
6253
6254 static inline u32 kvm_async_pf_next_probe(u32 key)
6255 {
6256         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
6257 }
6258
6259 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6260 {
6261         u32 key = kvm_async_pf_hash_fn(gfn);
6262
6263         while (vcpu->arch.apf.gfns[key] != ~0)
6264                 key = kvm_async_pf_next_probe(key);
6265
6266         vcpu->arch.apf.gfns[key] = gfn;
6267 }
6268
6269 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
6270 {
6271         int i;
6272         u32 key = kvm_async_pf_hash_fn(gfn);
6273
6274         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
6275                      (vcpu->arch.apf.gfns[key] != gfn &&
6276                       vcpu->arch.apf.gfns[key] != ~0); i++)
6277                 key = kvm_async_pf_next_probe(key);
6278
6279         return key;
6280 }
6281
6282 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6283 {
6284         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
6285 }
6286
6287 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
6288 {
6289         u32 i, j, k;
6290
6291         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
6292         while (true) {
6293                 vcpu->arch.apf.gfns[i] = ~0;
6294                 do {
6295                         j = kvm_async_pf_next_probe(j);
6296                         if (vcpu->arch.apf.gfns[j] == ~0)
6297                                 return;
6298                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
6299                         /*
6300                          * k lies cyclically in ]i,j]
6301                          * |    i.k.j |
6302                          * |....j i.k.| or  |.k..j i...|
6303                          */
6304                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
6305                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
6306                 i = j;
6307         }
6308 }
6309
6310 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
6311 {
6312
6313         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
6314                                       sizeof(val));
6315 }
6316
6317 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
6318                                      struct kvm_async_pf *work)
6319 {
6320         struct x86_exception fault;
6321
6322         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
6323         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
6324
6325         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
6326             (vcpu->arch.apf.send_user_only &&
6327              kvm_x86_ops->get_cpl(vcpu) == 0))
6328                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
6329         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
6330                 fault.vector = PF_VECTOR;
6331                 fault.error_code_valid = true;
6332                 fault.error_code = 0;
6333                 fault.nested_page_fault = false;
6334                 fault.address = work->arch.token;
6335                 kvm_inject_page_fault(vcpu, &fault);
6336         }
6337 }
6338
6339 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
6340                                  struct kvm_async_pf *work)
6341 {
6342         struct x86_exception fault;
6343
6344         trace_kvm_async_pf_ready(work->arch.token, work->gva);
6345         if (is_error_page(work->page))
6346                 work->arch.token = ~0; /* broadcast wakeup */
6347         else
6348                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
6349
6350         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
6351             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
6352                 fault.vector = PF_VECTOR;
6353                 fault.error_code_valid = true;
6354                 fault.error_code = 0;
6355                 fault.nested_page_fault = false;
6356                 fault.address = work->arch.token;
6357                 kvm_inject_page_fault(vcpu, &fault);
6358         }
6359         vcpu->arch.apf.halted = false;
6360 }
6361
6362 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
6363 {
6364         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
6365                 return true;
6366         else
6367                 return !kvm_event_needs_reinjection(vcpu) &&
6368                         kvm_x86_ops->interrupt_allowed(vcpu);
6369 }
6370
6371 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6372 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6373 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6374 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6375 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6376 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6377 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6378 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6379 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6380 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6381 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6382 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);