2 * linux/drivers/mmc/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/config.h>
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/device.h>
24 #include <linux/delay.h>
25 #include <linux/interrupt.h>
26 #include <linux/blkdev.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/protocol.h>
34 #include <asm/sizes.h>
38 #ifdef CONFIG_MMC_DEBUG
39 #define DBG(x...) printk(KERN_DEBUG x)
41 #define DBG(x...) do { } while (0)
54 unsigned int power_mode;
56 struct mmc_request *mrq;
57 struct mmc_command *cmd;
58 struct mmc_data *data;
61 struct pxa_dma_desc *sg_cpu;
64 unsigned int dma_size;
69 * The base MMC clock rate
71 #define CLOCKRATE 20000000
73 static inline unsigned int ns_to_clocks(unsigned int ns)
75 return (ns * (CLOCKRATE / 1000000) + 999) / 1000;
78 static void pxamci_stop_clock(struct pxamci_host *host)
80 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
81 unsigned long timeout = 10000;
84 writel(STOP_CLOCK, host->base + MMC_STRPCL);
87 v = readl(host->base + MMC_STAT);
88 if (!(v & STAT_CLK_EN))
94 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
98 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
102 spin_lock_irqsave(&host->lock, flags);
103 host->imask &= ~mask;
104 writel(host->imask, host->base + MMC_I_MASK);
105 spin_unlock_irqrestore(&host->lock, flags);
108 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
112 spin_lock_irqsave(&host->lock, flags);
114 writel(host->imask, host->base + MMC_I_MASK);
115 spin_unlock_irqrestore(&host->lock, flags);
118 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
120 unsigned int nob = data->blocks;
121 unsigned int timeout, size;
128 if (data->flags & MMC_DATA_STREAM)
131 writel(nob, host->base + MMC_NOB);
132 writel(1 << data->blksz_bits, host->base + MMC_BLKLEN);
134 timeout = ns_to_clocks(data->timeout_ns) + data->timeout_clks;
135 writel((timeout + 255) / 256, host->base + MMC_RDTO);
137 if (data->flags & MMC_DATA_READ) {
138 host->dma_dir = DMA_FROM_DEVICE;
139 dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
141 DRCMRRXMMC = host->dma | DRCMR_MAPVLD;
143 host->dma_dir = DMA_TO_DEVICE;
144 dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
146 DRCMRTXMMC = host->dma | DRCMR_MAPVLD;
149 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
151 host->dma_size = data->blocks << data->blksz_bits;
152 host->dma_buf = dma_map_single(mmc_dev(host->mmc), data->req->buffer,
153 host->dma_size, host->dma_dir);
155 for (i = 0, size = host->dma_size, dma = host->dma_buf; size; i++) {
158 if (len > DCMD_LENGTH)
161 if (data->flags & MMC_DATA_READ) {
162 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
163 host->sg_cpu[i].dtadr = dma;
165 host->sg_cpu[i].dsadr = dma;
166 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
168 host->sg_cpu[i].dcmd = dcmd | len;
174 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
175 sizeof(struct pxa_dma_desc);
177 host->sg_cpu[i].ddadr = DDADR_STOP;
182 DDADR(host->dma) = host->sg_dma;
183 DCSR(host->dma) = DCSR_RUN;
186 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
188 WARN_ON(host->cmd != NULL);
191 if (cmd->flags & MMC_RSP_BUSY)
194 switch (cmd->flags & (MMC_RSP_MASK | MMC_RSP_CRC)) {
195 case MMC_RSP_SHORT | MMC_RSP_CRC:
196 cmdat |= CMDAT_RESP_SHORT;
199 cmdat |= CMDAT_RESP_R3;
201 case MMC_RSP_LONG | MMC_RSP_CRC:
202 cmdat |= CMDAT_RESP_R2;
208 writel(cmd->opcode, host->base + MMC_CMD);
209 writel(cmd->arg >> 16, host->base + MMC_ARGH);
210 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
211 writel(cmdat, host->base + MMC_CMDAT);
212 writel(host->clkrt, host->base + MMC_CLKRT);
214 writel(START_CLOCK, host->base + MMC_STRPCL);
216 pxamci_enable_irq(host, END_CMD_RES);
219 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
221 DBG("PXAMCI: request done\n");
225 mmc_request_done(host->mmc, mrq);
228 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
230 struct mmc_command *cmd = host->cmd;
240 * Did I mention this is Sick. We always need to
241 * discard the upper 8 bits of the first 16-bit word.
243 v = readl(host->base + MMC_RES) & 0xffff;
244 for (i = 0; i < 4; i++) {
245 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
246 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
247 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
251 if (stat & STAT_TIME_OUT_RESPONSE) {
252 cmd->error = MMC_ERR_TIMEOUT;
253 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
254 cmd->error = MMC_ERR_BADCRC;
257 pxamci_disable_irq(host, END_CMD_RES);
258 if (host->data && cmd->error == MMC_ERR_NONE) {
259 pxamci_enable_irq(host, DATA_TRAN_DONE);
261 pxamci_finish_request(host, host->mrq);
267 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
269 struct mmc_data *data = host->data;
275 dma_unmap_single(mmc_dev(host->mmc), host->dma_buf, host->dma_size,
278 if (stat & STAT_READ_TIME_OUT)
279 data->error = MMC_ERR_TIMEOUT;
280 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
281 data->error = MMC_ERR_BADCRC;
284 * There appears to be a hardware design bug here. There seems to
285 * be no way to find out how much data was transferred to the card.
286 * This means that if there was an error on any block, we mark all
287 * data blocks as being in error.
289 if (data->error == MMC_ERR_NONE)
290 data->bytes_xfered = data->blocks << data->blksz_bits;
292 data->bytes_xfered = 0;
294 pxamci_disable_irq(host, DATA_TRAN_DONE);
297 if (host->mrq->stop && data->error == MMC_ERR_NONE) {
298 pxamci_stop_clock(host);
299 pxamci_start_cmd(host, host->mrq->stop, 0);
301 pxamci_finish_request(host, host->mrq);
307 static irqreturn_t pxamci_irq(int irq, void *devid, struct pt_regs *regs)
309 struct pxamci_host *host = devid;
313 ireg = readl(host->base + MMC_I_REG);
315 DBG("PXAMCI: irq %08x\n", ireg);
318 unsigned stat = readl(host->base + MMC_STAT);
320 DBG("PXAMCI: stat %08x\n", stat);
322 if (ireg & END_CMD_RES)
323 handled |= pxamci_cmd_done(host, stat);
324 if (ireg & DATA_TRAN_DONE)
325 handled |= pxamci_data_done(host, stat);
328 return IRQ_RETVAL(handled);
331 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
333 struct pxamci_host *host = mmc_priv(mmc);
336 WARN_ON(host->mrq != NULL);
340 pxamci_stop_clock(host);
343 host->cmdat &= ~CMDAT_INIT;
346 pxamci_setup_data(host, mrq->data);
348 cmdat &= ~CMDAT_BUSY;
349 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
350 if (mrq->data->flags & MMC_DATA_WRITE)
351 cmdat |= CMDAT_WRITE;
353 if (mrq->data->flags & MMC_DATA_STREAM)
354 cmdat |= CMDAT_STREAM;
357 pxamci_start_cmd(host, mrq->cmd, cmdat);
360 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
362 struct pxamci_host *host = mmc_priv(mmc);
364 DBG("pxamci_set_ios: clock %u power %u vdd %u.%02u\n",
365 ios->clock, ios->power_mode, ios->vdd / 100,
369 unsigned int clk = CLOCKRATE / ios->clock;
370 if (CLOCKRATE / clk > ios->clock)
372 host->clkrt = fls(clk) - 1;
375 * we write clkrt on the next command
377 } else if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
379 * Ensure that the clock is off.
381 writel(STOP_CLOCK, host->base + MMC_STRPCL);
384 if (host->power_mode != ios->power_mode) {
385 host->power_mode = ios->power_mode;
388 * power control? none on the lubbock.
391 if (ios->power_mode == MMC_POWER_ON)
392 host->cmdat |= CMDAT_INIT;
395 DBG("pxamci_set_ios: clkrt = %x cmdat = %x\n",
396 host->clkrt, host->cmdat);
399 static struct mmc_host_ops pxamci_ops = {
400 .request = pxamci_request,
401 .set_ios = pxamci_set_ios,
404 static void pxamci_dma_irq(int dma, void *devid, struct pt_regs *regs)
406 printk(KERN_ERR "DMA%d: IRQ???\n", dma);
407 DCSR(dma) = DCSR_STARTINTR|DCSR_ENDINTR|DCSR_BUSERR;
410 static int pxamci_probe(struct device *dev)
412 struct platform_device *pdev = to_platform_device(dev);
413 struct mmc_host *mmc;
414 struct pxamci_host *host = NULL;
418 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
419 irq = platform_get_irq(pdev, 0);
420 if (!r || irq == NO_IRQ)
423 r = request_mem_region(r->start, SZ_4K, "PXAMCI");
427 mmc = mmc_alloc_host(sizeof(struct pxamci_host), dev);
433 mmc->ops = &pxamci_ops;
435 mmc->f_max = 20000000;
436 mmc->ocr_avail = MMC_VDD_32_33;
438 host = mmc_priv(mmc);
442 host->sg_cpu = dma_alloc_coherent(dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
448 spin_lock_init(&host->lock);
451 host->imask = TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
452 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE;
454 host->base = ioremap(r->start, SZ_4K);
461 * Ensure that the host controller is shut down, and setup
464 pxamci_stop_clock(host);
465 writel(0, host->base + MMC_SPI);
466 writel(64, host->base + MMC_RESTO);
468 pxa_gpio_mode(GPIO6_MMCCLK_MD);
469 pxa_gpio_mode(GPIO8_MMCCS0_MD);
470 pxa_set_cken(CKEN12_MMC, 1);
472 host->dma = pxa_request_dma("PXAMCI", DMA_PRIO_LOW, pxamci_dma_irq, host);
478 ret = request_irq(host->irq, pxamci_irq, 0, "PXAMCI", host);
482 dev_set_drvdata(dev, mmc);
491 pxa_free_dma(host->dma);
495 dma_free_coherent(dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
503 static int pxamci_remove(struct device *dev)
505 struct mmc_host *mmc = dev_get_drvdata(dev);
507 dev_set_drvdata(dev, NULL);
510 struct pxamci_host *host = mmc_priv(mmc);
512 mmc_remove_host(mmc);
514 pxamci_stop_clock(host);
515 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
516 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
517 host->base + MMC_I_MASK);
519 free_irq(host->irq, host);
520 pxa_free_dma(host->dma);
522 dma_free_coherent(dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
524 pxa_set_cken(CKEN12_MMC, 0);
526 release_resource(host->res);
533 static int pxamci_suspend(struct device *dev, u32 state, u32 level)
535 struct mmc_host *mmc = dev_get_drvdata(dev);
538 if (mmc && level == SUSPEND_DISABLE)
539 ret = mmc_suspend_host(mmc, state);
544 static int pxamci_resume(struct device *dev, u32 level)
546 struct mmc_host *mmc = dev_get_drvdata(dev);
549 if (mmc && level == RESUME_ENABLE)
550 ret = mmc_resume_host(mmc);
555 static struct device_driver pxamci_driver = {
556 .name = "pxa2xx-mci",
557 .bus = &platform_bus_type,
558 .probe = pxamci_probe,
559 .remove = pxamci_remove,
560 .suspend = pxamci_suspend,
561 .resume = pxamci_resume,
564 static int __init pxamci_init(void)
566 return driver_register(&pxamci_driver);
569 static void __exit pxamci_exit(void)
571 driver_unregister(&pxamci_driver);
574 module_init(pxamci_init);
575 module_exit(pxamci_exit);
577 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
578 MODULE_LICENSE("GPL");