drivers/char/agp/i460-agp.c

   1 /*
   2  * For documentation on the i460 AGP interface, see Chapter 7 (AGP Subsystem) of
   3  * the "Intel 460GTX Chipset Software Developer's Manual":
   4  * http://developer.intel.com/design/itanium/downloads/24870401s.htm
   5  */
   6 /*
   7  * 460GX support by Chris Ahna <christopher.j.ahna@intel.com>
   8  * Clean up & simplification by David Mosberger-Tang <davidm@hpl.hp.com>
   9  */
  10 #include <linux/module.h>
  11 #include <linux/pci.h>
  12 #include <linux/init.h>
  13 #include <linux/agp_backend.h>
  14
  15 #include "agp.h"
  16
  17 /*
  18  * The i460 can operate with large (4MB) pages, but there is no sane way to support this
  19  * within the current kernel/DRM environment, so we disable the relevant code for now.
  20  * See also comments in ia64_alloc_page()...
  21  */
  22 #define I460_LARGE_IO_PAGES             0
  23
  24 #if I460_LARGE_IO_PAGES
  25 # define I460_IO_PAGE_SHIFT             i460.io_page_shift
  26 #else
  27 # define I460_IO_PAGE_SHIFT             12
  28 #endif
  29
  30 #define I460_IOPAGES_PER_KPAGE          (PAGE_SIZE >> I460_IO_PAGE_SHIFT)
  31 #define I460_KPAGES_PER_IOPAGE          (1 << (I460_IO_PAGE_SHIFT - PAGE_SHIFT))
  32 #define I460_SRAM_IO_DISABLE            (1 << 4)
  33 #define I460_BAPBASE_ENABLE             (1 << 3)
  34 #define I460_AGPSIZ_MASK                0x7
  35 #define I460_4M_PS                      (1 << 1)
  36
  37 /* Control bits for Out-Of-GART coherency and Burst Write Combining */
  38 #define I460_GXBCTL_OOG         (1UL << 0)
  39 #define I460_GXBCTL_BWC         (1UL << 2)
  40
  41 /*
  42  * gatt_table entries are 32-bits wide on the i460; the generic code ought to declare the
  43  * gatt_table and gatt_table_real pointers a "void *"...
  44  */
  45 #define RD_GATT(index)          readl((u32 *) i460.gatt + (index))
  46 #define WR_GATT(index, val)     writel((val), (u32 *) i460.gatt + (index))
  47 /*
  48  * The 460 spec says we have to read the last location written to make sure that all
  49  * writes have taken effect
  50  */
  51 #define WR_FLUSH_GATT(index)    RD_GATT(index)
  52
  53 #define log2(x)                 ffz(~(x))
  54
  55 static struct {
  56         void *gatt;                             /* ioremap'd GATT area */
  57
  58         /* i460 supports multiple GART page sizes, so GART pageshift is dynamic: */
  59         u8 io_page_shift;
  60
  61         /* BIOS configures chipset to one of 2 possible apbase values: */
  62         u8 dynamic_apbase;
  63
  64         /* structure for tracking partial use of 4MB GART pages: */
  65         struct lp_desc {
  66                 unsigned long *alloced_map;     /* bitmap of kernel-pages in use */
  67                 int refcount;                   /* number of kernel pages using the large page */
  68                 u64 paddr;                      /* physical address of large page */
  69         } *lp_desc;
  70 } i460;
  71
  72 static const struct aper_size_info_8 i460_sizes[3] =
  73 {
  74         /*
  75          * The 32GB aperture is only available with a 4M GART page size.  Due to the
  76          * dynamic GART page size, we can't figure out page_order or num_entries until
  77          * runtime.
  78          */
  79         {32768, 0, 0, 4},
  80         {1024, 0, 0, 2},
  81         {256, 0, 0, 1}
  82 };
  83
  84 static struct gatt_mask i460_masks[] =
  85 {
  86         {
  87           .mask = INTEL_I460_GATT_VALID | INTEL_I460_GATT_COHERENT,
  88           .type = 0
  89         }
  90 };
  91
  92 static int i460_fetch_size (void)
  93 {
  94         int i;
  95         u8 temp;
  96         struct aper_size_info_8 *values;
  97
  98         /* Determine the GART page size */
  99         pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &temp);
 100         i460.io_page_shift = (temp & I460_4M_PS) ? 22 : 12;
 101         pr_debug("i460_fetch_size: io_page_shift=%d\n", i460.io_page_shift);
 102
 103         if (i460.io_page_shift != I460_IO_PAGE_SHIFT) {
 104                 printk(KERN_ERR PFX
 105                        "I/O (GART) page-size %ZuKB doesn't match expected size %ZuKB\n",
 106                        1UL << (i460.io_page_shift - 10), 1UL << (I460_IO_PAGE_SHIFT));
 107                 return 0;
 108         }
 109
 110         values = A_SIZE_8(agp_bridge->aperture_sizes);
 111
 112         pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp);
 113
 114         /* Exit now if the IO drivers for the GART SRAMS are turned off */
 115         if (temp & I460_SRAM_IO_DISABLE) {
 116                 printk(KERN_ERR PFX "GART SRAMS disabled on 460GX chipset\n");
 117                 printk(KERN_ERR PFX "AGPGART operation not possible\n");
 118                 return 0;
 119         }
 120
 121         /* Make sure we don't try to create an 2 ^ 23 entry GATT */
 122         if ((i460.io_page_shift == 0) && ((temp & I460_AGPSIZ_MASK) == 4)) {
 123                 printk(KERN_ERR PFX "We can't have a 32GB aperture with 4KB GART pages\n");
 124                 return 0;
 125         }
 126
 127         /* Determine the proper APBASE register */
 128         if (temp & I460_BAPBASE_ENABLE)
 129                 i460.dynamic_apbase = INTEL_I460_BAPBASE;
 130         else
 131                 i460.dynamic_apbase = INTEL_I460_APBASE;
 132
 133         for (i = 0; i < agp_bridge->num_aperture_sizes; i++) {
 134                 /*
 135                  * Dynamically calculate the proper num_entries and page_order values for
 136                  * the define aperture sizes. Take care not to shift off the end of
 137                  * values[i].size.
 138                  */
 139                 values[i].num_entries = (values[i].size << 8) >> (I460_IO_PAGE_SHIFT - 12);
 140                 values[i].page_order = log2((sizeof(u32)*values[i].num_entries) >> PAGE_SHIFT);
 141         }
 142
 143         for (i = 0; i < agp_bridge->num_aperture_sizes; i++) {
 144                 /* Neglect control bits when matching up size_value */
 145                 if ((temp & I460_AGPSIZ_MASK) == values[i].size_value) {
 146                         agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
 147                         agp_bridge->aperture_size_idx = i;
 148                         return values[i].size;
 149                 }
 150         }
 151
 152         return 0;
 153 }
 154
 155 /* There isn't anything to do here since 460 has no GART TLB. */
 156 static void i460_tlb_flush (agp_memory * mem)
 157 {
 158         return;
 159 }
 160
 161 /*
 162  * This utility function is needed to prevent corruption of the control bits
 163  * which are stored along with the aperture size in 460's AGPSIZ register
 164  */
 165 static void i460_write_agpsiz (u8 size_value)
 166 {
 167         u8 temp;
 168
 169         pci_read_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ, &temp);
 170         pci_write_config_byte(agp_bridge->dev, INTEL_I460_AGPSIZ,
 171                               ((temp & ~I460_AGPSIZ_MASK) | size_value));
 172 }
 173
 174 static void i460_cleanup (void)
 175 {
 176         struct aper_size_info_8 *previous_size;
 177
 178         previous_size = A_SIZE_8(agp_bridge->previous_size);
 179         i460_write_agpsiz(previous_size->size_value);
 180
 181         if (I460_IO_PAGE_SHIFT > PAGE_SHIFT)
 182                 kfree(i460.lp_desc);
 183 }
 184
 185 static int i460_configure (void)
 186 {
 187         union {
 188                 u32 small[2];
 189                 u64 large;
 190         } temp;
 191         size_t size;
 192         u8 scratch;
 193         struct aper_size_info_8 *current_size;
 194
 195         temp.large = 0;
 196
 197         current_size = A_SIZE_8(agp_bridge->current_size);
 198         i460_write_agpsiz(current_size->size_value);
 199
 200         /*
 201          * Do the necessary rigmarole to read all eight bytes of APBASE.
 202          * This has to be done since the AGP aperture can be above 4GB on
 203          * 460 based systems.
 204          */
 205         pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase, &(temp.small[0]));
 206         pci_read_config_dword(agp_bridge->dev, i460.dynamic_apbase + 4, &(temp.small[1]));
 207
 208         /* Clear BAR control bits */
 209         agp_bridge->gart_bus_addr = temp.large & ~((1UL << 3) - 1);
 210
 211         pci_read_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL, &scratch);
 212         pci_write_config_byte(agp_bridge->dev, INTEL_I460_GXBCTL,
 213                               (scratch & 0x02) | I460_GXBCTL_OOG | I460_GXBCTL_BWC);
 214
 215         /*
 216          * Initialize partial allocation trackers if a GART page is bigger than a kernel
 217          * page.
 218          */
 219         if (I460_IO_PAGE_SHIFT > PAGE_SHIFT) {
 220                 size = current_size->num_entries * sizeof(i460.lp_desc[0]);
 221                 i460.lp_desc = kmalloc(size, GFP_KERNEL);
 222                 if (!i460.lp_desc)
 223                         return -ENOMEM;
 224                 memset(i460.lp_desc, 0, size);
 225         }
 226         return 0;
 227 }
 228
 229 static int i460_create_gatt_table (void)
 230 {
 231         int page_order, num_entries, i;
 232         void *temp;
 233
 234         /*
 235          * Load up the fixed address of the GART SRAMS which hold our GATT table.
 236          */
 237         temp = agp_bridge->current_size;
 238         page_order = A_SIZE_8(temp)->page_order;
 239         num_entries = A_SIZE_8(temp)->num_entries;
 240
 241         i460.gatt = ioremap(INTEL_I460_ATTBASE, PAGE_SIZE << page_order);
 242
 243         /* These are no good, the should be removed from the agp_bridge strucure... */
 244         agp_bridge->gatt_table_real = NULL;
 245         agp_bridge->gatt_table = NULL;
 246         agp_bridge->gatt_bus_addr = 0;
 247
 248         for (i = 0; i < num_entries; ++i)
 249                 WR_GATT(i, 0);
 250         WR_FLUSH_GATT(i - 1);
 251         return 0;
 252 }
 253
 254 static int i460_free_gatt_table (void)
 255 {
 256         int num_entries, i;
 257         void *temp;
 258
 259         temp = agp_bridge->current_size;
 260
 261         num_entries = A_SIZE_8(temp)->num_entries;
 262
 263         for (i = 0; i < num_entries; ++i)
 264                 WR_GATT(i, 0);
 265         WR_FLUSH_GATT(num_entries - 1);
 266
 267         iounmap(i460.gatt);
 268         return 0;
 269 }
 270
 271 /*
 272  * The following functions are called when the I/O (GART) page size is smaller than
 273  * PAGE_SIZE.
 274  */
 275
 276 static int i460_insert_memory_small_io_page (agp_memory *mem, off_t pg_start, int type)
 277 {
 278         unsigned long paddr, io_pg_start, io_page_size;
 279         int i, j, k, num_entries;
 280         void *temp;
 281
 282         pr_debug("i460_insert_memory_small_io_page(mem=%p, pg_start=%ld, type=%d, paddr0=0x%lx)\n",
 283                  mem, pg_start, type, mem->memory[0]);
 284
 285         io_pg_start = I460_IOPAGES_PER_KPAGE * pg_start;
 286
 287         temp = agp_bridge->current_size;
 288         num_entries = A_SIZE_8(temp)->num_entries;
 289
 290         if ((io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count) > num_entries) {
 291                 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n");
 292                 return -EINVAL;
 293         }
 294
 295         j = io_pg_start;
 296         while (j < (io_pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count)) {
 297                 if (!PGE_EMPTY(RD_GATT(j))) {
 298                         pr_debug("i460_insert_memory_small_io_page: GATT[%d]=0x%x is busy\n",
 299                                  j, RD_GATT(j));
 300                         return -EBUSY;
 301                 }
 302                 j++;
 303         }
 304
 305         io_page_size = 1UL << I460_IO_PAGE_SHIFT;
 306         for (i = 0, j = io_pg_start; i < mem->page_count; i++) {
 307                 paddr = mem->memory[i];
 308                 for (k = 0; k < I460_IOPAGES_PER_KPAGE; k++, j++, paddr += io_page_size)
 309                         WR_GATT(j, agp_bridge->mask_memory(paddr, mem->type));
 310         }
 311         WR_FLUSH_GATT(j - 1);
 312         return 0;
 313 }
 314
 315 static int i460_remove_memory_small_io_page(agp_memory * mem, off_t pg_start, int type)
 316 {
 317         int i;
 318
 319         pr_debug("i460_remove_memory_small_io_page(mem=%p, pg_start=%ld, type=%d)\n",
 320                  mem, pg_start, type);
 321
 322         pg_start = I460_IOPAGES_PER_KPAGE * pg_start;
 323
 324         for (i = pg_start; i < (pg_start + I460_IOPAGES_PER_KPAGE * mem->page_count); i++)
 325                 WR_GATT(i, 0);
 326         WR_FLUSH_GATT(i - 1);
 327         return 0;
 328 }
 329
 330 #if I460_LARGE_IO_PAGES
 331
 332 /*
 333  * These functions are called when the I/O (GART) page size exceeds PAGE_SIZE.
 334  *
 335  * This situation is interesting since AGP memory allocations that are smaller than a
 336  * single GART page are possible.  The i460.lp_desc array tracks partial allocation of the
 337  * large GART pages to work around this issue.
 338  *
 339  * i460.lp_desc[pg_num].refcount tracks the number of kernel pages in use within GART page
 340  * pg_num.  i460.lp_desc[pg_num].paddr is the physical address of the large page and
 341  * i460.lp_desc[pg_num].alloced_map is a bitmap of kernel pages that are in use (allocated).
 342  */
 343
 344 static int i460_alloc_large_page (struct lp_desc *lp)
 345 {
 346         unsigned long order = I460_IO_PAGE_SHIFT - PAGE_SHIFT;
 347         size_t map_size;
 348         void *lpage;
 349
 350         lpage = (void *) __get_free_pages(GFP_KERNEL, order);
 351         if (!lpage) {
 352                 printk(KERN_ERR PFX "Couldn't alloc 4M GART page...\n");
 353                 return -ENOMEM;
 354         }
 355
 356         map_size = ((I460_KPAGES_PER_IOPAGE + BITS_PER_LONG - 1) & -BITS_PER_LONG)/8;
 357         lp->alloced_map = kmalloc(map_size, GFP_KERNEL);
 358         if (!lp->alloced_map) {
 359                 free_pages((unsigned long) lpage, order);
 360                 printk(KERN_ERR PFX "Out of memory, we're in trouble...\n");
 361                 return -ENOMEM;
 362         }
 363         memset(lp->alloced_map, 0, map_size);
 364
 365         lp->paddr = virt_to_phys(lpage);
 366         lp->refcount = 0;
 367         atomic_add(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp);
 368         return 0;
 369 }
 370
 371 static void i460_free_large_page (struct lp_desc *lp)
 372 {
 373         kfree(lp->alloced_map);
 374         lp->alloced_map = NULL;
 375
 376         free_pages((unsigned long) phys_to_virt(lp->paddr), I460_IO_PAGE_SHIFT - PAGE_SHIFT);
 377         atomic_sub(I460_KPAGES_PER_IOPAGE, &agp_bridge->current_memory_agp);
 378 }
 379
 380 static int i460_insert_memory_large_io_page (agp_memory * mem, off_t pg_start, int type)
 381 {
 382         int i, start_offset, end_offset, idx, pg, num_entries;
 383         struct lp_desc *start, *end, *lp;
 384         void *temp;
 385
 386         temp = agp_bridge->current_size;
 387         num_entries = A_SIZE_8(temp)->num_entries;
 388
 389         /* Figure out what pg_start means in terms of our large GART pages */
 390         start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
 391         end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
 392         start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
 393         end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 394
 395         if (end > i460.lp_desc + num_entries) {
 396                 printk(KERN_ERR PFX "Looks like we're out of AGP memory\n");
 397                 return -EINVAL;
 398         }
 399
 400         /* Check if the requested region of the aperture is free */
 401         for (lp = start; lp <= end; ++lp) {
 402                 if (!lp->alloced_map)
 403                         continue;       /* OK, the entire large page is available... */
 404
 405                 for (idx = ((lp == start) ? start_offset : 0);
 406                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 407                      idx++)
 408                 {
 409                         if (test_bit(idx, lp->alloced_map))
 410                                 return -EBUSY;
 411                 }
 412         }
 413
 414         for (lp = start, i = 0; lp <= end; ++lp) {
 415                 if (!lp->alloced_map) {
 416                         /* Allocate new GART pages... */
 417                         if (i460_alloc_large_page(lp) < 0)
 418                                 return -ENOMEM;
 419                         pg = lp - i460.lp_desc;
 420                         WR_GATT(pg, agp_bridge->mask_memory(lp->paddr, 0));
 421                         WR_FLUSH_GATT(pg);
 422                 }
 423
 424                 for (idx = ((lp == start) ? start_offset : 0);
 425                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 426                      idx++, i++)
 427                 {
 428                         mem->memory[i] = lp->paddr + idx*PAGE_SIZE;
 429                         __set_bit(idx, lp->alloced_map);
 430                         ++lp->refcount;
 431                 }
 432         }
 433         return 0;
 434 }
 435
 436 static int i460_remove_memory_large_io_page (agp_memory * mem, off_t pg_start, int type)
 437 {
 438         int i, pg, start_offset, end_offset, idx, num_entries;
 439         struct lp_desc *start, *end, *lp;
 440         void *temp;
 441
 442         temp = agp_bridge->current_size;
 443         num_entries = A_SIZE_8(temp)->num_entries;
 444
 445         /* Figure out what pg_start means in terms of our large GART pages */
 446         start           = &i460.lp_desc[pg_start / I460_KPAGES_PER_IOPAGE];
 447         end             = &i460.lp_desc[(pg_start + mem->page_count - 1) / I460_KPAGES_PER_IOPAGE];
 448         start_offset    = pg_start % I460_KPAGES_PER_IOPAGE;
 449         end_offset      = (pg_start + mem->page_count - 1) % I460_KPAGES_PER_IOPAGE;
 450
 451         for (i = 0, lp = start; lp <= end; ++lp) {
 452                 for (idx = ((lp == start) ? start_offset : 0);
 453                      idx < ((lp == end) ? (end_offset + 1) : I460_KPAGES_PER_IOPAGE);
 454                      idx++, i++)
 455                 {
 456                         mem->memory[i] = 0;
 457                         __clear_bit(idx, lp->alloced_map);
 458                         --lp->refcount;
 459                 }
 460
 461                 /* Free GART pages if they are unused */
 462                 if (lp->refcount == 0) {
 463                         pg = lp - i460.lp_desc;
 464                         WR_GATT(pg, 0);
 465                         WR_FLUSH_GATT(pg);
 466                         i460_free_large_page(lp);
 467                 }
 468         }
 469         return 0;
 470 }
 471
 472 /* Wrapper routines to call the approriate {small_io_page,large_io_page} function */
 473
 474 static int i460_insert_memory (agp_memory * mem, off_t pg_start, int type)
 475 {
 476         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 477                 return i460_insert_memory_small_io_page(mem, pg_start, type);
 478         else
 479                 return i460_insert_memory_large_io_page(mem, pg_start, type);
 480 }
 481
 482 static int i460_remove_memory (agp_memory * mem, off_t pg_start, int type)
 483 {
 484         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 485                 return i460_remove_memory_small_io_page(mem, pg_start, type);
 486         else
 487                 return i460_remove_memory_large_io_page(mem, pg_start, type);
 488 }
 489
 490 /*
 491  * If the I/O (GART) page size is bigger than the kernel page size, we don't want to
 492  * allocate memory until we know where it is to be bound in the aperture (a
 493  * multi-kernel-page alloc might fit inside of an already allocated GART page).
 494  *
 495  * Let's just hope nobody counts on the allocated AGP memory being there before bind time
 496  * (I don't think current drivers do)...
 497  */
 498 static void *i460_alloc_page (void)
 499 {
 500         void *page;
 501
 502         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 503                 page = agp_generic_alloc_page();
 504         else
 505                 /* Returning NULL would cause problems */
 506                 /* AK: really dubious code. */
 507                 page = (void *)~0UL;
 508         return page;
 509 }
 510
 511 static void i460_destroy_page (void *page)
 512 {
 513         if (I460_IO_PAGE_SHIFT <= PAGE_SHIFT)
 514                 agp_generic_destroy_page(page);
 515 }
 516
 517 #endif /* I460_LARGE_IO_PAGES */
 518
 519 static unsigned long i460_mask_memory (unsigned long addr, int type)
 520 {
 521         /* Make sure the returned address is a valid GATT entry */
 522         return (agp_bridge->masks[0].mask
 523                 | (((addr & ~((1 << I460_IO_PAGE_SHIFT) - 1)) & 0xffffff000) >> 12));
 524 }
 525
 526 static int __init intel_i460_setup (struct pci_dev *pdev __attribute__((unused)))
 527 {
 528         agp_bridge->masks = i460_masks;
 529         agp_bridge->aperture_sizes = (void *) i460_sizes;
 530         agp_bridge->size_type = U8_APER_SIZE;
 531         agp_bridge->num_aperture_sizes = 3;
 532         agp_bridge->dev_private_data = NULL;
 533         agp_bridge->needs_scratch_page = FALSE;
 534         agp_bridge->configure = i460_configure;
 535         agp_bridge->fetch_size = i460_fetch_size;
 536         agp_bridge->cleanup = i460_cleanup;
 537         agp_bridge->tlb_flush = i460_tlb_flush;
 538         agp_bridge->mask_memory = i460_mask_memory;
 539         agp_bridge->agp_enable = agp_generic_enable;
 540         agp_bridge->cache_flush = global_cache_flush;
 541         agp_bridge->create_gatt_table = i460_create_gatt_table;
 542         agp_bridge->free_gatt_table = i460_free_gatt_table;
 543 #if I460_LARGE_IO_PAGES
 544         agp_bridge->insert_memory = i460_insert_memory;
 545         agp_bridge->remove_memory = i460_remove_memory;
 546         agp_bridge->agp_alloc_page = i460_alloc_page;
 547         agp_bridge->agp_destroy_page = i460_destroy_page;
 548 #else
 549         agp_bridge->insert_memory = i460_insert_memory_small_io_page;
 550         agp_bridge->remove_memory = i460_remove_memory_small_io_page;
 551         agp_bridge->agp_alloc_page = agp_generic_alloc_page;
 552         agp_bridge->agp_destroy_page = agp_generic_destroy_page;
 553 #endif
 554         agp_bridge->alloc_by_type = agp_generic_alloc_by_type;
 555         agp_bridge->free_by_type = agp_generic_free_by_type;
 556         agp_bridge->suspend = agp_generic_suspend;
 557         agp_bridge->resume = agp_generic_resume;
 558         agp_bridge->cant_use_aperture = 1;
 559         return 0;
 560 }
 561
 562 static struct agp_driver i460_agp_driver = {
 563         .owner = THIS_MODULE,
 564 };
 565
 566 static int __init agp_intel_i460_probe (struct pci_dev *dev, const struct pci_device_id *ent)
 567 {
 568         u8 cap_ptr = 0;
 569
 570         cap_ptr = pci_find_capability(dev, PCI_CAP_ID_AGP);
 571         if (cap_ptr == 0)
 572                 return -ENODEV;
 573
 574         agp_bridge->dev = dev;
 575         agp_bridge->capndx = cap_ptr;
 576         intel_i460_setup(dev);
 577         i460_agp_driver.dev = dev;
 578         agp_register_driver(&i460_agp_driver);
 579         return 0;
 580 }
 581
 582 static struct pci_device_id agp_intel_i460_pci_table[] __initdata = {
 583         {
 584         .class          = (PCI_CLASS_BRIDGE_HOST << 8),
 585         .class_mask     = ~0,
 586         .vendor         = PCI_VENDOR_ID_INTEL,
 587         .device         = PCI_DEVICE_ID_INTEL_84460GX,
 588         .subvendor      = PCI_ANY_ID,
 589         .subdevice      = PCI_ANY_ID,
 590         },
 591         { }
 592 };
 593
 594 MODULE_DEVICE_TABLE(pci, agp_intel_i460_pci_table);
 595
 596 static struct __initdata pci_driver agp_intel_i460_pci_driver = {
 597         .name           = "agpgart-intel-i460",
 598         .id_table       = agp_intel_i460_pci_table,
 599         .probe          = agp_intel_i460_probe,
 600 };
 601
 602 static int __init agp_intel_i460_init(void)
 603 {
 604         int ret_val;
 605
 606         ret_val = pci_module_init(&agp_intel_i460_pci_driver);
 607         if (ret_val)
 608                 agp_bridge->type = NOT_SUPPORTED;
 609
 610         return ret_val;
 611 }
 612
 613 static void __exit agp_intel_i460_cleanup(void)
 614 {
 615         agp_unregister_driver(&i460_agp_driver);
 616         pci_unregister_driver(&agp_intel_i460_pci_driver);
 617 }
 618
 619 module_init(agp_intel_i460_init);
 620 module_exit(agp_intel_i460_cleanup);
 621
 622 MODULE_AUTHOR("Chris Ahna <Christopher.J.Ahna@intel.com>");
 623 MODULE_LICENSE("GPL and additional rights");