2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 // #define DEBUG // error path messages, extra info
24 // #define VERBOSE // more; success messages
26 #include <linux/module.h>
27 #include <linux/kmod.h>
28 #include <linux/init.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/ethtool.h>
32 #include <linux/workqueue.h>
33 #include <linux/mii.h>
34 #include <linux/usb.h>
35 #include <linux/crc32.h>
36 #include <linux/usb/usbnet.h>
37 #include <linux/slab.h>
39 #define DRIVER_VERSION "22-Dec-2011"
40 #define DRIVER_NAME "asix"
42 /* ASIX AX8817X based USB 2.0 Ethernet Devices */
44 #define AX_CMD_SET_SW_MII 0x06
45 #define AX_CMD_READ_MII_REG 0x07
46 #define AX_CMD_WRITE_MII_REG 0x08
47 #define AX_CMD_SET_HW_MII 0x0a
48 #define AX_CMD_READ_EEPROM 0x0b
49 #define AX_CMD_WRITE_EEPROM 0x0c
50 #define AX_CMD_WRITE_ENABLE 0x0d
51 #define AX_CMD_WRITE_DISABLE 0x0e
52 #define AX_CMD_READ_RX_CTL 0x0f
53 #define AX_CMD_WRITE_RX_CTL 0x10
54 #define AX_CMD_READ_IPG012 0x11
55 #define AX_CMD_WRITE_IPG0 0x12
56 #define AX_CMD_WRITE_IPG1 0x13
57 #define AX_CMD_READ_NODE_ID 0x13
58 #define AX_CMD_WRITE_NODE_ID 0x14
59 #define AX_CMD_WRITE_IPG2 0x14
60 #define AX_CMD_WRITE_MULTI_FILTER 0x16
61 #define AX88172_CMD_READ_NODE_ID 0x17
62 #define AX_CMD_READ_PHY_ID 0x19
63 #define AX_CMD_READ_MEDIUM_STATUS 0x1a
64 #define AX_CMD_WRITE_MEDIUM_MODE 0x1b
65 #define AX_CMD_READ_MONITOR_MODE 0x1c
66 #define AX_CMD_WRITE_MONITOR_MODE 0x1d
67 #define AX_CMD_READ_GPIOS 0x1e
68 #define AX_CMD_WRITE_GPIOS 0x1f
69 #define AX_CMD_SW_RESET 0x20
70 #define AX_CMD_SW_PHY_STATUS 0x21
71 #define AX_CMD_SW_PHY_SELECT 0x22
73 #define AX_MONITOR_MODE 0x01
74 #define AX_MONITOR_LINK 0x02
75 #define AX_MONITOR_MAGIC 0x04
76 #define AX_MONITOR_HSFS 0x10
78 /* AX88172 Medium Status Register values */
79 #define AX88172_MEDIUM_FD 0x02
80 #define AX88172_MEDIUM_TX 0x04
81 #define AX88172_MEDIUM_FC 0x10
82 #define AX88172_MEDIUM_DEFAULT \
83 ( AX88172_MEDIUM_FD | AX88172_MEDIUM_TX | AX88172_MEDIUM_FC )
85 #define AX_MCAST_FILTER_SIZE 8
86 #define AX_MAX_MCAST 64
88 #define AX_SWRESET_CLEAR 0x00
89 #define AX_SWRESET_RR 0x01
90 #define AX_SWRESET_RT 0x02
91 #define AX_SWRESET_PRTE 0x04
92 #define AX_SWRESET_PRL 0x08
93 #define AX_SWRESET_BZ 0x10
94 #define AX_SWRESET_IPRL 0x20
95 #define AX_SWRESET_IPPD 0x40
97 #define AX88772_IPG0_DEFAULT 0x15
98 #define AX88772_IPG1_DEFAULT 0x0c
99 #define AX88772_IPG2_DEFAULT 0x12
101 /* AX88772 & AX88178 Medium Mode Register */
102 #define AX_MEDIUM_PF 0x0080
103 #define AX_MEDIUM_JFE 0x0040
104 #define AX_MEDIUM_TFC 0x0020
105 #define AX_MEDIUM_RFC 0x0010
106 #define AX_MEDIUM_ENCK 0x0008
107 #define AX_MEDIUM_AC 0x0004
108 #define AX_MEDIUM_FD 0x0002
109 #define AX_MEDIUM_GM 0x0001
110 #define AX_MEDIUM_SM 0x1000
111 #define AX_MEDIUM_SBP 0x0800
112 #define AX_MEDIUM_PS 0x0200
113 #define AX_MEDIUM_RE 0x0100
115 #define AX88178_MEDIUM_DEFAULT \
116 (AX_MEDIUM_PS | AX_MEDIUM_FD | AX_MEDIUM_AC | \
117 AX_MEDIUM_RFC | AX_MEDIUM_TFC | AX_MEDIUM_JFE | \
120 #define AX88772_MEDIUM_DEFAULT \
121 (AX_MEDIUM_FD | AX_MEDIUM_RFC | \
122 AX_MEDIUM_TFC | AX_MEDIUM_PS | \
123 AX_MEDIUM_AC | AX_MEDIUM_RE)
125 /* AX88772 & AX88178 RX_CTL values */
126 #define AX_RX_CTL_SO 0x0080
127 #define AX_RX_CTL_AP 0x0020
128 #define AX_RX_CTL_AM 0x0010
129 #define AX_RX_CTL_AB 0x0008
130 #define AX_RX_CTL_SEP 0x0004
131 #define AX_RX_CTL_AMALL 0x0002
132 #define AX_RX_CTL_PRO 0x0001
133 #define AX_RX_CTL_MFB_2048 0x0000
134 #define AX_RX_CTL_MFB_4096 0x0100
135 #define AX_RX_CTL_MFB_8192 0x0200
136 #define AX_RX_CTL_MFB_16384 0x0300
138 #define AX_DEFAULT_RX_CTL (AX_RX_CTL_SO | AX_RX_CTL_AB)
140 /* GPIO 0 .. 2 toggles */
141 #define AX_GPIO_GPO0EN 0x01 /* GPIO0 Output enable */
142 #define AX_GPIO_GPO_0 0x02 /* GPIO0 Output value */
143 #define AX_GPIO_GPO1EN 0x04 /* GPIO1 Output enable */
144 #define AX_GPIO_GPO_1 0x08 /* GPIO1 Output value */
145 #define AX_GPIO_GPO2EN 0x10 /* GPIO2 Output enable */
146 #define AX_GPIO_GPO_2 0x20 /* GPIO2 Output value */
147 #define AX_GPIO_RESERVED 0x40 /* Reserved */
148 #define AX_GPIO_RSE 0x80 /* Reload serial EEPROM */
150 #define AX_EEPROM_MAGIC 0xdeadbeef
151 #define AX88172_EEPROM_LEN 0x40
152 #define AX88772_EEPROM_LEN 0xff
154 #define PHY_MODE_MARVELL 0x0000
155 #define MII_MARVELL_LED_CTRL 0x0018
156 #define MII_MARVELL_STATUS 0x001b
157 #define MII_MARVELL_CTRL 0x0014
159 #define MARVELL_LED_MANUAL 0x0019
161 #define MARVELL_STATUS_HWCFG 0x0004
163 #define MARVELL_CTRL_TXDELAY 0x0002
164 #define MARVELL_CTRL_RXDELAY 0x0080
166 #define PHY_MODE_RTL8211CL 0x000C
168 /* This structure cannot exceed sizeof(unsigned long [5]) AKA 20 bytes */
170 u8 multi_filter[AX_MCAST_FILTER_SIZE];
171 u8 mac_addr[ETH_ALEN];
177 struct ax88172_int_data {
185 static int asix_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
186 u16 size, void *data)
191 netdev_dbg(dev->net, "asix_read_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
192 cmd, value, index, size);
194 buf = kmalloc(size, GFP_KERNEL);
198 err = usb_control_msg(
200 usb_rcvctrlpipe(dev->udev, 0),
202 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
207 USB_CTRL_GET_TIMEOUT);
209 memcpy(data, buf, size);
218 static int asix_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
219 u16 size, void *data)
224 netdev_dbg(dev->net, "asix_write_cmd() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
225 cmd, value, index, size);
228 buf = kmemdup(data, size, GFP_KERNEL);
233 err = usb_control_msg(
235 usb_sndctrlpipe(dev->udev, 0),
237 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
242 USB_CTRL_SET_TIMEOUT);
249 static void asix_async_cmd_callback(struct urb *urb)
251 struct usb_ctrlrequest *req = (struct usb_ctrlrequest *)urb->context;
252 int status = urb->status;
255 printk(KERN_DEBUG "asix_async_cmd_callback() failed with %d",
263 asix_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
264 u16 size, void *data)
266 struct usb_ctrlrequest *req;
270 netdev_dbg(dev->net, "asix_write_cmd_async() cmd=0x%02x value=0x%04x index=0x%04x size=%d\n",
271 cmd, value, index, size);
273 urb = usb_alloc_urb(0, GFP_ATOMIC);
275 netdev_err(dev->net, "Error allocating URB in write_cmd_async!\n");
279 req = kmalloc(sizeof(struct usb_ctrlrequest), GFP_ATOMIC);
281 netdev_err(dev->net, "Failed to allocate memory for control request\n");
286 req->bRequestType = USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE;
288 req->wValue = cpu_to_le16(value);
289 req->wIndex = cpu_to_le16(index);
290 req->wLength = cpu_to_le16(size);
292 usb_fill_control_urb(urb, dev->udev,
293 usb_sndctrlpipe(dev->udev, 0),
294 (void *)req, data, size,
295 asix_async_cmd_callback, req);
297 status = usb_submit_urb(urb, GFP_ATOMIC);
299 netdev_err(dev->net, "Error submitting the control message: status=%d\n",
306 static int asix_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
310 while (offset + sizeof(u32) < skb->len) {
311 struct sk_buff *ax_skb;
313 u32 header = get_unaligned_le32(skb->data + offset);
315 offset += sizeof(u32);
317 /* get the packet length */
318 size = (u16) (header & 0x7ff);
319 if (size != ((~header >> 16) & 0x07ff)) {
320 netdev_err(dev->net, "asix_rx_fixup() Bad Header Length\n");
324 if ((size > dev->net->mtu + ETH_HLEN) ||
325 (size + offset > skb->len)) {
326 netdev_err(dev->net, "asix_rx_fixup() Bad RX Length %d\n",
330 ax_skb = netdev_alloc_skb_ip_align(dev->net, size);
334 skb_put(ax_skb, size);
335 memcpy(ax_skb->data, skb->data + offset, size);
336 usbnet_skb_return(dev, ax_skb);
338 offset += (size + 1) & 0xfffe;
341 if (skb->len != offset) {
342 netdev_err(dev->net, "asix_rx_fixup() Bad SKB Length %d\n",
349 static struct sk_buff *asix_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
353 int headroom = skb_headroom(skb);
354 int tailroom = skb_tailroom(skb);
356 u32 padbytes = 0xffff0000;
358 padlen = ((skb->len + 4) % 512) ? 0 : 4;
360 if ((!skb_cloned(skb)) &&
361 ((headroom + tailroom) >= (4 + padlen))) {
362 if ((headroom < 4) || (tailroom < padlen)) {
363 skb->data = memmove(skb->head + 4, skb->data, skb->len);
364 skb_set_tail_pointer(skb, skb->len);
367 struct sk_buff *skb2;
368 skb2 = skb_copy_expand(skb, 4, padlen, flags);
369 dev_kfree_skb_any(skb);
376 packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
377 cpu_to_le32s(&packet_len);
378 skb_copy_to_linear_data(skb, &packet_len, sizeof(packet_len));
380 if ((skb->len % 512) == 0) {
381 cpu_to_le32s(&padbytes);
382 memcpy(skb_tail_pointer(skb), &padbytes, sizeof(padbytes));
383 skb_put(skb, sizeof(padbytes));
388 static void asix_status(struct usbnet *dev, struct urb *urb)
390 struct ax88172_int_data *event;
393 if (urb->actual_length < 8)
396 event = urb->transfer_buffer;
397 link = event->link & 0x01;
398 if (netif_carrier_ok(dev->net) != link) {
400 netif_carrier_on(dev->net);
401 usbnet_defer_kevent (dev, EVENT_LINK_RESET );
403 netif_carrier_off(dev->net);
404 netdev_dbg(dev->net, "Link Status is: %d\n", link);
408 static inline int asix_set_sw_mii(struct usbnet *dev)
411 ret = asix_write_cmd(dev, AX_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
413 netdev_err(dev->net, "Failed to enable software MII access\n");
417 static inline int asix_set_hw_mii(struct usbnet *dev)
420 ret = asix_write_cmd(dev, AX_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
422 netdev_err(dev->net, "Failed to enable hardware MII access\n");
426 static inline int asix_get_phy_addr(struct usbnet *dev)
429 int ret = asix_read_cmd(dev, AX_CMD_READ_PHY_ID, 0, 0, 2, buf);
431 netdev_dbg(dev->net, "asix_get_phy_addr()\n");
434 netdev_err(dev->net, "Error reading PHYID register: %02x\n", ret);
437 netdev_dbg(dev->net, "asix_get_phy_addr() returning 0x%04x\n",
445 static int asix_sw_reset(struct usbnet *dev, u8 flags)
449 ret = asix_write_cmd(dev, AX_CMD_SW_RESET, flags, 0, 0, NULL);
451 netdev_err(dev->net, "Failed to send software reset: %02x\n", ret);
456 static u16 asix_read_rx_ctl(struct usbnet *dev)
459 int ret = asix_read_cmd(dev, AX_CMD_READ_RX_CTL, 0, 0, 2, &v);
462 netdev_err(dev->net, "Error reading RX_CTL register: %02x\n", ret);
465 ret = le16_to_cpu(v);
470 static int asix_write_rx_ctl(struct usbnet *dev, u16 mode)
474 netdev_dbg(dev->net, "asix_write_rx_ctl() - mode = 0x%04x\n", mode);
475 ret = asix_write_cmd(dev, AX_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
477 netdev_err(dev->net, "Failed to write RX_CTL mode to 0x%04x: %02x\n",
483 static u16 asix_read_medium_status(struct usbnet *dev)
486 int ret = asix_read_cmd(dev, AX_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
489 netdev_err(dev->net, "Error reading Medium Status register: %02x\n",
491 return ret; /* TODO: callers not checking for error ret */
494 return le16_to_cpu(v);
498 static int asix_write_medium_mode(struct usbnet *dev, u16 mode)
502 netdev_dbg(dev->net, "asix_write_medium_mode() - mode = 0x%04x\n", mode);
503 ret = asix_write_cmd(dev, AX_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
505 netdev_err(dev->net, "Failed to write Medium Mode mode to 0x%04x: %02x\n",
511 static int asix_write_gpio(struct usbnet *dev, u16 value, int sleep)
515 netdev_dbg(dev->net, "asix_write_gpio() - value = 0x%04x\n", value);
516 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS, value, 0, 0, NULL);
518 netdev_err(dev->net, "Failed to write GPIO value 0x%04x: %02x\n",
528 * AX88772 & AX88178 have a 16-bit RX_CTL value
530 static void asix_set_multicast(struct net_device *net)
532 struct usbnet *dev = netdev_priv(net);
533 struct asix_data *data = (struct asix_data *)&dev->data;
534 u16 rx_ctl = AX_DEFAULT_RX_CTL;
536 if (net->flags & IFF_PROMISC) {
537 rx_ctl |= AX_RX_CTL_PRO;
538 } else if (net->flags & IFF_ALLMULTI ||
539 netdev_mc_count(net) > AX_MAX_MCAST) {
540 rx_ctl |= AX_RX_CTL_AMALL;
541 } else if (netdev_mc_empty(net)) {
542 /* just broadcast and directed */
544 /* We use the 20 byte dev->data
545 * for our 8 byte filter buffer
546 * to avoid allocating memory that
547 * is tricky to free later */
548 struct netdev_hw_addr *ha;
551 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
553 /* Build the multicast hash filter. */
554 netdev_for_each_mc_addr(ha, net) {
555 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
556 data->multi_filter[crc_bits >> 3] |=
560 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
561 AX_MCAST_FILTER_SIZE, data->multi_filter);
563 rx_ctl |= AX_RX_CTL_AM;
566 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
569 static int asix_mdio_read(struct net_device *netdev, int phy_id, int loc)
571 struct usbnet *dev = netdev_priv(netdev);
574 mutex_lock(&dev->phy_mutex);
575 asix_set_sw_mii(dev);
576 asix_read_cmd(dev, AX_CMD_READ_MII_REG, phy_id,
577 (__u16)loc, 2, &res);
578 asix_set_hw_mii(dev);
579 mutex_unlock(&dev->phy_mutex);
581 netdev_dbg(dev->net, "asix_mdio_read() phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n",
582 phy_id, loc, le16_to_cpu(res));
584 return le16_to_cpu(res);
588 asix_mdio_write(struct net_device *netdev, int phy_id, int loc, int val)
590 struct usbnet *dev = netdev_priv(netdev);
591 __le16 res = cpu_to_le16(val);
593 netdev_dbg(dev->net, "asix_mdio_write() phy_id=0x%02x, loc=0x%02x, val=0x%04x\n",
595 mutex_lock(&dev->phy_mutex);
596 asix_set_sw_mii(dev);
597 asix_write_cmd(dev, AX_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
598 asix_set_hw_mii(dev);
599 mutex_unlock(&dev->phy_mutex);
602 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
603 static u32 asix_get_phyid(struct usbnet *dev)
609 /* Poll for the rare case the FW or phy isn't ready yet. */
610 for (i = 0; i < 100; i++) {
611 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
612 if (phy_reg != 0 && phy_reg != 0xFFFF)
617 if (phy_reg <= 0 || phy_reg == 0xFFFF)
620 phy_id = (phy_reg & 0xffff) << 16;
622 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
626 phy_id |= (phy_reg & 0xffff);
632 asix_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
634 struct usbnet *dev = netdev_priv(net);
637 if (asix_read_cmd(dev, AX_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
638 wolinfo->supported = 0;
639 wolinfo->wolopts = 0;
642 wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
643 wolinfo->wolopts = 0;
644 if (opt & AX_MONITOR_LINK)
645 wolinfo->wolopts |= WAKE_PHY;
646 if (opt & AX_MONITOR_MAGIC)
647 wolinfo->wolopts |= WAKE_MAGIC;
651 asix_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
653 struct usbnet *dev = netdev_priv(net);
656 if (wolinfo->wolopts & WAKE_PHY)
657 opt |= AX_MONITOR_LINK;
658 if (wolinfo->wolopts & WAKE_MAGIC)
659 opt |= AX_MONITOR_MAGIC;
661 if (asix_write_cmd(dev, AX_CMD_WRITE_MONITOR_MODE,
662 opt, 0, 0, NULL) < 0)
668 static int asix_get_eeprom_len(struct net_device *net)
670 struct usbnet *dev = netdev_priv(net);
671 struct asix_data *data = (struct asix_data *)&dev->data;
673 return data->eeprom_len;
676 static int asix_get_eeprom(struct net_device *net,
677 struct ethtool_eeprom *eeprom, u8 *data)
679 struct usbnet *dev = netdev_priv(net);
680 __le16 *ebuf = (__le16 *)data;
683 /* Crude hack to ensure that we don't overwrite memory
684 * if an odd length is supplied
689 eeprom->magic = AX_EEPROM_MAGIC;
691 /* ax8817x returns 2 bytes from eeprom on read */
692 for (i=0; i < eeprom->len / 2; i++) {
693 if (asix_read_cmd(dev, AX_CMD_READ_EEPROM,
694 eeprom->offset + i, 0, 2, &ebuf[i]) < 0)
700 static void asix_get_drvinfo (struct net_device *net,
701 struct ethtool_drvinfo *info)
703 struct usbnet *dev = netdev_priv(net);
704 struct asix_data *data = (struct asix_data *)&dev->data;
706 /* Inherit standard device info */
707 usbnet_get_drvinfo(net, info);
708 strncpy (info->driver, DRIVER_NAME, sizeof info->driver);
709 strncpy (info->version, DRIVER_VERSION, sizeof info->version);
710 info->eedump_len = data->eeprom_len;
713 static u32 asix_get_link(struct net_device *net)
715 struct usbnet *dev = netdev_priv(net);
717 return mii_link_ok(&dev->mii);
720 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
722 struct usbnet *dev = netdev_priv(net);
724 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
727 static int asix_set_mac_address(struct net_device *net, void *p)
729 struct usbnet *dev = netdev_priv(net);
730 struct asix_data *data = (struct asix_data *)&dev->data;
731 struct sockaddr *addr = p;
733 if (netif_running(net))
735 if (!is_valid_ether_addr(addr->sa_data))
736 return -EADDRNOTAVAIL;
738 memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
740 /* We use the 20 byte dev->data
741 * for our 6 byte mac buffer
742 * to avoid allocating memory that
743 * is tricky to free later */
744 memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
745 asix_write_cmd_async(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
751 /* We need to override some ethtool_ops so we require our
752 own structure so we don't interfere with other usbnet
753 devices that may be connected at the same time. */
754 static const struct ethtool_ops ax88172_ethtool_ops = {
755 .get_drvinfo = asix_get_drvinfo,
756 .get_link = asix_get_link,
757 .get_msglevel = usbnet_get_msglevel,
758 .set_msglevel = usbnet_set_msglevel,
759 .get_wol = asix_get_wol,
760 .set_wol = asix_set_wol,
761 .get_eeprom_len = asix_get_eeprom_len,
762 .get_eeprom = asix_get_eeprom,
763 .get_settings = usbnet_get_settings,
764 .set_settings = usbnet_set_settings,
765 .nway_reset = usbnet_nway_reset,
768 static void ax88172_set_multicast(struct net_device *net)
770 struct usbnet *dev = netdev_priv(net);
771 struct asix_data *data = (struct asix_data *)&dev->data;
774 if (net->flags & IFF_PROMISC) {
776 } else if (net->flags & IFF_ALLMULTI ||
777 netdev_mc_count(net) > AX_MAX_MCAST) {
779 } else if (netdev_mc_empty(net)) {
780 /* just broadcast and directed */
782 /* We use the 20 byte dev->data
783 * for our 8 byte filter buffer
784 * to avoid allocating memory that
785 * is tricky to free later */
786 struct netdev_hw_addr *ha;
789 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
791 /* Build the multicast hash filter. */
792 netdev_for_each_mc_addr(ha, net) {
793 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
794 data->multi_filter[crc_bits >> 3] |=
798 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
799 AX_MCAST_FILTER_SIZE, data->multi_filter);
804 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
807 static int ax88172_link_reset(struct usbnet *dev)
810 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
812 mii_check_media(&dev->mii, 1, 1);
813 mii_ethtool_gset(&dev->mii, &ecmd);
814 mode = AX88172_MEDIUM_DEFAULT;
816 if (ecmd.duplex != DUPLEX_FULL)
817 mode |= ~AX88172_MEDIUM_FD;
819 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
820 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
822 asix_write_medium_mode(dev, mode);
827 static const struct net_device_ops ax88172_netdev_ops = {
828 .ndo_open = usbnet_open,
829 .ndo_stop = usbnet_stop,
830 .ndo_start_xmit = usbnet_start_xmit,
831 .ndo_tx_timeout = usbnet_tx_timeout,
832 .ndo_change_mtu = usbnet_change_mtu,
833 .ndo_set_mac_address = eth_mac_addr,
834 .ndo_validate_addr = eth_validate_addr,
835 .ndo_do_ioctl = asix_ioctl,
836 .ndo_set_rx_mode = ax88172_set_multicast,
839 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
844 unsigned long gpio_bits = dev->driver_info->data;
845 struct asix_data *data = (struct asix_data *)&dev->data;
847 data->eeprom_len = AX88172_EEPROM_LEN;
849 usbnet_get_endpoints(dev,intf);
851 /* Toggle the GPIOs in a manufacturer/model specific way */
852 for (i = 2; i >= 0; i--) {
853 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
854 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
860 ret = asix_write_rx_ctl(dev, 0x80);
864 /* Get the MAC address */
865 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
867 dbg("read AX_CMD_READ_NODE_ID failed: %d", ret);
870 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
872 /* Initialize MII structure */
873 dev->mii.dev = dev->net;
874 dev->mii.mdio_read = asix_mdio_read;
875 dev->mii.mdio_write = asix_mdio_write;
876 dev->mii.phy_id_mask = 0x3f;
877 dev->mii.reg_num_mask = 0x1f;
878 dev->mii.phy_id = asix_get_phy_addr(dev);
880 dev->net->netdev_ops = &ax88172_netdev_ops;
881 dev->net->ethtool_ops = &ax88172_ethtool_ops;
883 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
884 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
885 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
886 mii_nway_restart(&dev->mii);
894 static const struct ethtool_ops ax88772_ethtool_ops = {
895 .get_drvinfo = asix_get_drvinfo,
896 .get_link = asix_get_link,
897 .get_msglevel = usbnet_get_msglevel,
898 .set_msglevel = usbnet_set_msglevel,
899 .get_wol = asix_get_wol,
900 .set_wol = asix_set_wol,
901 .get_eeprom_len = asix_get_eeprom_len,
902 .get_eeprom = asix_get_eeprom,
903 .get_settings = usbnet_get_settings,
904 .set_settings = usbnet_set_settings,
905 .nway_reset = usbnet_nway_reset,
908 static int ax88772_link_reset(struct usbnet *dev)
911 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
913 mii_check_media(&dev->mii, 1, 1);
914 mii_ethtool_gset(&dev->mii, &ecmd);
915 mode = AX88772_MEDIUM_DEFAULT;
917 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
918 mode &= ~AX_MEDIUM_PS;
920 if (ecmd.duplex != DUPLEX_FULL)
921 mode &= ~AX_MEDIUM_FD;
923 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
924 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
926 asix_write_medium_mode(dev, mode);
931 static int ax88772_reset(struct usbnet *dev)
933 struct asix_data *data = (struct asix_data *)&dev->data;
937 ret = asix_write_gpio(dev,
938 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
942 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
944 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
946 dbg("Select PHY #1 failed: %d", ret);
950 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
956 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
963 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
967 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
973 rx_ctl = asix_read_rx_ctl(dev);
974 dbg("RX_CTL is 0x%04x after software reset", rx_ctl);
975 ret = asix_write_rx_ctl(dev, 0x0000);
979 rx_ctl = asix_read_rx_ctl(dev);
980 dbg("RX_CTL is 0x%04x setting to 0x0000", rx_ctl);
982 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
988 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
994 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
995 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
996 ADVERTISE_ALL | ADVERTISE_CSMA);
997 mii_nway_restart(&dev->mii);
999 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
1003 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
1004 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
1005 AX88772_IPG2_DEFAULT, 0, NULL);
1007 dbg("Write IPG,IPG1,IPG2 failed: %d", ret);
1011 /* Rewrite MAC address */
1012 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1013 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1018 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
1019 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1023 rx_ctl = asix_read_rx_ctl(dev);
1024 dbg("RX_CTL is 0x%04x after all initializations", rx_ctl);
1026 rx_ctl = asix_read_medium_status(dev);
1027 dbg("Medium Status is 0x%04x after all initializations", rx_ctl);
1036 static const struct net_device_ops ax88772_netdev_ops = {
1037 .ndo_open = usbnet_open,
1038 .ndo_stop = usbnet_stop,
1039 .ndo_start_xmit = usbnet_start_xmit,
1040 .ndo_tx_timeout = usbnet_tx_timeout,
1041 .ndo_change_mtu = usbnet_change_mtu,
1042 .ndo_set_mac_address = asix_set_mac_address,
1043 .ndo_validate_addr = eth_validate_addr,
1044 .ndo_do_ioctl = asix_ioctl,
1045 .ndo_set_rx_mode = asix_set_multicast,
1048 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
1051 struct asix_data *data = (struct asix_data *)&dev->data;
1055 data->eeprom_len = AX88772_EEPROM_LEN;
1057 usbnet_get_endpoints(dev,intf);
1059 /* Get the MAC address */
1060 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1062 dbg("Failed to read MAC address: %d", ret);
1065 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1067 /* Initialize MII structure */
1068 dev->mii.dev = dev->net;
1069 dev->mii.mdio_read = asix_mdio_read;
1070 dev->mii.mdio_write = asix_mdio_write;
1071 dev->mii.phy_id_mask = 0x1f;
1072 dev->mii.reg_num_mask = 0x1f;
1073 dev->mii.phy_id = asix_get_phy_addr(dev);
1075 dev->net->netdev_ops = &ax88772_netdev_ops;
1076 dev->net->ethtool_ops = &ax88772_ethtool_ops;
1078 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
1080 /* Reset the PHY to normal operation mode */
1081 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
1083 dbg("Select PHY #1 failed: %d", ret);
1087 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
1093 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
1099 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
1101 /* Read PHYID register *AFTER* the PHY was reset properly */
1102 phyid = asix_get_phyid(dev);
1103 dbg("PHYID=0x%08x", phyid);
1105 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1106 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1107 /* hard_mtu is still the default - the device does not support
1109 dev->rx_urb_size = 2048;
1115 static const struct ethtool_ops ax88178_ethtool_ops = {
1116 .get_drvinfo = asix_get_drvinfo,
1117 .get_link = asix_get_link,
1118 .get_msglevel = usbnet_get_msglevel,
1119 .set_msglevel = usbnet_set_msglevel,
1120 .get_wol = asix_get_wol,
1121 .set_wol = asix_set_wol,
1122 .get_eeprom_len = asix_get_eeprom_len,
1123 .get_eeprom = asix_get_eeprom,
1124 .get_settings = usbnet_get_settings,
1125 .set_settings = usbnet_set_settings,
1126 .nway_reset = usbnet_nway_reset,
1129 static int marvell_phy_init(struct usbnet *dev)
1131 struct asix_data *data = (struct asix_data *)&dev->data;
1134 netdev_dbg(dev->net, "marvell_phy_init()\n");
1136 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
1137 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
1139 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
1140 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
1142 if (data->ledmode) {
1143 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1144 MII_MARVELL_LED_CTRL);
1145 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
1148 reg |= (1 + 0x0100);
1149 asix_mdio_write(dev->net, dev->mii.phy_id,
1150 MII_MARVELL_LED_CTRL, reg);
1152 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
1153 MII_MARVELL_LED_CTRL);
1154 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
1161 static int rtl8211cl_phy_init(struct usbnet *dev)
1163 struct asix_data *data = (struct asix_data *)&dev->data;
1165 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
1167 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
1168 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
1169 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
1170 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
1171 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1173 if (data->ledmode == 12) {
1174 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
1175 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
1176 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
1182 static int marvell_led_status(struct usbnet *dev, u16 speed)
1184 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
1186 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
1188 /* Clear out the center LED bits - 0x03F0 */
1202 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
1203 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
1208 static int ax88178_reset(struct usbnet *dev)
1210 struct asix_data *data = (struct asix_data *)&dev->data;
1217 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
1218 dbg("GPIO Status: 0x%04x", status);
1220 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
1221 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
1222 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
1224 dbg("EEPROM index 0x17 is 0x%04x", eeprom);
1226 if (eeprom == cpu_to_le16(0xffff)) {
1227 data->phymode = PHY_MODE_MARVELL;
1231 data->phymode = le16_to_cpu(eeprom) & 0x7F;
1232 data->ledmode = le16_to_cpu(eeprom) >> 8;
1233 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
1235 dbg("GPIO0: %d, PhyMode: %d", gpio0, data->phymode);
1237 /* Power up external GigaPHY through AX88178 GPIO pin */
1238 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
1239 if ((le16_to_cpu(eeprom) >> 8) != 1) {
1240 asix_write_gpio(dev, 0x003c, 30);
1241 asix_write_gpio(dev, 0x001c, 300);
1242 asix_write_gpio(dev, 0x003c, 30);
1244 dbg("gpio phymode == 1 path");
1245 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
1246 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
1249 /* Read PHYID register *AFTER* powering up PHY */
1250 phyid = asix_get_phyid(dev);
1251 dbg("PHYID=0x%08x", phyid);
1253 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
1254 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
1256 asix_sw_reset(dev, 0);
1259 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1262 asix_write_rx_ctl(dev, 0);
1264 if (data->phymode == PHY_MODE_MARVELL) {
1265 marvell_phy_init(dev);
1267 } else if (data->phymode == PHY_MODE_RTL8211CL)
1268 rtl8211cl_phy_init(dev);
1270 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
1271 BMCR_RESET | BMCR_ANENABLE);
1272 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1273 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
1274 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
1275 ADVERTISE_1000FULL);
1277 mii_nway_restart(&dev->mii);
1279 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
1283 /* Rewrite MAC address */
1284 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
1285 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
1290 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
1297 static int ax88178_link_reset(struct usbnet *dev)
1300 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1301 struct asix_data *data = (struct asix_data *)&dev->data;
1304 netdev_dbg(dev->net, "ax88178_link_reset()\n");
1306 mii_check_media(&dev->mii, 1, 1);
1307 mii_ethtool_gset(&dev->mii, &ecmd);
1308 mode = AX88178_MEDIUM_DEFAULT;
1309 speed = ethtool_cmd_speed(&ecmd);
1311 if (speed == SPEED_1000)
1312 mode |= AX_MEDIUM_GM;
1313 else if (speed == SPEED_100)
1314 mode |= AX_MEDIUM_PS;
1316 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1318 mode |= AX_MEDIUM_ENCK;
1320 if (ecmd.duplex == DUPLEX_FULL)
1321 mode |= AX_MEDIUM_FD;
1323 mode &= ~AX_MEDIUM_FD;
1325 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1326 speed, ecmd.duplex, mode);
1328 asix_write_medium_mode(dev, mode);
1330 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1331 marvell_led_status(dev, speed);
1336 static void ax88178_set_mfb(struct usbnet *dev)
1338 u16 mfb = AX_RX_CTL_MFB_16384;
1341 int old_rx_urb_size = dev->rx_urb_size;
1343 if (dev->hard_mtu < 2048) {
1344 dev->rx_urb_size = 2048;
1345 mfb = AX_RX_CTL_MFB_2048;
1346 } else if (dev->hard_mtu < 4096) {
1347 dev->rx_urb_size = 4096;
1348 mfb = AX_RX_CTL_MFB_4096;
1349 } else if (dev->hard_mtu < 8192) {
1350 dev->rx_urb_size = 8192;
1351 mfb = AX_RX_CTL_MFB_8192;
1352 } else if (dev->hard_mtu < 16384) {
1353 dev->rx_urb_size = 16384;
1354 mfb = AX_RX_CTL_MFB_16384;
1357 rxctl = asix_read_rx_ctl(dev);
1358 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
1360 medium = asix_read_medium_status(dev);
1361 if (dev->net->mtu > 1500)
1362 medium |= AX_MEDIUM_JFE;
1364 medium &= ~AX_MEDIUM_JFE;
1365 asix_write_medium_mode(dev, medium);
1367 if (dev->rx_urb_size > old_rx_urb_size)
1368 usbnet_unlink_rx_urbs(dev);
1371 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1373 struct usbnet *dev = netdev_priv(net);
1374 int ll_mtu = new_mtu + net->hard_header_len + 4;
1376 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1378 if (new_mtu <= 0 || ll_mtu > 16384)
1381 if ((ll_mtu % dev->maxpacket) == 0)
1385 dev->hard_mtu = net->mtu + net->hard_header_len;
1386 ax88178_set_mfb(dev);
1391 static const struct net_device_ops ax88178_netdev_ops = {
1392 .ndo_open = usbnet_open,
1393 .ndo_stop = usbnet_stop,
1394 .ndo_start_xmit = usbnet_start_xmit,
1395 .ndo_tx_timeout = usbnet_tx_timeout,
1396 .ndo_set_mac_address = asix_set_mac_address,
1397 .ndo_validate_addr = eth_validate_addr,
1398 .ndo_set_rx_mode = asix_set_multicast,
1399 .ndo_do_ioctl = asix_ioctl,
1400 .ndo_change_mtu = ax88178_change_mtu,
1403 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1407 struct asix_data *data = (struct asix_data *)&dev->data;
1409 data->eeprom_len = AX88772_EEPROM_LEN;
1411 usbnet_get_endpoints(dev,intf);
1413 /* Get the MAC address */
1414 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
1416 dbg("Failed to read MAC address: %d", ret);
1419 memcpy(dev->net->dev_addr, buf, ETH_ALEN);
1421 /* Initialize MII structure */
1422 dev->mii.dev = dev->net;
1423 dev->mii.mdio_read = asix_mdio_read;
1424 dev->mii.mdio_write = asix_mdio_write;
1425 dev->mii.phy_id_mask = 0x1f;
1426 dev->mii.reg_num_mask = 0xff;
1427 dev->mii.supports_gmii = 1;
1428 dev->mii.phy_id = asix_get_phy_addr(dev);
1430 dev->net->netdev_ops = &ax88178_netdev_ops;
1431 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1433 /* Blink LEDS so users know driver saw dongle */
1434 asix_sw_reset(dev, 0);
1437 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
1440 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1441 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1442 /* hard_mtu is still the default - the device does not support
1444 dev->rx_urb_size = 2048;
1450 static const struct driver_info ax8817x_info = {
1451 .description = "ASIX AX8817x USB 2.0 Ethernet",
1452 .bind = ax88172_bind,
1453 .status = asix_status,
1454 .link_reset = ax88172_link_reset,
1455 .reset = ax88172_link_reset,
1456 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1460 static const struct driver_info dlink_dub_e100_info = {
1461 .description = "DLink DUB-E100 USB Ethernet",
1462 .bind = ax88172_bind,
1463 .status = asix_status,
1464 .link_reset = ax88172_link_reset,
1465 .reset = ax88172_link_reset,
1466 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1470 static const struct driver_info netgear_fa120_info = {
1471 .description = "Netgear FA-120 USB Ethernet",
1472 .bind = ax88172_bind,
1473 .status = asix_status,
1474 .link_reset = ax88172_link_reset,
1475 .reset = ax88172_link_reset,
1476 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1480 static const struct driver_info hawking_uf200_info = {
1481 .description = "Hawking UF200 USB Ethernet",
1482 .bind = ax88172_bind,
1483 .status = asix_status,
1484 .link_reset = ax88172_link_reset,
1485 .reset = ax88172_link_reset,
1486 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1490 static const struct driver_info ax88772_info = {
1491 .description = "ASIX AX88772 USB 2.0 Ethernet",
1492 .bind = ax88772_bind,
1493 .status = asix_status,
1494 .link_reset = ax88772_link_reset,
1495 .reset = ax88772_reset,
1496 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1497 .rx_fixup = asix_rx_fixup,
1498 .tx_fixup = asix_tx_fixup,
1501 static const struct driver_info ax88178_info = {
1502 .description = "ASIX AX88178 USB 2.0 Ethernet",
1503 .bind = ax88178_bind,
1504 .status = asix_status,
1505 .link_reset = ax88178_link_reset,
1506 .reset = ax88178_reset,
1507 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
1508 .rx_fixup = asix_rx_fixup,
1509 .tx_fixup = asix_tx_fixup,
1512 static const struct usb_device_id products [] = {
1515 USB_DEVICE (0x077b, 0x2226),
1516 .driver_info = (unsigned long) &ax8817x_info,
1519 USB_DEVICE (0x0846, 0x1040),
1520 .driver_info = (unsigned long) &netgear_fa120_info,
1523 USB_DEVICE (0x2001, 0x1a00),
1524 .driver_info = (unsigned long) &dlink_dub_e100_info,
1526 // Intellinet, ST Lab USB Ethernet
1527 USB_DEVICE (0x0b95, 0x1720),
1528 .driver_info = (unsigned long) &ax8817x_info,
1530 // Hawking UF200, TrendNet TU2-ET100
1531 USB_DEVICE (0x07b8, 0x420a),
1532 .driver_info = (unsigned long) &hawking_uf200_info,
1534 // Billionton Systems, USB2AR
1535 USB_DEVICE (0x08dd, 0x90ff),
1536 .driver_info = (unsigned long) &ax8817x_info,
1539 USB_DEVICE (0x0557, 0x2009),
1540 .driver_info = (unsigned long) &ax8817x_info,
1542 // Buffalo LUA-U2-KTX
1543 USB_DEVICE (0x0411, 0x003d),
1544 .driver_info = (unsigned long) &ax8817x_info,
1546 // Buffalo LUA-U2-GT 10/100/1000
1547 USB_DEVICE (0x0411, 0x006e),
1548 .driver_info = (unsigned long) &ax88178_info,
1550 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1551 USB_DEVICE (0x6189, 0x182d),
1552 .driver_info = (unsigned long) &ax8817x_info,
1554 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1555 USB_DEVICE (0x0df6, 0x0056),
1556 .driver_info = (unsigned long) &ax88178_info,
1558 // corega FEther USB2-TX
1559 USB_DEVICE (0x07aa, 0x0017),
1560 .driver_info = (unsigned long) &ax8817x_info,
1562 // Surecom EP-1427X-2
1563 USB_DEVICE (0x1189, 0x0893),
1564 .driver_info = (unsigned long) &ax8817x_info,
1566 // goodway corp usb gwusb2e
1567 USB_DEVICE (0x1631, 0x6200),
1568 .driver_info = (unsigned long) &ax8817x_info,
1570 // JVC MP-PRX1 Port Replicator
1571 USB_DEVICE (0x04f1, 0x3008),
1572 .driver_info = (unsigned long) &ax8817x_info,
1574 // ASIX AX88772B 10/100
1575 USB_DEVICE (0x0b95, 0x772b),
1576 .driver_info = (unsigned long) &ax88772_info,
1578 // ASIX AX88772 10/100
1579 USB_DEVICE (0x0b95, 0x7720),
1580 .driver_info = (unsigned long) &ax88772_info,
1582 // ASIX AX88178 10/100/1000
1583 USB_DEVICE (0x0b95, 0x1780),
1584 .driver_info = (unsigned long) &ax88178_info,
1586 // Logitec LAN-GTJ/U2A
1587 USB_DEVICE (0x0789, 0x0160),
1588 .driver_info = (unsigned long) &ax88178_info,
1590 // Linksys USB200M Rev 2
1591 USB_DEVICE (0x13b1, 0x0018),
1592 .driver_info = (unsigned long) &ax88772_info,
1594 // 0Q0 cable ethernet
1595 USB_DEVICE (0x1557, 0x7720),
1596 .driver_info = (unsigned long) &ax88772_info,
1598 // DLink DUB-E100 H/W Ver B1
1599 USB_DEVICE (0x07d1, 0x3c05),
1600 .driver_info = (unsigned long) &ax88772_info,
1602 // DLink DUB-E100 H/W Ver B1 Alternate
1603 USB_DEVICE (0x2001, 0x3c05),
1604 .driver_info = (unsigned long) &ax88772_info,
1607 USB_DEVICE (0x1737, 0x0039),
1608 .driver_info = (unsigned long) &ax88178_info,
1611 USB_DEVICE (0x04bb, 0x0930),
1612 .driver_info = (unsigned long) &ax88178_info,
1615 USB_DEVICE(0x050d, 0x5055),
1616 .driver_info = (unsigned long) &ax88178_info,
1618 // Apple USB Ethernet Adapter
1619 USB_DEVICE(0x05ac, 0x1402),
1620 .driver_info = (unsigned long) &ax88772_info,
1622 // Cables-to-Go USB Ethernet Adapter
1623 USB_DEVICE(0x0b95, 0x772a),
1624 .driver_info = (unsigned long) &ax88772_info,
1627 USB_DEVICE(0x14ea, 0xab11),
1628 .driver_info = (unsigned long) &ax88178_info,
1631 USB_DEVICE(0x0db0, 0xa877),
1632 .driver_info = (unsigned long) &ax88772_info,
1634 // Asus USB Ethernet Adapter
1635 USB_DEVICE (0x0b95, 0x7e2b),
1636 .driver_info = (unsigned long) &ax88772_info,
1640 MODULE_DEVICE_TABLE(usb, products);
1642 static struct usb_driver asix_driver = {
1643 .name = DRIVER_NAME,
1644 .id_table = products,
1645 .probe = usbnet_probe,
1646 .suspend = usbnet_suspend,
1647 .resume = usbnet_resume,
1648 .disconnect = usbnet_disconnect,
1649 .supports_autosuspend = 1,
1652 module_usb_driver(asix_driver);
1654 MODULE_AUTHOR("David Hollis");
1655 MODULE_VERSION(DRIVER_VERSION);
1656 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1657 MODULE_LICENSE("GPL");