1 #ifndef _ASM_IA64_SAL_H
2 #define _ASM_IA64_SAL_H
5 * System Abstraction Layer definitions.
7 * This is based on version 2.5 of the manual "IA-64 System
10 * Copyright (C) 2001 Intel
11 * Copyright (C) 2002 Jenna Hall <jenna.s.hall@intel.com>
12 * Copyright (C) 2001 Fred Lewis <frederick.v.lewis@intel.com>
13 * Copyright (C) 1998, 1999, 2001, 2003 Hewlett-Packard Co
14 * David Mosberger-Tang <davidm@hpl.hp.com>
15 * Copyright (C) 1999 Srinivasa Prasad Thirumalachar <sprasad@sprasad.engr.sgi.com>
17 * 02/01/04 J. Hall Updated Error Record Structures to conform to July 2001
18 * revision of the SAL spec.
19 * 01/01/03 fvlewis Updated Error Record Structures to conform with Nov. 2000
20 * revision of the SAL spec.
21 * 99/09/29 davidm Updated for SAL 2.6.
22 * 00/03/29 cfleck Updated SAL Error Logging info for processor (SAL 2.6)
23 * (plus examples of platform error info structures from smariset @ Intel)
26 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT 0
27 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT 1
28 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT 2
29 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT 3
31 #define IA64_SAL_PLATFORM_FEATURE_BUS_LOCK (1<<IA64_SAL_PLATFORM_FEATURE_BUS_LOCK_BIT)
32 #define IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IRQ_REDIR_HINT_BIT)
33 #define IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT (1<<IA64_SAL_PLATFORM_FEATURE_IPI_REDIR_HINT_BIT)
34 #define IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT (1<<IA64_SAL_PLATFORM_FEATURE_ITC_DRIFT_BIT)
38 #include <linux/spinlock.h>
39 #include <linux/efi.h>
42 #include <asm/system.h>
45 extern spinlock_t sal_lock;
47 /* SAL spec _requires_ eight args for each call. */
48 #define __SAL_CALL(result,a0,a1,a2,a3,a4,a5,a6,a7) \
49 result = (*ia64_sal)(a0,a1,a2,a3,a4,a5,a6,a7)
51 # define SAL_CALL(result,args...) do { \
52 unsigned long __ia64_sc_flags; \
53 struct ia64_fpreg __ia64_sc_fr[6]; \
54 ia64_save_scratch_fpregs(__ia64_sc_fr); \
55 spin_lock_irqsave(&sal_lock, __ia64_sc_flags); \
56 __SAL_CALL(result, args); \
57 spin_unlock_irqrestore(&sal_lock, __ia64_sc_flags); \
58 ia64_load_scratch_fpregs(__ia64_sc_fr); \
61 # define SAL_CALL_NOLOCK(result,args...) do { \
62 unsigned long __ia64_scn_flags; \
63 struct ia64_fpreg __ia64_scn_fr[6]; \
64 ia64_save_scratch_fpregs(__ia64_scn_fr); \
65 local_irq_save(__ia64_scn_flags); \
66 __SAL_CALL(result, args); \
67 local_irq_restore(__ia64_scn_flags); \
68 ia64_load_scratch_fpregs(__ia64_scn_fr); \
71 #define SAL_SET_VECTORS 0x01000000
72 #define SAL_GET_STATE_INFO 0x01000001
73 #define SAL_GET_STATE_INFO_SIZE 0x01000002
74 #define SAL_CLEAR_STATE_INFO 0x01000003
75 #define SAL_MC_RENDEZ 0x01000004
76 #define SAL_MC_SET_PARAMS 0x01000005
77 #define SAL_REGISTER_PHYSICAL_ADDR 0x01000006
79 #define SAL_CACHE_FLUSH 0x01000008
80 #define SAL_CACHE_INIT 0x01000009
81 #define SAL_PCI_CONFIG_READ 0x01000010
82 #define SAL_PCI_CONFIG_WRITE 0x01000011
83 #define SAL_FREQ_BASE 0x01000012
85 #define SAL_UPDATE_PAL 0x01000020
87 struct ia64_sal_retval {
89 * A zero status value indicates call completed without error.
90 * A negative status value indicates reason of call failure.
91 * A positive status value indicates success but an
92 * informational value should be printed (e.g., "reboot for
93 * change to take effect").
101 typedef struct ia64_sal_retval (*ia64_sal_handler) (u64, ...);
104 SAL_FREQ_BASE_PLATFORM = 0,
105 SAL_FREQ_BASE_INTERVAL_TIMER = 1,
106 SAL_FREQ_BASE_REALTIME_CLOCK = 2
110 * The SAL system table is followed by a variable number of variable
111 * length descriptors. The structure of these descriptors follows
113 * The defininition follows SAL specs from July 2000
115 struct ia64_sal_systab {
116 u8 signature[4]; /* should be "SST_" */
117 u32 size; /* size of this table in bytes */
120 u16 entry_count; /* # of entries in variable portion */
127 /* oem_id & product_id: terminating NUL is missing if string is exactly 32 bytes long. */
129 u8 product_id[32]; /* ASCII product id */
133 enum sal_systab_entry_type {
134 SAL_DESC_ENTRY_POINT = 0,
136 SAL_DESC_PLATFORM_FEATURE = 2,
139 SAL_DESC_AP_WAKEUP = 5
151 #define SAL_DESC_SIZE(type) "\060\040\020\040\020\020"[(unsigned) type]
153 typedef struct ia64_sal_desc_entry_point {
160 }ia64_sal_desc_entry_point_t;
162 typedef struct ia64_sal_desc_memory {
164 u8 used_by_sal; /* needs to be mapped for SAL? */
165 u8 mem_attr; /* current memory attribute setting */
166 u8 access_rights; /* access rights set up by SAL */
167 u8 mem_attr_mask; /* mask of supported memory attributes */
169 u8 mem_type; /* memory type */
170 u8 mem_usage; /* memory usage */
171 u64 addr; /* physical address of memory */
172 u32 length; /* length (multiple of 4KB pages) */
175 } ia64_sal_desc_memory_t;
177 typedef struct ia64_sal_desc_platform_feature {
181 } ia64_sal_desc_platform_feature_t;
183 typedef struct ia64_sal_desc_tr {
185 u8 tr_type; /* 0 == instruction, 1 == data */
186 u8 regnum; /* translation register number */
188 u64 addr; /* virtual address of area covered */
189 u64 page_size; /* encoded page size */
191 } ia64_sal_desc_tr_t;
193 typedef struct ia64_sal_desc_ptc {
196 u32 num_domains; /* # of coherence domains */
197 u64 domain_info; /* physical address of domain info table */
198 } ia64_sal_desc_ptc_t;
200 typedef struct ia64_sal_ptc_domain_info {
201 u64 proc_count; /* number of processors in domain */
202 u64 proc_list; /* physical address of LID array */
203 } ia64_sal_ptc_domain_info_t;
205 typedef struct ia64_sal_ptc_domain_proc_entry {
206 u64 id : 8; /* id of processor */
207 u64 eid : 8; /* eid of processor */
208 } ia64_sal_ptc_domain_proc_entry_t;
211 #define IA64_SAL_AP_EXTERNAL_INT 0
213 typedef struct ia64_sal_desc_ap_wakeup {
215 u8 mechanism; /* 0 == external interrupt */
217 u64 vector; /* interrupt vector in range 0x10-0xff */
218 } ia64_sal_desc_ap_wakeup_t ;
220 extern ia64_sal_handler ia64_sal;
221 extern struct ia64_sal_desc_ptc *ia64_ptc_domain_info;
223 extern const char *ia64_sal_strerror (long status);
224 extern void ia64_sal_init (struct ia64_sal_systab *sal_systab);
226 /* SAL information type encodings */
228 SAL_INFO_TYPE_MCA = 0, /* Machine check abort information */
229 SAL_INFO_TYPE_INIT = 1, /* Init information */
230 SAL_INFO_TYPE_CMC = 2, /* Corrected machine check information */
231 SAL_INFO_TYPE_CPE = 3 /* Corrected platform error information */
234 /* Encodings for machine check parameter types */
236 SAL_MC_PARAM_RENDEZ_INT = 1, /* Rendezvous interrupt */
237 SAL_MC_PARAM_RENDEZ_WAKEUP = 2, /* Wakeup */
238 SAL_MC_PARAM_CPE_INT = 3 /* Corrected Platform Error Int */
241 /* Encodings for rendezvous mechanisms */
243 SAL_MC_PARAM_MECHANISM_INT = 1, /* Use interrupt */
244 SAL_MC_PARAM_MECHANISM_MEM = 2 /* Use memory synchronization variable*/
247 /* Encodings for vectors which can be registered by the OS with SAL */
249 SAL_VECTOR_OS_MCA = 0,
250 SAL_VECTOR_OS_INIT = 1,
251 SAL_VECTOR_OS_BOOT_RENDEZ = 2
254 /* Encodings for mca_opt parameter sent to SAL_MC_SET_PARAMS */
255 #define SAL_MC_PARAM_RZ_ALWAYS 0x1
256 #define SAL_MC_PARAM_BINIT_ESCALATE 0x10
259 * Definition of the SAL Error Log from the SAL spec
262 /* SAL Error Record Section GUID Definitions */
263 #define SAL_PROC_DEV_ERR_SECT_GUID \
264 EFI_GUID(0xe429faf1, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
265 #define SAL_PLAT_MEM_DEV_ERR_SECT_GUID \
266 EFI_GUID(0xe429faf2, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
267 #define SAL_PLAT_SEL_DEV_ERR_SECT_GUID \
268 EFI_GUID(0xe429faf3, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
269 #define SAL_PLAT_PCI_BUS_ERR_SECT_GUID \
270 EFI_GUID(0xe429faf4, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
271 #define SAL_PLAT_SMBIOS_DEV_ERR_SECT_GUID \
272 EFI_GUID(0xe429faf5, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
273 #define SAL_PLAT_PCI_COMP_ERR_SECT_GUID \
274 EFI_GUID(0xe429faf6, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
275 #define SAL_PLAT_SPECIFIC_ERR_SECT_GUID \
276 EFI_GUID(0xe429faf7, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
277 #define SAL_PLAT_HOST_CTLR_ERR_SECT_GUID \
278 EFI_GUID(0xe429faf8, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
279 #define SAL_PLAT_BUS_ERR_SECT_GUID \
280 EFI_GUID(0xe429faf9, 0x3cb7, 0x11d4, 0xbc, 0xa7, 0x0, 0x80, 0xc7, 0x3c, 0x88, 0x81)
282 #define MAX_CACHE_ERRORS 6
283 #define MAX_TLB_ERRORS 6
284 #define MAX_BUS_ERRORS 1
286 /* Definition of version according to SAL spec for logging purposes */
287 typedef struct sal_log_revision {
288 u8 minor; /* BCD (0..99) */
289 u8 major; /* BCD (0..99) */
290 } sal_log_revision_t;
292 /* Definition of timestamp according to SAL spec for logging purposes */
293 typedef struct sal_log_timestamp {
294 u8 slh_second; /* Second (0..59) */
295 u8 slh_minute; /* Minute (0..59) */
296 u8 slh_hour; /* Hour (0..23) */
298 u8 slh_day; /* Day (1..31) */
299 u8 slh_month; /* Month (1..12) */
300 u8 slh_year; /* Year (00..99) */
301 u8 slh_century; /* Century (19, 20, 21, ...) */
302 } sal_log_timestamp_t;
304 /* Definition of log record header structures */
305 typedef struct sal_log_record_header {
306 u64 id; /* Unique monotonically increasing ID */
307 sal_log_revision_t revision; /* Major and Minor revision of header */
308 u16 severity; /* Error Severity */
309 u32 len; /* Length of this error log in bytes */
310 sal_log_timestamp_t timestamp; /* Timestamp */
311 efi_guid_t platform_guid; /* Unique OEM Platform ID */
312 } sal_log_record_header_t;
314 /* Definition of log section header structures */
315 typedef struct sal_log_sec_header {
316 efi_guid_t guid; /* Unique Section ID */
317 sal_log_revision_t revision; /* Major and Minor revision of Section */
319 u32 len; /* Section length */
320 } sal_log_section_hdr_t;
322 typedef struct sal_log_mod_error_info {
325 requestor_identifier : 1,
326 responder_identifier : 1,
327 target_identifier : 1,
332 u64 requestor_identifier;
333 u64 responder_identifier;
334 u64 target_identifier;
336 } sal_log_mod_error_info_t;
338 typedef struct sal_processor_static_info {
348 pal_min_state_area_t min_state_area;
353 struct ia64_fpreg fr[128];
354 } sal_processor_static_info_t;
356 struct sal_cpuid_info {
361 typedef struct sal_log_processor_info {
362 sal_log_section_hdr_t header;
364 u64 proc_error_map : 1,
365 proc_state_param : 1,
367 psi_static_struct : 1,
371 num_reg_file_check : 4,
377 u64 proc_state_parameter;
380 * The rest of this structure consists of variable-length arrays, which can't be
383 sal_log_mod_error_info_t info[0];
385 * This is what the rest looked like if C supported variable-length arrays:
387 * sal_log_mod_error_info_t cache_check_info[.valid.num_cache_check];
388 * sal_log_mod_error_info_t tlb_check_info[.valid.num_tlb_check];
389 * sal_log_mod_error_info_t bus_check_info[.valid.num_bus_check];
390 * sal_log_mod_error_info_t reg_file_check_info[.valid.num_reg_file_check];
391 * sal_log_mod_error_info_t ms_check_info[.valid.num_ms_check];
392 * struct sal_cpuid_info cpuid_info;
393 * sal_processor_static_info_t processor_static_info;
395 } sal_log_processor_info_t;
397 /* Given a sal_log_processor_info_t pointer, return a pointer to the processor_static_info: */
398 #define SAL_LPI_PSI_INFO(l) \
399 ({ sal_log_processor_info_t *_l = (l); \
400 ((sal_processor_static_info_t *) \
401 ((char *) _l->info + ((_l->valid.num_cache_check + _l->valid.num_tlb_check \
402 + _l->valid.num_bus_check + _l->valid.num_reg_file_check \
403 + _l->valid.num_ms_check) * sizeof(sal_log_mod_error_info_t) \
404 + sizeof(struct sal_cpuid_info)))); \
407 /* platform error log structures */
409 typedef struct sal_log_mem_dev_err_info {
410 sal_log_section_hdr_t header;
412 u64 error_status : 1,
447 u8 oem_data[1]; /* Variable length data */
448 } sal_log_mem_dev_err_info_t;
450 typedef struct sal_log_sel_dev_err_info {
451 sal_log_section_hdr_t header;
476 } sal_log_sel_dev_err_info_t;
478 typedef struct sal_log_pci_bus_err_info {
479 sal_log_section_hdr_t header;
503 u8 oem_data[1]; /* Variable length data */
504 } sal_log_pci_bus_err_info_t;
506 typedef struct sal_log_smbios_dev_err_info {
507 sal_log_section_hdr_t header;
518 u8 data[1]; /* data of variable length, length == slsmb_length */
519 } sal_log_smbios_dev_err_info_t;
521 typedef struct sal_log_pci_comp_err_info {
522 sal_log_section_hdr_t header;
545 u64 reg_data_pairs[1];
547 * array of address/data register pairs is num_mem_regs + num_io_regs elements
548 * long. Each array element consists of a u64 address followed by a u64 data
549 * value. The oem_data array immediately follows the reg_data_pairs array
551 u8 oem_data[1]; /* Variable length data */
552 } sal_log_pci_comp_err_info_t;
554 typedef struct sal_log_plat_specific_err_info {
555 sal_log_section_hdr_t header;
564 u8 oem_data[1]; /* platform specific variable length data */
565 } sal_log_plat_specific_err_info_t;
567 typedef struct sal_log_host_ctlr_err_info {
568 sal_log_section_hdr_t header;
583 u8 oem_data[1]; /* Variable length OEM data */
584 } sal_log_host_ctlr_err_info_t;
586 typedef struct sal_log_plat_bus_err_info {
587 sal_log_section_hdr_t header;
602 u8 oem_data[1]; /* Variable length OEM data */
603 } sal_log_plat_bus_err_info_t;
605 /* Overall platform error section structure */
606 typedef union sal_log_platform_err_info {
607 sal_log_mem_dev_err_info_t mem_dev_err;
608 sal_log_sel_dev_err_info_t sel_dev_err;
609 sal_log_pci_bus_err_info_t pci_bus_err;
610 sal_log_smbios_dev_err_info_t smbios_dev_err;
611 sal_log_pci_comp_err_info_t pci_comp_err;
612 sal_log_plat_specific_err_info_t plat_specific_err;
613 sal_log_host_ctlr_err_info_t host_ctlr_err;
614 sal_log_plat_bus_err_info_t plat_bus_err;
615 } sal_log_platform_err_info_t;
617 /* SAL log over-all, multi-section error record structure (processor+platform) */
618 typedef struct err_rec {
619 sal_log_record_header_t sal_elog_header;
620 sal_log_processor_info_t proc_err;
621 sal_log_platform_err_info_t plat_err;
622 u8 oem_data_pad[1024];
626 * Now define a couple of inline functions for improved type checking
630 ia64_sal_freq_base (unsigned long which, unsigned long *ticks_per_second,
631 unsigned long *drift_info)
633 struct ia64_sal_retval isrv;
635 SAL_CALL(isrv, SAL_FREQ_BASE, which, 0, 0, 0, 0, 0, 0);
636 *ticks_per_second = isrv.v0;
637 *drift_info = isrv.v1;
641 /* Flush all the processor and platform level instruction and/or data caches */
643 ia64_sal_cache_flush (u64 cache_type)
645 struct ia64_sal_retval isrv;
646 SAL_CALL(isrv, SAL_CACHE_FLUSH, cache_type, 0, 0, 0, 0, 0, 0);
651 /* Initialize all the processor and platform level instruction and data caches */
653 ia64_sal_cache_init (void)
655 struct ia64_sal_retval isrv;
656 SAL_CALL(isrv, SAL_CACHE_INIT, 0, 0, 0, 0, 0, 0, 0);
661 * Clear the processor and platform information logged by SAL with respect to the machine
662 * state at the time of MCA's, INITs, CMCs, or CPEs.
665 ia64_sal_clear_state_info (u64 sal_info_type)
667 struct ia64_sal_retval isrv;
668 SAL_CALL(isrv, SAL_CLEAR_STATE_INFO, sal_info_type, 0,
674 /* Get the processor and platform information logged by SAL with respect to the machine
675 * state at the time of the MCAs, INITs, CMCs, or CPEs.
678 ia64_sal_get_state_info (u64 sal_info_type, u64 *sal_info)
680 struct ia64_sal_retval isrv;
681 SAL_CALL(isrv, SAL_GET_STATE_INFO, sal_info_type, 0,
682 sal_info, 0, 0, 0, 0);
690 * Get the maximum size of the information logged by SAL with respect to the machine state
691 * at the time of MCAs, INITs, CMCs, or CPEs.
694 ia64_sal_get_state_info_size (u64 sal_info_type)
696 struct ia64_sal_retval isrv;
697 SAL_CALL(isrv, SAL_GET_STATE_INFO_SIZE, sal_info_type, 0,
705 * Causes the processor to go into a spin loop within SAL where SAL awaits a wakeup from
706 * the monarch processor. Must not lock, because it will not return on any cpu until the
707 * monarch processor sends a wake up.
710 ia64_sal_mc_rendez (void)
712 struct ia64_sal_retval isrv;
713 SAL_CALL_NOLOCK(isrv, SAL_MC_RENDEZ, 0, 0, 0, 0, 0, 0, 0);
718 * Allow the OS to specify the interrupt number to be used by SAL to interrupt OS during
719 * the machine check rendezvous sequence as well as the mechanism to wake up the
720 * non-monarch processor at the end of machine check processing.
723 ia64_sal_mc_set_params (u64 param_type, u64 i_or_m, u64 i_or_m_val, u64 timeout, u64 rz_always)
725 struct ia64_sal_retval isrv;
726 SAL_CALL(isrv, SAL_MC_SET_PARAMS, param_type, i_or_m, i_or_m_val,
727 timeout, rz_always, 0, 0);
731 /* Read from PCI configuration space */
733 ia64_sal_pci_config_read (u64 pci_config_addr, u64 size, u64 *value)
735 struct ia64_sal_retval isrv;
736 SAL_CALL(isrv, SAL_PCI_CONFIG_READ, pci_config_addr, size, 0, 0, 0, 0, 0);
742 /* Write to PCI configuration space */
744 ia64_sal_pci_config_write (u64 pci_config_addr, u64 size, u64 value)
746 struct ia64_sal_retval isrv;
747 SAL_CALL(isrv, SAL_PCI_CONFIG_WRITE, pci_config_addr, size, value,
753 * Register physical addresses of locations needed by SAL when SAL procedures are invoked
757 ia64_sal_register_physical_addr (u64 phys_entry, u64 phys_addr)
759 struct ia64_sal_retval isrv;
760 SAL_CALL(isrv, SAL_REGISTER_PHYSICAL_ADDR, phys_entry, phys_addr,
766 * Register software dependent code locations within SAL. These locations are handlers or
767 * entry points where SAL will pass control for the specified event. These event handlers
768 * are for the bott rendezvous, MCAs and INIT scenarios.
771 ia64_sal_set_vectors (u64 vector_type,
772 u64 handler_addr1, u64 gp1, u64 handler_len1,
773 u64 handler_addr2, u64 gp2, u64 handler_len2)
775 struct ia64_sal_retval isrv;
776 SAL_CALL(isrv, SAL_SET_VECTORS, vector_type,
777 handler_addr1, gp1, handler_len1,
778 handler_addr2, gp2, handler_len2);
783 /* Update the contents of PAL block in the non-volatile storage device */
785 ia64_sal_update_pal (u64 param_buf, u64 scratch_buf, u64 scratch_buf_size,
786 u64 *error_code, u64 *scratch_buf_size_needed)
788 struct ia64_sal_retval isrv;
789 SAL_CALL(isrv, SAL_UPDATE_PAL, param_buf, scratch_buf, scratch_buf_size,
792 *error_code = isrv.v0;
793 if (scratch_buf_size_needed)
794 *scratch_buf_size_needed = isrv.v1;
798 extern unsigned long sal_platform_features;
800 #endif /* __ASSEMBLY__ */
802 #endif /* _ASM_IA64_PAL_H */